| Core, 0, 0 |
| Cumulative_Cycles, 0, 116419680 |
| Cumulative_Instructions, 0, 119947917 |
| Periodic_Cycles, 0, 116419680 |
| Periodic_Instructions, 0, 119947917 |
| EXECUTION_TIME_count, 0, 36381150000000 |
| EXECUTION_TIME_total_count, 0, 36381150000000 |
|
|
| SIM_HOST_WALL_SECONDS_value, 0, 530.084666 |
| SIM_HOST_WALL_SECONDS_total_value, 0, 530.084666 |
|
|
| NODE_CYCLE_count, 0, 116419680 |
| NODE_CYCLE_total_count, 0, 116419680 |
|
|
| NODE_INST_COUNT_count, 0, 120000005 |
| NODE_INST_COUNT_total_count, 0, 120000005 |
|
|
| NODE_INST_COUNT_FETCHED_count, 0, 119947917 |
| NODE_INST_COUNT_FETCHED_total_count, 0, 119947917 |
|
|
| NODE_UOP_COUNT_count, 0, 151528630 |
| NODE_UOP_COUNT_total_count, 0, 151528630 |
|
|
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_count, 0, 37258913 |
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_total_count, 0, 37258913 |
|
|
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_ONPATH_count, 0, 36837038 |
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_ONPATH_total_count, 0, 36837038 |
|
|
| FULL_WINDOW_STALL_count, 0, 37457 |
| FULL_WINDOW_STALL_pct, 0, 0.032 |
| FULL_WINDOW_STALL_total_count, 0, 37457 |
| FULL_WINDOW_STALL_total_pct, 0, 0.032 |
|
|
| FULL_WINDOW_MEM_OP_count, 401, 36790 |
| FULL_WINDOW_MEM_OP_total_count, 401, 36790 |
|
|
| FULL_WINDOW_FP_OP_count, 401, 0 |
| FULL_WINDOW_FP_OP_total_count, 401, 0 |
|
|
| FULL_WINDOW_OTHER_OP_count, 401, 106 |
| FULL_WINDOW_OTHER_OP_total_count, 401, 106 |
|
|
| RET_BLOCKED_DC_MISS_count, 0, 23626038 |
| RET_BLOCKED_DC_MISS_pct, 0, 20.294 |
| RET_BLOCKED_DC_MISS_total_count, 0, 23626038 |
| RET_BLOCKED_DC_MISS_total_pct, 0, 20.294 |
|
|
| RET_BLOCKED_L1_MISS_count, 0, 19914332 |
| RET_BLOCKED_L1_MISS_pct, 0, 17.106 |
| RET_BLOCKED_L1_MISS_total_count, 0, 19914332 |
| RET_BLOCKED_L1_MISS_total_pct, 0, 17.106 |
|
|
| RET_BLOCKED_L1_MISS_BW_PREF_count, 0, 18623780 |
| RET_BLOCKED_L1_MISS_BW_PREF_pct, 0, 15.997 |
| RET_BLOCKED_L1_MISS_BW_PREF_total_count, 0, 18623780 |
| RET_BLOCKED_L1_MISS_BW_PREF_total_pct, 0, 15.997 |
|
|
| RET_BLOCKED_L1_ACCESS_count, 0, 3824687 |
| RET_BLOCKED_L1_ACCESS_pct, 0, 3.285 |
| RET_BLOCKED_L1_ACCESS_total_count, 0, 3824687 |
| RET_BLOCKED_L1_ACCESS_total_pct, 0, 3.285 |
|
|
| RET_BLOCKED_MEM_STALL_count, 0, 49618447 |
| RET_BLOCKED_MEM_STALL_pct, 0, 42.620 |
| RET_BLOCKED_MEM_STALL_total_count, 0, 49618447 |
| RET_BLOCKED_MEM_STALL_total_pct, 0, 42.620 |
|
|
| RET_BLOCKED_OFFCHIP_DEMAND_count, 0, 0 |
| RET_BLOCKED_OFFCHIP_DEMAND_pct, 0, 0.000 |
| RET_BLOCKED_OFFCHIP_DEMAND_total_count, 0, 0 |
| RET_BLOCKED_OFFCHIP_DEMAND_total_pct, 0, 0.000 |
|
|
| OP_ISSUED_count, 0, 152753129 |
| OP_ISSUED_total_count, 0, 152753129 |
|
|
| OP_RETIRED_count, 0, 151528630 |
| OP_RETIRED_total_count, 0, 151528630 |
|
|
| OP_MACRO_FUSION_ONPATH_count, 0, 11839187 |
| OP_MACRO_FUSION_ONPATH_total_count, 0, 11839187 |
|
|
| OP_MACRO_FUSION_OFFPATH_count, 0, 187240 |
| OP_MACRO_FUSION_OFFPATH_total_count, 0, 187240 |
|
|
| REPLAY_SIGNALED_count, 0, 0 |
| REPLAY_SIGNALED_total_count, 0, 0 |
|
|
| REPLAY_COUNTED_count, 0, 0 |
| REPLAY_COUNTED_total_count, 0, 0 |
|
|
| OFF_CRITICAL_PATH_count, 402, 0 |
| OFF_CRITICAL_PATH_total_count, 402, 0 |
|
|
| ON_CRITICAL_PATH_count, 402, 0 |
| ON_CRITICAL_PATH_total_count, 402, 0 |
|
|
| LD_NO_DEPENDENTS_count, 403, 281026 |
| LD_NO_DEPENDENTS_total_count, 403, 281026 |
|
|
| LD_DEPENDENTS_count, 403, 25553168 |
| LD_DEPENDENTS_total_count, 403, 25553168 |
|
|
| LD_EXEC_CYCLES_0_count, 404, 0 |
| LD_EXEC_CYCLES_0_total_count, 404, 0 |
|
|
| LD_EXEC_CYCLES_1_count, 404, 0 |
| LD_EXEC_CYCLES_1_total_count, 404, 0 |
|
|
| LD_EXEC_CYCLES_2_count, 404, 0 |
| LD_EXEC_CYCLES_2_total_count, 404, 0 |
|
|
| LD_EXEC_CYCLES_3_count, 404, 1489 |
| LD_EXEC_CYCLES_3_total_count, 404, 1489 |
|
|
| LD_EXEC_CYCLES_4_count, 404, 860 |
| LD_EXEC_CYCLES_4_total_count, 404, 860 |
|
|
| ICACHE_STAGE_STARVED_count, 405, 794220 |
| ICACHE_STAGE_STARVED_total_count, 405, 794220 |
|
|
| ICACHE_STAGE_NOT_STARVED_count, 405, 114282578 |
| ICACHE_STAGE_NOT_STARVED_total_count, 405, 114282578 |
|
|
| ICACHE_STAGE_STALLED_count, 406, 90119839 |
| ICACHE_STAGE_STALLED_total_count, 406, 90119839 |
|
|
| ICACHE_STAGE_NOT_STALLED_count, 406, 24956959 |
| ICACHE_STAGE_NOT_STALLED_total_count, 406, 24956959 |
|
|
| ICACHE_STAGE_OFF_PATH_count, 406, 1342882 |
| ICACHE_STAGE_OFF_PATH_total_count, 406, 1342882 |
|
|
| DECODE_STAGE_STARVED_count, 407, 114451483 |
| DECODE_STAGE_STARVED_total_count, 407, 114451483 |
|
|
| DECODE_STAGE_NOT_STARVED_count, 407, 1137057 |
| DECODE_STAGE_NOT_STARVED_total_count, 407, 1137057 |
|
|
| DECODE_STAGE_STALLED_count, 408, 238684 |
| DECODE_STAGE_STALLED_total_count, 408, 238684 |
|
|
| DECODE_STAGE_NOT_STALLED_count, 408, 115349856 |
| DECODE_STAGE_NOT_STALLED_total_count, 408, 115349856 |
|
|
| DECODE_STAGE_OFF_PATH_count, 408, 831140 |
| DECODE_STAGE_OFF_PATH_total_count, 408, 831140 |
|
|
| UOPQ_STAGE_STARVED_count, 409, 2237704 |
| UOPQ_STAGE_STARVED_total_count, 409, 2237704 |
|
|
| UOPQ_STAGE_NOT_STARVED_count, 409, 23118775 |
| UOPQ_STAGE_NOT_STARVED_total_count, 409, 23118775 |
|
|
| UOPQ_STAGE_STALLED_count, 410, 90022429 |
| UOPQ_STAGE_STALLED_total_count, 410, 90022429 |
|
|
| UOPQ_STAGE_NOT_STALLED_count, 410, 25356479 |
| UOPQ_STAGE_NOT_STALLED_total_count, 410, 25356479 |
|
|
| UOPQ_STAGE_OFF_PATH_count, 410, 1040772 |
| UOPQ_STAGE_OFF_PATH_total_count, 410, 1040772 |
|
|
| RS_OP_READY_NOT_ISSUED_TOTAL_count, 0, 1131707102 |
| RS_OP_READY_NOT_ISSUED_TOTAL_total_count, 0, 1131707102 |
|
|
| RS_0_OP_READY_NOT_ISSUED_count, 0, 18044559 |
| RS_0_OP_READY_NOT_ISSUED_total_count, 0, 18044559 |
|
|
| RS_1_OP_READY_NOT_ISSUED_count, 0, 1051063 |
| RS_1_OP_READY_NOT_ISSUED_total_count, 0, 1051063 |
|
|
| RS_2_OP_READY_NOT_ISSUED_count, 0, 1112611480 |
| RS_2_OP_READY_NOT_ISSUED_total_count, 0, 1112611480 |
|
|
| RS_3_OP_READY_NOT_ISSUED_count, 0, 0 |
| RS_3_OP_READY_NOT_ISSUED_total_count, 0, 0 |
|
|
| RS_4_OP_READY_NOT_ISSUED_count, 0, 0 |
| RS_4_OP_READY_NOT_ISSUED_total_count, 0, 0 |
|
|
| RS_5_OP_READY_NOT_ISSUED_count, 0, 0 |
| RS_5_OP_READY_NOT_ISSUED_total_count, 0, 0 |
|
|
| RS_6_OP_READY_NOT_ISSUED_count, 0, 0 |
| RS_6_OP_READY_NOT_ISSUED_total_count, 0, 0 |
|
|
| RS_7_OP_READY_NOT_ISSUED_count, 0, 0 |
| RS_7_OP_READY_NOT_ISSUED_total_count, 0, 0 |
|
|
| RS_7_PLUS_OP_READY_NOT_ISSUED_count, 0, 0 |
| RS_7_PLUS_OP_READY_NOT_ISSUED_total_count, 0, 0 |
|
|
| FU_IDLE_NO_READY_OPS_TOTAL_count, 0, 767313848 |
| FU_IDLE_NO_READY_OPS_TOTAL_total_count, 0, 767313848 |
|
|
| FU_0_IDLE_NO_READY_OPS_count, 0, 80856623 |
| FU_0_IDLE_NO_READY_OPS_total_count, 0, 80856623 |
|
|
| FU_1_IDLE_NO_READY_OPS_count, 0, 82505021 |
| FU_1_IDLE_NO_READY_OPS_total_count, 0, 82505021 |
|
|
| FU_2_IDLE_NO_READY_OPS_count, 0, 95925632 |
| FU_2_IDLE_NO_READY_OPS_total_count, 0, 95925632 |
|
|
| FU_3_IDLE_NO_READY_OPS_count, 0, 95925371 |
| FU_3_IDLE_NO_READY_OPS_total_count, 0, 95925371 |
|
|
| FU_4_IDLE_NO_READY_OPS_count, 0, 82706686 |
| FU_4_IDLE_NO_READY_OPS_total_count, 0, 82706686 |
|
|
| FU_5_IDLE_NO_READY_OPS_count, 0, 80557574 |
| FU_5_IDLE_NO_READY_OPS_total_count, 0, 80557574 |
|
|
| FU_6_IDLE_NO_READY_OPS_count, 0, 35188918 |
| FU_6_IDLE_NO_READY_OPS_total_count, 0, 35188918 |
|
|
| FU_7_IDLE_NO_READY_OPS_count, 0, 35186209 |
| FU_7_IDLE_NO_READY_OPS_total_count, 0, 35186209 |
|
|
| FU_8_IDLE_NO_READY_OPS_count, 0, 82538863 |
| FU_8_IDLE_NO_READY_OPS_total_count, 0, 82538863 |
|
|
| FU_9_IDLE_NO_READY_OPS_count, 0, 95922951 |
| FU_9_IDLE_NO_READY_OPS_total_count, 0, 95922951 |
|
|
| FU_10_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_10_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_11_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_11_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_12_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_12_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_13_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_13_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_14_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_14_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_15_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_15_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_16_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_16_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_17_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_17_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_18_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_18_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_19_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_19_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_20_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_20_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_21_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_21_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_22_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_22_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_23_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_23_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_24_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_24_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_25_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_25_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_26_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_26_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_27_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_27_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_28_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_28_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_29_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_29_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_30_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_30_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_31_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_31_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| FU_31_PLUS_IDLE_NO_READY_OPS_count, 0, 0 |
| FU_31_PLUS_IDLE_NO_READY_OPS_total_count, 0, 0 |
|
|
| MAP_STAGE_STARVED_count, 411, 843669 |
| MAP_STAGE_STARVED_total_count, 411, 843669 |
|
|
| MAP_STAGE_NOT_STARVED_count, 411, 51652961 |
| MAP_STAGE_NOT_STARVED_total_count, 411, 51652961 |
|
|
| MAP_STAGE_STALLED_count, 412, 26248134 |
| MAP_STAGE_STALLED_total_count, 412, 26248134 |
|
|
| MAP_STAGE_NOT_STALLED_count, 412, 26248496 |
| MAP_STAGE_NOT_STALLED_total_count, 412, 26248496 |
|
|
| MAP_STAGE_OFF_PATH_count, 412, 651362 |
| MAP_STAGE_OFF_PATH_total_count, 412, 651362 |
|
|
| MAP_STAGE_STALL_ITSELF_count, 413, 63271688 |
| MAP_STAGE_STALL_ITSELF_total_count, 413, 63271688 |
|
|
| MAP_STAGE_NOT_STALL_ITSELF_count, 413, 53147992 |
| MAP_STAGE_NOT_STALL_ITSELF_total_count, 413, 53147992 |
|
|
| MAP_STAGE_LATE_ALLOCATE_SEND_BACK_count, 0, 0 |
| MAP_STAGE_LATE_ALLOCATE_SEND_BACK_total_count, 0, 0 |
|
|
| MAP_STAGE_RENAME_OP_ONPATH_count, 0, 151528895 |
| MAP_STAGE_RENAME_OP_ONPATH_total_count, 0, 151528895 |
|
|
| MAP_STAGE_RENAME_OP_OFFPATH_count, 0, 2587448 |
| MAP_STAGE_RENAME_OP_OFFPATH_total_count, 0, 2587448 |
|
|
| MAP_STAGE_RENAME_INT_REG_ONPATH_count, 0, 127274494 |
| MAP_STAGE_RENAME_INT_REG_ONPATH_total_count, 0, 127274494 |
|
|
| MAP_STAGE_RENAME_INT_REG_OFFPATH_count, 0, 1943753 |
| MAP_STAGE_RENAME_INT_REG_OFFPATH_total_count, 0, 1943753 |
|
|
| MAP_STAGE_RENAME_VEC_REG_ONPATH_count, 0, 71615 |
| MAP_STAGE_RENAME_VEC_REG_ONPATH_total_count, 0, 71615 |
|
|
| MAP_STAGE_RENAME_VEC_REG_OFFPATH_count, 0, 13292 |
| MAP_STAGE_RENAME_VEC_REG_OFFPATH_total_count, 0, 13292 |
|
|
| MAP_STAGE_RENAME_MOVE_ELIM_ONPATH_count, 0, 0 |
| MAP_STAGE_RENAME_MOVE_ELIM_ONPATH_total_count, 0, 0 |
|
|
| MAP_STAGE_RENAME_MOVE_ELIM_OFFPATH_count, 0, 0 |
| MAP_STAGE_RENAME_MOVE_ELIM_OFFPATH_total_count, 0, 0 |
|
|
| REG_FILE_UTIL_SAMPLES_count, 0, 116419680 |
| REG_FILE_UTIL_SAMPLES_total_count, 0, 116419680 |
|
|
| REG_FILE_INT_PHYS_REGS_SUM_count, 0, 32597510400 |
| REG_FILE_INT_PHYS_REGS_SUM_total_count, 0, 32597510400 |
|
|
| REG_FILE_VEC_PHYS_REGS_SUM_count, 0, 38651333760 |
| REG_FILE_VEC_PHYS_REGS_SUM_total_count, 0, 38651333760 |
|
|
| REG_FILE_INT_OCCUPIED_SUM_count, 0, 24687935911 |
| REG_FILE_INT_OCCUPIED_SUM_total_count, 0, 24687935911 |
|
|
| REG_FILE_VEC_OCCUPIED_SUM_count, 0, 3731792077 |
| REG_FILE_VEC_OCCUPIED_SUM_total_count, 0, 3731792077 |
|
|
| MAP_STAGE_ONPATH_INT_REG_NUM_ALLOC_count, 0, 127274249 |
| MAP_STAGE_ONPATH_INT_REG_NUM_ALLOC_total_count, 0, 127274249 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_NUM_ALLOC_count, 0, 71601 |
| MAP_STAGE_ONPATH_VEC_REG_NUM_ALLOC_total_count, 0, 71601 |
|
|
| MAP_STAGE_ONPATH_INT_REG_NUM_SHORTLIVE_count, 0, 51046531 |
| MAP_STAGE_ONPATH_INT_REG_NUM_SHORTLIVE_total_count, 0, 51046531 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_NUM_SHORTLIVE_count, 0, 17920 |
| MAP_STAGE_ONPATH_VEC_REG_NUM_SHORTLIVE_total_count, 0, 17920 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_0_count, 0, 24930054 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_0_total_count, 0, 24930054 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_0_count, 0, 369 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_0_total_count, 0, 369 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_1_count, 0, 65945555 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_1_total_count, 0, 65945555 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_1_count, 0, 62578 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_1_total_count, 0, 62578 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_2_count, 0, 21279251 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_2_total_count, 0, 21279251 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_2_count, 0, 7385 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_2_total_count, 0, 7385 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_3_count, 0, 12903227 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_3_total_count, 0, 12903227 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_3_count, 0, 737 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_3_total_count, 0, 737 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_4_count, 0, 157886 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_4_total_count, 0, 157886 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_4_count, 0, 196 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_4_total_count, 0, 196 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_5_count, 0, 89556 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_5_total_count, 0, 89556 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_5_count, 0, 11 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_5_total_count, 0, 11 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_6_count, 0, 433705 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_6_total_count, 0, 433705 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_6_count, 0, 6 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_6_total_count, 0, 6 |
|
|
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_7_PLUS_count, 0, 1535015 |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_7_PLUS_total_count, 0, 1535015 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_7_PLUS_count, 0, 319 |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_7_PLUS_total_count, 0, 319 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_count, 0, 0 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_pct, 0, 0.000 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_total_count, 0, 0 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_total_pct, 0, 0.000 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_count, 0, 0 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_pct, 0, 0.000 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_total_count, 0, 0 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_total_pct, 0, 0.000 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_count, 0, 0 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_pct, 0, 0.000 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_total_count, 0, 0 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_total_pct, 0, 0.000 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_count, 0, 0 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_pct, 0, 0.000 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_total_count, 0, 0 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_total_pct, 0, 0.000 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_count, 0, 20916835 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_pct, 0, 0.983 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_total_count, 0, 20916835 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_total_pct, 0, 0.983 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_count, 0, 32075678 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_pct, 0, 4343.355 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_total_count, 0, 32075678 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_total_pct, 0, 4343.355 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_count, 0, 1024729056 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_pct, 0, 79.416 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_total_count, 0, 1024729056 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_total_pct, 0, 79.416 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_count, 0, 89617 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_pct, 0, 121.597 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_total_count, 0, 89617 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_total_pct, 0, 121.597 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_count, 0, 3256641 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_pct, 0, 20.627 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_total_count, 0, 3256641 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_total_pct, 0, 20.627 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_count, 0, 27775 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_pct, 0, 141.709 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_total_count, 0, 27775 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_total_pct, 0, 141.709 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_count, 0, 65215159 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_pct, 0, 728.205 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_total_count, 0, 65215159 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_total_pct, 0, 728.205 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_count, 0, 14804 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_pct, 0, 1345.818 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_total_count, 0, 14804 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_total_pct, 0, 1345.818 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_count, 0, 157118058 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_pct, 0, 362.269 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_total_count, 0, 157118058 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_total_pct, 0, 362.269 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_count, 0, 14867 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_pct, 0, 2477.833 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_total_count, 0, 14867 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_total_pct, 0, 2477.833 |
|
|
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_count, 0, 115738124 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_pct, 0, 75.399 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_total_count, 0, 115738124 |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_total_pct, 0, 75.399 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_count, 0, 27555336 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_pct, 0, 86380.364 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_total_count, 0, 27555336 |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_total_pct, 0, 86380.364 |
|
|
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_count, 0, 169235284 |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_pct, 0, 4.542 |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_total_count, 0, 169235284 |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_total_pct, 0, 4.542 |
|
|
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_count, 0, 1701896 |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_pct, 0, 0.046 |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_total_count, 0, 1701896 |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_total_pct, 0, 0.046 |
|
|
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_count, 0, 66349080 |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_pct, 0, 1.781 |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_total_count, 0, 66349080 |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_total_pct, 0, 1.781 |
|
|
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_count, 0, 1627935 |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_pct, 0, 0.044 |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_total_count, 0, 1627935 |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_total_pct, 0, 0.044 |
|
|
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_count, 0, 32806202 |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_pct, 0, 0.880 |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_count, 0, 32806202 |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_pct, 0, 0.880 |
|
|
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_count, 0, 4295 |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_pct, 0, 0.000 |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_count, 0, 4295 |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_pct, 0, 0.000 |
|
|
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_count, 0, 168195561 |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_pct, 0, 4.566 |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_count, 0, 168195561 |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_pct, 0, 4.566 |
|
|
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_count, 0, 1697578 |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_pct, 0, 0.046 |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_count, 0, 1697578 |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_pct, 0, 0.046 |
|
|
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_count, 0, 65851220 |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_pct, 0, 1.788 |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_count, 0, 65851220 |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_pct, 0, 1.788 |
|
|
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_count, 0, 1626330 |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_pct, 0, 0.044 |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_count, 0, 1626330 |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_pct, 0, 0.044 |
|
|
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_count, 0, 32534098 |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_pct, 0, 0.883 |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_count, 0, 32534098 |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_pct, 0, 0.883 |
|
|
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_count, 0, 3962 |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_pct, 0, 0.000 |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_count, 0, 3962 |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_pct, 0, 0.000 |
|
|
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_EMPTY_count, 0, 7249063380 |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_EMPTY_total_count, 0, 7249063380 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_EMPTY_count, 0, 3785073 |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_EMPTY_total_count, 0, 3785073 |
|
|
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_IN_USE_count, 0, 13378461714 |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_IN_USE_total_count, 0, 13378461714 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_IN_USE_count, 0, 65017104 |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_IN_USE_total_count, 0, 65017104 |
|
|
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_SPEC_RELEASE_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_SPEC_RELEASE_total_count, 0, 23492976993 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_SPEC_RELEASE_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_SPEC_RELEASE_total_count, 0, 194072983 |
|
|
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_NONSPEC_RELEASE_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_NONSPEC_RELEASE_total_count, 0, 23492976993 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_NONSPEC_RELEASE_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_NONSPEC_RELEASE_total_count, 0, 194072983 |
|
|
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_TOTAL_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_TOTAL_total_count, 0, 23492976993 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_TOTAL_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_TOTAL_total_count, 0, 194072983 |
|
|
| MAP_STAGE_ONPATH_INT_REG_NUM_NONBRANCH_count, 0, 127274249 |
| MAP_STAGE_ONPATH_INT_REG_NUM_NONBRANCH_total_count, 0, 127274249 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONBRANCH_count, 0, 71601 |
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONBRANCH_total_count, 0, 71601 |
|
|
| MAP_STAGE_ONPATH_INT_REG_NUM_NONEXCEPT_count, 0, 127274249 |
| MAP_STAGE_ONPATH_INT_REG_NUM_NONEXCEPT_total_count, 0, 127274249 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONEXCEPT_count, 0, 71601 |
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONEXCEPT_total_count, 0, 71601 |
|
|
| MAP_STAGE_ONPATH_INT_REG_NUM_ATOMIC_count, 0, 127274249 |
| MAP_STAGE_ONPATH_INT_REG_NUM_ATOMIC_total_count, 0, 127274249 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_NUM_ATOMIC_count, 0, 71601 |
| MAP_STAGE_ONPATH_VEC_REG_NUM_ATOMIC_total_count, 0, 71601 |
|
|
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_pct, 0, 184.585 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_pct, 0, 184.585 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_pct, 0, 2710.479 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_pct, 0, 2710.479 |
|
|
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_count, 0, 13378461714 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_pct, 0, 105.115 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_count, 0, 13378461714 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_pct, 0, 105.115 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_count, 0, 65017104 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_pct, 0, 908.047 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_count, 0, 65017104 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_pct, 0, 908.047 |
|
|
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_pct, 0, 184.585 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_total_count, 0, 23492976993 |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_total_pct, 0, 184.585 |
|
|
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_pct, 0, 2710.479 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_total_count, 0, 194072983 |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_total_pct, 0, 2710.479 |
|
|
| EXEC_STAGE_STARVED_count, 414, 45688781 |
| EXEC_STAGE_STARVED_total_count, 414, 45688781 |
|
|
| EXEC_STAGE_NOT_STARVED_count, 414, 70134411 |
| EXEC_STAGE_NOT_STARVED_total_count, 414, 70134411 |
|
|
| EXEC_STAGE_OFF_PATH_count, 414, 596488 |
| EXEC_STAGE_OFF_PATH_total_count, 414, 596488 |
|
|
| FU_BUSY_0_count, 0, 21912803 |
| FU_BUSY_0_total_count, 0, 21912803 |
|
|
| FU_BUSY_1_count, 0, 19000261 |
| FU_BUSY_1_total_count, 0, 19000261 |
|
|
| FU_BUSY_2_count, 0, 10039270 |
| FU_BUSY_2_total_count, 0, 10039270 |
|
|
| FU_BUSY_3_count, 0, 10040201 |
| FU_BUSY_3_total_count, 0, 10040201 |
|
|
| FU_BUSY_4_count, 0, 17909269 |
| FU_BUSY_4_total_count, 0, 17909269 |
|
|
| FU_BUSY_5_count, 0, 23313766 |
| FU_BUSY_5_total_count, 0, 23313766 |
|
|
| FU_BUSY_6_count, 0, 76910168 |
| FU_BUSY_6_total_count, 0, 76910168 |
|
|
| FU_BUSY_7_count, 0, 76908062 |
| FU_BUSY_7_total_count, 0, 76908062 |
|
|
| FU_BUSY_8_count, 0, 19058883 |
| FU_BUSY_8_total_count, 0, 19058883 |
|
|
| FU_BUSY_9_count, 0, 10040922 |
| FU_BUSY_9_total_count, 0, 10040922 |
|
|
| FU_BUSY_10_count, 0, 0 |
| FU_BUSY_10_total_count, 0, 0 |
|
|
| FU_BUSY_11_count, 0, 0 |
| FU_BUSY_11_total_count, 0, 0 |
|
|
| FU_BUSY_12_count, 0, 0 |
| FU_BUSY_12_total_count, 0, 0 |
|
|
| FU_BUSY_13_count, 0, 0 |
| FU_BUSY_13_total_count, 0, 0 |
|
|
| FU_BUSY_14_count, 0, 0 |
| FU_BUSY_14_total_count, 0, 0 |
|
|
| FU_BUSY_15_count, 0, 0 |
| FU_BUSY_15_total_count, 0, 0 |
|
|
| FU_BUSY_16_count, 0, 0 |
| FU_BUSY_16_total_count, 0, 0 |
|
|
| FU_BUSY_17_count, 0, 0 |
| FU_BUSY_17_total_count, 0, 0 |
|
|
| FU_BUSY_18_count, 0, 0 |
| FU_BUSY_18_total_count, 0, 0 |
|
|
| FU_BUSY_19_count, 0, 0 |
| FU_BUSY_19_total_count, 0, 0 |
|
|
| FU_BUSY_20_count, 0, 0 |
| FU_BUSY_20_total_count, 0, 0 |
|
|
| FU_BUSY_21_count, 0, 0 |
| FU_BUSY_21_total_count, 0, 0 |
|
|
| FU_BUSY_22_count, 0, 0 |
| FU_BUSY_22_total_count, 0, 0 |
|
|
| FU_BUSY_23_count, 0, 0 |
| FU_BUSY_23_total_count, 0, 0 |
|
|
| FU_BUSY_24_count, 0, 0 |
| FU_BUSY_24_total_count, 0, 0 |
|
|
| FU_BUSY_25_count, 0, 0 |
| FU_BUSY_25_total_count, 0, 0 |
|
|
| FU_BUSY_26_count, 0, 0 |
| FU_BUSY_26_total_count, 0, 0 |
|
|
| FU_BUSY_27_count, 0, 0 |
| FU_BUSY_27_total_count, 0, 0 |
|
|
| FU_BUSY_28_count, 0, 0 |
| FU_BUSY_28_total_count, 0, 0 |
|
|
| FU_BUSY_29_count, 0, 0 |
| FU_BUSY_29_total_count, 0, 0 |
|
|
| FU_BUSY_30_count, 0, 0 |
| FU_BUSY_30_total_count, 0, 0 |
|
|
| FU_BUSY_31_count, 0, 0 |
| FU_BUSY_31_total_count, 0, 0 |
|
|
| FU_REJECTED_OP_INV_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_INV_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOP_NOT_SIMD_count, 415, 364 |
| FU_REJECTED_OP_NOP_NOT_SIMD_total_count, 415, 364 |
|
|
| FU_REJECTED_OP_CF_NOT_SIMD_count, 415, 7263 |
| FU_REJECTED_OP_CF_NOT_SIMD_total_count, 415, 7263 |
|
|
| FU_REJECTED_OP_MOV_NOT_SIMD_count, 415, 2125 |
| FU_REJECTED_OP_MOV_NOT_SIMD_total_count, 415, 2125 |
|
|
| FU_REJECTED_OP_CMOV_NOT_SIMD_count, 415, 12 |
| FU_REJECTED_OP_CMOV_NOT_SIMD_total_count, 415, 12 |
|
|
| FU_REJECTED_OP_LDA_NOT_SIMD_count, 415, 208 |
| FU_REJECTED_OP_LDA_NOT_SIMD_total_count, 415, 208 |
|
|
| FU_REJECTED_OP_IMEM_NOT_SIMD_count, 415, 606839 |
| FU_REJECTED_OP_IMEM_NOT_SIMD_total_count, 415, 606839 |
|
|
| FU_REJECTED_OP_IADD_NOT_SIMD_count, 415, 75558643 |
| FU_REJECTED_OP_IADD_NOT_SIMD_total_count, 415, 75558643 |
|
|
| FU_REJECTED_OP_IMUL_NOT_SIMD_count, 415, 6976 |
| FU_REJECTED_OP_IMUL_NOT_SIMD_total_count, 415, 6976 |
|
|
| FU_REJECTED_OP_IDIV_NOT_SIMD_count, 415, 47 |
| FU_REJECTED_OP_IDIV_NOT_SIMD_total_count, 415, 47 |
|
|
| FU_REJECTED_OP_ICMP_NOT_SIMD_count, 415, 22 |
| FU_REJECTED_OP_ICMP_NOT_SIMD_total_count, 415, 22 |
|
|
| FU_REJECTED_OP_LOGIC_NOT_SIMD_count, 415, 1245 |
| FU_REJECTED_OP_LOGIC_NOT_SIMD_total_count, 415, 1245 |
|
|
| FU_REJECTED_OP_SHIFT_NOT_SIMD_count, 415, 694 |
| FU_REJECTED_OP_SHIFT_NOT_SIMD_total_count, 415, 694 |
|
|
| FU_REJECTED_OP_FMEM_NOT_SIMD_count, 415, 1595 |
| FU_REJECTED_OP_FMEM_NOT_SIMD_total_count, 415, 1595 |
|
|
| FU_REJECTED_OP_FCVT_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FCVT_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FADD_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FADD_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FMUL_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FMUL_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FMA_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FMA_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FDIV_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FDIV_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FCMP_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FCMP_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FCMOV_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FCMOV_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_GATHER_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_GATHER_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_SCATTER_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_SCATTER_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_PIPELINED_FAST_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_PIPELINED_FAST_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_PIPELINED_MEDIUM_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_PIPELINED_MEDIUM_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_PIPELINED_SLOW_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_PIPELINED_SLOW_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOTPIPELINED_SLOW_NOT_SIMD_count, 415, 0 |
| FU_REJECTED_OP_NOTPIPELINED_SLOW_NOT_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_NOT_SIMD_count, 415, 101 |
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_NOT_SIMD_total_count, 415, 101 |
|
|
| FU_REJECTED_OP_INV_SIMD_count, 415, 0 |
| FU_REJECTED_OP_INV_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOP_SIMD_count, 415, 0 |
| FU_REJECTED_OP_NOP_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_CF_SIMD_count, 415, 0 |
| FU_REJECTED_OP_CF_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_MOV_SIMD_count, 415, 8 |
| FU_REJECTED_OP_MOV_SIMD_total_count, 415, 8 |
|
|
| FU_REJECTED_OP_CMOV_SIMD_count, 415, 0 |
| FU_REJECTED_OP_CMOV_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_LDA_SIMD_count, 415, 0 |
| FU_REJECTED_OP_LDA_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_IMEM_SIMD_count, 415, 0 |
| FU_REJECTED_OP_IMEM_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_IADD_SIMD_count, 415, 0 |
| FU_REJECTED_OP_IADD_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_IMUL_SIMD_count, 415, 4 |
| FU_REJECTED_OP_IMUL_SIMD_total_count, 415, 4 |
|
|
| FU_REJECTED_OP_IDIV_SIMD_count, 415, 0 |
| FU_REJECTED_OP_IDIV_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_ICMP_SIMD_count, 415, 0 |
| FU_REJECTED_OP_ICMP_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_LOGIC_SIMD_count, 415, 23 |
| FU_REJECTED_OP_LOGIC_SIMD_total_count, 415, 23 |
|
|
| FU_REJECTED_OP_SHIFT_SIMD_count, 415, 8 |
| FU_REJECTED_OP_SHIFT_SIMD_total_count, 415, 8 |
|
|
| FU_REJECTED_OP_FMEM_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FMEM_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FCVT_SIMD_count, 415, 19653 |
| FU_REJECTED_OP_FCVT_SIMD_total_count, 415, 19653 |
|
|
| FU_REJECTED_OP_FADD_SIMD_count, 415, 51840265 |
| FU_REJECTED_OP_FADD_SIMD_total_count, 415, 51840265 |
|
|
| FU_REJECTED_OP_FMUL_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FMUL_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FMA_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FMA_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FDIV_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FDIV_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FCMP_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FCMP_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_FCMOV_SIMD_count, 415, 0 |
| FU_REJECTED_OP_FCMOV_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_GATHER_SIMD_count, 415, 0 |
| FU_REJECTED_OP_GATHER_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_SCATTER_SIMD_count, 415, 0 |
| FU_REJECTED_OP_SCATTER_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_PIPELINED_FAST_SIMD_count, 415, 0 |
| FU_REJECTED_OP_PIPELINED_FAST_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_PIPELINED_MEDIUM_SIMD_count, 415, 0 |
| FU_REJECTED_OP_PIPELINED_MEDIUM_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_PIPELINED_SLOW_SIMD_count, 415, 252 |
| FU_REJECTED_OP_PIPELINED_SLOW_SIMD_total_count, 415, 252 |
|
|
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_SIMD_count, 415, 0 |
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOTPIPELINED_SLOW_SIMD_count, 415, 0 |
| FU_REJECTED_OP_NOTPIPELINED_SLOW_SIMD_total_count, 415, 0 |
|
|
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_SIMD_count, 415, 0 |
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_SIMD_total_count, 415, 0 |
|
|
| LSQ_FULL_TOTAL_count, 0, 26299391 |
| LSQ_FULL_TOTAL_total_count, 0, 26299391 |
|
|
| LSQ_FULL_LOAD_QUEUE_count, 0, 19 |
| LSQ_FULL_LOAD_QUEUE_total_count, 0, 19 |
|
|
| LSQ_FULL_STORE_QUEUE_count, 0, 26299372 |
| LSQ_FULL_STORE_QUEUE_total_count, 0, 26299372 |
|
|
| OP_WAIT_0_count, 0, 110998006 |
| OP_WAIT_0_total_count, 0, 110998006 |
|
|
| OP_WAIT_1_count, 0, 21528717 |
| OP_WAIT_1_total_count, 0, 21528717 |
|
|
| OP_WAIT_2_count, 0, 4699485 |
| OP_WAIT_2_total_count, 0, 4699485 |
|
|
| OP_WAIT_3_count, 0, 3296629 |
| OP_WAIT_3_total_count, 0, 3296629 |
|
|
| OP_WAIT_4_count, 0, 1857460 |
| OP_WAIT_4_total_count, 0, 1857460 |
|
|
| OP_WAIT_5_count, 0, 794484 |
| OP_WAIT_5_total_count, 0, 794484 |
|
|
| OP_WAIT_6_count, 0, 318599 |
| OP_WAIT_6_total_count, 0, 318599 |
|
|
| OP_WAIT_7_count, 0, 113519 |
| OP_WAIT_7_total_count, 0, 113519 |
|
|
| OP_WAIT_8_count, 0, 163249 |
| OP_WAIT_8_total_count, 0, 163249 |
|
|
| OP_WAIT_9_count, 0, 157966 |
| OP_WAIT_9_total_count, 0, 157966 |
|
|
| OP_WAIT_10_count, 0, 245037 |
| OP_WAIT_10_total_count, 0, 245037 |
|
|
| OP_WAIT_11_count, 0, 80974 |
| OP_WAIT_11_total_count, 0, 80974 |
|
|
| OP_WAIT_12_count, 0, 716559 |
| OP_WAIT_12_total_count, 0, 716559 |
|
|
| OP_WAIT_13_count, 0, 131927 |
| OP_WAIT_13_total_count, 0, 131927 |
|
|
| OP_WAIT_14_count, 0, 1115354 |
| OP_WAIT_14_total_count, 0, 1115354 |
|
|
| OP_WAIT_15_count, 0, 570510 |
| OP_WAIT_15_total_count, 0, 570510 |
|
|
| OP_WAIT_16_count, 0, 287979 |
| OP_WAIT_16_total_count, 0, 287979 |
|
|
| OP_WAIT_17_count, 0, 148968 |
| OP_WAIT_17_total_count, 0, 148968 |
|
|
| OP_WAIT_18_count, 0, 38580 |
| OP_WAIT_18_total_count, 0, 38580 |
|
|
| OP_WAIT_19_count, 0, 26981 |
| OP_WAIT_19_total_count, 0, 26981 |
|
|
| OP_WAIT_20_count, 0, 18334 |
| OP_WAIT_20_total_count, 0, 18334 |
|
|
| OP_WAIT_21_count, 0, 23197 |
| OP_WAIT_21_total_count, 0, 23197 |
|
|
| OP_WAIT_22_count, 0, 19236 |
| OP_WAIT_22_total_count, 0, 19236 |
|
|
| OP_WAIT_23_count, 0, 18722 |
| OP_WAIT_23_total_count, 0, 18722 |
|
|
| OP_WAIT_24_count, 0, 18996 |
| OP_WAIT_24_total_count, 0, 18996 |
|
|
| OP_WAIT_25_count, 0, 16979 |
| OP_WAIT_25_total_count, 0, 16979 |
|
|
| OP_WAIT_26_count, 0, 16834 |
| OP_WAIT_26_total_count, 0, 16834 |
|
|
| OP_WAIT_27_count, 0, 15871 |
| OP_WAIT_27_total_count, 0, 15871 |
|
|
| OP_WAIT_28_count, 0, 26663 |
| OP_WAIT_28_total_count, 0, 26663 |
|
|
| OP_WAIT_29_count, 0, 21577 |
| OP_WAIT_29_total_count, 0, 21577 |
|
|
| OP_WAIT_30_count, 0, 50886 |
| OP_WAIT_30_total_count, 0, 50886 |
|
|
| OP_WAIT_31_count, 0, 3990352 |
| OP_WAIT_31_total_count, 0, 3990352 |
|
|
| ROW_SIZE_0_count, 0, 92495544 |
| ROW_SIZE_0_total_count, 0, 92495544 |
|
|
| ROW_SIZE_1_count, 0, 2518551 |
| ROW_SIZE_1_total_count, 0, 2518551 |
|
|
| ROW_SIZE_2_count, 0, 1930368 |
| ROW_SIZE_2_total_count, 0, 1930368 |
|
|
| ROW_SIZE_3_count, 0, 191898 |
| ROW_SIZE_3_total_count, 0, 191898 |
|
|
| ROW_SIZE_4_count, 0, 794032 |
| ROW_SIZE_4_total_count, 0, 794032 |
|
|
| ROW_SIZE_5_count, 0, 124184 |
| ROW_SIZE_5_total_count, 0, 124184 |
|
|
| ROW_SIZE_6_count, 0, 841562 |
| ROW_SIZE_6_total_count, 0, 841562 |
|
|
| ROW_SIZE_7_count, 0, 211091 |
| ROW_SIZE_7_total_count, 0, 211091 |
|
|
| ROW_SIZE_8_count, 0, 16781199 |
| ROW_SIZE_8_total_count, 0, 16781199 |
|
|
| ROW_SIZE_9_count, 0, 0 |
| ROW_SIZE_9_total_count, 0, 0 |
|
|
| ROW_SIZE_10_count, 0, 0 |
| ROW_SIZE_10_total_count, 0, 0 |
|
|
| ROW_SIZE_11_count, 0, 0 |
| ROW_SIZE_11_total_count, 0, 0 |
|
|
| ROW_SIZE_12_count, 0, 0 |
| ROW_SIZE_12_total_count, 0, 0 |
|
|
| ROW_SIZE_13_count, 0, 0 |
| ROW_SIZE_13_total_count, 0, 0 |
|
|
| ROW_SIZE_14_count, 0, 0 |
| ROW_SIZE_14_total_count, 0, 0 |
|
|
| ROW_SIZE_15_count, 0, 0 |
| ROW_SIZE_15_total_count, 0, 0 |
|
|
| ROW_SIZE_16_count, 0, 0 |
| ROW_SIZE_16_total_count, 0, 0 |
|
|
| ROW_SIZE_17_count, 0, 0 |
| ROW_SIZE_17_total_count, 0, 0 |
|
|
| ROW_SIZE_18_count, 0, 0 |
| ROW_SIZE_18_total_count, 0, 0 |
|
|
| ROW_SIZE_19_count, 0, 0 |
| ROW_SIZE_19_total_count, 0, 0 |
|
|
| ROW_SIZE_20_count, 0, 0 |
| ROW_SIZE_20_total_count, 0, 0 |
|
|
| ROW_SIZE_21_count, 0, 0 |
| ROW_SIZE_21_total_count, 0, 0 |
|
|
| ROW_SIZE_22_count, 0, 0 |
| ROW_SIZE_22_total_count, 0, 0 |
|
|
| ROW_SIZE_23_count, 0, 0 |
| ROW_SIZE_23_total_count, 0, 0 |
|
|
| ROW_SIZE_24_count, 0, 0 |
| ROW_SIZE_24_total_count, 0, 0 |
|
|
| ROW_SIZE_25_count, 0, 0 |
| ROW_SIZE_25_total_count, 0, 0 |
|
|
| ROW_SIZE_26_count, 0, 0 |
| ROW_SIZE_26_total_count, 0, 0 |
|
|
| ROW_SIZE_27_count, 0, 0 |
| ROW_SIZE_27_total_count, 0, 0 |
|
|
| ROW_SIZE_28_count, 0, 0 |
| ROW_SIZE_28_total_count, 0, 0 |
|
|
| ROW_SIZE_29_count, 0, 0 |
| ROW_SIZE_29_total_count, 0, 0 |
|
|
| ROW_SIZE_30_count, 0, 0 |
| ROW_SIZE_30_total_count, 0, 0 |
|
|
| ROW_SIZE_31_count, 0, 0 |
| ROW_SIZE_31_total_count, 0, 0 |
|
|
| RET_OP_EXEC_COUNT_0_count, 416, 0 |
| RET_OP_EXEC_COUNT_0_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_1_count, 416, 151528630 |
| RET_OP_EXEC_COUNT_1_total_count, 416, 151528630 |
|
|
| RET_OP_EXEC_COUNT_2_count, 416, 0 |
| RET_OP_EXEC_COUNT_2_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_3_count, 416, 0 |
| RET_OP_EXEC_COUNT_3_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_4_count, 416, 0 |
| RET_OP_EXEC_COUNT_4_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_5_count, 416, 0 |
| RET_OP_EXEC_COUNT_5_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_6_count, 416, 0 |
| RET_OP_EXEC_COUNT_6_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_7_count, 416, 0 |
| RET_OP_EXEC_COUNT_7_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_8_count, 416, 0 |
| RET_OP_EXEC_COUNT_8_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_9_count, 416, 0 |
| RET_OP_EXEC_COUNT_9_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_10_count, 416, 0 |
| RET_OP_EXEC_COUNT_10_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_11_count, 416, 0 |
| RET_OP_EXEC_COUNT_11_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_12_count, 416, 0 |
| RET_OP_EXEC_COUNT_12_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_13_count, 416, 0 |
| RET_OP_EXEC_COUNT_13_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_14_count, 416, 0 |
| RET_OP_EXEC_COUNT_14_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_15_count, 416, 0 |
| RET_OP_EXEC_COUNT_15_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_16_count, 416, 0 |
| RET_OP_EXEC_COUNT_16_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_17_count, 416, 0 |
| RET_OP_EXEC_COUNT_17_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_18_count, 416, 0 |
| RET_OP_EXEC_COUNT_18_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_19_count, 416, 0 |
| RET_OP_EXEC_COUNT_19_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_20_count, 416, 0 |
| RET_OP_EXEC_COUNT_20_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_21_count, 416, 0 |
| RET_OP_EXEC_COUNT_21_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_22_count, 416, 0 |
| RET_OP_EXEC_COUNT_22_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_23_count, 416, 0 |
| RET_OP_EXEC_COUNT_23_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_24_count, 416, 0 |
| RET_OP_EXEC_COUNT_24_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_25_count, 416, 0 |
| RET_OP_EXEC_COUNT_25_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_26_count, 416, 0 |
| RET_OP_EXEC_COUNT_26_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_27_count, 416, 0 |
| RET_OP_EXEC_COUNT_27_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_28_count, 416, 0 |
| RET_OP_EXEC_COUNT_28_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_29_count, 416, 0 |
| RET_OP_EXEC_COUNT_29_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_30_count, 416, 0 |
| RET_OP_EXEC_COUNT_30_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_31_count, 416, 0 |
| RET_OP_EXEC_COUNT_31_total_count, 416, 0 |
|
|
| RET_OP_EXEC_COUNT_32_count, 416, 0 |
| RET_OP_EXEC_COUNT_32_total_count, 416, 0 |
|
|
| RET_STALL_LENGTH_0_count, 417, 151402146 |
| RET_STALL_LENGTH_0_total_count, 417, 151402146 |
|
|
| RET_STALL_LENGTH_100_count, 417, 6584 |
| RET_STALL_LENGTH_100_total_count, 417, 6584 |
|
|
| RET_STALL_LENGTH_200_count, 417, 7500 |
| RET_STALL_LENGTH_200_total_count, 417, 7500 |
|
|
| RET_STALL_LENGTH_300_count, 417, 15301 |
| RET_STALL_LENGTH_300_total_count, 417, 15301 |
|
|
| RET_STALL_LENGTH_400_count, 417, 51190 |
| RET_STALL_LENGTH_400_total_count, 417, 51190 |
|
|
| RET_STALL_LENGTH_500_count, 417, 31122 |
| RET_STALL_LENGTH_500_total_count, 417, 31122 |
|
|
| RET_STALL_LENGTH_600_count, 417, 5300 |
| RET_STALL_LENGTH_600_total_count, 417, 5300 |
|
|
| RET_STALL_LENGTH_700_count, 417, 3997 |
| RET_STALL_LENGTH_700_total_count, 417, 3997 |
|
|
| RET_STALL_LENGTH_800_count, 417, 711 |
| RET_STALL_LENGTH_800_total_count, 417, 711 |
|
|
| RET_STALL_LENGTH_900_count, 417, 367 |
| RET_STALL_LENGTH_900_total_count, 417, 367 |
|
|
| RET_STALL_LENGTH_1000_count, 417, 103 |
| RET_STALL_LENGTH_1000_total_count, 417, 103 |
|
|
| RET_STALL_LENGTH_1100_count, 417, 174 |
| RET_STALL_LENGTH_1100_total_count, 417, 174 |
|
|
| RET_STALL_LENGTH_1200_count, 417, 1412 |
| RET_STALL_LENGTH_1200_total_count, 417, 1412 |
|
|
| RET_STALL_LENGTH_1300_count, 417, 289 |
| RET_STALL_LENGTH_1300_total_count, 417, 289 |
|
|
| RET_STALL_LENGTH_1400_count, 417, 94 |
| RET_STALL_LENGTH_1400_total_count, 417, 94 |
|
|
| RET_STALL_LENGTH_1500_count, 417, 253 |
| RET_STALL_LENGTH_1500_total_count, 417, 253 |
|
|
| RET_STALL_LENGTH_1600_count, 417, 580 |
| RET_STALL_LENGTH_1600_total_count, 417, 580 |
|
|
| RET_STALL_LENGTH_1700_count, 417, 1027 |
| RET_STALL_LENGTH_1700_total_count, 417, 1027 |
|
|
| RET_STALL_LENGTH_1800_count, 417, 316 |
| RET_STALL_LENGTH_1800_total_count, 417, 316 |
|
|
| RET_STALL_LENGTH_1900_count, 417, 90 |
| RET_STALL_LENGTH_1900_total_count, 417, 90 |
|
|
| RET_STALL_LENGTH_2000_count, 417, 62 |
| RET_STALL_LENGTH_2000_total_count, 417, 62 |
|
|
| RET_STALL_LENGTH_2100_count, 417, 7 |
| RET_STALL_LENGTH_2100_total_count, 417, 7 |
|
|
| RET_STALL_LENGTH_2200_count, 417, 4 |
| RET_STALL_LENGTH_2200_total_count, 417, 4 |
|
|
| RET_STALL_LENGTH_2300_count, 417, 0 |
| RET_STALL_LENGTH_2300_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_2400_count, 417, 0 |
| RET_STALL_LENGTH_2400_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_2500_count, 417, 0 |
| RET_STALL_LENGTH_2500_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_2600_count, 417, 0 |
| RET_STALL_LENGTH_2600_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_2700_count, 417, 0 |
| RET_STALL_LENGTH_2700_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_2800_count, 417, 0 |
| RET_STALL_LENGTH_2800_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_2900_count, 417, 0 |
| RET_STALL_LENGTH_2900_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3000_count, 417, 0 |
| RET_STALL_LENGTH_3000_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3100_count, 417, 0 |
| RET_STALL_LENGTH_3100_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3200_count, 417, 0 |
| RET_STALL_LENGTH_3200_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3300_count, 417, 0 |
| RET_STALL_LENGTH_3300_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3400_count, 417, 0 |
| RET_STALL_LENGTH_3400_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3500_count, 417, 1 |
| RET_STALL_LENGTH_3500_total_count, 417, 1 |
|
|
| RET_STALL_LENGTH_3600_count, 417, 0 |
| RET_STALL_LENGTH_3600_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3700_count, 417, 0 |
| RET_STALL_LENGTH_3700_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3800_count, 417, 0 |
| RET_STALL_LENGTH_3800_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_3900_count, 417, 0 |
| RET_STALL_LENGTH_3900_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4000_count, 417, 0 |
| RET_STALL_LENGTH_4000_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4100_count, 417, 0 |
| RET_STALL_LENGTH_4100_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4200_count, 417, 0 |
| RET_STALL_LENGTH_4200_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4300_count, 417, 0 |
| RET_STALL_LENGTH_4300_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4400_count, 417, 0 |
| RET_STALL_LENGTH_4400_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4500_count, 417, 0 |
| RET_STALL_LENGTH_4500_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4600_count, 417, 0 |
| RET_STALL_LENGTH_4600_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4700_count, 417, 0 |
| RET_STALL_LENGTH_4700_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4800_count, 417, 0 |
| RET_STALL_LENGTH_4800_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_4900_count, 417, 0 |
| RET_STALL_LENGTH_4900_total_count, 417, 0 |
|
|
| RET_STALL_LENGTH_5000_count, 417, 0 |
| RET_STALL_LENGTH_5000_total_count, 417, 0 |
|
|
| MEM_BLOCK_LENGTH_0_count, 418, 68282 |
| MEM_BLOCK_LENGTH_0_total_count, 418, 68282 |
|
|
| MEM_BLOCK_LENGTH_100_count, 418, 3595 |
| MEM_BLOCK_LENGTH_100_total_count, 418, 3595 |
|
|
| MEM_BLOCK_LENGTH_200_count, 418, 7921 |
| MEM_BLOCK_LENGTH_200_total_count, 418, 7921 |
|
|
| MEM_BLOCK_LENGTH_300_count, 418, 308 |
| MEM_BLOCK_LENGTH_300_total_count, 418, 308 |
|
|
| MEM_BLOCK_LENGTH_400_count, 418, 5981 |
| MEM_BLOCK_LENGTH_400_total_count, 418, 5981 |
|
|
| MEM_BLOCK_LENGTH_500_count, 418, 11714 |
| MEM_BLOCK_LENGTH_500_total_count, 418, 11714 |
|
|
| MEM_BLOCK_LENGTH_600_count, 418, 8839 |
| MEM_BLOCK_LENGTH_600_total_count, 418, 8839 |
|
|
| MEM_BLOCK_LENGTH_700_count, 418, 8081 |
| MEM_BLOCK_LENGTH_700_total_count, 418, 8081 |
|
|
| MEM_BLOCK_LENGTH_800_count, 418, 7566 |
| MEM_BLOCK_LENGTH_800_total_count, 418, 7566 |
|
|
| MEM_BLOCK_LENGTH_900_count, 418, 3022 |
| MEM_BLOCK_LENGTH_900_total_count, 418, 3022 |
|
|
| MEM_BLOCK_LENGTH_1000_count, 418, 650 |
| MEM_BLOCK_LENGTH_1000_total_count, 418, 650 |
|
|
| MEM_BLOCK_LENGTH_1100_count, 418, 266 |
| MEM_BLOCK_LENGTH_1100_total_count, 418, 266 |
|
|
| MEM_BLOCK_LENGTH_1200_count, 418, 570 |
| MEM_BLOCK_LENGTH_1200_total_count, 418, 570 |
|
|
| MEM_BLOCK_LENGTH_1300_count, 418, 1573 |
| MEM_BLOCK_LENGTH_1300_total_count, 418, 1573 |
|
|
| MEM_BLOCK_LENGTH_1400_count, 418, 1707 |
| MEM_BLOCK_LENGTH_1400_total_count, 418, 1707 |
|
|
| MEM_BLOCK_LENGTH_1500_count, 418, 1874 |
| MEM_BLOCK_LENGTH_1500_total_count, 418, 1874 |
|
|
| MEM_BLOCK_LENGTH_1600_count, 418, 1174 |
| MEM_BLOCK_LENGTH_1600_total_count, 418, 1174 |
|
|
| MEM_BLOCK_LENGTH_1700_count, 418, 793 |
| MEM_BLOCK_LENGTH_1700_total_count, 418, 793 |
|
|
| MEM_BLOCK_LENGTH_1800_count, 418, 417 |
| MEM_BLOCK_LENGTH_1800_total_count, 418, 417 |
|
|
| MEM_BLOCK_LENGTH_1900_count, 418, 409 |
| MEM_BLOCK_LENGTH_1900_total_count, 418, 409 |
|
|
| MEM_BLOCK_LENGTH_2000_count, 418, 590 |
| MEM_BLOCK_LENGTH_2000_total_count, 418, 590 |
|
|
| MEM_BLOCK_LENGTH_2100_count, 418, 533 |
| MEM_BLOCK_LENGTH_2100_total_count, 418, 533 |
|
|
| MEM_BLOCK_LENGTH_2200_count, 418, 383 |
| MEM_BLOCK_LENGTH_2200_total_count, 418, 383 |
|
|
| MEM_BLOCK_LENGTH_2300_count, 418, 334 |
| MEM_BLOCK_LENGTH_2300_total_count, 418, 334 |
|
|
| MEM_BLOCK_LENGTH_2400_count, 418, 337 |
| MEM_BLOCK_LENGTH_2400_total_count, 418, 337 |
|
|
| MEM_BLOCK_LENGTH_2500_count, 418, 233 |
| MEM_BLOCK_LENGTH_2500_total_count, 418, 233 |
|
|
| MEM_BLOCK_LENGTH_2600_count, 418, 174 |
| MEM_BLOCK_LENGTH_2600_total_count, 418, 174 |
|
|
| MEM_BLOCK_LENGTH_2700_count, 418, 175 |
| MEM_BLOCK_LENGTH_2700_total_count, 418, 175 |
|
|
| MEM_BLOCK_LENGTH_2800_count, 418, 180 |
| MEM_BLOCK_LENGTH_2800_total_count, 418, 180 |
|
|
| MEM_BLOCK_LENGTH_2900_count, 418, 204 |
| MEM_BLOCK_LENGTH_2900_total_count, 418, 204 |
|
|
| MEM_BLOCK_LENGTH_3000_count, 418, 183 |
| MEM_BLOCK_LENGTH_3000_total_count, 418, 183 |
|
|
| MEM_BLOCK_LENGTH_3100_count, 418, 180 |
| MEM_BLOCK_LENGTH_3100_total_count, 418, 180 |
|
|
| MEM_BLOCK_LENGTH_3200_count, 418, 212 |
| MEM_BLOCK_LENGTH_3200_total_count, 418, 212 |
|
|
| MEM_BLOCK_LENGTH_3300_count, 418, 140 |
| MEM_BLOCK_LENGTH_3300_total_count, 418, 140 |
|
|
| MEM_BLOCK_LENGTH_3400_count, 418, 127 |
| MEM_BLOCK_LENGTH_3400_total_count, 418, 127 |
|
|
| MEM_BLOCK_LENGTH_3500_count, 418, 89 |
| MEM_BLOCK_LENGTH_3500_total_count, 418, 89 |
|
|
| MEM_BLOCK_LENGTH_3600_count, 418, 97 |
| MEM_BLOCK_LENGTH_3600_total_count, 418, 97 |
|
|
| MEM_BLOCK_LENGTH_3700_count, 418, 101 |
| MEM_BLOCK_LENGTH_3700_total_count, 418, 101 |
|
|
| MEM_BLOCK_LENGTH_3800_count, 418, 94 |
| MEM_BLOCK_LENGTH_3800_total_count, 418, 94 |
|
|
| MEM_BLOCK_LENGTH_3900_count, 418, 107 |
| MEM_BLOCK_LENGTH_3900_total_count, 418, 107 |
|
|
| MEM_BLOCK_LENGTH_4000_count, 418, 114 |
| MEM_BLOCK_LENGTH_4000_total_count, 418, 114 |
|
|
| MEM_BLOCK_LENGTH_4100_count, 418, 72 |
| MEM_BLOCK_LENGTH_4100_total_count, 418, 72 |
|
|
| MEM_BLOCK_LENGTH_4200_count, 418, 46 |
| MEM_BLOCK_LENGTH_4200_total_count, 418, 46 |
|
|
| MEM_BLOCK_LENGTH_4300_count, 418, 52 |
| MEM_BLOCK_LENGTH_4300_total_count, 418, 52 |
|
|
| MEM_BLOCK_LENGTH_4400_count, 418, 46 |
| MEM_BLOCK_LENGTH_4400_total_count, 418, 46 |
|
|
| MEM_BLOCK_LENGTH_4500_count, 418, 40 |
| MEM_BLOCK_LENGTH_4500_total_count, 418, 40 |
|
|
| MEM_BLOCK_LENGTH_4600_count, 418, 33 |
| MEM_BLOCK_LENGTH_4600_total_count, 418, 33 |
|
|
| MEM_BLOCK_LENGTH_4700_count, 418, 31 |
| MEM_BLOCK_LENGTH_4700_total_count, 418, 31 |
|
|
| MEM_BLOCK_LENGTH_4800_count, 418, 36 |
| MEM_BLOCK_LENGTH_4800_total_count, 418, 36 |
|
|
| MEM_BLOCK_LENGTH_4900_count, 418, 24 |
| MEM_BLOCK_LENGTH_4900_total_count, 418, 24 |
|
|
| MEM_BLOCK_LENGTH_5000_count, 418, 272 |
| MEM_BLOCK_LENGTH_5000_total_count, 418, 272 |
|
|
| FUS_BUSY_ON_PATH_count, 0, 283879047 |
| FUS_BUSY_ON_PATH_pct, 0, 2.438 |
| FUS_BUSY_ON_PATH_total_count, 0, 283879047 |
| FUS_BUSY_ON_PATH_total_pct, 0, 2.438 |
|
|
| FUS_BUSY_OFF_PATH_count, 0, 1254558 |
| FUS_BUSY_OFF_PATH_pct, 0, 0.011 |
| FUS_BUSY_OFF_PATH_total_count, 0, 1254558 |
| FUS_BUSY_OFF_PATH_total_pct, 0, 0.011 |
|
|
| FU_BUSY_MEM_STALL_count, 0, 132342522 |
| FU_BUSY_MEM_STALL_pct, 0, 1.137 |
| FU_BUSY_MEM_STALL_total_count, 0, 132342522 |
| FU_BUSY_MEM_STALL_total_pct, 0, 1.137 |
|
|
| FUS_EMPTY_count, 0, 879063195 |
| FUS_EMPTY_pct, 0, 7.551 |
| FUS_EMPTY_total_count, 0, 879063195 |
| FUS_EMPTY_total_pct, 0, 7.551 |
|
|
| FU_UNAVAILABLE_count, 0, 21172 |
| FU_UNAVAILABLE_pct, 0, 0.000 |
| FU_UNAVAILABLE_total_count, 0, 21172 |
| FU_UNAVAILABLE_total_pct, 0, 0.000 |
|
|
| FU_MEM_UNAVAILABLE_count, 0, 128025175 |
| FU_MEM_UNAVAILABLE_pct, 0, 1.100 |
| FU_MEM_UNAVAILABLE_total_count, 0, 128025175 |
| FU_MEM_UNAVAILABLE_total_pct, 0, 1.100 |
|
|
| FU_OTHER_UNAVAILABLE_count, 0, 0 |
| FU_OTHER_UNAVAILABLE_pct, 0, 0.000 |
| FU_OTHER_UNAVAILABLE_total_count, 0, 0 |
| FU_OTHER_UNAVAILABLE_total_pct, 0, 0.000 |
|
|
| FU_REPLAY_count, 0, 0 |
| FU_REPLAY_pct, 0, 0.000 |
| FU_REPLAY_total_count, 0, 0 |
| FU_REPLAY_total_pct, 0, 0.000 |
|
|
| FU_STARVED_count, 0, 878982385 |
| FU_STARVED_pct, 0, 7.550 |
| FU_STARVED_total_count, 0, 878982385 |
| FU_STARVED_total_pct, 0, 7.550 |
|
|
| CHIP_UTILIZATION_count, 0, 0 |
| CHIP_UTILIZATION_pct, 0, 0.000 |
| CHIP_UTILIZATION_total_count, 0, 0 |
| CHIP_UTILIZATION_total_pct, 0, 0.000 |
|
|
| CYCLES_UNDER_MEM_REQ_count, 0, 0 |
| CYCLES_UNDER_MEM_REQ_total_count, 0, 0 |
|
|
| CYCLES_UNDER_NO_MEM_REQ_count, 0, 0 |
| CYCLES_UNDER_NO_MEM_REQ_total_count, 0, 0 |
|
|
| CYCLES_UNDER_CRITICAL_MEM_REQ_count, 0, 0 |
| CYCLES_UNDER_CRITICAL_MEM_REQ_total_count, 0, 0 |
|
|
| CYCLES_UNDER_NONCRITICAL_MEM_REQ_count, 0, 0 |
| CYCLES_UNDER_NONCRITICAL_MEM_REQ_total_count, 0, 0 |
|
|
| CHIP_UTILIZATION_UNDER_MEM_REQ_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_MEM_REQ_pct, 0, -nan |
| CHIP_UTILIZATION_UNDER_MEM_REQ_total_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_MEM_REQ_total_pct, 0, -nan |
|
|
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_pct, 0, -nan |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_total_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_total_pct, 0, -nan |
|
|
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_pct, 0, -nan |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_total_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_total_pct, 0, -nan |
|
|
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_pct, 0, -nan |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_total_count, 0, 0 |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_total_pct, 0, -nan |
|
|
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_count, 0, 0 |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_pct, 0, 0.000 |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_total_count, 0, 0 |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_total_pct, 0, 0.000 |
|
|
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_count, 0, 0 |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_pct, 0, -nan |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_total_count, 0, 0 |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_total_pct, 0, -nan |
|
|
| CYCLES_WAITING_FOR_OFF_CHIP_count, 0, 0 |
| CYCLES_WAITING_FOR_OFF_CHIP_pct, 0, 0.000 |
| CYCLES_WAITING_FOR_OFF_CHIP_total_count, 0, 0 |
| CYCLES_WAITING_FOR_OFF_CHIP_total_pct, 0, 0.000 |
|
|
| FUS_BUSY_WAITING_FOR_OFF_CHIP_count, 0, 0 |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_pct, 0, -nan |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_total_count, 0, 0 |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_total_pct, 0, -nan |
|
|
| TOTAL_OFF_CHIP_DELAYS_LEFT_count, 0, 0 |
| TOTAL_OFF_CHIP_DELAYS_LEFT_total_count, 0, 0 |
|
|
| WRONG_IO_SCHED_count, 0, 0 |
| WRONG_IO_SCHED_total_count, 0, 0 |
|
|
| DVFS_CONFIG_SWITCH_count, 0, 0 |
| DVFS_CONFIG_SWITCH_total_count, 0, 0 |
|
|
| MAP_STAGE_RECEIVED_OPS_0_count, 419, 0 |
| MAP_STAGE_RECEIVED_OPS_0_total_count, 419, 0 |
|
|
| MAP_STAGE_RECEIVED_OPS_1_count, 419, 37841 |
| MAP_STAGE_RECEIVED_OPS_1_total_count, 419, 37841 |
|
|
| MAP_STAGE_RECEIVED_OPS_2_count, 419, 53121 |
| MAP_STAGE_RECEIVED_OPS_2_total_count, 419, 53121 |
|
|
| MAP_STAGE_RECEIVED_OPS_3_count, 419, 64115 |
| MAP_STAGE_RECEIVED_OPS_3_total_count, 419, 64115 |
|
|
| MAP_STAGE_RECEIVED_OPS_4_count, 419, 87482 |
| MAP_STAGE_RECEIVED_OPS_4_total_count, 419, 87482 |
|
|
| MAP_STAGE_RECEIVED_OPS_5_count, 419, 50836 |
| MAP_STAGE_RECEIVED_OPS_5_total_count, 419, 50836 |
|
|
| MAP_STAGE_RECEIVED_OPS_6_count, 419, 25091776 |
| MAP_STAGE_RECEIVED_OPS_6_total_count, 419, 25091776 |
|
|
| MAP_STAGE_RECEIVED_OPS_7_count, 419, 0 |
| MAP_STAGE_RECEIVED_OPS_7_total_count, 419, 0 |
|
|
| MAP_STAGE_RECEIVED_OPS_8_count, 419, 0 |
| MAP_STAGE_RECEIVED_OPS_8_total_count, 419, 0 |
|
|
| MAP_STAGE_RECEIVED_OPS_MAX_count, 419, 0 |
| MAP_STAGE_RECEIVED_OPS_MAX_total_count, 419, 0 |
|
|
| MAP_STAGE_WAIT_FOR_DECODE_count, 420, 0 |
| MAP_STAGE_WAIT_FOR_DECODE_total_count, 420, 0 |
|
|
| MAP_STAGE_CONSUME_DECODE_count, 420, 0 |
| MAP_STAGE_CONSUME_DECODE_total_count, 420, 0 |
|
|
| MAP_STAGE_WAIT_FOR_DECODE2_count, 421, 0 |
| MAP_STAGE_WAIT_FOR_DECODE2_total_count, 421, 0 |
|
|
| MAP_STAGE_CONSUME_DECODE2_count, 421, 0 |
| MAP_STAGE_CONSUME_DECODE2_total_count, 421, 0 |
|
|
| FTQ_RECOVER_EXEC_count, 0, 19912 |
| FTQ_RECOVER_EXEC_total_count, 0, 19912 |
|
|
| FTQ_RECOVER_DECODE_count, 0, 2633 |
| FTQ_RECOVER_DECODE_total_count, 0, 2633 |
|
|
| FTQ_OFFPATH_CYCLES_count, 0, 3477271 |
| FTQ_OFFPATH_CYCLES_total_count, 0, 3477271 |
|
|
| FTQ_CYCLES_OFFPATH_count, 0, 3477271 |
| FTQ_CYCLES_OFFPATH_total_count, 0, 3477271 |
|
|
| FTQ_CYCLES_ONPATH_count, 0, 112942409 |
| FTQ_CYCLES_ONPATH_total_count, 0, 112942409 |
|
|
| FTQ_FETCHED_INS_ONPATH_count, 0, 151529390 |
| FTQ_FETCHED_INS_ONPATH_total_count, 0, 151529390 |
|
|
| FTQ_FETCHED_INS_OFFPATH_count, 0, 21056748 |
| FTQ_FETCHED_INS_OFFPATH_total_count, 0, 21056748 |
|
|
| FTQ_BREAK_FULL_FT_ONPATH_count, 0, 111955852 |
| FTQ_BREAK_FULL_FT_ONPATH_total_count, 0, 111955852 |
|
|
| FTQ_BREAK_FULL_FT_OFFPATH_count, 0, 1519493 |
| FTQ_BREAK_FULL_FT_OFFPATH_total_count, 0, 1519493 |
|
|
| FTQ_BREAK_PRED_BR_ONPATH_count, 0, 0 |
| FTQ_BREAK_PRED_BR_ONPATH_total_count, 0, 0 |
|
|
| FTQ_BREAK_PRED_BR_OFFPATH_count, 0, 0 |
| FTQ_BREAK_PRED_BR_OFFPATH_total_count, 0, 0 |
|
|
| FTQ_BREAK_BAR_FETCH_ONPATH_count, 0, 0 |
| FTQ_BREAK_BAR_FETCH_ONPATH_total_count, 0, 0 |
|
|
| FTQ_BREAK_BAR_FETCH_OFFPATH_count, 0, 0 |
| FTQ_BREAK_BAR_FETCH_OFFPATH_total_count, 0, 0 |
|
|
| FTQ_BREAK_MAX_CFS_TAKEN_ONPATH_count, 0, 0 |
| FTQ_BREAK_MAX_CFS_TAKEN_ONPATH_total_count, 0, 0 |
|
|
| FTQ_BREAK_MAX_CFS_TAKEN_OFFPATH_count, 0, 0 |
| FTQ_BREAK_MAX_CFS_TAKEN_OFFPATH_total_count, 0, 0 |
|
|
| FTQ_BREAK_MAX_FT_ONPATH_count, 0, 986557 |
| FTQ_BREAK_MAX_FT_ONPATH_total_count, 0, 986557 |
|
|
| FTQ_BREAK_MAX_FT_OFFPATH_count, 0, 1957778 |
| FTQ_BREAK_MAX_FT_OFFPATH_total_count, 0, 1957778 |
|
|
| DFE_GEN_ON_PATH_FT_count, 0, 20177594 |
| DFE_GEN_ON_PATH_FT_total_count, 0, 20177594 |
|
|
| DFE_GEN_OFF_PATH_FT_count, 0, 1778882 |
| DFE_GEN_OFF_PATH_FT_total_count, 0, 1778882 |
|
|
| DFE_L0_ENABLED_PREDICTIONS_count, 0, 151529390 |
| DFE_L0_ENABLED_PREDICTIONS_total_count, 0, 151529390 |
|
|
| DFE_L0_WRONG_MAIN_CORRECT_count, 0, 597557 |
| DFE_L0_WRONG_MAIN_CORRECT_total_count, 0, 597557 |
|
|
| DFE_L0_WRONG_MAIN_WRONG_count, 0, 18085 |
| DFE_L0_WRONG_MAIN_WRONG_total_count, 0, 18085 |
|
|
| DFE_L0_CORRECT_MAIN_WRONG_count, 0, 4460 |
| DFE_L0_CORRECT_MAIN_WRONG_total_count, 0, 4460 |
|
|
| DFE_L0_CORRECT_MAIN_CORRECT_count, 0, 150909288 |
| DFE_L0_CORRECT_MAIN_CORRECT_total_count, 0, 150909288 |
|
|
| DFE_L0_WRONG_MAIN_CORRECT_RECOVERY_SCHEDULED_count, 0, 0 |
| DFE_L0_WRONG_MAIN_CORRECT_RECOVERY_SCHEDULED_total_count, 0, 0 |
|
|
| FTQ_SAW_BAR_FETCH_OFFPATH_count, 0, 1336 |
| FTQ_SAW_BAR_FETCH_OFFPATH_total_count, 0, 1336 |
|
|
| FTQ_SAW_BAR_FETCH_ONPATH_count, 0, 968 |
| FTQ_SAW_BAR_FETCH_ONPATH_total_count, 0, 968 |
|
|
| DFE_CONF_0_RECOVER_AT_EXEC_count, 422, 0 |
| DFE_CONF_0_RECOVER_AT_EXEC_total_count, 422, 0 |
|
|
| DFE_CONF_1_RECOVER_AT_EXEC_count, 422, 0 |
| DFE_CONF_1_RECOVER_AT_EXEC_total_count, 422, 0 |
|
|
| DFE_CONF_2_RECOVER_AT_EXEC_count, 422, 0 |
| DFE_CONF_2_RECOVER_AT_EXEC_total_count, 422, 0 |
|
|
| DFE_CONF_3_RECOVER_AT_EXEC_count, 422, 0 |
| DFE_CONF_3_RECOVER_AT_EXEC_total_count, 422, 0 |
|
|
| DFE_CONF_0_CORRECT_count, 422, 0 |
| DFE_CONF_0_CORRECT_total_count, 422, 0 |
|
|
| DFE_CONF_1_CORRECT_count, 422, 0 |
| DFE_CONF_1_CORRECT_total_count, 422, 0 |
|
|
| DFE_CONF_2_CORRECT_count, 422, 0 |
| DFE_CONF_2_CORRECT_total_count, 422, 0 |
|
|
| DFE_CONF_3_CORRECT_count, 422, 0 |
| DFE_CONF_3_CORRECT_total_count, 422, 0 |
|
|
| DFE_ON_CONF_ON_OPS_count, 423, 0 |
| DFE_ON_CONF_ON_OPS_total_count, 423, 0 |
|
|
| DFE_ON_CONF_OFF_OPS_count, 423, 0 |
| DFE_ON_CONF_OFF_OPS_total_count, 423, 0 |
|
|
| DFE_OFF_CONF_ON_OPS_count, 423, 0 |
| DFE_OFF_CONF_ON_OPS_total_count, 423, 0 |
|
|
| DFE_OFF_CONF_OFF_REALISTIC_OPS_count, 423, 0 |
| DFE_OFF_CONF_OFF_REALISTIC_OPS_total_count, 423, 0 |
|
|
| DFE_OFF_CONF_OFF_PERFECT_OPS_count, 423, 0 |
| DFE_OFF_CONF_OFF_PERFECT_OPS_total_count, 423, 0 |
|
|
| DFE_ON_CONF_ON_FETCH_TARGETS_count, 424, 0 |
| DFE_ON_CONF_ON_FETCH_TARGETS_total_count, 424, 0 |
|
|
| DFE_ON_CONF_OFF_FETCH_TARGETS_count, 424, 0 |
| DFE_ON_CONF_OFF_FETCH_TARGETS_total_count, 424, 0 |
|
|
| DFE_OFF_CONF_ON_FETCH_TARGETS_count, 424, 0 |
| DFE_OFF_CONF_ON_FETCH_TARGETS_total_count, 424, 0 |
|
|
| DFE_OFF_CONF_OFF_REALISTIC_FETCH_TARGETS_count, 424, 0 |
| DFE_OFF_CONF_OFF_REALISTIC_FETCH_TARGETS_total_count, 424, 0 |
|
|
| DFE_OFF_CONF_OFF_PERFECT_FETCH_TARGETS_count, 424, 0 |
| DFE_OFF_CONF_OFF_PERFECT_FETCH_TARGETS_total_count, 424, 0 |
|
|
| DFE_ON_CONF_ON_CYCLES_count, 425, 0 |
| DFE_ON_CONF_ON_CYCLES_total_count, 425, 0 |
|
|
| DFE_ON_CONF_OFF_CYCLES_count, 425, 0 |
| DFE_ON_CONF_OFF_CYCLES_total_count, 425, 0 |
|
|
| DFE_OFF_CONF_ON_CYCLES_count, 425, 0 |
| DFE_OFF_CONF_ON_CYCLES_total_count, 425, 0 |
|
|
| DFE_OFF_CONF_OFF_REALISTIC_CYCLES_count, 425, 0 |
| DFE_OFF_CONF_OFF_REALISTIC_CYCLES_total_count, 425, 0 |
|
|
| DFE_OFF_CONF_OFF_PERFECT_CYCLES_count, 425, 0 |
| DFE_OFF_CONF_OFF_PERFECT_CYCLES_total_count, 425, 0 |
|
|
| DFE_OFF_CONF_ON_NUM_EVENTS_count, 0, 0 |
| DFE_OFF_CONF_ON_NUM_EVENTS_total_count, 0, 0 |
|
|
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_EVENTS_count, 426, 0 |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_EVENTS_total_count, 426, 0 |
|
|
| DFE_OFF_CONF_ON_IBTB_MISS_EVENTS_count, 426, 0 |
| DFE_OFF_CONF_ON_IBTB_MISS_EVENTS_total_count, 426, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_EVENTS_count, 426, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_EVENTS_total_count, 426, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_EVENTS_count, 426, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_EVENTS_total_count, 426, 0 |
|
|
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_EVENTS_count, 426, 0 |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_EVENTS_total_count, 426, 0 |
|
|
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_EVENTS_count, 426, 0 |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_EVENTS_total_count, 426, 0 |
|
|
| DFE_OFF_CONF_ON_LATE_BTB_HIT_EVENTS_count, 0, 0 |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_EVENTS_total_count, 0, 0 |
|
|
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_CYCLES_count, 427, 0 |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_CYCLES_total_count, 427, 0 |
|
|
| DFE_OFF_CONF_ON_IBTB_MISS_CYCLES_count, 427, 0 |
| DFE_OFF_CONF_ON_IBTB_MISS_CYCLES_total_count, 427, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CYCLES_count, 427, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CYCLES_total_count, 427, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_CYCLES_count, 427, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_CYCLES_total_count, 427, 0 |
|
|
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_CYCLES_count, 427, 0 |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_CYCLES_total_count, 427, 0 |
|
|
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_CYCLES_count, 427, 0 |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_CYCLES_total_count, 427, 0 |
|
|
| DFE_OFF_CONF_ON_LATE_BTB_HIT_CYCLES_count, 0, 0 |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_CYCLES_total_count, 0, 0 |
|
|
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_FETCH_TARGETS_count, 428, 0 |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_FETCH_TARGETS_total_count, 428, 0 |
|
|
| DFE_OFF_CONF_ON_IBTB_MISS_FETCH_TARGETS_count, 428, 0 |
| DFE_OFF_CONF_ON_IBTB_MISS_FETCH_TARGETS_total_count, 428, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_FETCH_TARGETS_count, 428, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_FETCH_TARGETS_total_count, 428, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_FETCH_TARGETS_count, 428, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_FETCH_TARGETS_total_count, 428, 0 |
|
|
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_FETCH_TARGETS_count, 428, 0 |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_FETCH_TARGETS_total_count, 428, 0 |
|
|
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_FETCH_TARGETS_count, 428, 0 |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_FETCH_TARGETS_total_count, 428, 0 |
|
|
| DFE_OFF_CONF_ON_LATE_BTB_HIT_FETCH_TARGETS_count, 0, 0 |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_FETCH_TARGETS_total_count, 0, 0 |
|
|
| DFE_OFF_CONF_ON_BP_INCORRECT_0_CONF_count, 429, 0 |
| DFE_OFF_CONF_ON_BP_INCORRECT_0_CONF_total_count, 429, 0 |
|
|
| DFE_OFF_CONF_ON_BP_INCORRECT_1_CONF_count, 429, 0 |
| DFE_OFF_CONF_ON_BP_INCORRECT_1_CONF_total_count, 429, 0 |
|
|
| DFE_OFF_CONF_ON_BP_INCORRECT_2_CONF_count, 429, 0 |
| DFE_OFF_CONF_ON_BP_INCORRECT_2_CONF_total_count, 429, 0 |
|
|
| DFE_OFF_CONF_ON_BP_INCORRECT_3_CONF_count, 429, 0 |
| DFE_OFF_CONF_ON_BP_INCORRECT_3_CONF_total_count, 429, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CBR_0_CONF_count, 430, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_0_CONF_total_count, 430, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CBR_1_CONF_count, 430, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_1_CONF_total_count, 430, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CBR_2_CONF_count, 430, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_2_CONF_total_count, 430, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CBR_3_CONF_count, 430, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_3_CONF_total_count, 430, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_NOT_CF_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_NOT_CF_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_BR_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_BR_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_CBR_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_CBR_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_CALL_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_CALL_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_IBR_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_IBR_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICALL_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICALL_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICO_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICO_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_RET_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_RET_total_count, 431, 0 |
|
|
| DFE_OFF_CONF_ON_BTB_MISS_CF_SYS_count, 431, 0 |
| DFE_OFF_CONF_ON_BTB_MISS_CF_SYS_total_count, 431, 0 |
|
|
| DFE_ON_CONF_OFF_NUM_EVENTS_count, 0, 0 |
| DFE_ON_CONF_OFF_NUM_EVENTS_total_count, 0, 0 |
|
|
| CONF_BTB_NUM_CYCLES_OFF_PATH_EVENT_count, 0, 0 |
| CONF_BTB_NUM_CYCLES_OFF_PATH_EVENT_total_count, 0, 0 |
|
|
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_count, 432, 0 |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_count, 432, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_count, 432, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_count, 432, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_count, 432, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_RATE_count, 432, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_count, 432, 0 |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_count, 432, 0 |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_count, 432, 0 |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_INV_CONF_INC_count, 432, 0 |
| DFE_ON_CONF_OFF_INV_CONF_INC_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_PERFECT_CONF_count, 432, 0 |
| DFE_ON_CONF_OFF_PERFECT_CONF_total_count, 432, 0 |
|
|
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_RATE_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_INV_CONF_INC_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_INV_CONF_INC_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_PERFECT_CONF_CYCLES_count, 433, 0 |
| DFE_ON_CONF_OFF_PERFECT_CONF_CYCLES_total_count, 433, 0 |
|
|
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_BTB_MISS_RATE_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_INV_CONF_INC_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_INV_CONF_INC_FETCH_TARGETS_total_count, 434, 0 |
|
|
| DFE_ON_CONF_OFF_PERFECT_CONF_FETCH_TARGETS_count, 434, 0 |
| DFE_ON_CONF_OFF_PERFECT_CONF_FETCH_TARGETS_total_count, 434, 0 |
|
|
| CONF_OFF_IBTB_MISS_BP_TAKEN_count, 435, 0 |
| CONF_OFF_IBTB_MISS_BP_TAKEN_total_count, 435, 0 |
|
|
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_count, 435, 0 |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_total_count, 435, 0 |
|
|
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_count, 435, 0 |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_total_count, 435, 0 |
|
|
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_count, 435, 0 |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_total_count, 435, 0 |
|
|
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_count, 435, 0 |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_total_count, 435, 0 |
|
|
| CONF_OFF_BTB_MISS_RATE_count, 435, 0 |
| CONF_OFF_BTB_MISS_RATE_total_count, 435, 0 |
|
|
| CONF_OFF_IBTB_MISS_RATE_count, 435, 0 |
| CONF_OFF_IBTB_MISS_RATE_total_count, 435, 0 |
|
|
| CONF_OFF_RECOVER_AT_DECODE_RATE_count, 435, 0 |
| CONF_OFF_RECOVER_AT_DECODE_RATE_total_count, 435, 0 |
|
|
| CONF_OFF_RECOVER_AT_EXEC_RATE_count, 435, 0 |
| CONF_OFF_RECOVER_AT_EXEC_RATE_total_count, 435, 0 |
|
|
| CONF_OFF_INV_CONF_INC_count, 435, 0 |
| CONF_OFF_INV_CONF_INC_total_count, 435, 0 |
|
|
| CONF_OFF_PERFECT_CONF_count, 435, 0 |
| CONF_OFF_PERFECT_CONF_total_count, 435, 0 |
|
|
| TOPDOWN_TOTAL_SLOTS_count, 0, 698518080 |
| TOPDOWN_TOTAL_SLOTS_total_count, 0, 698518080 |
|
|
| TOPDOWN_ISSUED_SLOTS_count, 0, 154667398 |
| TOPDOWN_ISSUED_SLOTS_total_count, 0, 154667398 |
|
|
| TOPDOWN_RETIRED_SLOTS_count, 0, 151528925 |
| TOPDOWN_RETIRED_SLOTS_total_count, 0, 151528925 |
|
|
| TOPDOWN_FETCH_BUBBLES_SLOTS_count, 0, 4747897 |
| TOPDOWN_FETCH_BUBBLES_SLOTS_total_count, 0, 4747897 |
|
|
| TOPDOWN_RECOVERY_BUBBLES_SLOTS_count, 0, 1477019 |
| TOPDOWN_RECOVERY_BUBBLES_SLOTS_total_count, 0, 1477019 |
|
|
| TOPDOWN_MEM_LOAD_STALLS_CYCLES_count, 0, 27812792 |
| TOPDOWN_MEM_LOAD_STALLS_CYCLES_total_count, 0, 27812792 |
|
|
| TOPDOWN_MEM_STORE_STALLS_CYCLES_count, 0, 25391432 |
| TOPDOWN_MEM_STORE_STALLS_CYCLES_total_count, 0, 25391432 |
|
|
| TOPDOWN_EXEC_STALLS_CYCLES_count, 0, 78585360 |
| TOPDOWN_EXEC_STALLS_CYCLES_total_count, 0, 78585360 |
|
|
| TOPDOWN_BACKEND_STALLS_CYCLES_count, 0, 89480490 |
| TOPDOWN_BACKEND_STALLS_CYCLES_total_count, 0, 89480490 |
|
|
| TOPDOWN_FETCH_BUBBLES_GT_MIW_CYCLES_count, 0, 693730 |
| TOPDOWN_FETCH_BUBBLES_GT_MIW_CYCLES_total_count, 0, 693730 |
|
|
| TOPDOWN_BR_RECOVER_AT_EXEC_RETIRED_CYCLES_count, 0, 19912 |
| TOPDOWN_BR_RECOVER_AT_EXEC_RETIRED_CYCLES_total_count, 0, 19912 |
|
|
| TOPDOWN_MACHINE_CLEAR_CYCLES_count, 0, 620102 |
| TOPDOWN_MACHINE_CLEAR_CYCLES_total_count, 0, 620102 |
|
|
| TOPDOWN_FRONTEND_BOUND_count, 0, 67 |
| TOPDOWN_FRONTEND_BOUND_total_count, 0, 67 |
|
|
| TOPDOWN_BACKEND_BOUND_count, 0, 7698 |
| TOPDOWN_BACKEND_BOUND_total_count, 0, 7698 |
|
|
| TOPDOWN_BAD_SPEC_BOUND_count, 0, 66 |
| TOPDOWN_BAD_SPEC_BOUND_total_count, 0, 66 |
|
|
| TOPDOWN_RETIRING_BOUND_count, 0, 2169 |
| TOPDOWN_RETIRING_BOUND_total_count, 0, 2169 |
|
|
| TOPDOWN_FETCH_LATENCY_BOUND_count, 0, 59 |
| TOPDOWN_FETCH_LATENCY_BOUND_total_count, 0, 59 |
|
|
| TOPDOWN_FETCH_BANDWIDTH_BOUND_count, 0, 8 |
| TOPDOWN_FETCH_BANDWIDTH_BOUND_total_count, 0, 8 |
|
|
| TOPDOWN_MEM_BOUND_count, 0, 4577 |
| TOPDOWN_MEM_BOUND_total_count, 0, 4577 |
|
|
| TOPDOWN_CORE_BOUND_count, 0, 3121 |
| TOPDOWN_CORE_BOUND_total_count, 0, 3121 |
|
|
| TOPDOWN_BR_RECOVER_AT_EXEC_BOUND_count, 0, 2 |
| TOPDOWN_BR_RECOVER_AT_EXEC_BOUND_total_count, 0, 2 |
|
|
| TOPDOWN_MACHINE_CLEARS_BOUND_count, 0, 64 |
| TOPDOWN_MACHINE_CLEARS_BOUND_total_count, 0, 64 |
|
|
| H2P_SEEN_MAIN_count, 0, 1645 |
| H2P_SEEN_MAIN_total_count, 0, 1645 |
|
|
