hpca2027-database-validated-traces-20260711 / validation /postgresql /simpoint-validation /1 /core.stat.0.csv
| Core, 0, 0 | |
| Cumulative_Cycles, 0, 40347914 | |
| Cumulative_Instructions, 0, 9981748 | |
| Periodic_Cycles, 0, 40347914 | |
| Periodic_Instructions, 0, 9981748 | |
| EXECUTION_TIME_count, 0, 12608723125000 | |
| EXECUTION_TIME_total_count, 0, 12608723125000 | |
| SIM_HOST_WALL_SECONDS_value, 0, 103.286407 | |
| SIM_HOST_WALL_SECONDS_total_value, 0, 103.286407 | |
| NODE_CYCLE_count, 0, 40347914 | |
| NODE_CYCLE_total_count, 0, 40347914 | |
| NODE_INST_COUNT_count, 0, 10000006 | |
| NODE_INST_COUNT_total_count, 0, 10000006 | |
| NODE_INST_COUNT_FETCHED_count, 0, 9981748 | |
| NODE_INST_COUNT_FETCHED_total_count, 0, 9981748 | |
| NODE_UOP_COUNT_count, 0, 10582823 | |
| NODE_UOP_COUNT_total_count, 0, 10582823 | |
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_count, 0, 4627308 | |
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_total_count, 0, 4627308 | |
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_ONPATH_count, 0, 4536630 | |
| EXEC_STAGE_NO_ISSUE_STALL_CYCLE_ONPATH_total_count, 0, 4536630 | |
| FULL_WINDOW_STALL_count, 0, 20928 | |
| FULL_WINDOW_STALL_pct, 0, 0.052 | |
| FULL_WINDOW_STALL_total_count, 0, 20928 | |
| FULL_WINDOW_STALL_total_pct, 0, 0.052 | |
| FULL_WINDOW_MEM_OP_count, 401, 20632 | |
| FULL_WINDOW_MEM_OP_total_count, 401, 20632 | |
| FULL_WINDOW_FP_OP_count, 401, 0 | |
| FULL_WINDOW_FP_OP_total_count, 401, 0 | |
| FULL_WINDOW_OTHER_OP_count, 401, 2 | |
| FULL_WINDOW_OTHER_OP_total_count, 401, 2 | |
| RET_BLOCKED_DC_MISS_count, 0, 534357 | |
| RET_BLOCKED_DC_MISS_pct, 0, 1.324 | |
| RET_BLOCKED_DC_MISS_total_count, 0, 534357 | |
| RET_BLOCKED_DC_MISS_total_pct, 0, 1.324 | |
| RET_BLOCKED_L1_MISS_count, 0, 402650 | |
| RET_BLOCKED_L1_MISS_pct, 0, 0.998 | |
| RET_BLOCKED_L1_MISS_total_count, 0, 402650 | |
| RET_BLOCKED_L1_MISS_total_pct, 0, 0.998 | |
| RET_BLOCKED_L1_MISS_BW_PREF_count, 0, 96050 | |
| RET_BLOCKED_L1_MISS_BW_PREF_pct, 0, 0.238 | |
| RET_BLOCKED_L1_MISS_BW_PREF_total_count, 0, 96050 | |
| RET_BLOCKED_L1_MISS_BW_PREF_total_pct, 0, 0.238 | |
| RET_BLOCKED_L1_ACCESS_count, 0, 229203 | |
| RET_BLOCKED_L1_ACCESS_pct, 0, 0.568 | |
| RET_BLOCKED_L1_ACCESS_total_count, 0, 229203 | |
| RET_BLOCKED_L1_ACCESS_total_pct, 0, 0.568 | |
| RET_BLOCKED_MEM_STALL_count, 0, 13896162 | |
| RET_BLOCKED_MEM_STALL_pct, 0, 34.441 | |
| RET_BLOCKED_MEM_STALL_total_count, 0, 13896162 | |
| RET_BLOCKED_MEM_STALL_total_pct, 0, 34.441 | |
| RET_BLOCKED_OFFCHIP_DEMAND_count, 0, 0 | |
| RET_BLOCKED_OFFCHIP_DEMAND_pct, 0, 0.000 | |
| RET_BLOCKED_OFFCHIP_DEMAND_total_count, 0, 0 | |
| RET_BLOCKED_OFFCHIP_DEMAND_total_pct, 0, 0.000 | |
| OP_ISSUED_count, 0, 10865062 | |
| OP_ISSUED_total_count, 0, 10865062 | |
| OP_RETIRED_count, 0, 10582823 | |
| OP_RETIRED_total_count, 0, 10582823 | |
| OP_MACRO_FUSION_ONPATH_count, 0, 1217526 | |
| OP_MACRO_FUSION_ONPATH_total_count, 0, 1217526 | |
| OP_MACRO_FUSION_OFFPATH_count, 0, 43284 | |
| OP_MACRO_FUSION_OFFPATH_total_count, 0, 43284 | |
| REPLAY_SIGNALED_count, 0, 0 | |
| REPLAY_SIGNALED_total_count, 0, 0 | |
| REPLAY_COUNTED_count, 0, 0 | |
| REPLAY_COUNTED_total_count, 0, 0 | |
| OFF_CRITICAL_PATH_count, 402, 0 | |
| OFF_CRITICAL_PATH_total_count, 402, 0 | |
| ON_CRITICAL_PATH_count, 402, 0 | |
| ON_CRITICAL_PATH_total_count, 402, 0 | |
| LD_NO_DEPENDENTS_count, 403, 36009 | |
| LD_NO_DEPENDENTS_total_count, 403, 36009 | |
| LD_DEPENDENTS_count, 403, 625115 | |
| LD_DEPENDENTS_total_count, 403, 625115 | |
| LD_EXEC_CYCLES_0_count, 404, 0 | |
| LD_EXEC_CYCLES_0_total_count, 404, 0 | |
| LD_EXEC_CYCLES_1_count, 404, 0 | |
| LD_EXEC_CYCLES_1_total_count, 404, 0 | |
| LD_EXEC_CYCLES_2_count, 404, 0 | |
| LD_EXEC_CYCLES_2_total_count, 404, 0 | |
| LD_EXEC_CYCLES_3_count, 404, 110 | |
| LD_EXEC_CYCLES_3_total_count, 404, 110 | |
| LD_EXEC_CYCLES_4_count, 404, 301 | |
| LD_EXEC_CYCLES_4_total_count, 404, 301 | |
| ICACHE_STAGE_STARVED_count, 405, 340486 | |
| ICACHE_STAGE_STARVED_total_count, 405, 340486 | |
| ICACHE_STAGE_NOT_STARVED_count, 405, 39507287 | |
| ICACHE_STAGE_NOT_STARVED_total_count, 405, 39507287 | |
| ICACHE_STAGE_STALLED_count, 406, 37757793 | |
| ICACHE_STAGE_STALLED_total_count, 406, 37757793 | |
| ICACHE_STAGE_NOT_STALLED_count, 406, 2089980 | |
| ICACHE_STAGE_NOT_STALLED_total_count, 406, 2089980 | |
| ICACHE_STAGE_OFF_PATH_count, 406, 500141 | |
| ICACHE_STAGE_OFF_PATH_total_count, 406, 500141 | |
| DECODE_STAGE_STARVED_count, 407, 39967961 | |
| DECODE_STAGE_STARVED_total_count, 407, 39967961 | |
| DECODE_STAGE_NOT_STARVED_count, 407, 96860 | |
| DECODE_STAGE_NOT_STARVED_total_count, 407, 96860 | |
| DECODE_STAGE_STALLED_count, 408, 89780 | |
| DECODE_STAGE_STALLED_total_count, 408, 89780 | |
| DECODE_STAGE_NOT_STALLED_count, 408, 39975041 | |
| DECODE_STAGE_NOT_STALLED_total_count, 408, 39975041 | |
| DECODE_STAGE_OFF_PATH_count, 408, 283093 | |
| DECODE_STAGE_OFF_PATH_total_count, 408, 283093 | |
| UOPQ_STAGE_STARVED_count, 409, 578835 | |
| UOPQ_STAGE_STARVED_total_count, 409, 578835 | |
| UOPQ_STAGE_NOT_STARVED_count, 409, 1681447 | |
| UOPQ_STAGE_NOT_STARVED_total_count, 409, 1681447 | |
| UOPQ_STAGE_STALLED_count, 410, 37725467 | |
| UOPQ_STAGE_STALLED_total_count, 410, 37725467 | |
| UOPQ_STAGE_NOT_STALLED_count, 410, 2260282 | |
| UOPQ_STAGE_NOT_STALLED_total_count, 410, 2260282 | |
| UOPQ_STAGE_OFF_PATH_count, 410, 362165 | |
| UOPQ_STAGE_OFF_PATH_total_count, 410, 362165 | |
| RS_OP_READY_NOT_ISSUED_TOTAL_count, 0, 661761804 | |
| RS_OP_READY_NOT_ISSUED_TOTAL_total_count, 0, 661761804 | |
| RS_0_OP_READY_NOT_ISSUED_count, 0, 847944 | |
| RS_0_OP_READY_NOT_ISSUED_total_count, 0, 847944 | |
| RS_1_OP_READY_NOT_ISSUED_count, 0, 261592 | |
| RS_1_OP_READY_NOT_ISSUED_total_count, 0, 261592 | |
| RS_2_OP_READY_NOT_ISSUED_count, 0, 660652268 | |
| RS_2_OP_READY_NOT_ISSUED_total_count, 0, 660652268 | |
| RS_3_OP_READY_NOT_ISSUED_count, 0, 0 | |
| RS_3_OP_READY_NOT_ISSUED_total_count, 0, 0 | |
| RS_4_OP_READY_NOT_ISSUED_count, 0, 0 | |
| RS_4_OP_READY_NOT_ISSUED_total_count, 0, 0 | |
| RS_5_OP_READY_NOT_ISSUED_count, 0, 0 | |
| RS_5_OP_READY_NOT_ISSUED_total_count, 0, 0 | |
| RS_6_OP_READY_NOT_ISSUED_count, 0, 0 | |
| RS_6_OP_READY_NOT_ISSUED_total_count, 0, 0 | |
| RS_7_OP_READY_NOT_ISSUED_count, 0, 0 | |
| RS_7_OP_READY_NOT_ISSUED_total_count, 0, 0 | |
| RS_7_PLUS_OP_READY_NOT_ISSUED_count, 0, 0 | |
| RS_7_PLUS_OP_READY_NOT_ISSUED_total_count, 0, 0 | |
| FU_IDLE_NO_READY_OPS_TOTAL_count, 0, 307607161 | |
| FU_IDLE_NO_READY_OPS_TOTAL_total_count, 0, 307607161 | |
| FU_0_IDLE_NO_READY_OPS_count, 0, 36959157 | |
| FU_0_IDLE_NO_READY_OPS_total_count, 0, 36959157 | |
| FU_1_IDLE_NO_READY_OPS_count, 0, 37479135 | |
| FU_1_IDLE_NO_READY_OPS_total_count, 0, 37479135 | |
| FU_2_IDLE_NO_READY_OPS_count, 0, 39780323 | |
| FU_2_IDLE_NO_READY_OPS_total_count, 0, 39780323 | |
| FU_3_IDLE_NO_READY_OPS_count, 0, 39782021 | |
| FU_3_IDLE_NO_READY_OPS_total_count, 0, 39782021 | |
| FU_4_IDLE_NO_READY_OPS_count, 0, 37507075 | |
| FU_4_IDLE_NO_READY_OPS_total_count, 0, 37507075 | |
| FU_5_IDLE_NO_READY_OPS_count, 0, 36851509 | |
| FU_5_IDLE_NO_READY_OPS_total_count, 0, 36851509 | |
| FU_6_IDLE_NO_READY_OPS_count, 0, 991516 | |
| FU_6_IDLE_NO_READY_OPS_total_count, 0, 991516 | |
| FU_7_IDLE_NO_READY_OPS_count, 0, 991127 | |
| FU_7_IDLE_NO_READY_OPS_total_count, 0, 991127 | |
| FU_8_IDLE_NO_READY_OPS_count, 0, 37481484 | |
| FU_8_IDLE_NO_READY_OPS_total_count, 0, 37481484 | |
| FU_9_IDLE_NO_READY_OPS_count, 0, 39783814 | |
| FU_9_IDLE_NO_READY_OPS_total_count, 0, 39783814 | |
| FU_10_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_10_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_11_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_11_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_12_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_12_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_13_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_13_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_14_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_14_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_15_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_15_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_16_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_16_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_17_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_17_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_18_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_18_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_19_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_19_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_20_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_20_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_21_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_21_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_22_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_22_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_23_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_23_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_24_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_24_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_25_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_25_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_26_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_26_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_27_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_27_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_28_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_28_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_29_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_29_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_30_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_30_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_31_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_31_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| FU_31_PLUS_IDLE_NO_READY_OPS_count, 0, 0 | |
| FU_31_PLUS_IDLE_NO_READY_OPS_total_count, 0, 0 | |
| MAP_STAGE_STARVED_count, 411, 384817 | |
| MAP_STAGE_STARVED_total_count, 411, 384817 | |
| MAP_STAGE_NOT_STARVED_count, 411, 28031223 | |
| MAP_STAGE_NOT_STARVED_total_count, 411, 28031223 | |
| MAP_STAGE_STALLED_count, 412, 26239660 | |
| MAP_STAGE_STALLED_total_count, 412, 26239660 | |
| MAP_STAGE_NOT_STALLED_count, 412, 2176380 | |
| MAP_STAGE_NOT_STALLED_total_count, 412, 2176380 | |
| MAP_STAGE_OFF_PATH_count, 412, 224981 | |
| MAP_STAGE_OFF_PATH_total_count, 412, 224981 | |
| MAP_STAGE_STALL_ITSELF_count, 413, 11706893 | |
| MAP_STAGE_STALL_ITSELF_total_count, 413, 11706893 | |
| MAP_STAGE_NOT_STALL_ITSELF_count, 413, 28641021 | |
| MAP_STAGE_NOT_STALL_ITSELF_total_count, 413, 28641021 | |
| MAP_STAGE_LATE_ALLOCATE_SEND_BACK_count, 0, 0 | |
| MAP_STAGE_LATE_ALLOCATE_SEND_BACK_total_count, 0, 0 | |
| MAP_STAGE_RENAME_OP_ONPATH_count, 0, 10582964 | |
| MAP_STAGE_RENAME_OP_ONPATH_total_count, 0, 10582964 | |
| MAP_STAGE_RENAME_OP_OFFPATH_count, 0, 579101 | |
| MAP_STAGE_RENAME_OP_OFFPATH_total_count, 0, 579101 | |
| MAP_STAGE_RENAME_INT_REG_ONPATH_count, 0, 7845662 | |
| MAP_STAGE_RENAME_INT_REG_ONPATH_total_count, 0, 7845662 | |
| MAP_STAGE_RENAME_INT_REG_OFFPATH_count, 0, 378019 | |
| MAP_STAGE_RENAME_INT_REG_OFFPATH_total_count, 0, 378019 | |
| MAP_STAGE_RENAME_VEC_REG_ONPATH_count, 0, 14725 | |
| MAP_STAGE_RENAME_VEC_REG_ONPATH_total_count, 0, 14725 | |
| MAP_STAGE_RENAME_VEC_REG_OFFPATH_count, 0, 4458 | |
| MAP_STAGE_RENAME_VEC_REG_OFFPATH_total_count, 0, 4458 | |
| MAP_STAGE_RENAME_MOVE_ELIM_ONPATH_count, 0, 0 | |
| MAP_STAGE_RENAME_MOVE_ELIM_ONPATH_total_count, 0, 0 | |
| MAP_STAGE_RENAME_MOVE_ELIM_OFFPATH_count, 0, 0 | |
| MAP_STAGE_RENAME_MOVE_ELIM_OFFPATH_total_count, 0, 0 | |
| REG_FILE_UTIL_SAMPLES_count, 0, 40347914 | |
| REG_FILE_UTIL_SAMPLES_total_count, 0, 40347914 | |
| REG_FILE_INT_PHYS_REGS_SUM_count, 0, 11297415920 | |
| REG_FILE_INT_PHYS_REGS_SUM_total_count, 0, 11297415920 | |
| REG_FILE_VEC_PHYS_REGS_SUM_count, 0, 13395507448 | |
| REG_FILE_VEC_PHYS_REGS_SUM_total_count, 0, 13395507448 | |
| REG_FILE_INT_OCCUPIED_SUM_count, 0, 5527972734 | |
| REG_FILE_INT_OCCUPIED_SUM_total_count, 0, 5527972734 | |
| REG_FILE_VEC_OCCUPIED_SUM_count, 0, 1293818113 | |
| REG_FILE_VEC_OCCUPIED_SUM_total_count, 0, 1293818113 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_ALLOC_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_ALLOC_total_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_ALLOC_count, 0, 14715 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_ALLOC_total_count, 0, 14715 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_SHORTLIVE_count, 0, 2791592 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_SHORTLIVE_total_count, 0, 2791592 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_SHORTLIVE_count, 0, 4321 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_SHORTLIVE_total_count, 0, 4321 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_0_count, 0, 2060805 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_0_total_count, 0, 2060805 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_0_count, 0, 63 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_0_total_count, 0, 63 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_1_count, 0, 3472586 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_1_total_count, 0, 3472586 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_1_count, 0, 13801 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_1_total_count, 0, 13801 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_2_count, 0, 506202 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_2_total_count, 0, 506202 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_2_count, 0, 418 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_2_total_count, 0, 418 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_3_count, 0, 1317229 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_3_total_count, 0, 1317229 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_3_count, 0, 37 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_3_total_count, 0, 37 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_4_count, 0, 30054 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_4_total_count, 0, 30054 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_4_count, 0, 146 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_4_total_count, 0, 146 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_5_count, 0, 13084 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_5_total_count, 0, 13084 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_5_count, 0, 8 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_5_total_count, 0, 8 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_6_count, 0, 409862 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_6_total_count, 0, 409862 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_6_count, 0, 6 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_6_total_count, 0, 6 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_7_PLUS_count, 0, 35708 | |
| MAP_STAGE_ONPATH_INT_REG_USE_COUNT_7_PLUS_total_count, 0, 35708 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_7_PLUS_count, 0, 236 | |
| MAP_STAGE_ONPATH_VEC_REG_USE_COUNT_7_PLUS_total_count, 0, 236 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_count, 0, 0 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_total_count, 0, 0 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_0_total_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_count, 0, 0 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_total_count, 0, 0 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_0_total_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_count, 0, 0 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_total_count, 0, 0 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_1_total_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_count, 0, 0 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_total_count, 0, 0 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_1_total_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_count, 0, 6045478 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_pct, 0, 11.943 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_total_count, 0, 6045478 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_2_total_pct, 0, 11.943 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_count, 0, 27182891 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_pct, 0, 65030.840 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_total_count, 0, 27182891 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_2_total_pct, 0, 65030.840 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_count, 0, 257027347 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_pct, 0, 195.127 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_total_count, 0, 257027347 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_3_total_pct, 0, 195.127 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_count, 0, 19771 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_pct, 0, 534.351 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_total_count, 0, 19771 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_3_total_pct, 0, 534.351 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_count, 0, 1451556 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_pct, 0, 48.298 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_total_count, 0, 1451556 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_4_total_pct, 0, 48.298 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_count, 0, 14829 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_pct, 0, 101.568 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_total_count, 0, 14829 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_4_total_pct, 0, 101.568 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_count, 0, 38279882 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_pct, 0, 2925.702 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_total_count, 0, 38279882 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_5_total_pct, 0, 2925.702 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_count, 0, 13505 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_pct, 0, 1688.125 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_total_count, 0, 13505 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_5_total_pct, 0, 1688.125 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_count, 0, 156510849 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_pct, 0, 381.862 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_total_count, 0, 156510849 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_6_total_pct, 0, 381.862 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_count, 0, 13376 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_pct, 0, 2229.333 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_total_count, 0, 13376 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_6_total_pct, 0, 2229.333 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_count, 0, 52877494 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_pct, 0, 1480.830 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_total_count, 0, 52877494 | |
| MAP_STAGE_ONPATH_INT_REG_CONSUME_DIST_7_PLUS_total_pct, 0, 1480.830 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_count, 0, 27539168 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_pct, 0, 116691.390 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_total_count, 0, 27539168 | |
| MAP_STAGE_ONPATH_VEC_REG_CONSUME_DIST_7_PLUS_total_pct, 0, 116691.390 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_count, 0, 13520324 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_pct, 0, 2.922 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_total_count, 0, 13520324 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_total_pct, 0, 2.922 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_count, 0, 1632940 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_pct, 0, 0.353 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_total_count, 0, 1632940 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_total_pct, 0, 0.353 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_count, 0, 7636114 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_pct, 0, 1.650 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_total_count, 0, 7636114 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_total_pct, 0, 1.650 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_count, 0, 1617661 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_pct, 0, 0.350 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_total_count, 0, 1617661 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_total_pct, 0, 0.350 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_count, 0, 2573508 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_pct, 0, 0.556 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_count, 0, 2573508 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_pct, 0, 0.556 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_count, 0, 996 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_pct, 0, 0.000 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_count, 0, 996 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_total_pct, 0, 0.000 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_count, 0, 13315714 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_pct, 0, 2.935 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_count, 0, 13315714 | |
| MAP_STAGE_INT_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_pct, 0, 2.935 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_count, 0, 1631881 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_pct, 0, 0.360 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_count, 0, 1631881 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_TOTAL_CONSUMED_ONPATH_total_pct, 0, 0.360 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_count, 0, 7530911 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_pct, 0, 1.660 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_count, 0, 7530911 | |
| MAP_STAGE_INT_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_pct, 0, 1.660 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_count, 0, 1617217 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_pct, 0, 0.356 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_count, 0, 1617217 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_MULTI_CONSUMED_ONPATH_total_pct, 0, 0.356 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_count, 0, 2520777 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_pct, 0, 0.556 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_count, 0, 2520777 | |
| MAP_STAGE_INT_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_pct, 0, 0.556 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_count, 0, 893 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_pct, 0, 0.000 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_count, 0, 893 | |
| MAP_STAGE_VEC_REG_ISSUE_READ_SAME_CYCLE_CONSUMED_ONPATH_total_pct, 0, 0.000 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_EMPTY_count, 0, 1942635249 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_EMPTY_total_count, 0, 1942635249 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_EMPTY_count, 0, 1700024 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_EMPTY_total_count, 0, 1700024 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_IN_USE_count, 0, 3657345075 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_IN_USE_total_count, 0, 3657345075 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_IN_USE_count, 0, 57243489 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_IN_USE_total_count, 0, 57243489 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_SPEC_RELEASE_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_SPEC_RELEASE_total_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_SPEC_RELEASE_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_SPEC_RELEASE_total_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_NONSPEC_RELEASE_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_NONSPEC_RELEASE_total_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_NONSPEC_RELEASE_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_NONSPEC_RELEASE_total_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_TOTAL_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_LIFECYCLE_TOTAL_total_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_TOTAL_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_LIFECYCLE_TOTAL_total_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_NONBRANCH_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_NONBRANCH_total_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONBRANCH_count, 0, 14715 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONBRANCH_total_count, 0, 14715 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_NONEXCEPT_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_NONEXCEPT_total_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONEXCEPT_count, 0, 14715 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_NONEXCEPT_total_count, 0, 14715 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_ATOMIC_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_INT_REG_NUM_ATOMIC_total_count, 0, 7845530 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_ATOMIC_count, 0, 14715 | |
| MAP_STAGE_ONPATH_VEC_REG_NUM_ATOMIC_total_count, 0, 14715 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_pct, 0, 664.752 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_pct, 0, 664.752 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_pct, 0, 10325.054 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_REDEFINED_DIST_TOTAL_total_pct, 0, 10325.054 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_count, 0, 3657345075 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_pct, 0, 466.169 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_count, 0, 3657345075 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_pct, 0, 466.169 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_count, 0, 57243489 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_pct, 0, 3890.145 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_count, 0, 57243489 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_CONSUMED_DIST_TOTAL_total_pct, 0, 3890.145 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_pct, 0, 664.752 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_total_count, 0, 5215333692 | |
| MAP_STAGE_ONPATH_INT_REG_ATOMIC_RELEASE_DIST_TOTAL_total_pct, 0, 664.752 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_pct, 0, 10325.054 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_total_count, 0, 151933163 | |
| MAP_STAGE_ONPATH_VEC_REG_ATOMIC_RELEASE_DIST_TOTAL_total_pct, 0, 10325.054 | |
| EXEC_STAGE_STARVED_count, 414, 1257064 | |
| EXEC_STAGE_STARVED_total_count, 414, 1257064 | |
| EXEC_STAGE_NOT_STARVED_count, 414, 38896800 | |
| EXEC_STAGE_NOT_STARVED_total_count, 414, 38896800 | |
| EXEC_STAGE_OFF_PATH_count, 414, 194050 | |
| EXEC_STAGE_OFF_PATH_total_count, 414, 194050 | |
| FU_BUSY_0_count, 0, 1655134 | |
| FU_BUSY_0_total_count, 0, 1655134 | |
| FU_BUSY_1_count, 0, 1347966 | |
| FU_BUSY_1_total_count, 0, 1347966 | |
| FU_BUSY_2_count, 0, 318031 | |
| FU_BUSY_2_total_count, 0, 318031 | |
| FU_BUSY_3_count, 0, 316520 | |
| FU_BUSY_3_total_count, 0, 316520 | |
| FU_BUSY_4_count, 0, 1280570 | |
| FU_BUSY_4_total_count, 0, 1280570 | |
| FU_BUSY_5_count, 0, 1831984 | |
| FU_BUSY_5_total_count, 0, 1831984 | |
| FU_BUSY_6_count, 0, 39200472 | |
| FU_BUSY_6_total_count, 0, 39200472 | |
| FU_BUSY_7_count, 0, 39201377 | |
| FU_BUSY_7_total_count, 0, 39201377 | |
| FU_BUSY_8_count, 0, 1341400 | |
| FU_BUSY_8_total_count, 0, 1341400 | |
| FU_BUSY_9_count, 0, 314776 | |
| FU_BUSY_9_total_count, 0, 314776 | |
| FU_BUSY_10_count, 0, 0 | |
| FU_BUSY_10_total_count, 0, 0 | |
| FU_BUSY_11_count, 0, 0 | |
| FU_BUSY_11_total_count, 0, 0 | |
| FU_BUSY_12_count, 0, 0 | |
| FU_BUSY_12_total_count, 0, 0 | |
| FU_BUSY_13_count, 0, 0 | |
| FU_BUSY_13_total_count, 0, 0 | |
| FU_BUSY_14_count, 0, 0 | |
| FU_BUSY_14_total_count, 0, 0 | |
| FU_BUSY_15_count, 0, 0 | |
| FU_BUSY_15_total_count, 0, 0 | |
| FU_BUSY_16_count, 0, 0 | |
| FU_BUSY_16_total_count, 0, 0 | |
| FU_BUSY_17_count, 0, 0 | |
| FU_BUSY_17_total_count, 0, 0 | |
| FU_BUSY_18_count, 0, 0 | |
| FU_BUSY_18_total_count, 0, 0 | |
| FU_BUSY_19_count, 0, 0 | |
| FU_BUSY_19_total_count, 0, 0 | |
| FU_BUSY_20_count, 0, 0 | |
| FU_BUSY_20_total_count, 0, 0 | |
| FU_BUSY_21_count, 0, 0 | |
| FU_BUSY_21_total_count, 0, 0 | |
| FU_BUSY_22_count, 0, 0 | |
| FU_BUSY_22_total_count, 0, 0 | |
| FU_BUSY_23_count, 0, 0 | |
| FU_BUSY_23_total_count, 0, 0 | |
| FU_BUSY_24_count, 0, 0 | |
| FU_BUSY_24_total_count, 0, 0 | |
| FU_BUSY_25_count, 0, 0 | |
| FU_BUSY_25_total_count, 0, 0 | |
| FU_BUSY_26_count, 0, 0 | |
| FU_BUSY_26_total_count, 0, 0 | |
| FU_BUSY_27_count, 0, 0 | |
| FU_BUSY_27_total_count, 0, 0 | |
| FU_BUSY_28_count, 0, 0 | |
| FU_BUSY_28_total_count, 0, 0 | |
| FU_BUSY_29_count, 0, 0 | |
| FU_BUSY_29_total_count, 0, 0 | |
| FU_BUSY_30_count, 0, 0 | |
| FU_BUSY_30_total_count, 0, 0 | |
| FU_BUSY_31_count, 0, 0 | |
| FU_BUSY_31_total_count, 0, 0 | |
| FU_REJECTED_OP_INV_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_INV_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_NOP_NOT_SIMD_count, 415, 274 | |
| FU_REJECTED_OP_NOP_NOT_SIMD_total_count, 415, 274 | |
| FU_REJECTED_OP_CF_NOT_SIMD_count, 415, 1047 | |
| FU_REJECTED_OP_CF_NOT_SIMD_total_count, 415, 1047 | |
| FU_REJECTED_OP_MOV_NOT_SIMD_count, 415, 575 | |
| FU_REJECTED_OP_MOV_NOT_SIMD_total_count, 415, 575 | |
| FU_REJECTED_OP_CMOV_NOT_SIMD_count, 415, 5 | |
| FU_REJECTED_OP_CMOV_NOT_SIMD_total_count, 415, 5 | |
| FU_REJECTED_OP_LDA_NOT_SIMD_count, 415, 76 | |
| FU_REJECTED_OP_LDA_NOT_SIMD_total_count, 415, 76 | |
| FU_REJECTED_OP_IMEM_NOT_SIMD_count, 415, 141014 | |
| FU_REJECTED_OP_IMEM_NOT_SIMD_total_count, 415, 141014 | |
| FU_REJECTED_OP_IADD_NOT_SIMD_count, 415, 23868761 | |
| FU_REJECTED_OP_IADD_NOT_SIMD_total_count, 415, 23868761 | |
| FU_REJECTED_OP_IMUL_NOT_SIMD_count, 415, 1184 | |
| FU_REJECTED_OP_IMUL_NOT_SIMD_total_count, 415, 1184 | |
| FU_REJECTED_OP_IDIV_NOT_SIMD_count, 415, 37 | |
| FU_REJECTED_OP_IDIV_NOT_SIMD_total_count, 415, 37 | |
| FU_REJECTED_OP_ICMP_NOT_SIMD_count, 415, 24 | |
| FU_REJECTED_OP_ICMP_NOT_SIMD_total_count, 415, 24 | |
| FU_REJECTED_OP_LOGIC_NOT_SIMD_count, 415, 269 | |
| FU_REJECTED_OP_LOGIC_NOT_SIMD_total_count, 415, 269 | |
| FU_REJECTED_OP_SHIFT_NOT_SIMD_count, 415, 195 | |
| FU_REJECTED_OP_SHIFT_NOT_SIMD_total_count, 415, 195 | |
| FU_REJECTED_OP_FMEM_NOT_SIMD_count, 415, 149 | |
| FU_REJECTED_OP_FMEM_NOT_SIMD_total_count, 415, 149 | |
| FU_REJECTED_OP_FCVT_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FCVT_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FADD_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FADD_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FMUL_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FMUL_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FMA_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FMA_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FDIV_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FDIV_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FCMP_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FCMP_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FCMOV_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FCMOV_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_GATHER_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_GATHER_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_SCATTER_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_SCATTER_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_FAST_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_FAST_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_MEDIUM_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_MEDIUM_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_SLOW_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_SLOW_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_NOT_SIMD_count, 415, 1 | |
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_NOT_SIMD_total_count, 415, 1 | |
| FU_REJECTED_OP_NOTPIPELINED_SLOW_NOT_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_SLOW_NOT_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_NOT_SIMD_count, 415, 25 | |
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_NOT_SIMD_total_count, 415, 25 | |
| FU_REJECTED_OP_INV_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_INV_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_NOP_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_NOP_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_CF_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_CF_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_MOV_SIMD_count, 415, 7 | |
| FU_REJECTED_OP_MOV_SIMD_total_count, 415, 7 | |
| FU_REJECTED_OP_CMOV_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_CMOV_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_LDA_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_LDA_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_IMEM_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_IMEM_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_IADD_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_IADD_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_IMUL_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_IMUL_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_IDIV_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_IDIV_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_ICMP_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_ICMP_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_LOGIC_SIMD_count, 415, 2 | |
| FU_REJECTED_OP_LOGIC_SIMD_total_count, 415, 2 | |
| FU_REJECTED_OP_SHIFT_SIMD_count, 415, 2 | |
| FU_REJECTED_OP_SHIFT_SIMD_total_count, 415, 2 | |
| FU_REJECTED_OP_FMEM_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FMEM_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FCVT_SIMD_count, 415, 10478 | |
| FU_REJECTED_OP_FCVT_SIMD_total_count, 415, 10478 | |
| FU_REJECTED_OP_FADD_SIMD_count, 415, 51809788 | |
| FU_REJECTED_OP_FADD_SIMD_total_count, 415, 51809788 | |
| FU_REJECTED_OP_FMUL_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FMUL_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FMA_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FMA_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FDIV_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FDIV_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FCMP_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FCMP_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_FCMOV_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_FCMOV_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_GATHER_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_GATHER_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_SCATTER_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_SCATTER_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_FAST_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_FAST_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_MEDIUM_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_MEDIUM_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_PIPELINED_SLOW_SIMD_count, 415, 30 | |
| FU_REJECTED_OP_PIPELINED_SLOW_SIMD_total_count, 415, 30 | |
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_MEDIUM_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_SLOW_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_SLOW_SIMD_total_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_SIMD_count, 415, 0 | |
| FU_REJECTED_OP_NOTPIPELINED_VERY_SLOW_SIMD_total_count, 415, 0 | |
| LSQ_FULL_TOTAL_count, 0, 26284832 | |
| LSQ_FULL_TOTAL_total_count, 0, 26284832 | |
| LSQ_FULL_LOAD_QUEUE_count, 0, 0 | |
| LSQ_FULL_LOAD_QUEUE_total_count, 0, 0 | |
| LSQ_FULL_STORE_QUEUE_count, 0, 26284832 | |
| LSQ_FULL_STORE_QUEUE_total_count, 0, 26284832 | |
| OP_WAIT_0_count, 0, 5677861 | |
| OP_WAIT_0_total_count, 0, 5677861 | |
| OP_WAIT_1_count, 0, 570022 | |
| OP_WAIT_1_total_count, 0, 570022 | |
| OP_WAIT_2_count, 0, 151159 | |
| OP_WAIT_2_total_count, 0, 151159 | |
| OP_WAIT_3_count, 0, 116930 | |
| OP_WAIT_3_total_count, 0, 116930 | |
| OP_WAIT_4_count, 0, 64613 | |
| OP_WAIT_4_total_count, 0, 64613 | |
| OP_WAIT_5_count, 0, 48705 | |
| OP_WAIT_5_total_count, 0, 48705 | |
| OP_WAIT_6_count, 0, 47018 | |
| OP_WAIT_6_total_count, 0, 47018 | |
| OP_WAIT_7_count, 0, 30696 | |
| OP_WAIT_7_total_count, 0, 30696 | |
| OP_WAIT_8_count, 0, 50273 | |
| OP_WAIT_8_total_count, 0, 50273 | |
| OP_WAIT_9_count, 0, 56274 | |
| OP_WAIT_9_total_count, 0, 56274 | |
| OP_WAIT_10_count, 0, 80620 | |
| OP_WAIT_10_total_count, 0, 80620 | |
| OP_WAIT_11_count, 0, 24188 | |
| OP_WAIT_11_total_count, 0, 24188 | |
| OP_WAIT_12_count, 0, 232493 | |
| OP_WAIT_12_total_count, 0, 232493 | |
| OP_WAIT_13_count, 0, 49112 | |
| OP_WAIT_13_total_count, 0, 49112 | |
| OP_WAIT_14_count, 0, 380510 | |
| OP_WAIT_14_total_count, 0, 380510 | |
| OP_WAIT_15_count, 0, 218826 | |
| OP_WAIT_15_total_count, 0, 218826 | |
| OP_WAIT_16_count, 0, 103101 | |
| OP_WAIT_16_total_count, 0, 103101 | |
| OP_WAIT_17_count, 0, 53905 | |
| OP_WAIT_17_total_count, 0, 53905 | |
| OP_WAIT_18_count, 0, 16768 | |
| OP_WAIT_18_total_count, 0, 16768 | |
| OP_WAIT_19_count, 0, 13826 | |
| OP_WAIT_19_total_count, 0, 13826 | |
| OP_WAIT_20_count, 0, 10023 | |
| OP_WAIT_20_total_count, 0, 10023 | |
| OP_WAIT_21_count, 0, 13578 | |
| OP_WAIT_21_total_count, 0, 13578 | |
| OP_WAIT_22_count, 0, 9910 | |
| OP_WAIT_22_total_count, 0, 9910 | |
| OP_WAIT_23_count, 0, 9546 | |
| OP_WAIT_23_total_count, 0, 9546 | |
| OP_WAIT_24_count, 0, 9559 | |
| OP_WAIT_24_total_count, 0, 9559 | |
| OP_WAIT_25_count, 0, 7703 | |
| OP_WAIT_25_total_count, 0, 7703 | |
| OP_WAIT_26_count, 0, 8334 | |
| OP_WAIT_26_total_count, 0, 8334 | |
| OP_WAIT_27_count, 0, 8778 | |
| OP_WAIT_27_total_count, 0, 8778 | |
| OP_WAIT_28_count, 0, 13791 | |
| OP_WAIT_28_total_count, 0, 13791 | |
| OP_WAIT_29_count, 0, 14736 | |
| OP_WAIT_29_total_count, 0, 14736 | |
| OP_WAIT_30_count, 0, 35126 | |
| OP_WAIT_30_total_count, 0, 35126 | |
| OP_WAIT_31_count, 0, 2454839 | |
| OP_WAIT_31_total_count, 0, 2454839 | |
| ROW_SIZE_0_count, 0, 37993796 | |
| ROW_SIZE_0_total_count, 0, 37993796 | |
| ROW_SIZE_1_count, 0, 570066 | |
| ROW_SIZE_1_total_count, 0, 570066 | |
| ROW_SIZE_2_count, 0, 91375 | |
| ROW_SIZE_2_total_count, 0, 91375 | |
| ROW_SIZE_3_count, 0, 47250 | |
| ROW_SIZE_3_total_count, 0, 47250 | |
| ROW_SIZE_4_count, 0, 193231 | |
| ROW_SIZE_4_total_count, 0, 193231 | |
| ROW_SIZE_5_count, 0, 76192 | |
| ROW_SIZE_5_total_count, 0, 76192 | |
| ROW_SIZE_6_count, 0, 93468 | |
| ROW_SIZE_6_total_count, 0, 93468 | |
| ROW_SIZE_7_count, 0, 53571 | |
| ROW_SIZE_7_total_count, 0, 53571 | |
| ROW_SIZE_8_count, 0, 949821 | |
| ROW_SIZE_8_total_count, 0, 949821 | |
| ROW_SIZE_9_count, 0, 0 | |
| ROW_SIZE_9_total_count, 0, 0 | |
| ROW_SIZE_10_count, 0, 0 | |
| ROW_SIZE_10_total_count, 0, 0 | |
| ROW_SIZE_11_count, 0, 0 | |
| ROW_SIZE_11_total_count, 0, 0 | |
| ROW_SIZE_12_count, 0, 0 | |
| ROW_SIZE_12_total_count, 0, 0 | |
| ROW_SIZE_13_count, 0, 0 | |
| ROW_SIZE_13_total_count, 0, 0 | |
| ROW_SIZE_14_count, 0, 0 | |
| ROW_SIZE_14_total_count, 0, 0 | |
| ROW_SIZE_15_count, 0, 0 | |
| ROW_SIZE_15_total_count, 0, 0 | |
| ROW_SIZE_16_count, 0, 0 | |
| ROW_SIZE_16_total_count, 0, 0 | |
| ROW_SIZE_17_count, 0, 0 | |
| ROW_SIZE_17_total_count, 0, 0 | |
| ROW_SIZE_18_count, 0, 0 | |
| ROW_SIZE_18_total_count, 0, 0 | |
| ROW_SIZE_19_count, 0, 0 | |
| ROW_SIZE_19_total_count, 0, 0 | |
| ROW_SIZE_20_count, 0, 0 | |
| ROW_SIZE_20_total_count, 0, 0 | |
| ROW_SIZE_21_count, 0, 0 | |
| ROW_SIZE_21_total_count, 0, 0 | |
| ROW_SIZE_22_count, 0, 0 | |
| ROW_SIZE_22_total_count, 0, 0 | |
| ROW_SIZE_23_count, 0, 0 | |
| ROW_SIZE_23_total_count, 0, 0 | |
| ROW_SIZE_24_count, 0, 0 | |
| ROW_SIZE_24_total_count, 0, 0 | |
| ROW_SIZE_25_count, 0, 0 | |
| ROW_SIZE_25_total_count, 0, 0 | |
| ROW_SIZE_26_count, 0, 0 | |
| ROW_SIZE_26_total_count, 0, 0 | |
| ROW_SIZE_27_count, 0, 0 | |
| ROW_SIZE_27_total_count, 0, 0 | |
| ROW_SIZE_28_count, 0, 0 | |
| ROW_SIZE_28_total_count, 0, 0 | |
| ROW_SIZE_29_count, 0, 0 | |
| ROW_SIZE_29_total_count, 0, 0 | |
| ROW_SIZE_30_count, 0, 0 | |
| ROW_SIZE_30_total_count, 0, 0 | |
| ROW_SIZE_31_count, 0, 0 | |
| ROW_SIZE_31_total_count, 0, 0 | |
| RET_OP_EXEC_COUNT_0_count, 416, 0 | |
| RET_OP_EXEC_COUNT_0_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_1_count, 416, 10582823 | |
| RET_OP_EXEC_COUNT_1_total_count, 416, 10582823 | |
| RET_OP_EXEC_COUNT_2_count, 416, 0 | |
| RET_OP_EXEC_COUNT_2_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_3_count, 416, 0 | |
| RET_OP_EXEC_COUNT_3_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_4_count, 416, 0 | |
| RET_OP_EXEC_COUNT_4_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_5_count, 416, 0 | |
| RET_OP_EXEC_COUNT_5_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_6_count, 416, 0 | |
| RET_OP_EXEC_COUNT_6_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_7_count, 416, 0 | |
| RET_OP_EXEC_COUNT_7_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_8_count, 416, 0 | |
| RET_OP_EXEC_COUNT_8_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_9_count, 416, 0 | |
| RET_OP_EXEC_COUNT_9_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_10_count, 416, 0 | |
| RET_OP_EXEC_COUNT_10_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_11_count, 416, 0 | |
| RET_OP_EXEC_COUNT_11_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_12_count, 416, 0 | |
| RET_OP_EXEC_COUNT_12_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_13_count, 416, 0 | |
| RET_OP_EXEC_COUNT_13_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_14_count, 416, 0 | |
| RET_OP_EXEC_COUNT_14_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_15_count, 416, 0 | |
| RET_OP_EXEC_COUNT_15_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_16_count, 416, 0 | |
| RET_OP_EXEC_COUNT_16_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_17_count, 416, 0 | |
| RET_OP_EXEC_COUNT_17_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_18_count, 416, 0 | |
| RET_OP_EXEC_COUNT_18_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_19_count, 416, 0 | |
| RET_OP_EXEC_COUNT_19_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_20_count, 416, 0 | |
| RET_OP_EXEC_COUNT_20_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_21_count, 416, 0 | |
| RET_OP_EXEC_COUNT_21_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_22_count, 416, 0 | |
| RET_OP_EXEC_COUNT_22_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_23_count, 416, 0 | |
| RET_OP_EXEC_COUNT_23_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_24_count, 416, 0 | |
| RET_OP_EXEC_COUNT_24_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_25_count, 416, 0 | |
| RET_OP_EXEC_COUNT_25_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_26_count, 416, 0 | |
| RET_OP_EXEC_COUNT_26_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_27_count, 416, 0 | |
| RET_OP_EXEC_COUNT_27_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_28_count, 416, 0 | |
| RET_OP_EXEC_COUNT_28_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_29_count, 416, 0 | |
| RET_OP_EXEC_COUNT_29_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_30_count, 416, 0 | |
| RET_OP_EXEC_COUNT_30_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_31_count, 416, 0 | |
| RET_OP_EXEC_COUNT_31_total_count, 416, 0 | |
| RET_OP_EXEC_COUNT_32_count, 416, 0 | |
| RET_OP_EXEC_COUNT_32_total_count, 416, 0 | |
| RET_STALL_LENGTH_0_count, 417, 10532058 | |
| RET_STALL_LENGTH_0_total_count, 417, 10532058 | |
| RET_STALL_LENGTH_100_count, 417, 2544 | |
| RET_STALL_LENGTH_100_total_count, 417, 2544 | |
| RET_STALL_LENGTH_200_count, 417, 271 | |
| RET_STALL_LENGTH_200_total_count, 417, 271 | |
| RET_STALL_LENGTH_300_count, 417, 2816 | |
| RET_STALL_LENGTH_300_total_count, 417, 2816 | |
| RET_STALL_LENGTH_400_count, 417, 21475 | |
| RET_STALL_LENGTH_400_total_count, 417, 21475 | |
| RET_STALL_LENGTH_500_count, 417, 18019 | |
| RET_STALL_LENGTH_500_total_count, 417, 18019 | |
| RET_STALL_LENGTH_600_count, 417, 1661 | |
| RET_STALL_LENGTH_600_total_count, 417, 1661 | |
| RET_STALL_LENGTH_700_count, 417, 1958 | |
| RET_STALL_LENGTH_700_total_count, 417, 1958 | |
| RET_STALL_LENGTH_800_count, 417, 265 | |
| RET_STALL_LENGTH_800_total_count, 417, 265 | |
| RET_STALL_LENGTH_900_count, 417, 145 | |
| RET_STALL_LENGTH_900_total_count, 417, 145 | |
| RET_STALL_LENGTH_1000_count, 417, 8 | |
| RET_STALL_LENGTH_1000_total_count, 417, 8 | |
| RET_STALL_LENGTH_1100_count, 417, 9 | |
| RET_STALL_LENGTH_1100_total_count, 417, 9 | |
| RET_STALL_LENGTH_1200_count, 417, 420 | |
| RET_STALL_LENGTH_1200_total_count, 417, 420 | |
| RET_STALL_LENGTH_1300_count, 417, 148 | |
| RET_STALL_LENGTH_1300_total_count, 417, 148 | |
| RET_STALL_LENGTH_1400_count, 417, 14 | |
| RET_STALL_LENGTH_1400_total_count, 417, 14 | |
| RET_STALL_LENGTH_1500_count, 417, 44 | |
| RET_STALL_LENGTH_1500_total_count, 417, 44 | |
| RET_STALL_LENGTH_1600_count, 417, 226 | |
| RET_STALL_LENGTH_1600_total_count, 417, 226 | |
| RET_STALL_LENGTH_1700_count, 417, 481 | |
| RET_STALL_LENGTH_1700_total_count, 417, 481 | |
| RET_STALL_LENGTH_1800_count, 417, 190 | |
| RET_STALL_LENGTH_1800_total_count, 417, 190 | |
| RET_STALL_LENGTH_1900_count, 417, 23 | |
| RET_STALL_LENGTH_1900_total_count, 417, 23 | |
| RET_STALL_LENGTH_2000_count, 417, 40 | |
| RET_STALL_LENGTH_2000_total_count, 417, 40 | |
| RET_STALL_LENGTH_2100_count, 417, 5 | |
| RET_STALL_LENGTH_2100_total_count, 417, 5 | |
| RET_STALL_LENGTH_2200_count, 417, 1 | |
| RET_STALL_LENGTH_2200_total_count, 417, 1 | |
| RET_STALL_LENGTH_2300_count, 417, 1 | |
| RET_STALL_LENGTH_2300_total_count, 417, 1 | |
| RET_STALL_LENGTH_2400_count, 417, 0 | |
| RET_STALL_LENGTH_2400_total_count, 417, 0 | |
| RET_STALL_LENGTH_2500_count, 417, 1 | |
| RET_STALL_LENGTH_2500_total_count, 417, 1 | |
| RET_STALL_LENGTH_2600_count, 417, 0 | |
| RET_STALL_LENGTH_2600_total_count, 417, 0 | |
| RET_STALL_LENGTH_2700_count, 417, 0 | |
| RET_STALL_LENGTH_2700_total_count, 417, 0 | |
| RET_STALL_LENGTH_2800_count, 417, 0 | |
| RET_STALL_LENGTH_2800_total_count, 417, 0 | |
| RET_STALL_LENGTH_2900_count, 417, 0 | |
| RET_STALL_LENGTH_2900_total_count, 417, 0 | |
| RET_STALL_LENGTH_3000_count, 417, 0 | |
| RET_STALL_LENGTH_3000_total_count, 417, 0 | |
| RET_STALL_LENGTH_3100_count, 417, 0 | |
| RET_STALL_LENGTH_3100_total_count, 417, 0 | |
| RET_STALL_LENGTH_3200_count, 417, 0 | |
| RET_STALL_LENGTH_3200_total_count, 417, 0 | |
| RET_STALL_LENGTH_3300_count, 417, 0 | |
| RET_STALL_LENGTH_3300_total_count, 417, 0 | |
| RET_STALL_LENGTH_3400_count, 417, 0 | |
| RET_STALL_LENGTH_3400_total_count, 417, 0 | |
| RET_STALL_LENGTH_3500_count, 417, 0 | |
| RET_STALL_LENGTH_3500_total_count, 417, 0 | |
| RET_STALL_LENGTH_3600_count, 417, 0 | |
| RET_STALL_LENGTH_3600_total_count, 417, 0 | |
| RET_STALL_LENGTH_3700_count, 417, 0 | |
| RET_STALL_LENGTH_3700_total_count, 417, 0 | |
| RET_STALL_LENGTH_3800_count, 417, 0 | |
| RET_STALL_LENGTH_3800_total_count, 417, 0 | |
| RET_STALL_LENGTH_3900_count, 417, 0 | |
| RET_STALL_LENGTH_3900_total_count, 417, 0 | |
| RET_STALL_LENGTH_4000_count, 417, 0 | |
| RET_STALL_LENGTH_4000_total_count, 417, 0 | |
| RET_STALL_LENGTH_4100_count, 417, 0 | |
| RET_STALL_LENGTH_4100_total_count, 417, 0 | |
| RET_STALL_LENGTH_4200_count, 417, 0 | |
| RET_STALL_LENGTH_4200_total_count, 417, 0 | |
| RET_STALL_LENGTH_4300_count, 417, 0 | |
| RET_STALL_LENGTH_4300_total_count, 417, 0 | |
| RET_STALL_LENGTH_4400_count, 417, 0 | |
| RET_STALL_LENGTH_4400_total_count, 417, 0 | |
| RET_STALL_LENGTH_4500_count, 417, 0 | |
| RET_STALL_LENGTH_4500_total_count, 417, 0 | |
| RET_STALL_LENGTH_4600_count, 417, 0 | |
| RET_STALL_LENGTH_4600_total_count, 417, 0 | |
| RET_STALL_LENGTH_4700_count, 417, 0 | |
| RET_STALL_LENGTH_4700_total_count, 417, 0 | |
| RET_STALL_LENGTH_4800_count, 417, 0 | |
| RET_STALL_LENGTH_4800_total_count, 417, 0 | |
| RET_STALL_LENGTH_4900_count, 417, 0 | |
| RET_STALL_LENGTH_4900_total_count, 417, 0 | |
| RET_STALL_LENGTH_5000_count, 417, 0 | |
| RET_STALL_LENGTH_5000_total_count, 417, 0 | |
| MEM_BLOCK_LENGTH_0_count, 418, 58073 | |
| MEM_BLOCK_LENGTH_0_total_count, 418, 58073 | |
| MEM_BLOCK_LENGTH_100_count, 418, 3355 | |
| MEM_BLOCK_LENGTH_100_total_count, 418, 3355 | |
| MEM_BLOCK_LENGTH_200_count, 418, 7771 | |
| MEM_BLOCK_LENGTH_200_total_count, 418, 7771 | |
| MEM_BLOCK_LENGTH_300_count, 418, 274 | |
| MEM_BLOCK_LENGTH_300_total_count, 418, 274 | |
| MEM_BLOCK_LENGTH_400_count, 418, 5554 | |
| MEM_BLOCK_LENGTH_400_total_count, 418, 5554 | |
| MEM_BLOCK_LENGTH_500_count, 418, 9791 | |
| MEM_BLOCK_LENGTH_500_total_count, 418, 9791 | |
| MEM_BLOCK_LENGTH_600_count, 418, 6773 | |
| MEM_BLOCK_LENGTH_600_total_count, 418, 6773 | |
| MEM_BLOCK_LENGTH_700_count, 418, 6247 | |
| MEM_BLOCK_LENGTH_700_total_count, 418, 6247 | |
| MEM_BLOCK_LENGTH_800_count, 418, 5249 | |
| MEM_BLOCK_LENGTH_800_total_count, 418, 5249 | |
| MEM_BLOCK_LENGTH_900_count, 418, 2010 | |
| MEM_BLOCK_LENGTH_900_total_count, 418, 2010 | |
| MEM_BLOCK_LENGTH_1000_count, 418, 465 | |
| MEM_BLOCK_LENGTH_1000_total_count, 418, 465 | |
| MEM_BLOCK_LENGTH_1100_count, 418, 199 | |
| MEM_BLOCK_LENGTH_1100_total_count, 418, 199 | |
| MEM_BLOCK_LENGTH_1200_count, 418, 192 | |
| MEM_BLOCK_LENGTH_1200_total_count, 418, 192 | |
| MEM_BLOCK_LENGTH_1300_count, 418, 611 | |
| MEM_BLOCK_LENGTH_1300_total_count, 418, 611 | |
| MEM_BLOCK_LENGTH_1400_count, 418, 590 | |
| MEM_BLOCK_LENGTH_1400_total_count, 418, 590 | |
| MEM_BLOCK_LENGTH_1500_count, 418, 573 | |
| MEM_BLOCK_LENGTH_1500_total_count, 418, 573 | |
| MEM_BLOCK_LENGTH_1600_count, 418, 417 | |
| MEM_BLOCK_LENGTH_1600_total_count, 418, 417 | |
| MEM_BLOCK_LENGTH_1700_count, 418, 349 | |
| MEM_BLOCK_LENGTH_1700_total_count, 418, 349 | |
| MEM_BLOCK_LENGTH_1800_count, 418, 256 | |
| MEM_BLOCK_LENGTH_1800_total_count, 418, 256 | |
| MEM_BLOCK_LENGTH_1900_count, 418, 224 | |
| MEM_BLOCK_LENGTH_1900_total_count, 418, 224 | |
| MEM_BLOCK_LENGTH_2000_count, 418, 261 | |
| MEM_BLOCK_LENGTH_2000_total_count, 418, 261 | |
| MEM_BLOCK_LENGTH_2100_count, 418, 233 | |
| MEM_BLOCK_LENGTH_2100_total_count, 418, 233 | |
| MEM_BLOCK_LENGTH_2200_count, 418, 133 | |
| MEM_BLOCK_LENGTH_2200_total_count, 418, 133 | |
| MEM_BLOCK_LENGTH_2300_count, 418, 118 | |
| MEM_BLOCK_LENGTH_2300_total_count, 418, 118 | |
| MEM_BLOCK_LENGTH_2400_count, 418, 109 | |
| MEM_BLOCK_LENGTH_2400_total_count, 418, 109 | |
| MEM_BLOCK_LENGTH_2500_count, 418, 88 | |
| MEM_BLOCK_LENGTH_2500_total_count, 418, 88 | |
| MEM_BLOCK_LENGTH_2600_count, 418, 50 | |
| MEM_BLOCK_LENGTH_2600_total_count, 418, 50 | |
| MEM_BLOCK_LENGTH_2700_count, 418, 51 | |
| MEM_BLOCK_LENGTH_2700_total_count, 418, 51 | |
| MEM_BLOCK_LENGTH_2800_count, 418, 61 | |
| MEM_BLOCK_LENGTH_2800_total_count, 418, 61 | |
| MEM_BLOCK_LENGTH_2900_count, 418, 56 | |
| MEM_BLOCK_LENGTH_2900_total_count, 418, 56 | |
| MEM_BLOCK_LENGTH_3000_count, 418, 53 | |
| MEM_BLOCK_LENGTH_3000_total_count, 418, 53 | |
| MEM_BLOCK_LENGTH_3100_count, 418, 52 | |
| MEM_BLOCK_LENGTH_3100_total_count, 418, 52 | |
| MEM_BLOCK_LENGTH_3200_count, 418, 61 | |
| MEM_BLOCK_LENGTH_3200_total_count, 418, 61 | |
| MEM_BLOCK_LENGTH_3300_count, 418, 60 | |
| MEM_BLOCK_LENGTH_3300_total_count, 418, 60 | |
| MEM_BLOCK_LENGTH_3400_count, 418, 33 | |
| MEM_BLOCK_LENGTH_3400_total_count, 418, 33 | |
| MEM_BLOCK_LENGTH_3500_count, 418, 27 | |
| MEM_BLOCK_LENGTH_3500_total_count, 418, 27 | |
| MEM_BLOCK_LENGTH_3600_count, 418, 39 | |
| MEM_BLOCK_LENGTH_3600_total_count, 418, 39 | |
| MEM_BLOCK_LENGTH_3700_count, 418, 23 | |
| MEM_BLOCK_LENGTH_3700_total_count, 418, 23 | |
| MEM_BLOCK_LENGTH_3800_count, 418, 29 | |
| MEM_BLOCK_LENGTH_3800_total_count, 418, 29 | |
| MEM_BLOCK_LENGTH_3900_count, 418, 26 | |
| MEM_BLOCK_LENGTH_3900_total_count, 418, 26 | |
| MEM_BLOCK_LENGTH_4000_count, 418, 26 | |
| MEM_BLOCK_LENGTH_4000_total_count, 418, 26 | |
| MEM_BLOCK_LENGTH_4100_count, 418, 15 | |
| MEM_BLOCK_LENGTH_4100_total_count, 418, 15 | |
| MEM_BLOCK_LENGTH_4200_count, 418, 22 | |
| MEM_BLOCK_LENGTH_4200_total_count, 418, 22 | |
| MEM_BLOCK_LENGTH_4300_count, 418, 8 | |
| MEM_BLOCK_LENGTH_4300_total_count, 418, 8 | |
| MEM_BLOCK_LENGTH_4400_count, 418, 13 | |
| MEM_BLOCK_LENGTH_4400_total_count, 418, 13 | |
| MEM_BLOCK_LENGTH_4500_count, 418, 14 | |
| MEM_BLOCK_LENGTH_4500_total_count, 418, 14 | |
| MEM_BLOCK_LENGTH_4600_count, 418, 10 | |
| MEM_BLOCK_LENGTH_4600_total_count, 418, 10 | |
| MEM_BLOCK_LENGTH_4700_count, 418, 19 | |
| MEM_BLOCK_LENGTH_4700_total_count, 418, 19 | |
| MEM_BLOCK_LENGTH_4800_count, 418, 9 | |
| MEM_BLOCK_LENGTH_4800_total_count, 418, 9 | |
| MEM_BLOCK_LENGTH_4900_count, 418, 3 | |
| MEM_BLOCK_LENGTH_4900_total_count, 418, 3 | |
| MEM_BLOCK_LENGTH_5000_count, 418, 131 | |
| MEM_BLOCK_LENGTH_5000_total_count, 418, 131 | |
| FUS_BUSY_ON_PATH_count, 0, 86516883 | |
| FUS_BUSY_ON_PATH_pct, 0, 2.144 | |
| FUS_BUSY_ON_PATH_total_count, 0, 86516883 | |
| FUS_BUSY_ON_PATH_total_pct, 0, 2.144 | |
| FUS_BUSY_OFF_PATH_count, 0, 291347 | |
| FUS_BUSY_OFF_PATH_pct, 0, 0.007 | |
| FUS_BUSY_OFF_PATH_total_count, 0, 291347 | |
| FUS_BUSY_OFF_PATH_total_pct, 0, 0.007 | |
| FU_BUSY_MEM_STALL_count, 0, 75935643 | |
| FU_BUSY_MEM_STALL_pct, 0, 1.882 | |
| FU_BUSY_MEM_STALL_total_count, 0, 75935643 | |
| FU_BUSY_MEM_STALL_total_pct, 0, 1.882 | |
| FUS_EMPTY_count, 0, 316670910 | |
| FUS_EMPTY_pct, 0, 7.849 | |
| FUS_EMPTY_total_count, 0, 316670910 | |
| FUS_EMPTY_total_pct, 0, 7.849 | |
| FU_UNAVAILABLE_count, 0, 3987 | |
| FU_UNAVAILABLE_pct, 0, 0.000 | |
| FU_UNAVAILABLE_total_count, 0, 3987 | |
| FU_UNAVAILABLE_total_pct, 0, 0.000 | |
| FU_MEM_UNAVAILABLE_count, 0, 75829956 | |
| FU_MEM_UNAVAILABLE_pct, 0, 1.879 | |
| FU_MEM_UNAVAILABLE_total_count, 0, 75829956 | |
| FU_MEM_UNAVAILABLE_total_pct, 0, 1.879 | |
| FU_OTHER_UNAVAILABLE_count, 0, 0 | |
| FU_OTHER_UNAVAILABLE_pct, 0, 0.000 | |
| FU_OTHER_UNAVAILABLE_total_count, 0, 0 | |
| FU_OTHER_UNAVAILABLE_total_pct, 0, 0.000 | |
| FU_REPLAY_count, 0, 0 | |
| FU_REPLAY_pct, 0, 0.000 | |
| FU_REPLAY_total_count, 0, 0 | |
| FU_REPLAY_total_pct, 0, 0.000 | |
| FU_STARVED_count, 0, 316649459 | |
| FU_STARVED_pct, 0, 7.848 | |
| FU_STARVED_total_count, 0, 316649459 | |
| FU_STARVED_total_pct, 0, 7.848 | |
| CHIP_UTILIZATION_count, 0, 0 | |
| CHIP_UTILIZATION_pct, 0, 0.000 | |
| CHIP_UTILIZATION_total_count, 0, 0 | |
| CHIP_UTILIZATION_total_pct, 0, 0.000 | |
| CYCLES_UNDER_MEM_REQ_count, 0, 0 | |
| CYCLES_UNDER_MEM_REQ_total_count, 0, 0 | |
| CYCLES_UNDER_NO_MEM_REQ_count, 0, 0 | |
| CYCLES_UNDER_NO_MEM_REQ_total_count, 0, 0 | |
| CYCLES_UNDER_CRITICAL_MEM_REQ_count, 0, 0 | |
| CYCLES_UNDER_CRITICAL_MEM_REQ_total_count, 0, 0 | |
| CYCLES_UNDER_NONCRITICAL_MEM_REQ_count, 0, 0 | |
| CYCLES_UNDER_NONCRITICAL_MEM_REQ_total_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_MEM_REQ_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_MEM_REQ_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_MEM_REQ_total_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_MEM_REQ_total_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_total_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_NO_MEM_REQ_total_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_total_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_CRITICAL_MEM_REQ_total_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_pct, 0, -nan | |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_total_count, 0, 0 | |
| CHIP_UTILIZATION_UNDER_NONCRITICAL_MEM_REQ_total_pct, 0, -nan | |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_count, 0, 0 | |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_pct, 0, 0.000 | |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_total_count, 0, 0 | |
| CYCLES_NOT_WAITING_FOR_OFF_CHIP_total_pct, 0, 0.000 | |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_count, 0, 0 | |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_pct, 0, -nan | |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_total_count, 0, 0 | |
| FUS_BUSY_NOT_WAITING_FOR_OFF_CHIP_total_pct, 0, -nan | |
| CYCLES_WAITING_FOR_OFF_CHIP_count, 0, 0 | |
| CYCLES_WAITING_FOR_OFF_CHIP_pct, 0, 0.000 | |
| CYCLES_WAITING_FOR_OFF_CHIP_total_count, 0, 0 | |
| CYCLES_WAITING_FOR_OFF_CHIP_total_pct, 0, 0.000 | |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_count, 0, 0 | |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_pct, 0, -nan | |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_total_count, 0, 0 | |
| FUS_BUSY_WAITING_FOR_OFF_CHIP_total_pct, 0, -nan | |
| TOTAL_OFF_CHIP_DELAYS_LEFT_count, 0, 0 | |
| TOTAL_OFF_CHIP_DELAYS_LEFT_total_count, 0, 0 | |
| WRONG_IO_SCHED_count, 0, 0 | |
| WRONG_IO_SCHED_total_count, 0, 0 | |
| DVFS_CONFIG_SWITCH_count, 0, 0 | |
| DVFS_CONFIG_SWITCH_total_count, 0, 0 | |
| MAP_STAGE_RECEIVED_OPS_0_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_0_total_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_1_count, 419, 6747 | |
| MAP_STAGE_RECEIVED_OPS_1_total_count, 419, 6747 | |
| MAP_STAGE_RECEIVED_OPS_2_count, 419, 10641 | |
| MAP_STAGE_RECEIVED_OPS_2_total_count, 419, 10641 | |
| MAP_STAGE_RECEIVED_OPS_3_count, 419, 7320 | |
| MAP_STAGE_RECEIVED_OPS_3_total_count, 419, 7320 | |
| MAP_STAGE_RECEIVED_OPS_4_count, 419, 19820 | |
| MAP_STAGE_RECEIVED_OPS_4_total_count, 419, 19820 | |
| MAP_STAGE_RECEIVED_OPS_5_count, 419, 6569 | |
| MAP_STAGE_RECEIVED_OPS_5_total_count, 419, 6569 | |
| MAP_STAGE_RECEIVED_OPS_6_count, 419, 1734766 | |
| MAP_STAGE_RECEIVED_OPS_6_total_count, 419, 1734766 | |
| MAP_STAGE_RECEIVED_OPS_7_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_7_total_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_8_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_8_total_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_MAX_count, 419, 0 | |
| MAP_STAGE_RECEIVED_OPS_MAX_total_count, 419, 0 | |
| MAP_STAGE_WAIT_FOR_DECODE_count, 420, 0 | |
| MAP_STAGE_WAIT_FOR_DECODE_total_count, 420, 0 | |
| MAP_STAGE_CONSUME_DECODE_count, 420, 0 | |
| MAP_STAGE_CONSUME_DECODE_total_count, 420, 0 | |
| MAP_STAGE_WAIT_FOR_DECODE2_count, 421, 0 | |
| MAP_STAGE_WAIT_FOR_DECODE2_total_count, 421, 0 | |
| MAP_STAGE_CONSUME_DECODE2_count, 421, 0 | |
| MAP_STAGE_CONSUME_DECODE2_total_count, 421, 0 | |
| FTQ_RECOVER_EXEC_count, 0, 5736 | |
| FTQ_RECOVER_EXEC_total_count, 0, 5736 | |
| FTQ_RECOVER_DECODE_count, 0, 1725 | |
| FTQ_RECOVER_DECODE_total_count, 0, 1725 | |
| FTQ_OFFPATH_CYCLES_count, 0, 1015749 | |
| FTQ_OFFPATH_CYCLES_total_count, 0, 1015749 | |
| FTQ_CYCLES_OFFPATH_count, 0, 1015749 | |
| FTQ_CYCLES_OFFPATH_total_count, 0, 1015749 | |
| FTQ_CYCLES_ONPATH_count, 0, 39332165 | |
| FTQ_CYCLES_ONPATH_total_count, 0, 39332165 | |
| FTQ_FETCHED_INS_ONPATH_count, 0, 10583265 | |
| FTQ_FETCHED_INS_ONPATH_total_count, 0, 10583265 | |
| FTQ_FETCHED_INS_OFFPATH_count, 0, 3872476 | |
| FTQ_FETCHED_INS_OFFPATH_total_count, 0, 3872476 | |
| FTQ_BREAK_FULL_FT_ONPATH_count, 0, 39171220 | |
| FTQ_BREAK_FULL_FT_ONPATH_total_count, 0, 39171220 | |
| FTQ_BREAK_FULL_FT_OFFPATH_count, 0, 732884 | |
| FTQ_BREAK_FULL_FT_OFFPATH_total_count, 0, 732884 | |
| FTQ_BREAK_PRED_BR_ONPATH_count, 0, 0 | |
| FTQ_BREAK_PRED_BR_ONPATH_total_count, 0, 0 | |
| FTQ_BREAK_PRED_BR_OFFPATH_count, 0, 0 | |
| FTQ_BREAK_PRED_BR_OFFPATH_total_count, 0, 0 | |
| FTQ_BREAK_BAR_FETCH_ONPATH_count, 0, 0 | |
| FTQ_BREAK_BAR_FETCH_ONPATH_total_count, 0, 0 | |
| FTQ_BREAK_BAR_FETCH_OFFPATH_count, 0, 0 | |
| FTQ_BREAK_BAR_FETCH_OFFPATH_total_count, 0, 0 | |
| FTQ_BREAK_MAX_CFS_TAKEN_ONPATH_count, 0, 0 | |
| FTQ_BREAK_MAX_CFS_TAKEN_ONPATH_total_count, 0, 0 | |
| FTQ_BREAK_MAX_CFS_TAKEN_OFFPATH_count, 0, 0 | |
| FTQ_BREAK_MAX_CFS_TAKEN_OFFPATH_total_count, 0, 0 | |
| FTQ_BREAK_MAX_FT_ONPATH_count, 0, 160945 | |
| FTQ_BREAK_MAX_FT_ONPATH_total_count, 0, 160945 | |
| FTQ_BREAK_MAX_FT_OFFPATH_count, 0, 282865 | |
| FTQ_BREAK_MAX_FT_OFFPATH_total_count, 0, 282865 | |
| DFE_GEN_ON_PATH_FT_count, 0, 2000819 | |
| DFE_GEN_ON_PATH_FT_total_count, 0, 2000819 | |
| DFE_GEN_OFF_PATH_FT_count, 0, 317272 | |
| DFE_GEN_OFF_PATH_FT_total_count, 0, 317272 | |
| DFE_L0_ENABLED_PREDICTIONS_count, 0, 10583265 | |
| DFE_L0_ENABLED_PREDICTIONS_total_count, 0, 10583265 | |
| DFE_L0_WRONG_MAIN_CORRECT_count, 0, 51484 | |
| DFE_L0_WRONG_MAIN_CORRECT_total_count, 0, 51484 | |
| DFE_L0_WRONG_MAIN_WRONG_count, 0, 6194 | |
| DFE_L0_WRONG_MAIN_WRONG_total_count, 0, 6194 | |
| DFE_L0_CORRECT_MAIN_WRONG_count, 0, 1267 | |
| DFE_L0_CORRECT_MAIN_WRONG_total_count, 0, 1267 | |
| DFE_L0_CORRECT_MAIN_CORRECT_count, 0, 10524320 | |
| DFE_L0_CORRECT_MAIN_CORRECT_total_count, 0, 10524320 | |
| DFE_L0_WRONG_MAIN_CORRECT_RECOVERY_SCHEDULED_count, 0, 0 | |
| DFE_L0_WRONG_MAIN_CORRECT_RECOVERY_SCHEDULED_total_count, 0, 0 | |
| FTQ_SAW_BAR_FETCH_OFFPATH_count, 0, 730 | |
| FTQ_SAW_BAR_FETCH_OFFPATH_total_count, 0, 730 | |
| FTQ_SAW_BAR_FETCH_ONPATH_count, 0, 606 | |
| FTQ_SAW_BAR_FETCH_ONPATH_total_count, 0, 606 | |
| DFE_CONF_0_RECOVER_AT_EXEC_count, 422, 0 | |
| DFE_CONF_0_RECOVER_AT_EXEC_total_count, 422, 0 | |
| DFE_CONF_1_RECOVER_AT_EXEC_count, 422, 0 | |
| DFE_CONF_1_RECOVER_AT_EXEC_total_count, 422, 0 | |
| DFE_CONF_2_RECOVER_AT_EXEC_count, 422, 0 | |
| DFE_CONF_2_RECOVER_AT_EXEC_total_count, 422, 0 | |
| DFE_CONF_3_RECOVER_AT_EXEC_count, 422, 0 | |
| DFE_CONF_3_RECOVER_AT_EXEC_total_count, 422, 0 | |
| DFE_CONF_0_CORRECT_count, 422, 0 | |
| DFE_CONF_0_CORRECT_total_count, 422, 0 | |
| DFE_CONF_1_CORRECT_count, 422, 0 | |
| DFE_CONF_1_CORRECT_total_count, 422, 0 | |
| DFE_CONF_2_CORRECT_count, 422, 0 | |
| DFE_CONF_2_CORRECT_total_count, 422, 0 | |
| DFE_CONF_3_CORRECT_count, 422, 0 | |
| DFE_CONF_3_CORRECT_total_count, 422, 0 | |
| DFE_ON_CONF_ON_OPS_count, 423, 0 | |
| DFE_ON_CONF_ON_OPS_total_count, 423, 0 | |
| DFE_ON_CONF_OFF_OPS_count, 423, 0 | |
| DFE_ON_CONF_OFF_OPS_total_count, 423, 0 | |
| DFE_OFF_CONF_ON_OPS_count, 423, 0 | |
| DFE_OFF_CONF_ON_OPS_total_count, 423, 0 | |
| DFE_OFF_CONF_OFF_REALISTIC_OPS_count, 423, 0 | |
| DFE_OFF_CONF_OFF_REALISTIC_OPS_total_count, 423, 0 | |
| DFE_OFF_CONF_OFF_PERFECT_OPS_count, 423, 0 | |
| DFE_OFF_CONF_OFF_PERFECT_OPS_total_count, 423, 0 | |
| DFE_ON_CONF_ON_FETCH_TARGETS_count, 424, 0 | |
| DFE_ON_CONF_ON_FETCH_TARGETS_total_count, 424, 0 | |
| DFE_ON_CONF_OFF_FETCH_TARGETS_count, 424, 0 | |
| DFE_ON_CONF_OFF_FETCH_TARGETS_total_count, 424, 0 | |
| DFE_OFF_CONF_ON_FETCH_TARGETS_count, 424, 0 | |
| DFE_OFF_CONF_ON_FETCH_TARGETS_total_count, 424, 0 | |
| DFE_OFF_CONF_OFF_REALISTIC_FETCH_TARGETS_count, 424, 0 | |
| DFE_OFF_CONF_OFF_REALISTIC_FETCH_TARGETS_total_count, 424, 0 | |
| DFE_OFF_CONF_OFF_PERFECT_FETCH_TARGETS_count, 424, 0 | |
| DFE_OFF_CONF_OFF_PERFECT_FETCH_TARGETS_total_count, 424, 0 | |
| DFE_ON_CONF_ON_CYCLES_count, 425, 0 | |
| DFE_ON_CONF_ON_CYCLES_total_count, 425, 0 | |
| DFE_ON_CONF_OFF_CYCLES_count, 425, 0 | |
| DFE_ON_CONF_OFF_CYCLES_total_count, 425, 0 | |
| DFE_OFF_CONF_ON_CYCLES_count, 425, 0 | |
| DFE_OFF_CONF_ON_CYCLES_total_count, 425, 0 | |
| DFE_OFF_CONF_OFF_REALISTIC_CYCLES_count, 425, 0 | |
| DFE_OFF_CONF_OFF_REALISTIC_CYCLES_total_count, 425, 0 | |
| DFE_OFF_CONF_OFF_PERFECT_CYCLES_count, 425, 0 | |
| DFE_OFF_CONF_OFF_PERFECT_CYCLES_total_count, 425, 0 | |
| DFE_OFF_CONF_ON_NUM_EVENTS_count, 0, 0 | |
| DFE_OFF_CONF_ON_NUM_EVENTS_total_count, 0, 0 | |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_EVENTS_count, 426, 0 | |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_EVENTS_total_count, 426, 0 | |
| DFE_OFF_CONF_ON_IBTB_MISS_EVENTS_count, 426, 0 | |
| DFE_OFF_CONF_ON_IBTB_MISS_EVENTS_total_count, 426, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_EVENTS_count, 426, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_EVENTS_total_count, 426, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_EVENTS_count, 426, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_EVENTS_total_count, 426, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_EVENTS_count, 426, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_EVENTS_total_count, 426, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_EVENTS_count, 426, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_EVENTS_total_count, 426, 0 | |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_EVENTS_count, 0, 0 | |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_EVENTS_total_count, 0, 0 | |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_CYCLES_count, 427, 0 | |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_CYCLES_total_count, 427, 0 | |
| DFE_OFF_CONF_ON_IBTB_MISS_CYCLES_count, 427, 0 | |
| DFE_OFF_CONF_ON_IBTB_MISS_CYCLES_total_count, 427, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CYCLES_count, 427, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CYCLES_total_count, 427, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_CYCLES_count, 427, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_CYCLES_total_count, 427, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_CYCLES_count, 427, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_CYCLES_total_count, 427, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_CYCLES_count, 427, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_CYCLES_total_count, 427, 0 | |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_CYCLES_count, 0, 0 | |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_CYCLES_total_count, 0, 0 | |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_FETCH_TARGETS_count, 428, 0 | |
| DFE_OFF_CONF_ON_NOT_IDENTIFIED_FETCH_TARGETS_total_count, 428, 0 | |
| DFE_OFF_CONF_ON_IBTB_MISS_FETCH_TARGETS_count, 428, 0 | |
| DFE_OFF_CONF_ON_IBTB_MISS_FETCH_TARGETS_total_count, 428, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_FETCH_TARGETS_count, 428, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_FETCH_TARGETS_total_count, 428, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_FETCH_TARGETS_count, 428, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_RECOVER_AT_EXEC_FETCH_TARGETS_total_count, 428, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_FETCH_TARGETS_count, 428, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_EXEC_FETCH_TARGETS_total_count, 428, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_FETCH_TARGETS_count, 428, 0 | |
| DFE_OFF_CONF_ON_RECOVER_AT_DECODE_FETCH_TARGETS_total_count, 428, 0 | |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_FETCH_TARGETS_count, 0, 0 | |
| DFE_OFF_CONF_ON_LATE_BTB_HIT_FETCH_TARGETS_total_count, 0, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_0_CONF_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_0_CONF_total_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_1_CONF_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_1_CONF_total_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_2_CONF_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_2_CONF_total_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_3_CONF_count, 429, 0 | |
| DFE_OFF_CONF_ON_BP_INCORRECT_3_CONF_total_count, 429, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_0_CONF_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_0_CONF_total_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_1_CONF_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_1_CONF_total_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_2_CONF_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_2_CONF_total_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_3_CONF_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CBR_3_CONF_total_count, 430, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_NOT_CF_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_NOT_CF_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_BR_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_BR_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_CBR_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_CBR_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_CALL_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_CALL_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_IBR_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_IBR_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICALL_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICALL_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICO_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_ICO_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_RET_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_RET_total_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_SYS_count, 431, 0 | |
| DFE_OFF_CONF_ON_BTB_MISS_CF_SYS_total_count, 431, 0 | |
| DFE_ON_CONF_OFF_NUM_EVENTS_count, 0, 0 | |
| DFE_ON_CONF_OFF_NUM_EVENTS_total_count, 0, 0 | |
| CONF_BTB_NUM_CYCLES_OFF_PATH_EVENT_count, 0, 0 | |
| CONF_BTB_NUM_CYCLES_OFF_PATH_EVENT_total_count, 0, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_count, 432, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_count, 432, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_count, 432, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_count, 432, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_count, 432, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_INV_CONF_INC_count, 432, 0 | |
| DFE_ON_CONF_OFF_INV_CONF_INC_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_PERFECT_CONF_count, 432, 0 | |
| DFE_ON_CONF_OFF_PERFECT_CONF_total_count, 432, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_INV_CONF_INC_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_INV_CONF_INC_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_PERFECT_CONF_CYCLES_count, 433, 0 | |
| DFE_ON_CONF_OFF_PERFECT_CONF_CYCLES_total_count, 433, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_BP_TAKEN_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_BTB_MISS_RATE_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_IBTB_MISS_RATE_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_DECODE_RATE_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_RECOVER_AT_EXEC_RATE_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_INV_CONF_INC_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_INV_CONF_INC_FETCH_TARGETS_total_count, 434, 0 | |
| DFE_ON_CONF_OFF_PERFECT_CONF_FETCH_TARGETS_count, 434, 0 | |
| DFE_ON_CONF_OFF_PERFECT_CONF_FETCH_TARGETS_total_count, 434, 0 | |
| CONF_OFF_IBTB_MISS_BP_TAKEN_count, 435, 0 | |
| CONF_OFF_IBTB_MISS_BP_TAKEN_total_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_0_total_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_1_total_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_2_total_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_count, 435, 0 | |
| CONF_OFF_BTB_MISS_BP_TAKEN_CONF_3_total_count, 435, 0 | |
| CONF_OFF_BTB_MISS_RATE_count, 435, 0 | |
| CONF_OFF_BTB_MISS_RATE_total_count, 435, 0 | |
| CONF_OFF_IBTB_MISS_RATE_count, 435, 0 | |
| CONF_OFF_IBTB_MISS_RATE_total_count, 435, 0 | |
| CONF_OFF_RECOVER_AT_DECODE_RATE_count, 435, 0 | |
| CONF_OFF_RECOVER_AT_DECODE_RATE_total_count, 435, 0 | |
| CONF_OFF_RECOVER_AT_EXEC_RATE_count, 435, 0 | |
| CONF_OFF_RECOVER_AT_EXEC_RATE_total_count, 435, 0 | |
| CONF_OFF_INV_CONF_INC_count, 435, 0 | |
| CONF_OFF_INV_CONF_INC_total_count, 435, 0 | |
| CONF_OFF_PERFECT_CONF_count, 435, 0 | |
| CONF_OFF_PERFECT_CONF_total_count, 435, 0 | |
| TOPDOWN_TOTAL_SLOTS_count, 0, 242087484 | |
| TOPDOWN_TOTAL_SLOTS_total_count, 0, 242087484 | |
| TOPDOWN_ISSUED_SLOTS_count, 0, 11314553 | |
| TOPDOWN_ISSUED_SLOTS_total_count, 0, 11314553 | |
| TOPDOWN_RETIRED_SLOTS_count, 0, 10582988 | |
| TOPDOWN_RETIRED_SLOTS_total_count, 0, 10582988 | |
| TOPDOWN_FETCH_BUBBLES_SLOTS_count, 0, 2511348 | |
| TOPDOWN_FETCH_BUBBLES_SLOTS_total_count, 0, 2511348 | |
| TOPDOWN_RECOVERY_BUBBLES_SLOTS_count, 0, 201774 | |
| TOPDOWN_RECOVERY_BUBBLES_SLOTS_total_count, 0, 201774 | |
| TOPDOWN_MEM_LOAD_STALLS_CYCLES_count, 0, 539039 | |
| TOPDOWN_MEM_LOAD_STALLS_CYCLES_total_count, 0, 539039 | |
| TOPDOWN_MEM_STORE_STALLS_CYCLES_count, 0, 25377699 | |
| TOPDOWN_MEM_STORE_STALLS_CYCLES_total_count, 0, 25377699 | |
| TOPDOWN_EXEC_STALLS_CYCLES_count, 0, 35428663 | |
| TOPDOWN_EXEC_STALLS_CYCLES_total_count, 0, 35428663 | |
| TOPDOWN_BACKEND_STALLS_CYCLES_count, 0, 37999855 | |
| TOPDOWN_BACKEND_STALLS_CYCLES_total_count, 0, 37999855 | |
| TOPDOWN_FETCH_BUBBLES_GT_MIW_CYCLES_count, 0, 394189 | |
| TOPDOWN_FETCH_BUBBLES_GT_MIW_CYCLES_total_count, 0, 394189 | |
| TOPDOWN_BR_RECOVER_AT_EXEC_RETIRED_CYCLES_count, 0, 5736 | |
| TOPDOWN_BR_RECOVER_AT_EXEC_RETIRED_CYCLES_total_count, 0, 5736 | |
| TOPDOWN_MACHINE_CLEAR_CYCLES_count, 0, 58945 | |
| TOPDOWN_MACHINE_CLEAR_CYCLES_total_count, 0, 58945 | |
| TOPDOWN_FRONTEND_BOUND_count, 0, 103 | |
| TOPDOWN_FRONTEND_BOUND_total_count, 0, 103 | |
| TOPDOWN_BACKEND_BOUND_count, 0, 9422 | |
| TOPDOWN_BACKEND_BOUND_total_count, 0, 9422 | |
| TOPDOWN_BAD_SPEC_BOUND_count, 0, 38 | |
| TOPDOWN_BAD_SPEC_BOUND_total_count, 0, 38 | |
| TOPDOWN_RETIRING_BOUND_count, 0, 437 | |
| TOPDOWN_RETIRING_BOUND_total_count, 0, 437 | |
| TOPDOWN_FETCH_LATENCY_BOUND_count, 0, 97 | |
| TOPDOWN_FETCH_LATENCY_BOUND_total_count, 0, 97 | |
| TOPDOWN_FETCH_BANDWIDTH_BOUND_count, 0, 6 | |
| TOPDOWN_FETCH_BANDWIDTH_BOUND_total_count, 0, 6 | |
| TOPDOWN_MEM_BOUND_count, 0, 6426 | |
| TOPDOWN_MEM_BOUND_total_count, 0, 6426 | |
| TOPDOWN_CORE_BOUND_count, 0, 2996 | |
| TOPDOWN_CORE_BOUND_total_count, 0, 2996 | |
| TOPDOWN_BR_RECOVER_AT_EXEC_BOUND_count, 0, 3 | |
| TOPDOWN_BR_RECOVER_AT_EXEC_BOUND_total_count, 0, 3 | |
| TOPDOWN_MACHINE_CLEARS_BOUND_count, 0, 35 | |
| TOPDOWN_MACHINE_CLEARS_BOUND_total_count, 0, 35 | |
| H2P_SEEN_MAIN_count, 0, 0 | |
| H2P_SEEN_MAIN_total_count, 0, 0 | |