hpca2027-database-validated-traces-20260711 / validation /postgresql /simpoint-validation /12 /fetch.stat.0.csv
| Core, 0, 0 | |
| Cumulative_Cycles, 0, 336256 | |
| Cumulative_Instructions, 0, 961103 | |
| Periodic_Cycles, 0, 336256 | |
| Periodic_Instructions, 0, 961103 | |
| MISS_WAIT_TIME_count, 0, 21923 | |
| MISS_WAIT_TIME_total_count, 0, 21923 | |
| ICACHE_STAGE_MISS_count, 0, 34 | |
| ICACHE_STAGE_MISS_total_count, 0, 34 | |
| ICACHE_CYCLE_count, 0, 336256 | |
| ICACHE_CYCLE_total_count, 0, 336256 | |
| TCACHE_CYCLE_count, 0, 0 | |
| TCACHE_CYCLE_total_count, 0, 0 | |
| ICACHE_SERVING_CYCLE_ON_PATH_count, 0, 20 | |
| ICACHE_SERVING_CYCLE_ON_PATH_total_count, 0, 20 | |
| ICACHE_SERVING_CYCLE_OFF_PATH_count, 0, 339 | |
| ICACHE_SERVING_CYCLE_OFF_PATH_total_count, 0, 339 | |
| UCACHE_SERVING_CYCLE_ON_PATH_count, 0, 333834 | |
| UCACHE_SERVING_CYCLE_ON_PATH_total_count, 0, 333834 | |
| UCACHE_SERVING_CYCLE_OFF_PATH_count, 0, 230 | |
| UCACHE_SERVING_CYCLE_OFF_PATH_total_count, 0, 230 | |
| ICACHE_CYCLE_ONPATH_count, 1, 335287 | |
| ICACHE_CYCLE_ONPATH_total_count, 1, 335287 | |
| ICACHE_CYCLE_OFFPATH_count, 1, 969 | |
| ICACHE_CYCLE_OFFPATH_total_count, 1, 969 | |
| FETCH_ON_PATH_count, 2, 335294 | |
| FETCH_ON_PATH_total_count, 2, 335294 | |
| FETCH_OFF_PATH_count, 2, 962 | |
| FETCH_OFF_PATH_total_count, 2, 962 | |
| FETCHED_OPS_ON_PATH_count, 3, 0 | |
| FETCHED_OPS_ON_PATH_total_count, 3, 0 | |
| FETCHED_OPS_OFF_PATH_count, 3, 0 | |
| FETCHED_OPS_OFF_PATH_total_count, 3, 0 | |
| INST_LOST_FETCH_count, 4, 1261450 | |
| INST_LOST_FETCH_total_count, 4, 1261450 | |
| INST_LOST_OFF_PATH_count, 4, 2363 | |
| INST_LOST_OFF_PATH_total_count, 4, 2363 | |
| INST_LOST_FULL_WINDOW_count, 4, 239704 | |
| INST_LOST_FULL_WINDOW_total_count, 4, 239704 | |
| INST_LOST_ROB_STALL_OTHER_count, 4, 734784 | |
| INST_LOST_ROB_STALL_OTHER_total_count, 4, 734784 | |
| INST_LOST_ROB_STALL_WAIT_FOR_RECOVERY_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_RECOVERY_total_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_REDIRECT_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_REDIRECT_total_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_GAP_FILL_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_GAP_FILL_total_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_L1_MISS_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_L1_MISS_total_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_MEMORY_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_MEMORY_total_count, 4, 0 | |
| INST_LOST_ROB_STALL_WAIT_FOR_DC_MISS_count, 4, 134504 | |
| INST_LOST_ROB_STALL_WAIT_FOR_DC_MISS_total_count, 4, 134504 | |
| INST_LOST_ROB_BLOCK_ISSUE_FULL_count, 4, 0 | |
| INST_LOST_ROB_BLOCK_ISSUE_FULL_total_count, 4, 0 | |
| INST_LOST_ROB_BLOCK_ISSUE_GAP_TOO_LARGE_count, 4, 0 | |
| INST_LOST_ROB_BLOCK_ISSUE_GAP_TOO_LARGE_total_count, 4, 0 | |
| INST_LOST_BREAK_DONT_count, 4, 0 | |
| INST_LOST_BREAK_DONT_total_count, 4, 0 | |
| INST_LOST_BREAK_FT_UNAVAILABLE_count, 4, 42 | |
| INST_LOST_BREAK_FT_UNAVAILABLE_total_count, 4, 42 | |
| INST_LOST_BREAK_ICACHE_STAGE_RESTEER_count, 4, 756 | |
| INST_LOST_BREAK_ICACHE_STAGE_RESTEER_total_count, 4, 756 | |
| INST_LOST_BREAK_ICACHE_MISS_REQ_SUCCESS_count, 4, 117 | |
| INST_LOST_BREAK_ICACHE_MISS_REQ_SUCCESS_total_count, 4, 117 | |
| INST_LOST_BREAK_ICACHE_MISS_REQ_FAILURE_count, 4, 0 | |
| INST_LOST_BREAK_ICACHE_MISS_REQ_FAILURE_total_count, 4, 0 | |
| INST_LOST_BREAK_ICACHE_WAIT_FOR_MISS_count, 4, 10158 | |
| INST_LOST_BREAK_ICACHE_WAIT_FOR_MISS_total_count, 4, 10158 | |
| INST_LOST_BREAK_ICACHE_STALLED_count, 4, 0 | |
| INST_LOST_BREAK_ICACHE_STALLED_total_count, 4, 0 | |
| INST_LOST_BREAK_ICACHE_TO_UOP_CACHE_SWITCH_count, 4, 7 | |
| INST_LOST_BREAK_ICACHE_TO_UOP_CACHE_SWITCH_total_count, 4, 7 | |
| INST_LOST_BREAK_ICACHE_READ_LIMIT_count, 4, 15 | |
| INST_LOST_BREAK_ICACHE_READ_LIMIT_total_count, 4, 15 | |
| INST_LOST_BREAK_ICACHE_ISSUE_WIDTH_count, 4, 0 | |
| INST_LOST_BREAK_ICACHE_ISSUE_WIDTH_total_count, 4, 0 | |
| INST_LOST_BREAK_UOP_CACHE_STALLED_count, 4, 972 | |
| INST_LOST_BREAK_UOP_CACHE_STALLED_total_count, 4, 972 | |
| INST_LOST_BREAK_UOP_CACHE_TO_ICACHE_SWITCH_count, 4, 28 | |
| INST_LOST_BREAK_UOP_CACHE_TO_ICACHE_SWITCH_total_count, 4, 28 | |
| INST_LOST_BREAK_UOP_CACHE_READ_LIMIT_count, 4, 300526 | |
| INST_LOST_BREAK_UOP_CACHE_READ_LIMIT_total_count, 4, 300526 | |
| INST_LOST_BREAK_UOP_CACHE_ISSUE_WIDTH_count, 4, 0 | |
| INST_LOST_BREAK_UOP_CACHE_ISSUE_WIDTH_total_count, 4, 0 | |
| INST_LOST_TOTAL_count, 0, 2685880 | |
| INST_LOST_TOTAL_total_count, 0, 2685880 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_NOT_PREFETCHED_count, 5, 3690 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_NOT_PREFETCHED_total_count, 5, 3690 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_PREFETCHED_AND_EVICTED_BY_IFETCH_count, 5, 0 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_PREFETCHED_AND_EVICTED_BY_IFETCH_total_count, 5, 0 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_PREFETCHED_AND_EVICTED_BY_FDIP_count, 5, 0 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_PREFETCHED_AND_EVICTED_BY_FDIP_total_count, 5, 0 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_MSHR_HIT_PREF_OFFPATH_count, 5, 78 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_MSHR_HIT_PREF_OFFPATH_total_count, 5, 78 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_MSHR_HIT_PREF_ONPATH_count, 5, 4038 | |
| INST_LOST_WAIT_FOR_ICACHE_MISS_MSHR_HIT_PREF_ONPATH_total_count, 5, 4038 | |
| FETCH_0_OPS_count, 6, 1833 | |
| FETCH_0_OPS_total_count, 6, 1833 | |
| FETCH_1_OPS_count, 6, 113 | |
| FETCH_1_OPS_total_count, 6, 113 | |
| FETCH_2_OPS_count, 6, 3 | |
| FETCH_2_OPS_total_count, 6, 3 | |
| FETCH_3_OPS_count, 6, 15075 | |
| FETCH_3_OPS_total_count, 6, 15075 | |
| FETCH_4_OPS_count, 6, 30068 | |
| FETCH_4_OPS_total_count, 6, 30068 | |
| FETCH_5_OPS_count, 6, 15052 | |
| FETCH_5_OPS_total_count, 6, 15052 | |
| FETCH_6_OPS_count, 6, 30256 | |
| FETCH_6_OPS_total_count, 6, 30256 | |
| FETCH_7_OPS_count, 6, 1 | |
| FETCH_7_OPS_total_count, 6, 1 | |
| FETCH_8_OPS_count, 6, 243855 | |
| FETCH_8_OPS_total_count, 6, 243855 | |
| FETCH_9_OPS_count, 6, 0 | |
| FETCH_9_OPS_total_count, 6, 0 | |
| FETCH_10_OPS_count, 6, 0 | |
| FETCH_10_OPS_total_count, 6, 0 | |
| FETCH_11_OPS_count, 6, 0 | |
| FETCH_11_OPS_total_count, 6, 0 | |
| FETCH_12_OPS_count, 6, 0 | |
| FETCH_12_OPS_total_count, 6, 0 | |
| FETCH_13_OPS_count, 6, 0 | |
| FETCH_13_OPS_total_count, 6, 0 | |
| FETCH_14_OPS_count, 6, 0 | |
| FETCH_14_OPS_total_count, 6, 0 | |
| FETCH_15_OPS_count, 6, 0 | |
| FETCH_15_OPS_total_count, 6, 0 | |
| FETCH_16_OPS_count, 6, 0 | |
| FETCH_16_OPS_total_count, 6, 0 | |
| ST_BREAK_DONT_count, 7, 0 | |
| ST_BREAK_DONT_total_count, 7, 0 | |
| ST_BREAK_FT_UNAVAILABLE_count, 7, 7 | |
| ST_BREAK_FT_UNAVAILABLE_total_count, 7, 7 | |
| ST_BREAK_ICACHE_STAGE_RESTEER_count, 7, 126 | |
| ST_BREAK_ICACHE_STAGE_RESTEER_total_count, 7, 126 | |
| ST_BREAK_ICACHE_MISS_REQ_SUCCESS_count, 7, 34 | |
| ST_BREAK_ICACHE_MISS_REQ_SUCCESS_total_count, 7, 34 | |
| ST_BREAK_ICACHE_MISS_REQ_FAILURE_count, 7, 0 | |
| ST_BREAK_ICACHE_MISS_REQ_FAILURE_total_count, 7, 0 | |
| ST_BREAK_ICACHE_WAIT_FOR_MISS_count, 7, 1693 | |
| ST_BREAK_ICACHE_WAIT_FOR_MISS_total_count, 7, 1693 | |
| ST_BREAK_ICACHE_STALLED_count, 7, 35 | |
| ST_BREAK_ICACHE_STALLED_total_count, 7, 35 | |
| ST_BREAK_ICACHE_TO_UOP_CACHE_SWITCH_count, 7, 4 | |
| ST_BREAK_ICACHE_TO_UOP_CACHE_SWITCH_total_count, 7, 4 | |
| ST_BREAK_ICACHE_READ_LIMIT_count, 7, 6 | |
| ST_BREAK_ICACHE_READ_LIMIT_total_count, 7, 6 | |
| ST_BREAK_ICACHE_ISSUE_WIDTH_count, 7, 179 | |
| ST_BREAK_ICACHE_ISSUE_WIDTH_total_count, 7, 179 | |
| ST_BREAK_UOP_CACHE_STALLED_count, 7, 138776 | |
| ST_BREAK_UOP_CACHE_STALLED_total_count, 7, 138776 | |
| ST_BREAK_UOP_CACHE_TO_ICACHE_SWITCH_count, 7, 4 | |
| ST_BREAK_UOP_CACHE_TO_ICACHE_SWITCH_total_count, 7, 4 | |
| ST_BREAK_UOP_CACHE_READ_LIMIT_count, 7, 90155 | |
| ST_BREAK_UOP_CACHE_READ_LIMIT_total_count, 7, 90155 | |
| ST_BREAK_UOP_CACHE_ISSUE_WIDTH_count, 7, 105237 | |
| ST_BREAK_UOP_CACHE_ISSUE_WIDTH_total_count, 7, 105237 | |
| ORACLE_ON_PATH_INST_count, 8, 1261450 | |
| ORACLE_ON_PATH_INST_total_count, 8, 1261450 | |
| ORACLE_OFF_PATH_INST_count, 8, 2363 | |
| ORACLE_OFF_PATH_INST_total_count, 8, 2363 | |
| ORACLE_ON_PATH_INST_MEM_count, 9, 450518 | |
| ORACLE_ON_PATH_INST_MEM_total_count, 9, 450518 | |
| ORACLE_ON_PATH_INST_NOTMEM_count, 9, 810932 | |
| ORACLE_ON_PATH_INST_NOTMEM_total_count, 9, 810932 | |
| ORACLE_OFF_PATH_INST_MEM_count, 9, 451 | |
| ORACLE_OFF_PATH_INST_MEM_total_count, 9, 451 | |
| ORACLE_OFF_PATH_INST_NOTMEM_count, 9, 1912 | |
| ORACLE_OFF_PATH_INST_NOTMEM_total_count, 9, 1912 | |
| ICACHE_CYCLE_NONRA_ONPATH_count, 10, 0 | |
| ICACHE_CYCLE_NONRA_ONPATH_total_count, 10, 0 | |
| ICACHE_CYCLE_NONRA_OFFPATH_count, 10, 0 | |
| ICACHE_CYCLE_NONRA_OFFPATH_total_count, 10, 0 | |
| ICACHE_CYCLE_RA_ONPATH_count, 10, 0 | |
| ICACHE_CYCLE_RA_ONPATH_total_count, 10, 0 | |
| ICACHE_CYCLE_RA_OFFPATH_count, 10, 0 | |
| ICACHE_CYCLE_RA_OFFPATH_total_count, 10, 0 | |
| ICACHE_CYCLE_ONPATH_NONRA_count, 11, 0 | |
| ICACHE_CYCLE_ONPATH_NONRA_total_count, 11, 0 | |
| ICACHE_CYCLE_OFFPATH_NONRA_count, 11, 0 | |
| ICACHE_CYCLE_OFFPATH_NONRA_total_count, 11, 0 | |
| ICACHE_CYCLE_ONPATH_RA_count, 12, 0 | |
| ICACHE_CYCLE_ONPATH_RA_total_count, 12, 0 | |
| ICACHE_CYCLE_OFFPATH_RA_count, 12, 0 | |
| ICACHE_CYCLE_OFFPATH_RA_total_count, 12, 0 | |
| INACCURATE_OFFPATH_CYCLES_count, 0, 0 | |
| INACCURATE_OFFPATH_CYCLES_pct, 0, 0.000 | |
| INACCURATE_OFFPATH_CYCLES_total_count, 0, 0 | |
| INACCURATE_OFFPATH_CYCLES_total_pct, 0, 0.000 | |
| FETCH_ALL_INST_count, 0, 1263813 | |
| FETCH_ALL_INST_total_count, 0, 1263813 | |
| EXEC_ALL_INST_count, 0, 1262930 | |
| EXEC_ALL_INST_total_count, 0, 1262930 | |
| RET_ALL_INST_count, 0, 1261450 | |
| RET_ALL_INST_total_count, 0, 1261450 | |
| EXEC_ON_PATH_INST_count, 13, 1261450 | |
| EXEC_ON_PATH_INST_total_count, 13, 1261450 | |
| EXEC_OFF_PATH_INST_count, 13, 1480 | |
| EXEC_OFF_PATH_INST_total_count, 13, 1480 | |
| EXEC_ON_PATH_INST_MEM_count, 14, 450518 | |
| EXEC_ON_PATH_INST_MEM_total_count, 14, 450518 | |
| EXEC_ON_PATH_INST_NOTMEM_count, 14, 810932 | |
| EXEC_ON_PATH_INST_NOTMEM_total_count, 14, 810932 | |
| EXEC_OFF_PATH_INST_MEM_count, 14, 185 | |
| EXEC_OFF_PATH_INST_MEM_total_count, 14, 185 | |
| EXEC_OFF_PATH_INST_NOTMEM_count, 14, 1295 | |
| EXEC_OFF_PATH_INST_NOTMEM_total_count, 14, 1295 | |
| EXEC_RA_INST_count, 15, 0 | |
| EXEC_RA_INST_total_count, 15, 0 | |
| EXEC_NONRA_INST_count, 15, 0 | |
| EXEC_NONRA_INST_total_count, 15, 0 | |
| EXEC_ON_PATH_INST_RA_count, 16, 0 | |
| EXEC_ON_PATH_INST_RA_total_count, 16, 0 | |
| EXEC_OFF_PATH_INST_RA_count, 16, 0 | |
| EXEC_OFF_PATH_INST_RA_total_count, 16, 0 | |
| EXEC_ON_PATH_INST_NONRA_count, 17, 0 | |
| EXEC_ON_PATH_INST_NONRA_total_count, 17, 0 | |
| EXEC_OFF_PATH_INST_NONRA_count, 17, 0 | |
| EXEC_OFF_PATH_INST_NONRA_total_count, 17, 0 | |
| EXEC_RA_ON_PATH_INST_count, 18, 0 | |
| EXEC_RA_ON_PATH_INST_total_count, 18, 0 | |
| EXEC_RA_OFF_PATH_INST_count, 18, 0 | |
| EXEC_RA_OFF_PATH_INST_total_count, 18, 0 | |
| EXEC_NONRA_ON_PATH_INST_count, 18, 0 | |
| EXEC_NONRA_ON_PATH_INST_total_count, 18, 0 | |
| EXEC_NONRA_OFF_PATH_INST_count, 18, 0 | |
| EXEC_NONRA_OFF_PATH_INST_total_count, 18, 0 | |
| ICACHE_THROTTLE_CYCLE_count, 0, 0 | |
| ICACHE_THROTTLE_CYCLE_total_count, 0, 0 | |
| FETCH_ENABLE_THROTTLE_OFF_PATH_count, 19, 0 | |
| FETCH_ENABLE_THROTTLE_OFF_PATH_total_count, 19, 0 | |
| FETCH_ENABLE_THROTTLE_ON_PATH_count, 19, 0 | |
| FETCH_ENABLE_THROTTLE_ON_PATH_total_count, 19, 0 | |
| FETCH_DISABLE_THROTTLE_OFF_PATH_count, 20, 0 | |
| FETCH_DISABLE_THROTTLE_OFF_PATH_total_count, 20, 0 | |
| FETCH_DISABLE_THROTTLE_ON_PATH_count, 20, 0 | |
| FETCH_DISABLE_THROTTLE_ON_PATH_total_count, 20, 0 | |
| FETCH_TH_ADJUST__0_count, 21, 0 | |
| FETCH_TH_ADJUST__0_total_count, 21, 0 | |
| FETCH_TH_ADJUST__1_count, 21, 0 | |
| FETCH_TH_ADJUST__1_total_count, 21, 0 | |
| FETCH_TH_ADJUST__2_count, 21, 0 | |
| FETCH_TH_ADJUST__2_total_count, 21, 0 | |
| FETCH_TH_ADJUST__3_count, 21, 0 | |
| FETCH_TH_ADJUST__3_total_count, 21, 0 | |
| FETCH_TH_ADJUST__4_count, 21, 0 | |
| FETCH_TH_ADJUST__4_total_count, 21, 0 | |
| FETCH_TH_ADJUST__5_count, 21, 0 | |
| FETCH_TH_ADJUST__5_total_count, 21, 0 | |
| FETCH_TH_ADJUST__6_count, 21, 0 | |
| FETCH_TH_ADJUST__6_total_count, 21, 0 | |
| FETCH_TH_ADJUST__7_count, 21, 0 | |
| FETCH_TH_ADJUST__7_total_count, 21, 0 | |
| FETCH_TH_ADJUST__8_count, 21, 0 | |
| FETCH_TH_ADJUST__8_total_count, 21, 0 | |
| FETCH_TH_ADJUST__9_count, 21, 0 | |
| FETCH_TH_ADJUST__9_total_count, 21, 0 | |
| FETCH_TH_ADJUST__MAX_count, 21, 0 | |
| FETCH_TH_ADJUST__MAX_total_count, 21, 0 | |
| FETCH_TH_ADJUST_UP_count, 22, 0 | |
| FETCH_TH_ADJUST_UP_total_count, 22, 0 | |
| FETCH_TH_ADJUST_DOWN_count, 22, 0 | |
| FETCH_TH_ADJUST_DOWN_total_count, 22, 0 | |
| FETCH_TH_ADJUST_SAME_count, 22, 0 | |
| FETCH_TH_ADJUST_SAME_total_count, 22, 0 | |
| THROTTLE_ADJUST_CACHE_MISS_INFO_count, 0, 0 | |
| THROTTLE_ADJUST_CACHE_MISS_INFO_total_count, 0, 0 | |
| LOW_CONF_COUNT_BP_MIS_0_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_0_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_1_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_1_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_2_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_2_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_3_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_3_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_4_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_4_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_5_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_5_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_6_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_6_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_7_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_7_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_8_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_8_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_9_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_9_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_10_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_10_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_11_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_11_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_12_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_12_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_13_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_13_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_14_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_14_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_15_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_15_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_16_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_16_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_17_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_17_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_18_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_18_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_19_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_19_total_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_20_count, 23, 0 | |
| LOW_CONF_COUNT_BP_MIS_20_total_count, 23, 0 | |
| LOW_CONF_COUNT_RET_0_count, 24, 0 | |
| LOW_CONF_COUNT_RET_0_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_1_count, 24, 0 | |
| LOW_CONF_COUNT_RET_1_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_2_count, 24, 0 | |
| LOW_CONF_COUNT_RET_2_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_3_count, 24, 0 | |
| LOW_CONF_COUNT_RET_3_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_4_count, 24, 0 | |
| LOW_CONF_COUNT_RET_4_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_5_count, 24, 0 | |
| LOW_CONF_COUNT_RET_5_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_6_count, 24, 0 | |
| LOW_CONF_COUNT_RET_6_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_7_count, 24, 0 | |
| LOW_CONF_COUNT_RET_7_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_8_count, 24, 0 | |
| LOW_CONF_COUNT_RET_8_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_9_count, 24, 0 | |
| LOW_CONF_COUNT_RET_9_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_10_count, 24, 0 | |
| LOW_CONF_COUNT_RET_10_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_11_count, 24, 0 | |
| LOW_CONF_COUNT_RET_11_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_12_count, 24, 0 | |
| LOW_CONF_COUNT_RET_12_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_13_count, 24, 0 | |
| LOW_CONF_COUNT_RET_13_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_14_count, 24, 0 | |
| LOW_CONF_COUNT_RET_14_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_15_count, 24, 0 | |
| LOW_CONF_COUNT_RET_15_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_16_count, 24, 0 | |
| LOW_CONF_COUNT_RET_16_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_17_count, 24, 0 | |
| LOW_CONF_COUNT_RET_17_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_18_count, 24, 0 | |
| LOW_CONF_COUNT_RET_18_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_19_count, 24, 0 | |
| LOW_CONF_COUNT_RET_19_total_count, 24, 0 | |
| LOW_CONF_COUNT_RET_20_count, 24, 0 | |
| LOW_CONF_COUNT_RET_20_total_count, 24, 0 | |
| CYCLES_RESTEER_RECOVER_AT_EXEC_count, 25, 0 | |
| CYCLES_RESTEER_RECOVER_AT_EXEC_total_count, 25, 0 | |
| CYCLES_RESTEER_RECOVER_AT_DECODE_count, 25, 0 | |
| CYCLES_RESTEER_RECOVER_AT_DECODE_total_count, 25, 0 | |
| CYCLES_RESTEER_BTB_MISS_count, 25, 0 | |
| CYCLES_RESTEER_BTB_MISS_total_count, 25, 0 | |
| CYCLES_RESTEER_RECOVER_AT_EXEC_SAVED_UC_FETCH_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_EXEC_SAVED_UC_FETCH_total_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_EXEC_COULD_BE_SAVED_UC_FETCH_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_EXEC_COULD_BE_SAVED_UC_FETCH_total_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_DECODE_SAVED_UC_FETCH_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_DECODE_SAVED_UC_FETCH_total_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_DECODE_COULD_BE_SAVED_UC_FETCH_count, 26, 0 | |
| CYCLES_RESTEER_RECOVER_AT_DECODE_COULD_BE_SAVED_UC_FETCH_total_count, 26, 0 | |
| CYCLES_RESTEER_BTB_MISS_SAVED_UC_FETCH_count, 26, 0 | |
| CYCLES_RESTEER_BTB_MISS_SAVED_UC_FETCH_total_count, 26, 0 | |
| CYCLES_RESTEER_BTB_MISS_COULD_BE_SAVED_UC_FETCH_count, 26, 0 | |
| CYCLES_RESTEER_BTB_MISS_COULD_BE_SAVED_UC_FETCH_total_count, 26, 0 | |
| CYCLES_UOC_IC_SWITCH_count, 0, 0 | |
| CYCLES_UOC_IC_SWITCH_total_count, 0, 0 | |