. in cataloguing the hidden epicenters of industrial production and waste of quarries, recycling yards, factories, mines, ship breaking, and oil fields, burtynsky enables our cognition of the human environmental imprint at the same time that he strikes down the myth that a postindustrial corporate class has become more important than the labor force that keeps the modern world supplied with the energy and commodities it demands. in so doing, he projects a romantic yearning for a return to a nurturing pre - industrial nature at the same time he seemingly pulls out that dream from under us by showing us landscapes so scarred by industrial and consumer waste that the recovery of nature even in the absence of humans would take millennia. together the two artists chart out a scenario whereby overlapping industrial and postindustrial visions challenge our more basic preindustrial needs and desires. it ' s enough to revive the discourse and grand narrative of alienation for any attentive individual. 2000 - 2001 : oliviero toscani the creative mind behind the controversial ad campaigns that turned italian clothing maker benetton into a household name have a tendency to aim for the jugular. toscani worked as benetton ' s creative director for 18 years, from 1982 through to 2000. among the shock ads he engineered count the ad that the company calls pieta. printed in 1991, it depicts the family of the dying aids activist, david kirby, surrounded by his family at his hospital bed. in 1991 the impact of aids in the west was taking its worst toll. customers and vendors alike were scandalized. many stores refused to stock benetton that season. a later ad depicted the clothes of a dead bosnian soldier - - the clothes he was killed in, to be specific. the garments, a pair of blood - stained trousers with a camouflage pattern and a blood stained t - shirt, are laid out flat across the picture. the t - shirt has a bullet hole at the level of the ribs. at the top of the advertisement is a text in serbo croatian. at the bottom left, the words " united colours of benetton " are written in larger green letters. but toscani will likely be best remembered for the headline - grabbing 2000 campaign using photos of some 26 death row inmates from six u. s. states. toscani and benetton say the international " we on death row " campaign was aimed at drawing attention to the controversy surrounding the use of capital punishment in the u. s., where support for the death penalty is nearly as


. states. toscani and benetton say the international " we on death row " campaign was aimed at drawing attention to the controversy surrounding the use of capital punishment in the u. s., where support for the death penalty is nearly as universal as opposition to it is in toscani ' s native italy. the furor over the campaign in effect ended toscani ' s association with benetton. 2000 white columns ' director paul ha curated concerted compassionism, which presented the work of three artists who addressed the problem of homelessness. michael rakowitz, in an ongoing project he calls parasites, presented a series of exterior ventilation systems installed on existing architecture structures providing heat for the homeless. at the time of the white columns show, rakowitz had built and distributed 30 such parasites to homeless people in boston, cambridge, ma, and new york city. swiss artist, christoph buchel ' s homeless depot installation transformed the white columns gallery into a one - stop - shop for the homeless. although the exterior punningly riffs off the home depot brand name, inside bushel genuinely stocked items freely given to the homeless upon their request, and which he states include models for shelters, money - earning aids, and objects for entertainment. bradley mccallum presented documentation of his on - site shelters and mobile carts for the homeless which he had been designing and distributing in richmond, va, according to the needs of the specific user. his homeless recipients are thereby equipped to collect aluminum cans, bottles, and other materials for recycling income. all carts remain the sole property of the individuals who require them, which in mccallum ' s artistic vision resonates as a sustained visible and political presence in the cities hosting them. 1980 - 2000. since the 1960s, the covers of music discs, and by 2000 the online download promotional icon, is the first and often the most indelible political signage encountered by young audiences. although mainstream music studios largely suppressed political music in the 1980s until it proved commercially profitable in the capitalist recycling bin, smaller independent music venues kept alternate political music alive, until, in the 1990s, grunge, rap, and some alternate rock again infused the mainstream with the sounds and visions of politically - minded artist - activists. next : nomads occupy the global village : left political art timeline, 2001 - 2012. may day on huffington post. on 4 / 19 / 12 the walker art center credit was added to the entry on edgar heap of birds, which the author mistakenly omitted. read other posts by g


for catholics and many other christians, the season of lent began with ash wednesday, with ashes that symbolize human mortality. lent is a time of repentance for sin and of preparation for an intense remembering, at easter, of the passion, death and resurrection of jesus. the jesus who is remembered and celebrated is a generous jesus, the one who laid down his life for others. lenten penance and preparation have often taken the specific form of three things : almsgiving, fasting and prayer. i would like to suggest that all three may serve especially well as antidotes to a lack of generosity, that is, to greed or avarice, one of the seven deadly sins. that greed abounds seems all too evident. in the united states, lent 2012 is a time also of political campaigning, and of a politics in which a candidate has not hesitated to boast about his wealth, his minimal payment of taxes, his firing of workers, and his disinterest in the very poor. other candidates call relentlessly for ever more tax cuts for the people who need them least. they exalt so - called good greed as though it were not an oxymoron, but rather the miracle solution to all problems. thus i suggest that antidotes to greed and its exaltation are urgently needed, and that zeal for lent, with its almsgiving, prayer, and fasting, may offer an excellent remedy. is ' alms ' perhaps the most obvious of the three as an antidote to greed? is almsgiving a kind of fasting from greed? to give alms has usually meant to give to the poor and the needy, to individuals, or to agencies, foundations and institutions devoted to serving such persons. almsgiving carries the connotation of voluntary charity on the part of individuals with the means to do so. the term may conjure up images of a wealthy elite acting out of a sense of noblesse oblige, rather than with any motivation of genuine care or concern for those in need. but this need not be so. alms may be given discretely, anonymously ; and generosity in almsgiving may involve giving not only out of one ' s abundance, but also out of one ' s own need. in the new testament, jesus praises the generosity of the widow who gave from what little she had ( mark 12 : 41 - 44 ). and jesus cautions that one may not serve god and money ( matthew 6 : 24 ).


own need. in the new testament, jesus praises the generosity of the widow who gave from what little she had ( mark 12 : 41 - 44 ). and jesus cautions that one may not serve god and money ( matthew 6 : 24 ). thus a choice must be made : greed or god. in its more literal sense fasting is an abstinence from the quantity of food one normally eats, from eating at certain times, or from certain foods. fasting means rigorous self - control in the face of an all - you - can - eat buffet, no easy feat for many americans. and fasting may mean doing without alcohol or other favorite beverages. for christians, it also suggests imitation of the jesus who fasted for 40 days in the desert. it may mean solidarity with the hungry, even if one lives in a part of the world where hunger is less visible than it is in other places. it may express an affirmative response to jesus who says one does not live on bread alone, but on the word of god ( matthew 4 : 4 ). fasting may mean not only abstention from food or drink, but a more general fasting from material things. to fast is to say that ever more acquisition of consumer goods may not be the path to happiness and human wholeness, however shocking that may be for some. to pray is to acknowledge that one is not god. the ravenously greedy person is likely to be inclined to idolatry, to adoration of one ' s self as a god or even as the one god. the greedy think that they deserve endless luxuries while others grovel in misery. prayer is a kind of iconoclasm that destroys the idol of the self imagined as above all others. prayer is an ascetical renunciation of the placing of one ' s self at the center of the universe, and it is renunciation of the seeking of adulation. prayer is not only words addressed to another believed to be one ' s creator, the ground of one ' s being ; it is also a quiet, a silence, and a receptivity to god ' s word, to god ' s ways, and to the needs of other people. it may be helpful to consider how genuine prayer is the polar opposite of a car alarm. a car alarm is an example of a greed and of a contempt for others ; its installation presumes that protection of the property of a car owner matters, and that this consideration trumps that of the exceedingly obnoxious noise


car alarm. a car alarm is an example of a greed and of a contempt for others ; its installation presumes that protection of the property of a car owner matters, and that this consideration trumps that of the exceedingly obnoxious noise pollution inflicted on others. these alarms are a rude, possessive and noisy protection of private property ; but prayer is a peaceful openness to reception of god ' s gifts and to sharing them with others. listening is the heart of prayer. to pray is to fast, in hopeful silence, from the constant babbling about little or nothing that pervades our era of ever shorter attention spans. prayer is an exercise in waiting, in patience and humility, for prayer is acknowledgment of one ' s dependence on god, and on god ' s ways. prayer liberates us as it downgrades the importance of wall street, wealth, and wanton spending. prayer says no to a culture of facades and illusions, and yes to a deeper sense of what matters most about human life. lent calls us to do penance for our greedy ways and to promote the common good, not selfish individualism. the saints catholics honor and strive to imitate offer countless examples of giving away everything in order to follow jesus and to serve others. lent is a time for remembrance and imitation of the self - emptying generosity and sacrifice of jesus and of his saints. it is a time for coming to understand that greed and christian discipleship have nothing whatsoever in common.


hudson valley iron - ore mining industry : a history of sterling forest heavy metal : sterling forest was once the center of the valley ’ s rich iron - ore industry stoking the fire : a reproduction of sterling iron ’ s giant furnace, where magnetite was smelted into pure iron photographs by jeff sumberg ( page 1 of 2 ) as a non - historian writing a history column, i am continually amazed and amused by the hudson valley ’ s varied and colorful past. not long ago i learned that we were once the violet capital of the world, growing and shipping fashion ’ s most popular petal to all parts of the globe in the late 19th - early 20th centuries. and now i find that this forgotten, delicate industry was preceded by an equally forgotten but much more masculine one. to me, iron city meant only the pittsburgh - brewed beer. the iron range was an area in northern minnesota that produced hard - nosed hockey players. turns out that both of these are relative latecomers, newbies, tyros. if you want to know about american ironworks, you need only look downstate. edward lenik, an archeologist in wayne, new jersey, who literally wrote the book on the area ’ s iron history ( iron mine trails : a history and hiker ’ s guide to the historic iron mines of the new jersey and new york highlands ; sadly, it ’ s out of print ), says that when the english settled northern new jersey and southern new york in the 1730s, they began looking for gold and silver. there wasn ’ t any, but a man named cornelius board met some native americans who said they knew about some “ black rock ” in the area. “ they showed him outcrops of this rock, which he recognized as iron ore, ” lenik says. specifically, it was a mineral called magnetite, an iron oxide which board knew he could forge into pure iron. so, according to records at the new york state library, in 1736 board and a partner named timothy ward bought 150 acres of land and formed the sterling forge and furnace company. they built a bloomery, a furnace used for smelting iron ore. workers would heat the mineral and beat out all excess material with a hammer, leaving only pure iron behind. they continued this process until 1751, when they constructed their first blast furnace, which heated the magnetite with limestone over a 2, 000 - degree charcoal fire. the chemical reaction liquefied the iron and separated it from the other materials. a plaque


they continued this process until 1751, when they constructed their first blast furnace, which heated the magnetite with limestone over a 2, 000 - degree charcoal fire. the chemical reaction liquefied the iron and separated it from the other materials. a plaque at the site outlines the history of the furnace the sterling works soon began manufacturing ship anchors with their iron, and the business took off. in the 1760s, they also produced such goods as pig and bar iron ; cart, wagon, and chair spindles ; tea kettles, skillets, and pots. around this time a man named peter townsend became a partner in the company, and under his family ’ s leadership sterling prospered during the american revolution, manufacturing arms and ammunition for washington ’ s continental army and supplying anchors for navy warships. in fact, the mine made one item in particular that may have saved the colonial cause from near certain collapse. in february 1778, the army contracted with townsend to make an iron chain that was to be placed clear across the hudson river at west point. its purpose was to block british ships from attacking new york city from the north. townsend ’ s chain, as it came to be known, was laid in place on april 30, 1778 — and the british never even tried to cross it. peter townsend died in 1783, but the ironworks remained in his family ’ s possession until the mid - 1800s. it was during this period that business boomed — and not just for sterling. others explored and dug dozens of mines in the region. “ some were successful, some were not, ” lenik says. but there were two other major mining operations nearby. one was in ringwood, new jersey, which operated until 1930 ; the other was the o ’ neil mine in orange county. all three were full - fledged mining complexes. “ the companies built villages and the miners — first the english and later germans, irish, and italians — lived there, ” he says. “ workers were paid 81 cents a day at o ’ neil in 1870, and you could feed a family on that. ” remnants of sterling ’ s community are still visible. now known as the lakeville “ ghost town, ” foundations from the furnaces, mines, and houses linger along hiking trails. says doc bayne, former environmental educator and historian at sterling forest state park, “ they had a company store, buildings for the industry processing, a hotel, and homes. both management and workers lived there with their families, and some single men who pretty much just lived out in the


educator and historian at sterling forest state park, “ they had a company store, buildings for the industry processing, a hotel, and homes. both management and workers lived there with their families, and some single men who pretty much just lived out in the woods. we do still find old foundations around. ” not much is known about the sterling company from the post - civil war period until 1890. by the turn of the century, however, the business was failing. the depression of 1892 - 1896 had something to do with that. but a bigger concern — one that eventually ended the iron industry here — was the 1866 discovery of a vast deposit of iron ore in the mesabi range, located in northern minnesota ( in an area still known today as the iron range ). this deposit was not only more extensive than the eastern range, it was far more easily accessible : most of the iron was close to the surface and could be extracted in shallow open pits rather than in deep mines. shipping on the great lakes also made transportation easier, so the economics of the industry shifted seismically. except for a brief flurry of activity during world war i, the sterling mine declined. the company closed for good in 1923, and the lakeville ironworks town crumbled. see gallery below to view more photos of abandoned mines in sterling forest.


what is the center for acute disease epidemiology? cade is a bureau within the division of acute disease prevention and emergency response and works to protect and preserve the health and safety of iowans from infectious diseases through disease surveillance ; investigation of acute outbreaks ; education and consultation to county, local, and private health agencies on infectious diseases ; immunization and vaccine guidelines ; treatment after animal bites ; and vaccines for international travel. the center also provides consultation to county and local health agencies on diseases requiring public health intervention, collaborates with centers for disease control and prevention by weekly reporting of nationally reportable diseases, and offers health education opportunities through lectures and organizational seminars. cade routinely monitors over 45 diseases as well as unusual occurrences of disease ( outbreaks ). click here to find information on specific diseases. these factsheets were designed to promote safe and healthy living environments by providing pet owners and the general public with resources on common diseases transmitted between animals and humans ( zoonotic diseases ). antibiotic resistance happens when microbes ( germs ) develop ways to survive the use of medicines meant to kill or weaken them. according to the centers for disease control and prevention ( cdc ), foodborne illness affects 48 million americans, causes 128, 000 hospitalizations and 3, 000 deaths annually. idph ’ s initiative to reduce healthcare - associated infections ( hais ) includes supporting science - based actions to decrease these infections to make healthcare safer for all iowans. the iowa disease surveillance system ( idss ) enables local public health, hospitals, laboratories, and idph to collaborate electronically as they perform disease reporting and surveillance activities across the state. the iowa influenza surveillance network ( iisn ) is comprised of physicians, schools, child care centers, businesses, and long term care facilities who track the occurrence on influenza - like illness. rabies is a deadly virus spread to people from the saliva of infected animals. the rabies virus is usually transmitted through an animal bite. there are two rabies strains that commonly circulate in iowa ( bat and skunk ), and many different species can be infected with these strains. animals most likely to transmit rabies in the united states include bats, skunks, coyotes, foxes and raccoons. in a joint effort with the university hygienic laboratory, the iowa state university department of entomology, the iowa department of agriculture and land stewardship, and several local health departments, the iowa department of public health has instituted a number of programs which have allowed iowa to monitor west nile virus


first - hand : cryo cmos and 40 + layer pc boards - how crazy is this? contributed by : tony vacca how it started it was in the early 80 ' s. control data ( cdc ) had just launched the cyber - 205 with modest success and the team was now focused on the next generation machine, the 2xx as i recall. speed, cost and meeting the schedule were all key objectives. speed because cray research under the guidance of seymour cray was setting milestones for supercomputers with the cray 1 and then the cray 2. cost, since supercomputers were extremely expensive. schedules since the cyber - 205 had established patience records as a machine that may never get out the door and this must not be repeated. a conventional evolutionary approach for integrated circuit ( ic ) logic was initially selected. motorola, with some prodding, agreed to launch an 8, 000 gate equivalent ecl ( emitter - coupled - logic - the circuitry of choice for high performance processing units ) provided that control data do the actual circuit development. there were insufficient customers for motorola to commit their resources to this lofty development. motorola did, however, commit their advanced ecl processes to cdc and a joint team was formed with the two companies. logic designers at the cdc advanced design laboratory were given preliminary design rules based on computer device models and estimates of gate per chip densities. there was a natural follow up of grumbling by the logic design team led by very experienced and innovative folks ( ray kort, maurice hudson and dave hill to name three ) but circuit designers had learned to accept this since logic designers always found the circuits to be too slow and insufficient an quantity of gates and pins ( i / o ports ) per die. there was a lot of cooperation too. basic building blocks were defined by the logic designers - gate functionality, register functionality, etc. from this set of preliminary rules function blocks were defined and capacity per reasonably - sized printed circuit ( pc ) boards defined. the initial design using the cray cyber - 205 based architecture was launched. in parallel with this effort, and in the same design group ; i. e. ; circuit, packaging, pc board and newly formed cad ( tools for layout and design of chips and boards ) - chief chip design engineer - randy bach - was assigned to develop an advanced cmos chip for the canadian computer development organization. at this time, early 80 ' s cmos was in it ' s infancy being used for memory devices, low performance peripherals and


chip design engineer - randy bach - was assigned to develop an advanced cmos chip for the canadian computer development organization. at this time, early 80 ' s cmos was in it ' s infancy being used for memory devices, low performance peripherals and also for low performance microprocessors ( 5 to 10 mhz clock speeds ). the design contained 5, 000 gates plus appropriate input and output communication devices. gate arrays for cmos was also nearly non - existent so randy and his small team of two assistants developed a cell library and worked closely with the canadian development team to meet their objectives as well. this effort was completely separate from the ecl based gate array to be used for the next generation supercomputer. the product was developed for a low cost application. it was customary for neil lincoln - chief architect, dale handy - manufacturing manager and me to go off to lunch every 8 to 10 days to discuss status at either author treacher ' s fish & chips or zantigo ' s ( high class - not ) fast food restaurants. as a side note, both of these fast food places disappeared during the eta systems brief duration. zantigo ' s has returned ( i think because they know it is safe now that the three of us cannot visit together any longer - neil unfortunately passed on a few years ago ). at one of these meetings, neil had " news " for me. simply stated, the gate array in active co - development with motorola had unacceptable goals. the chip had too few i / o pins, consumed too much power and insufficient gates. in addition, he completed a cost model which indicated an unacceptable cost figure for the cpu. he also determined that the cpu ( some 3 million gates ) had to be assembled on a single board. " it was time for this goal to be reached ". he also reached the conclusion that a proper logic design required at least 15, 000 gates per chip to meet these goals. the logic designers had gotten to him i surmised. schedules, neil reminded us, could not be altered - and that was that. to soften the blow he bought lunch that day, three cokes and three orders of fish and chips - neil ' s was a large order. the trip back to the lab was pretty quiet, fortunately short since our eating places were all very close to the lab. that afternoon, i assembled the key folks - i might miss one or two but randy bach, doug carlson, dave resnick and john ketzler were four that i recall now


fortunately short since our eating places were all very close to the lab. that afternoon, i assembled the key folks - i might miss one or two but randy bach, doug carlson, dave resnick and john ketzler were four that i recall now. doug was a mechanical engineer that i assigned the motorola project to because of his management skills - something he probably never forgave me for - john was the key circuit engineer on the motorola project and dave was and still is a very versatile and perceptive engineer. doug and i would inform motorola of the decision not to continue. the team would package up what was accomplished and turn it over to motorola to carry the ball forward if they wished. as a side note, motorola and cray did continue the design. it was the circuit design used in the cray c90, a very successful cray research supercomputer. the meeting turned to what were the next steps. the key challenges that emerged were : - ic technology that could meet the new lofty goals - the pc board technology required to meet a single board cpu - packaging and interconnect technology required to support the two above requirements - computer aided design ( cad ) technology necessary to accurately design ic and pcb technologies - suppliers for all - do they exist? - what additional internal resources were required to achieve objectives - system packaging beyond a single cpu. ( memory, peripherals, i / o, etc. ) - testing of complex ic technology and complex pcb technology before getting to the details as to how decisions were made and how the eta system technologies the “ kit ” was selected and developed, a list of noteworthy accomplishments achieved are listed : - first industry competitive cmos cpu since 1995 – to the present ( beginning 12 years after the technology selection by eta systems i might add ) all hpc ( high performance computers ) are developed and manufactured using cmos ic technology. until as late as 2000, bipolar technology ( higher power, more costly to manufacture and lower gate count per chip ) dominated high performance computers throughout the world. - first industry single board cpu the chip density ( gates per chip ) allowed by advanced cmos, the use of layout and design computer aided design tools for optimum layout and simulation, the successful design of a 45 layer advance printed circuit board ( you read it right 45 layers ) and innovative chip attachment and cooling permitted a single processor containing nearly 3 million gates to be packaged on a single board - first industry system to bedesigned with self - test cpu processing units ( ≈3million gates


read it right 45 layers ) and innovative chip attachment and cooling permitted a single processor containing nearly 3 million gates to be packaged on a single board - first industry system to bedesigned with self - test cpu processing units ( ≈3million gates each ) were validated for functionality and performance in less than 4 hours. any interconnect errors were recorded and allowed chip - to - chip replacement to occur in a minimal time. other cpu checkout during this same period required weeks to months to check out and validate a processing unit. incoming testing of the logic ic chip ( function and performance ) also used the same self - test innovations. - first industry production liquid nitrogen cpu the eta systems cpu was immersed in liquid nitrogen – 77 degrees kelvin – to improve performance greater than two times that cmos technology operated at room temperature – 300 degrees kelvin. - first system at cdc to fully utilize computer design software to design chips, boards, validate logic design and auto diagnostic test the system with synergistic tools permitted checkout of a cpu to be completed in less than 4 hours. manufacturing costs were greatly reduced. this technique was also used at the ic supplier and greatly reduced any probe test hardware and software. - first industry system to havemultiple cost designs from single design effort performance range of the eta system products was greater than 24 : 1 ( 8 processor system operating at 7 nanoseconds clock period and a single processor system operating at 24 nanoseconds. ). processors were manufactured, tested and validated from a single manufacturing line using identical components. ( ic chips were performance sorted using auto self test ). product differences began at the system packaging level. boring into details any technology kit must be driven by a customer need. in the case of supercomputers the craving for increased computer performance at a lower cost ( overall cost ) was the deciding factor. in any supercomputer company a combination of marketing requirements, architecture innovations and logic design demands dictate the initial objectives of the hardware circuit and packaging organization. i state “ initial ” since once the objectives are digested and key technologies are evaluated for the time frame addressed, compromises are the norm. in the case of eta systems technology selections in the early 1980 ’ s, this was the strategy implemented. the following paragraphs sequence the thought process and the technology selection strategy utilized. integrated circuit selection the objectives, listed in earlier paragraphs were first integrated into the architecture and logic design requirements. a market survey of key integrated circuit suppliers was conducted with


implemented. the following paragraphs sequence the thought process and the technology selection strategy utilized. integrated circuit selection the objectives, listed in earlier paragraphs were first integrated into the architecture and logic design requirements. a market survey of key integrated circuit suppliers was conducted with emphasis on what was in development and planned for product introduction – not what was available at the time of the survey. a risk assessment was made. primary focus was on the most dynamic technology, the ic logic technology. all decisions as to volume requirements, pins, packaging, etc. resulted from what was determined by this survey and risk analysis. merging the logic design objectives ( gates, bandwidth and performance of key functions ) was next. an ecl ( emitter coupled logic ) high performance bipolar gate array using motorola advanced ic technology was selected. since motorola was not fully staffed to begin the actual product development ( application ) but did have the process development underway, a cooperative development agreement was struck with the two companies ( this occurred between motorola and control data since eta systems had yet not been formed ). the design called for basic logic cells to be incorporated into a larger version of their existing gate array advancing the process for increased performance and chip size for increased gate capacity. the existing gate or function array utilized approximately 2, 500 gates ( which was used as the primary gate array for the cray research very popular y - mp supercomputer ) and the planned gate array would contain an excess of 8, 000 equivalent gates. logic cell libraries were agreed to ( acceptable to both motorola for the general market and to cdc for the logic designs ). pin counts ( for power, ground and input / output logic communications ) were established and power consumption estimates were made. once these parameters were established, board size, power systems and thermal control were evaluated in a trade off give - and - take. features of printed circuit boards, ( line widths, spacing, interconnect vias and number of layers were compared to the board size capacities, laminating press capabilities, drill designs and printed pc board processing limits. ic packaging, limits, i. e. ; minimum size of package, pin spacing, thermal removal, etc. was evaluated in parallel with pc board limits. the chip design began, the cell library began and the packaging began once all parameters ( pins, power consumption and die size objectives ) were agreed to. printed circuit board experiments also began. once feasibility was established and practical limits established ( original goals could be met as to physical design and performance based on ic modeling and extrapolation from


( pins, power consumption and die size objectives ) were agreed to. printed circuit board experiments also began. once feasibility was established and practical limits established ( original goals could be met as to physical design and performance based on ic modeling and extrapolation from previous established functional systems, a preliminary specification was presented to the architects and logic designers for review. from initial design data, logic design based on the parameters provided established a physical size for the central processing unit or cpu, the heart of the system. a multiple board processor was required. this placed additional constraints on packaging since within a single processor all distances are crucial between circuits. three - dimensional packaging concepts were considered. three dimensional packaging effectively meant a “ sandwich ” effect of multiple boards with interconnects from board to board were throughout the area – not exclusive to the periphery of the board such that chips on each of the boards would minimize distances between them. in addition, power consumption estimates were made ; thermal removal paths and techniques were considered. a cost model was generated as well. all of these factors resulted in a preliminary estimate of the cpu volume. in the introduction portion of the document, you already know that this was rejected - more to follow for sure. in parallel with these efforts, memory design was underway. less freedom was available to memory since the basic semiconductor device could not be altered to accommodate specific users. there were a few packaging alternatives, very few, and device configurations ( word – bit architecture, pin numbering, power considerations, etc. ) were dictated by the industry. since memory design has its own objectives for cost, reliability and performance, this effort could continue quite independently with one exception, the packaging of the total system must be synergistic and compatible. a crucial parameter of this is the interconnect mechanism between processors and memory. a hardware system cost model was established – not only for current cost considerations but also estimates on volume costs based on learning - curve estimates as well for the life of the system. the chief architect, after careful review, rejected the design ; this was covered in the introduction. three key reasons were sited ; performance would be impacted due to the 8, 000 gate limit, ( worst case logic paths could not reside in a single chip and multiple chip distances would increase the clock period ), power consumption per cpu, although lower on a performance ratio basis to previous generations, was too high when the total system size ( including the multiprocessor objectives ) were considered and system cost appeared prohibitive – always a subjective issue but never - the - less a


cpu, although lower on a performance ratio basis to previous generations, was too high when the total system size ( including the multiprocessor objectives ) were considered and system cost appeared prohibitive – always a subjective issue but never - the - less a key component of the design. reliability concerns were also stated since the pin - count per cpu, although quite reduced from previous designs, were of concern. the architecture was committed to four cpus ( max ) per system so the interconnect " bar " was raised. back to the drawing board bipolar technology refers to conventional npn and pnp transistors operating in a non - saturating mode ( collector - base ). by not saturating the operating transistors ( not allowing the base voltage being higher than the collector voltage ) the switching characteristics were improved and balanced ( off logic level and on logic levels had identical delays ). in addition, the non - saturating circuitry – titled ecl for emitter coupled logic – provided the true and compliment outputs for each logic function ( i. e. ; and & nand, or & nor, etc ). this provided advantages to logicians to design complex boolean functions ( add units, multiply units, divide units, etc ). under the category of “ no free ride ” ecl circuitry consumed higher power than the more popular but much slower saturating logic circuitry ( ttl – transistor - transistor logic ). other improvements in performance for integrated versions of ecl logic circuitry included replacing conventional junction isolation between circuit devices on a single die with oxide isolation between circuits ( lower capacitance per circuit so less charging and discharging when logic levels switched ). cmos ( complementary metal oxide silicon ) circuitry, especially at the time of eta system, was a simpler and more efficient logic circuit. this form of logic also had a simpler process. stacking of p channel and n channel transistors in series between voltage bus rails defines a single complementary gate. functionality of the logic devices is much more forgiving to process variations due to the larger voltage swing and only active transistors used to define the circuitry ( no resistors, diodes, etc. ). the physical size of a logic function when compared to a bipolar equivalent is significantly smaller, resulting in an increase in circuitry per equivalent die ( chip ) size. cmos technology also consumed power only when the circuit was switching ( changing states ) so power consumption was directly proportional to the frequency it


compared to a bipolar equivalent is significantly smaller, resulting in an increase in circuitry per equivalent die ( chip ) size. cmos technology also consumed power only when the circuit was switching ( changing states ) so power consumption was directly proportional to the frequency it was operating. ( p = cv2f ) ecl circuitry, by contrast, consumed approximately the same power – while switching or in a quiescent state. ( later forms of cmos – especially those designed in early 2000 and beyond, had increased power consumption primarily caused by increased bulk leakage currents as a result of processes developed for lithography having features en excess ( smaller ) than 90 nanometers. technology at the time of the development of the eta supercomputers had minimum features of 1, 200 nanometers. ( in 2009, by contrast, the production capability is 45 nanometers ) advantages of cmos were obvious ; more circuits per given chip area, lower power consumption and higher functional yield. it is important to stress “ functional yield ”. the cmos devices functioned over a much larger range of processing variations ( > 50 % vs. < 15 % to 25 % for ecl ). performance variations for a given process were approximately 2 to 3 times for cmos and 20 % to 30 % for ecl. for this reason cmos devices were sold at a much lower performance than any bipolar counterpart. ( i. e. ; if the product was specified to accommodate the entire functional lot ( wafers processed at the same time ), more ic devices yielded. there is one other key difference in defining performance differences between bipolar and cmos devices. for ecl ( or any other bipolar device ) the maximum operating frequency is defined, in part, by the base width – the physical distance between the emitter and collector of the transistor. this is determined by the spacing based on diffusion or implant of the emitter and is controlled in the vertical direction and limited by process control that is quite precise. this parameter is very thin and the frequency is determined indirectly proportional to the base width. for cmos the gate length defines the critical performance parameter. gate length is defined by mask optic limitations for any generation of processes. bipolar devices in the 1980 ’ s and well into the later half on the 1990 ’ s, therefore, had higher operating maximum frequencies than their cmos counterparts. as capital equipment – primary optics to generate masking and etching capabilities defined smaller and smaller geometries, cmos technology improved dramatically in performance. this was a result


’ s, therefore, had higher operating maximum frequencies than their cmos counterparts. as capital equipment – primary optics to generate masking and etching capabilities defined smaller and smaller geometries, cmos technology improved dramatically in performance. this was a result of smaller gate lengths but also each generation had smaller devices resulting in lower capacitance loading and lower time constants to charge and discharge. during the time of the eta systems supercomputer development, cmos technology had not seen the advantages that bipolar devices could realize – but the potential for future improvements was obvious and projections clearly indicated that by the second half of the 1990 ’ s ( nearly 10 years after the first eta systems supercomputer would be available ), cmos would overtake bipolar in the last and most important parameter – performance. to restate this ; the ic industry was transitioning to cmos technology and more funding at the device, and equipment level was being expended to accommodate new markets focused on potential of cmos than was being expended for bipolar devices. bipolar technology was stretched to a practical limit for the time frame in question. the ic industry, therefore, had only one other technology candidate, cmos, which was, in 1983, used exclusively for lower cost and considerable lower performance applications and memory device technology where more bits per die could be fabricated at the expense of lower performance of the bipolar counterpart ( s ). the impressive characteristic of cmos technology at this time was : lower power consumption per function, smaller size per logic function and lower cost per die due to two key factors ( smaller physical size per function meant more logical functions per unit of area, and higher chip yield – chip functionality per wafer manufactured – due to reduced number of processing steps to generate cmos devices. that was the good news. the concern was system performance. while bipolar technology had set the standard for clock periods of 10 nsec for supercomputer architectures such as the eta system projection, cmos was at least 5 times slower – in most cases 10 to 20 times slower for equivalent architectures. based on this parameter alone, cmos was not a candidate for supercomputers in the 1999 - 1990 time frame ( the time frame where the eta systems supercomputer would be in high volume production ). the next steps for cdc ( recall that at this time cdc still had a supercomputer division ) were dramatic and at times emotional. first, the team had to discard the ecl design and terminate the effort with motorola. this


). the next steps for cdc ( recall that at this time cdc still had a supercomputer division ) were dramatic and at times emotional. first, the team had to discard the ecl design and terminate the effort with motorola. this was very difficult since both companies depended on each other and secondly, all objectives of the ecl product were being met within the specifications established. cdc ( team which later became eta systems ) provided motorola with all of the design details to date. considerable effort was made to insure that the program was successful at motorola. a sidelight to this discussion – motorola completed this product as an industry product. cray research inc. ( the key competition and leader of the supercomputer market ) engaged with motorola to successfully complete this complex ic development for a product announced in the late 1980 ’ s. the product ( cray c - 90 ) under the leadership of les davis, steve nelson and other notable scientists ( a key circuit designer was mark birrittella ), became another very successful supercomputer products developed and manufactured by cray research inc.. next, a full effort evaluation of all technology candidates occurred. cmos futures were explored in depth. gaas technology was also evaluated. alternative ecl ( bipolar ) candidates were also considered. cmos was viewed as the technology of the future but the future was beyond the time frame necessary for product introduction. key events that led to the decision to use cmos technology. moore ’ s law ( invented by the great innovator and co - founder of intel – gordon moore ) stated that ic technology ( cmos ) technology, would double in performance and density every 18 months to two years. the actual moore ’ s law may have been stated somewhat differently but this captured all the project cared about. to achieve this predicted growth, several parameters had to occur : - the die size would increase ( more gates per manufactured chip ). - features on the chip ( metal widths and spaces to interconnect devices and actual device parameters ) would be reduced every 16 months to 2 years. reducing parameter sizes have two positive results to goals of eta systems : increased performance and more gates per die. - the technology would gain broad industry popularity – this would mean that capital equipment would keep pace with the “ law ”, applications would increase thus increasing volume, thus lowering cost and increasing performance and more applications and industries would drive cmos technology – the supercomputer industry could not drive such a large industry. key industry activities also emerged at this time


“ law ”, applications would increase thus increasing volume, thus lowering cost and increasing performance and more applications and industries would drive cmos technology – the supercomputer industry could not drive such a large industry. key industry activities also emerged at this time : - cdc validated operational performance gains operating cmos technology in a cryogenic environment. several ring counter configurations generated with the 5, 000 gate chip discussed earlier were dipped in a liquid nitrogen thermos jug expecting to witness the shattering of the silicon and the detachment of the solder joints attached to the oscilloscope only to find the frequency of the ring oscillators double and the system operate for weeks until we turned off the experiment. analytical analysis applied to the silicon design validated the research done previously by others. - key us government agencies began a technology acceleration program based on cmos technology – the very high speed integrated circuits ( vhsic ) program under direction of the army, navy and air force certainly captured our attention. - honeywell, one of the participants in the vhsic program held a technology luncheon ieee symposium in which they presented an 11, 000 - gate cmos development effort. attendees from cdc were impressed ( especially the key designer – randy bach - with what the efforts. the chip was certainly larger than any that had been developed to date and the performance was accelerated beyond what was predicted for the 1988 time frame by the conventional ic industry ( the introduction date set for the eta systems supercomputer – then the next generation cdc supercomputer ). honeywell was a recipient of one of the vhsic contracts. - logicians and architects back at cdc - led by neil lincoln ( chief architect ), ray kort, maurice hudson and dave hill and others - determined that an minimum gate density of 15, 000 gates per die would allow them to achieve a key objective ; having a worst case register to register clock path residing within a single chip. now additional explanation is required here. there were technical reasons that the logicians wanted more beyond the knee jerk reaction that asking for 50 % more than offered was a standard mode of operation for these guys. each architecture configuration has a method of achieving its goals of applying computational instructions to problems. the number of gates that are connected in serial fashion between the input and output registers ( and this is truly simplifying the problem ) determine the clock period that is allowed. for the eta systems supercomputer, therefore, it was determined that a functional unit clock period could reside within the boundary of the chip if the


registers ( and this is truly simplifying the problem ) determine the clock period that is allowed. for the eta systems supercomputer, therefore, it was determined that a functional unit clock period could reside within the boundary of the chip if the chip could provide 15, 000 gates of logic to the designer. - research into technology experiments uncovered significant performance features of cmos technology. first of all, the technology was functional across a wide range of voltages and temperatures but performance was significantly altered. the higher the operating voltage ( within semiconductor constraints, of course ) the higher the performance resulted. unfortunately the power consumption, although significantly lower than any alternative technology, increased as the square of the operating voltage. the lower the operating temperature of cmos the higher performance as well. this factor was studied by others and carefully documented from 400 degrees kelvin ( 100 degrees above room temperature ) to 77 degrees kelvin. ( 77 degrees kelvin is the boiling point temperature of liquid nitrogen. ) summary of what was learned with this evaluation - ic chips currently ( four years before the need for an eta systems product ) had a capacity of 11, 000 gates. - the performance of these gates, when operated at liquid nitrogen temperatures, would perform at least two times faster than at room temperature – not yet validated at cdc. - 15, 000 useable gates were required per chip to meet logic designer chip boundary requirements. < o : p > < / o : p > ¨ if moore ’ s law was applied to these parameters, within the time frame required, it was possible to achieve both gates per chip densities and performance goals ( if the system operated in a liquid nitrogen environment ). - there were at least two ic suppliers ( those having contracts with the us government ) that were pursuing cmos as a performance and high gate / chip density technology ( the other known corporation was trw ). - computer aided design ( cad ) tools were, during the period of the 80 ’ s, in the infancy stage if one was to compare them to today ’ s capabilities. to design, place cells within the matrix of the gates provided on the ic chip, and route the interconnections of these cells accurately to the logic or boolean design required by the logicians and to clock period constraints was a challenge. this challenge applied to board layout designs as well. control data corporation ( cdc ) recognized the challenges and established a small but efficient and dedicated organization to address these challenges. the industry had established a metric that to use cad tools for gate or cell arrays, an additional


applied to board layout designs as well. control data corporation ( cdc ) recognized the challenges and established a small but efficient and dedicated organization to address these challenges. the industry had established a metric that to use cad tools for gate or cell arrays, an additional 20 % to 30 % gates were required. this meant if the eta supercomputer required at least 15, 000 useable gates to accomplish necessary designs based on its architecture, an 18, 000 to ≈20, 000 - gate capacity was required. the technology organization set at its objectives a design of 20, 000 gates plus necessary circuitry to self - test each gate or cell array. this as compared to the gate array in development at honeywell was nearly 2 times the capacity ( 11, 000 total gates vs. 20, 000 total gates plus circuitry for self test ). the task was to convince honeywell to project the next generation size and layout rules and to accept an r & d effort that would allow cdc / eta systems achieve its objectives. honeywell, an innovative organization, took on the task after considerable discussion with key requirements : - eta systems ( we were now eta systems by the time these discussions reached negotiations ) accept costs based on wafers processed, not functional chips. honeywell would provide necessary processing data to reflect wafers were processed within process parameter specifications. - eta systems provide test equipment for wafer testing and test parameters for chip acceptance prior to packaging. - both companies would share facilities and key resources and work as a single team – as “ open a kimono relationship ” that one could ever imagine during this dynamic period of complex process developments within the ic industry. – david frankel was assigned the task as eta systems interface and engergetically took on the challenging task. - self - test circuitry was designed into the basic cell array periphery. the area consumed by this custom set of pseudo - random generated logic and registers was less than 15 % of the total chip area. ( david resnick, resident do - it - all reduced concepts explored by ex cdc scientist nick van brunt who left the company a year previous to the formation of eta systems. ) this was one of many extra ordinary contributions david made to eta systems. additionally to providing self test capability to accept or reject the circuitry – both functionality and performance sorting – the circuitry included in each 20, 000 gate array had capability to test for interconnect between circuits on the final pc board as well as circuit to i / o connections. when the logic design team first heard of this area


performance sorting – the circuitry included in each 20, 000 gate array had capability to test for interconnect between circuits on the final pc board as well as circuit to i / o connections. when the logic design team first heard of this area “ waste ” of test circuits that could be used for logic design, they lobbied for it to be removed in favor of more logic gates for function designs. fortunately this request was not honored. ic validation at both the supplier in wafer form and at eta systems in packaged chip configuration coupled with the use of the same circuitry in manufacturing checkout to detect board opens and shorts between circuits assembled both in room temperature and cryogenic temperature environments proved to be well worth this “ waste ” of circuitry area. small, relatively inexpensive testing systems were designed by eta systems and provided to the supplier. the operands for initialization of the pseudo - random logic were also supplied for each design ( chip type ). chip types ( array design options ) were carefully managed as to not proliferate the chip types in the system. this was a new constraint placed on logic designers and was dealt with most professionally and responsibly by all participants once understood. the resultant chip total for the cpu ( processing unit ) was fewer than 150 while the chip types including clock chips and all logic design chips was fewer than 20 as best recalled. during the development cycle of the eta system supercomputer, honeywell moved the manufacturing capability from a local minneapolis facility to a state - of - the - art manufacturing facility in colorado springs, co. the transition was very transparent to eta systems ( with the exception of the traveling budget, of course ). to accomplish this team membership from both companies acted as one in all decisions addressing scheduling and timing of needs of various chips, testing, packaging, etc. the open book relationship was very beneficial to both companies. on one milestone occasion – where honeywell successfully completed an initial order – dave frankel and i visited honeywell, some 30 miles from the eta systems facility, and served cake and coffee to all designers and operators – it was below zero when this milestone was reached and no one cared. one design that was incorporated into the chip was to allow for next generation critical processing parameters to be added to the existing design ( present chip layout ). although this would not optimize the features of new process features ( all parameters were not considered ), key performance enhancements could be and were added to the present design. a key feature was gate length and this was added transparently


layout ). although this would not optimize the features of new process features ( all parameters were not considered ), key performance enhancements could be and were added to the present design. a key feature was gate length and this was added transparently to the physical chip and offered appreciable performance enhancements to the design. chip design summary : the decision to utilize cmos technology for the eta systems supercomputer in the 1985 – 1988 time frame ( prematurely by all industry metrics ) resulted in the following additional “ technology kit ” decisions : addition of chip self - test. feature established functionality at wafer test and functionality and performance sorting at eta systems - computer layout tools that validated logic prior to chip release for fabrication - requirement to operate the chip at 77 degrees kelvin or in liquid nitrogen - packaging, interconnect & assembly decisions based on liquid nitrogen operation challengesremote testing of the cpu because of liquid nitrogen operation challenges - logic design partitioning challenges to design within 15, 000 - gate per chip boundaries and a minimum of ic chip types printed circuit board design selection : in the period of the 1980s, the time frame of the eta systems supercomputer development, printed circuit boards had maximum dimensions of approximately a square foot and the number of total layers fewer than 20. ( layers provide power and ground stability, interconnect capability for the circuits attached to the board as well as inputs and outputs to and from the board. ) if these total layers are allocated properly, approximately 50 % are used for interconnect and the remaining for power and ground. positioning of power and ground layers also serve to provide interconnect layers that have transmission line capabilities to insure signal integrity throughout the board. during this period, a state - of - the - art printed circuit board was approximately one square foot of active circuitry and as stated earlier, 20 layers or fewer usually restricted to a total thickness of 0. 063 inches. it was determined that a maximum of 150 chips would be required to design the eta systems supercomputer cpu. packaging of the ic and interconnecting the chip to a pc board with minimum spacing between chips ( some spacing was required to allow interconnects to all of the necessary layers ) resulted in a 1. 2x1. 2 sq. inch “ footprint ”. doing the simple math results in a pc board of a minimum of 220 sq. inches. the number of total layers required to interconnect the 150 chips and the necessary input and


. 2x1. 2 sq. inch “ footprint ”. doing the simple math results in a pc board of a minimum of 220 sq. inches. the number of total layers required to interconnect the 150 chips and the necessary input and output at the board periphery was determined to be 45. looking at design parameters of the board layers in more depth and insuring transmission line features to insure signal integrity defined the board thickness at slightly greater than 0. 25 inches. this thickness was approximately three times greater than high - end printed circuit boards produced in this time frame. with a board having an area of greater than 1. 5 times the size of what was able to be produced, a thickness of 300 % of what was produced and a the number of layers 2. 5 times of what was produced in this time frame it was clear that the printed circuit board industry was not ready for the eta systems design! the design has other limitations. a key factor when designing pc boards is to insure proper connecting of the layers, i. e. ; connecting the chip pins to the board and the proper layer of interconnect in the board and back to the proper receiving chip. drilling holes in the layers and plating the wall of the holes with copper for conduction make these connections. these are called plated thru holes or pth. a key parameter to insure that plating occurs in these holes is the hole diameter to depth ratio. the industry at this period ( not much better today ) is 6 : 1, i. e. ; the thickness of the board must be no more than 6 times the diameter of the hole. this ratio would dominate the size of the board. if this ratio is used to design the board the board size would be increased in area by greater than 9 times. talk about piling on! since it was deemed not feasible, issues like cost and time to fabricate the board were not even addressed. nestled into the design laboratory of control data corporation was a small but very innovative printed circuit board prototype facility. the leader of this group, leroy beckman, never said “ no ” to challenges. he just bit his pipe a little harder and tried not to snicker out loud. leroy kept his eyes and ears out for innovative alternatives to conventional board fabrication techniques and had previously displayed innovation ( evolutionary in nature ) in previous generations. embedded termination resistors in layers was one invention he brought to cdc when resistor termination took up too much board area ; finer features than the industry was producing another,


board fabrication techniques and had previously displayed innovation ( evolutionary in nature ) in previous generations. embedded termination resistors in layers was one invention he brought to cdc when resistor termination took up too much board area ; finer features than the industry was producing another, and higher plated through hole ( pth ) ratios than the industry a third. new technologies in the printed circuit board were few and far between. the industry was set in it ’ s ways of subtractive etching of circuit layers ( removing unwanted copper from a pre - copper clad layer, convention wet etch processes and relatively simple assembly, i. e. ; lamination of layers with pressure. one inventor, mr. peter p. pellegrino, arrived on the scene to discuss innovative, revolutionary and proven pc board processing. at first the claims appeared to be too good to be true. board size relatively independent, aspect ratios exceeding 20 : 1 for pth, an additive process that permitted finer lines to be fabricated on individual layers. the layers were also embedded into the laminate so the opportunity for higher yield with reduced features. an additional benefit of additive plating is reduction in waste and water usage. a special plating cell was also introduced that permitted uniform deep hole plating by forcing plating fluid into each of the thousands of pth. the process titled “ push - pulltm ” also accelerated the plating manufacturing cycle by over an order of magnitude, reducing cost. a small plating cell was incorporated into the prototype facility at cdc and a controlled set of experiments conducted. experiments were thorough and challenging since no one in the industry could approach the lofty objectives of the eta systems supercomputer cpu board nor the lofty claims of the inventor. the results were simply outstanding. from the results and a commitment to fabricate a larger manufacturing line of plating insert cells, the 45 layer 15 ” x 24 ” cpu board became a realistic finalized goal of eta systems. anyone told of this goal openly scoffed at this as too risky and unrealistic. this included some in the company as well. later, when manufacturing of the systems was viable, a production capacity was developed for manufacturing. it is noted that hundreds of these boards were fabricated from a period of 1987 through early 1989. the yield of final boards was nearly perfect – only one finished board was scrapped. to this day ( 2009 ) few realize what a monumental accomplishment this was and still is. this a tribute to leroy beckman, peter pellegrino, the manufacturing facility at eta systems ( now a


perfect – only one finished board was scrapped. to this day ( 2009 ) few realize what a monumental accomplishment this was and still is. this a tribute to leroy beckman, peter pellegrino, the manufacturing facility at eta systems ( now a banking building in st. paul ) and those who trusted that the lofty objectives could be realized. to accommodate routing and designing for minimum distance between ic chips, cad tools were developed and the first use of diagonal routed layers were introduced. prior to this only x – y layers were permitted with manual and / or auto tools ( cad ). this enhancement permitted timing constraints to be realized between chips. the final board had the following noteworthy characteristics : - board size : 15 inches by 22 inches by 0. 26 inches - pth hole ratio ≈ 20 : 1 – plating time – less than 20 minutes - 45 total layers per cpu panel - 150 ic chip locations ( fewer were used in final design ) - more than 30, 000 board plated thru holes ( pth ) were used for interconnect in 2009 this board development and manufacturing stands out as one of the major technology developments by eta systems the key challenge for packaging the eta supercomputer processing unit was the cryogenic chamber for the processor. the cryostat to contain the processor ( two processor units ) had a conventional ( and quite heavy ) circular cryostat containing a vacuum chamber between the outside environment and the inner environment. input of liquid nitrogen was at the bottom of the chamber and the escaping of the gaseous nitrogen was provided for near the top of the unit. the piping containing the nitrogen to and from the regeneration unit was also temperature protected with vacuum lines. dan sullivan and his design team led this admirable effort. ( unfortunately, dan passed on a few years ago ). it was felt that a less heavy and equally efficient chamber ( proposed by carl breske – a very innovative scientist ) could be designed if time permitted but the selection of the vacuum based design was conservative to accommodate schedule and also to familiarize the team with the challenges of cryogenics. the compressor unit was a conventional liquid nitrogen system ( very large and bulky ) used for generation of liquid nitrogen for the commercial market. the system was not pretty. marketing, led by bobby robertson ( also now deceased ), prohibited the engineers to show this to perspective customers fearful that this would scare them away. thought was given to actually eliminate the need to regenerate the system in a closed system but rather purchase liquid nitrogen – readily available in tanks


also now deceased ), prohibited the engineers to show this to perspective customers fearful that this would scare them away. thought was given to actually eliminate the need to regenerate the system in a closed system but rather purchase liquid nitrogen – readily available in tanks - and have them periodically refilled as is done in the ic and other industries using liquid nitrogen. this was discarded for the initial design since several customer sites did not easily accommodate the external access to liquid nitrogen tanks. it was to be an option for future systems and those customers that easily accommodated such an option. the final design was then a closed recycled liquid nitrogen system with the compressor located remote, much like freon compressors, which many supercomputer customers were already accommodating. the design challenge was at the surface ( looked much like a two slice toaster ) where the processing boards were inserted. this seal had to accommodate the connecting transmission to the external and room temperature memory and i / o subsystems. a printed circuit board was designed to connect the processor to the outside world. heaters were applied to the surface to prevent icing at the cryostat surface. the separation, only a few short inches had memory operating at 300 degrees kelvin and the cpu operating at 77 degrees kelvin. there were a few “ frosty ” events in this development cycle! the third challenge was to provide reliable soldering of the circuitry to the board amidst the severe temperature difference that the solder joints would be subjected to ( greater than 250 degrees ) during the cool down and warm up cycles. studies at the national bureau of standards provided input that the temperature cycle should be profiled in a precise sequence as the board was cooled and heated. in addition, care as not to remove the board and to care for condensation that would occur if the board had not been heated to room temperature was considered. the result was a 20 - minute cycle to remove or insert the board was designed with a specifically prescribed sequence of temperature lowering and rising for both cycles. at the time of the unfortunate termination of eta systems, a more refined, lower cost and lower weight design as stated earlier was on the drawing boards. although the cryostat and associated cooling was costly, an analysis clearly showed that for the performance resulting from the design, the cost was less than any bipolar ic system designed at the time. once the connector was finalized and the process and assembly designed, the system operated flawlessly. checkout on the manufacturing floor of the system utilized the “ self - test ” capability exhaustively so specific


less than any bipolar ic system designed at the time. once the connector was finalized and the process and assembly designed, the system operated flawlessly. checkout on the manufacturing floor of the system utilized the “ self - test ” capability exhaustively so specific interconnect flaws were clearly understood prior to removing a cpu from the cryostat, thus reducing checkout time considerably as well. these designs were well done, significant and challenged laws of thermodynamics and physics to new limits. air cooled system as stated earlier in the document, an air - cooled processor would operate considerably slower ( 2x slower ) when operated in normal or “ room temperature ” environments. eta systems by sorting the devices for performance at incoming inspection, allowed for a three times performance differential to be realized. only the highest performance devices were reserved for the cryogenic cooled system. the remaining parts were then re - sorted into two categories for room temperature ; the differential would be a 4 - nanosecond clock period between the two room temperature systems and 17 nanoseconds ( 24 to 7 ) for the total system product set. the sorting and using the entire distribution of integrated circuits had a significant cost reduction factor for the entire product line. bipolar devices, by contrast had lower functional yield to begin with coupled with additional loss of product due to performance yield. this was a definite cost reduction asset to the eta system. to cool the cpu air was forced on to the processor chips by using a plenum that was designed to cover each chip. holes were designed in the plenum such that equal operating temperature would result for each operating chip. since the power consumption variation significant for several part types, designing the appropriate number of holes above each chip location could provide custom cooling. the plenum could then be molded for mass production of the processing unit. large volume cooling fans were designed for the system as well. cost was the focus for the air - cooled systems since the price tag was below $ 1m. recall, that the air - cooled design was identical in parts at the cpu and storage level. a single development was achieved for a wide range of products with one design team. stacks using three - dimensional characteristics were designed under the leadership of brent doyle for the memory – both static ( high performance ) and dynamic ( high density and lower performance ) memories of the eta systems supercomputer. these unique designs provided for highest density and optimum performance of the standard memory devices used. ability to upgrade to future generations of memory ( more storage capacity integrated circuits )


( high density and lower performance ) memories of the eta systems supercomputer. these unique designs provided for highest density and optimum performance of the standard memory devices used. ability to upgrade to future generations of memory ( more storage capacity integrated circuits ) was built into the design as well. the design worked well and stacking became commonplace in the computer industry for future designs – eventually eliminating the chip package entirely. the air - cooled system was defined as a piper. an illustration of “ piper ” is shown below. the design of the eta systems supercomputer hardware had many unique features. the brief pages highlight some of them. it would be remiss not to briefly discuss the “ team ” concept used to design the hardware. by having the cad, packaging, memory, circuit and power expertise located in a close proximity and holding concise project reviews at all levels at periodic and timely phases, all were kept abreast of the progress and challenges of each other. this permitted changes to be made to necessary designs to properly accommodate the challenges and opportunities in a timely fashion. hardware was demonstrated on or near schedule despite the innovations required in each aspect of the design. the team was truly a “ team ”. a missing link to the team was the logic design. these folks were separate and actually on another floor of the eta systems facility. it was strongly suggested and accepted for future designs, that the logic team would be a part of this common organization. i had the opportunity to lead one additional hardware development that included the logic design team ( at cray research, not eta systems ) later. it was a smoother and more effective and thorough team. like eta systems the communications were open and included both manufacturing and software participation ( the later two were voluntary ). clearly, communications – effective communications at all levels of the organization was key to this hardware design success.


in gr cosmology, there is a big bang singularity. for every particle, there was only a finite time in the past. during this finite time, only a finite distance may have been reached. this allows to define a horizon of influence for each event — all events which may have had a common cause in the past. now, in standard gr cosmology this horizon is small. too small to explain some observable facts : the second problem is much more serious — some homogeneous distribution may have caused by something else, last but not least homogeneous initial values seem to be a meaningful assumption, based on ockham ' s razor. but if initial fluctuations are greater than horizon size, this requires a very strange conspiracy forbidden by current physics. the gr solution of this problem is inflation in the early universe. that means, some additional mechanism ( with some hypothetical origin in particle physics ) has to give an additional term in the early universe. this additional term leads to an acceleration of the expansion of the universe ( a " ( τ ) > 0 ). that inflation solves this problem seems to be the main reason why it is widely accepted in cosmology. in glet we have no big bang singularity and therefore no horizon problem. in some more general, technical meaning of the word " inflation " ( meaning only a period where a " ( τ ) > 0 or the expansion is accelerating ) for υ > 0 the related terms of glet leads to inflation if the state of the universe is sufficiently dense. thus, to sove the horizon problem, gr needs some additional mechanism, which has to be originated in something else, like particle physics. glet cosmology does not require such an additional mechanism. instead, the glet parameter υ, which solves the horizon problem in glet, follows from completely independent axioms of glet.


the fifth of may is called “ cinco de mayo ” in spanish and is a mexican national holiday. it is also celebrated throughout mexican - american communities in the u. s., perhaps arguably to a grander and bigger extent. the holiday recognizes the victory of mexico over the french at the battle of puebla, east of mexico city, on may 5, 1862. the mexican army was sorely outnumbered by the invading french army, but the mexican forces somehow prevailed. that crucial victory marked a huge step for mexico in its struggle for independence and served to boost morale during a time of political and economic unrest. unfortunately, the victory was short - lived because the french ruled mexico thereafter during the french intervention period until 1867. today, celebrations, parades and fiestas mark the historic date. fun facts and trivia cinco de mayo facts, fiction and folklore abound, including the following fun facts and trivia : - cinco de mayo is often confused with mexico ’ s independence day, which is celebrated on sept. 16 and marks the date in 1810 ( more than 50 years before the battle of puebla ), when the country gained its independence. - mexicans celebrate more than 365 festivals annually ( an average of one per day ), including cinco de mayo. - los angeles, chicago, houston, san francisco and other large u. s. cities host cinco de mayo celebrations each year, drawing thousands of celebrants to their events. - fiesta broadway is held in downtown los angeles each year and is viewed as the biggest cinco de mayo celebration in the world. this is thanks in part to the half million participants who attend each year. - one of the most prevalent and enjoyable ways that celebrants experience cinco de mayo is through mass amounts of delicious mexican cuisine and drink. - as the star ingredient in guacamole, avocados top the list of cinco de mayo celebration foods. the california avocado commission predicts that americans will consume in excess of 70 million pounds of avocados just during this celebration alone. - many compare cinco de mayo to st. patrick ’ s day because the event has become one large excuse to party. some community organizations are trying to revamp the holiday into a family - friendly cultural event. cinco de mayo may have started with historical roots, but today ’ s recognition of the event is marked by the consumption of mexican food and drink, parties, festivals, parades and merriment. whether or not commercialism is to blame for the departure in the


asexual reproduction is advantageous in allowing beneficial combinations of characteristics to continue unchanged and in eliminating the often vulnerable stages of early embryonic growth. it is found in most plants, bacteria, and protists and the lower invertebrates. in one - celled organisms it most commonly takes the form of fission, or mitosis, the division of one individual into two new and identical individuals. the cells thus formed may remain clustered together to form filaments ( as in many fungi ) or colonies ( as in staphylococci and volvox ). fragmentation is the process in filamentous forms in which a piece of the parent breaks off and develops into a new individual. sporulation, or spore formation, is another means of asexual reproduction among protozoa and many plants. a spore is a reproductive cell that produces a new organism without fertilization. in some lower animals ( e. g., hydra ) and in yeasts, budding is a common form of reproduction ; a small protuberance on the surface of the parent cell increases in size until a wall forms to separate the new individual, or bud, from the parent. internal buds formed by sponges are called gemmules. regeneration is a specialized form of asexual reproduction ; by regeneration some organisms ( e. g., the starfish and the salamander ) can replace an injured or lost part, and many plants are capable of total regeneration — i. e., the formation of a whole individual from a single fragment such as a stem, root, leaf, or even a small slip from such an organ ( see cutting ; grafting ). f. c. steward showed ( 1958 ) that single phloem cells from a carrot plant, when grown on an agar medium, would form a complete carrot plant. among animals, the lower the form, the more capable it is of total regeneration ; no vertebrates have this power, although clones of frogs ( 1962 ) and mammals ( 1996 ) have been produced in the laboratory from single somatic cells. closely allied to regeneration is vegetative reproduction, the formation of new individuals by various parts of the organism not specialized for reproduction. in some plants structures that form on the leaves give rise to young plantlets. rhizomes, bulbs, tubers, and stolons are other forms of vegetative reproduction. the columbia electronic encyclopedia, 6th ed. copyright © 2012, columbia university press. all rights reserved. more on reproduction as


papua ( papˈoə, – yoə ) [ key ] or irian jaya irˈean jiˈyə, province ( 1990 pop. 1, 641, 430, including west papua prov. ), c. 162, 000 sq mi ( 419, 580 sq km, including west papua prov., see below ), indonesia. comprising most of the western half of new guinea and a number of offshore islands, it is indonesia ' s largest province. the capital is jayapura ( formerly hollandia ). a rugged, densely forested region, with snow - capped mountains rising to over 16, 500 ft ( 5, 029 m ; highest in the nation ) at jaya peak, it is inhabited chiefly by papuans living in hundreds of tribes, each with its own language and customs ; about 10 % of the population consists of malay settlers from other areas in indonesia. the tropical coastal lowlands are swampy and cut by many rivers, including the digul and the mamberano, indonesia ' s largest. subsistence farming is carried on ( some of the highland tribes terrace and cultivate mountains with slopes of 45° ) ; taro, bananas, sugarcane, and sweet potatoes are the principal crops. wild game is trapped, and there is fishing along the coast and the rivers. the grasberg mine, in central papua, is the world ' s largest gold deposit and also contains valuable copper and silver deposits. magnetite has been found in the sterren ( star ) mts. near the papua new guinea border, a region unexplored until 1959. the dutch first visited the west coast of the island in 1606. they extended their rule along the coastal areas in the 18th cent., and in 1828 claimed possession of the coast west of the 141st meridian and in 1848 of the north coast w of humboldt bay. the dutch claim to the western half of the island was recognized by great britain and germany in treaties of 1885 and 1895. in world war ii the northern coastal areas and offshore islands were occupied ( 1942 ) by the japanese but retaken ( 1944 ) by the allies, after which hollandia became a staging base for operations in the philippines. following indonesian independence ( 1949 ), the dutch retained control of what was then called netherlands ( or dutch ) new guinea. years of dispute over the territory culminated in a declaration of independence in 1961 by native papuans, which was not recognized by indonesia, and the landing ( early 1962 ) of indonesian guerrillas and paratroopers there. the conflict


or dutch ) new guinea. years of dispute over the territory culminated in a declaration of independence in 1961 by native papuans, which was not recognized by indonesia, and the landing ( early 1962 ) of indonesian guerrillas and paratroopers there. the conflict between the dutch and indonesia ended in late 1962 when the netherlands agreed to un administration of territory and, after may 1, 1963, transfer of it to indonesian control pending a plebiscite ( to be held under un supervision before 1970 ). in aug., 1969, several hundred tribal leaders, voting as representatives of their people, chose to remain under indonesian rule, and indonesia then formally annexed the territory. the province, which had been known as irian barat ( west irian ) was officially renamed irian jaya in 1973. many papuans objected to the annexation ; resistance to indonesian rule, which began in 1962, has persisted, leading to sporadic large - scale conflicts and repressive army control. in june, 2000, a congress of papuan activists declared the province independent as west papua, an action that was rejected by the indonesian government, which subsequently responded with a military crackdown on independence supporters. the area, however, was subsequently granted ( 2001 ) limited autonomy. in 2002 the provincial government adopted the name papua for the province. a national government proposal in 2003 to split papua into three provinces sparked new unrest there, and the indonesia constitutional court annulled ( 2004 ) the law that divided the province. however, the court nonetheless accepted the establishment of west irian jaya prov., which had already been created on papua ' s western peninsula. west irian jaya prov. was renamed west papua prov. in 2007. immigration of malays from other parts of indonesia, which has been encouraged by the national government, has contributed to discontent among indigenous papuans and help fuel the ongoing resistance to indonesian rule. the columbia electronic encyclopedia, 6th ed. copyright © 2012, columbia university press. all rights reserved. see more encyclopedia articles on : indonesian political geography


as we look forward to another martin luther king jr. holiday, celebrate the 150th anniversary of the emancipation proclamation and prepare to inaugurate our first african american president to a second term, i ' d like to talk about the civil rights movement and what it meant to my generation. it was the inspiration for everything that followed, including the latino, asian, peace, women ' s, student, environmental and lgbt movements. our country is immeasurably better off for all of them, but the civil rights movement was the most important of all because it tackled america ' s original sin - - the sin of slavery and its successor under a different name, jim crow. unlike other immigrants, africans didn ' t come here looking for freedom or opportunity. they were kidnapped and transported here in slave ships. as many as half died during the voyage, but the slavers still made a handsome profit. and if there was a storm, so much the better : they could simply toss the slaves overboard and get full reimbursement from the insurance companies for their lost " cargo. " here in america, the slaves were at their masters ' mercy. if he wanted to rape them, kill them or sell their children, he could. and the government would back him up. that was supposed to end with the civil war, but it didn ' t. historians like to say that the north won the war but the south won the peace. when i was a kid in the 1950s, segregation was the law of the land, and not but it was worst in the south. working hand - in - hand with the elected authorities, the ku klux klan was conducting a reign of terror against any african americans who had the temerity to ask for their rights. but, as dr. king said, the arc of the moral universe is long but it bends toward justice. with no weapons to counter the kkk ' s armed terror, the brave pioneers of the civil rights movement turned to the only tools they had : marches, sit - ins and anything else they could think of to hold a mirror up to the country and force the american people to watch what was being done in their name. there was a terrible cost : beatings, bombings, arsons and countless murders. and instead of going after the klan, the fbi went after dr. king, even trying to drive him to suicide by threatening to reveal evidence of his extramarital affairs. but, like the early christians, the blood of the martyrs was the seed of the church.


november 28, 2012 ( usa today ) - - more than 30 years after the beginning of the aids epidemic, young people are again taking dangerous risks with their lives, according to a new report from the centers for the disease control and prevention. about 1, 000 americans ages 13 to 24 are newly infected each month with hiv, the virus that causes aids, according to cdc data released for the first time. about 60 % of hiv - positive young people have no idea that they ' re infected, according to the report released tuesday. that rate is far higher than in the general population, in which 20 % of hiv - positive patients are unaware of their status. young people ages 13 to 24 account for more than a quarter of the 50, 000 new hiv infections each year, the cdc says. about 1. 2 million americans have hiv or aids. " this is our future generation, " says cdc director thomas frieden. " that so many young people become infected with hiv each year is a preventable tragedy. " and while new hiv infections have leveled off among most groups, they are rising among young people, says kevin fenton, who leads the cdc ' s office on aids. most of that increase is being driven by new hiv infections in young black men who have sex with men, he says. there really are two aids epidemics in the usa, says kenneth mayer, medical research director of boston ' s fenway health, a community health organization that provides aids services. the first wave of hiv patients is now older and mostly in treatment. a second wave of patients includes newly infected young people who weren ' t even born when aids was first discovered and who often act as if they are unaware of the tremendous risks they ' re taking. according to the new cdc report, based on interviews with high school students, young men who have sex with men are less likely than others to use condoms. yet they ' re more likely than others to have had four or more sex partners, to have injected drugs, or to get high before having sex. they ' re less likely, however, to report being taught about aids or hiv in school, according to the cdc. " the aids epidemic seems very remote to young people, " mayer says. " there is no equivalent of a young magic johnson. if you are young, this seems like a disease of old people. " the lifetime cost of treating someone with hiv is about $ 400, 000. that means these new infections add $ 4 million in new health care costs each month, frieden says. the


are young, this seems like a disease of old people. " the lifetime cost of treating someone with hiv is about $ 400, 000. that means these new infections add $ 4 million in new health care costs each month, frieden says. the finding adds to evidence that doctors need to routinely screen all patients for hiv, frieden says. last week, the u. s. preventive services task force endorsed routine hiv testing for everyone ages 15 to 65. the cdc and american academy of pediatrics also call for routine screening, beginning in the teen years. yet only 13 % of high school students have been tested for hiv, the report says. " it is astonishing the level of ignorance of basic physiology that many high school and middle school students have, " frieden says. " there is not going to be an easy, quick, simple solution. " getting tested is the first step to treatment, which can dramatically improve patients ' health and also prevent them from spreading the infection, mayer says. people who know they ' re hiv - positive are less likely to engage in risky behaviors, such as sharing needles or having unprotected sex, studies show. and people whose virus is under control, reduced to undetectable levels, are virtually incapable of spreading the infection to others. only 30 % of those with hiv have their virus under control, however, due partly to a lack of access to health care. copyright 2012 usa today, a division of gannett co. inc.


links verified on 3 / 6 / 2013 - common grammar mistakes - select the sentence with the correct grammar usage. answer each question [ 15 questions total ] and then submit your answers for instant results. any incorrect answers can be reviewed with an explanation for why it was not the correct answer choice. - confusing verbs - lay / lie - read the sentence, choose the answer and get your score instantly! - confusing words : can / may - select the correct usage of the word for each sentence. - confusing words : who ' s / whose and their / there / they ' re - select the correct answer for each sentence. - is / are and was / were - choose the verb that correctly fits the sentence. - its / it ' s and there / their / they ' re - select one answer from the choices provided after each sentence. the word you choose should fit the blank in the sentence. - problem verbs : sit / set / lie / lay / rise / raise - practice with these games to get a clear meaning of each of these troublesome verbs. - power proofreading - choose 4th grade then select any one of the exercises to practice word usage. - road to grammar - a vast array of interactive quizzes, practice exercises and games to assist with grammar usage. - sit or set quiz - complete the sentences using the proper form of " sit " or " set. " - there / their / they ' re - choose the correct answer that best fits the sentence. - they ' re / their / there - select the answer that has the correct usage of the word for the sentence. - to lie / to lay and to sit / to set - select one answer from the choices provided that fits the blank in the sentence. - to / two / too - learn the difference between the homophones to, two, and too using this quia quiz. - to / two / too - quia quiz ; choose the correct homonym. - troublesome words - 14 interactive exercises on words often used incorrectly. select the correct word usage for each sentence.


back to edison, back to innovation by dr. james truchard innovation, from the latin innovationem, dates back to at least 1540, and it basically means to renew or change. with so much change in the last 400 years, it is frightening to think somewhere during the last 100 years or so, we have lost the critical renewal of innovation — that which funded and inspired the inventions that propelled us into modernism and delivered luxuries we now take for granted. somehow, we lost the urge to innovate. i am not sure if it was an individual dimming of passion or the lack of an environment to foster innovation, but i am sure it has escaped us. the 5 june 2010 issue of time magazine recounted the impact of thomas edison ’ s idea factory and his relevance today. edison ’ s approach to ideas and results — “ a minor invention every 10 days and a big thing every six months or so ” — would be implausible if it was not true. inspired by the 3 january 1888 entry in edison ’ s idea book, which outlined his “ things doing and to be done, ” edison ’ s list was filled with projects ranging from ink for the blind, to the cotton picker, to a battery for the phone — a design that remained in use until just a few years ago. of course, edison was not the only one to make a historical impact on the world as we know it. great inventors including benjamin franklin, cyrus mccormick with his harvester, samuel f. b. morse and the telegraph, alexander graham bell and the telephone, all contributed in invaluable ways. edison just happened to patent a mind - boggling 1, 093 mechanisms and processes before his death. unfortunately for our younger generations and ourselves, the past few decades have not produced edison - like innovation or impact in technology, and as a result, we are in a critical situation. you only have to look at the engineering grand challenges outlined by the national academy of engineering to comprehend the gravity of the circumstances in which we now find ourselves. from nuclear terror prevention to providing access to clean water and developing carbon sequestration methods, the global needs are vast. to deliver on these needs the way edison delivered on telecommunication advances, the inventors of today — engineers and scientists around the globe — must nurture and embrace the charter in front of us to make a difference. ideally we would fix the situation at the root cause — when and how our children are learning. the great inventors and scientists learned not through textbooks and lectures