fname stringlengths 1 1.03k | func_def stringlengths 20 7.68k | technique stringclasses 3 values | clean_asm stringlengths 80 15.9k | obfuscated_asm stringlengths 101 28.6k | clean_ir stringlengths 42 8k | obfuscated_c stringlengths 141 47.6k | tigress_seed int64 3.25k 2.15B | exebench_split stringclasses 1 value |
|---|---|---|---|---|---|---|---|---|
sacaC | void sacaC(TCola *c, TElementoC* dato) {
if (!vaciaC(*c)) {
*dato = (*c).datos[(*c).pri];
if ((*c).pri == (*c).ult) {
iniciaC(c);
} else {
(*c).pri += 1;
}
}
} | EncodeArithmetic | .global sacaC
.type sacaC, %function
sacaC:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
ldr x0, [sp, 56]
add x2, sp, 16
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
bl vaciaC
cmp w0, 0
bne .L4
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 48]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
cmp x1, x0
bne .L3
ldr x0, [sp, 56]
bl iniciaC
b .L4
.L3:
ldr x0, [sp, 56]
ldr x0, [x0]
add x1, x0, 1
ldr x0, [sp, 56]
str x1, [x0]
.L4:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global sacaC
.type sacaC, %function
sacaC:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
ldr x1, [sp, 56]
add x0, sp, 16
ldp x2, x3, [x1]
ldr x1, [x1, 16]
stp x2, x3, [x0]
str x1, [x0, 16]
add x0, sp, 16
bl vaciaC
str w0, [sp, 76]
ldr w0, [sp, 76]
cmp w0, 0
bne .L11
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 48]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
sub x1, x1, x0
ldr x0, [sp, 56]
ldr x2, [x0, 8]
ldr x0, [sp, 56]
ldr x0, [x0]
sub x0, x2, x0
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L9
ldr x0, [sp, 56]
bl iniciaC
b .L11
.L9:
ldr x0, [sp, 56]
ldr x0, [x0]
eor x1, x0, 1
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 1
and x0, x0, 2
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0]
nop
.L11:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size sacaC, .-sacaC | %struct.TYPE_5__ = type { i64, i64, i32* }
define dso_local void @sacaC(%struct.TYPE_5__* %0, i32* %1) {
%3 = alloca %struct.TYPE_5__*, align 8
%4 = alloca i32*, align 8
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %3, align 8
store i32* %1, i32** %4, align 8
%5 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%6 = call i32 @vaciaC(%struct.TYPE_5__* byval(%struct.TYPE_5__) align 8 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %34, label %8
8: ; preds = %2
%9 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%10 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %9, i32 0, i32 2
%11 = load i32*, i32** %10, align 8
%12 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%13 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %12, i32 0, i32 0
%14 = load i64, i64* %13, align 8
%15 = getelementptr inbounds i32, i32* %11, i64 %14
%16 = load i32, i32* %15, align 4
%17 = load i32*, i32** %4, align 8
store i32 %16, i32* %17, align 4
%18 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%19 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %18, i32 0, i32 0
%20 = load i64, i64* %19, align 8
%21 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%22 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %21, i32 0, i32 1
%23 = load i64, i64* %22, align 8
%24 = icmp eq i64 %20, %23
br i1 %24, label %25, label %28
25: ; preds = %8
%26 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%27 = call i32 @iniciaC(%struct.TYPE_5__* %26)
br label %33
28: ; preds = %8
%29 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%30 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %29, i32 0, i32 0
%31 = load i64, i64* %30, align 8
%32 = add i64 %31, 1
store i64 %32, i64* %30, align 8
br label %33
33: ; preds = %28, %25
br label %34
34: ; preds = %33, %2
ret void
}
declare dso_local i32 @vaciaC(%struct.TYPE_5__* byval(%struct.TYPE_5__) align 8)
declare dso_local i32 @iniciaC(%struct.TYPE_5__*) | /* BEGIN FUNCTION-DEF sacaC LOC=UNKNOWN VKEY=4891 */
void sacaC(TCola *c , TElementoC *dato )
{
int tmp ;
{
#line 48 "/tmp/forklift_obfu_ecfkw6la/input.c"
tmp = vaciaC(*c);
#line 48
if (! tmp) {
#line 49
*dato = *(c->datos + c->pri);
#line 50
if ((int )((~ ((c->pri - c->ult) | (c->ult - c->pri)) >> 63UL) & 1UL)) {
#line 51
iniciaC(c);
} else {
#line 53
c->pri = (c->pri ^ 1UL) + ((c->pri & 1UL) << 1UL);
}
}
#line 56
return;
}
}
/* END FUNCTION-DEF sacaC LOC=UNKNOWN VKEY=4891 */ | 107,420,369 | train_synth_compilable |
block_mark_as_free | static void
block_mark_as_free(block_header_t *block)
{
block_header_t *next;
next = block_link_next(block);
block_set_prev_free(next);
block_set_free(block);
} | EncodeArithmetic | .global block_mark_as_free
.type block_mark_as_free, %function
block_mark_as_free:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl block_link_next
str x0, [sp, 40]
ldr x0, [sp, 40]
bl block_set_prev_free
ldr x0, [sp, 24]
bl block_set_free
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global block_mark_as_free
.type block_mark_as_free, %function
block_mark_as_free:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl block_link_next
str x0, [sp, 40]
ldr x0, [sp, 40]
bl block_set_prev_free
ldr x0, [sp, 24]
bl block_set_free
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size block_mark_as_free, .-block_mark_as_free | define dso_local void @block_mark_as_free(i32* %0) {
%2 = alloca i32*, align 8
%3 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%4 = load i32*, i32** %2, align 8
%5 = call i32* @block_link_next(i32* %4)
store i32* %5, i32** %3, align 8
%6 = load i32*, i32** %3, align 8
%7 = call i32 @block_set_prev_free(i32* %6)
%8 = load i32*, i32** %2, align 8
%9 = call i32 @block_set_free(i32* %8)
ret void
}
declare dso_local i32* @block_link_next(i32*)
declare dso_local i32 @block_set_prev_free(i32*)
declare dso_local i32 @block_set_free(i32*) | /* BEGIN FUNCTION-DEF block_mark_as_free LOC=UNKNOWN VKEY=4891 */
static void block_mark_as_free(block_header_t *block )
{
block_header_t *next ;
{
{
#line 51 "/tmp/forklift_obfu_lta5ieih/input.c"
next = block_link_next(block);
#line 52
block_set_prev_free(next);
#line 53
block_set_free(block);
}
#line 54
return;
}
}
/* END FUNCTION-DEF block_mark_as_free LOC=UNKNOWN VKEY=4891 */ | 999,270,936 | train_synth_compilable |
sacaC | void sacaC(TCola *c, TElementoC* dato) {
if (!vaciaC(*c)) {
*dato = (*c).datos[(*c).pri];
if ((*c).pri == (*c).ult) {
iniciaC(c);
} else {
(*c).pri += 1;
}
}
} | Flatten+EncodeArithmetic | .global sacaC
.type sacaC, %function
sacaC:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
ldr x0, [sp, 56]
add x2, sp, 16
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
bl vaciaC
cmp w0, 0
bne .L4
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 48]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
cmp x1, x0
bne .L3
ldr x0, [sp, 56]
bl iniciaC
b .L4
.L3:
ldr x0, [sp, 56]
ldr x0, [x0]
add x1, x0, 1
ldr x0, [sp, 56]
str x1, [x0]
.L4:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global sacaC
.type sacaC, %function
sacaC:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str xzr, [sp, 64]
.L16:
ldr x0, [sp, 64]
cmp x0, 6
beq .L2
ldr x0, [sp, 64]
cmp x0, 6
bhi .L17
ldr x0, [sp, 64]
cmp x0, 5
beq .L4
ldr x0, [sp, 64]
cmp x0, 5
bhi .L17
ldr x0, [sp, 64]
cmp x0, 4
beq .L5
ldr x0, [sp, 64]
cmp x0, 4
bhi .L17
ldr x0, [sp, 64]
cmp x0, 3
beq .L6
ldr x0, [sp, 64]
cmp x0, 3
bhi .L17
ldr x0, [sp, 64]
cmp x0, 2
beq .L18
ldr x0, [sp, 64]
cmp x0, 2
bhi .L17
ldr x0, [sp, 64]
cmp x0, 0
beq .L8
ldr x0, [sp, 64]
cmp x0, 1
beq .L9
b .L17
.L5:
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 48]
str w1, [x0]
mov x0, 5
str x0, [sp, 64]
b .L10
.L9:
ldr x0, [sp, 56]
ldr x0, [x0]
orr x0, x0, 1
lsl x1, x0, 1
ldr x0, [sp, 56]
ldr x0, [x0]
eor x0, x0, 1
sub x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0]
mov x0, 2
str x0, [sp, 64]
b .L10
.L6:
ldr w0, [sp, 76]
cmp w0, 0
beq .L11
mov x0, 2
str x0, [sp, 64]
b .L10
.L11:
mov x0, 4
str x0, [sp, 64]
b .L10
.L2:
ldr x0, [sp, 56]
bl iniciaC
mov x0, 2
str x0, [sp, 64]
b .L10
.L4:
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
sub x1, x1, x0
ldr x0, [sp, 56]
ldr x2, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
sub x2, x2, x0
mov x0, -9223372036854775808
add x0, x2, x0
lsl x0, x0, 1
ldr x2, [sp, 56]
ldr x3, [x2]
ldr x2, [sp, 56]
ldr x2, [x2, 8]
sub x3, x3, x2
mov x2, -9223372036854775808
add x2, x3, x2
asr x2, x2, 63
and x0, x0, x2
sub x1, x1, x0
mov x0, -9223372036854775808
add x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L13
mov x0, 6
str x0, [sp, 64]
b .L10
.L13:
mov x0, 1
str x0, [sp, 64]
b .L10
.L8:
ldr x1, [sp, 56]
add x0, sp, 16
ldp x2, x3, [x1]
ldr x1, [x1, 16]
stp x2, x3, [x0]
str x1, [x0, 16]
add x0, sp, 16
bl vaciaC
str w0, [sp, 76]
mov x0, 3
str x0, [sp, 64]
b .L10
.L17:
nop
.L10:
b .L16
.L18:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size sacaC, .-sacaC | %struct.TYPE_5__ = type { i64, i64, i32* }
define dso_local void @sacaC(%struct.TYPE_5__* %0, i32* %1) {
%3 = alloca %struct.TYPE_5__*, align 8
%4 = alloca i32*, align 8
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %3, align 8
store i32* %1, i32** %4, align 8
%5 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%6 = call i32 @vaciaC(%struct.TYPE_5__* byval(%struct.TYPE_5__) align 8 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %34, label %8
8: ; preds = %2
%9 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%10 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %9, i32 0, i32 2
%11 = load i32*, i32** %10, align 8
%12 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%13 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %12, i32 0, i32 0
%14 = load i64, i64* %13, align 8
%15 = getelementptr inbounds i32, i32* %11, i64 %14
%16 = load i32, i32* %15, align 4
%17 = load i32*, i32** %4, align 8
store i32 %16, i32* %17, align 4
%18 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%19 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %18, i32 0, i32 0
%20 = load i64, i64* %19, align 8
%21 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%22 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %21, i32 0, i32 1
%23 = load i64, i64* %22, align 8
%24 = icmp eq i64 %20, %23
br i1 %24, label %25, label %28
25: ; preds = %8
%26 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%27 = call i32 @iniciaC(%struct.TYPE_5__* %26)
br label %33
28: ; preds = %8
%29 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%30 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %29, i32 0, i32 0
%31 = load i64, i64* %30, align 8
%32 = add i64 %31, 1
store i64 %32, i64* %30, align 8
br label %33
33: ; preds = %28, %25
br label %34
34: ; preds = %33, %2
ret void
}
declare dso_local i32 @vaciaC(%struct.TYPE_5__* byval(%struct.TYPE_5__) align 8)
declare dso_local i32 @iniciaC(%struct.TYPE_5__*) | /* BEGIN FUNCTION-DEF sacaC LOC=UNKNOWN VKEY=4897 */
void sacaC(TCola *c , TElementoC *dato )
{
int tmp ;
unsigned long _TIG_FN_dohy_1_sacaC_next ;
{
_TIG_FN_dohy_1_sacaC_next = 0UL;
while (1) {
switch (_TIG_FN_dohy_1_sacaC_next) {
case 4UL:
#line 49 "/tmp/forklift_obfu_bxffb0xo/input.c"
*dato = *(c->datos + c->pri);
_TIG_FN_dohy_1_sacaC_next = 5UL;
break;
case 1UL:
#line 53
c->pri = ((c->pri | 1UL) + (c->pri | 1UL)) - (c->pri ^ 1UL);
_TIG_FN_dohy_1_sacaC_next = 2UL;
break;
case 3UL: ;
if (tmp) {
_TIG_FN_dohy_1_sacaC_next = 2UL;
} else {
_TIG_FN_dohy_1_sacaC_next = 4UL;
}
break;
case 6UL:
#line 51
iniciaC(c);
_TIG_FN_dohy_1_sacaC_next = 2UL;
break;
case 5UL: ;
if ((int )(((((c->pri - c->ult) + (1UL << 63UL)) - ((((c->pri - c->ult) + (1UL << 63UL)) << 1UL) & ((long )((c->pri - c->ult) + (1UL << 63UL)) >> 63L))) >> 63UL) & 1UL)) {
_TIG_FN_dohy_1_sacaC_next = 6UL;
} else {
_TIG_FN_dohy_1_sacaC_next = 1UL;
}
break;
case 0UL:
#line 48
tmp = vaciaC(*c);
_TIG_FN_dohy_1_sacaC_next = 3UL;
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF sacaC LOC=UNKNOWN VKEY=4897 */ | 1,181,241,943 | train_synth_compilable |
block_mark_as_free | static void
block_mark_as_free(block_header_t *block)
{
block_header_t *next;
next = block_link_next(block);
block_set_prev_free(next);
block_set_free(block);
} | Flatten+EncodeArithmetic | .global block_mark_as_free
.type block_mark_as_free, %function
block_mark_as_free:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl block_link_next
str x0, [sp, 40]
ldr x0, [sp, 40]
bl block_set_prev_free
ldr x0, [sp, 24]
bl block_set_free
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global block_mark_as_free
.type block_mark_as_free, %function
block_mark_as_free:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str xzr, [sp, 40]
.L7:
ldr x0, [sp, 40]
cmp x0, 2
beq .L8
ldr x0, [sp, 40]
cmp x0, 2
bhi .L9
ldr x0, [sp, 40]
cmp x0, 0
beq .L4
ldr x0, [sp, 40]
cmp x0, 1
bne .L9
ldr x0, [sp, 24]
bl block_link_next
str x0, [sp, 32]
ldr x0, [sp, 32]
bl block_set_prev_free
ldr x0, [sp, 24]
bl block_set_free
mov x0, 2
str x0, [sp, 40]
b .L5
.L4:
mov x0, 1
str x0, [sp, 40]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size block_mark_as_free, .-block_mark_as_free | define dso_local void @block_mark_as_free(i32* %0) {
%2 = alloca i32*, align 8
%3 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%4 = load i32*, i32** %2, align 8
%5 = call i32* @block_link_next(i32* %4)
store i32* %5, i32** %3, align 8
%6 = load i32*, i32** %3, align 8
%7 = call i32 @block_set_prev_free(i32* %6)
%8 = load i32*, i32** %2, align 8
%9 = call i32 @block_set_free(i32* %8)
ret void
}
declare dso_local i32* @block_link_next(i32*)
declare dso_local i32 @block_set_prev_free(i32*)
declare dso_local i32 @block_set_free(i32*) | /* BEGIN FUNCTION-DEF block_mark_as_free LOC=UNKNOWN VKEY=4896 */
static void block_mark_as_free(block_header_t *block )
{
block_header_t *next ;
unsigned long _TIG_FN_dgeb_1_block_mark_as_free_next ;
{
_TIG_FN_dgeb_1_block_mark_as_free_next = 0UL;
while (1) {
switch (_TIG_FN_dgeb_1_block_mark_as_free_next) {
case 1UL:
{
#line 51 "/tmp/forklift_obfu_gvaxstsn/input.c"
next = block_link_next(block);
#line 52
block_set_prev_free(next);
#line 53
block_set_free(block);
}
_TIG_FN_dgeb_1_block_mark_as_free_next = 2UL;
break;
case 0UL: ;
_TIG_FN_dgeb_1_block_mark_as_free_next = 1UL;
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF block_mark_as_free LOC=UNKNOWN VKEY=4896 */ | 113,971,123 | train_synth_compilable |
pcnet_detach | __attribute__((used)) static void pcnet_detach(struct pcmcia_device *link)
{
struct net_device *dev = link->priv;
DEBUG(0, "pcnet_detach(0x%p)\n", link);
if (link->dev_node)
unregister_netdev(dev);
pcnet_release(link);
free_netdev(dev);
} | Flatten+EncodeArithmetic | .global pcnet_detach
.type pcnet_detach, %function
pcnet_detach:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 40]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 0
bl DEBUG
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
beq .L2
ldr x0, [sp, 40]
bl unregister_netdev
.L2:
ldr x0, [sp, 24]
bl pcnet_release
ldr x0, [sp, 40]
bl free_netdev
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "pcnet_detach(0x%p)\n"
| .global pcnet_detach
.type pcnet_detach, %function
pcnet_detach:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
mov x0, 3
str x0, [sp, 32]
.L13:
ldr x0, [sp, 32]
cmp x0, 6
beq .L2
ldr x0, [sp, 32]
cmp x0, 6
bhi .L14
ldr x0, [sp, 32]
cmp x0, 5
beq .L15
ldr x0, [sp, 32]
cmp x0, 5
bhi .L14
ldr x0, [sp, 32]
cmp x0, 4
beq .L5
ldr x0, [sp, 32]
cmp x0, 4
bhi .L14
ldr x0, [sp, 32]
cmp x0, 3
beq .L6
ldr x0, [sp, 32]
cmp x0, 3
bhi .L14
ldr x0, [sp, 32]
cmp x0, 1
beq .L7
ldr x0, [sp, 32]
cmp x0, 2
beq .L8
b .L14
.L5:
ldr x0, [sp, 24]
bl pcnet_release
ldr x0, [sp, 40]
bl free_netdev
mov x0, 5
str x0, [sp, 32]
b .L9
.L7:
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
beq .L10
mov x0, 2
str x0, [sp, 32]
b .L9
.L10:
mov x0, 4
str x0, [sp, 32]
b .L9
.L6:
mov x0, 6
str x0, [sp, 32]
b .L9
.L2:
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 40]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 0
bl DEBUG
mov x0, 1
str x0, [sp, 32]
b .L9
.L8:
ldr x0, [sp, 40]
bl unregister_netdev
mov x0, 4
str x0, [sp, 32]
b .L9
.L14:
nop
.L9:
b .L13
.L15:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size pcnet_detach, .-pcnet_detach | %struct.pcmcia_device = type { i64, %struct.net_device* }
%struct.net_device = type { i32 }
@.str = external hidden unnamed_addr constant [20 x i8], align 1
define dso_local void @pcnet_detach(%struct.pcmcia_device* %0) {
%2 = alloca %struct.pcmcia_device*, align 8
%3 = alloca %struct.net_device*, align 8
store %struct.pcmcia_device* %0, %struct.pcmcia_device** %2, align 8
%4 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%5 = getelementptr inbounds %struct.pcmcia_device, %struct.pcmcia_device* %4, i32 0, i32 1
%6 = load %struct.net_device*, %struct.net_device** %5, align 8
store %struct.net_device* %6, %struct.net_device** %3, align 8
%7 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%8 = call i32 @DEBUG(i32 0, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), %struct.pcmcia_device* %7)
%9 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%10 = getelementptr inbounds %struct.pcmcia_device, %struct.pcmcia_device* %9, i32 0, i32 0
%11 = load i64, i64* %10, align 8
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load %struct.net_device*, %struct.net_device** %3, align 8
%15 = call i32 @unregister_netdev(%struct.net_device* %14)
br label %16
16: ; preds = %13, %1
%17 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%18 = call i32 @pcnet_release(%struct.pcmcia_device* %17)
%19 = load %struct.net_device*, %struct.net_device** %3, align 8
%20 = call i32 @free_netdev(%struct.net_device* %19)
ret void
}
declare dso_local i32 @DEBUG(i32, i8*, %struct.pcmcia_device*)
declare dso_local i32 @unregister_netdev(%struct.net_device*)
declare dso_local i32 @pcnet_release(%struct.pcmcia_device*)
declare dso_local i32 @free_netdev(%struct.net_device*) | /* BEGIN FUNCTION-DEF pcnet_detach LOC=UNKNOWN VKEY=4903 */
static void pcnet_detach(struct pcmcia_device *link )
{
struct net_device *dev ;
unsigned long _TIG_FN_Ow0z_1_pcnet_detach_next ;
{
_TIG_FN_Ow0z_1_pcnet_detach_next = 3UL;
while (1) {
switch (_TIG_FN_Ow0z_1_pcnet_detach_next) {
case 4UL:
{
#line 56 "/tmp/forklift_obfu_cegkscym/input.c"
pcnet_release(link);
#line 58
free_netdev(dev);
}
_TIG_FN_Ow0z_1_pcnet_detach_next = 5UL;
break;
case 1UL: ;
if (link->dev_node) {
_TIG_FN_Ow0z_1_pcnet_detach_next = 2UL;
} else {
_TIG_FN_Ow0z_1_pcnet_detach_next = 4UL;
}
break;
case 3UL: ;
_TIG_FN_Ow0z_1_pcnet_detach_next = 6UL;
break;
case 6UL:
{
#line 49
dev = link->priv;
#line 51
DEBUG(0, "pcnet_detach(0x%p)\n", link);
}
_TIG_FN_Ow0z_1_pcnet_detach_next = 1UL;
break;
case 5UL: ;
return;
break;
case 2UL:
#line 54
unregister_netdev(dev);
_TIG_FN_Ow0z_1_pcnet_detach_next = 4UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pcnet_detach LOC=UNKNOWN VKEY=4903 */ | 402,418,010 | train_synth_compilable |
sacaC | void sacaC(TCola *c, TElementoC* dato) {
if (!vaciaC(*c)) {
*dato = (*c).datos[(*c).pri];
if ((*c).pri == (*c).ult) {
iniciaC(c);
} else {
(*c).pri += 1;
}
}
} | Flatten | .global sacaC
.type sacaC, %function
sacaC:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
ldr x0, [sp, 56]
add x2, sp, 16
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
bl vaciaC
cmp w0, 0
bne .L4
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 48]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
cmp x1, x0
bne .L3
ldr x0, [sp, 56]
bl iniciaC
b .L4
.L3:
ldr x0, [sp, 56]
ldr x0, [x0]
add x1, x0, 1
ldr x0, [sp, 56]
str x1, [x0]
.L4:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global sacaC
.type sacaC, %function
sacaC:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str xzr, [sp, 64]
.L16:
ldr x0, [sp, 64]
cmp x0, 6
beq .L2
ldr x0, [sp, 64]
cmp x0, 6
bhi .L17
ldr x0, [sp, 64]
cmp x0, 5
beq .L4
ldr x0, [sp, 64]
cmp x0, 5
bhi .L17
ldr x0, [sp, 64]
cmp x0, 4
beq .L5
ldr x0, [sp, 64]
cmp x0, 4
bhi .L17
ldr x0, [sp, 64]
cmp x0, 3
beq .L6
ldr x0, [sp, 64]
cmp x0, 3
bhi .L17
ldr x0, [sp, 64]
cmp x0, 2
beq .L18
ldr x0, [sp, 64]
cmp x0, 2
bhi .L17
ldr x0, [sp, 64]
cmp x0, 0
beq .L8
ldr x0, [sp, 64]
cmp x0, 1
beq .L9
b .L17
.L5:
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
ldr x0, [x0]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 48]
str w1, [x0]
mov x0, 5
str x0, [sp, 64]
b .L10
.L9:
ldr x0, [sp, 56]
ldr x0, [x0]
add x1, x0, 1
ldr x0, [sp, 56]
str x1, [x0]
mov x0, 2
str x0, [sp, 64]
b .L10
.L6:
ldr w0, [sp, 76]
cmp w0, 0
beq .L11
mov x0, 2
str x0, [sp, 64]
b .L10
.L11:
mov x0, 4
str x0, [sp, 64]
b .L10
.L2:
ldr x0, [sp, 56]
bl iniciaC
mov x0, 2
str x0, [sp, 64]
b .L10
.L4:
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
cmp x1, x0
bne .L13
mov x0, 6
str x0, [sp, 64]
b .L10
.L13:
mov x0, 1
str x0, [sp, 64]
b .L10
.L8:
ldr x1, [sp, 56]
add x0, sp, 16
ldp x2, x3, [x1]
ldr x1, [x1, 16]
stp x2, x3, [x0]
str x1, [x0, 16]
add x0, sp, 16
bl vaciaC
str w0, [sp, 76]
mov x0, 3
str x0, [sp, 64]
b .L10
.L17:
nop
.L10:
b .L16
.L18:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size sacaC, .-sacaC | %struct.TYPE_5__ = type { i64, i64, i32* }
define dso_local void @sacaC(%struct.TYPE_5__* %0, i32* %1) {
%3 = alloca %struct.TYPE_5__*, align 8
%4 = alloca i32*, align 8
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %3, align 8
store i32* %1, i32** %4, align 8
%5 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%6 = call i32 @vaciaC(%struct.TYPE_5__* byval(%struct.TYPE_5__) align 8 %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %34, label %8
8: ; preds = %2
%9 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%10 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %9, i32 0, i32 2
%11 = load i32*, i32** %10, align 8
%12 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%13 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %12, i32 0, i32 0
%14 = load i64, i64* %13, align 8
%15 = getelementptr inbounds i32, i32* %11, i64 %14
%16 = load i32, i32* %15, align 4
%17 = load i32*, i32** %4, align 8
store i32 %16, i32* %17, align 4
%18 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%19 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %18, i32 0, i32 0
%20 = load i64, i64* %19, align 8
%21 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%22 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %21, i32 0, i32 1
%23 = load i64, i64* %22, align 8
%24 = icmp eq i64 %20, %23
br i1 %24, label %25, label %28
25: ; preds = %8
%26 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%27 = call i32 @iniciaC(%struct.TYPE_5__* %26)
br label %33
28: ; preds = %8
%29 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%30 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %29, i32 0, i32 0
%31 = load i64, i64* %30, align 8
%32 = add i64 %31, 1
store i64 %32, i64* %30, align 8
br label %33
33: ; preds = %28, %25
br label %34
34: ; preds = %33, %2
ret void
}
declare dso_local i32 @vaciaC(%struct.TYPE_5__* byval(%struct.TYPE_5__) align 8)
declare dso_local i32 @iniciaC(%struct.TYPE_5__*) | /* BEGIN FUNCTION-DEF sacaC LOC=UNKNOWN VKEY=4891 */
void sacaC(TCola *c , TElementoC *dato )
{
int tmp ;
unsigned long _TIG_FN_3iHV_1_sacaC_next ;
{
{
_TIG_FN_3iHV_1_sacaC_next = 0UL;
}
while (1) {
switch (_TIG_FN_3iHV_1_sacaC_next) {
case 4UL:
#line 49 "/tmp/forklift_obfu_mrxxfe5z/input.c"
*dato = *(c->datos + c->pri);
{
_TIG_FN_3iHV_1_sacaC_next = 5UL;
}
break;
case 1UL:
#line 53
(c->pri) ++;
{
_TIG_FN_3iHV_1_sacaC_next = 2UL;
}
break;
case 3UL: ;
if (tmp) {
{
_TIG_FN_3iHV_1_sacaC_next = 2UL;
}
} else {
{
_TIG_FN_3iHV_1_sacaC_next = 4UL;
}
}
break;
case 6UL:
#line 51
iniciaC(c);
{
_TIG_FN_3iHV_1_sacaC_next = 2UL;
}
break;
case 5UL: ;
if (c->pri == c->ult) {
{
_TIG_FN_3iHV_1_sacaC_next = 6UL;
}
} else {
{
_TIG_FN_3iHV_1_sacaC_next = 1UL;
}
}
break;
case 0UL:
#line 48
tmp = vaciaC(*c);
{
_TIG_FN_3iHV_1_sacaC_next = 3UL;
}
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF sacaC LOC=UNKNOWN VKEY=4891 */ | 478,163,327 | train_synth_compilable |
block_mark_as_free | static void
block_mark_as_free(block_header_t *block)
{
block_header_t *next;
next = block_link_next(block);
block_set_prev_free(next);
block_set_free(block);
} | Flatten | .global block_mark_as_free
.type block_mark_as_free, %function
block_mark_as_free:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl block_link_next
str x0, [sp, 40]
ldr x0, [sp, 40]
bl block_set_prev_free
ldr x0, [sp, 24]
bl block_set_free
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global block_mark_as_free
.type block_mark_as_free, %function
block_mark_as_free:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str xzr, [sp, 40]
.L7:
ldr x0, [sp, 40]
cmp x0, 2
beq .L8
ldr x0, [sp, 40]
cmp x0, 2
bhi .L9
ldr x0, [sp, 40]
cmp x0, 0
beq .L4
ldr x0, [sp, 40]
cmp x0, 1
bne .L9
ldr x0, [sp, 24]
bl block_link_next
str x0, [sp, 32]
ldr x0, [sp, 32]
bl block_set_prev_free
ldr x0, [sp, 24]
bl block_set_free
mov x0, 2
str x0, [sp, 40]
b .L5
.L4:
mov x0, 1
str x0, [sp, 40]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size block_mark_as_free, .-block_mark_as_free | define dso_local void @block_mark_as_free(i32* %0) {
%2 = alloca i32*, align 8
%3 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%4 = load i32*, i32** %2, align 8
%5 = call i32* @block_link_next(i32* %4)
store i32* %5, i32** %3, align 8
%6 = load i32*, i32** %3, align 8
%7 = call i32 @block_set_prev_free(i32* %6)
%8 = load i32*, i32** %2, align 8
%9 = call i32 @block_set_free(i32* %8)
ret void
}
declare dso_local i32* @block_link_next(i32*)
declare dso_local i32 @block_set_prev_free(i32*)
declare dso_local i32 @block_set_free(i32*) | /* BEGIN FUNCTION-DEF block_mark_as_free LOC=UNKNOWN VKEY=4891 */
static void block_mark_as_free(block_header_t *block )
{
block_header_t *next ;
unsigned long _TIG_FN_WclD_1_block_mark_as_free_next ;
{
{
_TIG_FN_WclD_1_block_mark_as_free_next = 0UL;
}
while (1) {
switch (_TIG_FN_WclD_1_block_mark_as_free_next) {
case 1UL:
#line 51 "/tmp/forklift_obfu_xe29clrk/input.c"
next = block_link_next(block);
#line 52
block_set_prev_free(next);
#line 53
block_set_free(block);
{
_TIG_FN_WclD_1_block_mark_as_free_next = 2UL;
}
break;
case 0UL: ;
{
_TIG_FN_WclD_1_block_mark_as_free_next = 1UL;
}
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF block_mark_as_free LOC=UNKNOWN VKEY=4891 */ | 939,042,955 | train_synth_compilable |
pcnet_detach | __attribute__((used)) static void pcnet_detach(struct pcmcia_device *link)
{
struct net_device *dev = link->priv;
DEBUG(0, "pcnet_detach(0x%p)\n", link);
if (link->dev_node)
unregister_netdev(dev);
pcnet_release(link);
free_netdev(dev);
} | Flatten | .global pcnet_detach
.type pcnet_detach, %function
pcnet_detach:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 40]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 0
bl DEBUG
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
beq .L2
ldr x0, [sp, 40]
bl unregister_netdev
.L2:
ldr x0, [sp, 24]
bl pcnet_release
ldr x0, [sp, 40]
bl free_netdev
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "pcnet_detach(0x%p)\n"
| .global pcnet_detach
.type pcnet_detach, %function
pcnet_detach:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
mov x0, 3
str x0, [sp, 32]
.L13:
ldr x0, [sp, 32]
cmp x0, 6
beq .L2
ldr x0, [sp, 32]
cmp x0, 6
bhi .L14
ldr x0, [sp, 32]
cmp x0, 5
beq .L15
ldr x0, [sp, 32]
cmp x0, 5
bhi .L14
ldr x0, [sp, 32]
cmp x0, 4
beq .L5
ldr x0, [sp, 32]
cmp x0, 4
bhi .L14
ldr x0, [sp, 32]
cmp x0, 3
beq .L6
ldr x0, [sp, 32]
cmp x0, 3
bhi .L14
ldr x0, [sp, 32]
cmp x0, 1
beq .L7
ldr x0, [sp, 32]
cmp x0, 2
beq .L8
b .L14
.L5:
ldr x0, [sp, 24]
bl pcnet_release
ldr x0, [sp, 40]
bl free_netdev
mov x0, 5
str x0, [sp, 32]
b .L9
.L7:
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
beq .L10
mov x0, 2
str x0, [sp, 32]
b .L9
.L10:
mov x0, 4
str x0, [sp, 32]
b .L9
.L6:
mov x0, 6
str x0, [sp, 32]
b .L9
.L2:
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 40]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 0
bl DEBUG
mov x0, 1
str x0, [sp, 32]
b .L9
.L8:
ldr x0, [sp, 40]
bl unregister_netdev
mov x0, 4
str x0, [sp, 32]
b .L9
.L14:
nop
.L9:
b .L13
.L15:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size pcnet_detach, .-pcnet_detach | %struct.pcmcia_device = type { i64, %struct.net_device* }
%struct.net_device = type { i32 }
@.str = external hidden unnamed_addr constant [20 x i8], align 1
define dso_local void @pcnet_detach(%struct.pcmcia_device* %0) {
%2 = alloca %struct.pcmcia_device*, align 8
%3 = alloca %struct.net_device*, align 8
store %struct.pcmcia_device* %0, %struct.pcmcia_device** %2, align 8
%4 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%5 = getelementptr inbounds %struct.pcmcia_device, %struct.pcmcia_device* %4, i32 0, i32 1
%6 = load %struct.net_device*, %struct.net_device** %5, align 8
store %struct.net_device* %6, %struct.net_device** %3, align 8
%7 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%8 = call i32 @DEBUG(i32 0, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), %struct.pcmcia_device* %7)
%9 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%10 = getelementptr inbounds %struct.pcmcia_device, %struct.pcmcia_device* %9, i32 0, i32 0
%11 = load i64, i64* %10, align 8
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load %struct.net_device*, %struct.net_device** %3, align 8
%15 = call i32 @unregister_netdev(%struct.net_device* %14)
br label %16
16: ; preds = %13, %1
%17 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%18 = call i32 @pcnet_release(%struct.pcmcia_device* %17)
%19 = load %struct.net_device*, %struct.net_device** %3, align 8
%20 = call i32 @free_netdev(%struct.net_device* %19)
ret void
}
declare dso_local i32 @DEBUG(i32, i8*, %struct.pcmcia_device*)
declare dso_local i32 @unregister_netdev(%struct.net_device*)
declare dso_local i32 @pcnet_release(%struct.pcmcia_device*)
declare dso_local i32 @free_netdev(%struct.net_device*) | /* BEGIN FUNCTION-DEF pcnet_detach LOC=UNKNOWN VKEY=4898 */
static void pcnet_detach(struct pcmcia_device *link )
{
struct net_device *dev ;
unsigned long _TIG_FN_VRre_1_pcnet_detach_next ;
{
{
_TIG_FN_VRre_1_pcnet_detach_next = 3UL;
}
while (1) {
switch (_TIG_FN_VRre_1_pcnet_detach_next) {
case 4UL:
#line 56 "/tmp/forklift_obfu__glfzadw/input.c"
pcnet_release(link);
#line 58
free_netdev(dev);
{
_TIG_FN_VRre_1_pcnet_detach_next = 5UL;
}
break;
case 1UL: ;
if (link->dev_node) {
{
_TIG_FN_VRre_1_pcnet_detach_next = 2UL;
}
} else {
{
_TIG_FN_VRre_1_pcnet_detach_next = 4UL;
}
}
break;
case 3UL: ;
{
_TIG_FN_VRre_1_pcnet_detach_next = 6UL;
}
break;
case 6UL:
#line 49
dev = link->priv;
#line 51
DEBUG(0, "pcnet_detach(0x%p)\n", link);
{
_TIG_FN_VRre_1_pcnet_detach_next = 1UL;
}
break;
case 5UL: ;
return;
break;
case 2UL:
#line 54
unregister_netdev(dev);
{
_TIG_FN_VRre_1_pcnet_detach_next = 4UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pcnet_detach LOC=UNKNOWN VKEY=4898 */ | 136,505,587 | train_synth_compilable |
pcnet_detach | __attribute__((used)) static void pcnet_detach(struct pcmcia_device *link)
{
struct net_device *dev = link->priv;
DEBUG(0, "pcnet_detach(0x%p)\n", link);
if (link->dev_node)
unregister_netdev(dev);
pcnet_release(link);
free_netdev(dev);
} | EncodeArithmetic | .global pcnet_detach
.type pcnet_detach, %function
pcnet_detach:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 40]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 0
bl DEBUG
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
beq .L2
ldr x0, [sp, 40]
bl unregister_netdev
.L2:
ldr x0, [sp, 24]
bl pcnet_release
ldr x0, [sp, 40]
bl free_netdev
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "pcnet_detach(0x%p)\n"
| .global pcnet_detach
.type pcnet_detach, %function
pcnet_detach:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 40]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 0
bl DEBUG
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
beq .L2
ldr x0, [sp, 40]
bl unregister_netdev
.L2:
ldr x0, [sp, 24]
bl pcnet_release
ldr x0, [sp, 40]
bl free_netdev
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size pcnet_detach, .-pcnet_detach | %struct.pcmcia_device = type { i64, %struct.net_device* }
%struct.net_device = type { i32 }
@.str = external hidden unnamed_addr constant [20 x i8], align 1
define dso_local void @pcnet_detach(%struct.pcmcia_device* %0) {
%2 = alloca %struct.pcmcia_device*, align 8
%3 = alloca %struct.net_device*, align 8
store %struct.pcmcia_device* %0, %struct.pcmcia_device** %2, align 8
%4 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%5 = getelementptr inbounds %struct.pcmcia_device, %struct.pcmcia_device* %4, i32 0, i32 1
%6 = load %struct.net_device*, %struct.net_device** %5, align 8
store %struct.net_device* %6, %struct.net_device** %3, align 8
%7 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%8 = call i32 @DEBUG(i32 0, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), %struct.pcmcia_device* %7)
%9 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%10 = getelementptr inbounds %struct.pcmcia_device, %struct.pcmcia_device* %9, i32 0, i32 0
%11 = load i64, i64* %10, align 8
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load %struct.net_device*, %struct.net_device** %3, align 8
%15 = call i32 @unregister_netdev(%struct.net_device* %14)
br label %16
16: ; preds = %13, %1
%17 = load %struct.pcmcia_device*, %struct.pcmcia_device** %2, align 8
%18 = call i32 @pcnet_release(%struct.pcmcia_device* %17)
%19 = load %struct.net_device*, %struct.net_device** %3, align 8
%20 = call i32 @free_netdev(%struct.net_device* %19)
ret void
}
declare dso_local i32 @DEBUG(i32, i8*, %struct.pcmcia_device*)
declare dso_local i32 @unregister_netdev(%struct.net_device*)
declare dso_local i32 @pcnet_release(%struct.pcmcia_device*)
declare dso_local i32 @free_netdev(%struct.net_device*) | /* BEGIN FUNCTION-DEF pcnet_detach LOC=UNKNOWN VKEY=4898 */
static void pcnet_detach(struct pcmcia_device *link )
{
struct net_device *dev ;
{
{
#line 49 "/tmp/forklift_obfu_6vrxoxiy/input.c"
dev = link->priv;
#line 51
DEBUG(0, "pcnet_detach(0x%p)\n", link);
}
#line 53
if (link->dev_node) {
#line 54
unregister_netdev(dev);
}
{
#line 56
pcnet_release(link);
#line 58
free_netdev(dev);
}
#line 59
return;
}
}
/* END FUNCTION-DEF pcnet_detach LOC=UNKNOWN VKEY=4898 */ | 127,978,094 | train_synth_compilable |
iscript_run | int
iscript_run (IScript* is, const char* in, char* out, size_t out_size)
{
if (NULL == is || NULL == in)
return 0;
idebug ("Parsing: '%s'\n", in);
is->buf = is->prog = in;
is->optr = out;
is->outbuf = out;
is->outbuf_size = out_size;
iscript_parse (is, 0);
is->outbuf[is->outbuf_size] = '\0';
idebug ("ERROR: %d\n", is->error);
return ! is->error;
} | EncodeArithmetic | .global iscript_run
.type iscript_run, %function
iscript_run:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 40]
cmp x0, 0
beq .L2
ldr x0, [sp, 32]
cmp x0, 0
bne .L3
.L2:
mov w0, 0
b .L4
.L3:
ldr x1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl idebug
ldr x0, [sp, 40]
ldr x1, [sp, 32]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [x0, 8]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
str x1, [x0, 32]
mov w1, 0
ldr x0, [sp, 40]
bl iscript_parse
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl idebug
ldr x0, [sp, 40]
ldr x0, [x0, 40]
cmp x0, 0
cset w0, eq
and w0, w0, 255
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "Parsing: '%s'\n"
.LC1: .string "ERROR: %d\n"
| .global iscript_run
.type iscript_run, %function
iscript_run:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 40]
neg x1, x0
ldr x0, [sp, 40]
neg x2, x0
ldr x0, [sp, 40]
sub x0, x2, x0
ldr x2, [sp, 40]
neg x2, x2
asr x2, x2, 63
and x0, x0, x2
sub x0, x1, x0
sub x0, x0, #1
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L2
mov w0, 0
b .L3
.L2:
ldr x0, [sp, 32]
neg x1, x0
ldr x0, [sp, 32]
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L4
mov w0, 0
b .L3
.L4:
ldr x1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl idebug
ldr x0, [sp, 32]
str x0, [sp, 56]
ldr x0, [sp, 40]
ldr x1, [sp, 56]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [sp, 56]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
str x1, [x0, 32]
mov w1, 0
ldr x0, [sp, 40]
bl iscript_parse
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl idebug
ldr x0, [sp, 40]
ldr x0, [x0, 40]
cmp x0, 0
cset w0, eq
and w0, w0, 255
.L3:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size iscript_run, .-iscript_run | %struct.TYPE_4__ = type { i8*, i8*, i8*, i8*, i64, i8* }
@.str = external hidden unnamed_addr constant [15 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
define dso_local i32 @iscript_run(%struct.TYPE_4__* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i32, align 4
%6 = alloca %struct.TYPE_4__*, align 8
%7 = alloca i8*, align 8
%8 = alloca i8*, align 8
%9 = alloca i64, align 8
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %6, align 8
store i8* %1, i8** %7, align 8
store i8* %2, i8** %8, align 8
store i64 %3, i64* %9, align 8
%10 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%11 = icmp eq %struct.TYPE_4__* null, %10
br i1 %11, label %15, label %12
12: ; preds = %4
%13 = load i8*, i8** %7, align 8
%14 = icmp eq i8* null, %13
br i1 %14, label %15, label %16
15: ; preds = %12, %4
store i32 0, i32* %5, align 4
br label %52
16: ; preds = %12
%17 = load i8*, i8** %7, align 8
%18 = call i32 @idebug(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %17)
%19 = load i8*, i8** %7, align 8
%20 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%21 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %20, i32 0, i32 1
store i8* %19, i8** %21, align 8
%22 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%23 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %22, i32 0, i32 0
store i8* %19, i8** %23, align 8
%24 = load i8*, i8** %8, align 8
%25 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%26 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %25, i32 0, i32 2
store i8* %24, i8** %26, align 8
%27 = load i8*, i8** %8, align 8
%28 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%29 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %28, i32 0, i32 3
store i8* %27, i8** %29, align 8
%30 = load i64, i64* %9, align 8
%31 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%32 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %31, i32 0, i32 4
store i64 %30, i64* %32, align 8
%33 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%34 = call i32 @iscript_parse(%struct.TYPE_4__* %33, i32 0)
%35 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%36 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %35, i32 0, i32 3
%37 = load i8*, i8** %36, align 8
%38 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%39 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %38, i32 0, i32 4
%40 = load i64, i64* %39, align 8
%41 = getelementptr inbounds i8, i8* %37, i64 %40
store i8 0, i8* %41, align 1
%42 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%43 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %42, i32 0, i32 5
%44 = load i8*, i8** %43, align 8
%45 = call i32 @idebug(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %44)
%46 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%47 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %46, i32 0, i32 5
%48 = load i8*, i8** %47, align 8
%49 = icmp ne i8* %48, null
%50 = xor i1 %49, true
%51 = zext i1 %50 to i32
store i32 %51, i32* %5, align 4
br label %52
52: ; preds = %16, %15
%53 = load i32, i32* %5, align 4
ret i32 %53
}
declare dso_local i32 @idebug(i8*, i8*)
declare dso_local i32 @iscript_parse(%struct.TYPE_4__*, i32) | /* BEGIN FUNCTION-DEF iscript_run LOC=UNKNOWN VKEY=4901 */
int iscript_run(IScript *is , char const *in , char *out , size_t___0 out_size )
{
char const *tmp ;
{
#line 49
if ((int )((((((unsigned long )((void *)0) - (unsigned long )is) - ((((unsigned long )((void *)0) - (unsigned long )is) + ((unsigned long )((void *)0) - (unsigned long )is)) & ((long )((unsigned long )((void *)0) - (unsigned long )is) >> 63L))) - 1UL) >> 63UL) & 1UL)) {
#line 50
return (0);
} else
#line 49
if ((int )((~ (((unsigned long )((void *)0) - (unsigned long )in) | ((unsigned long )in - (unsigned long )((void *)0))) >> 63UL) & 1UL)) {
#line 50 "/tmp/forklift_obfu_v3eodlol/input.c"
return (0);
}
{
#line 52
idebug("Parsing: \'%s\'\n", in);
#line 54
tmp = in;
#line 54
is->prog = tmp;
#line 54
is->buf = tmp;
#line 55
is->optr = out;
#line 56
is->outbuf = out;
#line 57
is->outbuf_size = out_size;
#line 59
iscript_parse(is, 0);
#line 61
*(is->outbuf + is->outbuf_size) = (char )'\000';
#line 63
idebug("ERROR: %d\n", is->error);
}
#line 65
return (! is->error);
}
}
/* END FUNCTION-DEF iscript_run LOC=UNKNOWN VKEY=4901 */ | 1,194,819,984 | train_synth_compilable |
iscript_run | int
iscript_run (IScript* is, const char* in, char* out, size_t out_size)
{
if (NULL == is || NULL == in)
return 0;
idebug ("Parsing: '%s'\n", in);
is->buf = is->prog = in;
is->optr = out;
is->outbuf = out;
is->outbuf_size = out_size;
iscript_parse (is, 0);
is->outbuf[is->outbuf_size] = '\0';
idebug ("ERROR: %d\n", is->error);
return ! is->error;
} | Flatten+EncodeArithmetic | .global iscript_run
.type iscript_run, %function
iscript_run:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 40]
cmp x0, 0
beq .L2
ldr x0, [sp, 32]
cmp x0, 0
bne .L3
.L2:
mov w0, 0
b .L4
.L3:
ldr x1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl idebug
ldr x0, [sp, 40]
ldr x1, [sp, 32]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [x0, 8]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
str x1, [x0, 32]
mov w1, 0
ldr x0, [sp, 40]
bl iscript_parse
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl idebug
ldr x0, [sp, 40]
ldr x0, [x0, 40]
cmp x0, 0
cset w0, eq
and w0, w0, 255
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "Parsing: '%s'\n"
.LC1: .string "ERROR: %d\n"
| .global iscript_run
.type iscript_run, %function
iscript_run:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
mov x0, 1
str x0, [sp, 56]
.L20:
ldr x0, [sp, 56]
cmp x0, 6
beq .L8
ldr x0, [sp, 56]
cmp x0, 6
bhi .L21
ldr x0, [sp, 56]
cmp x0, 5
beq .L10
ldr x0, [sp, 56]
cmp x0, 5
bhi .L21
ldr x0, [sp, 56]
cmp x0, 3
beq .L11
ldr x0, [sp, 56]
cmp x0, 3
bhi .L21
ldr x0, [sp, 56]
cmp x0, 2
beq .L12
ldr x0, [sp, 56]
cmp x0, 2
bhi .L21
ldr x0, [sp, 56]
cmp x0, 0
beq .L13
ldr x0, [sp, 56]
cmp x0, 1
bne .L21
ldr x0, [sp, 40]
neg x1, x0
ldr x0, [sp, 40]
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L14
mov x0, 2
str x0, [sp, 56]
b .L16
.L14:
str xzr, [sp, 56]
b .L16
.L11:
mov w0, 0
b .L17
.L8:
ldr x0, [sp, 40]
ldr x0, [x0, 40]
cmp x0, 0
cset w0, eq
and w0, w0, 255
b .L17
.L10:
ldr x1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl idebug
ldr x0, [sp, 32]
str x0, [sp, 48]
ldr x0, [sp, 40]
ldr x1, [sp, 48]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [sp, 48]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
str x1, [x0, 32]
mov w1, 0
ldr x0, [sp, 40]
bl iscript_parse
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl idebug
mov x0, 6
str x0, [sp, 56]
b .L16
.L13:
ldr x0, [sp, 32]
neg x1, x0
ldr x0, [sp, 32]
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L18
mov x0, 3
str x0, [sp, 56]
b .L16
.L18:
mov x0, 5
str x0, [sp, 56]
b .L16
.L12:
mov w0, 0
b .L17
.L21:
nop
.L16:
b .L20
.L17:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size iscript_run, .-iscript_run | %struct.TYPE_4__ = type { i8*, i8*, i8*, i8*, i64, i8* }
@.str = external hidden unnamed_addr constant [15 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
define dso_local i32 @iscript_run(%struct.TYPE_4__* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i32, align 4
%6 = alloca %struct.TYPE_4__*, align 8
%7 = alloca i8*, align 8
%8 = alloca i8*, align 8
%9 = alloca i64, align 8
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %6, align 8
store i8* %1, i8** %7, align 8
store i8* %2, i8** %8, align 8
store i64 %3, i64* %9, align 8
%10 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%11 = icmp eq %struct.TYPE_4__* null, %10
br i1 %11, label %15, label %12
12: ; preds = %4
%13 = load i8*, i8** %7, align 8
%14 = icmp eq i8* null, %13
br i1 %14, label %15, label %16
15: ; preds = %12, %4
store i32 0, i32* %5, align 4
br label %52
16: ; preds = %12
%17 = load i8*, i8** %7, align 8
%18 = call i32 @idebug(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %17)
%19 = load i8*, i8** %7, align 8
%20 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%21 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %20, i32 0, i32 1
store i8* %19, i8** %21, align 8
%22 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%23 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %22, i32 0, i32 0
store i8* %19, i8** %23, align 8
%24 = load i8*, i8** %8, align 8
%25 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%26 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %25, i32 0, i32 2
store i8* %24, i8** %26, align 8
%27 = load i8*, i8** %8, align 8
%28 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%29 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %28, i32 0, i32 3
store i8* %27, i8** %29, align 8
%30 = load i64, i64* %9, align 8
%31 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%32 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %31, i32 0, i32 4
store i64 %30, i64* %32, align 8
%33 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%34 = call i32 @iscript_parse(%struct.TYPE_4__* %33, i32 0)
%35 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%36 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %35, i32 0, i32 3
%37 = load i8*, i8** %36, align 8
%38 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%39 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %38, i32 0, i32 4
%40 = load i64, i64* %39, align 8
%41 = getelementptr inbounds i8, i8* %37, i64 %40
store i8 0, i8* %41, align 1
%42 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%43 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %42, i32 0, i32 5
%44 = load i8*, i8** %43, align 8
%45 = call i32 @idebug(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %44)
%46 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%47 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %46, i32 0, i32 5
%48 = load i8*, i8** %47, align 8
%49 = icmp ne i8* %48, null
%50 = xor i1 %49, true
%51 = zext i1 %50 to i32
store i32 %51, i32* %5, align 4
br label %52
52: ; preds = %16, %15
%53 = load i32, i32* %5, align 4
ret i32 %53
}
declare dso_local i32 @idebug(i8*, i8*)
declare dso_local i32 @iscript_parse(%struct.TYPE_4__*, i32) | /* BEGIN FUNCTION-DEF iscript_run LOC=UNKNOWN VKEY=4909 */
int iscript_run(IScript *is , char const *in , char *out , size_t___0 out_size )
{
char const *tmp ;
unsigned long _TIG_FN_eDnL_1_iscript_run_next ;
{
_TIG_FN_eDnL_1_iscript_run_next = 1UL;
while (1) {
switch (_TIG_FN_eDnL_1_iscript_run_next) {
case 1UL: ;
if ((int )((~ (((unsigned long )((void *)0) - (unsigned long )is) | ((unsigned long )is - (unsigned long )((void *)0))) >> 63UL) & 1UL)) {
_TIG_FN_eDnL_1_iscript_run_next = 2UL;
} else {
_TIG_FN_eDnL_1_iscript_run_next = 0UL;
}
break;
case 3UL: ;
return (0);
break;
case 6UL: ;
return (! is->error);
break;
case 5UL:
{
#line 52 "/tmp/forklift_obfu_mv4dqow7/input.c"
idebug("Parsing: \'%s\'\n", in);
#line 54
tmp = in;
#line 54
is->prog = tmp;
#line 54
is->buf = tmp;
#line 55
is->optr = out;
#line 56
is->outbuf = out;
#line 57
is->outbuf_size = out_size;
#line 59
iscript_parse(is, 0);
#line 61
*(is->outbuf + is->outbuf_size) = (char )'\000';
#line 63
idebug("ERROR: %d\n", is->error);
}
_TIG_FN_eDnL_1_iscript_run_next = 6UL;
break;
case 0UL: ;
if ((int )((~ (((unsigned long )((void *)0) - (unsigned long )in) | ((unsigned long )in - (unsigned long )((void *)0))) >> 63UL) & 1UL)) {
_TIG_FN_eDnL_1_iscript_run_next = 3UL;
} else {
_TIG_FN_eDnL_1_iscript_run_next = 5UL;
}
break;
case 2UL: ;
return (0);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF iscript_run LOC=UNKNOWN VKEY=4909 */ | 27,911,967 | train_synth_compilable |
GraphInit | void GraphInit(Graph* graph, uintptr_t nodeNumber) {
MatrixInit (&(graph->incidenceMatrix), nodeNumber, nodeNumber);
MatrixInit (&(graph->edgeValues), nodeNumber, nodeNumber);
ListInit (&(graph->nodeList), NULL );
uintptr_t i;
for (i = 0; i < nodeNumber; i++) {
ListAppend (&(graph->nodeList), NULL);
}
graph->size = nodeNumber;
} | EncodeArithmetic | .global GraphInit
.type GraphInit, %function
GraphInit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 12
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListInit
str xzr, [sp, 40]
b .L2
.L3:
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListAppend
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x1, [sp, 40]
ldr x0, [sp, 16]
cmp x1, x0
bcc .L3
ldr x0, [sp, 24]
ldr x1, [sp, 16]
str x1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global GraphInit
.type GraphInit, %function
GraphInit:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 12
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListInit
str xzr, [sp, 40]
b .L2
.L3:
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListAppend
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x0, [sp, 40]
mvn x1, x0
ldr x0, [sp, 16]
and x1, x1, x0
ldr x2, [sp, 40]
ldr x0, [sp, 16]
eor x0, x2, x0
mvn x2, x0
ldr x3, [sp, 40]
ldr x0, [sp, 16]
sub x0, x3, x0
and x0, x2, x0
orr x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
bne .L3
ldr x0, [sp, 24]
ldr x1, [sp, 16]
str x1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size GraphInit, .-GraphInit | %struct.TYPE_3__ = type { i64, i32, i32, i32 }
define dso_local void @GraphInit(%struct.TYPE_3__* %0, i64 %1) {
%3 = alloca %struct.TYPE_3__*, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %3, align 8
store i64 %1, i64* %4, align 8
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 3
%8 = load i64, i64* %4, align 8
%9 = load i64, i64* %4, align 8
%10 = call i32 @MatrixInit(i32* %7, i64 %8, i64 %9)
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 2
%13 = load i64, i64* %4, align 8
%14 = load i64, i64* %4, align 8
%15 = call i32 @MatrixInit(i32* %12, i64 %13, i64 %14)
%16 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%17 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %16, i32 0, i32 1
%18 = call i32 @ListInit(i32* %17, i32* null)
store i64 0, i64* %5, align 8
br label %19
19: ; preds = %27, %2
%20 = load i64, i64* %5, align 8
%21 = load i64, i64* %4, align 8
%22 = icmp ult i64 %20, %21
br i1 %22, label %23, label %30
23: ; preds = %19
%24 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%25 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %24, i32 0, i32 1
%26 = call i32 @ListAppend(i32* %25, i32* null)
br label %27
27: ; preds = %23
%28 = load i64, i64* %5, align 8
%29 = add i64 %28, 1
store i64 %29, i64* %5, align 8
br label %19
30: ; preds = %19
%31 = load i64, i64* %4, align 8
%32 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%33 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %32, i32 0, i32 0
store i64 %31, i64* %33, align 8
ret void
}
declare dso_local i32 @MatrixInit(i32*, i64, i64)
declare dso_local i32 @ListInit(i32*, i32*)
declare dso_local i32 @ListAppend(i32*, i32*) | /* BEGIN FUNCTION-DEF GraphInit LOC=UNKNOWN VKEY=4902 */
void GraphInit(Graph *graph , uintptr_t___0 nodeNumber )
{
uintptr_t___0 i ;
{
{
#line 49 "/tmp/forklift_obfu_3y4_qp_w/input.c"
MatrixInit(& graph->incidenceMatrix, nodeNumber, nodeNumber);
#line 50
MatrixInit(& graph->edgeValues, nodeNumber, nodeNumber);
#line 51
ListInit(& graph->nodeList, (int *)((void *)0));
#line 53
i = (uintptr_t___0 )0;
}
#line 53
while ((int )((((~ i & nodeNumber) | (~ (i ^ nodeNumber) & (i - nodeNumber))) >> 63UL) & 1UL)) {
{
#line 54
ListAppend(& graph->nodeList, (int *)((void *)0));
#line 53
i = (i - ~ 1UL) - 1UL;
}
}
#line 56
graph->size = nodeNumber;
#line 57
return;
}
}
/* END FUNCTION-DEF GraphInit LOC=UNKNOWN VKEY=4902 */ | 1,815,115,025 | train_synth_compilable |
GraphInit | void GraphInit(Graph* graph, uintptr_t nodeNumber) {
MatrixInit (&(graph->incidenceMatrix), nodeNumber, nodeNumber);
MatrixInit (&(graph->edgeValues), nodeNumber, nodeNumber);
ListInit (&(graph->nodeList), NULL );
uintptr_t i;
for (i = 0; i < nodeNumber; i++) {
ListAppend (&(graph->nodeList), NULL);
}
graph->size = nodeNumber;
} | Flatten | .global GraphInit
.type GraphInit, %function
GraphInit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 12
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListInit
str xzr, [sp, 40]
b .L2
.L3:
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListAppend
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x1, [sp, 40]
ldr x0, [sp, 16]
cmp x1, x0
bcc .L3
ldr x0, [sp, 24]
ldr x1, [sp, 16]
str x1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global GraphInit
.type GraphInit, %function
GraphInit:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
str xzr, [sp, 32]
.L13:
ldr x0, [sp, 32]
cmp x0, 7
beq .L14
ldr x0, [sp, 32]
cmp x0, 7
bhi .L15
ldr x0, [sp, 32]
cmp x0, 6
beq .L4
ldr x0, [sp, 32]
cmp x0, 6
bhi .L15
ldr x0, [sp, 32]
cmp x0, 4
beq .L5
ldr x0, [sp, 32]
cmp x0, 4
bhi .L15
ldr x0, [sp, 32]
cmp x0, 3
beq .L6
ldr x0, [sp, 32]
cmp x0, 3
bhi .L15
ldr x0, [sp, 32]
cmp x0, 0
beq .L7
ldr x0, [sp, 32]
cmp x0, 2
beq .L8
b .L15
.L5:
ldr x0, [sp, 24]
ldr x1, [sp, 16]
str x1, [x0]
mov x0, 7
str x0, [sp, 32]
b .L9
.L6:
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 12
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListInit
str xzr, [sp, 40]
mov x0, 6
str x0, [sp, 32]
b .L9
.L4:
ldr x1, [sp, 40]
ldr x0, [sp, 16]
cmp x1, x0
bcs .L10
mov x0, 2
str x0, [sp, 32]
b .L9
.L10:
mov x0, 4
str x0, [sp, 32]
b .L9
.L7:
mov x0, 3
str x0, [sp, 32]
b .L9
.L8:
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListAppend
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
mov x0, 6
str x0, [sp, 32]
b .L9
.L15:
nop
.L9:
b .L13
.L14:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size GraphInit, .-GraphInit | %struct.TYPE_3__ = type { i64, i32, i32, i32 }
define dso_local void @GraphInit(%struct.TYPE_3__* %0, i64 %1) {
%3 = alloca %struct.TYPE_3__*, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %3, align 8
store i64 %1, i64* %4, align 8
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 3
%8 = load i64, i64* %4, align 8
%9 = load i64, i64* %4, align 8
%10 = call i32 @MatrixInit(i32* %7, i64 %8, i64 %9)
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 2
%13 = load i64, i64* %4, align 8
%14 = load i64, i64* %4, align 8
%15 = call i32 @MatrixInit(i32* %12, i64 %13, i64 %14)
%16 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%17 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %16, i32 0, i32 1
%18 = call i32 @ListInit(i32* %17, i32* null)
store i64 0, i64* %5, align 8
br label %19
19: ; preds = %27, %2
%20 = load i64, i64* %5, align 8
%21 = load i64, i64* %4, align 8
%22 = icmp ult i64 %20, %21
br i1 %22, label %23, label %30
23: ; preds = %19
%24 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%25 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %24, i32 0, i32 1
%26 = call i32 @ListAppend(i32* %25, i32* null)
br label %27
27: ; preds = %23
%28 = load i64, i64* %5, align 8
%29 = add i64 %28, 1
store i64 %29, i64* %5, align 8
br label %19
30: ; preds = %19
%31 = load i64, i64* %4, align 8
%32 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%33 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %32, i32 0, i32 0
store i64 %31, i64* %33, align 8
ret void
}
declare dso_local i32 @MatrixInit(i32*, i64, i64)
declare dso_local i32 @ListInit(i32*, i32*)
declare dso_local i32 @ListAppend(i32*, i32*) | /* BEGIN FUNCTION-DEF GraphInit LOC=UNKNOWN VKEY=4902 */
void GraphInit(Graph *graph , uintptr_t___0 nodeNumber )
{
uintptr_t___0 i ;
unsigned long _TIG_FN_reks_1_GraphInit_next ;
{
{
_TIG_FN_reks_1_GraphInit_next = 0UL;
}
while (1) {
switch (_TIG_FN_reks_1_GraphInit_next) {
case 4UL:
#line 56 "/tmp/forklift_obfu_3ue12ycm/input.c"
graph->size = nodeNumber;
{
_TIG_FN_reks_1_GraphInit_next = 7UL;
}
break;
case 3UL:
#line 49
MatrixInit(& graph->incidenceMatrix, nodeNumber, nodeNumber);
#line 50
MatrixInit(& graph->edgeValues, nodeNumber, nodeNumber);
#line 51
ListInit(& graph->nodeList, (int *)((void *)0));
#line 53
i = (uintptr_t___0 )0;
{
_TIG_FN_reks_1_GraphInit_next = 6UL;
}
break;
case 6UL: ;
if (i < nodeNumber) {
{
_TIG_FN_reks_1_GraphInit_next = 2UL;
}
} else {
{
_TIG_FN_reks_1_GraphInit_next = 4UL;
}
}
break;
case 0UL: ;
{
_TIG_FN_reks_1_GraphInit_next = 3UL;
}
break;
case 7UL: ;
return;
break;
case 2UL:
#line 54
ListAppend(& graph->nodeList, (int *)((void *)0));
#line 53
i ++;
{
_TIG_FN_reks_1_GraphInit_next = 6UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF GraphInit LOC=UNKNOWN VKEY=4902 */ | 685,731,524 | train_synth_compilable |
iscript_run | int
iscript_run (IScript* is, const char* in, char* out, size_t out_size)
{
if (NULL == is || NULL == in)
return 0;
idebug ("Parsing: '%s'\n", in);
is->buf = is->prog = in;
is->optr = out;
is->outbuf = out;
is->outbuf_size = out_size;
iscript_parse (is, 0);
is->outbuf[is->outbuf_size] = '\0';
idebug ("ERROR: %d\n", is->error);
return ! is->error;
} | Flatten | .global iscript_run
.type iscript_run, %function
iscript_run:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 40]
cmp x0, 0
beq .L2
ldr x0, [sp, 32]
cmp x0, 0
bne .L3
.L2:
mov w0, 0
b .L4
.L3:
ldr x1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl idebug
ldr x0, [sp, 40]
ldr x1, [sp, 32]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [x0, 8]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
str x1, [x0, 32]
mov w1, 0
ldr x0, [sp, 40]
bl iscript_parse
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl idebug
ldr x0, [sp, 40]
ldr x0, [x0, 40]
cmp x0, 0
cset w0, eq
and w0, w0, 255
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "Parsing: '%s'\n"
.LC1: .string "ERROR: %d\n"
| .global iscript_run
.type iscript_run, %function
iscript_run:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
mov x0, 1
str x0, [sp, 56]
.L20:
ldr x0, [sp, 56]
cmp x0, 6
beq .L8
ldr x0, [sp, 56]
cmp x0, 6
bhi .L21
ldr x0, [sp, 56]
cmp x0, 5
beq .L10
ldr x0, [sp, 56]
cmp x0, 5
bhi .L21
ldr x0, [sp, 56]
cmp x0, 3
beq .L11
ldr x0, [sp, 56]
cmp x0, 3
bhi .L21
ldr x0, [sp, 56]
cmp x0, 2
beq .L12
ldr x0, [sp, 56]
cmp x0, 2
bhi .L21
ldr x0, [sp, 56]
cmp x0, 0
beq .L13
ldr x0, [sp, 56]
cmp x0, 1
bne .L21
ldr x0, [sp, 40]
cmp x0, 0
bne .L14
mov x0, 2
str x0, [sp, 56]
b .L16
.L14:
str xzr, [sp, 56]
b .L16
.L11:
mov w0, 0
b .L17
.L8:
ldr x0, [sp, 40]
ldr x0, [x0, 40]
cmp x0, 0
cset w0, eq
and w0, w0, 255
b .L17
.L10:
ldr x1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl idebug
ldr x0, [sp, 32]
str x0, [sp, 48]
ldr x0, [sp, 40]
ldr x1, [sp, 48]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [sp, 48]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
str x1, [x0, 32]
mov w1, 0
ldr x0, [sp, 40]
bl iscript_parse
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl idebug
mov x0, 6
str x0, [sp, 56]
b .L16
.L13:
ldr x0, [sp, 32]
cmp x0, 0
bne .L18
mov x0, 3
str x0, [sp, 56]
b .L16
.L18:
mov x0, 5
str x0, [sp, 56]
b .L16
.L12:
mov w0, 0
b .L17
.L21:
nop
.L16:
b .L20
.L17:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size iscript_run, .-iscript_run | %struct.TYPE_4__ = type { i8*, i8*, i8*, i8*, i64, i8* }
@.str = external hidden unnamed_addr constant [15 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [11 x i8], align 1
define dso_local i32 @iscript_run(%struct.TYPE_4__* %0, i8* %1, i8* %2, i64 %3) {
%5 = alloca i32, align 4
%6 = alloca %struct.TYPE_4__*, align 8
%7 = alloca i8*, align 8
%8 = alloca i8*, align 8
%9 = alloca i64, align 8
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %6, align 8
store i8* %1, i8** %7, align 8
store i8* %2, i8** %8, align 8
store i64 %3, i64* %9, align 8
%10 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%11 = icmp eq %struct.TYPE_4__* null, %10
br i1 %11, label %15, label %12
12: ; preds = %4
%13 = load i8*, i8** %7, align 8
%14 = icmp eq i8* null, %13
br i1 %14, label %15, label %16
15: ; preds = %12, %4
store i32 0, i32* %5, align 4
br label %52
16: ; preds = %12
%17 = load i8*, i8** %7, align 8
%18 = call i32 @idebug(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %17)
%19 = load i8*, i8** %7, align 8
%20 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%21 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %20, i32 0, i32 1
store i8* %19, i8** %21, align 8
%22 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%23 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %22, i32 0, i32 0
store i8* %19, i8** %23, align 8
%24 = load i8*, i8** %8, align 8
%25 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%26 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %25, i32 0, i32 2
store i8* %24, i8** %26, align 8
%27 = load i8*, i8** %8, align 8
%28 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%29 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %28, i32 0, i32 3
store i8* %27, i8** %29, align 8
%30 = load i64, i64* %9, align 8
%31 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%32 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %31, i32 0, i32 4
store i64 %30, i64* %32, align 8
%33 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%34 = call i32 @iscript_parse(%struct.TYPE_4__* %33, i32 0)
%35 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%36 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %35, i32 0, i32 3
%37 = load i8*, i8** %36, align 8
%38 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%39 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %38, i32 0, i32 4
%40 = load i64, i64* %39, align 8
%41 = getelementptr inbounds i8, i8* %37, i64 %40
store i8 0, i8* %41, align 1
%42 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%43 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %42, i32 0, i32 5
%44 = load i8*, i8** %43, align 8
%45 = call i32 @idebug(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* %44)
%46 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8
%47 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %46, i32 0, i32 5
%48 = load i8*, i8** %47, align 8
%49 = icmp ne i8* %48, null
%50 = xor i1 %49, true
%51 = zext i1 %50 to i32
store i32 %51, i32* %5, align 4
br label %52
52: ; preds = %16, %15
%53 = load i32, i32* %5, align 4
ret i32 %53
}
declare dso_local i32 @idebug(i8*, i8*)
declare dso_local i32 @iscript_parse(%struct.TYPE_4__*, i32) | /* BEGIN FUNCTION-DEF iscript_run LOC=UNKNOWN VKEY=4901 */
int iscript_run(IScript *is , char const *in , char *out , size_t___0 out_size )
{
char const *tmp ;
unsigned long _TIG_FN_SxhQ_1_iscript_run_next ;
{
{
_TIG_FN_SxhQ_1_iscript_run_next = 1UL;
}
while (1) {
switch (_TIG_FN_SxhQ_1_iscript_run_next) {
case 1UL: ;
if ((unsigned long )((void *)0) == (unsigned long )is) {
{
_TIG_FN_SxhQ_1_iscript_run_next = 2UL;
}
} else {
{
_TIG_FN_SxhQ_1_iscript_run_next = 0UL;
}
}
break;
case 3UL: ;
return (0);
break;
case 6UL: ;
return (! is->error);
break;
case 5UL:
#line 52
idebug("Parsing: \'%s\'\n", in);
#line 54
tmp = in;
#line 54
is->prog = tmp;
#line 54
is->buf = tmp;
#line 55
is->optr = out;
#line 56
is->outbuf = out;
#line 57
is->outbuf_size = out_size;
#line 59
iscript_parse(is, 0);
#line 61
*(is->outbuf + is->outbuf_size) = (char )'\000';
#line 63
idebug("ERROR: %d\n", is->error);
{
_TIG_FN_SxhQ_1_iscript_run_next = 6UL;
}
break;
case 0UL: ;
if ((unsigned long )((void *)0) == (unsigned long )in) {
{
_TIG_FN_SxhQ_1_iscript_run_next = 3UL;
}
} else {
{
_TIG_FN_SxhQ_1_iscript_run_next = 5UL;
}
}
break;
case 2UL: ;
return (0);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF iscript_run LOC=UNKNOWN VKEY=4901 */ | 1,929,338,154 | train_synth_compilable |
GraphInit | void GraphInit(Graph* graph, uintptr_t nodeNumber) {
MatrixInit (&(graph->incidenceMatrix), nodeNumber, nodeNumber);
MatrixInit (&(graph->edgeValues), nodeNumber, nodeNumber);
ListInit (&(graph->nodeList), NULL );
uintptr_t i;
for (i = 0; i < nodeNumber; i++) {
ListAppend (&(graph->nodeList), NULL);
}
graph->size = nodeNumber;
} | Flatten+EncodeArithmetic | .global GraphInit
.type GraphInit, %function
GraphInit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 12
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListInit
str xzr, [sp, 40]
b .L2
.L3:
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListAppend
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x1, [sp, 40]
ldr x0, [sp, 16]
cmp x1, x0
bcc .L3
ldr x0, [sp, 24]
ldr x1, [sp, 16]
str x1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global GraphInit
.type GraphInit, %function
GraphInit:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
str xzr, [sp, 32]
.L19:
ldr x0, [sp, 32]
cmp x0, 7
beq .L20
ldr x0, [sp, 32]
cmp x0, 7
bhi .L21
ldr x0, [sp, 32]
cmp x0, 6
beq .L10
ldr x0, [sp, 32]
cmp x0, 6
bhi .L21
ldr x0, [sp, 32]
cmp x0, 4
beq .L11
ldr x0, [sp, 32]
cmp x0, 4
bhi .L21
ldr x0, [sp, 32]
cmp x0, 3
beq .L12
ldr x0, [sp, 32]
cmp x0, 3
bhi .L21
ldr x0, [sp, 32]
cmp x0, 0
beq .L13
ldr x0, [sp, 32]
cmp x0, 2
beq .L14
b .L21
.L11:
ldr x0, [sp, 24]
ldr x1, [sp, 16]
str x1, [x0]
mov x0, 7
str x0, [sp, 32]
b .L15
.L12:
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 12
ldr x2, [sp, 16]
ldr x1, [sp, 16]
bl MatrixInit
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListInit
str xzr, [sp, 40]
mov x0, 6
str x0, [sp, 32]
b .L15
.L10:
ldr x0, [sp, 40]
mvn x1, x0
ldr x0, [sp, 16]
and x1, x1, x0
ldr x2, [sp, 40]
ldr x0, [sp, 16]
eor x0, x2, x0
mvn x2, x0
ldr x3, [sp, 40]
ldr x0, [sp, 16]
sub x0, x3, x0
and x0, x2, x0
orr x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L16
mov x0, 2
str x0, [sp, 32]
b .L15
.L16:
mov x0, 4
str x0, [sp, 32]
b .L15
.L13:
mov x0, 3
str x0, [sp, 32]
b .L15
.L14:
ldr x0, [sp, 24]
add x0, x0, 8
mov x1, 0
bl ListAppend
ldr x0, [sp, 40]
lsl x0, x0, 1
orr x1, x0, 2
ldr x0, [sp, 40]
eor x0, x0, 1
sub x0, x1, x0
str x0, [sp, 40]
mov x0, 6
str x0, [sp, 32]
b .L15
.L21:
nop
.L15:
b .L19
.L20:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size GraphInit, .-GraphInit | %struct.TYPE_3__ = type { i64, i32, i32, i32 }
define dso_local void @GraphInit(%struct.TYPE_3__* %0, i64 %1) {
%3 = alloca %struct.TYPE_3__*, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %3, align 8
store i64 %1, i64* %4, align 8
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 3
%8 = load i64, i64* %4, align 8
%9 = load i64, i64* %4, align 8
%10 = call i32 @MatrixInit(i32* %7, i64 %8, i64 %9)
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 2
%13 = load i64, i64* %4, align 8
%14 = load i64, i64* %4, align 8
%15 = call i32 @MatrixInit(i32* %12, i64 %13, i64 %14)
%16 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%17 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %16, i32 0, i32 1
%18 = call i32 @ListInit(i32* %17, i32* null)
store i64 0, i64* %5, align 8
br label %19
19: ; preds = %27, %2
%20 = load i64, i64* %5, align 8
%21 = load i64, i64* %4, align 8
%22 = icmp ult i64 %20, %21
br i1 %22, label %23, label %30
23: ; preds = %19
%24 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%25 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %24, i32 0, i32 1
%26 = call i32 @ListAppend(i32* %25, i32* null)
br label %27
27: ; preds = %23
%28 = load i64, i64* %5, align 8
%29 = add i64 %28, 1
store i64 %29, i64* %5, align 8
br label %19
30: ; preds = %19
%31 = load i64, i64* %4, align 8
%32 = load %struct.TYPE_3__*, %struct.TYPE_3__** %3, align 8
%33 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %32, i32 0, i32 0
store i64 %31, i64* %33, align 8
ret void
}
declare dso_local i32 @MatrixInit(i32*, i64, i64)
declare dso_local i32 @ListInit(i32*, i32*)
declare dso_local i32 @ListAppend(i32*, i32*) | /* BEGIN FUNCTION-DEF GraphInit LOC=UNKNOWN VKEY=4908 */
void GraphInit(Graph *graph , uintptr_t___0 nodeNumber )
{
uintptr_t___0 i ;
unsigned long _TIG_FN_1HYS_1_GraphInit_next ;
{
_TIG_FN_1HYS_1_GraphInit_next = 0UL;
while (1) {
switch (_TIG_FN_1HYS_1_GraphInit_next) {
case 4UL:
#line 56 "/tmp/forklift_obfu_a805jst9/input.c"
graph->size = nodeNumber;
_TIG_FN_1HYS_1_GraphInit_next = 7UL;
break;
case 3UL:
{
#line 49
MatrixInit(& graph->incidenceMatrix, nodeNumber, nodeNumber);
#line 50
MatrixInit(& graph->edgeValues, nodeNumber, nodeNumber);
#line 51
ListInit(& graph->nodeList, (int *)((void *)0));
#line 53
i = (uintptr_t___0 )0;
}
_TIG_FN_1HYS_1_GraphInit_next = 6UL;
break;
case 6UL: ;
if ((int )((((~ i & nodeNumber) | (~ (i ^ nodeNumber) & (i - nodeNumber))) >> 63UL) & 1UL)) {
_TIG_FN_1HYS_1_GraphInit_next = 2UL;
} else {
_TIG_FN_1HYS_1_GraphInit_next = 4UL;
}
break;
case 0UL: ;
_TIG_FN_1HYS_1_GraphInit_next = 3UL;
break;
case 7UL: ;
return;
break;
case 2UL:
{
#line 54
ListAppend(& graph->nodeList, (int *)((void *)0));
#line 53
i = ((i | 1UL) << 1UL) - (i ^ 1UL);
}
_TIG_FN_1HYS_1_GraphInit_next = 6UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF GraphInit LOC=UNKNOWN VKEY=4908 */ | 1,461,364,854 | train_synth_compilable |
scene_getwidth | static uint32_t scene_getwidth(void *data)
{
obs_scene_t *scene = data;
return scene->custom_size ? scene->cx : obs->video.base_width;
} | Flatten | .global scene_getwidth
.type scene_getwidth, %function
scene_getwidth:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
ldr w0, [x0]
b .L4
.L2:
adrp x0, :got:obs
ldr x0, [x0, #:got_lo12:obs]
ldr x0, [x0]
ldr w0, [x0]
.L4:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global scene_getwidth
.type scene_getwidth, %function
scene_getwidth:
.LFB0:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
mov x0, 3
str x0, [sp, 24]
.L12:
ldr x0, [sp, 24]
cmp x0, 4
beq .L2
ldr x0, [sp, 24]
cmp x0, 4
bhi .L14
ldr x0, [sp, 24]
cmp x0, 3
beq .L4
ldr x0, [sp, 24]
cmp x0, 3
bhi .L14
ldr x0, [sp, 24]
cmp x0, 2
beq .L5
ldr x0, [sp, 24]
cmp x0, 2
bhi .L14
ldr x0, [sp, 24]
cmp x0, 0
beq .L6
ldr x0, [sp, 24]
cmp x0, 1
beq .L7
b .L14
.L2:
ldr x0, [sp, 40]
ldr x0, [x0, 8]
cmp x0, 0
beq .L8
mov x0, 1
str x0, [sp, 24]
b .L10
.L8:
mov x0, 2
str x0, [sp, 24]
b .L10
.L7:
ldr x0, [sp, 40]
ldr w0, [x0]
str w0, [sp, 36]
str xzr, [sp, 24]
b .L10
.L4:
ldr x0, [sp, 8]
str x0, [sp, 40]
mov x0, 4
str x0, [sp, 24]
b .L10
.L6:
ldr w0, [sp, 36]
b .L13
.L5:
adrp x0, obs
add x0, x0, :lo12:obs
ldr x0, [x0]
ldr w0, [x0]
str w0, [sp, 36]
str xzr, [sp, 24]
b .L10
.L14:
nop
.L10:
b .L12
.L13:
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size scene_getwidth, .-scene_getwidth | %struct.TYPE_6__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
%struct.TYPE_5__ = type { i32, i64 }
@obs = external dso_local global %struct.TYPE_6__*, align 8
define dso_local i32 @scene_getwidth(i8* %0) {
%2 = alloca i8*, align 8
%3 = alloca %struct.TYPE_5__*, align 8
store i8* %0, i8** %2, align 8
%4 = load i8*, i8** %2, align 8
%5 = bitcast i8* %4 to %struct.TYPE_5__*
store %struct.TYPE_5__* %5, %struct.TYPE_5__** %3, align 8
%6 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%7 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %6, i32 0, i32 1
%8 = load i64, i64* %7, align 8
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%12 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i32 0, i32 0
%13 = load i32, i32* %12, align 8
br label %19
14: ; preds = %1
%15 = load %struct.TYPE_6__*, %struct.TYPE_6__** @obs, align 8
%16 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %15, i32 0, i32 0
%17 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %16, i32 0, i32 0
%18 = load i32, i32* %17, align 4
br label %19
19: ; preds = %14, %10
%20 = phi i32 [ %13, %10 ], [ %18, %14 ]
ret i32 %20
} | /* BEGIN FUNCTION-DEF scene_getwidth LOC=UNKNOWN VKEY=4885 */
static uint32_t___0 scene_getwidth(void *data )
{
obs_scene_t *scene ;
int tmp ;
unsigned long _TIG_FN_zWmh_1_scene_getwidth_next ;
{
{
_TIG_FN_zWmh_1_scene_getwidth_next = 3UL;
}
while (1) {
switch (_TIG_FN_zWmh_1_scene_getwidth_next) {
case 4UL: ;
if (scene->custom_size) {
{
_TIG_FN_zWmh_1_scene_getwidth_next = 1UL;
}
} else {
{
_TIG_FN_zWmh_1_scene_getwidth_next = 2UL;
}
}
break;
case 1UL:
#line 53 "/tmp/forklift_obfu_ziinye50/input.c"
tmp = scene->cx;
{
_TIG_FN_zWmh_1_scene_getwidth_next = 0UL;
}
break;
case 3UL:
#line 52
scene = (obs_scene_t *)data;
{
_TIG_FN_zWmh_1_scene_getwidth_next = 4UL;
}
break;
case 0UL: ;
return (tmp);
break;
case 2UL:
#line 53
tmp = obs->video.base_width;
{
_TIG_FN_zWmh_1_scene_getwidth_next = 0UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF scene_getwidth LOC=UNKNOWN VKEY=4885 */ | 1,445,662,585 | train_synth_compilable |
arityImpl_1011 | Value *arityImpl_1011(List *closures, Value *arg0) {
Value *rslt0 = protoFnImpl_262(empty_list, arg0);
List *varArgs1 = empty_list;
incRef((Value *)rslt0);
varArgs1 = (List *)listCons((Value *)rslt0, varArgs1);
Value *rslt2 = arityImpl_248(empty_list, (Value *)varArgs1);
dec_and_free((Value *)varArgs1);
incRef(rslt2);
dec_and_free(rslt0);
dec_and_free(rslt2);
return(rslt2);
} | Flatten | .global arityImpl_1011
.type arityImpl_1011, %function
arityImpl_1011:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
ldr x1, [sp, 16]
bl protoFnImpl_262
str x0, [sp, 40]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 40]
bl incRef
ldr x1, [sp, 48]
ldr x0, [sp, 40]
bl listCons
str x0, [sp, 48]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
ldr x1, [sp, 48]
bl arityImpl_248
str x0, [sp, 56]
ldr x0, [sp, 48]
bl dec_and_free
ldr x0, [sp, 56]
bl incRef
ldr x0, [sp, 40]
bl dec_and_free
ldr x0, [sp, 56]
bl dec_and_free
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global arityImpl_1011
.type arityImpl_1011, %function
arityImpl_1011:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
str xzr, [sp, 80]
.L7:
ldr x0, [sp, 80]
cmp x0, 2
beq .L2
ldr x0, [sp, 80]
cmp x0, 2
bhi .L9
ldr x0, [sp, 80]
cmp x0, 0
beq .L4
ldr x0, [sp, 80]
cmp x0, 1
bne .L9
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
ldr x1, [sp, 16]
bl protoFnImpl_262
str x0, [sp, 72]
ldr x0, [sp, 72]
str x0, [sp, 64]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
str x0, [sp, 56]
ldr x0, [sp, 64]
bl incRef
ldr x1, [sp, 56]
ldr x0, [sp, 64]
bl listCons
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 56]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
ldr x1, [sp, 56]
bl arityImpl_248
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 88]
ldr x0, [sp, 56]
bl dec_and_free
ldr x0, [sp, 88]
bl incRef
ldr x0, [sp, 64]
bl dec_and_free
ldr x0, [sp, 88]
bl dec_and_free
mov x0, 2
str x0, [sp, 80]
b .L5
.L4:
mov x0, 1
str x0, [sp, 80]
b .L5
.L2:
ldr x0, [sp, 88]
b .L8
.L9:
nop
.L5:
b .L7
.L8:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size arityImpl_1011, .-arityImpl_1011 | @empty_list = external dso_local global i32*, align 8
define dso_local i32* @arityImpl_1011(i32* %0, i32* %1) {
%3 = alloca i32*, align 8
%4 = alloca i32*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32*, align 8
%7 = alloca i32*, align 8
store i32* %0, i32** %3, align 8
store i32* %1, i32** %4, align 8
%8 = load i32*, i32** @empty_list, align 8
%9 = load i32*, i32** %4, align 8
%10 = call i32* @protoFnImpl_262(i32* %8, i32* %9)
store i32* %10, i32** %5, align 8
%11 = load i32*, i32** @empty_list, align 8
store i32* %11, i32** %6, align 8
%12 = load i32*, i32** %5, align 8
%13 = call i32 @incRef(i32* %12)
%14 = load i32*, i32** %5, align 8
%15 = load i32*, i32** %6, align 8
%16 = call i64 @listCons(i32* %14, i32* %15)
%17 = inttoptr i64 %16 to i32*
store i32* %17, i32** %6, align 8
%18 = load i32*, i32** @empty_list, align 8
%19 = load i32*, i32** %6, align 8
%20 = call i32* @arityImpl_248(i32* %18, i32* %19)
store i32* %20, i32** %7, align 8
%21 = load i32*, i32** %6, align 8
%22 = call i32 @dec_and_free(i32* %21)
%23 = load i32*, i32** %7, align 8
%24 = call i32 @incRef(i32* %23)
%25 = load i32*, i32** %5, align 8
%26 = call i32 @dec_and_free(i32* %25)
%27 = load i32*, i32** %7, align 8
%28 = call i32 @dec_and_free(i32* %27)
%29 = load i32*, i32** %7, align 8
ret i32* %29
}
declare dso_local i32* @protoFnImpl_262(i32*, i32*)
declare dso_local i32 @incRef(i32*)
declare dso_local i64 @listCons(i32*, i32*)
declare dso_local i32* @arityImpl_248(i32*, i32*)
declare dso_local i32 @dec_and_free(i32*) | /* BEGIN FUNCTION-DEF arityImpl_1011 LOC=UNKNOWN VKEY=4915 */
Value *arityImpl_1011(List *closures , Value *arg0 )
{
Value *rslt0 ;
int *tmp ;
List *varArgs1 ;
scalar_t__ tmp___0 ;
Value *rslt2 ;
int *tmp___1 ;
unsigned long _TIG_FN_pZ1P_1_arityImpl_1011_next ;
{
{
_TIG_FN_pZ1P_1_arityImpl_1011_next = 0UL;
}
while (1) {
switch (_TIG_FN_pZ1P_1_arityImpl_1011_next) {
case 1UL:
#line 50 "/tmp/forklift_obfu_xraontif/input.c"
tmp = protoFnImpl_262(empty_list, arg0);
#line 50
rslt0 = tmp;
#line 51
varArgs1 = empty_list;
#line 52
incRef(rslt0);
#line 53
tmp___0 = listCons(rslt0, varArgs1);
#line 53
varArgs1 = (List *)tmp___0;
#line 54
tmp___1 = arityImpl_248(empty_list, varArgs1);
#line 54
rslt2 = tmp___1;
#line 55
dec_and_free(varArgs1);
#line 56
incRef(rslt2);
#line 57
dec_and_free(rslt0);
#line 58
dec_and_free(rslt2);
{
_TIG_FN_pZ1P_1_arityImpl_1011_next = 2UL;
}
break;
case 0UL: ;
{
_TIG_FN_pZ1P_1_arityImpl_1011_next = 1UL;
}
break;
case 2UL: ;
return (rslt2);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF arityImpl_1011 LOC=UNKNOWN VKEY=4915 */ | 1,193,448,329 | train_synth_compilable |
arityImpl_1011 | Value *arityImpl_1011(List *closures, Value *arg0) {
Value *rslt0 = protoFnImpl_262(empty_list, arg0);
List *varArgs1 = empty_list;
incRef((Value *)rslt0);
varArgs1 = (List *)listCons((Value *)rslt0, varArgs1);
Value *rslt2 = arityImpl_248(empty_list, (Value *)varArgs1);
dec_and_free((Value *)varArgs1);
incRef(rslt2);
dec_and_free(rslt0);
dec_and_free(rslt2);
return(rslt2);
} | EncodeArithmetic | .global arityImpl_1011
.type arityImpl_1011, %function
arityImpl_1011:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
ldr x1, [sp, 16]
bl protoFnImpl_262
str x0, [sp, 40]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 40]
bl incRef
ldr x1, [sp, 48]
ldr x0, [sp, 40]
bl listCons
str x0, [sp, 48]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
ldr x1, [sp, 48]
bl arityImpl_248
str x0, [sp, 56]
ldr x0, [sp, 48]
bl dec_and_free
ldr x0, [sp, 56]
bl incRef
ldr x0, [sp, 40]
bl dec_and_free
ldr x0, [sp, 56]
bl dec_and_free
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global arityImpl_1011
.type arityImpl_1011, %function
arityImpl_1011:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
ldr x1, [sp, 16]
bl protoFnImpl_262
str x0, [sp, 72]
ldr x0, [sp, 72]
str x0, [sp, 64]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
str x0, [sp, 56]
ldr x0, [sp, 64]
bl incRef
ldr x1, [sp, 56]
ldr x0, [sp, 64]
bl listCons
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 56]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
ldr x1, [sp, 56]
bl arityImpl_248
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
ldr x0, [sp, 56]
bl dec_and_free
ldr x0, [sp, 32]
bl incRef
ldr x0, [sp, 64]
bl dec_and_free
ldr x0, [sp, 32]
bl dec_and_free
ldr x0, [sp, 32]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size arityImpl_1011, .-arityImpl_1011 | @empty_list = external dso_local global i32*, align 8
define dso_local i32* @arityImpl_1011(i32* %0, i32* %1) {
%3 = alloca i32*, align 8
%4 = alloca i32*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32*, align 8
%7 = alloca i32*, align 8
store i32* %0, i32** %3, align 8
store i32* %1, i32** %4, align 8
%8 = load i32*, i32** @empty_list, align 8
%9 = load i32*, i32** %4, align 8
%10 = call i32* @protoFnImpl_262(i32* %8, i32* %9)
store i32* %10, i32** %5, align 8
%11 = load i32*, i32** @empty_list, align 8
store i32* %11, i32** %6, align 8
%12 = load i32*, i32** %5, align 8
%13 = call i32 @incRef(i32* %12)
%14 = load i32*, i32** %5, align 8
%15 = load i32*, i32** %6, align 8
%16 = call i64 @listCons(i32* %14, i32* %15)
%17 = inttoptr i64 %16 to i32*
store i32* %17, i32** %6, align 8
%18 = load i32*, i32** @empty_list, align 8
%19 = load i32*, i32** %6, align 8
%20 = call i32* @arityImpl_248(i32* %18, i32* %19)
store i32* %20, i32** %7, align 8
%21 = load i32*, i32** %6, align 8
%22 = call i32 @dec_and_free(i32* %21)
%23 = load i32*, i32** %7, align 8
%24 = call i32 @incRef(i32* %23)
%25 = load i32*, i32** %5, align 8
%26 = call i32 @dec_and_free(i32* %25)
%27 = load i32*, i32** %7, align 8
%28 = call i32 @dec_and_free(i32* %27)
%29 = load i32*, i32** %7, align 8
ret i32* %29
}
declare dso_local i32* @protoFnImpl_262(i32*, i32*)
declare dso_local i32 @incRef(i32*)
declare dso_local i64 @listCons(i32*, i32*)
declare dso_local i32* @arityImpl_248(i32*, i32*)
declare dso_local i32 @dec_and_free(i32*) | /* BEGIN FUNCTION-DEF arityImpl_1011 LOC=UNKNOWN VKEY=4915 */
Value *arityImpl_1011(List *closures , Value *arg0 )
{
Value *rslt0 ;
int *tmp ;
List *varArgs1 ;
scalar_t__ tmp___0 ;
Value *rslt2 ;
int *tmp___1 ;
{
{
#line 50 "/tmp/forklift_obfu_i79elnhj/input.c"
tmp = protoFnImpl_262(empty_list, arg0);
#line 50
rslt0 = tmp;
#line 51
varArgs1 = empty_list;
#line 52
incRef(rslt0);
#line 53
tmp___0 = listCons(rslt0, varArgs1);
#line 53
varArgs1 = (List *)tmp___0;
#line 54
tmp___1 = arityImpl_248(empty_list, varArgs1);
#line 54
rslt2 = tmp___1;
#line 55
dec_and_free(varArgs1);
#line 56
incRef(rslt2);
#line 57
dec_and_free(rslt0);
#line 58
dec_and_free(rslt2);
}
#line 59
return (rslt2);
}
}
/* END FUNCTION-DEF arityImpl_1011 LOC=UNKNOWN VKEY=4915 */ | 667,779,376 | train_synth_compilable |
scene_getwidth | static uint32_t scene_getwidth(void *data)
{
obs_scene_t *scene = data;
return scene->custom_size ? scene->cx : obs->video.base_width;
} | EncodeArithmetic | .global scene_getwidth
.type scene_getwidth, %function
scene_getwidth:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
ldr w0, [x0]
b .L4
.L2:
adrp x0, :got:obs
ldr x0, [x0, #:got_lo12:obs]
ldr x0, [x0]
ldr w0, [x0]
.L4:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global scene_getwidth
.type scene_getwidth, %function
scene_getwidth:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str x0, [sp, 16]
ldr x0, [sp, 16]
ldr x0, [x0, 8]
cmp x0, 0
beq .L2
ldr x0, [sp, 16]
ldr w0, [x0]
str w0, [sp, 28]
b .L3
.L2:
adrp x0, obs
add x0, x0, :lo12:obs
ldr x0, [x0]
ldr w0, [x0]
str w0, [sp, 28]
.L3:
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size scene_getwidth, .-scene_getwidth | %struct.TYPE_6__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
%struct.TYPE_5__ = type { i32, i64 }
@obs = external dso_local global %struct.TYPE_6__*, align 8
define dso_local i32 @scene_getwidth(i8* %0) {
%2 = alloca i8*, align 8
%3 = alloca %struct.TYPE_5__*, align 8
store i8* %0, i8** %2, align 8
%4 = load i8*, i8** %2, align 8
%5 = bitcast i8* %4 to %struct.TYPE_5__*
store %struct.TYPE_5__* %5, %struct.TYPE_5__** %3, align 8
%6 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%7 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %6, i32 0, i32 1
%8 = load i64, i64* %7, align 8
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%12 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i32 0, i32 0
%13 = load i32, i32* %12, align 8
br label %19
14: ; preds = %1
%15 = load %struct.TYPE_6__*, %struct.TYPE_6__** @obs, align 8
%16 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %15, i32 0, i32 0
%17 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %16, i32 0, i32 0
%18 = load i32, i32* %17, align 4
br label %19
19: ; preds = %14, %10
%20 = phi i32 [ %13, %10 ], [ %18, %14 ]
ret i32 %20
} | /* BEGIN FUNCTION-DEF scene_getwidth LOC=UNKNOWN VKEY=4885 */
static uint32_t___0 scene_getwidth(void *data )
{
obs_scene_t *scene ;
int tmp ;
{
#line 52 "/tmp/forklift_obfu_27ikrbbx/input.c"
scene = (obs_scene_t *)data;
#line 53
if (scene->custom_size) {
#line 53
tmp = scene->cx;
} else {
#line 53
tmp = obs->video.base_width;
}
#line 53
return (tmp);
}
}
/* END FUNCTION-DEF scene_getwidth LOC=UNKNOWN VKEY=4885 */ | 438,989,805 | train_synth_compilable |
scene_getwidth | static uint32_t scene_getwidth(void *data)
{
obs_scene_t *scene = data;
return scene->custom_size ? scene->cx : obs->video.base_width;
} | Flatten+EncodeArithmetic | .global scene_getwidth
.type scene_getwidth, %function
scene_getwidth:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
ldr w0, [x0]
b .L4
.L2:
adrp x0, :got:obs
ldr x0, [x0, #:got_lo12:obs]
ldr x0, [x0]
ldr w0, [x0]
.L4:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global scene_getwidth
.type scene_getwidth, %function
scene_getwidth:
.LFB7:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
mov x0, 3
str x0, [sp, 24]
.L19:
ldr x0, [sp, 24]
cmp x0, 4
beq .L9
ldr x0, [sp, 24]
cmp x0, 4
bhi .L21
ldr x0, [sp, 24]
cmp x0, 3
beq .L11
ldr x0, [sp, 24]
cmp x0, 3
bhi .L21
ldr x0, [sp, 24]
cmp x0, 2
beq .L12
ldr x0, [sp, 24]
cmp x0, 2
bhi .L21
ldr x0, [sp, 24]
cmp x0, 0
beq .L13
ldr x0, [sp, 24]
cmp x0, 1
beq .L14
b .L21
.L9:
ldr x0, [sp, 40]
ldr x0, [x0, 8]
cmp x0, 0
beq .L15
mov x0, 1
str x0, [sp, 24]
b .L17
.L15:
mov x0, 2
str x0, [sp, 24]
b .L17
.L14:
ldr x0, [sp, 40]
ldr w0, [x0]
str w0, [sp, 36]
str xzr, [sp, 24]
b .L17
.L11:
ldr x0, [sp, 8]
str x0, [sp, 40]
mov x0, 4
str x0, [sp, 24]
b .L17
.L13:
ldr w0, [sp, 36]
b .L20
.L12:
adrp x0, obs
add x0, x0, :lo12:obs
ldr x0, [x0]
ldr w0, [x0]
str w0, [sp, 36]
str xzr, [sp, 24]
b .L17
.L21:
nop
.L17:
b .L19
.L20:
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size scene_getwidth, .-scene_getwidth | %struct.TYPE_6__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
%struct.TYPE_5__ = type { i32, i64 }
@obs = external dso_local global %struct.TYPE_6__*, align 8
define dso_local i32 @scene_getwidth(i8* %0) {
%2 = alloca i8*, align 8
%3 = alloca %struct.TYPE_5__*, align 8
store i8* %0, i8** %2, align 8
%4 = load i8*, i8** %2, align 8
%5 = bitcast i8* %4 to %struct.TYPE_5__*
store %struct.TYPE_5__* %5, %struct.TYPE_5__** %3, align 8
%6 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%7 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %6, i32 0, i32 1
%8 = load i64, i64* %7, align 8
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load %struct.TYPE_5__*, %struct.TYPE_5__** %3, align 8
%12 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i32 0, i32 0
%13 = load i32, i32* %12, align 8
br label %19
14: ; preds = %1
%15 = load %struct.TYPE_6__*, %struct.TYPE_6__** @obs, align 8
%16 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %15, i32 0, i32 0
%17 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %16, i32 0, i32 0
%18 = load i32, i32* %17, align 4
br label %19
19: ; preds = %14, %10
%20 = phi i32 [ %13, %10 ], [ %18, %14 ]
ret i32 %20
} | /* BEGIN FUNCTION-DEF scene_getwidth LOC=UNKNOWN VKEY=4891 */
static uint32_t___0 scene_getwidth(void *data )
{
obs_scene_t *scene ;
int tmp ;
unsigned long _TIG_FN_Fe4d_1_scene_getwidth_next ;
{
_TIG_FN_Fe4d_1_scene_getwidth_next = 3UL;
while (1) {
switch (_TIG_FN_Fe4d_1_scene_getwidth_next) {
case 4UL: ;
if (scene->custom_size) {
_TIG_FN_Fe4d_1_scene_getwidth_next = 1UL;
} else {
_TIG_FN_Fe4d_1_scene_getwidth_next = 2UL;
}
break;
case 1UL:
#line 53 "/tmp/forklift_obfu_2kc8aicb/input.c"
tmp = scene->cx;
_TIG_FN_Fe4d_1_scene_getwidth_next = 0UL;
break;
case 3UL:
#line 52
scene = (obs_scene_t *)data;
_TIG_FN_Fe4d_1_scene_getwidth_next = 4UL;
break;
case 0UL: ;
return (tmp);
break;
case 2UL:
#line 53
tmp = obs->video.base_width;
_TIG_FN_Fe4d_1_scene_getwidth_next = 0UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF scene_getwidth LOC=UNKNOWN VKEY=4891 */ | 398,340,369 | train_synth_compilable |
arityImpl_1011 | Value *arityImpl_1011(List *closures, Value *arg0) {
Value *rslt0 = protoFnImpl_262(empty_list, arg0);
List *varArgs1 = empty_list;
incRef((Value *)rslt0);
varArgs1 = (List *)listCons((Value *)rslt0, varArgs1);
Value *rslt2 = arityImpl_248(empty_list, (Value *)varArgs1);
dec_and_free((Value *)varArgs1);
incRef(rslt2);
dec_and_free(rslt0);
dec_and_free(rslt2);
return(rslt2);
} | Flatten+EncodeArithmetic | .global arityImpl_1011
.type arityImpl_1011, %function
arityImpl_1011:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
ldr x1, [sp, 16]
bl protoFnImpl_262
str x0, [sp, 40]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 40]
bl incRef
ldr x1, [sp, 48]
ldr x0, [sp, 40]
bl listCons
str x0, [sp, 48]
adrp x0, :got:empty_list
ldr x0, [x0, #:got_lo12:empty_list]
ldr x0, [x0]
ldr x1, [sp, 48]
bl arityImpl_248
str x0, [sp, 56]
ldr x0, [sp, 48]
bl dec_and_free
ldr x0, [sp, 56]
bl incRef
ldr x0, [sp, 40]
bl dec_and_free
ldr x0, [sp, 56]
bl dec_and_free
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global arityImpl_1011
.type arityImpl_1011, %function
arityImpl_1011:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
str xzr, [sp, 80]
.L7:
ldr x0, [sp, 80]
cmp x0, 2
beq .L2
ldr x0, [sp, 80]
cmp x0, 2
bhi .L9
ldr x0, [sp, 80]
cmp x0, 0
beq .L4
ldr x0, [sp, 80]
cmp x0, 1
bne .L9
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
ldr x1, [sp, 16]
bl protoFnImpl_262
str x0, [sp, 72]
ldr x0, [sp, 72]
str x0, [sp, 64]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
str x0, [sp, 56]
ldr x0, [sp, 64]
bl incRef
ldr x1, [sp, 56]
ldr x0, [sp, 64]
bl listCons
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 56]
adrp x0, empty_list
add x0, x0, :lo12:empty_list
ldr x0, [x0]
ldr x1, [sp, 56]
bl arityImpl_248
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 88]
ldr x0, [sp, 56]
bl dec_and_free
ldr x0, [sp, 88]
bl incRef
ldr x0, [sp, 64]
bl dec_and_free
ldr x0, [sp, 88]
bl dec_and_free
mov x0, 2
str x0, [sp, 80]
b .L5
.L4:
mov x0, 1
str x0, [sp, 80]
b .L5
.L2:
ldr x0, [sp, 88]
b .L8
.L9:
nop
.L5:
b .L7
.L8:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size arityImpl_1011, .-arityImpl_1011 | @empty_list = external dso_local global i32*, align 8
define dso_local i32* @arityImpl_1011(i32* %0, i32* %1) {
%3 = alloca i32*, align 8
%4 = alloca i32*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32*, align 8
%7 = alloca i32*, align 8
store i32* %0, i32** %3, align 8
store i32* %1, i32** %4, align 8
%8 = load i32*, i32** @empty_list, align 8
%9 = load i32*, i32** %4, align 8
%10 = call i32* @protoFnImpl_262(i32* %8, i32* %9)
store i32* %10, i32** %5, align 8
%11 = load i32*, i32** @empty_list, align 8
store i32* %11, i32** %6, align 8
%12 = load i32*, i32** %5, align 8
%13 = call i32 @incRef(i32* %12)
%14 = load i32*, i32** %5, align 8
%15 = load i32*, i32** %6, align 8
%16 = call i64 @listCons(i32* %14, i32* %15)
%17 = inttoptr i64 %16 to i32*
store i32* %17, i32** %6, align 8
%18 = load i32*, i32** @empty_list, align 8
%19 = load i32*, i32** %6, align 8
%20 = call i32* @arityImpl_248(i32* %18, i32* %19)
store i32* %20, i32** %7, align 8
%21 = load i32*, i32** %6, align 8
%22 = call i32 @dec_and_free(i32* %21)
%23 = load i32*, i32** %7, align 8
%24 = call i32 @incRef(i32* %23)
%25 = load i32*, i32** %5, align 8
%26 = call i32 @dec_and_free(i32* %25)
%27 = load i32*, i32** %7, align 8
%28 = call i32 @dec_and_free(i32* %27)
%29 = load i32*, i32** %7, align 8
ret i32* %29
}
declare dso_local i32* @protoFnImpl_262(i32*, i32*)
declare dso_local i32 @incRef(i32*)
declare dso_local i64 @listCons(i32*, i32*)
declare dso_local i32* @arityImpl_248(i32*, i32*)
declare dso_local i32 @dec_and_free(i32*) | /* BEGIN FUNCTION-DEF arityImpl_1011 LOC=UNKNOWN VKEY=4926 */
Value *arityImpl_1011(List *closures , Value *arg0 )
{
Value *rslt0 ;
int *tmp ;
List *varArgs1 ;
scalar_t__ tmp___0 ;
Value *rslt2 ;
int *tmp___1 ;
unsigned long _TIG_FN_vWgu_1_arityImpl_1011_next ;
{
_TIG_FN_vWgu_1_arityImpl_1011_next = 0UL;
while (1) {
switch (_TIG_FN_vWgu_1_arityImpl_1011_next) {
case 1UL:
{
#line 50 "/tmp/forklift_obfu_ugplvmfx/input.c"
tmp = protoFnImpl_262(empty_list, arg0);
#line 50
rslt0 = tmp;
#line 51
varArgs1 = empty_list;
#line 52
incRef(rslt0);
#line 53
tmp___0 = listCons(rslt0, varArgs1);
#line 53
varArgs1 = (List *)tmp___0;
#line 54
tmp___1 = arityImpl_248(empty_list, varArgs1);
#line 54
rslt2 = tmp___1;
#line 55
dec_and_free(varArgs1);
#line 56
incRef(rslt2);
#line 57
dec_and_free(rslt0);
#line 58
dec_and_free(rslt2);
}
_TIG_FN_vWgu_1_arityImpl_1011_next = 2UL;
break;
case 0UL: ;
_TIG_FN_vWgu_1_arityImpl_1011_next = 1UL;
break;
case 2UL: ;
return (rslt2);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF arityImpl_1011 LOC=UNKNOWN VKEY=4926 */ | 924,765,563 | train_synth_compilable |
pwr_fbif_transcfg_mem_type_physical_f | static inline u32 pwr_fbif_transcfg_mem_type_physical_f(void)
{
return 0x4;
} | Flatten | .global pwr_fbif_transcfg_mem_type_physical_f
.type pwr_fbif_transcfg_mem_type_physical_f, %function
pwr_fbif_transcfg_mem_type_physical_f:
.LFB0:
.cfi_startproc
mov w0, 4
ret
.cfi_endproc
| .global pwr_fbif_transcfg_mem_type_physical_f
.type pwr_fbif_transcfg_mem_type_physical_f, %function
pwr_fbif_transcfg_mem_type_physical_f:
.LFB5:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str xzr, [sp, 8]
.L10:
ldr x0, [sp, 8]
cmp x0, 0
bne .L13
mov w0, 4
b .L12
.L13:
nop
b .L10
.L12:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size pwr_fbif_transcfg_mem_type_physical_f, .-pwr_fbif_transcfg_mem_type_physical_f | define dso_local i32 @pwr_fbif_transcfg_mem_type_physical_f() {
ret i32 4
} | /* BEGIN FUNCTION-DEF pwr_fbif_transcfg_mem_type_physical_f LOC=UNKNOWN VKEY=4879 */
u32 pwr_fbif_transcfg_mem_type_physical_f(void)
{
unsigned long _TIG_FN_wJWq_1_pwr_fbif_transcfg_mem_type_physical_f_next ;
{
{
_TIG_FN_wJWq_1_pwr_fbif_transcfg_mem_type_physical_f_next = 0UL;
}
while (1) {
switch (_TIG_FN_wJWq_1_pwr_fbif_transcfg_mem_type_physical_f_next) {
case 0UL: ;
return (0x4);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pwr_fbif_transcfg_mem_type_physical_f LOC=UNKNOWN VKEY=4879 */ | 1,973,214,822 | train_synth_compilable |
pwr_fbif_transcfg_mem_type_physical_f | static inline u32 pwr_fbif_transcfg_mem_type_physical_f(void)
{
return 0x4;
} | EncodeArithmetic | .global pwr_fbif_transcfg_mem_type_physical_f
.type pwr_fbif_transcfg_mem_type_physical_f, %function
pwr_fbif_transcfg_mem_type_physical_f:
.LFB0:
.cfi_startproc
mov w0, 4
ret
.cfi_endproc
| .global pwr_fbif_transcfg_mem_type_physical_f
.type pwr_fbif_transcfg_mem_type_physical_f, %function
pwr_fbif_transcfg_mem_type_physical_f:
.LFB5:
.cfi_startproc
mov w0, 4
ret
.cfi_endproc
.LFE5:
.size pwr_fbif_transcfg_mem_type_physical_f, .-pwr_fbif_transcfg_mem_type_physical_f | define dso_local i32 @pwr_fbif_transcfg_mem_type_physical_f() {
ret i32 4
} | /* BEGIN FUNCTION-DEF pwr_fbif_transcfg_mem_type_physical_f LOC=UNKNOWN VKEY=4879 */
u32 pwr_fbif_transcfg_mem_type_physical_f(void)
{
{
#line 44 "/tmp/forklift_obfu_57mfqhwk/input.c"
return (0x4);
}
}
/* END FUNCTION-DEF pwr_fbif_transcfg_mem_type_physical_f LOC=UNKNOWN VKEY=4879 */ | 536,124,280 | train_synth_compilable |
pwr_fbif_transcfg_mem_type_physical_f | static inline u32 pwr_fbif_transcfg_mem_type_physical_f(void)
{
return 0x4;
} | Flatten+EncodeArithmetic | .global pwr_fbif_transcfg_mem_type_physical_f
.type pwr_fbif_transcfg_mem_type_physical_f, %function
pwr_fbif_transcfg_mem_type_physical_f:
.LFB0:
.cfi_startproc
mov w0, 4
ret
.cfi_endproc
| .global pwr_fbif_transcfg_mem_type_physical_f
.type pwr_fbif_transcfg_mem_type_physical_f, %function
pwr_fbif_transcfg_mem_type_physical_f:
.LFB4:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str xzr, [sp, 8]
.L10:
ldr x0, [sp, 8]
cmp x0, 0
bne .L13
mov w0, 4
b .L12
.L13:
nop
b .L10
.L12:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size pwr_fbif_transcfg_mem_type_physical_f, .-pwr_fbif_transcfg_mem_type_physical_f | define dso_local i32 @pwr_fbif_transcfg_mem_type_physical_f() {
ret i32 4
} | /* BEGIN FUNCTION-DEF pwr_fbif_transcfg_mem_type_physical_f LOC=UNKNOWN VKEY=4882 */
u32 pwr_fbif_transcfg_mem_type_physical_f(void)
{
unsigned long _TIG_FN_IyHC_1_pwr_fbif_transcfg_mem_type_physical_f_next ;
{
_TIG_FN_IyHC_1_pwr_fbif_transcfg_mem_type_physical_f_next = 0UL;
while (1) {
switch (_TIG_FN_IyHC_1_pwr_fbif_transcfg_mem_type_physical_f_next) {
case 0UL: ;
return (0x4);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pwr_fbif_transcfg_mem_type_physical_f LOC=UNKNOWN VKEY=4882 */ | 1,625,792,787 | train_synth_compilable |
VmJsonEncode | static sxi32 VmJsonEncode(
vedis_value *pIn,
json_private_data *pData
){
SyBlob *pOut = pData->pOut;
int nByte;
if( vedis_value_is_null(pIn) ){
SyBlobAppend(pOut, "null", sizeof("null")-1);
}else if( vedis_value_is_bool(pIn) ){
int iBool = vedis_value_to_bool(pIn);
sxu32 iLen;
iLen = iBool ? sizeof("true") : sizeof("false");
SyBlobAppend(pOut, iBool ? "true" : "false", iLen-1);
}else if( vedis_value_is_numeric(pIn) && !vedis_value_is_string(pIn) ){
const char *zNum;
zNum = vedis_value_to_string(pIn, &nByte);
SyBlobAppend(pOut,zNum,nByte);
}else if( vedis_value_is_string(pIn) ){
const char *zIn, *zEnd;
int c;
zIn = vedis_value_to_string(pIn, &nByte);
zEnd = &zIn[nByte];
SyBlobAppend(pOut,"\"", sizeof(char));
for(;;){
if( zIn >= zEnd ){
break;
}
c = zIn[0];
zIn++;
if( c == '"' || c == '\\' ){
SyBlobAppend(pOut,"\\", sizeof(char));
}
SyBlobAppend(pOut,(const char *)&c,sizeof(char));
}
SyBlobAppend(pOut,"\"",sizeof(char));
}else if( vedis_value_is_array(pIn) ){
pData->isFirst = 1;
SyBlobAppend(pOut,"[",sizeof(char));
vedis_array_walk(pIn, VmJsonArrayEncode, pData);
SyBlobAppend(pOut,"]",sizeof(char));
}else{
SyBlobAppend(pOut,"null",sizeof("null")-1);
}
return 0;
} | EncodeArithmetic | .global VmJsonEncode
.type VmJsonEncode, %function
VmJsonEncode:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1,0
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 64]
ldr x0, [sp, 24]
bl vedis_value_is_null
cmp x0, 0
beq .L2
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L2:
ldr x0, [sp, 24]
bl vedis_value_is_bool
cmp x0, 0
beq .L4
ldr x0, [sp, 24]
bl vedis_value_to_bool
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L5
mov w0, 5
b .L6
.L5:
mov w0, 6
.L6:
str w0, [sp, 52]
ldr w0, [sp, 48]
cmp w0, 0
beq .L7
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L8
.L7:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
.L8:
ldr w1, [sp, 52]
sub w1, w1, #1
mov w2, w1
mov x1, x0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L4:
ldr x0, [sp, 24]
bl vedis_value_is_numeric
cmp x0, 0
beq .L9
ldr x0, [sp, 24]
bl vedis_value_is_string
cmp x0, 0
bne .L9
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 72]
ldr w0, [sp, 40]
mov w2, w0
ldr x1, [sp, 72]
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L9:
ldr x0, [sp, 24]
bl vedis_value_is_string
cmp x0, 0
beq .L10
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 56]
ldr w0, [sp, 40]
sxtw x0, w0
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 80]
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 64]
bl SyBlobAppend
.L15:
ldr x1, [sp, 56]
ldr x0, [sp, 80]
cmp x1, x0
bcs .L20
ldr x0, [sp, 56]
ldrb w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
ldr w0, [sp, 44]
cmp w0, 34
beq .L13
ldr w0, [sp, 44]
cmp w0, 92
bne .L14
.L13:
mov w2, 1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 64]
bl SyBlobAppend
.L14:
add x0, sp, 44
mov w2, 1
mov x1, x0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L15
.L20:
nop
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L10:
ldr x0, [sp, 24]
bl vedis_value_is_array
cmp x0, 0
beq .L16
ldr x0, [sp, 16]
mov w1, 1
str w1, [x0]
mov w2, 1
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 64]
bl SyBlobAppend
adrp x0, :got:VmJsonArrayEncode
ldr x0, [x0, #:got_lo12:VmJsonArrayEncode]
ldr w0, [x0]
ldr x2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl vedis_array_walk
mov w2, 1
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L16:
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 64]
bl SyBlobAppend
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x3, [x0]
subs x2, x2, x3
mov x3, 0
beq .L18
bl __stack_chk_fail
.L18:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC4: .string "\\"
.LC2: .string "false"
.LC3: .string "\""
.LC5: .string "["
.LC6: .string "]"
.LC1: .string "true"
.LC0: .string "null"
| .global VmJsonEncode
.type VmJsonEncode, %function
VmJsonEncode:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 128]
ldr x0, [sp, 24]
bl vedis_value_is_null
str x0, [sp, 120]
ldr x0, [sp, 120]
cmp x0, 0
beq .L2
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 128]
bl SyBlobAppend
b .L3
.L2:
ldr x0, [sp, 24]
bl vedis_value_is_bool
str x0, [sp, 112]
ldr x0, [sp, 112]
cmp x0, 0
beq .L4
ldr x0, [sp, 24]
bl vedis_value_to_bool
str w0, [sp, 44]
ldr w0, [sp, 44]
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
beq .L5
mov w0, 5
str w0, [sp, 156]
b .L6
.L5:
mov w0, 6
str w0, [sp, 156]
.L6:
ldr w0, [sp, 40]
cmp w0, 0
beq .L7
adrp x0, .LC1
add x0, x0, :lo12:.LC1
str x0, [sp, 144]
b .L8
.L7:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
str x0, [sp, 144]
.L8:
ldr w0, [sp, 156]
and w1, w0, -2
ldr w0, [sp, 156]
mvn w0, w0
and w0, w0, 1
sub w0, w1, w0
mov w2, w0
ldr x1, [sp, 144]
ldr x0, [sp, 128]
bl SyBlobAppend
b .L3
.L4:
ldr x0, [sp, 24]
bl vedis_value_is_numeric
str x0, [sp, 104]
ldr x0, [sp, 104]
cmp x0, 0
beq .L18
ldr x0, [sp, 24]
bl vedis_value_is_string
str x0, [sp, 96]
ldr x0, [sp, 96]
cmp x0, 0
bne .L19
add x0, sp, 36
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 88]
ldr x0, [sp, 88]
str x0, [sp, 80]
ldr w0, [sp, 36]
mov w2, w0
ldr x1, [sp, 80]
ldr x0, [sp, 128]
bl SyBlobAppend
b .L3
.L18:
nop
b .L9
.L19:
nop
.L9:
ldr x0, [sp, 24]
bl vedis_value_is_string
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
beq .L11
add x0, sp, 36
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 56]
ldr x0, [sp, 56]
str x0, [sp, 136]
ldr w0, [sp, 36]
sxtw x0, w0
ldr x1, [sp, 136]
add x0, x1, x0
str x0, [sp, 48]
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 128]
bl SyBlobAppend
b .L12
.L15:
ldr x0, [sp, 136]
ldrb w0, [x0]
str w0, [sp, 32]
ldr x0, [sp, 136]
add x0, x0, 1
str x0, [sp, 136]
ldr w0, [sp, 32]
sub w1, w0, #34
ldr w0, [sp, 32]
mov w2, 34
sub w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L13
mov w2, 1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 128]
bl SyBlobAppend
b .L14
.L13:
ldr w0, [sp, 32]
mov w1, w0
mov w0, 65444
movk w0, 0x7fff, lsl 16
add w0, w1, w0
mov w1, w0
ldr w0, [sp, 32]
mov w2, w0
mov w0, 65444
movk w0, 0x7fff, lsl 16
add w0, w2, w0
asr w0, w0, 31
eor w0, w1, w0
ldr w1, [sp, 32]
mov w2, w1
mov w1, 65444
movk w1, 0x7fff, lsl 16
add w1, w2, w1
lsr w1, w1, 31
add w0, w0, w1
cmp w0, 0
bge .L14
mov w2, 1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 128]
bl SyBlobAppend
.L14:
add x0, sp, 32
mov w2, 1
mov x1, x0
ldr x0, [sp, 128]
bl SyBlobAppend
.L12:
ldr x1, [sp, 48]
ldr x0, [sp, 136]
cmp x1, x0
bhi .L15
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 128]
bl SyBlobAppend
b .L3
.L11:
ldr x0, [sp, 24]
bl vedis_value_is_array
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
beq .L16
ldr x0, [sp, 16]
mov w1, 1
str w1, [x0]
mov w2, 1
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 128]
bl SyBlobAppend
adrp x0, VmJsonArrayEncode
add x0, x0, :lo12:VmJsonArrayEncode
ldr w0, [x0]
ldr x2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl vedis_array_walk
mov w2, 1
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 128]
bl SyBlobAppend
b .L3
.L16:
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 128]
bl SyBlobAppend
.L3:
mov w0, 0
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size VmJsonEncode, .-VmJsonEncode | %struct.TYPE_4__ = type { i32, i32* }
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@VmJsonArrayEncode = external dso_local global i32, align 4
@.str.6 = external hidden unnamed_addr constant [2 x i8], align 1
define dso_local i32 @VmJsonEncode(i32* %0, %struct.TYPE_4__* %1) {
%3 = alloca i32*, align 8
%4 = alloca %struct.TYPE_4__*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca i8*, align 8
%10 = alloca i8*, align 8
%11 = alloca i8*, align 8
%12 = alloca i32, align 4
store i32* %0, i32** %3, align 8
store %struct.TYPE_4__* %1, %struct.TYPE_4__** %4, align 8
%13 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%14 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %13, i32 0, i32 1
%15 = load i32*, i32** %14, align 8
store i32* %15, i32** %5, align 8
%16 = load i32*, i32** %3, align 8
%17 = call i64 @vedis_value_is_null(i32* %16)
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %2
%20 = load i32*, i32** %5, align 8
%21 = call i32 @SyBlobAppend(i32* %20, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
br label %119
22: ; preds = %2
%23 = load i32*, i32** %3, align 8
%24 = call i64 @vedis_value_is_bool(i32* %23)
%25 = icmp ne i64 %24, 0
br i1 %25, label %26, label %42
26: ; preds = %22
%27 = load i32*, i32** %3, align 8
%28 = call i32 @vedis_value_to_bool(i32* %27)
store i32 %28, i32* %7, align 4
%29 = load i32, i32* %7, align 4
%30 = icmp ne i32 %29, 0
%31 = zext i1 %30 to i64
%32 = select i1 %30, i64 5, i64 6
%33 = trunc i64 %32 to i32
store i32 %33, i32* %8, align 4
%34 = load i32*, i32** %5, align 8
%35 = load i32, i32* %7, align 4
%36 = icmp ne i32 %35, 0
%37 = zext i1 %36 to i64
%38 = select i1 %36, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%39 = load i32, i32* %8, align 4
%40 = sub nsw i32 %39, 1
%41 = call i32 @SyBlobAppend(i32* %34, i8* %38, i32 %40)
br label %118
42: ; preds = %22
%43 = load i32*, i32** %3, align 8
%44 = call i64 @vedis_value_is_numeric(i32* %43)
%45 = icmp ne i64 %44, 0
br i1 %45, label %46, label %57
46: ; preds = %42
%47 = load i32*, i32** %3, align 8
%48 = call i64 @vedis_value_is_string(i32* %47)
%49 = icmp ne i64 %48, 0
br i1 %49, label %57, label %50
50: ; preds = %46
%51 = load i32*, i32** %3, align 8
%52 = call i8* @vedis_value_to_string(i32* %51, i32* %6)
store i8* %52, i8** %9, align 8
%53 = load i32*, i32** %5, align 8
%54 = load i8*, i8** %9, align 8
%55 = load i32, i32* %6, align 4
%56 = call i32 @SyBlobAppend(i32* %53, i8* %54, i32 %55)
br label %117
57: ; preds = %46, %42
%58 = load i32*, i32** %3, align 8
%59 = call i64 @vedis_value_is_string(i32* %58)
%60 = icmp ne i64 %59, 0
br i1 %60, label %61, label %97
61: ; preds = %57
%62 = load i32*, i32** %3, align 8
%63 = call i8* @vedis_value_to_string(i32* %62, i32* %6)
store i8* %63, i8** %10, align 8
%64 = load i8*, i8** %10, align 8
%65 = load i32, i32* %6, align 4
%66 = sext i32 %65 to i64
%67 = getelementptr inbounds i8, i8* %64, i64 %66
store i8* %67, i8** %11, align 8
%68 = load i32*, i32** %5, align 8
%69 = call i32 @SyBlobAppend(i32* %68, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 1)
br label %70
70: ; preds = %90, %61
%71 = load i8*, i8** %10, align 8
%72 = load i8*, i8** %11, align 8
%73 = icmp uge i8* %71, %72
br i1 %73, label %74, label %75
74: ; preds = %70
br label %94
75: ; preds = %70
%76 = load i8*, i8** %10, align 8
%77 = getelementptr inbounds i8, i8* %76, i64 0
%78 = load i8, i8* %77, align 1
%79 = sext i8 %78 to i32
store i32 %79, i32* %12, align 4
%80 = load i8*, i8** %10, align 8
%81 = getelementptr inbounds i8, i8* %80, i32 1
store i8* %81, i8** %10, align 8
%82 = load i32, i32* %12, align 4
%83 = icmp eq i32 %82, 34
br i1 %83, label %87, label %84
84: ; preds = %75
%85 = load i32, i32* %12, align 4
%86 = icmp eq i32 %85, 92
br i1 %86, label %87, label %90
87: ; preds = %84, %75
%88 = load i32*, i32** %5, align 8
%89 = call i32 @SyBlobAppend(i32* %88, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.4, i64 0, i64 0), i32 1)
br label %90
90: ; preds = %87, %84
%91 = load i32*, i32** %5, align 8
%92 = bitcast i32* %12 to i8*
%93 = call i32 @SyBlobAppend(i32* %91, i8* %92, i32 1)
br label %70
94: ; preds = %74
%95 = load i32*, i32** %5, align 8
%96 = call i32 @SyBlobAppend(i32* %95, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 1)
br label %116
97: ; preds = %57
%98 = load i32*, i32** %3, align 8
%99 = call i64 @vedis_value_is_array(i32* %98)
%100 = icmp ne i64 %99, 0
br i1 %100, label %101, label %112
101: ; preds = %97
%102 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%103 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %102, i32 0, i32 0
store i32 1, i32* %103, align 8
%104 = load i32*, i32** %5, align 8
%105 = call i32 @SyBlobAppend(i32* %104, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.5, i64 0, i64 0), i32 1)
%106 = load i32*, i32** %3, align 8
%107 = load i32, i32* @VmJsonArrayEncode, align 4
%108 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%109 = call i32 @vedis_array_walk(i32* %106, i32 %107, %struct.TYPE_4__* %108)
%110 = load i32*, i32** %5, align 8
%111 = call i32 @SyBlobAppend(i32* %110, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.6, i64 0, i64 0), i32 1)
br label %115
112: ; preds = %97
%113 = load i32*, i32** %5, align 8
%114 = call i32 @SyBlobAppend(i32* %113, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
br label %115
115: ; preds = %112, %101
br label %116
116: ; preds = %115, %94
br label %117
117: ; preds = %116, %50
br label %118
118: ; preds = %117, %26
br label %119
119: ; preds = %118, %19
ret i32 0
}
declare dso_local i64 @vedis_value_is_null(i32*)
declare dso_local i32 @SyBlobAppend(i32*, i8*, i32)
declare dso_local i64 @vedis_value_is_bool(i32*)
declare dso_local i32 @vedis_value_to_bool(i32*)
declare dso_local i64 @vedis_value_is_numeric(i32*)
declare dso_local i64 @vedis_value_is_string(i32*)
declare dso_local i8* @vedis_value_to_string(i32*, i32*)
declare dso_local i64 @vedis_value_is_array(i32*)
declare dso_local i32 @vedis_array_walk(i32*, i32, %struct.TYPE_4__*) | /* BEGIN FUNCTION-DEF VmJsonEncode LOC=UNKNOWN VKEY=4950 */
static sxi32 VmJsonEncode(vedis_value *pIn , json_private_data *pData )
{
SyBlob *pOut ;
int nByte ;
int iBool ;
int tmp ;
sxu32 iLen ;
char *tmp___0 ;
char const *zNum ;
char *tmp___1 ;
char const *zIn ;
char const *zEnd ;
int c ;
char *tmp___2 ;
scalar_t__ tmp___3 ;
scalar_t__ tmp___4 ;
scalar_t__ tmp___5 ;
scalar_t__ tmp___6 ;
scalar_t__ tmp___7 ;
scalar_t__ tmp___8 ;
{
{
#line 62 "/tmp/forklift_obfu__pwhsle6/input.c"
pOut = pData->pOut;
#line 64
tmp___8 = vedis_value_is_null(pIn);
}
#line 64
if (tmp___8) {
#line 66
SyBlobAppend(pOut, (char const *)"null", (int )(sizeof("null") - 1UL));
} else {
#line 67
tmp___7 = vedis_value_is_bool(pIn);
#line 67
if (tmp___7) {
{
#line 68
tmp = vedis_value_to_bool(pIn);
#line 68
iBool = tmp;
}
#line 71
if (iBool) {
#line 71
iLen = (sxu32 )sizeof("true");
} else {
#line 71
iLen = (sxu32 )sizeof("false");
}
#line 72
if (iBool) {
#line 72
tmp___0 = "true";
} else {
#line 72
tmp___0 = "false";
}
#line 72
SyBlobAppend(pOut, (char const *)tmp___0, (iLen & ~ 1) - (~ iLen & 1));
} else {
#line 73
tmp___5 = vedis_value_is_numeric(pIn);
#line 73
if (tmp___5) {
#line 73
tmp___6 = vedis_value_is_string(pIn);
#line 73
if (tmp___6) {
#line 73
goto _L;
} else {
{
#line 76
tmp___1 = vedis_value_to_string(pIn, & nByte);
#line 76
zNum = (char const *)tmp___1;
#line 77
SyBlobAppend(pOut, zNum, nByte);
}
}
} else {
_L: /* CIL Label */
#line 78
tmp___4 = vedis_value_is_string(pIn);
#line 78
if (tmp___4) {
{
#line 82
tmp___2 = vedis_value_to_string(pIn, & nByte);
#line 82
zIn = (char const *)tmp___2;
#line 83
zEnd = zIn + nByte;
#line 85
SyBlobAppend(pOut, (char const *)"\"", (int )sizeof(char ));
}
#line 86
while (! ((unsigned long )zEnd <= (unsigned long )zIn)) {
{
#line 91
c = (int )*(zIn + 0);
#line 93
zIn ++;
}
#line 94
if (((unsigned int )(~ ((c - 34) | (34 - c))) >> 31U) & 1) {
#line 96
SyBlobAppend(pOut, (char const *)"\\", (int )sizeof(char ));
} else
#line 94
if (((unsigned int )((((c - 92) + (1 << 31)) ^ (((c - 92) + (1 << 31)) >> 31)) - (((c - 92) + (1 << 31)) >> 31)) >> 31U) & 1) {
#line 96
SyBlobAppend(pOut, (char const *)"\\", (int )sizeof(char ));
}
#line 99
SyBlobAppend(pOut, (char const *)(& c), (int )sizeof(char ));
}
#line 102
SyBlobAppend(pOut, (char const *)"\"", (int )sizeof(char ));
} else {
#line 103
tmp___3 = vedis_value_is_array(pIn);
#line 103
if (tmp___3) {
{
#line 105
pData->isFirst = 1;
#line 107
SyBlobAppend(pOut, (char const *)"[", (int )sizeof(char ));
#line 109
vedis_array_walk(pIn, VmJsonArrayEncode, pData);
#line 111
SyBlobAppend(pOut, (char const *)"]", (int )sizeof(char ));
}
} else {
#line 114
SyBlobAppend(pOut, (char const *)"null", (int )(sizeof("null") - 1UL));
}
}
}
}
}
#line 117
return (0);
}
}
/* END FUNCTION-DEF VmJsonEncode LOC=UNKNOWN VKEY=4950 */ | 1,947,382,419 | train_synth_compilable |
pinion_on_reset | static void pinion_on_reset(uint16_t vec) {
switch (vec & 0x7F) {
case 0:
if (has_pagefault()) {
interrupt_vector_fire(vec);
}
break;
case 1:
if (has_miscfault()) {
interrupt_vector_fire(vec);
}
break;
case 2:
if (has_zombie()) {
interrupt_vector_fire(vec);
}
break;
}
} | EncodeArithmetic | .global pinion_on_reset
.type pinion_on_reset, %function
pinion_on_reset:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
and w0, w0, 127
cmp w0, 2
beq .L2
cmp w0, 2
bgt .L9
cmp w0, 0
beq .L4
cmp w0, 1
beq .L5
b .L9
.L4:
bl has_pagefault
cmp w0, 0
beq .L10
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L10
.L5:
bl has_miscfault
cmp w0, 0
beq .L11
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L11
.L2:
bl has_zombie
cmp w0, 0
beq .L12
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L12
.L10:
nop
b .L9
.L11:
nop
b .L9
.L12:
nop
.L9:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global pinion_on_reset
.type pinion_on_reset, %function
pinion_on_reset:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
mvn w0, w0
orr w1, w0, 127
ldr w0, [sp, 28]
add w0, w1, w0
add w0, w0, 1
cmp w0, 2
beq .L2
cmp w0, 2
bgt .L10
cmp w0, 0
beq .L4
cmp w0, 1
beq .L5
b .L10
.L4:
bl has_pagefault
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
beq .L11
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L11
.L5:
bl has_miscfault
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
beq .L12
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L12
.L2:
bl has_zombie
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
beq .L13
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L13
.L11:
nop
b .L3
.L12:
nop
b .L3
.L13:
nop
.L3:
nop
.L10:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size pinion_on_reset, .-pinion_on_reset | define dso_local void @pinion_on_reset(i32 %0) {
%2 = alloca i32, align 4
store i32 %0, i32* %2, align 4
%3 = load i32, i32* %2, align 4
%4 = and i32 %3, 127
switch i32 %4, label %26 [
i32 0, label %5
i32 1, label %12
i32 2, label %19
]
5: ; preds = %1
%6 = call i32 (...) @has_pagefault()
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2, align 4
%10 = call i32 @interrupt_vector_fire(i32 %9)
br label %11
11: ; preds = %8, %5
br label %26
12: ; preds = %1
%13 = call i32 (...) @has_miscfault()
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2, align 4
%17 = call i32 @interrupt_vector_fire(i32 %16)
br label %18
18: ; preds = %15, %12
br label %26
19: ; preds = %1
%20 = call i32 (...) @has_zombie()
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %2, align 4
%24 = call i32 @interrupt_vector_fire(i32 %23)
br label %25
25: ; preds = %22, %19
br label %26
26: ; preds = %25, %18, %11, %1
ret void
}
declare dso_local i32 @has_pagefault(...)
declare dso_local i32 @interrupt_vector_fire(i32)
declare dso_local i32 @has_miscfault(...)
declare dso_local i32 @has_zombie(...) | /* BEGIN FUNCTION-DEF pinion_on_reset LOC=UNKNOWN VKEY=4892 */
static void pinion_on_reset(uint16_t___0 vec )
{
int tmp ;
int tmp___0 ;
int tmp___1 ;
{
#line 48
switch (((~ vec | 0x7F) + vec) + 1) {
case 0:
#line 50 "/tmp/forklift_obfu_i8nnptdf/input.c"
tmp = has_pagefault();
#line 50
if (tmp) {
#line 51
interrupt_vector_fire(vec);
}
#line 53
break;
case 1:
#line 55
tmp___0 = has_miscfault();
#line 55
if (tmp___0) {
#line 56
interrupt_vector_fire(vec);
}
#line 58
break;
case 2:
#line 60
tmp___1 = has_zombie();
#line 60
if (tmp___1) {
#line 61
interrupt_vector_fire(vec);
}
#line 63
break;
}
#line 65
return;
}
}
/* END FUNCTION-DEF pinion_on_reset LOC=UNKNOWN VKEY=4892 */ | 1,589,915,144 | train_synth_compilable |
pinion_on_reset | static void pinion_on_reset(uint16_t vec) {
switch (vec & 0x7F) {
case 0:
if (has_pagefault()) {
interrupt_vector_fire(vec);
}
break;
case 1:
if (has_miscfault()) {
interrupt_vector_fire(vec);
}
break;
case 2:
if (has_zombie()) {
interrupt_vector_fire(vec);
}
break;
}
} | Flatten | .global pinion_on_reset
.type pinion_on_reset, %function
pinion_on_reset:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
and w0, w0, 127
cmp w0, 2
beq .L2
cmp w0, 2
bgt .L9
cmp w0, 0
beq .L4
cmp w0, 1
beq .L5
b .L9
.L4:
bl has_pagefault
cmp w0, 0
beq .L10
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L10
.L5:
bl has_miscfault
cmp w0, 0
beq .L11
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L11
.L2:
bl has_zombie
cmp w0, 0
beq .L12
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L12
.L10:
nop
b .L9
.L11:
nop
b .L9
.L12:
nop
.L9:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global pinion_on_reset
.type pinion_on_reset, %function
pinion_on_reset:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
mov x0, 2
str x0, [sp, 40]
.L28:
ldr x0, [sp, 40]
cmp x0, 13
beq .L2
ldr x0, [sp, 40]
cmp x0, 13
bhi .L29
ldr x0, [sp, 40]
cmp x0, 12
beq .L4
ldr x0, [sp, 40]
cmp x0, 12
bhi .L29
ldr x0, [sp, 40]
cmp x0, 10
beq .L5
ldr x0, [sp, 40]
cmp x0, 10
bhi .L29
ldr x0, [sp, 40]
cmp x0, 9
beq .L6
ldr x0, [sp, 40]
cmp x0, 9
bhi .L29
ldr x0, [sp, 40]
cmp x0, 8
beq .L7
ldr x0, [sp, 40]
cmp x0, 8
bhi .L29
ldr x0, [sp, 40]
cmp x0, 7
beq .L8
ldr x0, [sp, 40]
cmp x0, 7
bhi .L29
ldr x0, [sp, 40]
cmp x0, 6
beq .L9
ldr x0, [sp, 40]
cmp x0, 6
bhi .L29
ldr x0, [sp, 40]
cmp x0, 5
beq .L10
ldr x0, [sp, 40]
cmp x0, 5
bhi .L29
ldr x0, [sp, 40]
cmp x0, 4
beq .L30
ldr x0, [sp, 40]
cmp x0, 4
bhi .L29
ldr x0, [sp, 40]
cmp x0, 3
beq .L12
ldr x0, [sp, 40]
cmp x0, 3
bhi .L29
ldr x0, [sp, 40]
cmp x0, 1
beq .L13
ldr x0, [sp, 40]
cmp x0, 2
beq .L14
b .L29
.L4:
ldr w0, [sp, 28]
bl interrupt_vector_fire
mov x0, 4
str x0, [sp, 40]
b .L16
.L7:
ldr w0, [sp, 56]
cmp w0, 0
beq .L17
mov x0, 10
str x0, [sp, 40]
b .L16
.L17:
mov x0, 4
str x0, [sp, 40]
b .L16
.L13:
ldr w0, [sp, 60]
cmp w0, 0
beq .L19
mov x0, 3
str x0, [sp, 40]
b .L16
.L19:
mov x0, 4
str x0, [sp, 40]
b .L16
.L12:
ldr w0, [sp, 28]
bl interrupt_vector_fire
mov x0, 4
str x0, [sp, 40]
b .L16
.L6:
bl has_miscfault
str w0, [sp, 56]
mov x0, 8
str x0, [sp, 40]
b .L16
.L2:
ldr w0, [sp, 52]
cmp w0, 0
beq .L21
mov x0, 12
str x0, [sp, 40]
b .L16
.L21:
mov x0, 4
str x0, [sp, 40]
b .L16
.L9:
mov x0, 4
str x0, [sp, 40]
b .L16
.L10:
bl has_zombie
str w0, [sp, 52]
mov x0, 13
str x0, [sp, 40]
b .L16
.L5:
ldr w0, [sp, 28]
bl interrupt_vector_fire
mov x0, 4
str x0, [sp, 40]
b .L16
.L8:
bl has_pagefault
str w0, [sp, 60]
mov x0, 1
str x0, [sp, 40]
b .L16
.L14:
ldr w0, [sp, 28]
and w0, w0, 127
cmp w0, 2
beq .L23
cmp w0, 2
bgt .L24
cmp w0, 0
beq .L25
cmp w0, 1
beq .L26
b .L24
.L23:
mov x0, 5
str x0, [sp, 40]
b .L27
.L26:
mov x0, 9
str x0, [sp, 40]
b .L27
.L25:
mov x0, 7
str x0, [sp, 40]
b .L27
.L24:
mov x0, 6
str x0, [sp, 40]
nop
.L27:
b .L16
.L29:
nop
.L16:
b .L28
.L30:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size pinion_on_reset, .-pinion_on_reset | define dso_local void @pinion_on_reset(i32 %0) {
%2 = alloca i32, align 4
store i32 %0, i32* %2, align 4
%3 = load i32, i32* %2, align 4
%4 = and i32 %3, 127
switch i32 %4, label %26 [
i32 0, label %5
i32 1, label %12
i32 2, label %19
]
5: ; preds = %1
%6 = call i32 (...) @has_pagefault()
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2, align 4
%10 = call i32 @interrupt_vector_fire(i32 %9)
br label %11
11: ; preds = %8, %5
br label %26
12: ; preds = %1
%13 = call i32 (...) @has_miscfault()
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2, align 4
%17 = call i32 @interrupt_vector_fire(i32 %16)
br label %18
18: ; preds = %15, %12
br label %26
19: ; preds = %1
%20 = call i32 (...) @has_zombie()
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %2, align 4
%24 = call i32 @interrupt_vector_fire(i32 %23)
br label %25
25: ; preds = %22, %19
br label %26
26: ; preds = %25, %18, %11, %1
ret void
}
declare dso_local i32 @has_pagefault(...)
declare dso_local i32 @interrupt_vector_fire(i32)
declare dso_local i32 @has_miscfault(...)
declare dso_local i32 @has_zombie(...) | /* BEGIN FUNCTION-DEF pinion_on_reset LOC=UNKNOWN VKEY=4892 */
static void pinion_on_reset(uint16_t___0 vec )
{
int tmp ;
int tmp___0 ;
int tmp___1 ;
unsigned long _TIG_FN_GgoL_1_pinion_on_reset_next ;
{
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 2UL;
}
while (1) {
switch (_TIG_FN_GgoL_1_pinion_on_reset_next) {
case 4UL: ;
return;
break;
case 12UL:
#line 61 "/tmp/forklift_obfu_y5k73tbv/input.c"
interrupt_vector_fire(vec);
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
break;
case 8UL: ;
if (tmp___0) {
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 10UL;
}
} else {
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
}
break;
case 1UL: ;
if (tmp) {
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 3UL;
}
} else {
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
}
break;
case 3UL:
#line 51
interrupt_vector_fire(vec);
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
break;
case 9UL:
#line 55
tmp___0 = has_miscfault();
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 8UL;
}
break;
case 13UL: ;
if (tmp___1) {
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 12UL;
}
} else {
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
}
break;
case 6UL: ;
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
break;
case 5UL:
#line 60
tmp___1 = has_zombie();
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 13UL;
}
break;
case 10UL:
#line 56
interrupt_vector_fire(vec);
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 4UL;
}
break;
case 7UL:
#line 50
tmp = has_pagefault();
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 1UL;
}
break;
case 2UL: ;
switch (vec & 0x7F) {
case 2:
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 5UL;
}
break;
case 1:
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 9UL;
}
break;
case 0:
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 7UL;
}
break;
default:
{
_TIG_FN_GgoL_1_pinion_on_reset_next = 6UL;
}
break;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pinion_on_reset LOC=UNKNOWN VKEY=4892 */ | 698,594,025 | train_synth_compilable |
VIRTUAL_scope__ACallReassignExpr__variable_create | val* VIRTUAL_scope__ACallReassignExpr__variable_create(val* self, val* p0) {
val* var ;
val* var1 ;
var1 = scope__ACallReassignExpr__variable_create(self, p0);
var = var1;
RET_LABEL:;
return var;
} | Flatten | .global VIRTUAL_scope__ACallReassignExpr__variable_create
.type VIRTUAL_scope__ACallReassignExpr__variable_create, %function
VIRTUAL_scope__ACallReassignExpr__variable_create:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl scope__ACallReassignExpr__variable_create
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 40]
.L2:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global VIRTUAL_scope__ACallReassignExpr__variable_create
.type VIRTUAL_scope__ACallReassignExpr__variable_create, %function
VIRTUAL_scope__ACallReassignExpr__variable_create:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mov x0, 2
str x0, [sp, 48]
.L15:
ldr x0, [sp, 48]
cmp x0, 3
beq .L8
ldr x0, [sp, 48]
cmp x0, 3
bhi .L17
ldr x0, [sp, 48]
cmp x0, 2
beq .L10
ldr x0, [sp, 48]
cmp x0, 2
bhi .L17
ldr x0, [sp, 48]
cmp x0, 0
beq .L11
ldr x0, [sp, 48]
cmp x0, 1
bne .L17
.L12:
mov x0, 3
str x0, [sp, 48]
b .L13
.L8:
ldr x0, [sp, 56]
b .L16
.L11:
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl scope__ACallReassignExpr__variable_create
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 56]
mov x0, 1
str x0, [sp, 48]
b .L13
.L10:
str xzr, [sp, 48]
b .L13
.L17:
nop
.L13:
b .L15
.L16:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size VIRTUAL_scope__ACallReassignExpr__variable_create, .-VIRTUAL_scope__ACallReassignExpr__variable_create | define dso_local i32* @VIRTUAL_scope__ACallReassignExpr__variable_create(i32* %0, i32* %1) {
%3 = alloca i32*, align 8
%4 = alloca i32*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32*, align 8
store i32* %0, i32** %3, align 8
store i32* %1, i32** %4, align 8
%7 = load i32*, i32** %3, align 8
%8 = load i32*, i32** %4, align 8
%9 = call i32* @scope__ACallReassignExpr__variable_create(i32* %7, i32* %8)
store i32* %9, i32** %6, align 8
%10 = load i32*, i32** %6, align 8
store i32* %10, i32** %5, align 8
br label %11
11: ; preds = %2
%12 = load i32*, i32** %5, align 8
ret i32* %12
}
declare dso_local i32* @scope__ACallReassignExpr__variable_create(i32*, i32*) | /* BEGIN FUNCTION-DEF VIRTUAL_scope__ACallReassignExpr__variable_create LOC=UNKNOWN VKEY=4891 */
val *VIRTUAL_scope__ACallReassignExpr__variable_create(val *self , val *p0 )
{
val *var ;
val *var1 ;
unsigned long _TIG_FN_7143_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next ;
{
{
_TIG_FN_7143_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 2UL;
}
while (1) {
switch (_TIG_FN_7143_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next) {
case 1UL:
RET_LABEL: ;
{
_TIG_FN_7143_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 3UL;
}
break;
case 3UL: ;
return (var);
break;
case 0UL:
#line 46
var1 = scope__ACallReassignExpr__variable_create(self, p0);
#line 47
var = var1;
{
_TIG_FN_7143_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 1UL;
}
break;
case 2UL: ;
{
_TIG_FN_7143_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 0UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF VIRTUAL_scope__ACallReassignExpr__variable_create LOC=UNKNOWN VKEY=4891 */ | 899,825,838 | train_synth_compilable |
VIRTUAL_scope__ACallReassignExpr__variable_create | val* VIRTUAL_scope__ACallReassignExpr__variable_create(val* self, val* p0) {
val* var ;
val* var1 ;
var1 = scope__ACallReassignExpr__variable_create(self, p0);
var = var1;
RET_LABEL:;
return var;
} | Flatten+EncodeArithmetic | .global VIRTUAL_scope__ACallReassignExpr__variable_create
.type VIRTUAL_scope__ACallReassignExpr__variable_create, %function
VIRTUAL_scope__ACallReassignExpr__variable_create:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl scope__ACallReassignExpr__variable_create
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 40]
.L2:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global VIRTUAL_scope__ACallReassignExpr__variable_create
.type VIRTUAL_scope__ACallReassignExpr__variable_create, %function
VIRTUAL_scope__ACallReassignExpr__variable_create:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mov x0, 2
str x0, [sp, 48]
.L9:
ldr x0, [sp, 48]
cmp x0, 3
beq .L2
ldr x0, [sp, 48]
cmp x0, 3
bhi .L11
ldr x0, [sp, 48]
cmp x0, 2
beq .L4
ldr x0, [sp, 48]
cmp x0, 2
bhi .L11
ldr x0, [sp, 48]
cmp x0, 0
beq .L5
ldr x0, [sp, 48]
cmp x0, 1
bne .L11
.L6:
mov x0, 3
str x0, [sp, 48]
b .L7
.L2:
ldr x0, [sp, 56]
b .L10
.L5:
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl scope__ACallReassignExpr__variable_create
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 56]
mov x0, 1
str x0, [sp, 48]
b .L7
.L4:
str xzr, [sp, 48]
b .L7
.L11:
nop
.L7:
b .L9
.L10:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size VIRTUAL_scope__ACallReassignExpr__variable_create, .-VIRTUAL_scope__ACallReassignExpr__variable_create | define dso_local i32* @VIRTUAL_scope__ACallReassignExpr__variable_create(i32* %0, i32* %1) {
%3 = alloca i32*, align 8
%4 = alloca i32*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32*, align 8
store i32* %0, i32** %3, align 8
store i32* %1, i32** %4, align 8
%7 = load i32*, i32** %3, align 8
%8 = load i32*, i32** %4, align 8
%9 = call i32* @scope__ACallReassignExpr__variable_create(i32* %7, i32* %8)
store i32* %9, i32** %6, align 8
%10 = load i32*, i32** %6, align 8
store i32* %10, i32** %5, align 8
br label %11
11: ; preds = %2
%12 = load i32*, i32** %5, align 8
ret i32* %12
}
declare dso_local i32* @scope__ACallReassignExpr__variable_create(i32*, i32*) | /* BEGIN FUNCTION-DEF VIRTUAL_scope__ACallReassignExpr__variable_create LOC=UNKNOWN VKEY=4898 */
val *VIRTUAL_scope__ACallReassignExpr__variable_create(val *self , val *p0 )
{
val *var ;
val *var1 ;
unsigned long _TIG_FN_CKFD_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next ;
{
_TIG_FN_CKFD_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 2UL;
while (1) {
switch (_TIG_FN_CKFD_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next) {
case 1UL:
RET_LABEL: ;
_TIG_FN_CKFD_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 3UL;
break;
case 3UL: ;
return (var);
break;
case 0UL:
{
#line 46 "/tmp/forklift_obfu_v5wy4y35/input.c"
var1 = scope__ACallReassignExpr__variable_create(self, p0);
#line 47
var = var1;
}
_TIG_FN_CKFD_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 1UL;
break;
case 2UL: ;
_TIG_FN_CKFD_1_VIRTUAL_scope__ACallReassignExpr__variable_create_next = 0UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF VIRTUAL_scope__ACallReassignExpr__variable_create LOC=UNKNOWN VKEY=4898 */ | 306,671,447 | train_synth_compilable |
VmJsonEncode | static sxi32 VmJsonEncode(
vedis_value *pIn,
json_private_data *pData
){
SyBlob *pOut = pData->pOut;
int nByte;
if( vedis_value_is_null(pIn) ){
SyBlobAppend(pOut, "null", sizeof("null")-1);
}else if( vedis_value_is_bool(pIn) ){
int iBool = vedis_value_to_bool(pIn);
sxu32 iLen;
iLen = iBool ? sizeof("true") : sizeof("false");
SyBlobAppend(pOut, iBool ? "true" : "false", iLen-1);
}else if( vedis_value_is_numeric(pIn) && !vedis_value_is_string(pIn) ){
const char *zNum;
zNum = vedis_value_to_string(pIn, &nByte);
SyBlobAppend(pOut,zNum,nByte);
}else if( vedis_value_is_string(pIn) ){
const char *zIn, *zEnd;
int c;
zIn = vedis_value_to_string(pIn, &nByte);
zEnd = &zIn[nByte];
SyBlobAppend(pOut,"\"", sizeof(char));
for(;;){
if( zIn >= zEnd ){
break;
}
c = zIn[0];
zIn++;
if( c == '"' || c == '\\' ){
SyBlobAppend(pOut,"\\", sizeof(char));
}
SyBlobAppend(pOut,(const char *)&c,sizeof(char));
}
SyBlobAppend(pOut,"\"",sizeof(char));
}else if( vedis_value_is_array(pIn) ){
pData->isFirst = 1;
SyBlobAppend(pOut,"[",sizeof(char));
vedis_array_walk(pIn, VmJsonArrayEncode, pData);
SyBlobAppend(pOut,"]",sizeof(char));
}else{
SyBlobAppend(pOut,"null",sizeof("null")-1);
}
return 0;
} | Flatten | .global VmJsonEncode
.type VmJsonEncode, %function
VmJsonEncode:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1,0
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 64]
ldr x0, [sp, 24]
bl vedis_value_is_null
cmp x0, 0
beq .L2
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L2:
ldr x0, [sp, 24]
bl vedis_value_is_bool
cmp x0, 0
beq .L4
ldr x0, [sp, 24]
bl vedis_value_to_bool
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L5
mov w0, 5
b .L6
.L5:
mov w0, 6
.L6:
str w0, [sp, 52]
ldr w0, [sp, 48]
cmp w0, 0
beq .L7
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L8
.L7:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
.L8:
ldr w1, [sp, 52]
sub w1, w1, #1
mov w2, w1
mov x1, x0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L4:
ldr x0, [sp, 24]
bl vedis_value_is_numeric
cmp x0, 0
beq .L9
ldr x0, [sp, 24]
bl vedis_value_is_string
cmp x0, 0
bne .L9
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 72]
ldr w0, [sp, 40]
mov w2, w0
ldr x1, [sp, 72]
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L9:
ldr x0, [sp, 24]
bl vedis_value_is_string
cmp x0, 0
beq .L10
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 56]
ldr w0, [sp, 40]
sxtw x0, w0
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 80]
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 64]
bl SyBlobAppend
.L15:
ldr x1, [sp, 56]
ldr x0, [sp, 80]
cmp x1, x0
bcs .L20
ldr x0, [sp, 56]
ldrb w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
ldr w0, [sp, 44]
cmp w0, 34
beq .L13
ldr w0, [sp, 44]
cmp w0, 92
bne .L14
.L13:
mov w2, 1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 64]
bl SyBlobAppend
.L14:
add x0, sp, 44
mov w2, 1
mov x1, x0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L15
.L20:
nop
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L10:
ldr x0, [sp, 24]
bl vedis_value_is_array
cmp x0, 0
beq .L16
ldr x0, [sp, 16]
mov w1, 1
str w1, [x0]
mov w2, 1
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 64]
bl SyBlobAppend
adrp x0, :got:VmJsonArrayEncode
ldr x0, [x0, #:got_lo12:VmJsonArrayEncode]
ldr w0, [x0]
ldr x2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl vedis_array_walk
mov w2, 1
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L16:
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 64]
bl SyBlobAppend
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x3, [x0]
subs x2, x2, x3
mov x3, 0
beq .L18
bl __stack_chk_fail
.L18:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC4: .string "\\"
.LC2: .string "false"
.LC3: .string "\""
.LC5: .string "["
.LC6: .string "]"
.LC1: .string "true"
.LC0: .string "null"
| .global VmJsonEncode
.type VmJsonEncode, %function
VmJsonEncode:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mov x0, 15
str x0, [sp, 80]
.L62:
ldr x0, [sp, 80]
cmp x0, 42
beq .L2
ldr x0, [sp, 80]
cmp x0, 42
bhi .L64
ldr x0, [sp, 80]
cmp x0, 41
beq .L4
ldr x0, [sp, 80]
cmp x0, 41
bhi .L64
ldr x0, [sp, 80]
cmp x0, 40
beq .L5
ldr x0, [sp, 80]
cmp x0, 40
bhi .L64
ldr x0, [sp, 80]
cmp x0, 39
beq .L6
ldr x0, [sp, 80]
cmp x0, 39
bhi .L64
ldr x0, [sp, 80]
cmp x0, 38
beq .L7
ldr x0, [sp, 80]
cmp x0, 38
bhi .L64
ldr x0, [sp, 80]
cmp x0, 37
beq .L8
ldr x0, [sp, 80]
cmp x0, 37
bhi .L64
ldr x0, [sp, 80]
cmp x0, 36
beq .L9
ldr x0, [sp, 80]
cmp x0, 36
bhi .L64
ldr x0, [sp, 80]
cmp x0, 35
beq .L10
ldr x0, [sp, 80]
cmp x0, 35
bhi .L64
ldr x0, [sp, 80]
cmp x0, 33
beq .L11
ldr x0, [sp, 80]
cmp x0, 33
bhi .L64
ldr x0, [sp, 80]
cmp x0, 32
beq .L12
ldr x0, [sp, 80]
cmp x0, 32
bhi .L64
ldr x0, [sp, 80]
cmp x0, 31
beq .L13
ldr x0, [sp, 80]
cmp x0, 31
bhi .L64
ldr x0, [sp, 80]
cmp x0, 29
beq .L14
ldr x0, [sp, 80]
cmp x0, 29
bhi .L64
ldr x0, [sp, 80]
cmp x0, 28
beq .L15
ldr x0, [sp, 80]
cmp x0, 28
bhi .L64
ldr x0, [sp, 80]
cmp x0, 27
beq .L16
ldr x0, [sp, 80]
cmp x0, 27
bhi .L64
ldr x0, [sp, 80]
cmp x0, 25
beq .L17
ldr x0, [sp, 80]
cmp x0, 25
bhi .L64
ldr x0, [sp, 80]
cmp x0, 24
beq .L18
ldr x0, [sp, 80]
cmp x0, 24
bhi .L64
ldr x0, [sp, 80]
cmp x0, 23
beq .L19
ldr x0, [sp, 80]
cmp x0, 23
bhi .L64
ldr x0, [sp, 80]
cmp x0, 22
beq .L20
ldr x0, [sp, 80]
cmp x0, 22
bhi .L64
ldr x0, [sp, 80]
cmp x0, 21
beq .L21
ldr x0, [sp, 80]
cmp x0, 21
bhi .L64
ldr x0, [sp, 80]
cmp x0, 20
beq .L22
ldr x0, [sp, 80]
cmp x0, 20
bhi .L64
ldr x0, [sp, 80]
cmp x0, 19
beq .L23
ldr x0, [sp, 80]
cmp x0, 19
bhi .L64
ldr x0, [sp, 80]
cmp x0, 17
beq .L24
ldr x0, [sp, 80]
cmp x0, 17
bhi .L64
ldr x0, [sp, 80]
cmp x0, 16
beq .L25
ldr x0, [sp, 80]
cmp x0, 16
bhi .L64
ldr x0, [sp, 80]
cmp x0, 15
beq .L26
ldr x0, [sp, 80]
cmp x0, 15
bhi .L64
ldr x0, [sp, 80]
cmp x0, 14
beq .L27
ldr x0, [sp, 80]
cmp x0, 14
bhi .L64
ldr x0, [sp, 80]
cmp x0, 12
beq .L28
ldr x0, [sp, 80]
cmp x0, 12
bhi .L64
ldr x0, [sp, 80]
cmp x0, 11
beq .L29
ldr x0, [sp, 80]
cmp x0, 11
bhi .L64
ldr x0, [sp, 80]
cmp x0, 9
beq .L30
ldr x0, [sp, 80]
cmp x0, 9
bhi .L64
ldr x0, [sp, 80]
cmp x0, 8
beq .L31
ldr x0, [sp, 80]
cmp x0, 8
bhi .L64
ldr x0, [sp, 80]
cmp x0, 7
beq .L32
ldr x0, [sp, 80]
cmp x0, 7
bhi .L64
ldr x0, [sp, 80]
cmp x0, 6
beq .L33
ldr x0, [sp, 80]
cmp x0, 6
bhi .L64
ldr x0, [sp, 80]
cmp x0, 4
beq .L34
ldr x0, [sp, 80]
cmp x0, 4
bhi .L64
ldr x0, [sp, 80]
cmp x0, 3
beq .L35
ldr x0, [sp, 80]
cmp x0, 3
bhi .L64
ldr x0, [sp, 80]
cmp x0, 0
beq .L36
ldr x0, [sp, 80]
cmp x0, 2
beq .L37
b .L64
.L17:
ldr x0, [sp, 88]
cmp x0, 0
beq .L38
mov x0, 40
str x0, [sp, 80]
b .L40
.L38:
mov x0, 6
str x0, [sp, 80]
b .L40
.L34:
add x0, sp, 44
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 56]
ldr x0, [sp, 56]
str x0, [sp, 48]
ldr w0, [sp, 44]
mov w2, w0
ldr x1, [sp, 48]
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L27:
ldr x0, [sp, 24]
bl vedis_value_is_array
str x0, [sp, 128]
mov x0, 28
str x0, [sp, 80]
b .L40
.L26:
mov x0, 42
str x0, [sp, 80]
b .L40
.L13:
add x0, sp, 40
mov w2, 1
mov x1, x0
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 27
str x0, [sp, 80]
b .L40
.L28:
mov w0, 5
str w0, [sp, 160]
mov x0, 9
str x0, [sp, 80]
b .L40
.L31:
ldr x0, [sp, 112]
cmp x0, 0
beq .L41
mov x0, 3
str x0, [sp, 80]
b .L40
.L41:
mov x0, 19
str x0, [sp, 80]
b .L40
.L19:
add x0, sp, 44
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 64]
ldr x0, [sp, 64]
str x0, [sp, 144]
ldr w0, [sp, 44]
sxtw x0, w0
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 136]
mov w2, 1
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 27
str x0, [sp, 80]
b .L40
.L35:
ldr x0, [sp, 24]
bl vedis_value_is_string
str x0, [sp, 104]
mov x0, 2
str x0, [sp, 80]
b .L40
.L25:
ldr x0, [sp, 24]
bl vedis_value_is_numeric
str x0, [sp, 112]
mov x0, 8
str x0, [sp, 80]
b .L40
.L18:
ldr w0, [sp, 40]
cmp w0, 34
bne .L43
mov x0, 22
str x0, [sp, 80]
b .L40
.L43:
mov x0, 11
str x0, [sp, 80]
b .L40
.L21:
ldr x0, [sp, 96]
cmp x0, 0
beq .L45
mov x0, 38
str x0, [sp, 80]
b .L40
.L45:
mov x0, 16
str x0, [sp, 80]
b .L40
.L9:
mov w2, 1
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 31
str x0, [sp, 80]
b .L40
.L29:
ldr w0, [sp, 40]
cmp w0, 92
bne .L47
mov x0, 36
str x0, [sp, 80]
b .L40
.L47:
mov x0, 31
str x0, [sp, 80]
b .L40
.L30:
ldr w0, [sp, 164]
cmp w0, 0
beq .L49
mov x0, 32
str x0, [sp, 80]
b .L40
.L49:
mov x0, 17
str x0, [sp, 80]
b .L40
.L23:
ldr x0, [sp, 24]
bl vedis_value_is_string
str x0, [sp, 120]
str xzr, [sp, 80]
b .L40
.L12:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
str x0, [sp, 152]
mov x0, 33
str x0, [sp, 80]
b .L40
.L24:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
str x0, [sp, 152]
mov x0, 33
str x0, [sp, 80]
b .L40
.L5:
mov w2, 4
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L33:
ldr x0, [sp, 24]
bl vedis_value_is_bool
str x0, [sp, 96]
mov x0, 21
str x0, [sp, 80]
b .L40
.L16:
ldr x1, [sp, 144]
ldr x0, [sp, 136]
cmp x1, x0
bcc .L51
mov x0, 7
str x0, [sp, 80]
b .L40
.L51:
mov x0, 39
str x0, [sp, 80]
b .L40
.L7:
ldr x0, [sp, 24]
bl vedis_value_to_bool
str w0, [sp, 76]
ldr w0, [sp, 76]
str w0, [sp, 164]
mov x0, 35
str x0, [sp, 80]
b .L40
.L20:
mov w2, 1
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 31
str x0, [sp, 80]
b .L40
.L15:
ldr x0, [sp, 128]
cmp x0, 0
beq .L53
mov x0, 20
str x0, [sp, 80]
b .L40
.L53:
mov x0, 41
str x0, [sp, 80]
b .L40
.L11:
ldr w0, [sp, 160]
sub w0, w0, #1
mov w2, w0
ldr x1, [sp, 152]
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L8:
mov w0, 6
str w0, [sp, 160]
mov x0, 9
str x0, [sp, 80]
b .L40
.L4:
mov w2, 4
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L2:
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 168]
ldr x0, [sp, 24]
bl vedis_value_is_null
str x0, [sp, 88]
mov x0, 25
str x0, [sp, 80]
b .L40
.L36:
ldr x0, [sp, 120]
cmp x0, 0
beq .L55
mov x0, 23
str x0, [sp, 80]
b .L40
.L55:
mov x0, 14
str x0, [sp, 80]
b .L40
.L6:
ldr x0, [sp, 144]
ldrb w0, [x0]
str w0, [sp, 40]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
mov x0, 24
str x0, [sp, 80]
b .L40
.L32:
mov w2, 1
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L10:
ldr w0, [sp, 164]
cmp w0, 0
beq .L57
mov x0, 12
str x0, [sp, 80]
b .L40
.L57:
mov x0, 37
str x0, [sp, 80]
b .L40
.L14:
mov w0, 0
b .L63
.L37:
ldr x0, [sp, 104]
cmp x0, 0
beq .L60
mov x0, 19
str x0, [sp, 80]
b .L40
.L60:
mov x0, 4
str x0, [sp, 80]
b .L40
.L22:
ldr x0, [sp, 16]
mov w1, 1
str w1, [x0]
mov w2, 1
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 168]
bl SyBlobAppend
adrp x0, VmJsonArrayEncode
add x0, x0, :lo12:VmJsonArrayEncode
ldr w0, [x0]
ldr x2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl vedis_array_walk
mov w2, 1
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L64:
nop
.L40:
b .L62
.L63:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size VmJsonEncode, .-VmJsonEncode | %struct.TYPE_4__ = type { i32, i32* }
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@VmJsonArrayEncode = external dso_local global i32, align 4
@.str.6 = external hidden unnamed_addr constant [2 x i8], align 1
define dso_local i32 @VmJsonEncode(i32* %0, %struct.TYPE_4__* %1) {
%3 = alloca i32*, align 8
%4 = alloca %struct.TYPE_4__*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca i8*, align 8
%10 = alloca i8*, align 8
%11 = alloca i8*, align 8
%12 = alloca i32, align 4
store i32* %0, i32** %3, align 8
store %struct.TYPE_4__* %1, %struct.TYPE_4__** %4, align 8
%13 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%14 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %13, i32 0, i32 1
%15 = load i32*, i32** %14, align 8
store i32* %15, i32** %5, align 8
%16 = load i32*, i32** %3, align 8
%17 = call i64 @vedis_value_is_null(i32* %16)
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %2
%20 = load i32*, i32** %5, align 8
%21 = call i32 @SyBlobAppend(i32* %20, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
br label %119
22: ; preds = %2
%23 = load i32*, i32** %3, align 8
%24 = call i64 @vedis_value_is_bool(i32* %23)
%25 = icmp ne i64 %24, 0
br i1 %25, label %26, label %42
26: ; preds = %22
%27 = load i32*, i32** %3, align 8
%28 = call i32 @vedis_value_to_bool(i32* %27)
store i32 %28, i32* %7, align 4
%29 = load i32, i32* %7, align 4
%30 = icmp ne i32 %29, 0
%31 = zext i1 %30 to i64
%32 = select i1 %30, i64 5, i64 6
%33 = trunc i64 %32 to i32
store i32 %33, i32* %8, align 4
%34 = load i32*, i32** %5, align 8
%35 = load i32, i32* %7, align 4
%36 = icmp ne i32 %35, 0
%37 = zext i1 %36 to i64
%38 = select i1 %36, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%39 = load i32, i32* %8, align 4
%40 = sub nsw i32 %39, 1
%41 = call i32 @SyBlobAppend(i32* %34, i8* %38, i32 %40)
br label %118
42: ; preds = %22
%43 = load i32*, i32** %3, align 8
%44 = call i64 @vedis_value_is_numeric(i32* %43)
%45 = icmp ne i64 %44, 0
br i1 %45, label %46, label %57
46: ; preds = %42
%47 = load i32*, i32** %3, align 8
%48 = call i64 @vedis_value_is_string(i32* %47)
%49 = icmp ne i64 %48, 0
br i1 %49, label %57, label %50
50: ; preds = %46
%51 = load i32*, i32** %3, align 8
%52 = call i8* @vedis_value_to_string(i32* %51, i32* %6)
store i8* %52, i8** %9, align 8
%53 = load i32*, i32** %5, align 8
%54 = load i8*, i8** %9, align 8
%55 = load i32, i32* %6, align 4
%56 = call i32 @SyBlobAppend(i32* %53, i8* %54, i32 %55)
br label %117
57: ; preds = %46, %42
%58 = load i32*, i32** %3, align 8
%59 = call i64 @vedis_value_is_string(i32* %58)
%60 = icmp ne i64 %59, 0
br i1 %60, label %61, label %97
61: ; preds = %57
%62 = load i32*, i32** %3, align 8
%63 = call i8* @vedis_value_to_string(i32* %62, i32* %6)
store i8* %63, i8** %10, align 8
%64 = load i8*, i8** %10, align 8
%65 = load i32, i32* %6, align 4
%66 = sext i32 %65 to i64
%67 = getelementptr inbounds i8, i8* %64, i64 %66
store i8* %67, i8** %11, align 8
%68 = load i32*, i32** %5, align 8
%69 = call i32 @SyBlobAppend(i32* %68, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 1)
br label %70
70: ; preds = %90, %61
%71 = load i8*, i8** %10, align 8
%72 = load i8*, i8** %11, align 8
%73 = icmp uge i8* %71, %72
br i1 %73, label %74, label %75
74: ; preds = %70
br label %94
75: ; preds = %70
%76 = load i8*, i8** %10, align 8
%77 = getelementptr inbounds i8, i8* %76, i64 0
%78 = load i8, i8* %77, align 1
%79 = sext i8 %78 to i32
store i32 %79, i32* %12, align 4
%80 = load i8*, i8** %10, align 8
%81 = getelementptr inbounds i8, i8* %80, i32 1
store i8* %81, i8** %10, align 8
%82 = load i32, i32* %12, align 4
%83 = icmp eq i32 %82, 34
br i1 %83, label %87, label %84
84: ; preds = %75
%85 = load i32, i32* %12, align 4
%86 = icmp eq i32 %85, 92
br i1 %86, label %87, label %90
87: ; preds = %84, %75
%88 = load i32*, i32** %5, align 8
%89 = call i32 @SyBlobAppend(i32* %88, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.4, i64 0, i64 0), i32 1)
br label %90
90: ; preds = %87, %84
%91 = load i32*, i32** %5, align 8
%92 = bitcast i32* %12 to i8*
%93 = call i32 @SyBlobAppend(i32* %91, i8* %92, i32 1)
br label %70
94: ; preds = %74
%95 = load i32*, i32** %5, align 8
%96 = call i32 @SyBlobAppend(i32* %95, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 1)
br label %116
97: ; preds = %57
%98 = load i32*, i32** %3, align 8
%99 = call i64 @vedis_value_is_array(i32* %98)
%100 = icmp ne i64 %99, 0
br i1 %100, label %101, label %112
101: ; preds = %97
%102 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%103 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %102, i32 0, i32 0
store i32 1, i32* %103, align 8
%104 = load i32*, i32** %5, align 8
%105 = call i32 @SyBlobAppend(i32* %104, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.5, i64 0, i64 0), i32 1)
%106 = load i32*, i32** %3, align 8
%107 = load i32, i32* @VmJsonArrayEncode, align 4
%108 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%109 = call i32 @vedis_array_walk(i32* %106, i32 %107, %struct.TYPE_4__* %108)
%110 = load i32*, i32** %5, align 8
%111 = call i32 @SyBlobAppend(i32* %110, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.6, i64 0, i64 0), i32 1)
br label %115
112: ; preds = %97
%113 = load i32*, i32** %5, align 8
%114 = call i32 @SyBlobAppend(i32* %113, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
br label %115
115: ; preds = %112, %101
br label %116
116: ; preds = %115, %94
br label %117
117: ; preds = %116, %50
br label %118
118: ; preds = %117, %26
br label %119
119: ; preds = %118, %19
ret i32 0
}
declare dso_local i64 @vedis_value_is_null(i32*)
declare dso_local i32 @SyBlobAppend(i32*, i8*, i32)
declare dso_local i64 @vedis_value_is_bool(i32*)
declare dso_local i32 @vedis_value_to_bool(i32*)
declare dso_local i64 @vedis_value_is_numeric(i32*)
declare dso_local i64 @vedis_value_is_string(i32*)
declare dso_local i8* @vedis_value_to_string(i32*, i32*)
declare dso_local i64 @vedis_value_is_array(i32*)
declare dso_local i32 @vedis_array_walk(i32*, i32, %struct.TYPE_4__*) | /* BEGIN FUNCTION-DEF VmJsonEncode LOC=UNKNOWN VKEY=4950 */
static sxi32 VmJsonEncode(vedis_value *pIn , json_private_data *pData )
{
SyBlob *pOut ;
int nByte ;
int iBool ;
int tmp ;
sxu32 iLen ;
char *tmp___0 ;
char const *zNum ;
char *tmp___1 ;
char const *zIn ;
char const *zEnd ;
int c ;
char *tmp___2 ;
scalar_t__ tmp___3 ;
scalar_t__ tmp___4 ;
scalar_t__ tmp___5 ;
scalar_t__ tmp___6 ;
scalar_t__ tmp___7 ;
scalar_t__ tmp___8 ;
unsigned long _TIG_FN_TSg9_1_VmJsonEncode_next ;
{
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 15UL;
}
while (1) {
switch (_TIG_FN_TSg9_1_VmJsonEncode_next) {
case 25UL: ;
if (tmp___8) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 40UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 6UL;
}
}
break;
case 4UL:
#line 76 "/tmp/forklift_obfu_l8el3mnv/input.c"
tmp___1 = vedis_value_to_string(pIn, & nByte);
#line 76
zNum = (char const *)tmp___1;
#line 77
SyBlobAppend(pOut, zNum, nByte);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 29UL;
}
break;
case 14UL:
#line 103
tmp___3 = vedis_value_is_array(pIn);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 28UL;
}
break;
case 15UL: ;
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 42UL;
}
break;
case 31UL:
#line 99
SyBlobAppend(pOut, (char const *)(& c), (int )sizeof(char ));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 27UL;
}
break;
case 12UL:
#line 71
iLen = (sxu32 )sizeof("true");
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 9UL;
}
break;
case 8UL: ;
if (tmp___5) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 3UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 19UL;
}
}
break;
case 23UL:
#line 82
tmp___2 = vedis_value_to_string(pIn, & nByte);
#line 82
zIn = (char const *)tmp___2;
#line 83
zEnd = zIn + nByte;
#line 85
SyBlobAppend(pOut, (char const *)"\"", (int )sizeof(char ));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 27UL;
}
break;
case 3UL:
#line 73
tmp___6 = vedis_value_is_string(pIn);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 2UL;
}
break;
case 16UL:
#line 73
tmp___5 = vedis_value_is_numeric(pIn);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 8UL;
}
break;
case 24UL: ;
if (c == 34) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 22UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 11UL;
}
}
break;
case 21UL: ;
if (tmp___7) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 38UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 16UL;
}
}
break;
case 36UL:
#line 96
SyBlobAppend(pOut, (char const *)"\\", (int )sizeof(char ));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 31UL;
}
break;
case 11UL: ;
if (c == 92) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 36UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 31UL;
}
}
break;
case 9UL: ;
if (iBool) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 32UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 17UL;
}
}
break;
case 19UL:
_L: /* CIL Label */
#line 78
tmp___4 = vedis_value_is_string(pIn);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 0UL;
}
break;
case 32UL:
#line 72
tmp___0 = "true";
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 33UL;
}
break;
case 17UL:
#line 72
tmp___0 = "false";
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 33UL;
}
break;
case 40UL:
#line 66
SyBlobAppend(pOut, (char const *)"null", (int )(sizeof("null") - 1UL));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 29UL;
}
break;
case 6UL:
#line 67
tmp___7 = vedis_value_is_bool(pIn);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 21UL;
}
break;
case 27UL: ;
if ((unsigned long )zIn >= (unsigned long )zEnd) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 7UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 39UL;
}
}
break;
case 38UL:
#line 68
tmp = vedis_value_to_bool(pIn);
#line 68
iBool = tmp;
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 35UL;
}
break;
case 22UL:
#line 96
SyBlobAppend(pOut, (char const *)"\\", (int )sizeof(char ));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 31UL;
}
break;
case 28UL: ;
if (tmp___3) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 20UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 41UL;
}
}
break;
case 33UL:
#line 72
SyBlobAppend(pOut, (char const *)tmp___0, iLen - 1);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 29UL;
}
break;
case 37UL:
#line 71
iLen = (sxu32 )sizeof("false");
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 9UL;
}
break;
case 41UL:
#line 114
SyBlobAppend(pOut, (char const *)"null", (int )(sizeof("null") - 1UL));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 29UL;
}
break;
case 42UL:
#line 62
pOut = pData->pOut;
#line 64
tmp___8 = vedis_value_is_null(pIn);
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 25UL;
}
break;
case 0UL: ;
if (tmp___4) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 23UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 14UL;
}
}
break;
case 39UL:
#line 91
c = (int )*(zIn + 0);
#line 93
zIn ++;
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 24UL;
}
break;
case 7UL:
#line 102
SyBlobAppend(pOut, (char const *)"\"", (int )sizeof(char ));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 29UL;
}
break;
case 35UL: ;
if (iBool) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 12UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 37UL;
}
}
break;
case 29UL: ;
return (0);
break;
case 2UL: ;
if (tmp___6) {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 19UL;
}
} else {
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 4UL;
}
}
break;
case 20UL:
#line 105
pData->isFirst = 1;
#line 107
SyBlobAppend(pOut, (char const *)"[", (int )sizeof(char ));
#line 109
vedis_array_walk(pIn, VmJsonArrayEncode, pData);
#line 111
SyBlobAppend(pOut, (char const *)"]", (int )sizeof(char ));
{
_TIG_FN_TSg9_1_VmJsonEncode_next = 29UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF VmJsonEncode LOC=UNKNOWN VKEY=4950 */ | 1,193,887,545 | train_synth_compilable |
pinion_on_reset | static void pinion_on_reset(uint16_t vec) {
switch (vec & 0x7F) {
case 0:
if (has_pagefault()) {
interrupt_vector_fire(vec);
}
break;
case 1:
if (has_miscfault()) {
interrupt_vector_fire(vec);
}
break;
case 2:
if (has_zombie()) {
interrupt_vector_fire(vec);
}
break;
}
} | Flatten+EncodeArithmetic | .global pinion_on_reset
.type pinion_on_reset, %function
pinion_on_reset:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
and w0, w0, 127
cmp w0, 2
beq .L2
cmp w0, 2
bgt .L9
cmp w0, 0
beq .L4
cmp w0, 1
beq .L5
b .L9
.L4:
bl has_pagefault
cmp w0, 0
beq .L10
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L10
.L5:
bl has_miscfault
cmp w0, 0
beq .L11
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L11
.L2:
bl has_zombie
cmp w0, 0
beq .L12
ldr w0, [sp, 28]
bl interrupt_vector_fire
b .L12
.L10:
nop
b .L9
.L11:
nop
b .L9
.L12:
nop
.L9:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global pinion_on_reset
.type pinion_on_reset, %function
pinion_on_reset:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
mov x0, 2
str x0, [sp, 40]
.L34:
ldr x0, [sp, 40]
cmp x0, 13
beq .L8
ldr x0, [sp, 40]
cmp x0, 13
bhi .L35
ldr x0, [sp, 40]
cmp x0, 12
beq .L10
ldr x0, [sp, 40]
cmp x0, 12
bhi .L35
ldr x0, [sp, 40]
cmp x0, 10
beq .L11
ldr x0, [sp, 40]
cmp x0, 10
bhi .L35
ldr x0, [sp, 40]
cmp x0, 9
beq .L12
ldr x0, [sp, 40]
cmp x0, 9
bhi .L35
ldr x0, [sp, 40]
cmp x0, 8
beq .L13
ldr x0, [sp, 40]
cmp x0, 8
bhi .L35
ldr x0, [sp, 40]
cmp x0, 7
beq .L14
ldr x0, [sp, 40]
cmp x0, 7
bhi .L35
ldr x0, [sp, 40]
cmp x0, 6
beq .L15
ldr x0, [sp, 40]
cmp x0, 6
bhi .L35
ldr x0, [sp, 40]
cmp x0, 5
beq .L16
ldr x0, [sp, 40]
cmp x0, 5
bhi .L35
ldr x0, [sp, 40]
cmp x0, 4
beq .L36
ldr x0, [sp, 40]
cmp x0, 4
bhi .L35
ldr x0, [sp, 40]
cmp x0, 3
beq .L18
ldr x0, [sp, 40]
cmp x0, 3
bhi .L35
ldr x0, [sp, 40]
cmp x0, 1
beq .L19
ldr x0, [sp, 40]
cmp x0, 2
beq .L20
b .L35
.L10:
ldr w0, [sp, 28]
bl interrupt_vector_fire
mov x0, 4
str x0, [sp, 40]
b .L22
.L13:
ldr w0, [sp, 56]
cmp w0, 0
beq .L23
mov x0, 10
str x0, [sp, 40]
b .L22
.L23:
mov x0, 4
str x0, [sp, 40]
b .L22
.L19:
ldr w0, [sp, 60]
cmp w0, 0
beq .L25
mov x0, 3
str x0, [sp, 40]
b .L22
.L25:
mov x0, 4
str x0, [sp, 40]
b .L22
.L18:
ldr w0, [sp, 28]
bl interrupt_vector_fire
mov x0, 4
str x0, [sp, 40]
b .L22
.L12:
bl has_miscfault
str w0, [sp, 56]
mov x0, 8
str x0, [sp, 40]
b .L22
.L8:
ldr w0, [sp, 52]
cmp w0, 0
beq .L27
mov x0, 12
str x0, [sp, 40]
b .L22
.L27:
mov x0, 4
str x0, [sp, 40]
b .L22
.L15:
mov x0, 4
str x0, [sp, 40]
b .L22
.L16:
bl has_zombie
str w0, [sp, 52]
mov x0, 13
str x0, [sp, 40]
b .L22
.L11:
ldr w0, [sp, 28]
bl interrupt_vector_fire
mov x0, 4
str x0, [sp, 40]
b .L22
.L14:
bl has_pagefault
str w0, [sp, 60]
mov x0, 1
str x0, [sp, 40]
b .L22
.L20:
ldr w0, [sp, 28]
mvn w0, w0
orr w1, w0, 127
ldr w0, [sp, 28]
add w0, w1, w0
add w0, w0, 1
cmp w0, 2
beq .L29
cmp w0, 2
bgt .L30
cmp w0, 0
beq .L31
cmp w0, 1
beq .L32
b .L30
.L29:
mov x0, 5
str x0, [sp, 40]
b .L33
.L32:
mov x0, 9
str x0, [sp, 40]
b .L33
.L31:
mov x0, 7
str x0, [sp, 40]
b .L33
.L30:
mov x0, 6
str x0, [sp, 40]
nop
.L33:
b .L22
.L35:
nop
.L22:
b .L34
.L36:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size pinion_on_reset, .-pinion_on_reset | define dso_local void @pinion_on_reset(i32 %0) {
%2 = alloca i32, align 4
store i32 %0, i32* %2, align 4
%3 = load i32, i32* %2, align 4
%4 = and i32 %3, 127
switch i32 %4, label %26 [
i32 0, label %5
i32 1, label %12
i32 2, label %19
]
5: ; preds = %1
%6 = call i32 (...) @has_pagefault()
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2, align 4
%10 = call i32 @interrupt_vector_fire(i32 %9)
br label %11
11: ; preds = %8, %5
br label %26
12: ; preds = %1
%13 = call i32 (...) @has_miscfault()
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2, align 4
%17 = call i32 @interrupt_vector_fire(i32 %16)
br label %18
18: ; preds = %15, %12
br label %26
19: ; preds = %1
%20 = call i32 (...) @has_zombie()
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %2, align 4
%24 = call i32 @interrupt_vector_fire(i32 %23)
br label %25
25: ; preds = %22, %19
br label %26
26: ; preds = %25, %18, %11, %1
ret void
}
declare dso_local i32 @has_pagefault(...)
declare dso_local i32 @interrupt_vector_fire(i32)
declare dso_local i32 @has_miscfault(...)
declare dso_local i32 @has_zombie(...) | /* BEGIN FUNCTION-DEF pinion_on_reset LOC=UNKNOWN VKEY=4899 */
static void pinion_on_reset(uint16_t___0 vec )
{
int tmp ;
int tmp___0 ;
int tmp___1 ;
unsigned long _TIG_FN_Or5T_1_pinion_on_reset_next ;
{
_TIG_FN_Or5T_1_pinion_on_reset_next = 2UL;
while (1) {
switch (_TIG_FN_Or5T_1_pinion_on_reset_next) {
case 4UL: ;
return;
break;
case 12UL:
#line 61 "/tmp/forklift_obfu_lhacj1jf/input.c"
interrupt_vector_fire(vec);
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
break;
case 8UL: ;
if (tmp___0) {
_TIG_FN_Or5T_1_pinion_on_reset_next = 10UL;
} else {
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
}
break;
case 1UL: ;
if (tmp) {
_TIG_FN_Or5T_1_pinion_on_reset_next = 3UL;
} else {
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
}
break;
case 3UL:
#line 51
interrupt_vector_fire(vec);
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
break;
case 9UL:
#line 55
tmp___0 = has_miscfault();
_TIG_FN_Or5T_1_pinion_on_reset_next = 8UL;
break;
case 13UL: ;
if (tmp___1) {
_TIG_FN_Or5T_1_pinion_on_reset_next = 12UL;
} else {
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
}
break;
case 6UL: ;
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
break;
case 5UL:
#line 60
tmp___1 = has_zombie();
_TIG_FN_Or5T_1_pinion_on_reset_next = 13UL;
break;
case 10UL:
#line 56
interrupt_vector_fire(vec);
_TIG_FN_Or5T_1_pinion_on_reset_next = 4UL;
break;
case 7UL:
#line 50
tmp = has_pagefault();
_TIG_FN_Or5T_1_pinion_on_reset_next = 1UL;
break;
case 2UL: ;
switch (((~ vec | 0x7F) + vec) + 1) {
case 2:
_TIG_FN_Or5T_1_pinion_on_reset_next = 5UL;
break;
case 1:
_TIG_FN_Or5T_1_pinion_on_reset_next = 9UL;
break;
case 0:
_TIG_FN_Or5T_1_pinion_on_reset_next = 7UL;
break;
default:
_TIG_FN_Or5T_1_pinion_on_reset_next = 6UL;
break;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pinion_on_reset LOC=UNKNOWN VKEY=4899 */ | 1,525,876,051 | train_synth_compilable |
test_region_1 | void test_region_1() {
BEGIN_TEST("region-test-1");
void* p = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", p);
dbg_print_region_info();
void* q = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", q);
dbg_print_region_info();
void* r = region_alloc(0x2000, "Test region");
dbg_printf("Allocated two-page region: 0x%p\n", r);
dbg_print_region_info();
void* s = region_alloc(0x10000, "Test region");
dbg_printf("Allocated 16-page region: 0x%p\n", s);
dbg_print_region_info();
region_free(p);
dbg_printf("Freed region 0x%p\n", p);
dbg_print_region_info();
region_free(r);
dbg_printf("Freed region 0x%p\n", r);
dbg_print_region_info();
p = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", p);
dbg_print_region_info();
region_free(q);
dbg_printf("Freed region 0x%p\n", q);
dbg_print_region_info();
region_free(p);
dbg_printf("Freed region 0x%p\n", p);
dbg_print_region_info();
region_free(s);
dbg_printf("Freed region 0x%p\n", s);
dbg_print_region_info();
TEST_OK;
} | Flatten | .global test_region_1
.type test_region_1, %function
test_region_1:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl BEGIN_TEST
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 8192
bl region_alloc
str x0, [sp, 32]
ldr x1, [sp, 32]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 65536
bl region_alloc
str x0, [sp, 40]
ldr x1, [sp, 40]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 32]
bl region_free
ldr x1, [sp, 32]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 24]
bl region_free
ldr x1, [sp, 24]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 40]
bl region_free
ldr x1, [sp, 40]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC4: .string "Allocated 16-page region: 0x%p\n"
.LC2: .string "Allocated one-page region: 0x%p\n"
.LC3: .string "Allocated two-page region: 0x%p\n"
.LC5: .string "Freed region 0x%p\n"
.LC1: .string "Test region"
.LC0: .string "region-test-1"
| .global test_region_1
.type test_region_1, %function
test_region_1:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str xzr, [sp, 88]
.L14:
ldr x0, [sp, 88]
cmp x0, 2
beq .L15
ldr x0, [sp, 88]
cmp x0, 2
bhi .L16
ldr x0, [sp, 88]
cmp x0, 0
beq .L11
ldr x0, [sp, 88]
cmp x0, 1
bne .L16
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl BEGIN_TEST
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 80]
ldr x0, [sp, 80]
str x0, [sp, 72]
ldr x1, [sp, 72]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 64]
ldr x0, [sp, 64]
str x0, [sp, 56]
ldr x1, [sp, 56]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 8192
bl region_alloc
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 40]
ldr x1, [sp, 40]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 65536
bl region_alloc
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 72]
bl region_free
ldr x1, [sp, 72]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 40]
bl region_free
ldr x1, [sp, 40]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 72]
ldr x1, [sp, 72]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 56]
bl region_free
ldr x1, [sp, 56]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 72]
bl region_free
ldr x1, [sp, 72]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 24]
bl region_free
ldr x1, [sp, 24]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
mov x0, 2
str x0, [sp, 88]
b .L12
.L11:
mov x0, 1
str x0, [sp, 88]
b .L12
.L16:
nop
.L12:
b .L14
.L15:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size test_region_1, .-test_region_1 | @.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [19 x i8], align 1
@TEST_OK = external dso_local global i32, align 4
define dso_local void @test_region_1() {
%1 = alloca i8*, align 8
%2 = alloca i8*, align 8
%3 = alloca i8*, align 8
%4 = alloca i8*, align 8
%5 = call i32 @BEGIN_TEST(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %6, i8** %1, align 8
%7 = load i8*, i8** %1, align 8
%8 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %7)
%9 = call i32 (...) @dbg_print_region_info()
%10 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %10, i8** %2, align 8
%11 = load i8*, i8** %2, align 8
%12 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %11)
%13 = call i32 (...) @dbg_print_region_info()
%14 = call i8* @region_alloc(i32 8192, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %14, i8** %3, align 8
%15 = load i8*, i8** %3, align 8
%16 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.3, i64 0, i64 0), i8* %15)
%17 = call i32 (...) @dbg_print_region_info()
%18 = call i8* @region_alloc(i32 65536, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %18, i8** %4, align 8
%19 = load i8*, i8** %4, align 8
%20 = call i32 @dbg_printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.4, i64 0, i64 0), i8* %19)
%21 = call i32 (...) @dbg_print_region_info()
%22 = load i8*, i8** %1, align 8
%23 = call i32 @region_free(i8* %22)
%24 = load i8*, i8** %1, align 8
%25 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %24)
%26 = call i32 (...) @dbg_print_region_info()
%27 = load i8*, i8** %3, align 8
%28 = call i32 @region_free(i8* %27)
%29 = load i8*, i8** %3, align 8
%30 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %29)
%31 = call i32 (...) @dbg_print_region_info()
%32 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %32, i8** %1, align 8
%33 = load i8*, i8** %1, align 8
%34 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %33)
%35 = call i32 (...) @dbg_print_region_info()
%36 = load i8*, i8** %2, align 8
%37 = call i32 @region_free(i8* %36)
%38 = load i8*, i8** %2, align 8
%39 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %38)
%40 = call i32 (...) @dbg_print_region_info()
%41 = load i8*, i8** %1, align 8
%42 = call i32 @region_free(i8* %41)
%43 = load i8*, i8** %1, align 8
%44 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %43)
%45 = call i32 (...) @dbg_print_region_info()
%46 = load i8*, i8** %4, align 8
%47 = call i32 @region_free(i8* %46)
%48 = load i8*, i8** %4, align 8
%49 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %48)
%50 = call i32 (...) @dbg_print_region_info()
%51 = load i32, i32* @TEST_OK, align 4
ret void
}
declare dso_local i32 @BEGIN_TEST(i8*)
declare dso_local i8* @region_alloc(i32, i8*)
declare dso_local i32 @dbg_printf(i8*, i8*)
declare dso_local i32 @dbg_print_region_info(...)
declare dso_local i32 @region_free(i8*) | /* BEGIN FUNCTION-DEF test_region_1 LOC=UNKNOWN VKEY=4908 */
void test_region_1(void)
{
void *p ;
void *tmp ;
void *q ;
void *tmp___0 ;
void *r ;
void *tmp___1 ;
void *s ;
void *tmp___2 ;
unsigned long _TIG_FN_obNx_1_test_region_1_next ;
{
{
_TIG_FN_obNx_1_test_region_1_next = 0UL;
}
while (1) {
switch (_TIG_FN_obNx_1_test_region_1_next) {
case 1UL:
#line 48 "/tmp/forklift_obfu_z1my0c5v/input.c"
BEGIN_TEST("region-test-1");
#line 50
tmp = region_alloc(0x1000, "Test region");
#line 50
p = tmp;
#line 51
dbg_printf("Allocated one-page region: 0x%p\n", p);
#line 52
dbg_print_region_info();
#line 54
tmp___0 = region_alloc(0x1000, "Test region");
#line 54
q = tmp___0;
#line 55
dbg_printf("Allocated one-page region: 0x%p\n", q);
#line 56
dbg_print_region_info();
#line 58
tmp___1 = region_alloc(0x2000, "Test region");
#line 58
r = tmp___1;
#line 59
dbg_printf("Allocated two-page region: 0x%p\n", r);
#line 60
dbg_print_region_info();
#line 62
tmp___2 = region_alloc(0x10000, "Test region");
#line 62
s = tmp___2;
#line 63
dbg_printf("Allocated 16-page region: 0x%p\n", s);
#line 64
dbg_print_region_info();
#line 66
region_free(p);
#line 67
dbg_printf("Freed region 0x%p\n", p);
#line 68
dbg_print_region_info();
#line 70
region_free(r);
#line 71
dbg_printf("Freed region 0x%p\n", r);
#line 72
dbg_print_region_info();
#line 74
p = region_alloc(0x1000, "Test region");
#line 75
dbg_printf("Allocated one-page region: 0x%p\n", p);
#line 76
dbg_print_region_info();
#line 78
region_free(q);
#line 79
dbg_printf("Freed region 0x%p\n", q);
#line 80
dbg_print_region_info();
#line 82
region_free(p);
#line 83
dbg_printf("Freed region 0x%p\n", p);
#line 84
dbg_print_region_info();
#line 86
region_free(s);
#line 87
dbg_printf("Freed region 0x%p\n", s);
#line 88
dbg_print_region_info();
{
_TIG_FN_obNx_1_test_region_1_next = 2UL;
}
break;
case 0UL: ;
{
_TIG_FN_obNx_1_test_region_1_next = 1UL;
}
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF test_region_1 LOC=UNKNOWN VKEY=4908 */ | 1,985,392,498 | train_synth_compilable |
VIRTUAL_scope__ACallReassignExpr__variable_create | val* VIRTUAL_scope__ACallReassignExpr__variable_create(val* self, val* p0) {
val* var ;
val* var1 ;
var1 = scope__ACallReassignExpr__variable_create(self, p0);
var = var1;
RET_LABEL:;
return var;
} | EncodeArithmetic | .global VIRTUAL_scope__ACallReassignExpr__variable_create
.type VIRTUAL_scope__ACallReassignExpr__variable_create, %function
VIRTUAL_scope__ACallReassignExpr__variable_create:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl scope__ACallReassignExpr__variable_create
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 40]
.L2:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global VIRTUAL_scope__ACallReassignExpr__variable_create
.type VIRTUAL_scope__ACallReassignExpr__variable_create, %function
VIRTUAL_scope__ACallReassignExpr__variable_create:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl scope__ACallReassignExpr__variable_create
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
.L2:
ldr x0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size VIRTUAL_scope__ACallReassignExpr__variable_create, .-VIRTUAL_scope__ACallReassignExpr__variable_create | define dso_local i32* @VIRTUAL_scope__ACallReassignExpr__variable_create(i32* %0, i32* %1) {
%3 = alloca i32*, align 8
%4 = alloca i32*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32*, align 8
store i32* %0, i32** %3, align 8
store i32* %1, i32** %4, align 8
%7 = load i32*, i32** %3, align 8
%8 = load i32*, i32** %4, align 8
%9 = call i32* @scope__ACallReassignExpr__variable_create(i32* %7, i32* %8)
store i32* %9, i32** %6, align 8
%10 = load i32*, i32** %6, align 8
store i32* %10, i32** %5, align 8
br label %11
11: ; preds = %2
%12 = load i32*, i32** %5, align 8
ret i32* %12
}
declare dso_local i32* @scope__ACallReassignExpr__variable_create(i32*, i32*) | /* BEGIN FUNCTION-DEF VIRTUAL_scope__ACallReassignExpr__variable_create LOC=UNKNOWN VKEY=4891 */
val *VIRTUAL_scope__ACallReassignExpr__variable_create(val *self , val *p0 )
{
val *var ;
val *var1 ;
{
{
#line 46 "/tmp/forklift_obfu_eurn3fm9/input.c"
var1 = scope__ACallReassignExpr__variable_create(self, p0);
#line 47
var = var1;
}
RET_LABEL: ;
#line 49
return (var);
}
}
/* END FUNCTION-DEF VIRTUAL_scope__ACallReassignExpr__variable_create LOC=UNKNOWN VKEY=4891 */ | 1,146,660,997 | train_synth_compilable |
test_region_1 | void test_region_1() {
BEGIN_TEST("region-test-1");
void* p = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", p);
dbg_print_region_info();
void* q = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", q);
dbg_print_region_info();
void* r = region_alloc(0x2000, "Test region");
dbg_printf("Allocated two-page region: 0x%p\n", r);
dbg_print_region_info();
void* s = region_alloc(0x10000, "Test region");
dbg_printf("Allocated 16-page region: 0x%p\n", s);
dbg_print_region_info();
region_free(p);
dbg_printf("Freed region 0x%p\n", p);
dbg_print_region_info();
region_free(r);
dbg_printf("Freed region 0x%p\n", r);
dbg_print_region_info();
p = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", p);
dbg_print_region_info();
region_free(q);
dbg_printf("Freed region 0x%p\n", q);
dbg_print_region_info();
region_free(p);
dbg_printf("Freed region 0x%p\n", p);
dbg_print_region_info();
region_free(s);
dbg_printf("Freed region 0x%p\n", s);
dbg_print_region_info();
TEST_OK;
} | EncodeArithmetic | .global test_region_1
.type test_region_1, %function
test_region_1:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl BEGIN_TEST
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 8192
bl region_alloc
str x0, [sp, 32]
ldr x1, [sp, 32]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 65536
bl region_alloc
str x0, [sp, 40]
ldr x1, [sp, 40]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 32]
bl region_free
ldr x1, [sp, 32]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 24]
bl region_free
ldr x1, [sp, 24]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 40]
bl region_free
ldr x1, [sp, 40]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC4: .string "Allocated 16-page region: 0x%p\n"
.LC2: .string "Allocated one-page region: 0x%p\n"
.LC3: .string "Allocated two-page region: 0x%p\n"
.LC5: .string "Freed region 0x%p\n"
.LC1: .string "Test region"
.LC0: .string "region-test-1"
| .global test_region_1
.type test_region_1, %function
test_region_1:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl BEGIN_TEST
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 72]
ldr x0, [sp, 72]
str x0, [sp, 64]
ldr x1, [sp, 64]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 56]
ldr x0, [sp, 56]
str x0, [sp, 48]
ldr x1, [sp, 48]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 8192
bl region_alloc
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
ldr x1, [sp, 32]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 65536
bl region_alloc
str x0, [sp, 24]
ldr x0, [sp, 24]
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 64]
bl region_free
ldr x1, [sp, 64]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 32]
bl region_free
ldr x1, [sp, 32]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 64]
ldr x1, [sp, 64]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 48]
bl region_free
ldr x1, [sp, 48]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 64]
bl region_free
ldr x1, [sp, 64]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size test_region_1, .-test_region_1 | @.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [19 x i8], align 1
@TEST_OK = external dso_local global i32, align 4
define dso_local void @test_region_1() {
%1 = alloca i8*, align 8
%2 = alloca i8*, align 8
%3 = alloca i8*, align 8
%4 = alloca i8*, align 8
%5 = call i32 @BEGIN_TEST(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %6, i8** %1, align 8
%7 = load i8*, i8** %1, align 8
%8 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %7)
%9 = call i32 (...) @dbg_print_region_info()
%10 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %10, i8** %2, align 8
%11 = load i8*, i8** %2, align 8
%12 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %11)
%13 = call i32 (...) @dbg_print_region_info()
%14 = call i8* @region_alloc(i32 8192, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %14, i8** %3, align 8
%15 = load i8*, i8** %3, align 8
%16 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.3, i64 0, i64 0), i8* %15)
%17 = call i32 (...) @dbg_print_region_info()
%18 = call i8* @region_alloc(i32 65536, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %18, i8** %4, align 8
%19 = load i8*, i8** %4, align 8
%20 = call i32 @dbg_printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.4, i64 0, i64 0), i8* %19)
%21 = call i32 (...) @dbg_print_region_info()
%22 = load i8*, i8** %1, align 8
%23 = call i32 @region_free(i8* %22)
%24 = load i8*, i8** %1, align 8
%25 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %24)
%26 = call i32 (...) @dbg_print_region_info()
%27 = load i8*, i8** %3, align 8
%28 = call i32 @region_free(i8* %27)
%29 = load i8*, i8** %3, align 8
%30 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %29)
%31 = call i32 (...) @dbg_print_region_info()
%32 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %32, i8** %1, align 8
%33 = load i8*, i8** %1, align 8
%34 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %33)
%35 = call i32 (...) @dbg_print_region_info()
%36 = load i8*, i8** %2, align 8
%37 = call i32 @region_free(i8* %36)
%38 = load i8*, i8** %2, align 8
%39 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %38)
%40 = call i32 (...) @dbg_print_region_info()
%41 = load i8*, i8** %1, align 8
%42 = call i32 @region_free(i8* %41)
%43 = load i8*, i8** %1, align 8
%44 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %43)
%45 = call i32 (...) @dbg_print_region_info()
%46 = load i8*, i8** %4, align 8
%47 = call i32 @region_free(i8* %46)
%48 = load i8*, i8** %4, align 8
%49 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %48)
%50 = call i32 (...) @dbg_print_region_info()
%51 = load i32, i32* @TEST_OK, align 4
ret void
}
declare dso_local i32 @BEGIN_TEST(i8*)
declare dso_local i8* @region_alloc(i32, i8*)
declare dso_local i32 @dbg_printf(i8*, i8*)
declare dso_local i32 @dbg_print_region_info(...)
declare dso_local i32 @region_free(i8*) | /* BEGIN FUNCTION-DEF test_region_1 LOC=UNKNOWN VKEY=4908 */
void test_region_1(void)
{
void *p ;
void *tmp ;
void *q ;
void *tmp___0 ;
void *r ;
void *tmp___1 ;
void *s ;
void *tmp___2 ;
{
{
#line 48 "/tmp/forklift_obfu_tslgwi4n/input.c"
BEGIN_TEST("region-test-1");
#line 50
tmp = region_alloc(0x1000, "Test region");
#line 50
p = tmp;
#line 51
dbg_printf("Allocated one-page region: 0x%p\n", p);
#line 52
dbg_print_region_info();
#line 54
tmp___0 = region_alloc(0x1000, "Test region");
#line 54
q = tmp___0;
#line 55
dbg_printf("Allocated one-page region: 0x%p\n", q);
#line 56
dbg_print_region_info();
#line 58
tmp___1 = region_alloc(0x2000, "Test region");
#line 58
r = tmp___1;
#line 59
dbg_printf("Allocated two-page region: 0x%p\n", r);
#line 60
dbg_print_region_info();
#line 62
tmp___2 = region_alloc(0x10000, "Test region");
#line 62
s = tmp___2;
#line 63
dbg_printf("Allocated 16-page region: 0x%p\n", s);
#line 64
dbg_print_region_info();
#line 66
region_free(p);
#line 67
dbg_printf("Freed region 0x%p\n", p);
#line 68
dbg_print_region_info();
#line 70
region_free(r);
#line 71
dbg_printf("Freed region 0x%p\n", r);
#line 72
dbg_print_region_info();
#line 74
p = region_alloc(0x1000, "Test region");
#line 75
dbg_printf("Allocated one-page region: 0x%p\n", p);
#line 76
dbg_print_region_info();
#line 78
region_free(q);
#line 79
dbg_printf("Freed region 0x%p\n", q);
#line 80
dbg_print_region_info();
#line 82
region_free(p);
#line 83
dbg_printf("Freed region 0x%p\n", p);
#line 84
dbg_print_region_info();
#line 86
region_free(s);
#line 87
dbg_printf("Freed region 0x%p\n", s);
#line 88
dbg_print_region_info();
}
#line 91
return;
}
}
/* END FUNCTION-DEF test_region_1 LOC=UNKNOWN VKEY=4908 */ | 1,629,748,727 | train_synth_compilable |
VmJsonEncode | static sxi32 VmJsonEncode(
vedis_value *pIn,
json_private_data *pData
){
SyBlob *pOut = pData->pOut;
int nByte;
if( vedis_value_is_null(pIn) ){
SyBlobAppend(pOut, "null", sizeof("null")-1);
}else if( vedis_value_is_bool(pIn) ){
int iBool = vedis_value_to_bool(pIn);
sxu32 iLen;
iLen = iBool ? sizeof("true") : sizeof("false");
SyBlobAppend(pOut, iBool ? "true" : "false", iLen-1);
}else if( vedis_value_is_numeric(pIn) && !vedis_value_is_string(pIn) ){
const char *zNum;
zNum = vedis_value_to_string(pIn, &nByte);
SyBlobAppend(pOut,zNum,nByte);
}else if( vedis_value_is_string(pIn) ){
const char *zIn, *zEnd;
int c;
zIn = vedis_value_to_string(pIn, &nByte);
zEnd = &zIn[nByte];
SyBlobAppend(pOut,"\"", sizeof(char));
for(;;){
if( zIn >= zEnd ){
break;
}
c = zIn[0];
zIn++;
if( c == '"' || c == '\\' ){
SyBlobAppend(pOut,"\\", sizeof(char));
}
SyBlobAppend(pOut,(const char *)&c,sizeof(char));
}
SyBlobAppend(pOut,"\"",sizeof(char));
}else if( vedis_value_is_array(pIn) ){
pData->isFirst = 1;
SyBlobAppend(pOut,"[",sizeof(char));
vedis_array_walk(pIn, VmJsonArrayEncode, pData);
SyBlobAppend(pOut,"]",sizeof(char));
}else{
SyBlobAppend(pOut,"null",sizeof("null")-1);
}
return 0;
} | Flatten+EncodeArithmetic | .global VmJsonEncode
.type VmJsonEncode, %function
VmJsonEncode:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1,0
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 64]
ldr x0, [sp, 24]
bl vedis_value_is_null
cmp x0, 0
beq .L2
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L2:
ldr x0, [sp, 24]
bl vedis_value_is_bool
cmp x0, 0
beq .L4
ldr x0, [sp, 24]
bl vedis_value_to_bool
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L5
mov w0, 5
b .L6
.L5:
mov w0, 6
.L6:
str w0, [sp, 52]
ldr w0, [sp, 48]
cmp w0, 0
beq .L7
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L8
.L7:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
.L8:
ldr w1, [sp, 52]
sub w1, w1, #1
mov w2, w1
mov x1, x0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L4:
ldr x0, [sp, 24]
bl vedis_value_is_numeric
cmp x0, 0
beq .L9
ldr x0, [sp, 24]
bl vedis_value_is_string
cmp x0, 0
bne .L9
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 72]
ldr w0, [sp, 40]
mov w2, w0
ldr x1, [sp, 72]
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L9:
ldr x0, [sp, 24]
bl vedis_value_is_string
cmp x0, 0
beq .L10
add x0, sp, 40
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 56]
ldr w0, [sp, 40]
sxtw x0, w0
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 80]
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 64]
bl SyBlobAppend
.L15:
ldr x1, [sp, 56]
ldr x0, [sp, 80]
cmp x1, x0
bcs .L20
ldr x0, [sp, 56]
ldrb w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
ldr w0, [sp, 44]
cmp w0, 34
beq .L13
ldr w0, [sp, 44]
cmp w0, 92
bne .L14
.L13:
mov w2, 1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 64]
bl SyBlobAppend
.L14:
add x0, sp, 44
mov w2, 1
mov x1, x0
ldr x0, [sp, 64]
bl SyBlobAppend
b .L15
.L20:
nop
mov w2, 1
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L10:
ldr x0, [sp, 24]
bl vedis_value_is_array
cmp x0, 0
beq .L16
ldr x0, [sp, 16]
mov w1, 1
str w1, [x0]
mov w2, 1
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 64]
bl SyBlobAppend
adrp x0, :got:VmJsonArrayEncode
ldr x0, [x0, #:got_lo12:VmJsonArrayEncode]
ldr w0, [x0]
ldr x2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl vedis_array_walk
mov w2, 1
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 64]
bl SyBlobAppend
b .L3
.L16:
mov w2, 4
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 64]
bl SyBlobAppend
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x3, [x0]
subs x2, x2, x3
mov x3, 0
beq .L18
bl __stack_chk_fail
.L18:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC4: .string "\\"
.LC2: .string "false"
.LC3: .string "\""
.LC5: .string "["
.LC6: .string "]"
.LC1: .string "true"
.LC0: .string "null"
| .global VmJsonEncode
.type VmJsonEncode, %function
VmJsonEncode:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mov x0, 15
str x0, [sp, 80]
.L62:
ldr x0, [sp, 80]
cmp x0, 42
beq .L2
ldr x0, [sp, 80]
cmp x0, 42
bhi .L64
ldr x0, [sp, 80]
cmp x0, 41
beq .L4
ldr x0, [sp, 80]
cmp x0, 41
bhi .L64
ldr x0, [sp, 80]
cmp x0, 40
beq .L5
ldr x0, [sp, 80]
cmp x0, 40
bhi .L64
ldr x0, [sp, 80]
cmp x0, 39
beq .L6
ldr x0, [sp, 80]
cmp x0, 39
bhi .L64
ldr x0, [sp, 80]
cmp x0, 38
beq .L7
ldr x0, [sp, 80]
cmp x0, 38
bhi .L64
ldr x0, [sp, 80]
cmp x0, 37
beq .L8
ldr x0, [sp, 80]
cmp x0, 37
bhi .L64
ldr x0, [sp, 80]
cmp x0, 36
beq .L9
ldr x0, [sp, 80]
cmp x0, 36
bhi .L64
ldr x0, [sp, 80]
cmp x0, 35
beq .L10
ldr x0, [sp, 80]
cmp x0, 35
bhi .L64
ldr x0, [sp, 80]
cmp x0, 33
beq .L11
ldr x0, [sp, 80]
cmp x0, 33
bhi .L64
ldr x0, [sp, 80]
cmp x0, 32
beq .L12
ldr x0, [sp, 80]
cmp x0, 32
bhi .L64
ldr x0, [sp, 80]
cmp x0, 31
beq .L13
ldr x0, [sp, 80]
cmp x0, 31
bhi .L64
ldr x0, [sp, 80]
cmp x0, 29
beq .L14
ldr x0, [sp, 80]
cmp x0, 29
bhi .L64
ldr x0, [sp, 80]
cmp x0, 28
beq .L15
ldr x0, [sp, 80]
cmp x0, 28
bhi .L64
ldr x0, [sp, 80]
cmp x0, 27
beq .L16
ldr x0, [sp, 80]
cmp x0, 27
bhi .L64
ldr x0, [sp, 80]
cmp x0, 25
beq .L17
ldr x0, [sp, 80]
cmp x0, 25
bhi .L64
ldr x0, [sp, 80]
cmp x0, 24
beq .L18
ldr x0, [sp, 80]
cmp x0, 24
bhi .L64
ldr x0, [sp, 80]
cmp x0, 23
beq .L19
ldr x0, [sp, 80]
cmp x0, 23
bhi .L64
ldr x0, [sp, 80]
cmp x0, 22
beq .L20
ldr x0, [sp, 80]
cmp x0, 22
bhi .L64
ldr x0, [sp, 80]
cmp x0, 21
beq .L21
ldr x0, [sp, 80]
cmp x0, 21
bhi .L64
ldr x0, [sp, 80]
cmp x0, 20
beq .L22
ldr x0, [sp, 80]
cmp x0, 20
bhi .L64
ldr x0, [sp, 80]
cmp x0, 19
beq .L23
ldr x0, [sp, 80]
cmp x0, 19
bhi .L64
ldr x0, [sp, 80]
cmp x0, 17
beq .L24
ldr x0, [sp, 80]
cmp x0, 17
bhi .L64
ldr x0, [sp, 80]
cmp x0, 16
beq .L25
ldr x0, [sp, 80]
cmp x0, 16
bhi .L64
ldr x0, [sp, 80]
cmp x0, 15
beq .L26
ldr x0, [sp, 80]
cmp x0, 15
bhi .L64
ldr x0, [sp, 80]
cmp x0, 14
beq .L27
ldr x0, [sp, 80]
cmp x0, 14
bhi .L64
ldr x0, [sp, 80]
cmp x0, 12
beq .L28
ldr x0, [sp, 80]
cmp x0, 12
bhi .L64
ldr x0, [sp, 80]
cmp x0, 11
beq .L29
ldr x0, [sp, 80]
cmp x0, 11
bhi .L64
ldr x0, [sp, 80]
cmp x0, 9
beq .L30
ldr x0, [sp, 80]
cmp x0, 9
bhi .L64
ldr x0, [sp, 80]
cmp x0, 8
beq .L31
ldr x0, [sp, 80]
cmp x0, 8
bhi .L64
ldr x0, [sp, 80]
cmp x0, 7
beq .L32
ldr x0, [sp, 80]
cmp x0, 7
bhi .L64
ldr x0, [sp, 80]
cmp x0, 6
beq .L33
ldr x0, [sp, 80]
cmp x0, 6
bhi .L64
ldr x0, [sp, 80]
cmp x0, 4
beq .L34
ldr x0, [sp, 80]
cmp x0, 4
bhi .L64
ldr x0, [sp, 80]
cmp x0, 3
beq .L35
ldr x0, [sp, 80]
cmp x0, 3
bhi .L64
ldr x0, [sp, 80]
cmp x0, 0
beq .L36
ldr x0, [sp, 80]
cmp x0, 2
beq .L37
b .L64
.L17:
ldr x0, [sp, 88]
cmp x0, 0
beq .L38
mov x0, 40
str x0, [sp, 80]
b .L40
.L38:
mov x0, 6
str x0, [sp, 80]
b .L40
.L34:
add x0, sp, 44
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 56]
ldr x0, [sp, 56]
str x0, [sp, 48]
ldr w0, [sp, 44]
mov w2, w0
ldr x1, [sp, 48]
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L27:
ldr x0, [sp, 24]
bl vedis_value_is_array
str x0, [sp, 128]
mov x0, 28
str x0, [sp, 80]
b .L40
.L26:
mov x0, 42
str x0, [sp, 80]
b .L40
.L13:
add x0, sp, 40
mov w2, 1
mov x1, x0
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 27
str x0, [sp, 80]
b .L40
.L28:
mov w0, 5
str w0, [sp, 160]
mov x0, 9
str x0, [sp, 80]
b .L40
.L31:
ldr x0, [sp, 112]
cmp x0, 0
beq .L41
mov x0, 3
str x0, [sp, 80]
b .L40
.L41:
mov x0, 19
str x0, [sp, 80]
b .L40
.L19:
add x0, sp, 44
mov x1, x0
ldr x0, [sp, 24]
bl vedis_value_to_string
str x0, [sp, 64]
ldr x0, [sp, 64]
str x0, [sp, 144]
ldr w0, [sp, 44]
sxtw x0, w0
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 136]
mov w2, 1
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 27
str x0, [sp, 80]
b .L40
.L35:
ldr x0, [sp, 24]
bl vedis_value_is_string
str x0, [sp, 104]
mov x0, 2
str x0, [sp, 80]
b .L40
.L25:
ldr x0, [sp, 24]
bl vedis_value_is_numeric
str x0, [sp, 112]
mov x0, 8
str x0, [sp, 80]
b .L40
.L18:
ldr w0, [sp, 40]
sub w1, w0, #34
ldr w0, [sp, 40]
mov w2, 34
sub w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L43
mov x0, 22
str x0, [sp, 80]
b .L40
.L43:
mov x0, 11
str x0, [sp, 80]
b .L40
.L21:
ldr x0, [sp, 96]
cmp x0, 0
beq .L45
mov x0, 38
str x0, [sp, 80]
b .L40
.L45:
mov x0, 16
str x0, [sp, 80]
b .L40
.L9:
mov w2, 1
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 31
str x0, [sp, 80]
b .L40
.L29:
ldr w0, [sp, 40]
sub w1, w0, #92
ldr w0, [sp, 40]
mov w2, 92
sub w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L47
mov x0, 36
str x0, [sp, 80]
b .L40
.L47:
mov x0, 31
str x0, [sp, 80]
b .L40
.L30:
ldr w0, [sp, 164]
cmp w0, 0
beq .L49
mov x0, 32
str x0, [sp, 80]
b .L40
.L49:
mov x0, 17
str x0, [sp, 80]
b .L40
.L23:
ldr x0, [sp, 24]
bl vedis_value_is_string
str x0, [sp, 120]
str xzr, [sp, 80]
b .L40
.L12:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
str x0, [sp, 152]
mov x0, 33
str x0, [sp, 80]
b .L40
.L24:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
str x0, [sp, 152]
mov x0, 33
str x0, [sp, 80]
b .L40
.L5:
mov w2, 4
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L33:
ldr x0, [sp, 24]
bl vedis_value_is_bool
str x0, [sp, 96]
mov x0, 21
str x0, [sp, 80]
b .L40
.L16:
ldr x1, [sp, 136]
ldr x0, [sp, 144]
cmp x1, x0
bhi .L51
mov x0, 7
str x0, [sp, 80]
b .L40
.L51:
mov x0, 39
str x0, [sp, 80]
b .L40
.L7:
ldr x0, [sp, 24]
bl vedis_value_to_bool
str w0, [sp, 76]
ldr w0, [sp, 76]
str w0, [sp, 164]
mov x0, 35
str x0, [sp, 80]
b .L40
.L20:
mov w2, 1
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 31
str x0, [sp, 80]
b .L40
.L15:
ldr x0, [sp, 128]
cmp x0, 0
beq .L53
mov x0, 20
str x0, [sp, 80]
b .L40
.L53:
mov x0, 41
str x0, [sp, 80]
b .L40
.L11:
ldr w0, [sp, 160]
and w0, w0, -2
lsl w1, w0, 1
ldr w0, [sp, 160]
eor w0, w0, 1
sub w0, w1, w0
mov w2, w0
ldr x1, [sp, 152]
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L8:
mov w0, 6
str w0, [sp, 160]
mov x0, 9
str x0, [sp, 80]
b .L40
.L4:
mov w2, 4
adrp x0, .LC4
add x1, x0, :lo12:.LC4
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L2:
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 168]
ldr x0, [sp, 24]
bl vedis_value_is_null
str x0, [sp, 88]
mov x0, 25
str x0, [sp, 80]
b .L40
.L36:
ldr x0, [sp, 120]
cmp x0, 0
beq .L55
mov x0, 23
str x0, [sp, 80]
b .L40
.L55:
mov x0, 14
str x0, [sp, 80]
b .L40
.L6:
ldr x0, [sp, 144]
ldrb w0, [x0]
str w0, [sp, 40]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
mov x0, 24
str x0, [sp, 80]
b .L40
.L32:
mov w2, 1
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L10:
ldr w0, [sp, 164]
cmp w0, 0
beq .L57
mov x0, 12
str x0, [sp, 80]
b .L40
.L57:
mov x0, 37
str x0, [sp, 80]
b .L40
.L14:
mov w0, 0
b .L63
.L37:
ldr x0, [sp, 104]
cmp x0, 0
beq .L60
mov x0, 19
str x0, [sp, 80]
b .L40
.L60:
mov x0, 4
str x0, [sp, 80]
b .L40
.L22:
ldr x0, [sp, 16]
mov w1, 1
str w1, [x0]
mov w2, 1
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 168]
bl SyBlobAppend
adrp x0, VmJsonArrayEncode
add x0, x0, :lo12:VmJsonArrayEncode
ldr w0, [x0]
ldr x2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl vedis_array_walk
mov w2, 1
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 168]
bl SyBlobAppend
mov x0, 29
str x0, [sp, 80]
b .L40
.L64:
nop
.L40:
b .L62
.L63:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size VmJsonEncode, .-VmJsonEncode | %struct.TYPE_4__ = type { i32, i32* }
@.str = external hidden unnamed_addr constant [5 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [5 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [6 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [2 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [2 x i8], align 1
@VmJsonArrayEncode = external dso_local global i32, align 4
@.str.6 = external hidden unnamed_addr constant [2 x i8], align 1
define dso_local i32 @VmJsonEncode(i32* %0, %struct.TYPE_4__* %1) {
%3 = alloca i32*, align 8
%4 = alloca %struct.TYPE_4__*, align 8
%5 = alloca i32*, align 8
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca i8*, align 8
%10 = alloca i8*, align 8
%11 = alloca i8*, align 8
%12 = alloca i32, align 4
store i32* %0, i32** %3, align 8
store %struct.TYPE_4__* %1, %struct.TYPE_4__** %4, align 8
%13 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%14 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %13, i32 0, i32 1
%15 = load i32*, i32** %14, align 8
store i32* %15, i32** %5, align 8
%16 = load i32*, i32** %3, align 8
%17 = call i64 @vedis_value_is_null(i32* %16)
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %2
%20 = load i32*, i32** %5, align 8
%21 = call i32 @SyBlobAppend(i32* %20, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
br label %119
22: ; preds = %2
%23 = load i32*, i32** %3, align 8
%24 = call i64 @vedis_value_is_bool(i32* %23)
%25 = icmp ne i64 %24, 0
br i1 %25, label %26, label %42
26: ; preds = %22
%27 = load i32*, i32** %3, align 8
%28 = call i32 @vedis_value_to_bool(i32* %27)
store i32 %28, i32* %7, align 4
%29 = load i32, i32* %7, align 4
%30 = icmp ne i32 %29, 0
%31 = zext i1 %30 to i64
%32 = select i1 %30, i64 5, i64 6
%33 = trunc i64 %32 to i32
store i32 %33, i32* %8, align 4
%34 = load i32*, i32** %5, align 8
%35 = load i32, i32* %7, align 4
%36 = icmp ne i32 %35, 0
%37 = zext i1 %36 to i64
%38 = select i1 %36, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%39 = load i32, i32* %8, align 4
%40 = sub nsw i32 %39, 1
%41 = call i32 @SyBlobAppend(i32* %34, i8* %38, i32 %40)
br label %118
42: ; preds = %22
%43 = load i32*, i32** %3, align 8
%44 = call i64 @vedis_value_is_numeric(i32* %43)
%45 = icmp ne i64 %44, 0
br i1 %45, label %46, label %57
46: ; preds = %42
%47 = load i32*, i32** %3, align 8
%48 = call i64 @vedis_value_is_string(i32* %47)
%49 = icmp ne i64 %48, 0
br i1 %49, label %57, label %50
50: ; preds = %46
%51 = load i32*, i32** %3, align 8
%52 = call i8* @vedis_value_to_string(i32* %51, i32* %6)
store i8* %52, i8** %9, align 8
%53 = load i32*, i32** %5, align 8
%54 = load i8*, i8** %9, align 8
%55 = load i32, i32* %6, align 4
%56 = call i32 @SyBlobAppend(i32* %53, i8* %54, i32 %55)
br label %117
57: ; preds = %46, %42
%58 = load i32*, i32** %3, align 8
%59 = call i64 @vedis_value_is_string(i32* %58)
%60 = icmp ne i64 %59, 0
br i1 %60, label %61, label %97
61: ; preds = %57
%62 = load i32*, i32** %3, align 8
%63 = call i8* @vedis_value_to_string(i32* %62, i32* %6)
store i8* %63, i8** %10, align 8
%64 = load i8*, i8** %10, align 8
%65 = load i32, i32* %6, align 4
%66 = sext i32 %65 to i64
%67 = getelementptr inbounds i8, i8* %64, i64 %66
store i8* %67, i8** %11, align 8
%68 = load i32*, i32** %5, align 8
%69 = call i32 @SyBlobAppend(i32* %68, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 1)
br label %70
70: ; preds = %90, %61
%71 = load i8*, i8** %10, align 8
%72 = load i8*, i8** %11, align 8
%73 = icmp uge i8* %71, %72
br i1 %73, label %74, label %75
74: ; preds = %70
br label %94
75: ; preds = %70
%76 = load i8*, i8** %10, align 8
%77 = getelementptr inbounds i8, i8* %76, i64 0
%78 = load i8, i8* %77, align 1
%79 = sext i8 %78 to i32
store i32 %79, i32* %12, align 4
%80 = load i8*, i8** %10, align 8
%81 = getelementptr inbounds i8, i8* %80, i32 1
store i8* %81, i8** %10, align 8
%82 = load i32, i32* %12, align 4
%83 = icmp eq i32 %82, 34
br i1 %83, label %87, label %84
84: ; preds = %75
%85 = load i32, i32* %12, align 4
%86 = icmp eq i32 %85, 92
br i1 %86, label %87, label %90
87: ; preds = %84, %75
%88 = load i32*, i32** %5, align 8
%89 = call i32 @SyBlobAppend(i32* %88, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.4, i64 0, i64 0), i32 1)
br label %90
90: ; preds = %87, %84
%91 = load i32*, i32** %5, align 8
%92 = bitcast i32* %12 to i8*
%93 = call i32 @SyBlobAppend(i32* %91, i8* %92, i32 1)
br label %70
94: ; preds = %74
%95 = load i32*, i32** %5, align 8
%96 = call i32 @SyBlobAppend(i32* %95, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i64 0, i64 0), i32 1)
br label %116
97: ; preds = %57
%98 = load i32*, i32** %3, align 8
%99 = call i64 @vedis_value_is_array(i32* %98)
%100 = icmp ne i64 %99, 0
br i1 %100, label %101, label %112
101: ; preds = %97
%102 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%103 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %102, i32 0, i32 0
store i32 1, i32* %103, align 8
%104 = load i32*, i32** %5, align 8
%105 = call i32 @SyBlobAppend(i32* %104, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.5, i64 0, i64 0), i32 1)
%106 = load i32*, i32** %3, align 8
%107 = load i32, i32* @VmJsonArrayEncode, align 4
%108 = load %struct.TYPE_4__*, %struct.TYPE_4__** %4, align 8
%109 = call i32 @vedis_array_walk(i32* %106, i32 %107, %struct.TYPE_4__* %108)
%110 = load i32*, i32** %5, align 8
%111 = call i32 @SyBlobAppend(i32* %110, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.6, i64 0, i64 0), i32 1)
br label %115
112: ; preds = %97
%113 = load i32*, i32** %5, align 8
%114 = call i32 @SyBlobAppend(i32* %113, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 4)
br label %115
115: ; preds = %112, %101
br label %116
116: ; preds = %115, %94
br label %117
117: ; preds = %116, %50
br label %118
118: ; preds = %117, %26
br label %119
119: ; preds = %118, %19
ret i32 0
}
declare dso_local i64 @vedis_value_is_null(i32*)
declare dso_local i32 @SyBlobAppend(i32*, i8*, i32)
declare dso_local i64 @vedis_value_is_bool(i32*)
declare dso_local i32 @vedis_value_to_bool(i32*)
declare dso_local i64 @vedis_value_is_numeric(i32*)
declare dso_local i64 @vedis_value_is_string(i32*)
declare dso_local i8* @vedis_value_to_string(i32*, i32*)
declare dso_local i64 @vedis_value_is_array(i32*)
declare dso_local i32 @vedis_array_walk(i32*, i32, %struct.TYPE_4__*) | /* BEGIN FUNCTION-DEF VmJsonEncode LOC=UNKNOWN VKEY=4973 */
static sxi32 VmJsonEncode(vedis_value *pIn , json_private_data *pData )
{
SyBlob *pOut ;
int nByte ;
int iBool ;
int tmp ;
sxu32 iLen ;
char *tmp___0 ;
char const *zNum ;
char *tmp___1 ;
char const *zIn ;
char const *zEnd ;
int c ;
char *tmp___2 ;
scalar_t__ tmp___3 ;
scalar_t__ tmp___4 ;
scalar_t__ tmp___5 ;
scalar_t__ tmp___6 ;
scalar_t__ tmp___7 ;
scalar_t__ tmp___8 ;
unsigned long _TIG_FN_Yxnb_1_VmJsonEncode_next ;
{
_TIG_FN_Yxnb_1_VmJsonEncode_next = 15UL;
while (1) {
switch (_TIG_FN_Yxnb_1_VmJsonEncode_next) {
case 25UL: ;
if (tmp___8) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 40UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 6UL;
}
break;
case 4UL:
{
#line 76 "/tmp/forklift_obfu_lpzquiko/input.c"
tmp___1 = vedis_value_to_string(pIn, & nByte);
#line 76
zNum = (char const *)tmp___1;
#line 77
SyBlobAppend(pOut, zNum, nByte);
}
_TIG_FN_Yxnb_1_VmJsonEncode_next = 29UL;
break;
case 14UL:
#line 103
tmp___3 = vedis_value_is_array(pIn);
_TIG_FN_Yxnb_1_VmJsonEncode_next = 28UL;
break;
case 15UL: ;
_TIG_FN_Yxnb_1_VmJsonEncode_next = 42UL;
break;
case 31UL:
#line 99
SyBlobAppend(pOut, (char const *)(& c), (int )sizeof(char ));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 27UL;
break;
case 12UL:
#line 71
iLen = (sxu32 )sizeof("true");
_TIG_FN_Yxnb_1_VmJsonEncode_next = 9UL;
break;
case 8UL: ;
if (tmp___5) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 3UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 19UL;
}
break;
case 23UL:
{
#line 82
tmp___2 = vedis_value_to_string(pIn, & nByte);
#line 82
zIn = (char const *)tmp___2;
#line 83
zEnd = zIn + nByte;
#line 85
SyBlobAppend(pOut, (char const *)"\"", (int )sizeof(char ));
}
_TIG_FN_Yxnb_1_VmJsonEncode_next = 27UL;
break;
case 3UL:
#line 73
tmp___6 = vedis_value_is_string(pIn);
_TIG_FN_Yxnb_1_VmJsonEncode_next = 2UL;
break;
case 16UL:
#line 73
tmp___5 = vedis_value_is_numeric(pIn);
_TIG_FN_Yxnb_1_VmJsonEncode_next = 8UL;
break;
case 24UL: ;
if (((unsigned int )(~ ((c - 34) | (34 - c))) >> 31U) & 1) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 22UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 11UL;
}
break;
case 21UL: ;
if (tmp___7) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 38UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 16UL;
}
break;
case 36UL:
#line 96
SyBlobAppend(pOut, (char const *)"\\", (int )sizeof(char ));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 31UL;
break;
case 11UL: ;
if (((unsigned int )(~ ((c - 92) | (92 - c))) >> 31U) & 1) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 36UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 31UL;
}
break;
case 9UL: ;
if (iBool) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 32UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 17UL;
}
break;
case 19UL:
_L: /* CIL Label */
#line 78
tmp___4 = vedis_value_is_string(pIn);
_TIG_FN_Yxnb_1_VmJsonEncode_next = 0UL;
break;
case 32UL:
#line 72
tmp___0 = "true";
_TIG_FN_Yxnb_1_VmJsonEncode_next = 33UL;
break;
case 17UL:
#line 72
tmp___0 = "false";
_TIG_FN_Yxnb_1_VmJsonEncode_next = 33UL;
break;
case 40UL:
#line 66
SyBlobAppend(pOut, (char const *)"null", (int )(sizeof("null") - 1UL));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 29UL;
break;
case 6UL:
#line 67
tmp___7 = vedis_value_is_bool(pIn);
_TIG_FN_Yxnb_1_VmJsonEncode_next = 21UL;
break;
case 27UL: ;
if ((unsigned long )zEnd <= (unsigned long )zIn) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 7UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 39UL;
}
break;
case 38UL:
{
#line 68
tmp = vedis_value_to_bool(pIn);
#line 68
iBool = tmp;
}
_TIG_FN_Yxnb_1_VmJsonEncode_next = 35UL;
break;
case 22UL:
#line 96
SyBlobAppend(pOut, (char const *)"\\", (int )sizeof(char ));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 31UL;
break;
case 28UL: ;
if (tmp___3) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 20UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 41UL;
}
break;
case 33UL:
#line 72
SyBlobAppend(pOut, (char const *)tmp___0, ((iLen & ~ 1) + (iLen & ~ 1)) - (iLen ^ 1));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 29UL;
break;
case 37UL:
#line 71
iLen = (sxu32 )sizeof("false");
_TIG_FN_Yxnb_1_VmJsonEncode_next = 9UL;
break;
case 41UL:
#line 114
SyBlobAppend(pOut, (char const *)"null", (int )(sizeof("null") - 1UL));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 29UL;
break;
case 42UL:
{
#line 62
pOut = pData->pOut;
#line 64
tmp___8 = vedis_value_is_null(pIn);
}
_TIG_FN_Yxnb_1_VmJsonEncode_next = 25UL;
break;
case 0UL: ;
if (tmp___4) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 23UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 14UL;
}
break;
case 39UL:
{
#line 91
c = (int )*(zIn + 0);
#line 93
zIn ++;
}
_TIG_FN_Yxnb_1_VmJsonEncode_next = 24UL;
break;
case 7UL:
#line 102
SyBlobAppend(pOut, (char const *)"\"", (int )sizeof(char ));
_TIG_FN_Yxnb_1_VmJsonEncode_next = 29UL;
break;
case 35UL: ;
if (iBool) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 12UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 37UL;
}
break;
case 29UL: ;
return (0);
break;
case 2UL: ;
if (tmp___6) {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 19UL;
} else {
_TIG_FN_Yxnb_1_VmJsonEncode_next = 4UL;
}
break;
case 20UL:
{
#line 105
pData->isFirst = 1;
#line 107
SyBlobAppend(pOut, (char const *)"[", (int )sizeof(char ));
#line 109
vedis_array_walk(pIn, VmJsonArrayEncode, pData);
#line 111
SyBlobAppend(pOut, (char const *)"]", (int )sizeof(char ));
}
_TIG_FN_Yxnb_1_VmJsonEncode_next = 29UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF VmJsonEncode LOC=UNKNOWN VKEY=4973 */ | 1,566,942,273 | train_synth_compilable |
glad_debug_impl_glClampColor | void glad_debug_impl_glClampColor(GLenum arg0, GLenum arg1) {
_pre_call_callback("glClampColor", (void*)
# 340 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c" 3
glad_glClampColor
# 340 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
, 2, arg0, arg1);
glad_glClampColor(arg0, arg1);
_post_call_callback("glClampColor", (void*)
# 342 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c" 3
glad_glClampColor
# 342 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
, 2, arg0, arg1);
} | Flatten | .global glad_debug_impl_glClampColor
.type glad_debug_impl_glClampColor, %function
glad_debug_impl_glClampColor:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x0, :got:glad_glClampColor
ldr x1, [x0, #:got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _pre_call_callback
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl glad_glClampColor
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x0, :got:glad_glClampColor
ldr x1, [x0, #:got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _post_call_callback
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "glClampColor"
| .global glad_debug_impl_glClampColor
.type glad_debug_impl_glClampColor, %function
glad_debug_impl_glClampColor:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str xzr, [sp, 40]
.L7:
ldr x0, [sp, 40]
cmp x0, 2
beq .L8
ldr x0, [sp, 40]
cmp x0, 2
bhi .L9
ldr x0, [sp, 40]
cmp x0, 0
beq .L4
ldr x0, [sp, 40]
cmp x0, 1
bne .L9
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x1, :got:glad_glClampColor
ldr x1, [x1, :got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _pre_call_callback
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl glad_glClampColor
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x1, :got:glad_glClampColor
ldr x1, [x1, :got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _post_call_callback
mov x0, 2
str x0, [sp, 40]
b .L5
.L4:
mov x0, 1
str x0, [sp, 40]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size glad_debug_impl_glClampColor, .-glad_debug_impl_glClampColor | @.str = external hidden unnamed_addr constant [13 x i8], align 1
define dso_local void @glad_debug_impl_glClampColor(i32 %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
store i32 %0, i32* %3, align 4
store i32 %1, i32* %4, align 4
%5 = load i32, i32* %3, align 4
%6 = load i32, i32* %4, align 4
%7 = call i32 @_pre_call_callback(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* bitcast (i32 (i32, i32)* @glad_glClampColor to i8*), i32 2, i32 %5, i32 %6)
%8 = load i32, i32* %3, align 4
%9 = load i32, i32* %4, align 4
%10 = call i32 @glad_glClampColor(i32 %8, i32 %9)
%11 = load i32, i32* %3, align 4
%12 = load i32, i32* %4, align 4
%13 = call i32 @_post_call_callback(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* bitcast (i32 (i32, i32)* @glad_glClampColor to i8*), i32 2, i32 %11, i32 %12)
ret void
}
declare dso_local i32 @_pre_call_callback(i8*, i8*, i32, i32, i32)
declare dso_local i32 @glad_glClampColor(i32, i32)
declare dso_local i32 @_post_call_callback(i8*, i8*, i32, i32, i32) | /* BEGIN FUNCTION-DEF glad_debug_impl_glClampColor LOC=UNKNOWN VKEY=4911 */
void glad_debug_impl_glClampColor(GLenum arg0 , GLenum arg1 )
{
unsigned long _TIG_FN_fknl_1_glad_debug_impl_glClampColor_next ;
{
{
_TIG_FN_fknl_1_glad_debug_impl_glClampColor_next = 0UL;
}
while (1) {
switch (_TIG_FN_fknl_1_glad_debug_impl_glClampColor_next) {
case 1UL:
#line 46 "/tmp/forklift_obfu_llnlndc7/input.c"
_pre_call_callback("glClampColor", (void *)(& glad_glClampColor), 2, arg0, arg1);
#line 341 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
glad_glClampColor(arg0, arg1);
#line 342
_post_call_callback("glClampColor", (void *)(& glad_glClampColor), 2, arg0, arg1);
{
_TIG_FN_fknl_1_glad_debug_impl_glClampColor_next = 2UL;
}
break;
case 0UL: ;
{
_TIG_FN_fknl_1_glad_debug_impl_glClampColor_next = 1UL;
}
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF glad_debug_impl_glClampColor LOC=UNKNOWN VKEY=4911 */ | 943,239,974 | train_synth_compilable |
kill_unit | static void
kill_unit (Unit *u){
Node *n = extruct_node(&units, data2node(units, u));
insert_node(&dead_units, n, NULL);
if(u == selected_unit)
selected_unit = NULL;
else
fill_map(selected_unit);
} | EncodeArithmetic | .global kill_unit
.type kill_unit, %function
kill_unit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:units
ldr x0, [x0, #:got_lo12:units]
ldr w0, [x0]
ldr x1, [sp, 24]
bl data2node
mov w1, w0
adrp x0, :got:units
ldr x0, [x0, #:got_lo12:units]
bl extruct_node
str x0, [sp, 40]
mov x2, 0
ldr x1, [sp, 40]
adrp x0, :got:dead_units
ldr x0, [x0, #:got_lo12:dead_units]
bl insert_node
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bne .L2
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
str xzr, [x0]
b .L4
.L2:
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
ldr x0, [x0]
bl fill_map
.L4:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global kill_unit
.type kill_unit, %function
kill_unit:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, units
add x0, x0, :lo12:units
ldr w0, [x0]
ldr x1, [sp, 24]
bl data2node
str w0, [sp, 60]
ldr w1, [sp, 60]
adrp x0, units
add x0, x0, :lo12:units
bl extruct_node
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 40]
mov x2, 0
ldr x1, [sp, 40]
adrp x0, dead_units
add x0, x0, :lo12:dead_units
bl insert_node
ldr x0, [sp, 24]
adrp x1, selected_unit
add x1, x1, :lo12:selected_unit
ldr x1, [x1]
sub x1, x0, x1
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
ldr x0, [x0]
mov x2, x0
ldr x0, [sp, 24]
sub x0, x2, x0
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L11
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
str xzr, [x0]
b .L10
.L11:
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
ldr x0, [x0]
bl fill_map
nop
.L10:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size kill_unit, .-kill_unit | @units = external dso_local global i32, align 4
@dead_units = external dso_local global i32, align 4
@selected_unit = external dso_local global i32*, align 8
define dso_local void @kill_unit(i32* %0) {
%2 = alloca i32*, align 8
%3 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%4 = load i32, i32* @units, align 4
%5 = load i32*, i32** %2, align 8
%6 = call i32 @data2node(i32 %4, i32* %5)
%7 = call i32* @extruct_node(i32* @units, i32 %6)
store i32* %7, i32** %3, align 8
%8 = load i32*, i32** %3, align 8
%9 = call i32 @insert_node(i32* @dead_units, i32* %8, i32* null)
%10 = load i32*, i32** %2, align 8
%11 = load i32*, i32** @selected_unit, align 8
%12 = icmp eq i32* %10, %11
br i1 %12, label %13, label %14
13: ; preds = %1
store i32* null, i32** @selected_unit, align 8
br label %17
14: ; preds = %1
%15 = load i32*, i32** @selected_unit, align 8
%16 = call i32 @fill_map(i32* %15)
br label %17
17: ; preds = %14, %13
ret void
}
declare dso_local i32* @extruct_node(i32*, i32)
declare dso_local i32 @data2node(i32, i32*)
declare dso_local i32 @insert_node(i32*, i32*, i32*)
declare dso_local i32 @fill_map(i32*) | /* BEGIN FUNCTION-DEF kill_unit LOC=UNKNOWN VKEY=4911 */
static void kill_unit(Unit *u )
{
Node *n ;
int tmp ;
int *tmp___0 ;
{
{
#line 52 "/tmp/forklift_obfu_k_pe9cul/input.c"
tmp = data2node(units, u);
#line 52
tmp___0 = extruct_node(& units, tmp);
#line 52
n = tmp___0;
#line 53
insert_node(& dead_units, n, (int *)((void *)0));
}
#line 54
if ((int )((~ (((unsigned long )u - (unsigned long )selected_unit) | ((unsigned long )selected_unit - (unsigned long )u)) >> 63UL) & 1UL)) {
#line 55
selected_unit = (int *)((void *)0);
} else {
#line 57
fill_map(selected_unit);
}
#line 58
return;
}
}
/* END FUNCTION-DEF kill_unit LOC=UNKNOWN VKEY=4911 */ | 1,051,454,923 | train_synth_compilable |
kill_unit | static void
kill_unit (Unit *u){
Node *n = extruct_node(&units, data2node(units, u));
insert_node(&dead_units, n, NULL);
if(u == selected_unit)
selected_unit = NULL;
else
fill_map(selected_unit);
} | Flatten | .global kill_unit
.type kill_unit, %function
kill_unit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:units
ldr x0, [x0, #:got_lo12:units]
ldr w0, [x0]
ldr x1, [sp, 24]
bl data2node
mov w1, w0
adrp x0, :got:units
ldr x0, [x0, #:got_lo12:units]
bl extruct_node
str x0, [sp, 40]
mov x2, 0
ldr x1, [sp, 40]
adrp x0, :got:dead_units
ldr x0, [x0, #:got_lo12:dead_units]
bl insert_node
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bne .L2
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
str xzr, [x0]
b .L4
.L2:
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
ldr x0, [x0]
bl fill_map
.L4:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global kill_unit
.type kill_unit, %function
kill_unit:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
mov x0, 3
str x0, [sp, 56]
.L13:
ldr x0, [sp, 56]
cmp x0, 5
beq .L2
ldr x0, [sp, 56]
cmp x0, 5
bhi .L14
ldr x0, [sp, 56]
cmp x0, 4
beq .L15
ldr x0, [sp, 56]
cmp x0, 4
bhi .L14
ldr x0, [sp, 56]
cmp x0, 3
beq .L5
ldr x0, [sp, 56]
cmp x0, 3
bhi .L14
ldr x0, [sp, 56]
cmp x0, 2
beq .L6
ldr x0, [sp, 56]
cmp x0, 2
bhi .L14
ldr x0, [sp, 56]
cmp x0, 0
beq .L7
ldr x0, [sp, 56]
cmp x0, 1
beq .L8
b .L14
.L8:
ldr x0, [sp, 24]
adrp x1, selected_unit
add x1, x1, :lo12:selected_unit
ldr x1, [x1]
cmp x0, x1
bne .L10
mov x0, 2
str x0, [sp, 56]
b .L12
.L10:
str xzr, [sp, 56]
b .L12
.L5:
mov x0, 5
str x0, [sp, 56]
b .L12
.L2:
adrp x0, units
add x0, x0, :lo12:units
ldr w0, [x0]
ldr x1, [sp, 24]
bl data2node
str w0, [sp, 52]
ldr w1, [sp, 52]
adrp x0, units
add x0, x0, :lo12:units
bl extruct_node
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
mov x2, 0
ldr x1, [sp, 32]
adrp x0, dead_units
add x0, x0, :lo12:dead_units
bl insert_node
mov x0, 1
str x0, [sp, 56]
b .L12
.L7:
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
ldr x0, [x0]
bl fill_map
mov x0, 4
str x0, [sp, 56]
b .L12
.L6:
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
str xzr, [x0]
mov x0, 4
str x0, [sp, 56]
b .L12
.L14:
nop
.L12:
b .L13
.L15:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size kill_unit, .-kill_unit | @units = external dso_local global i32, align 4
@dead_units = external dso_local global i32, align 4
@selected_unit = external dso_local global i32*, align 8
define dso_local void @kill_unit(i32* %0) {
%2 = alloca i32*, align 8
%3 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%4 = load i32, i32* @units, align 4
%5 = load i32*, i32** %2, align 8
%6 = call i32 @data2node(i32 %4, i32* %5)
%7 = call i32* @extruct_node(i32* @units, i32 %6)
store i32* %7, i32** %3, align 8
%8 = load i32*, i32** %3, align 8
%9 = call i32 @insert_node(i32* @dead_units, i32* %8, i32* null)
%10 = load i32*, i32** %2, align 8
%11 = load i32*, i32** @selected_unit, align 8
%12 = icmp eq i32* %10, %11
br i1 %12, label %13, label %14
13: ; preds = %1
store i32* null, i32** @selected_unit, align 8
br label %17
14: ; preds = %1
%15 = load i32*, i32** @selected_unit, align 8
%16 = call i32 @fill_map(i32* %15)
br label %17
17: ; preds = %14, %13
ret void
}
declare dso_local i32* @extruct_node(i32*, i32)
declare dso_local i32 @data2node(i32, i32*)
declare dso_local i32 @insert_node(i32*, i32*, i32*)
declare dso_local i32 @fill_map(i32*) | /* BEGIN FUNCTION-DEF kill_unit LOC=UNKNOWN VKEY=4911 */
static void kill_unit(Unit *u )
{
Node *n ;
int tmp ;
int *tmp___0 ;
unsigned long _TIG_FN_UOlB_1_kill_unit_next ;
{
{
_TIG_FN_UOlB_1_kill_unit_next = 3UL;
}
while (1) {
switch (_TIG_FN_UOlB_1_kill_unit_next) {
case 4UL: ;
return;
break;
case 1UL: ;
if ((unsigned long )u == (unsigned long )selected_unit) {
{
_TIG_FN_UOlB_1_kill_unit_next = 2UL;
}
} else {
{
_TIG_FN_UOlB_1_kill_unit_next = 0UL;
}
}
break;
case 3UL: ;
{
_TIG_FN_UOlB_1_kill_unit_next = 5UL;
}
break;
case 5UL:
#line 52 "/tmp/forklift_obfu_zsez25zd/input.c"
tmp = data2node(units, u);
#line 52
tmp___0 = extruct_node(& units, tmp);
#line 52
n = tmp___0;
#line 53
insert_node(& dead_units, n, (int *)((void *)0));
{
_TIG_FN_UOlB_1_kill_unit_next = 1UL;
}
break;
case 0UL:
#line 57
fill_map(selected_unit);
{
_TIG_FN_UOlB_1_kill_unit_next = 4UL;
}
break;
case 2UL:
#line 55
selected_unit = (int *)((void *)0);
{
_TIG_FN_UOlB_1_kill_unit_next = 4UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF kill_unit LOC=UNKNOWN VKEY=4911 */ | 735,034,881 | train_synth_compilable |
kill_unit | static void
kill_unit (Unit *u){
Node *n = extruct_node(&units, data2node(units, u));
insert_node(&dead_units, n, NULL);
if(u == selected_unit)
selected_unit = NULL;
else
fill_map(selected_unit);
} | Flatten+EncodeArithmetic | .global kill_unit
.type kill_unit, %function
kill_unit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:units
ldr x0, [x0, #:got_lo12:units]
ldr w0, [x0]
ldr x1, [sp, 24]
bl data2node
mov w1, w0
adrp x0, :got:units
ldr x0, [x0, #:got_lo12:units]
bl extruct_node
str x0, [sp, 40]
mov x2, 0
ldr x1, [sp, 40]
adrp x0, :got:dead_units
ldr x0, [x0, #:got_lo12:dead_units]
bl insert_node
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bne .L2
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
str xzr, [x0]
b .L4
.L2:
adrp x0, :got:selected_unit
ldr x0, [x0, #:got_lo12:selected_unit]
ldr x0, [x0]
bl fill_map
.L4:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global kill_unit
.type kill_unit, %function
kill_unit:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
mov x0, 3
str x0, [sp, 56]
.L22:
ldr x0, [sp, 56]
cmp x0, 5
beq .L11
ldr x0, [sp, 56]
cmp x0, 5
bhi .L23
ldr x0, [sp, 56]
cmp x0, 4
beq .L24
ldr x0, [sp, 56]
cmp x0, 4
bhi .L23
ldr x0, [sp, 56]
cmp x0, 3
beq .L14
ldr x0, [sp, 56]
cmp x0, 3
bhi .L23
ldr x0, [sp, 56]
cmp x0, 2
beq .L15
ldr x0, [sp, 56]
cmp x0, 2
bhi .L23
ldr x0, [sp, 56]
cmp x0, 0
beq .L16
ldr x0, [sp, 56]
cmp x0, 1
beq .L17
b .L23
.L17:
ldr x0, [sp, 24]
adrp x1, selected_unit
add x1, x1, :lo12:selected_unit
ldr x1, [x1]
sub x1, x0, x1
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
ldr x0, [x0]
mov x2, x0
ldr x0, [sp, 24]
sub x0, x2, x0
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L19
mov x0, 2
str x0, [sp, 56]
b .L21
.L19:
str xzr, [sp, 56]
b .L21
.L14:
mov x0, 5
str x0, [sp, 56]
b .L21
.L11:
adrp x0, units
add x0, x0, :lo12:units
ldr w0, [x0]
ldr x1, [sp, 24]
bl data2node
str w0, [sp, 52]
ldr w1, [sp, 52]
adrp x0, units
add x0, x0, :lo12:units
bl extruct_node
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
mov x2, 0
ldr x1, [sp, 32]
adrp x0, dead_units
add x0, x0, :lo12:dead_units
bl insert_node
mov x0, 1
str x0, [sp, 56]
b .L21
.L16:
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
ldr x0, [x0]
bl fill_map
mov x0, 4
str x0, [sp, 56]
b .L21
.L15:
adrp x0, selected_unit
add x0, x0, :lo12:selected_unit
str xzr, [x0]
mov x0, 4
str x0, [sp, 56]
b .L21
.L23:
nop
.L21:
b .L22
.L24:
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size kill_unit, .-kill_unit | @units = external dso_local global i32, align 4
@dead_units = external dso_local global i32, align 4
@selected_unit = external dso_local global i32*, align 8
define dso_local void @kill_unit(i32* %0) {
%2 = alloca i32*, align 8
%3 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%4 = load i32, i32* @units, align 4
%5 = load i32*, i32** %2, align 8
%6 = call i32 @data2node(i32 %4, i32* %5)
%7 = call i32* @extruct_node(i32* @units, i32 %6)
store i32* %7, i32** %3, align 8
%8 = load i32*, i32** %3, align 8
%9 = call i32 @insert_node(i32* @dead_units, i32* %8, i32* null)
%10 = load i32*, i32** %2, align 8
%11 = load i32*, i32** @selected_unit, align 8
%12 = icmp eq i32* %10, %11
br i1 %12, label %13, label %14
13: ; preds = %1
store i32* null, i32** @selected_unit, align 8
br label %17
14: ; preds = %1
%15 = load i32*, i32** @selected_unit, align 8
%16 = call i32 @fill_map(i32* %15)
br label %17
17: ; preds = %14, %13
ret void
}
declare dso_local i32* @extruct_node(i32*, i32)
declare dso_local i32 @data2node(i32, i32*)
declare dso_local i32 @insert_node(i32*, i32*, i32*)
declare dso_local i32 @fill_map(i32*) | /* BEGIN FUNCTION-DEF kill_unit LOC=UNKNOWN VKEY=4918 */
static void kill_unit(Unit *u )
{
Node *n ;
int tmp ;
int *tmp___0 ;
unsigned long _TIG_FN_i5lf_1_kill_unit_next ;
{
_TIG_FN_i5lf_1_kill_unit_next = 3UL;
while (1) {
switch (_TIG_FN_i5lf_1_kill_unit_next) {
case 4UL: ;
return;
break;
case 1UL: ;
if ((int )((~ (((unsigned long )u - (unsigned long )selected_unit) | ((unsigned long )selected_unit - (unsigned long )u)) >> 63UL) & 1UL)) {
_TIG_FN_i5lf_1_kill_unit_next = 2UL;
} else {
_TIG_FN_i5lf_1_kill_unit_next = 0UL;
}
break;
case 3UL: ;
_TIG_FN_i5lf_1_kill_unit_next = 5UL;
break;
case 5UL:
{
#line 52 "/tmp/forklift_obfu_arzqorm9/input.c"
tmp = data2node(units, u);
#line 52
tmp___0 = extruct_node(& units, tmp);
#line 52
n = tmp___0;
#line 53
insert_node(& dead_units, n, (int *)((void *)0));
}
_TIG_FN_i5lf_1_kill_unit_next = 1UL;
break;
case 0UL:
#line 57
fill_map(selected_unit);
_TIG_FN_i5lf_1_kill_unit_next = 4UL;
break;
case 2UL:
#line 55
selected_unit = (int *)((void *)0);
_TIG_FN_i5lf_1_kill_unit_next = 4UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF kill_unit LOC=UNKNOWN VKEY=4918 */ | 701,808,367 | train_synth_compilable |
glad_debug_impl_glClampColor | void glad_debug_impl_glClampColor(GLenum arg0, GLenum arg1) {
_pre_call_callback("glClampColor", (void*)
# 340 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c" 3
glad_glClampColor
# 340 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
, 2, arg0, arg1);
glad_glClampColor(arg0, arg1);
_post_call_callback("glClampColor", (void*)
# 342 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c" 3
glad_glClampColor
# 342 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
, 2, arg0, arg1);
} | EncodeArithmetic | .global glad_debug_impl_glClampColor
.type glad_debug_impl_glClampColor, %function
glad_debug_impl_glClampColor:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x0, :got:glad_glClampColor
ldr x1, [x0, #:got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _pre_call_callback
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl glad_glClampColor
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x0, :got:glad_glClampColor
ldr x1, [x0, #:got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _post_call_callback
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "glClampColor"
| .global glad_debug_impl_glClampColor
.type glad_debug_impl_glClampColor, %function
glad_debug_impl_glClampColor:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x1, :got:glad_glClampColor
ldr x1, [x1, :got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _pre_call_callback
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl glad_glClampColor
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x1, :got:glad_glClampColor
ldr x1, [x1, :got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _post_call_callback
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size glad_debug_impl_glClampColor, .-glad_debug_impl_glClampColor | @.str = external hidden unnamed_addr constant [13 x i8], align 1
define dso_local void @glad_debug_impl_glClampColor(i32 %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
store i32 %0, i32* %3, align 4
store i32 %1, i32* %4, align 4
%5 = load i32, i32* %3, align 4
%6 = load i32, i32* %4, align 4
%7 = call i32 @_pre_call_callback(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* bitcast (i32 (i32, i32)* @glad_glClampColor to i8*), i32 2, i32 %5, i32 %6)
%8 = load i32, i32* %3, align 4
%9 = load i32, i32* %4, align 4
%10 = call i32 @glad_glClampColor(i32 %8, i32 %9)
%11 = load i32, i32* %3, align 4
%12 = load i32, i32* %4, align 4
%13 = call i32 @_post_call_callback(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* bitcast (i32 (i32, i32)* @glad_glClampColor to i8*), i32 2, i32 %11, i32 %12)
ret void
}
declare dso_local i32 @_pre_call_callback(i8*, i8*, i32, i32, i32)
declare dso_local i32 @glad_glClampColor(i32, i32)
declare dso_local i32 @_post_call_callback(i8*, i8*, i32, i32, i32) | /* BEGIN FUNCTION-DEF glad_debug_impl_glClampColor LOC=UNKNOWN VKEY=4911 */
void glad_debug_impl_glClampColor(GLenum arg0 , GLenum arg1 )
{
{
{
#line 46 "/tmp/forklift_obfu_4rpiwqvq/input.c"
_pre_call_callback("glClampColor", (void *)(& glad_glClampColor), 2, arg0, arg1);
#line 341 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
glad_glClampColor(arg0, arg1);
#line 342
_post_call_callback("glClampColor", (void *)(& glad_glClampColor), 2, arg0, arg1);
}
#line 343
return;
}
}
/* END FUNCTION-DEF glad_debug_impl_glClampColor LOC=UNKNOWN VKEY=4911 */ | 1,392,783,743 | train_synth_compilable |
test_region_1 | void test_region_1() {
BEGIN_TEST("region-test-1");
void* p = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", p);
dbg_print_region_info();
void* q = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", q);
dbg_print_region_info();
void* r = region_alloc(0x2000, "Test region");
dbg_printf("Allocated two-page region: 0x%p\n", r);
dbg_print_region_info();
void* s = region_alloc(0x10000, "Test region");
dbg_printf("Allocated 16-page region: 0x%p\n", s);
dbg_print_region_info();
region_free(p);
dbg_printf("Freed region 0x%p\n", p);
dbg_print_region_info();
region_free(r);
dbg_printf("Freed region 0x%p\n", r);
dbg_print_region_info();
p = region_alloc(0x1000, "Test region");
dbg_printf("Allocated one-page region: 0x%p\n", p);
dbg_print_region_info();
region_free(q);
dbg_printf("Freed region 0x%p\n", q);
dbg_print_region_info();
region_free(p);
dbg_printf("Freed region 0x%p\n", p);
dbg_print_region_info();
region_free(s);
dbg_printf("Freed region 0x%p\n", s);
dbg_print_region_info();
TEST_OK;
} | Flatten+EncodeArithmetic | .global test_region_1
.type test_region_1, %function
test_region_1:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl BEGIN_TEST
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 8192
bl region_alloc
str x0, [sp, 32]
ldr x1, [sp, 32]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 65536
bl region_alloc
str x0, [sp, 40]
ldr x1, [sp, 40]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 32]
bl region_free
ldr x1, [sp, 32]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 24]
bl region_free
ldr x1, [sp, 24]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 16]
bl region_free
ldr x1, [sp, 16]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 40]
bl region_free
ldr x1, [sp, 40]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC4: .string "Allocated 16-page region: 0x%p\n"
.LC2: .string "Allocated one-page region: 0x%p\n"
.LC3: .string "Allocated two-page region: 0x%p\n"
.LC5: .string "Freed region 0x%p\n"
.LC1: .string "Test region"
.LC0: .string "region-test-1"
| .global test_region_1
.type test_region_1, %function
test_region_1:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str xzr, [sp, 88]
.L7:
ldr x0, [sp, 88]
cmp x0, 2
beq .L8
ldr x0, [sp, 88]
cmp x0, 2
bhi .L9
ldr x0, [sp, 88]
cmp x0, 0
beq .L4
ldr x0, [sp, 88]
cmp x0, 1
bne .L9
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl BEGIN_TEST
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 80]
ldr x0, [sp, 80]
str x0, [sp, 72]
ldr x1, [sp, 72]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 64]
ldr x0, [sp, 64]
str x0, [sp, 56]
ldr x1, [sp, 56]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 8192
bl region_alloc
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 40]
ldr x1, [sp, 40]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 65536
bl region_alloc
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 72]
bl region_free
ldr x1, [sp, 72]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 40]
bl region_free
ldr x1, [sp, 40]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov w0, 4096
bl region_alloc
str x0, [sp, 72]
ldr x1, [sp, 72]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 56]
bl region_free
ldr x1, [sp, 56]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 72]
bl region_free
ldr x1, [sp, 72]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
ldr x0, [sp, 24]
bl region_free
ldr x1, [sp, 24]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl dbg_printf
bl dbg_print_region_info
mov x0, 2
str x0, [sp, 88]
b .L5
.L4:
mov x0, 1
str x0, [sp, 88]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size test_region_1, .-test_region_1 | @.str = external hidden unnamed_addr constant [14 x i8], align 1
@.str.1 = external hidden unnamed_addr constant [12 x i8], align 1
@.str.2 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.3 = external hidden unnamed_addr constant [33 x i8], align 1
@.str.4 = external hidden unnamed_addr constant [32 x i8], align 1
@.str.5 = external hidden unnamed_addr constant [19 x i8], align 1
@TEST_OK = external dso_local global i32, align 4
define dso_local void @test_region_1() {
%1 = alloca i8*, align 8
%2 = alloca i8*, align 8
%3 = alloca i8*, align 8
%4 = alloca i8*, align 8
%5 = call i32 @BEGIN_TEST(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %6, i8** %1, align 8
%7 = load i8*, i8** %1, align 8
%8 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %7)
%9 = call i32 (...) @dbg_print_region_info()
%10 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %10, i8** %2, align 8
%11 = load i8*, i8** %2, align 8
%12 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %11)
%13 = call i32 (...) @dbg_print_region_info()
%14 = call i8* @region_alloc(i32 8192, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %14, i8** %3, align 8
%15 = load i8*, i8** %3, align 8
%16 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.3, i64 0, i64 0), i8* %15)
%17 = call i32 (...) @dbg_print_region_info()
%18 = call i8* @region_alloc(i32 65536, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %18, i8** %4, align 8
%19 = load i8*, i8** %4, align 8
%20 = call i32 @dbg_printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.4, i64 0, i64 0), i8* %19)
%21 = call i32 (...) @dbg_print_region_info()
%22 = load i8*, i8** %1, align 8
%23 = call i32 @region_free(i8* %22)
%24 = load i8*, i8** %1, align 8
%25 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %24)
%26 = call i32 (...) @dbg_print_region_info()
%27 = load i8*, i8** %3, align 8
%28 = call i32 @region_free(i8* %27)
%29 = load i8*, i8** %3, align 8
%30 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %29)
%31 = call i32 (...) @dbg_print_region_info()
%32 = call i8* @region_alloc(i32 4096, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
store i8* %32, i8** %1, align 8
%33 = load i8*, i8** %1, align 8
%34 = call i32 @dbg_printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.2, i64 0, i64 0), i8* %33)
%35 = call i32 (...) @dbg_print_region_info()
%36 = load i8*, i8** %2, align 8
%37 = call i32 @region_free(i8* %36)
%38 = load i8*, i8** %2, align 8
%39 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %38)
%40 = call i32 (...) @dbg_print_region_info()
%41 = load i8*, i8** %1, align 8
%42 = call i32 @region_free(i8* %41)
%43 = load i8*, i8** %1, align 8
%44 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %43)
%45 = call i32 (...) @dbg_print_region_info()
%46 = load i8*, i8** %4, align 8
%47 = call i32 @region_free(i8* %46)
%48 = load i8*, i8** %4, align 8
%49 = call i32 @dbg_printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i8* %48)
%50 = call i32 (...) @dbg_print_region_info()
%51 = load i32, i32* @TEST_OK, align 4
ret void
}
declare dso_local i32 @BEGIN_TEST(i8*)
declare dso_local i8* @region_alloc(i32, i8*)
declare dso_local i32 @dbg_printf(i8*, i8*)
declare dso_local i32 @dbg_print_region_info(...)
declare dso_local i32 @region_free(i8*) | /* BEGIN FUNCTION-DEF test_region_1 LOC=UNKNOWN VKEY=4919 */
void test_region_1(void)
{
void *p ;
void *tmp ;
void *q ;
void *tmp___0 ;
void *r ;
void *tmp___1 ;
void *s ;
void *tmp___2 ;
unsigned long _TIG_FN_WEpE_1_test_region_1_next ;
{
_TIG_FN_WEpE_1_test_region_1_next = 0UL;
while (1) {
switch (_TIG_FN_WEpE_1_test_region_1_next) {
case 1UL:
{
#line 48 "/tmp/forklift_obfu_bq_gqtlz/input.c"
BEGIN_TEST("region-test-1");
#line 50
tmp = region_alloc(0x1000, "Test region");
#line 50
p = tmp;
#line 51
dbg_printf("Allocated one-page region: 0x%p\n", p);
#line 52
dbg_print_region_info();
#line 54
tmp___0 = region_alloc(0x1000, "Test region");
#line 54
q = tmp___0;
#line 55
dbg_printf("Allocated one-page region: 0x%p\n", q);
#line 56
dbg_print_region_info();
#line 58
tmp___1 = region_alloc(0x2000, "Test region");
#line 58
r = tmp___1;
#line 59
dbg_printf("Allocated two-page region: 0x%p\n", r);
#line 60
dbg_print_region_info();
#line 62
tmp___2 = region_alloc(0x10000, "Test region");
#line 62
s = tmp___2;
#line 63
dbg_printf("Allocated 16-page region: 0x%p\n", s);
#line 64
dbg_print_region_info();
#line 66
region_free(p);
#line 67
dbg_printf("Freed region 0x%p\n", p);
#line 68
dbg_print_region_info();
#line 70
region_free(r);
#line 71
dbg_printf("Freed region 0x%p\n", r);
#line 72
dbg_print_region_info();
#line 74
p = region_alloc(0x1000, "Test region");
#line 75
dbg_printf("Allocated one-page region: 0x%p\n", p);
#line 76
dbg_print_region_info();
#line 78
region_free(q);
#line 79
dbg_printf("Freed region 0x%p\n", q);
#line 80
dbg_print_region_info();
#line 82
region_free(p);
#line 83
dbg_printf("Freed region 0x%p\n", p);
#line 84
dbg_print_region_info();
#line 86
region_free(s);
#line 87
dbg_printf("Freed region 0x%p\n", s);
#line 88
dbg_print_region_info();
}
_TIG_FN_WEpE_1_test_region_1_next = 2UL;
break;
case 0UL: ;
_TIG_FN_WEpE_1_test_region_1_next = 1UL;
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF test_region_1 LOC=UNKNOWN VKEY=4919 */ | 1,159,417,075 | train_synth_compilable |
glad_debug_impl_glClampColor | void glad_debug_impl_glClampColor(GLenum arg0, GLenum arg1) {
_pre_call_callback("glClampColor", (void*)
# 340 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c" 3
glad_glClampColor
# 340 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
, 2, arg0, arg1);
glad_glClampColor(arg0, arg1);
_post_call_callback("glClampColor", (void*)
# 342 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c" 3
glad_glClampColor
# 342 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
, 2, arg0, arg1);
} | Flatten+EncodeArithmetic | .global glad_debug_impl_glClampColor
.type glad_debug_impl_glClampColor, %function
glad_debug_impl_glClampColor:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x0, :got:glad_glClampColor
ldr x1, [x0, #:got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _pre_call_callback
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl glad_glClampColor
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x0, :got:glad_glClampColor
ldr x1, [x0, #:got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _post_call_callback
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "glClampColor"
| .global glad_debug_impl_glClampColor
.type glad_debug_impl_glClampColor, %function
glad_debug_impl_glClampColor:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str xzr, [sp, 40]
.L13:
ldr x0, [sp, 40]
cmp x0, 2
beq .L14
ldr x0, [sp, 40]
cmp x0, 2
bhi .L15
ldr x0, [sp, 40]
cmp x0, 0
beq .L10
ldr x0, [sp, 40]
cmp x0, 1
bne .L15
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x1, :got:glad_glClampColor
ldr x1, [x1, :got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _pre_call_callback
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl glad_glClampColor
ldr w4, [sp, 24]
ldr w3, [sp, 28]
mov w2, 2
adrp x1, :got:glad_glClampColor
ldr x1, [x1, :got_lo12:glad_glClampColor]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl _post_call_callback
mov x0, 2
str x0, [sp, 40]
b .L11
.L10:
mov x0, 1
str x0, [sp, 40]
b .L11
.L15:
nop
.L11:
b .L13
.L14:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size glad_debug_impl_glClampColor, .-glad_debug_impl_glClampColor | @.str = external hidden unnamed_addr constant [13 x i8], align 1
define dso_local void @glad_debug_impl_glClampColor(i32 %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
store i32 %0, i32* %3, align 4
store i32 %1, i32* %4, align 4
%5 = load i32, i32* %3, align 4
%6 = load i32, i32* %4, align 4
%7 = call i32 @_pre_call_callback(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* bitcast (i32 (i32, i32)* @glad_glClampColor to i8*), i32 2, i32 %5, i32 %6)
%8 = load i32, i32* %3, align 4
%9 = load i32, i32* %4, align 4
%10 = call i32 @glad_glClampColor(i32 %8, i32 %9)
%11 = load i32, i32* %3, align 4
%12 = load i32, i32* %4, align 4
%13 = call i32 @_post_call_callback(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* bitcast (i32 (i32, i32)* @glad_glClampColor to i8*), i32 2, i32 %11, i32 %12)
ret void
}
declare dso_local i32 @_pre_call_callback(i8*, i8*, i32, i32, i32)
declare dso_local i32 @glad_glClampColor(i32, i32)
declare dso_local i32 @_post_call_callback(i8*, i8*, i32, i32, i32) | /* BEGIN FUNCTION-DEF glad_debug_impl_glClampColor LOC=UNKNOWN VKEY=4916 */
void glad_debug_impl_glClampColor(GLenum arg0 , GLenum arg1 )
{
unsigned long _TIG_FN_h5gb_1_glad_debug_impl_glClampColor_next ;
{
_TIG_FN_h5gb_1_glad_debug_impl_glClampColor_next = 0UL;
while (1) {
switch (_TIG_FN_h5gb_1_glad_debug_impl_glClampColor_next) {
case 1UL:
{
#line 46 "/tmp/forklift_obfu_ufd3v21k/input.c"
_pre_call_callback("glClampColor", (void *)(& glad_glClampColor), 2, arg0, arg1);
#line 341 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/MrMetric/block_thingy/refs/heads/master/lib/glad/glad.debug.c"
glad_glClampColor(arg0, arg1);
#line 342
_post_call_callback("glClampColor", (void *)(& glad_glClampColor), 2, arg0, arg1);
}
_TIG_FN_h5gb_1_glad_debug_impl_glClampColor_next = 2UL;
break;
case 0UL: ;
_TIG_FN_h5gb_1_glad_debug_impl_glClampColor_next = 1UL;
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF glad_debug_impl_glClampColor LOC=UNKNOWN VKEY=4916 */ | 240,251,661 | train_synth_compilable |
semaphore_wait | void semaphore_wait(SEMAPHORE *sem) { sem_wait(sem); } | Flatten | .global semaphore_wait
.type semaphore_wait, %function
semaphore_wait:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl sem_wait
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global semaphore_wait
.type semaphore_wait, %function
semaphore_wait:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str xzr, [sp, 40]
.L12:
ldr x0, [sp, 40]
cmp x0, 0
beq .L8
ldr x0, [sp, 40]
cmp x0, 1
bne .L14
b .L13
.L8:
ldr x0, [sp, 24]
bl sem_wait
mov x0, 1
str x0, [sp, 40]
b .L11
.L14:
nop
.L11:
b .L12
.L13:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size semaphore_wait, .-semaphore_wait | define dso_local void @semaphore_wait(i32* %0) {
%2 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%3 = load i32*, i32** %2, align 8
%4 = call i32 @sem_wait(i32* %3)
ret void
}
declare dso_local i32 @sem_wait(i32*) | /* BEGIN FUNCTION-DEF semaphore_wait LOC=UNKNOWN VKEY=4884 */
void semaphore_wait(SEMAPHORE *sem )
{
unsigned long _TIG_FN_iz2Q_1_semaphore_wait_next ;
{
{
_TIG_FN_iz2Q_1_semaphore_wait_next = 0UL;
}
while (1) {
switch (_TIG_FN_iz2Q_1_semaphore_wait_next) {
case 1UL: ;
return;
break;
case 0UL:
#line 43
sem_wait(sem);
{
_TIG_FN_iz2Q_1_semaphore_wait_next = 1UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF semaphore_wait LOC=UNKNOWN VKEY=4884 */ | 906,164,396 | train_synth_compilable |
semaphore_wait | void semaphore_wait(SEMAPHORE *sem) { sem_wait(sem); } | Flatten+EncodeArithmetic | .global semaphore_wait
.type semaphore_wait, %function
semaphore_wait:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl sem_wait
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global semaphore_wait
.type semaphore_wait, %function
semaphore_wait:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str xzr, [sp, 40]
.L6:
ldr x0, [sp, 40]
cmp x0, 0
beq .L2
ldr x0, [sp, 40]
cmp x0, 1
bne .L8
b .L7
.L2:
ldr x0, [sp, 24]
bl sem_wait
mov x0, 1
str x0, [sp, 40]
b .L5
.L8:
nop
.L5:
b .L6
.L7:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size semaphore_wait, .-semaphore_wait | define dso_local void @semaphore_wait(i32* %0) {
%2 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%3 = load i32*, i32** %2, align 8
%4 = call i32 @sem_wait(i32* %3)
ret void
}
declare dso_local i32 @sem_wait(i32*) | /* BEGIN FUNCTION-DEF semaphore_wait LOC=UNKNOWN VKEY=4888 */
void semaphore_wait(SEMAPHORE *sem )
{
unsigned long _TIG_FN_dkgn_1_semaphore_wait_next ;
{
_TIG_FN_dkgn_1_semaphore_wait_next = 0UL;
while (1) {
switch (_TIG_FN_dkgn_1_semaphore_wait_next) {
case 1UL: ;
return;
break;
case 0UL:
#line 43 "/tmp/forklift_obfu_lkpran2n/input.c"
sem_wait(sem);
_TIG_FN_dkgn_1_semaphore_wait_next = 1UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF semaphore_wait LOC=UNKNOWN VKEY=4888 */ | 913,224,047 | train_synth_compilable |
gr_lve_end | void gr_lve_end() {
if (in_lve && !in_mutex_refcnt) {
in_hook = 1;
hooks->exit(&lve_cookie);
in_hook = 0;
}
in_lve = 0;
in_mutex_refcnt = 0;
} | Flatten | .global gr_lve_end
.type gr_lve_end, %function
gr_lve_end:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:in_lve
ldr x0, [x0, #:got_lo12:in_lve]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:in_mutex_refcnt
ldr x0, [x0, #:got_lo12:in_mutex_refcnt]
ldr x0, [x0]
cmp x0, 0
bne .L2
adrp x0, :got:in_hook
ldr x0, [x0, #:got_lo12:in_hook]
mov w1, 1
str w1, [x0]
adrp x0, :got:hooks
ldr x0, [x0, #:got_lo12:hooks]
ldr x0, [x0]
ldr x1, [x0]
adrp x0, :got:lve_cookie
ldr x0, [x0, #:got_lo12:lve_cookie]
blr x1
adrp x0, :got:in_hook
ldr x0, [x0, #:got_lo12:in_hook]
str wzr, [x0]
.L2:
adrp x0, :got:in_lve
ldr x0, [x0, #:got_lo12:in_lve]
str xzr, [x0]
adrp x0, :got:in_mutex_refcnt
ldr x0, [x0, #:got_lo12:in_mutex_refcnt]
str xzr, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global gr_lve_end
.type gr_lve_end, %function
gr_lve_end:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 3
str x0, [sp, 24]
.L14:
ldr x0, [sp, 24]
cmp x0, 6
beq .L2
ldr x0, [sp, 24]
cmp x0, 6
bhi .L15
ldr x0, [sp, 24]
cmp x0, 5
beq .L16
ldr x0, [sp, 24]
cmp x0, 5
bhi .L15
ldr x0, [sp, 24]
cmp x0, 4
beq .L5
ldr x0, [sp, 24]
cmp x0, 4
bhi .L15
ldr x0, [sp, 24]
cmp x0, 2
beq .L6
ldr x0, [sp, 24]
cmp x0, 3
beq .L7
b .L15
.L5:
adrp x0, in_lve
add x0, x0, :lo12:in_lve
str xzr, [x0]
adrp x0, in_mutex_refcnt
add x0, x0, :lo12:in_mutex_refcnt
str xzr, [x0]
mov x0, 5
str x0, [sp, 24]
b .L8
.L7:
adrp x0, in_lve
add x0, x0, :lo12:in_lve
ldr x0, [x0]
cmp x0, 0
beq .L9
mov x0, 6
str x0, [sp, 24]
b .L8
.L9:
mov x0, 4
str x0, [sp, 24]
b .L8
.L2:
adrp x0, in_mutex_refcnt
add x0, x0, :lo12:in_mutex_refcnt
ldr x0, [x0]
cmp x0, 0
bne .L11
mov x0, 2
str x0, [sp, 24]
b .L8
.L11:
mov x0, 4
str x0, [sp, 24]
b .L8
.L6:
adrp x0, in_hook
add x0, x0, :lo12:in_hook
mov w1, 1
str w1, [x0]
adrp x0, hooks
add x0, x0, :lo12:hooks
ldr x0, [x0]
ldr x1, [x0]
adrp x0, lve_cookie
add x0, x0, :lo12:lve_cookie
blr x1
adrp x0, in_hook
add x0, x0, :lo12:in_hook
str wzr, [x0]
mov x0, 4
str x0, [sp, 24]
b .L8
.L15:
nop
.L8:
b .L14
.L16:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size gr_lve_end, .-gr_lve_end | %struct.TYPE_2__ = type { i32 (i32*)* }
@in_lve = external dso_local global i64, align 8
@in_mutex_refcnt = external dso_local global i64, align 8
@in_hook = external dso_local global i32, align 4
@hooks = external dso_local global %struct.TYPE_2__*, align 8
@lve_cookie = external dso_local global i32, align 4
define dso_local void @gr_lve_end() {
%1 = load i64, i64* @in_lve, align 8
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %11
3: ; preds = %0
%4 = load i64, i64* @in_mutex_refcnt, align 8
%5 = icmp ne i64 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %3
store i32 1, i32* @in_hook, align 4
%7 = load %struct.TYPE_2__*, %struct.TYPE_2__** @hooks, align 8
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
%9 = load i32 (i32*)*, i32 (i32*)** %8, align 8
%10 = call i32 %9(i32* @lve_cookie)
store i32 0, i32* @in_hook, align 4
br label %11
11: ; preds = %6, %3, %0
store i64 0, i64* @in_lve, align 8
store i64 0, i64* @in_mutex_refcnt, align 8
ret void
} | /* BEGIN FUNCTION-DEF gr_lve_end LOC=UNKNOWN VKEY=4892 */
void gr_lve_end(void)
{
unsigned long _TIG_FN_9zf3_1_gr_lve_end_next ;
{
{
_TIG_FN_9zf3_1_gr_lve_end_next = 3UL;
}
while (1) {
switch (_TIG_FN_9zf3_1_gr_lve_end_next) {
case 4UL:
#line 56 "/tmp/forklift_obfu_zxckmaes/input.c"
in_lve = (scalar_t__ )0;
#line 57
in_mutex_refcnt = (scalar_t__ )0;
{
_TIG_FN_9zf3_1_gr_lve_end_next = 5UL;
}
break;
case 3UL: ;
if (in_lve) {
{
_TIG_FN_9zf3_1_gr_lve_end_next = 6UL;
}
} else {
{
_TIG_FN_9zf3_1_gr_lve_end_next = 4UL;
}
}
break;
case 6UL: ;
if (! in_mutex_refcnt) {
{
_TIG_FN_9zf3_1_gr_lve_end_next = 2UL;
}
} else {
{
_TIG_FN_9zf3_1_gr_lve_end_next = 4UL;
}
}
break;
case 5UL: ;
return;
break;
case 2UL:
#line 51
in_hook = 1;
#line 52
(*(hooks->exit))(& lve_cookie);
#line 53
in_hook = 0;
{
_TIG_FN_9zf3_1_gr_lve_end_next = 4UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF gr_lve_end LOC=UNKNOWN VKEY=4892 */ | 2,144,181,937 | train_synth_compilable |
gr_lve_end | void gr_lve_end() {
if (in_lve && !in_mutex_refcnt) {
in_hook = 1;
hooks->exit(&lve_cookie);
in_hook = 0;
}
in_lve = 0;
in_mutex_refcnt = 0;
} | EncodeArithmetic | .global gr_lve_end
.type gr_lve_end, %function
gr_lve_end:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:in_lve
ldr x0, [x0, #:got_lo12:in_lve]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:in_mutex_refcnt
ldr x0, [x0, #:got_lo12:in_mutex_refcnt]
ldr x0, [x0]
cmp x0, 0
bne .L2
adrp x0, :got:in_hook
ldr x0, [x0, #:got_lo12:in_hook]
mov w1, 1
str w1, [x0]
adrp x0, :got:hooks
ldr x0, [x0, #:got_lo12:hooks]
ldr x0, [x0]
ldr x1, [x0]
adrp x0, :got:lve_cookie
ldr x0, [x0, #:got_lo12:lve_cookie]
blr x1
adrp x0, :got:in_hook
ldr x0, [x0, #:got_lo12:in_hook]
str wzr, [x0]
.L2:
adrp x0, :got:in_lve
ldr x0, [x0, #:got_lo12:in_lve]
str xzr, [x0]
adrp x0, :got:in_mutex_refcnt
ldr x0, [x0, #:got_lo12:in_mutex_refcnt]
str xzr, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global gr_lve_end
.type gr_lve_end, %function
gr_lve_end:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, in_lve
add x0, x0, :lo12:in_lve
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, in_mutex_refcnt
add x0, x0, :lo12:in_mutex_refcnt
ldr x0, [x0]
cmp x0, 0
bne .L2
adrp x0, in_hook
add x0, x0, :lo12:in_hook
mov w1, 1
str w1, [x0]
adrp x0, hooks
add x0, x0, :lo12:hooks
ldr x0, [x0]
ldr x1, [x0]
adrp x0, lve_cookie
add x0, x0, :lo12:lve_cookie
blr x1
adrp x0, in_hook
add x0, x0, :lo12:in_hook
str wzr, [x0]
.L2:
adrp x0, in_lve
add x0, x0, :lo12:in_lve
str xzr, [x0]
adrp x0, in_mutex_refcnt
add x0, x0, :lo12:in_mutex_refcnt
str xzr, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size gr_lve_end, .-gr_lve_end | %struct.TYPE_2__ = type { i32 (i32*)* }
@in_lve = external dso_local global i64, align 8
@in_mutex_refcnt = external dso_local global i64, align 8
@in_hook = external dso_local global i32, align 4
@hooks = external dso_local global %struct.TYPE_2__*, align 8
@lve_cookie = external dso_local global i32, align 4
define dso_local void @gr_lve_end() {
%1 = load i64, i64* @in_lve, align 8
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %11
3: ; preds = %0
%4 = load i64, i64* @in_mutex_refcnt, align 8
%5 = icmp ne i64 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %3
store i32 1, i32* @in_hook, align 4
%7 = load %struct.TYPE_2__*, %struct.TYPE_2__** @hooks, align 8
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
%9 = load i32 (i32*)*, i32 (i32*)** %8, align 8
%10 = call i32 %9(i32* @lve_cookie)
store i32 0, i32* @in_hook, align 4
br label %11
11: ; preds = %6, %3, %0
store i64 0, i64* @in_lve, align 8
store i64 0, i64* @in_mutex_refcnt, align 8
ret void
} | /* BEGIN FUNCTION-DEF gr_lve_end LOC=UNKNOWN VKEY=4892 */
void gr_lve_end(void)
{
{
#line 50
if (in_lve) {
#line 50
if (! in_mutex_refcnt) {
{
#line 51 "/tmp/forklift_obfu_ksvgi0jp/input.c"
in_hook = 1;
#line 52
(*(hooks->exit))(& lve_cookie);
#line 53
in_hook = 0;
}
}
}
{
#line 56
in_lve = (scalar_t__ )0;
#line 57
in_mutex_refcnt = (scalar_t__ )0;
}
#line 58
return;
}
}
/* END FUNCTION-DEF gr_lve_end LOC=UNKNOWN VKEY=4892 */ | 1,699,226,064 | train_synth_compilable |
semaphore_wait | void semaphore_wait(SEMAPHORE *sem) { sem_wait(sem); } | EncodeArithmetic | .global semaphore_wait
.type semaphore_wait, %function
semaphore_wait:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl sem_wait
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global semaphore_wait
.type semaphore_wait, %function
semaphore_wait:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl sem_wait
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size semaphore_wait, .-semaphore_wait | define dso_local void @semaphore_wait(i32* %0) {
%2 = alloca i32*, align 8
store i32* %0, i32** %2, align 8
%3 = load i32*, i32** %2, align 8
%4 = call i32 @sem_wait(i32* %3)
ret void
}
declare dso_local i32 @sem_wait(i32*) | /* BEGIN FUNCTION-DEF semaphore_wait LOC=UNKNOWN VKEY=4884 */
void semaphore_wait(SEMAPHORE *sem )
{
{
#line 43
sem_wait(sem);
#line 43
return;
}
}
/* END FUNCTION-DEF semaphore_wait LOC=UNKNOWN VKEY=4884 */ | 1,351,531,223 | train_synth_compilable |
gr_lve_end | void gr_lve_end() {
if (in_lve && !in_mutex_refcnt) {
in_hook = 1;
hooks->exit(&lve_cookie);
in_hook = 0;
}
in_lve = 0;
in_mutex_refcnt = 0;
} | Flatten+EncodeArithmetic | .global gr_lve_end
.type gr_lve_end, %function
gr_lve_end:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:in_lve
ldr x0, [x0, #:got_lo12:in_lve]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:in_mutex_refcnt
ldr x0, [x0, #:got_lo12:in_mutex_refcnt]
ldr x0, [x0]
cmp x0, 0
bne .L2
adrp x0, :got:in_hook
ldr x0, [x0, #:got_lo12:in_hook]
mov w1, 1
str w1, [x0]
adrp x0, :got:hooks
ldr x0, [x0, #:got_lo12:hooks]
ldr x0, [x0]
ldr x1, [x0]
adrp x0, :got:lve_cookie
ldr x0, [x0, #:got_lo12:lve_cookie]
blr x1
adrp x0, :got:in_hook
ldr x0, [x0, #:got_lo12:in_hook]
str wzr, [x0]
.L2:
adrp x0, :got:in_lve
ldr x0, [x0, #:got_lo12:in_lve]
str xzr, [x0]
adrp x0, :got:in_mutex_refcnt
ldr x0, [x0, #:got_lo12:in_mutex_refcnt]
str xzr, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global gr_lve_end
.type gr_lve_end, %function
gr_lve_end:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 3
str x0, [sp, 24]
.L14:
ldr x0, [sp, 24]
cmp x0, 6
beq .L2
ldr x0, [sp, 24]
cmp x0, 6
bhi .L15
ldr x0, [sp, 24]
cmp x0, 5
beq .L16
ldr x0, [sp, 24]
cmp x0, 5
bhi .L15
ldr x0, [sp, 24]
cmp x0, 4
beq .L5
ldr x0, [sp, 24]
cmp x0, 4
bhi .L15
ldr x0, [sp, 24]
cmp x0, 2
beq .L6
ldr x0, [sp, 24]
cmp x0, 3
beq .L7
b .L15
.L5:
adrp x0, in_lve
add x0, x0, :lo12:in_lve
str xzr, [x0]
adrp x0, in_mutex_refcnt
add x0, x0, :lo12:in_mutex_refcnt
str xzr, [x0]
mov x0, 5
str x0, [sp, 24]
b .L8
.L7:
adrp x0, in_lve
add x0, x0, :lo12:in_lve
ldr x0, [x0]
cmp x0, 0
beq .L9
mov x0, 6
str x0, [sp, 24]
b .L8
.L9:
mov x0, 4
str x0, [sp, 24]
b .L8
.L2:
adrp x0, in_mutex_refcnt
add x0, x0, :lo12:in_mutex_refcnt
ldr x0, [x0]
cmp x0, 0
bne .L11
mov x0, 2
str x0, [sp, 24]
b .L8
.L11:
mov x0, 4
str x0, [sp, 24]
b .L8
.L6:
adrp x0, in_hook
add x0, x0, :lo12:in_hook
mov w1, 1
str w1, [x0]
adrp x0, hooks
add x0, x0, :lo12:hooks
ldr x0, [x0]
ldr x1, [x0]
adrp x0, lve_cookie
add x0, x0, :lo12:lve_cookie
blr x1
adrp x0, in_hook
add x0, x0, :lo12:in_hook
str wzr, [x0]
mov x0, 4
str x0, [sp, 24]
b .L8
.L15:
nop
.L8:
b .L14
.L16:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size gr_lve_end, .-gr_lve_end | %struct.TYPE_2__ = type { i32 (i32*)* }
@in_lve = external dso_local global i64, align 8
@in_mutex_refcnt = external dso_local global i64, align 8
@in_hook = external dso_local global i32, align 4
@hooks = external dso_local global %struct.TYPE_2__*, align 8
@lve_cookie = external dso_local global i32, align 4
define dso_local void @gr_lve_end() {
%1 = load i64, i64* @in_lve, align 8
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %11
3: ; preds = %0
%4 = load i64, i64* @in_mutex_refcnt, align 8
%5 = icmp ne i64 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %3
store i32 1, i32* @in_hook, align 4
%7 = load %struct.TYPE_2__*, %struct.TYPE_2__** @hooks, align 8
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
%9 = load i32 (i32*)*, i32 (i32*)** %8, align 8
%10 = call i32 %9(i32* @lve_cookie)
store i32 0, i32* @in_hook, align 4
br label %11
11: ; preds = %6, %3, %0
store i64 0, i64* @in_lve, align 8
store i64 0, i64* @in_mutex_refcnt, align 8
ret void
} | /* BEGIN FUNCTION-DEF gr_lve_end LOC=UNKNOWN VKEY=4895 */
void gr_lve_end(void)
{
unsigned long _TIG_FN_7jZQ_1_gr_lve_end_next ;
{
_TIG_FN_7jZQ_1_gr_lve_end_next = 3UL;
while (1) {
switch (_TIG_FN_7jZQ_1_gr_lve_end_next) {
case 4UL:
{
#line 56 "/tmp/forklift_obfu_y6qtacc_/input.c"
in_lve = (scalar_t__ )0;
#line 57
in_mutex_refcnt = (scalar_t__ )0;
}
_TIG_FN_7jZQ_1_gr_lve_end_next = 5UL;
break;
case 3UL: ;
if (in_lve) {
_TIG_FN_7jZQ_1_gr_lve_end_next = 6UL;
} else {
_TIG_FN_7jZQ_1_gr_lve_end_next = 4UL;
}
break;
case 6UL: ;
if (! in_mutex_refcnt) {
_TIG_FN_7jZQ_1_gr_lve_end_next = 2UL;
} else {
_TIG_FN_7jZQ_1_gr_lve_end_next = 4UL;
}
break;
case 5UL: ;
return;
break;
case 2UL:
{
#line 51
in_hook = 1;
#line 52
(*(hooks->exit))(& lve_cookie);
#line 53
in_hook = 0;
}
_TIG_FN_7jZQ_1_gr_lve_end_next = 4UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF gr_lve_end LOC=UNKNOWN VKEY=4895 */ | 1,970,753,705 | train_synth_compilable |
do_unrecognized | static void do_unrecognized(void)
{
error_msg("warning: unrecognized: %s", pos);
# 394 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Voskrese/mipsonqemu/refs/heads/ar9344/BAC Board Package/libraries/ArduinoSTL-master/extras/uClibc++-OriginalFiles/extra/locale/gen_collate.c"
} | Flatten | .global do_unrecognized
.type do_unrecognized, %function
do_unrecognized:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:pos
ldr x0, [x0, #:got_lo12:pos]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl error_msg
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "warning: unrecognized: %s"
| .global do_unrecognized
.type do_unrecognized, %function
do_unrecognized:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str xzr, [sp, 24]
.L6:
ldr x0, [sp, 24]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
cmp x0, 1
bne .L8
b .L7
.L2:
adrp x0, pos
add x0, x0, :lo12:pos
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl error_msg
mov x0, 1
str x0, [sp, 24]
b .L5
.L8:
nop
.L5:
b .L6
.L7:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size do_unrecognized, .-do_unrecognized | @.str = external hidden unnamed_addr constant [26 x i8], align 1
@pos = external dso_local global i32, align 4
define dso_local void @do_unrecognized() {
%1 = load i32, i32* @pos, align 4
%2 = call i32 @error_msg(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
declare dso_local i32 @error_msg(i8*, i32) | /* BEGIN FUNCTION-DEF do_unrecognized LOC=UNKNOWN VKEY=4886 */
static void do_unrecognized(void)
{
unsigned long _TIG_FN_VRDV_1_do_unrecognized_next ;
{
{
_TIG_FN_VRDV_1_do_unrecognized_next = 0UL;
}
while (1) {
switch (_TIG_FN_VRDV_1_do_unrecognized_next) {
case 1UL: ;
return;
break;
case 0UL:
#line 46 "/tmp/forklift_obfu_seo0z4h7/input.c"
error_msg("warning: unrecognized: %s", pos);
{
_TIG_FN_VRDV_1_do_unrecognized_next = 1UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF do_unrecognized LOC=UNKNOWN VKEY=4886 */ | 1,059,257,080 | train_synth_compilable |
do_unrecognized | static void do_unrecognized(void)
{
error_msg("warning: unrecognized: %s", pos);
# 394 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Voskrese/mipsonqemu/refs/heads/ar9344/BAC Board Package/libraries/ArduinoSTL-master/extras/uClibc++-OriginalFiles/extra/locale/gen_collate.c"
} | EncodeArithmetic | .global do_unrecognized
.type do_unrecognized, %function
do_unrecognized:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:pos
ldr x0, [x0, #:got_lo12:pos]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl error_msg
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "warning: unrecognized: %s"
| .global do_unrecognized
.type do_unrecognized, %function
do_unrecognized:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, pos
add x0, x0, :lo12:pos
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl error_msg
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size do_unrecognized, .-do_unrecognized | @.str = external hidden unnamed_addr constant [26 x i8], align 1
@pos = external dso_local global i32, align 4
define dso_local void @do_unrecognized() {
%1 = load i32, i32* @pos, align 4
%2 = call i32 @error_msg(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
declare dso_local i32 @error_msg(i8*, i32) | /* BEGIN FUNCTION-DEF do_unrecognized LOC=UNKNOWN VKEY=4886 */
static void do_unrecognized(void)
{
{
#line 46 "/tmp/forklift_obfu_afv0mlbf/input.c"
error_msg("warning: unrecognized: %s", pos);
#line 394 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Voskrese/mipsonqemu/refs/heads/ar9344/BAC Board Package/libraries/ArduinoSTL-master/extras/uClibc++-OriginalFiles/extra/locale/gen_collate.c"
return;
}
}
/* END FUNCTION-DEF do_unrecognized LOC=UNKNOWN VKEY=4886 */ | 1,128,466,620 | train_synth_compilable |
do_unrecognized | static void do_unrecognized(void)
{
error_msg("warning: unrecognized: %s", pos);
# 394 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Voskrese/mipsonqemu/refs/heads/ar9344/BAC Board Package/libraries/ArduinoSTL-master/extras/uClibc++-OriginalFiles/extra/locale/gen_collate.c"
} | Flatten+EncodeArithmetic | .global do_unrecognized
.type do_unrecognized, %function
do_unrecognized:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:pos
ldr x0, [x0, #:got_lo12:pos]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl error_msg
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "warning: unrecognized: %s"
| .global do_unrecognized
.type do_unrecognized, %function
do_unrecognized:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str xzr, [sp, 24]
.L6:
ldr x0, [sp, 24]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
cmp x0, 1
bne .L8
b .L7
.L2:
adrp x0, pos
add x0, x0, :lo12:pos
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl error_msg
mov x0, 1
str x0, [sp, 24]
b .L5
.L8:
nop
.L5:
b .L6
.L7:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size do_unrecognized, .-do_unrecognized | @.str = external hidden unnamed_addr constant [26 x i8], align 1
@pos = external dso_local global i32, align 4
define dso_local void @do_unrecognized() {
%1 = load i32, i32* @pos, align 4
%2 = call i32 @error_msg(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
declare dso_local i32 @error_msg(i8*, i32) | /* BEGIN FUNCTION-DEF do_unrecognized LOC=UNKNOWN VKEY=4889 */
static void do_unrecognized(void)
{
unsigned long _TIG_FN_jKbX_1_do_unrecognized_next ;
{
_TIG_FN_jKbX_1_do_unrecognized_next = 0UL;
while (1) {
switch (_TIG_FN_jKbX_1_do_unrecognized_next) {
case 1UL: ;
return;
break;
case 0UL:
#line 46 "/tmp/forklift_obfu_sx1y9aro/input.c"
error_msg("warning: unrecognized: %s", pos);
_TIG_FN_jKbX_1_do_unrecognized_next = 1UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF do_unrecognized LOC=UNKNOWN VKEY=4889 */ | 1,840,109,255 | train_synth_compilable |
write_two_pages_check_phys1_crc | static void write_two_pages_check_phys1_crc(void)
{
int rc;
size_t len = 8192;
init_test();
log_fill_buffer(len);
log_write_start(len);
flush_disk_buffers();
phys1_read_start(len);
rc = cmp_crc_log_wr_phys1_rd(len);
basic_test(rc == 0);
cleanup_test();
} | EncodeArithmetic | .global write_two_pages_check_phys1_crc
.type write_two_pages_check_phys1_crc, %function
write_two_pages_check_phys1_crc:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 8192
str x0, [sp, 24]
bl init_test
ldr x0, [sp, 24]
bl log_fill_buffer
ldr x0, [sp, 24]
bl log_write_start
bl flush_disk_buffers
ldr x0, [sp, 24]
bl phys1_read_start
ldr x0, [sp, 24]
bl cmp_crc_log_wr_phys1_rd
str w0, [sp, 20]
ldr w0, [sp, 20]
cmp w0, 0
cset w0, eq
and w0, w0, 255
bl basic_test
bl cleanup_test
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global write_two_pages_check_phys1_crc
.type write_two_pages_check_phys1_crc, %function
write_two_pages_check_phys1_crc:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 8192
str x0, [sp, 24]
bl init_test
ldr x0, [sp, 24]
bl log_fill_buffer
ldr x0, [sp, 24]
bl log_write_start
bl flush_disk_buffers
ldr x0, [sp, 24]
bl phys1_read_start
ldr x0, [sp, 24]
bl cmp_crc_log_wr_phys1_rd
str w0, [sp, 20]
ldr w1, [sp, 20]
mov w0, -2147483648
add w1, w1, w0
ldr w2, [sp, 20]
mov w0, -2147483648
add w0, w2, w0
lsl w2, w0, 1
ldr w3, [sp, 20]
mov w0, -2147483648
add w0, w3, w0
asr w0, w0, 31
and w0, w2, w0
sub w0, w1, w0
lsr w0, w0, 31
bl basic_test
bl cleanup_test
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size write_two_pages_check_phys1_crc, .-write_two_pages_check_phys1_crc | define dso_local void @write_two_pages_check_phys1_crc() {
%1 = alloca i32, align 4
%2 = alloca i64, align 8
store i64 8192, i64* %2, align 8
%3 = call i32 (...) @init_test()
%4 = load i64, i64* %2, align 8
%5 = call i32 @log_fill_buffer(i64 %4)
%6 = load i64, i64* %2, align 8
%7 = call i32 @log_write_start(i64 %6)
%8 = call i32 (...) @flush_disk_buffers()
%9 = load i64, i64* %2, align 8
%10 = call i32 @phys1_read_start(i64 %9)
%11 = load i64, i64* %2, align 8
%12 = call i32 @cmp_crc_log_wr_phys1_rd(i64 %11)
store i32 %12, i32* %1, align 4
%13 = load i32, i32* %1, align 4
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
%16 = call i32 @basic_test(i32 %15)
%17 = call i32 (...) @cleanup_test()
ret void
}
declare dso_local i32 @init_test(...)
declare dso_local i32 @log_fill_buffer(i64)
declare dso_local i32 @log_write_start(i64)
declare dso_local i32 @flush_disk_buffers(...)
declare dso_local i32 @phys1_read_start(i64)
declare dso_local i32 @cmp_crc_log_wr_phys1_rd(i64)
declare dso_local i32 @basic_test(i32)
declare dso_local i32 @cleanup_test(...) | /* BEGIN FUNCTION-DEF write_two_pages_check_phys1_crc LOC=UNKNOWN VKEY=4899 */
static void write_two_pages_check_phys1_crc(void)
{
int rc ;
size_t___0 len ;
{
{
#line 52 "/tmp/forklift_obfu_n97lgz05/input.c"
len = (size_t___0 )8192;
#line 54
init_test();
#line 55
log_fill_buffer(len);
#line 56
log_write_start(len);
#line 57
flush_disk_buffers();
#line 58
phys1_read_start(len);
#line 59
rc = cmp_crc_log_wr_phys1_rd(len);
#line 60
basic_test(((unsigned int )((rc + (1 << 31)) - (((rc + (1 << 31)) << 1) & ((rc + (1 << 31)) >> 31))) >> 31U) & 1);
#line 61
cleanup_test();
}
#line 62
return;
}
}
/* END FUNCTION-DEF write_two_pages_check_phys1_crc LOC=UNKNOWN VKEY=4899 */ | 470,939,445 | train_synth_compilable |
write_two_pages_check_phys1_crc | static void write_two_pages_check_phys1_crc(void)
{
int rc;
size_t len = 8192;
init_test();
log_fill_buffer(len);
log_write_start(len);
flush_disk_buffers();
phys1_read_start(len);
rc = cmp_crc_log_wr_phys1_rd(len);
basic_test(rc == 0);
cleanup_test();
} | Flatten | .global write_two_pages_check_phys1_crc
.type write_two_pages_check_phys1_crc, %function
write_two_pages_check_phys1_crc:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 8192
str x0, [sp, 24]
bl init_test
ldr x0, [sp, 24]
bl log_fill_buffer
ldr x0, [sp, 24]
bl log_write_start
bl flush_disk_buffers
ldr x0, [sp, 24]
bl phys1_read_start
ldr x0, [sp, 24]
bl cmp_crc_log_wr_phys1_rd
str w0, [sp, 20]
ldr w0, [sp, 20]
cmp w0, 0
cset w0, eq
and w0, w0, 255
bl basic_test
bl cleanup_test
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global write_two_pages_check_phys1_crc
.type write_two_pages_check_phys1_crc, %function
write_two_pages_check_phys1_crc:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str xzr, [sp, 40]
.L7:
ldr x0, [sp, 40]
cmp x0, 2
beq .L8
ldr x0, [sp, 40]
cmp x0, 2
bhi .L9
ldr x0, [sp, 40]
cmp x0, 0
beq .L4
ldr x0, [sp, 40]
cmp x0, 1
bne .L9
mov x0, 8192
str x0, [sp, 32]
bl init_test
ldr x0, [sp, 32]
bl log_fill_buffer
ldr x0, [sp, 32]
bl log_write_start
bl flush_disk_buffers
ldr x0, [sp, 32]
bl phys1_read_start
ldr x0, [sp, 32]
bl cmp_crc_log_wr_phys1_rd
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
cset w0, eq
and w0, w0, 255
bl basic_test
bl cleanup_test
mov x0, 2
str x0, [sp, 40]
b .L5
.L4:
mov x0, 1
str x0, [sp, 40]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size write_two_pages_check_phys1_crc, .-write_two_pages_check_phys1_crc | define dso_local void @write_two_pages_check_phys1_crc() {
%1 = alloca i32, align 4
%2 = alloca i64, align 8
store i64 8192, i64* %2, align 8
%3 = call i32 (...) @init_test()
%4 = load i64, i64* %2, align 8
%5 = call i32 @log_fill_buffer(i64 %4)
%6 = load i64, i64* %2, align 8
%7 = call i32 @log_write_start(i64 %6)
%8 = call i32 (...) @flush_disk_buffers()
%9 = load i64, i64* %2, align 8
%10 = call i32 @phys1_read_start(i64 %9)
%11 = load i64, i64* %2, align 8
%12 = call i32 @cmp_crc_log_wr_phys1_rd(i64 %11)
store i32 %12, i32* %1, align 4
%13 = load i32, i32* %1, align 4
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
%16 = call i32 @basic_test(i32 %15)
%17 = call i32 (...) @cleanup_test()
ret void
}
declare dso_local i32 @init_test(...)
declare dso_local i32 @log_fill_buffer(i64)
declare dso_local i32 @log_write_start(i64)
declare dso_local i32 @flush_disk_buffers(...)
declare dso_local i32 @phys1_read_start(i64)
declare dso_local i32 @cmp_crc_log_wr_phys1_rd(i64)
declare dso_local i32 @basic_test(i32)
declare dso_local i32 @cleanup_test(...) | /* BEGIN FUNCTION-DEF write_two_pages_check_phys1_crc LOC=UNKNOWN VKEY=4899 */
static void write_two_pages_check_phys1_crc(void)
{
int rc ;
size_t___0 len ;
unsigned long _TIG_FN_izqo_1_write_two_pages_check_phys1_crc_next ;
{
{
_TIG_FN_izqo_1_write_two_pages_check_phys1_crc_next = 0UL;
}
while (1) {
switch (_TIG_FN_izqo_1_write_two_pages_check_phys1_crc_next) {
case 1UL:
#line 52 "/tmp/forklift_obfu_2v0wvfqs/input.c"
len = (size_t___0 )8192;
#line 54
init_test();
#line 55
log_fill_buffer(len);
#line 56
log_write_start(len);
#line 57
flush_disk_buffers();
#line 58
phys1_read_start(len);
#line 59
rc = cmp_crc_log_wr_phys1_rd(len);
#line 60
basic_test(rc == 0);
#line 61
cleanup_test();
{
_TIG_FN_izqo_1_write_two_pages_check_phys1_crc_next = 2UL;
}
break;
case 0UL: ;
{
_TIG_FN_izqo_1_write_two_pages_check_phys1_crc_next = 1UL;
}
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF write_two_pages_check_phys1_crc LOC=UNKNOWN VKEY=4899 */ | 202,363,285 | train_synth_compilable |
ObjNumChildren | int ObjNumChildren(Obj *obj)
{
if (obj->type == 65) return(0);
return(obj->u1.nlst.numchildren);
} | EncodeArithmetic | .global ObjNumChildren
.type ObjNumChildren, %function
ObjNumChildren:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
cmp w0, 65
bne .L2
mov w0, 0
b .L3
.L2:
ldr x0, [sp, 8]
ldr w0, [x0, 4]
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global ObjNumChildren
.type ObjNumChildren, %function
ObjNumChildren:
.LFB4:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
sub w1, w0, #65
ldr x0, [sp, 8]
ldr w0, [x0]
sub w0, w0, #65
asr w0, w0, 31
add w1, w1, w0
ldr x0, [sp, 8]
ldr w0, [x0]
sub w0, w0, #65
asr w0, w0, 31
eor w0, w1, w0
cmp w0, 0
bgt .L2
mov w0, 0
b .L3
.L2:
ldr x0, [sp, 8]
ldr w0, [x0, 4]
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size ObjNumChildren, .-ObjNumChildren | %struct.TYPE_7__ = type { i32, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32 }
define dso_local i32 @ObjNumChildren(%struct.TYPE_7__* %0) {
%2 = alloca i32, align 4
%3 = alloca %struct.TYPE_7__*, align 8
store %struct.TYPE_7__* %0, %struct.TYPE_7__** %3, align 8
%4 = load %struct.TYPE_7__*, %struct.TYPE_7__** %3, align 8
%5 = getelementptr inbounds %struct.TYPE_7__, %struct.TYPE_7__* %4, i32 0, i32 0
%6 = load i32, i32* %5, align 4
%7 = icmp eq i32 %6, 65
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2, align 4
br label %15
9: ; preds = %1
%10 = load %struct.TYPE_7__*, %struct.TYPE_7__** %3, align 8
%11 = getelementptr inbounds %struct.TYPE_7__, %struct.TYPE_7__* %10, i32 0, i32 1
%12 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %11, i32 0, i32 0
%13 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %12, i32 0, i32 0
%14 = load i32, i32* %13, align 4
store i32 %14, i32* %2, align 4
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %2, align 4
ret i32 %16
} | /* BEGIN FUNCTION-DEF ObjNumChildren LOC=UNKNOWN VKEY=4881 */
int ObjNumChildren(Obj *obj )
{
{
#line 50
if (((unsigned int )((((obj->type - 65) + ((obj->type - 65) >> 31)) ^ ((obj->type - 65) >> 31)) - 1) >> 31U) & 1) {
#line 50 "/tmp/forklift_obfu_nf11tbfl/input.c"
return (0);
}
#line 51
return (obj->u1.nlst.numchildren);
}
}
/* END FUNCTION-DEF ObjNumChildren LOC=UNKNOWN VKEY=4881 */ | 1,639,042,338 | train_synth_compilable |
write_two_pages_check_phys1_crc | static void write_two_pages_check_phys1_crc(void)
{
int rc;
size_t len = 8192;
init_test();
log_fill_buffer(len);
log_write_start(len);
flush_disk_buffers();
phys1_read_start(len);
rc = cmp_crc_log_wr_phys1_rd(len);
basic_test(rc == 0);
cleanup_test();
} | Flatten+EncodeArithmetic | .global write_two_pages_check_phys1_crc
.type write_two_pages_check_phys1_crc, %function
write_two_pages_check_phys1_crc:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 8192
str x0, [sp, 24]
bl init_test
ldr x0, [sp, 24]
bl log_fill_buffer
ldr x0, [sp, 24]
bl log_write_start
bl flush_disk_buffers
ldr x0, [sp, 24]
bl phys1_read_start
ldr x0, [sp, 24]
bl cmp_crc_log_wr_phys1_rd
str w0, [sp, 20]
ldr w0, [sp, 20]
cmp w0, 0
cset w0, eq
and w0, w0, 255
bl basic_test
bl cleanup_test
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global write_two_pages_check_phys1_crc
.type write_two_pages_check_phys1_crc, %function
write_two_pages_check_phys1_crc:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str xzr, [sp, 40]
.L7:
ldr x0, [sp, 40]
cmp x0, 2
beq .L8
ldr x0, [sp, 40]
cmp x0, 2
bhi .L9
ldr x0, [sp, 40]
cmp x0, 0
beq .L4
ldr x0, [sp, 40]
cmp x0, 1
bne .L9
mov x0, 8192
str x0, [sp, 32]
bl init_test
ldr x0, [sp, 32]
bl log_fill_buffer
ldr x0, [sp, 32]
bl log_write_start
bl flush_disk_buffers
ldr x0, [sp, 32]
bl phys1_read_start
ldr x0, [sp, 32]
bl cmp_crc_log_wr_phys1_rd
str w0, [sp, 28]
ldr w0, [sp, 28]
neg w1, w0
ldr w0, [sp, 28]
orr w0, w1, w0
mvn w0, w0
lsr w0, w0, 31
bl basic_test
bl cleanup_test
mov x0, 2
str x0, [sp, 40]
b .L5
.L4:
mov x0, 1
str x0, [sp, 40]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size write_two_pages_check_phys1_crc, .-write_two_pages_check_phys1_crc | define dso_local void @write_two_pages_check_phys1_crc() {
%1 = alloca i32, align 4
%2 = alloca i64, align 8
store i64 8192, i64* %2, align 8
%3 = call i32 (...) @init_test()
%4 = load i64, i64* %2, align 8
%5 = call i32 @log_fill_buffer(i64 %4)
%6 = load i64, i64* %2, align 8
%7 = call i32 @log_write_start(i64 %6)
%8 = call i32 (...) @flush_disk_buffers()
%9 = load i64, i64* %2, align 8
%10 = call i32 @phys1_read_start(i64 %9)
%11 = load i64, i64* %2, align 8
%12 = call i32 @cmp_crc_log_wr_phys1_rd(i64 %11)
store i32 %12, i32* %1, align 4
%13 = load i32, i32* %1, align 4
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
%16 = call i32 @basic_test(i32 %15)
%17 = call i32 (...) @cleanup_test()
ret void
}
declare dso_local i32 @init_test(...)
declare dso_local i32 @log_fill_buffer(i64)
declare dso_local i32 @log_write_start(i64)
declare dso_local i32 @flush_disk_buffers(...)
declare dso_local i32 @phys1_read_start(i64)
declare dso_local i32 @cmp_crc_log_wr_phys1_rd(i64)
declare dso_local i32 @basic_test(i32)
declare dso_local i32 @cleanup_test(...) | /* BEGIN FUNCTION-DEF write_two_pages_check_phys1_crc LOC=UNKNOWN VKEY=4904 */
static void write_two_pages_check_phys1_crc(void)
{
int rc ;
size_t___0 len ;
unsigned long _TIG_FN_l9Qr_1_write_two_pages_check_phys1_crc_next ;
{
_TIG_FN_l9Qr_1_write_two_pages_check_phys1_crc_next = 0UL;
while (1) {
switch (_TIG_FN_l9Qr_1_write_two_pages_check_phys1_crc_next) {
case 1UL:
{
#line 52 "/tmp/forklift_obfu_ed2mokax/input.c"
len = (size_t___0 )8192;
#line 54
init_test();
#line 55
log_fill_buffer(len);
#line 56
log_write_start(len);
#line 57
flush_disk_buffers();
#line 58
phys1_read_start(len);
#line 59
rc = cmp_crc_log_wr_phys1_rd(len);
#line 60
basic_test(((unsigned int )(~ (rc | - rc)) >> 31U) & 1);
#line 61
cleanup_test();
}
_TIG_FN_l9Qr_1_write_two_pages_check_phys1_crc_next = 2UL;
break;
case 0UL: ;
_TIG_FN_l9Qr_1_write_two_pages_check_phys1_crc_next = 1UL;
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF write_two_pages_check_phys1_crc LOC=UNKNOWN VKEY=4904 */ | 656,448,479 | train_synth_compilable |
irandianstodegrees | ireal irandianstodegrees(ireal randians) {
return randians * (180.0 / 3.14159265358979323846f);
} | Flatten+EncodeArithmetic | .global irandianstodegrees
.type irandianstodegrees, %function
irandianstodegrees:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d0, [sp, 8]
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .word 218353446
| .global irandianstodegrees
.type irandianstodegrees, %function
irandianstodegrees:
.LFB3:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str xzr, [sp, 24]
.L4:
ldr x0, [sp, 24]
cmp x0, 0
bne .L7
ldr d31, [sp, 8]
adrp x0, .LC0
ldr d30, [x0, #:lo12:.LC0]
fmul d31, d31, d30
b .L6
.L7:
nop
b .L4
.L6:
fmov d0, d31
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size irandianstodegrees, .-irandianstodegrees | define dso_local double @irandianstodegrees(double %0) {
%2 = alloca double, align 8
store double %0, double* %2, align 8
%3 = load double, double* %2, align 8
%4 = fmul double %3, 0x404CA5DC0D03CF26
ret double %4
} | /* BEGIN FUNCTION-DEF irandianstodegrees LOC=UNKNOWN VKEY=4885 */
ireal irandianstodegrees(ireal randians )
{
unsigned long _TIG_FN_r9Np_1_irandianstodegrees_next ;
{
_TIG_FN_r9Np_1_irandianstodegrees_next = 0UL;
while (1) {
switch (_TIG_FN_r9Np_1_irandianstodegrees_next) {
case 0UL: ;
return (randians * (180.0 / (double )3.14159265358979323846f));
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF irandianstodegrees LOC=UNKNOWN VKEY=4885 */ | 491,995,979 | train_synth_compilable |
irandianstodegrees | ireal irandianstodegrees(ireal randians) {
return randians * (180.0 / 3.14159265358979323846f);
} | Flatten | .global irandianstodegrees
.type irandianstodegrees, %function
irandianstodegrees:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d0, [sp, 8]
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .word 218353446
| .global irandianstodegrees
.type irandianstodegrees, %function
irandianstodegrees:
.LFB5:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str xzr, [sp, 24]
.L10:
ldr x0, [sp, 24]
cmp x0, 0
bne .L13
ldr d31, [sp, 8]
adrp x0, .LC0
ldr d30, [x0, #:lo12:.LC0]
fmul d31, d31, d30
b .L12
.L13:
nop
b .L10
.L12:
fmov d0, d31
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size irandianstodegrees, .-irandianstodegrees | define dso_local double @irandianstodegrees(double %0) {
%2 = alloca double, align 8
store double %0, double* %2, align 8
%3 = load double, double* %2, align 8
%4 = fmul double %3, 0x404CA5DC0D03CF26
ret double %4
} | /* BEGIN FUNCTION-DEF irandianstodegrees LOC=UNKNOWN VKEY=4881 */
ireal irandianstodegrees(ireal randians )
{
unsigned long _TIG_FN_mvbv_1_irandianstodegrees_next ;
{
{
_TIG_FN_mvbv_1_irandianstodegrees_next = 0UL;
}
while (1) {
switch (_TIG_FN_mvbv_1_irandianstodegrees_next) {
case 0UL: ;
return (randians * (180.0 / (double )3.14159265358979323846f));
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF irandianstodegrees LOC=UNKNOWN VKEY=4881 */ | 1,079,815,404 | train_synth_compilable |
ObjNumChildren | int ObjNumChildren(Obj *obj)
{
if (obj->type == 65) return(0);
return(obj->u1.nlst.numchildren);
} | Flatten | .global ObjNumChildren
.type ObjNumChildren, %function
ObjNumChildren:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
cmp w0, 65
bne .L2
mov w0, 0
b .L3
.L2:
ldr x0, [sp, 8]
ldr w0, [x0, 4]
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global ObjNumChildren
.type ObjNumChildren, %function
ObjNumChildren:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mov x0, 2
str x0, [sp, 24]
.L15:
ldr x0, [sp, 24]
cmp x0, 2
beq .L8
ldr x0, [sp, 24]
cmp x0, 2
bhi .L16
ldr x0, [sp, 24]
cmp x0, 0
beq .L10
ldr x0, [sp, 24]
cmp x0, 1
bne .L16
ldr x0, [sp, 8]
ldr w0, [x0, 4]
b .L11
.L10:
mov w0, 0
b .L11
.L8:
ldr x0, [sp, 8]
ldr w0, [x0]
cmp w0, 65
bne .L12
str xzr, [sp, 24]
b .L14
.L12:
mov x0, 1
str x0, [sp, 24]
b .L14
.L16:
nop
.L14:
b .L15
.L11:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size ObjNumChildren, .-ObjNumChildren | %struct.TYPE_7__ = type { i32, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32 }
define dso_local i32 @ObjNumChildren(%struct.TYPE_7__* %0) {
%2 = alloca i32, align 4
%3 = alloca %struct.TYPE_7__*, align 8
store %struct.TYPE_7__* %0, %struct.TYPE_7__** %3, align 8
%4 = load %struct.TYPE_7__*, %struct.TYPE_7__** %3, align 8
%5 = getelementptr inbounds %struct.TYPE_7__, %struct.TYPE_7__* %4, i32 0, i32 0
%6 = load i32, i32* %5, align 4
%7 = icmp eq i32 %6, 65
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2, align 4
br label %15
9: ; preds = %1
%10 = load %struct.TYPE_7__*, %struct.TYPE_7__** %3, align 8
%11 = getelementptr inbounds %struct.TYPE_7__, %struct.TYPE_7__* %10, i32 0, i32 1
%12 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %11, i32 0, i32 0
%13 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %12, i32 0, i32 0
%14 = load i32, i32* %13, align 4
store i32 %14, i32* %2, align 4
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %2, align 4
ret i32 %16
} | /* BEGIN FUNCTION-DEF ObjNumChildren LOC=UNKNOWN VKEY=4881 */
int ObjNumChildren(Obj *obj )
{
unsigned long _TIG_FN_zaNc_1_ObjNumChildren_next ;
{
{
_TIG_FN_zaNc_1_ObjNumChildren_next = 2UL;
}
while (1) {
switch (_TIG_FN_zaNc_1_ObjNumChildren_next) {
case 1UL: ;
return (obj->u1.nlst.numchildren);
break;
case 0UL: ;
return (0);
break;
case 2UL: ;
if (obj->type == 65) {
{
_TIG_FN_zaNc_1_ObjNumChildren_next = 0UL;
}
} else {
{
_TIG_FN_zaNc_1_ObjNumChildren_next = 1UL;
}
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF ObjNumChildren LOC=UNKNOWN VKEY=4881 */ | 1,652,563,013 | train_synth_compilable |
onint | void
onint(void)
{
sigset_t sigs;
intpending = 0;
sigemptyset(&sigs);
sigprocmask(SIG_SETMASK, &sigs, NULL);
/*
* This doesn't seem to be needed, since main() emits a newline.
*/
#if 0
if (tcgetpgrp(0) == getpid())
write(STDERR_FILENO, "\n", 1);
#endif
if (rootshell && iflag)
exraise(EXINT);
else {
signal(SIGINT, SIG_DFL);
kill(getpid(), SIGINT);
_exit(128 + SIGINT);
}
} | Flatten | .global onint
.type onint, %function
onint:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1,0
adrp x0, :got:intpending
ldr x0, [x0, #:got_lo12:intpending]
str xzr, [x0]
add x0, sp, 20
bl sigemptyset
adrp x0, :got:SIG_SETMASK
ldr x0, [x0, #:got_lo12:SIG_SETMASK]
ldr w0, [x0]
add x1, sp, 20
mov x2, 0
bl sigprocmask
adrp x0, :got:rootshell
ldr x0, [x0, #:got_lo12:rootshell]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:iflag
ldr x0, [x0, #:got_lo12:iflag]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:EXINT
ldr x0, [x0, #:got_lo12:EXINT]
ldr w0, [x0]
bl exraise
b .L3
.L2:
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x2, [x0]
adrp x0, :got:SIG_DFL
ldr x0, [x0, #:got_lo12:SIG_DFL]
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
mov x2, x0
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl kill
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x0, [x0]
add x0, x0, 128
bl _exit
.L3:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [sp, 24]
ldr x2, [x0]
subs x1, x1, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global onint
.type onint, %function
onint:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str xzr, [sp, 40]
.L17:
ldr x0, [sp, 40]
cmp x0, 9
beq .L2
ldr x0, [sp, 40]
cmp x0, 9
bhi .L19
ldr x0, [sp, 40]
cmp x0, 8
beq .L4
ldr x0, [sp, 40]
cmp x0, 8
bhi .L19
ldr x0, [sp, 40]
cmp x0, 7
beq .L5
ldr x0, [sp, 40]
cmp x0, 7
bhi .L19
ldr x0, [sp, 40]
cmp x0, 6
beq .L20
ldr x0, [sp, 40]
cmp x0, 6
bhi .L19
ldr x0, [sp, 40]
cmp x0, 5
beq .L7
ldr x0, [sp, 40]
cmp x0, 5
bhi .L19
ldr x0, [sp, 40]
cmp x0, 3
beq .L8
ldr x0, [sp, 40]
cmp x0, 3
bhi .L19
ldr x0, [sp, 40]
cmp x0, 0
beq .L9
ldr x0, [sp, 40]
cmp x0, 2
beq .L10
b .L19
.L4:
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x2, [x0]
adrp x0, SIG_DFL
add x0, x0, :lo12:SIG_DFL
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
str x0, [sp, 32]
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 32]
bl kill
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
add x0, x0, 128
bl _exit
mov x0, 6
str x0, [sp, 40]
b .L11
.L8:
adrp x0, intpending
add x0, x0, :lo12:intpending
str xzr, [x0]
add x0, sp, 28
bl sigemptyset
adrp x0, SIG_SETMASK
add x0, x0, :lo12:SIG_SETMASK
ldr w0, [x0]
add x1, sp, 28
mov x2, 0
bl sigprocmask
mov x0, 5
str x0, [sp, 40]
b .L11
.L2:
adrp x0, EXINT
add x0, x0, :lo12:EXINT
ldr w0, [x0]
bl exraise
mov x0, 6
str x0, [sp, 40]
b .L11
.L7:
adrp x0, rootshell
add x0, x0, :lo12:rootshell
ldr x0, [x0]
cmp x0, 0
beq .L13
mov x0, 7
str x0, [sp, 40]
b .L11
.L13:
mov x0, 8
str x0, [sp, 40]
b .L11
.L9:
mov x0, 3
str x0, [sp, 40]
b .L11
.L5:
adrp x0, iflag
add x0, x0, :lo12:iflag
ldr x0, [x0]
cmp x0, 0
beq .L15
mov x0, 9
str x0, [sp, 40]
b .L11
.L15:
mov x0, 2
str x0, [sp, 40]
b .L11
.L10:
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x2, [x0]
adrp x0, SIG_DFL
add x0, x0, :lo12:SIG_DFL
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
str x0, [sp, 32]
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 32]
bl kill
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
add x0, x0, 128
bl _exit
mov x0, 6
str x0, [sp, 40]
b .L11
.L19:
nop
.L11:
b .L17
.L20:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size onint, .-onint | @intpending = external dso_local global i64, align 8
@SIG_SETMASK = external dso_local global i32, align 4
@rootshell = external dso_local global i64, align 8
@iflag = external dso_local global i64, align 8
@EXINT = external dso_local global i32, align 4
@SIGINT = external dso_local global i64, align 8
@SIG_DFL = external dso_local global i32, align 4
define dso_local void @onint() {
%1 = alloca i32, align 4
store i64 0, i64* @intpending, align 8
%2 = call i32 @sigemptyset(i32* %1)
%3 = load i32, i32* @SIG_SETMASK, align 4
%4 = call i32 @sigprocmask(i32 %3, i32* %1, i32* null)
%5 = load i64, i64* @rootshell, align 8
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %0
%8 = load i64, i64* @iflag, align 8
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* @EXINT, align 4
%12 = call i32 @exraise(i32 %11)
br label %23
13: ; preds = %7, %0
%14 = load i64, i64* @SIGINT, align 8
%15 = load i32, i32* @SIG_DFL, align 4
%16 = call i32 @signal(i64 %14, i32 %15)
%17 = call i64 (...) @getpid()
%18 = load i64, i64* @SIGINT, align 8
%19 = call i32 @kill(i64 %17, i64 %18)
%20 = load i64, i64* @SIGINT, align 8
%21 = add nsw i64 128, %20
%22 = call i32 @_exit(i64 %21)
unreachable
23: ; preds = %10
ret void
}
declare dso_local i32 @sigemptyset(i32*)
declare dso_local i32 @sigprocmask(i32, i32*, i32*)
declare dso_local i32 @exraise(i32)
declare dso_local i32 @signal(i64, i32)
declare dso_local i32 @kill(i64, i64)
declare dso_local i64 @getpid(...)
declare dso_local i32 @_exit(i64) | /* BEGIN FUNCTION-DEF onint LOC=UNKNOWN VKEY=4934 */
void onint(void)
{
sigset_t___0 sigs ;
scalar_t__ tmp ;
unsigned long _TIG_FN_fYsn_1_onint_next ;
{
{
_TIG_FN_fYsn_1_onint_next = 0UL;
}
while (1) {
switch (_TIG_FN_fYsn_1_onint_next) {
case 8UL:
#line 78 "/tmp/forklift_obfu_b6r58p7h/input.c"
signal(SIGINT, SIG_DFL);
#line 79
tmp = getpid();
#line 79
kill(tmp, SIGINT);
#line 80
_exit(128L + SIGINT);
{
_TIG_FN_fYsn_1_onint_next = 6UL;
}
break;
case 3UL:
#line 64
intpending = (scalar_t__ )0;
#line 65
sigemptyset(& sigs);
#line 66
sigprocmask(SIG_SETMASK, & sigs, (int *)((void *)0));
{
_TIG_FN_fYsn_1_onint_next = 5UL;
}
break;
case 9UL:
#line 76
exraise(EXINT);
{
_TIG_FN_fYsn_1_onint_next = 6UL;
}
break;
case 6UL: ;
return;
break;
case 5UL: ;
if (rootshell) {
{
_TIG_FN_fYsn_1_onint_next = 7UL;
}
} else {
{
_TIG_FN_fYsn_1_onint_next = 8UL;
}
}
break;
case 0UL: ;
{
_TIG_FN_fYsn_1_onint_next = 3UL;
}
break;
case 7UL: ;
if (iflag) {
{
_TIG_FN_fYsn_1_onint_next = 9UL;
}
} else {
{
_TIG_FN_fYsn_1_onint_next = 2UL;
}
}
break;
case 2UL:
#line 78
signal(SIGINT, SIG_DFL);
#line 79
tmp = getpid();
#line 79
kill(tmp, SIGINT);
#line 80
_exit(128L + SIGINT);
{
_TIG_FN_fYsn_1_onint_next = 6UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF onint LOC=UNKNOWN VKEY=4934 */ | 1,146,005,448 | train_synth_compilable |
irandianstodegrees | ireal irandianstodegrees(ireal randians) {
return randians * (180.0 / 3.14159265358979323846f);
} | EncodeArithmetic | .global irandianstodegrees
.type irandianstodegrees, %function
irandianstodegrees:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d0, [sp, 8]
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .word 218353446
| .global irandianstodegrees
.type irandianstodegrees, %function
irandianstodegrees:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d31, [sp, 8]
adrp x0, .LC0
ldr d30, [x0, #:lo12:.LC0]
fmul d31, d31, d30
fmov d0, d31
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size irandianstodegrees, .-irandianstodegrees | define dso_local double @irandianstodegrees(double %0) {
%2 = alloca double, align 8
store double %0, double* %2, align 8
%3 = load double, double* %2, align 8
%4 = fmul double %3, 0x404CA5DC0D03CF26
ret double %4
} | /* BEGIN FUNCTION-DEF irandianstodegrees LOC=UNKNOWN VKEY=4881 */
ireal irandianstodegrees(ireal randians )
{
{
#line 43 "/tmp/forklift_obfu_dzoyghtl/input.c"
return (randians * (180.0 / (double )3.14159265358979323846f));
}
}
/* END FUNCTION-DEF irandianstodegrees LOC=UNKNOWN VKEY=4881 */ | 49,310,608 | train_synth_compilable |
isrs_install | void isrs_install()
{
idt_set_gate(0, (unsigned)isr0, 0x08, 0x8E);
idt_set_gate(1, (unsigned)isr1, 0x08, 0x8E);
idt_set_gate(2, (unsigned)isr2, 0x08, 0x8E);
idt_set_gate(3, (unsigned)isr3, 0x08, 0x8E);
idt_set_gate(4, (unsigned)isr4, 0x08, 0x8E);
idt_set_gate(5, (unsigned)isr5, 0x08, 0x8E);
idt_set_gate(6, (unsigned)isr6, 0x08, 0x8E);
idt_set_gate(7, (unsigned)isr7, 0x08, 0x8E);
idt_set_gate(8, (unsigned)isr8, 0x08, 0x8E);
idt_set_gate(9, (unsigned)isr9, 0x08, 0x8E);
idt_set_gate(10, (unsigned)isr10, 0x08, 0x8E);
idt_set_gate(11, (unsigned)isr11, 0x08, 0x8E);
idt_set_gate(12, (unsigned)isr12, 0x08, 0x8E);
idt_set_gate(13, (unsigned)isr13, 0x08, 0x8E);
idt_set_gate(14, (unsigned)isr14, 0x08, 0x8E);
idt_set_gate(15, (unsigned)isr15, 0x08, 0x8E);
idt_set_gate(16, (unsigned)isr16, 0x08, 0x8E);
idt_set_gate(17, (unsigned)isr17, 0x08, 0x8E);
idt_set_gate(18, (unsigned)isr18, 0x08, 0x8E);
idt_set_gate(19, (unsigned)isr19, 0x08, 0x8E);
idt_set_gate(20, (unsigned)isr20, 0x08, 0x8E);
idt_set_gate(21, (unsigned)isr21, 0x08, 0x8E);
idt_set_gate(22, (unsigned)isr22, 0x08, 0x8E);
idt_set_gate(23, (unsigned)isr23, 0x08, 0x8E);
idt_set_gate(24, (unsigned)isr24, 0x08, 0x8E);
idt_set_gate(25, (unsigned)isr25, 0x08, 0x8E);
idt_set_gate(26, (unsigned)isr26, 0x08, 0x8E);
idt_set_gate(27, (unsigned)isr27, 0x08, 0x8E);
idt_set_gate(28, (unsigned)isr28, 0x08, 0x8E);
idt_set_gate(29, (unsigned)isr29, 0x08, 0x8E);
idt_set_gate(30, (unsigned)isr30, 0x08, 0x8E);
idt_set_gate(31, (unsigned)isr31, 0x08, 0x8E);
idt_set_gate(0x90, (unsigned)sys_call, 0x08, 0x8E);
} | Flatten | .global isrs_install
.type isrs_install, %function
isrs_install:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:isr0
ldr x0, [x0, #:got_lo12:isr0]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 0
bl idt_set_gate
adrp x0, :got:isr1
ldr x0, [x0, #:got_lo12:isr1]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 1
bl idt_set_gate
adrp x0, :got:isr2
ldr x0, [x0, #:got_lo12:isr2]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 2
bl idt_set_gate
adrp x0, :got:isr3
ldr x0, [x0, #:got_lo12:isr3]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 3
bl idt_set_gate
adrp x0, :got:isr4
ldr x0, [x0, #:got_lo12:isr4]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 4
bl idt_set_gate
adrp x0, :got:isr5
ldr x0, [x0, #:got_lo12:isr5]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 5
bl idt_set_gate
adrp x0, :got:isr6
ldr x0, [x0, #:got_lo12:isr6]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 6
bl idt_set_gate
adrp x0, :got:isr7
ldr x0, [x0, #:got_lo12:isr7]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 7
bl idt_set_gate
adrp x0, :got:isr8
ldr x0, [x0, #:got_lo12:isr8]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 8
bl idt_set_gate
adrp x0, :got:isr9
ldr x0, [x0, #:got_lo12:isr9]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 9
bl idt_set_gate
adrp x0, :got:isr10
ldr x0, [x0, #:got_lo12:isr10]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 10
bl idt_set_gate
adrp x0, :got:isr11
ldr x0, [x0, #:got_lo12:isr11]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 11
bl idt_set_gate
adrp x0, :got:isr12
ldr x0, [x0, #:got_lo12:isr12]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 12
bl idt_set_gate
adrp x0, :got:isr13
ldr x0, [x0, #:got_lo12:isr13]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 13
bl idt_set_gate
adrp x0, :got:isr14
ldr x0, [x0, #:got_lo12:isr14]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 14
bl idt_set_gate
adrp x0, :got:isr15
ldr x0, [x0, #:got_lo12:isr15]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 15
bl idt_set_gate
adrp x0, :got:isr16
ldr x0, [x0, #:got_lo12:isr16]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 16
bl idt_set_gate
adrp x0, :got:isr17
ldr x0, [x0, #:got_lo12:isr17]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 17
bl idt_set_gate
adrp x0, :got:isr18
ldr x0, [x0, #:got_lo12:isr18]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 18
bl idt_set_gate
adrp x0, :got:isr19
ldr x0, [x0, #:got_lo12:isr19]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 19
bl idt_set_gate
adrp x0, :got:isr20
ldr x0, [x0, #:got_lo12:isr20]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 20
bl idt_set_gate
adrp x0, :got:isr21
ldr x0, [x0, #:got_lo12:isr21]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 21
bl idt_set_gate
adrp x0, :got:isr22
ldr x0, [x0, #:got_lo12:isr22]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 22
bl idt_set_gate
adrp x0, :got:isr23
ldr x0, [x0, #:got_lo12:isr23]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 23
bl idt_set_gate
adrp x0, :got:isr24
ldr x0, [x0, #:got_lo12:isr24]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 24
bl idt_set_gate
adrp x0, :got:isr25
ldr x0, [x0, #:got_lo12:isr25]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 25
bl idt_set_gate
adrp x0, :got:isr26
ldr x0, [x0, #:got_lo12:isr26]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 26
bl idt_set_gate
adrp x0, :got:isr27
ldr x0, [x0, #:got_lo12:isr27]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 27
bl idt_set_gate
adrp x0, :got:isr28
ldr x0, [x0, #:got_lo12:isr28]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 28
bl idt_set_gate
adrp x0, :got:isr29
ldr x0, [x0, #:got_lo12:isr29]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 29
bl idt_set_gate
adrp x0, :got:isr30
ldr x0, [x0, #:got_lo12:isr30]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 30
bl idt_set_gate
adrp x0, :got:isr31
ldr x0, [x0, #:got_lo12:isr31]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 31
bl idt_set_gate
adrp x0, :got:sys_call
ldr x0, [x0, #:got_lo12:sys_call]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 144
bl idt_set_gate
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global isrs_install
.type isrs_install, %function
isrs_install:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str xzr, [sp, 24]
.L7:
ldr x0, [sp, 24]
cmp x0, 2
beq .L8
ldr x0, [sp, 24]
cmp x0, 2
bhi .L9
ldr x0, [sp, 24]
cmp x0, 0
beq .L4
ldr x0, [sp, 24]
cmp x0, 1
bne .L9
adrp x0, isr0
add x0, x0, :lo12:isr0
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 0
bl idt_set_gate
adrp x0, isr1
add x0, x0, :lo12:isr1
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 1
bl idt_set_gate
adrp x0, isr2
add x0, x0, :lo12:isr2
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 2
bl idt_set_gate
adrp x0, isr3
add x0, x0, :lo12:isr3
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 3
bl idt_set_gate
adrp x0, isr4
add x0, x0, :lo12:isr4
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 4
bl idt_set_gate
adrp x0, isr5
add x0, x0, :lo12:isr5
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 5
bl idt_set_gate
adrp x0, isr6
add x0, x0, :lo12:isr6
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 6
bl idt_set_gate
adrp x0, isr7
add x0, x0, :lo12:isr7
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 7
bl idt_set_gate
adrp x0, isr8
add x0, x0, :lo12:isr8
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 8
bl idt_set_gate
adrp x0, isr9
add x0, x0, :lo12:isr9
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 9
bl idt_set_gate
adrp x0, isr10
add x0, x0, :lo12:isr10
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 10
bl idt_set_gate
adrp x0, isr11
add x0, x0, :lo12:isr11
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 11
bl idt_set_gate
adrp x0, isr12
add x0, x0, :lo12:isr12
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 12
bl idt_set_gate
adrp x0, isr13
add x0, x0, :lo12:isr13
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 13
bl idt_set_gate
adrp x0, isr14
add x0, x0, :lo12:isr14
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 14
bl idt_set_gate
adrp x0, isr15
add x0, x0, :lo12:isr15
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 15
bl idt_set_gate
adrp x0, isr16
add x0, x0, :lo12:isr16
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 16
bl idt_set_gate
adrp x0, isr17
add x0, x0, :lo12:isr17
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 17
bl idt_set_gate
adrp x0, isr18
add x0, x0, :lo12:isr18
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 18
bl idt_set_gate
adrp x0, isr19
add x0, x0, :lo12:isr19
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 19
bl idt_set_gate
adrp x0, isr20
add x0, x0, :lo12:isr20
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 20
bl idt_set_gate
adrp x0, isr21
add x0, x0, :lo12:isr21
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 21
bl idt_set_gate
adrp x0, isr22
add x0, x0, :lo12:isr22
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 22
bl idt_set_gate
adrp x0, isr23
add x0, x0, :lo12:isr23
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 23
bl idt_set_gate
adrp x0, isr24
add x0, x0, :lo12:isr24
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 24
bl idt_set_gate
adrp x0, isr25
add x0, x0, :lo12:isr25
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 25
bl idt_set_gate
adrp x0, isr26
add x0, x0, :lo12:isr26
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 26
bl idt_set_gate
adrp x0, isr27
add x0, x0, :lo12:isr27
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 27
bl idt_set_gate
adrp x0, isr28
add x0, x0, :lo12:isr28
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 28
bl idt_set_gate
adrp x0, isr29
add x0, x0, :lo12:isr29
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 29
bl idt_set_gate
adrp x0, isr30
add x0, x0, :lo12:isr30
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 30
bl idt_set_gate
adrp x0, isr31
add x0, x0, :lo12:isr31
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 31
bl idt_set_gate
adrp x0, sys_call
add x0, x0, :lo12:sys_call
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 144
bl idt_set_gate
mov x0, 2
str x0, [sp, 24]
b .L5
.L4:
mov x0, 1
str x0, [sp, 24]
b .L5
.L9:
nop
.L5:
b .L7
.L8:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size isrs_install, .-isrs_install | @isr0 = external dso_local global i64, align 8
@isr1 = external dso_local global i64, align 8
@isr2 = external dso_local global i64, align 8
@isr3 = external dso_local global i64, align 8
@isr4 = external dso_local global i64, align 8
@isr5 = external dso_local global i64, align 8
@isr6 = external dso_local global i64, align 8
@isr7 = external dso_local global i64, align 8
@isr8 = external dso_local global i64, align 8
@isr9 = external dso_local global i64, align 8
@isr10 = external dso_local global i64, align 8
@isr11 = external dso_local global i64, align 8
@isr12 = external dso_local global i64, align 8
@isr13 = external dso_local global i64, align 8
@isr14 = external dso_local global i64, align 8
@isr15 = external dso_local global i64, align 8
@isr16 = external dso_local global i64, align 8
@isr17 = external dso_local global i64, align 8
@isr18 = external dso_local global i64, align 8
@isr19 = external dso_local global i64, align 8
@isr20 = external dso_local global i64, align 8
@isr21 = external dso_local global i64, align 8
@isr22 = external dso_local global i64, align 8
@isr23 = external dso_local global i64, align 8
@isr24 = external dso_local global i64, align 8
@isr25 = external dso_local global i64, align 8
@isr26 = external dso_local global i64, align 8
@isr27 = external dso_local global i64, align 8
@isr28 = external dso_local global i64, align 8
@isr29 = external dso_local global i64, align 8
@isr30 = external dso_local global i64, align 8
@isr31 = external dso_local global i64, align 8
@sys_call = external dso_local global i64, align 8
define dso_local void @isrs_install() {
%1 = load i64, i64* @isr0, align 8
%2 = trunc i64 %1 to i32
%3 = call i32 @idt_set_gate(i32 0, i32 %2, i32 8, i32 142)
%4 = load i64, i64* @isr1, align 8
%5 = trunc i64 %4 to i32
%6 = call i32 @idt_set_gate(i32 1, i32 %5, i32 8, i32 142)
%7 = load i64, i64* @isr2, align 8
%8 = trunc i64 %7 to i32
%9 = call i32 @idt_set_gate(i32 2, i32 %8, i32 8, i32 142)
%10 = load i64, i64* @isr3, align 8
%11 = trunc i64 %10 to i32
%12 = call i32 @idt_set_gate(i32 3, i32 %11, i32 8, i32 142)
%13 = load i64, i64* @isr4, align 8
%14 = trunc i64 %13 to i32
%15 = call i32 @idt_set_gate(i32 4, i32 %14, i32 8, i32 142)
%16 = load i64, i64* @isr5, align 8
%17 = trunc i64 %16 to i32
%18 = call i32 @idt_set_gate(i32 5, i32 %17, i32 8, i32 142)
%19 = load i64, i64* @isr6, align 8
%20 = trunc i64 %19 to i32
%21 = call i32 @idt_set_gate(i32 6, i32 %20, i32 8, i32 142)
%22 = load i64, i64* @isr7, align 8
%23 = trunc i64 %22 to i32
%24 = call i32 @idt_set_gate(i32 7, i32 %23, i32 8, i32 142)
%25 = load i64, i64* @isr8, align 8
%26 = trunc i64 %25 to i32
%27 = call i32 @idt_set_gate(i32 8, i32 %26, i32 8, i32 142)
%28 = load i64, i64* @isr9, align 8
%29 = trunc i64 %28 to i32
%30 = call i32 @idt_set_gate(i32 9, i32 %29, i32 8, i32 142)
%31 = load i64, i64* @isr10, align 8
%32 = trunc i64 %31 to i32
%33 = call i32 @idt_set_gate(i32 10, i32 %32, i32 8, i32 142)
%34 = load i64, i64* @isr11, align 8
%35 = trunc i64 %34 to i32
%36 = call i32 @idt_set_gate(i32 11, i32 %35, i32 8, i32 142)
%37 = load i64, i64* @isr12, align 8
%38 = trunc i64 %37 to i32
%39 = call i32 @idt_set_gate(i32 12, i32 %38, i32 8, i32 142)
%40 = load i64, i64* @isr13, align 8
%41 = trunc i64 %40 to i32
%42 = call i32 @idt_set_gate(i32 13, i32 %41, i32 8, i32 142)
%43 = load i64, i64* @isr14, align 8
%44 = trunc i64 %43 to i32
%45 = call i32 @idt_set_gate(i32 14, i32 %44, i32 8, i32 142)
%46 = load i64, i64* @isr15, align 8
%47 = trunc i64 %46 to i32
%48 = call i32 @idt_set_gate(i32 15, i32 %47, i32 8, i32 142)
%49 = load i64, i64* @isr16, align 8
%50 = trunc i64 %49 to i32
%51 = call i32 @idt_set_gate(i32 16, i32 %50, i32 8, i32 142)
%52 = load i64, i64* @isr17, align 8
%53 = trunc i64 %52 to i32
%54 = call i32 @idt_set_gate(i32 17, i32 %53, i32 8, i32 142)
%55 = load i64, i64* @isr18, align 8
%56 = trunc i64 %55 to i32
%57 = call i32 @idt_set_gate(i32 18, i32 %56, i32 8, i32 142)
%58 = load i64, i64* @isr19, align 8
%59 = trunc i64 %58 to i32
%60 = call i32 @idt_set_gate(i32 19, i32 %59, i32 8, i32 142)
%61 = load i64, i64* @isr20, align 8
%62 = trunc i64 %61 to i32
%63 = call i32 @idt_set_gate(i32 20, i32 %62, i32 8, i32 142)
%64 = load i64, i64* @isr21, align 8
%65 = trunc i64 %64 to i32
%66 = call i32 @idt_set_gate(i32 21, i32 %65, i32 8, i32 142)
%67 = load i64, i64* @isr22, align 8
%68 = trunc i64 %67 to i32
%69 = call i32 @idt_set_gate(i32 22, i32 %68, i32 8, i32 142)
%70 = load i64, i64* @isr23, align 8
%71 = trunc i64 %70 to i32
%72 = call i32 @idt_set_gate(i32 23, i32 %71, i32 8, i32 142)
%73 = load i64, i64* @isr24, align 8
%74 = trunc i64 %73 to i32
%75 = call i32 @idt_set_gate(i32 24, i32 %74, i32 8, i32 142)
%76 = load i64, i64* @isr25, align 8
%77 = trunc i64 %76 to i32
%78 = call i32 @idt_set_gate(i32 25, i32 %77, i32 8, i32 142)
%79 = load i64, i64* @isr26, align 8
%80 = trunc i64 %79 to i32
%81 = call i32 @idt_set_gate(i32 26, i32 %80, i32 8, i32 142)
%82 = load i64, i64* @isr27, align 8
%83 = trunc i64 %82 to i32
%84 = call i32 @idt_set_gate(i32 27, i32 %83, i32 8, i32 142)
%85 = load i64, i64* @isr28, align 8
%86 = trunc i64 %85 to i32
%87 = call i32 @idt_set_gate(i32 28, i32 %86, i32 8, i32 142)
%88 = load i64, i64* @isr29, align 8
%89 = trunc i64 %88 to i32
%90 = call i32 @idt_set_gate(i32 29, i32 %89, i32 8, i32 142)
%91 = load i64, i64* @isr30, align 8
%92 = trunc i64 %91 to i32
%93 = call i32 @idt_set_gate(i32 30, i32 %92, i32 8, i32 142)
%94 = load i64, i64* @isr31, align 8
%95 = trunc i64 %94 to i32
%96 = call i32 @idt_set_gate(i32 31, i32 %95, i32 8, i32 142)
%97 = load i64, i64* @sys_call, align 8
%98 = trunc i64 %97 to i32
%99 = call i32 @idt_set_gate(i32 144, i32 %98, i32 8, i32 142)
ret void
}
declare dso_local i32 @idt_set_gate(i32, i32, i32, i32) | /* BEGIN FUNCTION-DEF isrs_install LOC=UNKNOWN VKEY=4953 */
void isrs_install(void)
{
unsigned long _TIG_FN_7gTD_1_isrs_install_next ;
{
{
_TIG_FN_7gTD_1_isrs_install_next = 0UL;
}
while (1) {
switch (_TIG_FN_7gTD_1_isrs_install_next) {
case 1UL:
#line 77 "/tmp/forklift_obfu_atdgzxzd/input.c"
idt_set_gate(0, (unsigned int )isr0, 0x08, 0x8E);
#line 78
idt_set_gate(1, (unsigned int )isr1, 0x08, 0x8E);
#line 79
idt_set_gate(2, (unsigned int )isr2, 0x08, 0x8E);
#line 80
idt_set_gate(3, (unsigned int )isr3, 0x08, 0x8E);
#line 81
idt_set_gate(4, (unsigned int )isr4, 0x08, 0x8E);
#line 82
idt_set_gate(5, (unsigned int )isr5, 0x08, 0x8E);
#line 83
idt_set_gate(6, (unsigned int )isr6, 0x08, 0x8E);
#line 84
idt_set_gate(7, (unsigned int )isr7, 0x08, 0x8E);
#line 86
idt_set_gate(8, (unsigned int )isr8, 0x08, 0x8E);
#line 87
idt_set_gate(9, (unsigned int )isr9, 0x08, 0x8E);
#line 88
idt_set_gate(10, (unsigned int )isr10, 0x08, 0x8E);
#line 89
idt_set_gate(11, (unsigned int )isr11, 0x08, 0x8E);
#line 90
idt_set_gate(12, (unsigned int )isr12, 0x08, 0x8E);
#line 91
idt_set_gate(13, (unsigned int )isr13, 0x08, 0x8E);
#line 92
idt_set_gate(14, (unsigned int )isr14, 0x08, 0x8E);
#line 93
idt_set_gate(15, (unsigned int )isr15, 0x08, 0x8E);
#line 95
idt_set_gate(16, (unsigned int )isr16, 0x08, 0x8E);
#line 96
idt_set_gate(17, (unsigned int )isr17, 0x08, 0x8E);
#line 97
idt_set_gate(18, (unsigned int )isr18, 0x08, 0x8E);
#line 98
idt_set_gate(19, (unsigned int )isr19, 0x08, 0x8E);
#line 99
idt_set_gate(20, (unsigned int )isr20, 0x08, 0x8E);
#line 100
idt_set_gate(21, (unsigned int )isr21, 0x08, 0x8E);
#line 101
idt_set_gate(22, (unsigned int )isr22, 0x08, 0x8E);
#line 102
idt_set_gate(23, (unsigned int )isr23, 0x08, 0x8E);
#line 104
idt_set_gate(24, (unsigned int )isr24, 0x08, 0x8E);
#line 105
idt_set_gate(25, (unsigned int )isr25, 0x08, 0x8E);
#line 106
idt_set_gate(26, (unsigned int )isr26, 0x08, 0x8E);
#line 107
idt_set_gate(27, (unsigned int )isr27, 0x08, 0x8E);
#line 108
idt_set_gate(28, (unsigned int )isr28, 0x08, 0x8E);
#line 109
idt_set_gate(29, (unsigned int )isr29, 0x08, 0x8E);
#line 110
idt_set_gate(30, (unsigned int )isr30, 0x08, 0x8E);
#line 111
idt_set_gate(31, (unsigned int )isr31, 0x08, 0x8E);
#line 113
idt_set_gate(0x90, (unsigned int )sys_call, 0x08, 0x8E);
{
_TIG_FN_7gTD_1_isrs_install_next = 2UL;
}
break;
case 0UL: ;
{
_TIG_FN_7gTD_1_isrs_install_next = 1UL;
}
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF isrs_install LOC=UNKNOWN VKEY=4953 */ | 1,260,573,448 | train_synth_compilable |
isrs_install | void isrs_install()
{
idt_set_gate(0, (unsigned)isr0, 0x08, 0x8E);
idt_set_gate(1, (unsigned)isr1, 0x08, 0x8E);
idt_set_gate(2, (unsigned)isr2, 0x08, 0x8E);
idt_set_gate(3, (unsigned)isr3, 0x08, 0x8E);
idt_set_gate(4, (unsigned)isr4, 0x08, 0x8E);
idt_set_gate(5, (unsigned)isr5, 0x08, 0x8E);
idt_set_gate(6, (unsigned)isr6, 0x08, 0x8E);
idt_set_gate(7, (unsigned)isr7, 0x08, 0x8E);
idt_set_gate(8, (unsigned)isr8, 0x08, 0x8E);
idt_set_gate(9, (unsigned)isr9, 0x08, 0x8E);
idt_set_gate(10, (unsigned)isr10, 0x08, 0x8E);
idt_set_gate(11, (unsigned)isr11, 0x08, 0x8E);
idt_set_gate(12, (unsigned)isr12, 0x08, 0x8E);
idt_set_gate(13, (unsigned)isr13, 0x08, 0x8E);
idt_set_gate(14, (unsigned)isr14, 0x08, 0x8E);
idt_set_gate(15, (unsigned)isr15, 0x08, 0x8E);
idt_set_gate(16, (unsigned)isr16, 0x08, 0x8E);
idt_set_gate(17, (unsigned)isr17, 0x08, 0x8E);
idt_set_gate(18, (unsigned)isr18, 0x08, 0x8E);
idt_set_gate(19, (unsigned)isr19, 0x08, 0x8E);
idt_set_gate(20, (unsigned)isr20, 0x08, 0x8E);
idt_set_gate(21, (unsigned)isr21, 0x08, 0x8E);
idt_set_gate(22, (unsigned)isr22, 0x08, 0x8E);
idt_set_gate(23, (unsigned)isr23, 0x08, 0x8E);
idt_set_gate(24, (unsigned)isr24, 0x08, 0x8E);
idt_set_gate(25, (unsigned)isr25, 0x08, 0x8E);
idt_set_gate(26, (unsigned)isr26, 0x08, 0x8E);
idt_set_gate(27, (unsigned)isr27, 0x08, 0x8E);
idt_set_gate(28, (unsigned)isr28, 0x08, 0x8E);
idt_set_gate(29, (unsigned)isr29, 0x08, 0x8E);
idt_set_gate(30, (unsigned)isr30, 0x08, 0x8E);
idt_set_gate(31, (unsigned)isr31, 0x08, 0x8E);
idt_set_gate(0x90, (unsigned)sys_call, 0x08, 0x8E);
} | Flatten+EncodeArithmetic | .global isrs_install
.type isrs_install, %function
isrs_install:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:isr0
ldr x0, [x0, #:got_lo12:isr0]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 0
bl idt_set_gate
adrp x0, :got:isr1
ldr x0, [x0, #:got_lo12:isr1]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 1
bl idt_set_gate
adrp x0, :got:isr2
ldr x0, [x0, #:got_lo12:isr2]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 2
bl idt_set_gate
adrp x0, :got:isr3
ldr x0, [x0, #:got_lo12:isr3]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 3
bl idt_set_gate
adrp x0, :got:isr4
ldr x0, [x0, #:got_lo12:isr4]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 4
bl idt_set_gate
adrp x0, :got:isr5
ldr x0, [x0, #:got_lo12:isr5]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 5
bl idt_set_gate
adrp x0, :got:isr6
ldr x0, [x0, #:got_lo12:isr6]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 6
bl idt_set_gate
adrp x0, :got:isr7
ldr x0, [x0, #:got_lo12:isr7]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 7
bl idt_set_gate
adrp x0, :got:isr8
ldr x0, [x0, #:got_lo12:isr8]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 8
bl idt_set_gate
adrp x0, :got:isr9
ldr x0, [x0, #:got_lo12:isr9]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 9
bl idt_set_gate
adrp x0, :got:isr10
ldr x0, [x0, #:got_lo12:isr10]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 10
bl idt_set_gate
adrp x0, :got:isr11
ldr x0, [x0, #:got_lo12:isr11]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 11
bl idt_set_gate
adrp x0, :got:isr12
ldr x0, [x0, #:got_lo12:isr12]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 12
bl idt_set_gate
adrp x0, :got:isr13
ldr x0, [x0, #:got_lo12:isr13]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 13
bl idt_set_gate
adrp x0, :got:isr14
ldr x0, [x0, #:got_lo12:isr14]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 14
bl idt_set_gate
adrp x0, :got:isr15
ldr x0, [x0, #:got_lo12:isr15]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 15
bl idt_set_gate
adrp x0, :got:isr16
ldr x0, [x0, #:got_lo12:isr16]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 16
bl idt_set_gate
adrp x0, :got:isr17
ldr x0, [x0, #:got_lo12:isr17]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 17
bl idt_set_gate
adrp x0, :got:isr18
ldr x0, [x0, #:got_lo12:isr18]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 18
bl idt_set_gate
adrp x0, :got:isr19
ldr x0, [x0, #:got_lo12:isr19]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 19
bl idt_set_gate
adrp x0, :got:isr20
ldr x0, [x0, #:got_lo12:isr20]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 20
bl idt_set_gate
adrp x0, :got:isr21
ldr x0, [x0, #:got_lo12:isr21]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 21
bl idt_set_gate
adrp x0, :got:isr22
ldr x0, [x0, #:got_lo12:isr22]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 22
bl idt_set_gate
adrp x0, :got:isr23
ldr x0, [x0, #:got_lo12:isr23]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 23
bl idt_set_gate
adrp x0, :got:isr24
ldr x0, [x0, #:got_lo12:isr24]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 24
bl idt_set_gate
adrp x0, :got:isr25
ldr x0, [x0, #:got_lo12:isr25]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 25
bl idt_set_gate
adrp x0, :got:isr26
ldr x0, [x0, #:got_lo12:isr26]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 26
bl idt_set_gate
adrp x0, :got:isr27
ldr x0, [x0, #:got_lo12:isr27]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 27
bl idt_set_gate
adrp x0, :got:isr28
ldr x0, [x0, #:got_lo12:isr28]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 28
bl idt_set_gate
adrp x0, :got:isr29
ldr x0, [x0, #:got_lo12:isr29]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 29
bl idt_set_gate
adrp x0, :got:isr30
ldr x0, [x0, #:got_lo12:isr30]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 30
bl idt_set_gate
adrp x0, :got:isr31
ldr x0, [x0, #:got_lo12:isr31]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 31
bl idt_set_gate
adrp x0, :got:sys_call
ldr x0, [x0, #:got_lo12:sys_call]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 144
bl idt_set_gate
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global isrs_install
.type isrs_install, %function
isrs_install:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str xzr, [sp, 24]
.L46:
ldr x0, [sp, 24]
cmp x0, 2
beq .L47
ldr x0, [sp, 24]
cmp x0, 2
bhi .L48
ldr x0, [sp, 24]
cmp x0, 0
beq .L43
ldr x0, [sp, 24]
cmp x0, 1
bne .L48
adrp x0, isr0
add x0, x0, :lo12:isr0
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 0
bl idt_set_gate
adrp x0, isr1
add x0, x0, :lo12:isr1
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 1
bl idt_set_gate
adrp x0, isr2
add x0, x0, :lo12:isr2
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 2
bl idt_set_gate
adrp x0, isr3
add x0, x0, :lo12:isr3
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 3
bl idt_set_gate
adrp x0, isr4
add x0, x0, :lo12:isr4
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 4
bl idt_set_gate
adrp x0, isr5
add x0, x0, :lo12:isr5
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 5
bl idt_set_gate
adrp x0, isr6
add x0, x0, :lo12:isr6
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 6
bl idt_set_gate
adrp x0, isr7
add x0, x0, :lo12:isr7
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 7
bl idt_set_gate
adrp x0, isr8
add x0, x0, :lo12:isr8
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 8
bl idt_set_gate
adrp x0, isr9
add x0, x0, :lo12:isr9
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 9
bl idt_set_gate
adrp x0, isr10
add x0, x0, :lo12:isr10
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 10
bl idt_set_gate
adrp x0, isr11
add x0, x0, :lo12:isr11
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 11
bl idt_set_gate
adrp x0, isr12
add x0, x0, :lo12:isr12
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 12
bl idt_set_gate
adrp x0, isr13
add x0, x0, :lo12:isr13
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 13
bl idt_set_gate
adrp x0, isr14
add x0, x0, :lo12:isr14
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 14
bl idt_set_gate
adrp x0, isr15
add x0, x0, :lo12:isr15
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 15
bl idt_set_gate
adrp x0, isr16
add x0, x0, :lo12:isr16
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 16
bl idt_set_gate
adrp x0, isr17
add x0, x0, :lo12:isr17
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 17
bl idt_set_gate
adrp x0, isr18
add x0, x0, :lo12:isr18
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 18
bl idt_set_gate
adrp x0, isr19
add x0, x0, :lo12:isr19
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 19
bl idt_set_gate
adrp x0, isr20
add x0, x0, :lo12:isr20
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 20
bl idt_set_gate
adrp x0, isr21
add x0, x0, :lo12:isr21
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 21
bl idt_set_gate
adrp x0, isr22
add x0, x0, :lo12:isr22
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 22
bl idt_set_gate
adrp x0, isr23
add x0, x0, :lo12:isr23
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 23
bl idt_set_gate
adrp x0, isr24
add x0, x0, :lo12:isr24
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 24
bl idt_set_gate
adrp x0, isr25
add x0, x0, :lo12:isr25
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 25
bl idt_set_gate
adrp x0, isr26
add x0, x0, :lo12:isr26
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 26
bl idt_set_gate
adrp x0, isr27
add x0, x0, :lo12:isr27
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 27
bl idt_set_gate
adrp x0, isr28
add x0, x0, :lo12:isr28
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 28
bl idt_set_gate
adrp x0, isr29
add x0, x0, :lo12:isr29
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 29
bl idt_set_gate
adrp x0, isr30
add x0, x0, :lo12:isr30
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 30
bl idt_set_gate
adrp x0, isr31
add x0, x0, :lo12:isr31
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 31
bl idt_set_gate
adrp x0, sys_call
add x0, x0, :lo12:sys_call
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 144
bl idt_set_gate
mov x0, 2
str x0, [sp, 24]
b .L44
.L43:
mov x0, 1
str x0, [sp, 24]
b .L44
.L48:
nop
.L44:
b .L46
.L47:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size isrs_install, .-isrs_install | @isr0 = external dso_local global i64, align 8
@isr1 = external dso_local global i64, align 8
@isr2 = external dso_local global i64, align 8
@isr3 = external dso_local global i64, align 8
@isr4 = external dso_local global i64, align 8
@isr5 = external dso_local global i64, align 8
@isr6 = external dso_local global i64, align 8
@isr7 = external dso_local global i64, align 8
@isr8 = external dso_local global i64, align 8
@isr9 = external dso_local global i64, align 8
@isr10 = external dso_local global i64, align 8
@isr11 = external dso_local global i64, align 8
@isr12 = external dso_local global i64, align 8
@isr13 = external dso_local global i64, align 8
@isr14 = external dso_local global i64, align 8
@isr15 = external dso_local global i64, align 8
@isr16 = external dso_local global i64, align 8
@isr17 = external dso_local global i64, align 8
@isr18 = external dso_local global i64, align 8
@isr19 = external dso_local global i64, align 8
@isr20 = external dso_local global i64, align 8
@isr21 = external dso_local global i64, align 8
@isr22 = external dso_local global i64, align 8
@isr23 = external dso_local global i64, align 8
@isr24 = external dso_local global i64, align 8
@isr25 = external dso_local global i64, align 8
@isr26 = external dso_local global i64, align 8
@isr27 = external dso_local global i64, align 8
@isr28 = external dso_local global i64, align 8
@isr29 = external dso_local global i64, align 8
@isr30 = external dso_local global i64, align 8
@isr31 = external dso_local global i64, align 8
@sys_call = external dso_local global i64, align 8
define dso_local void @isrs_install() {
%1 = load i64, i64* @isr0, align 8
%2 = trunc i64 %1 to i32
%3 = call i32 @idt_set_gate(i32 0, i32 %2, i32 8, i32 142)
%4 = load i64, i64* @isr1, align 8
%5 = trunc i64 %4 to i32
%6 = call i32 @idt_set_gate(i32 1, i32 %5, i32 8, i32 142)
%7 = load i64, i64* @isr2, align 8
%8 = trunc i64 %7 to i32
%9 = call i32 @idt_set_gate(i32 2, i32 %8, i32 8, i32 142)
%10 = load i64, i64* @isr3, align 8
%11 = trunc i64 %10 to i32
%12 = call i32 @idt_set_gate(i32 3, i32 %11, i32 8, i32 142)
%13 = load i64, i64* @isr4, align 8
%14 = trunc i64 %13 to i32
%15 = call i32 @idt_set_gate(i32 4, i32 %14, i32 8, i32 142)
%16 = load i64, i64* @isr5, align 8
%17 = trunc i64 %16 to i32
%18 = call i32 @idt_set_gate(i32 5, i32 %17, i32 8, i32 142)
%19 = load i64, i64* @isr6, align 8
%20 = trunc i64 %19 to i32
%21 = call i32 @idt_set_gate(i32 6, i32 %20, i32 8, i32 142)
%22 = load i64, i64* @isr7, align 8
%23 = trunc i64 %22 to i32
%24 = call i32 @idt_set_gate(i32 7, i32 %23, i32 8, i32 142)
%25 = load i64, i64* @isr8, align 8
%26 = trunc i64 %25 to i32
%27 = call i32 @idt_set_gate(i32 8, i32 %26, i32 8, i32 142)
%28 = load i64, i64* @isr9, align 8
%29 = trunc i64 %28 to i32
%30 = call i32 @idt_set_gate(i32 9, i32 %29, i32 8, i32 142)
%31 = load i64, i64* @isr10, align 8
%32 = trunc i64 %31 to i32
%33 = call i32 @idt_set_gate(i32 10, i32 %32, i32 8, i32 142)
%34 = load i64, i64* @isr11, align 8
%35 = trunc i64 %34 to i32
%36 = call i32 @idt_set_gate(i32 11, i32 %35, i32 8, i32 142)
%37 = load i64, i64* @isr12, align 8
%38 = trunc i64 %37 to i32
%39 = call i32 @idt_set_gate(i32 12, i32 %38, i32 8, i32 142)
%40 = load i64, i64* @isr13, align 8
%41 = trunc i64 %40 to i32
%42 = call i32 @idt_set_gate(i32 13, i32 %41, i32 8, i32 142)
%43 = load i64, i64* @isr14, align 8
%44 = trunc i64 %43 to i32
%45 = call i32 @idt_set_gate(i32 14, i32 %44, i32 8, i32 142)
%46 = load i64, i64* @isr15, align 8
%47 = trunc i64 %46 to i32
%48 = call i32 @idt_set_gate(i32 15, i32 %47, i32 8, i32 142)
%49 = load i64, i64* @isr16, align 8
%50 = trunc i64 %49 to i32
%51 = call i32 @idt_set_gate(i32 16, i32 %50, i32 8, i32 142)
%52 = load i64, i64* @isr17, align 8
%53 = trunc i64 %52 to i32
%54 = call i32 @idt_set_gate(i32 17, i32 %53, i32 8, i32 142)
%55 = load i64, i64* @isr18, align 8
%56 = trunc i64 %55 to i32
%57 = call i32 @idt_set_gate(i32 18, i32 %56, i32 8, i32 142)
%58 = load i64, i64* @isr19, align 8
%59 = trunc i64 %58 to i32
%60 = call i32 @idt_set_gate(i32 19, i32 %59, i32 8, i32 142)
%61 = load i64, i64* @isr20, align 8
%62 = trunc i64 %61 to i32
%63 = call i32 @idt_set_gate(i32 20, i32 %62, i32 8, i32 142)
%64 = load i64, i64* @isr21, align 8
%65 = trunc i64 %64 to i32
%66 = call i32 @idt_set_gate(i32 21, i32 %65, i32 8, i32 142)
%67 = load i64, i64* @isr22, align 8
%68 = trunc i64 %67 to i32
%69 = call i32 @idt_set_gate(i32 22, i32 %68, i32 8, i32 142)
%70 = load i64, i64* @isr23, align 8
%71 = trunc i64 %70 to i32
%72 = call i32 @idt_set_gate(i32 23, i32 %71, i32 8, i32 142)
%73 = load i64, i64* @isr24, align 8
%74 = trunc i64 %73 to i32
%75 = call i32 @idt_set_gate(i32 24, i32 %74, i32 8, i32 142)
%76 = load i64, i64* @isr25, align 8
%77 = trunc i64 %76 to i32
%78 = call i32 @idt_set_gate(i32 25, i32 %77, i32 8, i32 142)
%79 = load i64, i64* @isr26, align 8
%80 = trunc i64 %79 to i32
%81 = call i32 @idt_set_gate(i32 26, i32 %80, i32 8, i32 142)
%82 = load i64, i64* @isr27, align 8
%83 = trunc i64 %82 to i32
%84 = call i32 @idt_set_gate(i32 27, i32 %83, i32 8, i32 142)
%85 = load i64, i64* @isr28, align 8
%86 = trunc i64 %85 to i32
%87 = call i32 @idt_set_gate(i32 28, i32 %86, i32 8, i32 142)
%88 = load i64, i64* @isr29, align 8
%89 = trunc i64 %88 to i32
%90 = call i32 @idt_set_gate(i32 29, i32 %89, i32 8, i32 142)
%91 = load i64, i64* @isr30, align 8
%92 = trunc i64 %91 to i32
%93 = call i32 @idt_set_gate(i32 30, i32 %92, i32 8, i32 142)
%94 = load i64, i64* @isr31, align 8
%95 = trunc i64 %94 to i32
%96 = call i32 @idt_set_gate(i32 31, i32 %95, i32 8, i32 142)
%97 = load i64, i64* @sys_call, align 8
%98 = trunc i64 %97 to i32
%99 = call i32 @idt_set_gate(i32 144, i32 %98, i32 8, i32 142)
ret void
}
declare dso_local i32 @idt_set_gate(i32, i32, i32, i32) | /* BEGIN FUNCTION-DEF isrs_install LOC=UNKNOWN VKEY=4956 */
void isrs_install(void)
{
unsigned long _TIG_FN_SHba_1_isrs_install_next ;
{
_TIG_FN_SHba_1_isrs_install_next = 0UL;
while (1) {
switch (_TIG_FN_SHba_1_isrs_install_next) {
case 1UL:
{
#line 77 "/tmp/forklift_obfu_cnlsgmtn/input.c"
idt_set_gate(0, (unsigned int )isr0, 0x08, 0x8E);
#line 78
idt_set_gate(1, (unsigned int )isr1, 0x08, 0x8E);
#line 79
idt_set_gate(2, (unsigned int )isr2, 0x08, 0x8E);
#line 80
idt_set_gate(3, (unsigned int )isr3, 0x08, 0x8E);
#line 81
idt_set_gate(4, (unsigned int )isr4, 0x08, 0x8E);
#line 82
idt_set_gate(5, (unsigned int )isr5, 0x08, 0x8E);
#line 83
idt_set_gate(6, (unsigned int )isr6, 0x08, 0x8E);
#line 84
idt_set_gate(7, (unsigned int )isr7, 0x08, 0x8E);
#line 86
idt_set_gate(8, (unsigned int )isr8, 0x08, 0x8E);
#line 87
idt_set_gate(9, (unsigned int )isr9, 0x08, 0x8E);
#line 88
idt_set_gate(10, (unsigned int )isr10, 0x08, 0x8E);
#line 89
idt_set_gate(11, (unsigned int )isr11, 0x08, 0x8E);
#line 90
idt_set_gate(12, (unsigned int )isr12, 0x08, 0x8E);
#line 91
idt_set_gate(13, (unsigned int )isr13, 0x08, 0x8E);
#line 92
idt_set_gate(14, (unsigned int )isr14, 0x08, 0x8E);
#line 93
idt_set_gate(15, (unsigned int )isr15, 0x08, 0x8E);
#line 95
idt_set_gate(16, (unsigned int )isr16, 0x08, 0x8E);
#line 96
idt_set_gate(17, (unsigned int )isr17, 0x08, 0x8E);
#line 97
idt_set_gate(18, (unsigned int )isr18, 0x08, 0x8E);
#line 98
idt_set_gate(19, (unsigned int )isr19, 0x08, 0x8E);
#line 99
idt_set_gate(20, (unsigned int )isr20, 0x08, 0x8E);
#line 100
idt_set_gate(21, (unsigned int )isr21, 0x08, 0x8E);
#line 101
idt_set_gate(22, (unsigned int )isr22, 0x08, 0x8E);
#line 102
idt_set_gate(23, (unsigned int )isr23, 0x08, 0x8E);
#line 104
idt_set_gate(24, (unsigned int )isr24, 0x08, 0x8E);
#line 105
idt_set_gate(25, (unsigned int )isr25, 0x08, 0x8E);
#line 106
idt_set_gate(26, (unsigned int )isr26, 0x08, 0x8E);
#line 107
idt_set_gate(27, (unsigned int )isr27, 0x08, 0x8E);
#line 108
idt_set_gate(28, (unsigned int )isr28, 0x08, 0x8E);
#line 109
idt_set_gate(29, (unsigned int )isr29, 0x08, 0x8E);
#line 110
idt_set_gate(30, (unsigned int )isr30, 0x08, 0x8E);
#line 111
idt_set_gate(31, (unsigned int )isr31, 0x08, 0x8E);
#line 113
idt_set_gate(0x90, (unsigned int )sys_call, 0x08, 0x8E);
}
_TIG_FN_SHba_1_isrs_install_next = 2UL;
break;
case 0UL: ;
_TIG_FN_SHba_1_isrs_install_next = 1UL;
break;
case 2UL: ;
return;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF isrs_install LOC=UNKNOWN VKEY=4956 */ | 679,282,378 | train_synth_compilable |
ObjNumChildren | int ObjNumChildren(Obj *obj)
{
if (obj->type == 65) return(0);
return(obj->u1.nlst.numchildren);
} | Flatten+EncodeArithmetic | .global ObjNumChildren
.type ObjNumChildren, %function
ObjNumChildren:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
cmp w0, 65
bne .L2
mov w0, 0
b .L3
.L2:
ldr x0, [sp, 8]
ldr w0, [x0, 4]
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global ObjNumChildren
.type ObjNumChildren, %function
ObjNumChildren:
.LFB5:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mov x0, 2
str x0, [sp, 24]
.L15:
ldr x0, [sp, 24]
cmp x0, 2
beq .L8
ldr x0, [sp, 24]
cmp x0, 2
bhi .L16
ldr x0, [sp, 24]
cmp x0, 0
beq .L10
ldr x0, [sp, 24]
cmp x0, 1
bne .L16
ldr x0, [sp, 8]
ldr w0, [x0, 4]
b .L11
.L10:
mov w0, 0
b .L11
.L8:
ldr x0, [sp, 8]
ldr w0, [x0]
sub w1, w0, #65
ldr x0, [sp, 8]
ldr w0, [x0]
mov w2, 65
sub w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L12
str xzr, [sp, 24]
b .L14
.L12:
mov x0, 1
str x0, [sp, 24]
b .L14
.L16:
nop
.L14:
b .L15
.L11:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size ObjNumChildren, .-ObjNumChildren | %struct.TYPE_7__ = type { i32, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32 }
define dso_local i32 @ObjNumChildren(%struct.TYPE_7__* %0) {
%2 = alloca i32, align 4
%3 = alloca %struct.TYPE_7__*, align 8
store %struct.TYPE_7__* %0, %struct.TYPE_7__** %3, align 8
%4 = load %struct.TYPE_7__*, %struct.TYPE_7__** %3, align 8
%5 = getelementptr inbounds %struct.TYPE_7__, %struct.TYPE_7__* %4, i32 0, i32 0
%6 = load i32, i32* %5, align 4
%7 = icmp eq i32 %6, 65
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2, align 4
br label %15
9: ; preds = %1
%10 = load %struct.TYPE_7__*, %struct.TYPE_7__** %3, align 8
%11 = getelementptr inbounds %struct.TYPE_7__, %struct.TYPE_7__* %10, i32 0, i32 1
%12 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %11, i32 0, i32 0
%13 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %12, i32 0, i32 0
%14 = load i32, i32* %13, align 4
store i32 %14, i32* %2, align 4
br label %15
15: ; preds = %9, %8
%16 = load i32, i32* %2, align 4
ret i32 %16
} | /* BEGIN FUNCTION-DEF ObjNumChildren LOC=UNKNOWN VKEY=4885 */
int ObjNumChildren(Obj *obj )
{
unsigned long _TIG_FN_DgJE_1_ObjNumChildren_next ;
{
_TIG_FN_DgJE_1_ObjNumChildren_next = 2UL;
while (1) {
switch (_TIG_FN_DgJE_1_ObjNumChildren_next) {
case 1UL: ;
return (obj->u1.nlst.numchildren);
break;
case 0UL: ;
return (0);
break;
case 2UL: ;
if (((unsigned int )(~ ((obj->type - 65) | (65 - obj->type))) >> 31U) & 1) {
_TIG_FN_DgJE_1_ObjNumChildren_next = 0UL;
} else {
_TIG_FN_DgJE_1_ObjNumChildren_next = 1UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF ObjNumChildren LOC=UNKNOWN VKEY=4885 */ | 2,010,258,946 | train_synth_compilable |
onint | void
onint(void)
{
sigset_t sigs;
intpending = 0;
sigemptyset(&sigs);
sigprocmask(SIG_SETMASK, &sigs, NULL);
/*
* This doesn't seem to be needed, since main() emits a newline.
*/
#if 0
if (tcgetpgrp(0) == getpid())
write(STDERR_FILENO, "\n", 1);
#endif
if (rootshell && iflag)
exraise(EXINT);
else {
signal(SIGINT, SIG_DFL);
kill(getpid(), SIGINT);
_exit(128 + SIGINT);
}
} | EncodeArithmetic | .global onint
.type onint, %function
onint:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1,0
adrp x0, :got:intpending
ldr x0, [x0, #:got_lo12:intpending]
str xzr, [x0]
add x0, sp, 20
bl sigemptyset
adrp x0, :got:SIG_SETMASK
ldr x0, [x0, #:got_lo12:SIG_SETMASK]
ldr w0, [x0]
add x1, sp, 20
mov x2, 0
bl sigprocmask
adrp x0, :got:rootshell
ldr x0, [x0, #:got_lo12:rootshell]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:iflag
ldr x0, [x0, #:got_lo12:iflag]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:EXINT
ldr x0, [x0, #:got_lo12:EXINT]
ldr w0, [x0]
bl exraise
b .L3
.L2:
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x2, [x0]
adrp x0, :got:SIG_DFL
ldr x0, [x0, #:got_lo12:SIG_DFL]
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
mov x2, x0
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl kill
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x0, [x0]
add x0, x0, 128
bl _exit
.L3:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [sp, 24]
ldr x2, [x0]
subs x1, x1, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global onint
.type onint, %function
onint:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, intpending
add x0, x0, :lo12:intpending
str xzr, [x0]
add x0, sp, 20
bl sigemptyset
adrp x0, SIG_SETMASK
add x0, x0, :lo12:SIG_SETMASK
ldr w0, [x0]
add x1, sp, 20
mov x2, 0
bl sigprocmask
adrp x0, rootshell
add x0, x0, :lo12:rootshell
ldr x0, [x0]
cmp x0, 0
beq .L16
adrp x0, iflag
add x0, x0, :lo12:iflag
ldr x0, [x0]
cmp x0, 0
beq .L17
adrp x0, EXINT
add x0, x0, :lo12:EXINT
ldr w0, [x0]
bl exraise
b .L15
.L17:
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x2, [x0]
adrp x0, SIG_DFL
add x0, x0, :lo12:SIG_DFL
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
str x0, [sp, 24]
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 24]
bl kill
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
add x0, x0, 128
bl _exit
b .L15
.L16:
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x2, [x0]
adrp x0, SIG_DFL
add x0, x0, :lo12:SIG_DFL
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
str x0, [sp, 24]
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 24]
bl kill
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
eor x1, x0, -129
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
orr x0, x0, 128
lsl x0, x0, 1
add x0, x1, x0
add x0, x0, 1
bl _exit
nop
.L15:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size onint, .-onint | @intpending = external dso_local global i64, align 8
@SIG_SETMASK = external dso_local global i32, align 4
@rootshell = external dso_local global i64, align 8
@iflag = external dso_local global i64, align 8
@EXINT = external dso_local global i32, align 4
@SIGINT = external dso_local global i64, align 8
@SIG_DFL = external dso_local global i32, align 4
define dso_local void @onint() {
%1 = alloca i32, align 4
store i64 0, i64* @intpending, align 8
%2 = call i32 @sigemptyset(i32* %1)
%3 = load i32, i32* @SIG_SETMASK, align 4
%4 = call i32 @sigprocmask(i32 %3, i32* %1, i32* null)
%5 = load i64, i64* @rootshell, align 8
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %0
%8 = load i64, i64* @iflag, align 8
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* @EXINT, align 4
%12 = call i32 @exraise(i32 %11)
br label %23
13: ; preds = %7, %0
%14 = load i64, i64* @SIGINT, align 8
%15 = load i32, i32* @SIG_DFL, align 4
%16 = call i32 @signal(i64 %14, i32 %15)
%17 = call i64 (...) @getpid()
%18 = load i64, i64* @SIGINT, align 8
%19 = call i32 @kill(i64 %17, i64 %18)
%20 = load i64, i64* @SIGINT, align 8
%21 = add nsw i64 128, %20
%22 = call i32 @_exit(i64 %21)
unreachable
23: ; preds = %10
ret void
}
declare dso_local i32 @sigemptyset(i32*)
declare dso_local i32 @sigprocmask(i32, i32*, i32*)
declare dso_local i32 @exraise(i32)
declare dso_local i32 @signal(i64, i32)
declare dso_local i32 @kill(i64, i64)
declare dso_local i64 @getpid(...)
declare dso_local i32 @_exit(i64) | /* BEGIN FUNCTION-DEF onint LOC=UNKNOWN VKEY=4934 */
void onint(void)
{
sigset_t___0 sigs ;
scalar_t__ tmp ;
{
{
#line 64 "/tmp/forklift_obfu_ykwls5tg/input.c"
intpending = (scalar_t__ )0;
#line 65
sigemptyset(& sigs);
#line 66
sigprocmask(SIG_SETMASK, & sigs, (int *)((void *)0));
}
#line 75
if (rootshell) {
#line 75
if (iflag) {
#line 76
exraise(EXINT);
} else {
{
#line 78
signal(SIGINT, SIG_DFL);
#line 79
tmp = getpid();
#line 79
kill(tmp, SIGINT);
#line 80
_exit((128L | SIGINT) + (128L & SIGINT));
}
}
} else {
{
#line 78
signal(SIGINT, SIG_DFL);
#line 79
tmp = getpid();
#line 79
kill(tmp, SIGINT);
#line 80
_exit(((128L ^ ~ SIGINT) + ((128L | SIGINT) + (128L | SIGINT))) + 1L);
}
}
#line 82
return;
}
}
/* END FUNCTION-DEF onint LOC=UNKNOWN VKEY=4934 */ | 1,461,042,543 | train_synth_compilable |
functor_get_id | int functor_get_id(Functor f)
{
return f->v.functor_id;
} | Flatten | .global functor_get_id
.type functor_get_id, %function
functor_get_id:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global functor_get_id
.type functor_get_id, %function
functor_get_id:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str xzr, [sp, 24]
.L10:
ldr x0, [sp, 24]
cmp x0, 0
bne .L13
ldr x0, [sp, 8]
ldr w0, [x0]
b .L12
.L13:
nop
b .L10
.L12:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size functor_get_id, .-functor_get_id | %struct.TYPE_5__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
define dso_local i32 @functor_get_id(%struct.TYPE_5__* %0) {
%2 = alloca %struct.TYPE_5__*, align 8
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %2, align 8
%3 = load %struct.TYPE_5__*, %struct.TYPE_5__** %2, align 8
%4 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i32 0, i32 0
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = load i32, i32* %5, align 4
ret i32 %6
} | /* BEGIN FUNCTION-DEF functor_get_id LOC=UNKNOWN VKEY=4881 */
int functor_get_id(Functor f )
{
unsigned long _TIG_FN_LSW5_1_functor_get_id_next ;
{
{
_TIG_FN_LSW5_1_functor_get_id_next = 0UL;
}
while (1) {
switch (_TIG_FN_LSW5_1_functor_get_id_next) {
case 0UL: ;
return (f->v.functor_id);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF functor_get_id LOC=UNKNOWN VKEY=4881 */ | 1,948,728,483 | train_synth_compilable |
functor_get_id | int functor_get_id(Functor f)
{
return f->v.functor_id;
} | EncodeArithmetic | .global functor_get_id
.type functor_get_id, %function
functor_get_id:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global functor_get_id
.type functor_get_id, %function
functor_get_id:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size functor_get_id, .-functor_get_id | %struct.TYPE_5__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
define dso_local i32 @functor_get_id(%struct.TYPE_5__* %0) {
%2 = alloca %struct.TYPE_5__*, align 8
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %2, align 8
%3 = load %struct.TYPE_5__*, %struct.TYPE_5__** %2, align 8
%4 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i32 0, i32 0
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = load i32, i32* %5, align 4
ret i32 %6
} | /* BEGIN FUNCTION-DEF functor_get_id LOC=UNKNOWN VKEY=4881 */
int functor_get_id(Functor f )
{
{
#line 48
return (f->v.functor_id);
}
}
/* END FUNCTION-DEF functor_get_id LOC=UNKNOWN VKEY=4881 */ | 13,938,521 | train_synth_compilable |
isrs_install | void isrs_install()
{
idt_set_gate(0, (unsigned)isr0, 0x08, 0x8E);
idt_set_gate(1, (unsigned)isr1, 0x08, 0x8E);
idt_set_gate(2, (unsigned)isr2, 0x08, 0x8E);
idt_set_gate(3, (unsigned)isr3, 0x08, 0x8E);
idt_set_gate(4, (unsigned)isr4, 0x08, 0x8E);
idt_set_gate(5, (unsigned)isr5, 0x08, 0x8E);
idt_set_gate(6, (unsigned)isr6, 0x08, 0x8E);
idt_set_gate(7, (unsigned)isr7, 0x08, 0x8E);
idt_set_gate(8, (unsigned)isr8, 0x08, 0x8E);
idt_set_gate(9, (unsigned)isr9, 0x08, 0x8E);
idt_set_gate(10, (unsigned)isr10, 0x08, 0x8E);
idt_set_gate(11, (unsigned)isr11, 0x08, 0x8E);
idt_set_gate(12, (unsigned)isr12, 0x08, 0x8E);
idt_set_gate(13, (unsigned)isr13, 0x08, 0x8E);
idt_set_gate(14, (unsigned)isr14, 0x08, 0x8E);
idt_set_gate(15, (unsigned)isr15, 0x08, 0x8E);
idt_set_gate(16, (unsigned)isr16, 0x08, 0x8E);
idt_set_gate(17, (unsigned)isr17, 0x08, 0x8E);
idt_set_gate(18, (unsigned)isr18, 0x08, 0x8E);
idt_set_gate(19, (unsigned)isr19, 0x08, 0x8E);
idt_set_gate(20, (unsigned)isr20, 0x08, 0x8E);
idt_set_gate(21, (unsigned)isr21, 0x08, 0x8E);
idt_set_gate(22, (unsigned)isr22, 0x08, 0x8E);
idt_set_gate(23, (unsigned)isr23, 0x08, 0x8E);
idt_set_gate(24, (unsigned)isr24, 0x08, 0x8E);
idt_set_gate(25, (unsigned)isr25, 0x08, 0x8E);
idt_set_gate(26, (unsigned)isr26, 0x08, 0x8E);
idt_set_gate(27, (unsigned)isr27, 0x08, 0x8E);
idt_set_gate(28, (unsigned)isr28, 0x08, 0x8E);
idt_set_gate(29, (unsigned)isr29, 0x08, 0x8E);
idt_set_gate(30, (unsigned)isr30, 0x08, 0x8E);
idt_set_gate(31, (unsigned)isr31, 0x08, 0x8E);
idt_set_gate(0x90, (unsigned)sys_call, 0x08, 0x8E);
} | EncodeArithmetic | .global isrs_install
.type isrs_install, %function
isrs_install:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:isr0
ldr x0, [x0, #:got_lo12:isr0]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 0
bl idt_set_gate
adrp x0, :got:isr1
ldr x0, [x0, #:got_lo12:isr1]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 1
bl idt_set_gate
adrp x0, :got:isr2
ldr x0, [x0, #:got_lo12:isr2]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 2
bl idt_set_gate
adrp x0, :got:isr3
ldr x0, [x0, #:got_lo12:isr3]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 3
bl idt_set_gate
adrp x0, :got:isr4
ldr x0, [x0, #:got_lo12:isr4]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 4
bl idt_set_gate
adrp x0, :got:isr5
ldr x0, [x0, #:got_lo12:isr5]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 5
bl idt_set_gate
adrp x0, :got:isr6
ldr x0, [x0, #:got_lo12:isr6]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 6
bl idt_set_gate
adrp x0, :got:isr7
ldr x0, [x0, #:got_lo12:isr7]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 7
bl idt_set_gate
adrp x0, :got:isr8
ldr x0, [x0, #:got_lo12:isr8]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 8
bl idt_set_gate
adrp x0, :got:isr9
ldr x0, [x0, #:got_lo12:isr9]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 9
bl idt_set_gate
adrp x0, :got:isr10
ldr x0, [x0, #:got_lo12:isr10]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 10
bl idt_set_gate
adrp x0, :got:isr11
ldr x0, [x0, #:got_lo12:isr11]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 11
bl idt_set_gate
adrp x0, :got:isr12
ldr x0, [x0, #:got_lo12:isr12]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 12
bl idt_set_gate
adrp x0, :got:isr13
ldr x0, [x0, #:got_lo12:isr13]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 13
bl idt_set_gate
adrp x0, :got:isr14
ldr x0, [x0, #:got_lo12:isr14]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 14
bl idt_set_gate
adrp x0, :got:isr15
ldr x0, [x0, #:got_lo12:isr15]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 15
bl idt_set_gate
adrp x0, :got:isr16
ldr x0, [x0, #:got_lo12:isr16]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 16
bl idt_set_gate
adrp x0, :got:isr17
ldr x0, [x0, #:got_lo12:isr17]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 17
bl idt_set_gate
adrp x0, :got:isr18
ldr x0, [x0, #:got_lo12:isr18]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 18
bl idt_set_gate
adrp x0, :got:isr19
ldr x0, [x0, #:got_lo12:isr19]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 19
bl idt_set_gate
adrp x0, :got:isr20
ldr x0, [x0, #:got_lo12:isr20]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 20
bl idt_set_gate
adrp x0, :got:isr21
ldr x0, [x0, #:got_lo12:isr21]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 21
bl idt_set_gate
adrp x0, :got:isr22
ldr x0, [x0, #:got_lo12:isr22]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 22
bl idt_set_gate
adrp x0, :got:isr23
ldr x0, [x0, #:got_lo12:isr23]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 23
bl idt_set_gate
adrp x0, :got:isr24
ldr x0, [x0, #:got_lo12:isr24]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 24
bl idt_set_gate
adrp x0, :got:isr25
ldr x0, [x0, #:got_lo12:isr25]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 25
bl idt_set_gate
adrp x0, :got:isr26
ldr x0, [x0, #:got_lo12:isr26]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 26
bl idt_set_gate
adrp x0, :got:isr27
ldr x0, [x0, #:got_lo12:isr27]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 27
bl idt_set_gate
adrp x0, :got:isr28
ldr x0, [x0, #:got_lo12:isr28]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 28
bl idt_set_gate
adrp x0, :got:isr29
ldr x0, [x0, #:got_lo12:isr29]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 29
bl idt_set_gate
adrp x0, :got:isr30
ldr x0, [x0, #:got_lo12:isr30]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 30
bl idt_set_gate
adrp x0, :got:isr31
ldr x0, [x0, #:got_lo12:isr31]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 31
bl idt_set_gate
adrp x0, :got:sys_call
ldr x0, [x0, #:got_lo12:sys_call]
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 144
bl idt_set_gate
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global isrs_install
.type isrs_install, %function
isrs_install:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, isr0
add x0, x0, :lo12:isr0
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 0
bl idt_set_gate
adrp x0, isr1
add x0, x0, :lo12:isr1
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 1
bl idt_set_gate
adrp x0, isr2
add x0, x0, :lo12:isr2
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 2
bl idt_set_gate
adrp x0, isr3
add x0, x0, :lo12:isr3
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 3
bl idt_set_gate
adrp x0, isr4
add x0, x0, :lo12:isr4
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 4
bl idt_set_gate
adrp x0, isr5
add x0, x0, :lo12:isr5
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 5
bl idt_set_gate
adrp x0, isr6
add x0, x0, :lo12:isr6
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 6
bl idt_set_gate
adrp x0, isr7
add x0, x0, :lo12:isr7
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 7
bl idt_set_gate
adrp x0, isr8
add x0, x0, :lo12:isr8
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 8
bl idt_set_gate
adrp x0, isr9
add x0, x0, :lo12:isr9
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 9
bl idt_set_gate
adrp x0, isr10
add x0, x0, :lo12:isr10
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 10
bl idt_set_gate
adrp x0, isr11
add x0, x0, :lo12:isr11
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 11
bl idt_set_gate
adrp x0, isr12
add x0, x0, :lo12:isr12
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 12
bl idt_set_gate
adrp x0, isr13
add x0, x0, :lo12:isr13
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 13
bl idt_set_gate
adrp x0, isr14
add x0, x0, :lo12:isr14
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 14
bl idt_set_gate
adrp x0, isr15
add x0, x0, :lo12:isr15
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 15
bl idt_set_gate
adrp x0, isr16
add x0, x0, :lo12:isr16
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 16
bl idt_set_gate
adrp x0, isr17
add x0, x0, :lo12:isr17
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 17
bl idt_set_gate
adrp x0, isr18
add x0, x0, :lo12:isr18
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 18
bl idt_set_gate
adrp x0, isr19
add x0, x0, :lo12:isr19
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 19
bl idt_set_gate
adrp x0, isr20
add x0, x0, :lo12:isr20
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 20
bl idt_set_gate
adrp x0, isr21
add x0, x0, :lo12:isr21
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 21
bl idt_set_gate
adrp x0, isr22
add x0, x0, :lo12:isr22
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 22
bl idt_set_gate
adrp x0, isr23
add x0, x0, :lo12:isr23
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 23
bl idt_set_gate
adrp x0, isr24
add x0, x0, :lo12:isr24
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 24
bl idt_set_gate
adrp x0, isr25
add x0, x0, :lo12:isr25
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 25
bl idt_set_gate
adrp x0, isr26
add x0, x0, :lo12:isr26
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 26
bl idt_set_gate
adrp x0, isr27
add x0, x0, :lo12:isr27
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 27
bl idt_set_gate
adrp x0, isr28
add x0, x0, :lo12:isr28
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 28
bl idt_set_gate
adrp x0, isr29
add x0, x0, :lo12:isr29
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 29
bl idt_set_gate
adrp x0, isr30
add x0, x0, :lo12:isr30
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 30
bl idt_set_gate
adrp x0, isr31
add x0, x0, :lo12:isr31
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 31
bl idt_set_gate
adrp x0, sys_call
add x0, x0, :lo12:sys_call
ldr x0, [x0]
mov w3, 142
mov w2, 8
mov w1, w0
mov w0, 144
bl idt_set_gate
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size isrs_install, .-isrs_install | @isr0 = external dso_local global i64, align 8
@isr1 = external dso_local global i64, align 8
@isr2 = external dso_local global i64, align 8
@isr3 = external dso_local global i64, align 8
@isr4 = external dso_local global i64, align 8
@isr5 = external dso_local global i64, align 8
@isr6 = external dso_local global i64, align 8
@isr7 = external dso_local global i64, align 8
@isr8 = external dso_local global i64, align 8
@isr9 = external dso_local global i64, align 8
@isr10 = external dso_local global i64, align 8
@isr11 = external dso_local global i64, align 8
@isr12 = external dso_local global i64, align 8
@isr13 = external dso_local global i64, align 8
@isr14 = external dso_local global i64, align 8
@isr15 = external dso_local global i64, align 8
@isr16 = external dso_local global i64, align 8
@isr17 = external dso_local global i64, align 8
@isr18 = external dso_local global i64, align 8
@isr19 = external dso_local global i64, align 8
@isr20 = external dso_local global i64, align 8
@isr21 = external dso_local global i64, align 8
@isr22 = external dso_local global i64, align 8
@isr23 = external dso_local global i64, align 8
@isr24 = external dso_local global i64, align 8
@isr25 = external dso_local global i64, align 8
@isr26 = external dso_local global i64, align 8
@isr27 = external dso_local global i64, align 8
@isr28 = external dso_local global i64, align 8
@isr29 = external dso_local global i64, align 8
@isr30 = external dso_local global i64, align 8
@isr31 = external dso_local global i64, align 8
@sys_call = external dso_local global i64, align 8
define dso_local void @isrs_install() {
%1 = load i64, i64* @isr0, align 8
%2 = trunc i64 %1 to i32
%3 = call i32 @idt_set_gate(i32 0, i32 %2, i32 8, i32 142)
%4 = load i64, i64* @isr1, align 8
%5 = trunc i64 %4 to i32
%6 = call i32 @idt_set_gate(i32 1, i32 %5, i32 8, i32 142)
%7 = load i64, i64* @isr2, align 8
%8 = trunc i64 %7 to i32
%9 = call i32 @idt_set_gate(i32 2, i32 %8, i32 8, i32 142)
%10 = load i64, i64* @isr3, align 8
%11 = trunc i64 %10 to i32
%12 = call i32 @idt_set_gate(i32 3, i32 %11, i32 8, i32 142)
%13 = load i64, i64* @isr4, align 8
%14 = trunc i64 %13 to i32
%15 = call i32 @idt_set_gate(i32 4, i32 %14, i32 8, i32 142)
%16 = load i64, i64* @isr5, align 8
%17 = trunc i64 %16 to i32
%18 = call i32 @idt_set_gate(i32 5, i32 %17, i32 8, i32 142)
%19 = load i64, i64* @isr6, align 8
%20 = trunc i64 %19 to i32
%21 = call i32 @idt_set_gate(i32 6, i32 %20, i32 8, i32 142)
%22 = load i64, i64* @isr7, align 8
%23 = trunc i64 %22 to i32
%24 = call i32 @idt_set_gate(i32 7, i32 %23, i32 8, i32 142)
%25 = load i64, i64* @isr8, align 8
%26 = trunc i64 %25 to i32
%27 = call i32 @idt_set_gate(i32 8, i32 %26, i32 8, i32 142)
%28 = load i64, i64* @isr9, align 8
%29 = trunc i64 %28 to i32
%30 = call i32 @idt_set_gate(i32 9, i32 %29, i32 8, i32 142)
%31 = load i64, i64* @isr10, align 8
%32 = trunc i64 %31 to i32
%33 = call i32 @idt_set_gate(i32 10, i32 %32, i32 8, i32 142)
%34 = load i64, i64* @isr11, align 8
%35 = trunc i64 %34 to i32
%36 = call i32 @idt_set_gate(i32 11, i32 %35, i32 8, i32 142)
%37 = load i64, i64* @isr12, align 8
%38 = trunc i64 %37 to i32
%39 = call i32 @idt_set_gate(i32 12, i32 %38, i32 8, i32 142)
%40 = load i64, i64* @isr13, align 8
%41 = trunc i64 %40 to i32
%42 = call i32 @idt_set_gate(i32 13, i32 %41, i32 8, i32 142)
%43 = load i64, i64* @isr14, align 8
%44 = trunc i64 %43 to i32
%45 = call i32 @idt_set_gate(i32 14, i32 %44, i32 8, i32 142)
%46 = load i64, i64* @isr15, align 8
%47 = trunc i64 %46 to i32
%48 = call i32 @idt_set_gate(i32 15, i32 %47, i32 8, i32 142)
%49 = load i64, i64* @isr16, align 8
%50 = trunc i64 %49 to i32
%51 = call i32 @idt_set_gate(i32 16, i32 %50, i32 8, i32 142)
%52 = load i64, i64* @isr17, align 8
%53 = trunc i64 %52 to i32
%54 = call i32 @idt_set_gate(i32 17, i32 %53, i32 8, i32 142)
%55 = load i64, i64* @isr18, align 8
%56 = trunc i64 %55 to i32
%57 = call i32 @idt_set_gate(i32 18, i32 %56, i32 8, i32 142)
%58 = load i64, i64* @isr19, align 8
%59 = trunc i64 %58 to i32
%60 = call i32 @idt_set_gate(i32 19, i32 %59, i32 8, i32 142)
%61 = load i64, i64* @isr20, align 8
%62 = trunc i64 %61 to i32
%63 = call i32 @idt_set_gate(i32 20, i32 %62, i32 8, i32 142)
%64 = load i64, i64* @isr21, align 8
%65 = trunc i64 %64 to i32
%66 = call i32 @idt_set_gate(i32 21, i32 %65, i32 8, i32 142)
%67 = load i64, i64* @isr22, align 8
%68 = trunc i64 %67 to i32
%69 = call i32 @idt_set_gate(i32 22, i32 %68, i32 8, i32 142)
%70 = load i64, i64* @isr23, align 8
%71 = trunc i64 %70 to i32
%72 = call i32 @idt_set_gate(i32 23, i32 %71, i32 8, i32 142)
%73 = load i64, i64* @isr24, align 8
%74 = trunc i64 %73 to i32
%75 = call i32 @idt_set_gate(i32 24, i32 %74, i32 8, i32 142)
%76 = load i64, i64* @isr25, align 8
%77 = trunc i64 %76 to i32
%78 = call i32 @idt_set_gate(i32 25, i32 %77, i32 8, i32 142)
%79 = load i64, i64* @isr26, align 8
%80 = trunc i64 %79 to i32
%81 = call i32 @idt_set_gate(i32 26, i32 %80, i32 8, i32 142)
%82 = load i64, i64* @isr27, align 8
%83 = trunc i64 %82 to i32
%84 = call i32 @idt_set_gate(i32 27, i32 %83, i32 8, i32 142)
%85 = load i64, i64* @isr28, align 8
%86 = trunc i64 %85 to i32
%87 = call i32 @idt_set_gate(i32 28, i32 %86, i32 8, i32 142)
%88 = load i64, i64* @isr29, align 8
%89 = trunc i64 %88 to i32
%90 = call i32 @idt_set_gate(i32 29, i32 %89, i32 8, i32 142)
%91 = load i64, i64* @isr30, align 8
%92 = trunc i64 %91 to i32
%93 = call i32 @idt_set_gate(i32 30, i32 %92, i32 8, i32 142)
%94 = load i64, i64* @isr31, align 8
%95 = trunc i64 %94 to i32
%96 = call i32 @idt_set_gate(i32 31, i32 %95, i32 8, i32 142)
%97 = load i64, i64* @sys_call, align 8
%98 = trunc i64 %97 to i32
%99 = call i32 @idt_set_gate(i32 144, i32 %98, i32 8, i32 142)
ret void
}
declare dso_local i32 @idt_set_gate(i32, i32, i32, i32) | /* BEGIN FUNCTION-DEF isrs_install LOC=UNKNOWN VKEY=4953 */
void isrs_install(void)
{
{
{
#line 77
idt_set_gate(0, (unsigned int )isr0, 0x08, 0x8E);
#line 78
idt_set_gate(1, (unsigned int )isr1, 0x08, 0x8E);
#line 79
idt_set_gate(2, (unsigned int )isr2, 0x08, 0x8E);
#line 80
idt_set_gate(3, (unsigned int )isr3, 0x08, 0x8E);
#line 81
idt_set_gate(4, (unsigned int )isr4, 0x08, 0x8E);
#line 82
idt_set_gate(5, (unsigned int )isr5, 0x08, 0x8E);
#line 83
idt_set_gate(6, (unsigned int )isr6, 0x08, 0x8E);
#line 84
idt_set_gate(7, (unsigned int )isr7, 0x08, 0x8E);
#line 86
idt_set_gate(8, (unsigned int )isr8, 0x08, 0x8E);
#line 87
idt_set_gate(9, (unsigned int )isr9, 0x08, 0x8E);
#line 88
idt_set_gate(10, (unsigned int )isr10, 0x08, 0x8E);
#line 89
idt_set_gate(11, (unsigned int )isr11, 0x08, 0x8E);
#line 90
idt_set_gate(12, (unsigned int )isr12, 0x08, 0x8E);
#line 91
idt_set_gate(13, (unsigned int )isr13, 0x08, 0x8E);
#line 92
idt_set_gate(14, (unsigned int )isr14, 0x08, 0x8E);
#line 93
idt_set_gate(15, (unsigned int )isr15, 0x08, 0x8E);
#line 95
idt_set_gate(16, (unsigned int )isr16, 0x08, 0x8E);
#line 96
idt_set_gate(17, (unsigned int )isr17, 0x08, 0x8E);
#line 97
idt_set_gate(18, (unsigned int )isr18, 0x08, 0x8E);
#line 98
idt_set_gate(19, (unsigned int )isr19, 0x08, 0x8E);
#line 99
idt_set_gate(20, (unsigned int )isr20, 0x08, 0x8E);
#line 100
idt_set_gate(21, (unsigned int )isr21, 0x08, 0x8E);
#line 101
idt_set_gate(22, (unsigned int )isr22, 0x08, 0x8E);
#line 102
idt_set_gate(23, (unsigned int )isr23, 0x08, 0x8E);
#line 104
idt_set_gate(24, (unsigned int )isr24, 0x08, 0x8E);
#line 105
idt_set_gate(25, (unsigned int )isr25, 0x08, 0x8E);
#line 106
idt_set_gate(26, (unsigned int )isr26, 0x08, 0x8E);
#line 107
idt_set_gate(27, (unsigned int )isr27, 0x08, 0x8E);
#line 108
idt_set_gate(28, (unsigned int )isr28, 0x08, 0x8E);
#line 109
idt_set_gate(29, (unsigned int )isr29, 0x08, 0x8E);
#line 110
idt_set_gate(30, (unsigned int )isr30, 0x08, 0x8E);
#line 111
idt_set_gate(31, (unsigned int )isr31, 0x08, 0x8E);
#line 113
idt_set_gate(0x90, (unsigned int )sys_call, 0x08, 0x8E);
}
#line 114
return;
}
}
/* END FUNCTION-DEF isrs_install LOC=UNKNOWN VKEY=4953 */ | 1,867,302,554 | train_synth_compilable |
onint | void
onint(void)
{
sigset_t sigs;
intpending = 0;
sigemptyset(&sigs);
sigprocmask(SIG_SETMASK, &sigs, NULL);
/*
* This doesn't seem to be needed, since main() emits a newline.
*/
#if 0
if (tcgetpgrp(0) == getpid())
write(STDERR_FILENO, "\n", 1);
#endif
if (rootshell && iflag)
exraise(EXINT);
else {
signal(SIGINT, SIG_DFL);
kill(getpid(), SIGINT);
_exit(128 + SIGINT);
}
} | Flatten+EncodeArithmetic | .global onint
.type onint, %function
onint:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1,0
adrp x0, :got:intpending
ldr x0, [x0, #:got_lo12:intpending]
str xzr, [x0]
add x0, sp, 20
bl sigemptyset
adrp x0, :got:SIG_SETMASK
ldr x0, [x0, #:got_lo12:SIG_SETMASK]
ldr w0, [x0]
add x1, sp, 20
mov x2, 0
bl sigprocmask
adrp x0, :got:rootshell
ldr x0, [x0, #:got_lo12:rootshell]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:iflag
ldr x0, [x0, #:got_lo12:iflag]
ldr x0, [x0]
cmp x0, 0
beq .L2
adrp x0, :got:EXINT
ldr x0, [x0, #:got_lo12:EXINT]
ldr w0, [x0]
bl exraise
b .L3
.L2:
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x2, [x0]
adrp x0, :got:SIG_DFL
ldr x0, [x0, #:got_lo12:SIG_DFL]
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
mov x2, x0
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl kill
adrp x0, :got:SIGINT
ldr x0, [x0, #:got_lo12:SIGINT]
ldr x0, [x0]
add x0, x0, 128
bl _exit
.L3:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [sp, 24]
ldr x2, [x0]
subs x1, x1, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global onint
.type onint, %function
onint:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str xzr, [sp, 40]
.L31:
ldr x0, [sp, 40]
cmp x0, 9
beq .L16
ldr x0, [sp, 40]
cmp x0, 9
bhi .L33
ldr x0, [sp, 40]
cmp x0, 8
beq .L18
ldr x0, [sp, 40]
cmp x0, 8
bhi .L33
ldr x0, [sp, 40]
cmp x0, 7
beq .L19
ldr x0, [sp, 40]
cmp x0, 7
bhi .L33
ldr x0, [sp, 40]
cmp x0, 6
beq .L34
ldr x0, [sp, 40]
cmp x0, 6
bhi .L33
ldr x0, [sp, 40]
cmp x0, 5
beq .L21
ldr x0, [sp, 40]
cmp x0, 5
bhi .L33
ldr x0, [sp, 40]
cmp x0, 3
beq .L22
ldr x0, [sp, 40]
cmp x0, 3
bhi .L33
ldr x0, [sp, 40]
cmp x0, 0
beq .L23
ldr x0, [sp, 40]
cmp x0, 2
beq .L24
b .L33
.L18:
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x2, [x0]
adrp x0, SIG_DFL
add x0, x0, :lo12:SIG_DFL
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
str x0, [sp, 32]
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 32]
bl kill
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mvn x0, x0
mov x1, 127
sub x0, x1, x0
bl _exit
mov x0, 6
str x0, [sp, 40]
b .L25
.L22:
adrp x0, intpending
add x0, x0, :lo12:intpending
str xzr, [x0]
add x0, sp, 28
bl sigemptyset
adrp x0, SIG_SETMASK
add x0, x0, :lo12:SIG_SETMASK
ldr w0, [x0]
add x1, sp, 28
mov x2, 0
bl sigprocmask
mov x0, 5
str x0, [sp, 40]
b .L25
.L16:
adrp x0, EXINT
add x0, x0, :lo12:EXINT
ldr w0, [x0]
bl exraise
mov x0, 6
str x0, [sp, 40]
b .L25
.L21:
adrp x0, rootshell
add x0, x0, :lo12:rootshell
ldr x0, [x0]
cmp x0, 0
beq .L27
mov x0, 7
str x0, [sp, 40]
b .L25
.L27:
mov x0, 8
str x0, [sp, 40]
b .L25
.L23:
mov x0, 3
str x0, [sp, 40]
b .L25
.L19:
adrp x0, iflag
add x0, x0, :lo12:iflag
ldr x0, [x0]
cmp x0, 0
beq .L29
mov x0, 9
str x0, [sp, 40]
b .L25
.L29:
mov x0, 2
str x0, [sp, 40]
b .L25
.L24:
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x2, [x0]
adrp x0, SIG_DFL
add x0, x0, :lo12:SIG_DFL
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl signal
bl getpid
str x0, [sp, 32]
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 32]
bl kill
adrp x0, SIGINT
add x0, x0, :lo12:SIGINT
ldr x0, [x0]
mvn x0, x0
mov x1, 127
sub x0, x1, x0
bl _exit
mov x0, 6
str x0, [sp, 40]
b .L25
.L33:
nop
.L25:
b .L31
.L34:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size onint, .-onint | @intpending = external dso_local global i64, align 8
@SIG_SETMASK = external dso_local global i32, align 4
@rootshell = external dso_local global i64, align 8
@iflag = external dso_local global i64, align 8
@EXINT = external dso_local global i32, align 4
@SIGINT = external dso_local global i64, align 8
@SIG_DFL = external dso_local global i32, align 4
define dso_local void @onint() {
%1 = alloca i32, align 4
store i64 0, i64* @intpending, align 8
%2 = call i32 @sigemptyset(i32* %1)
%3 = load i32, i32* @SIG_SETMASK, align 4
%4 = call i32 @sigprocmask(i32 %3, i32* %1, i32* null)
%5 = load i64, i64* @rootshell, align 8
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %0
%8 = load i64, i64* @iflag, align 8
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* @EXINT, align 4
%12 = call i32 @exraise(i32 %11)
br label %23
13: ; preds = %7, %0
%14 = load i64, i64* @SIGINT, align 8
%15 = load i32, i32* @SIG_DFL, align 4
%16 = call i32 @signal(i64 %14, i32 %15)
%17 = call i64 (...) @getpid()
%18 = load i64, i64* @SIGINT, align 8
%19 = call i32 @kill(i64 %17, i64 %18)
%20 = load i64, i64* @SIGINT, align 8
%21 = add nsw i64 128, %20
%22 = call i32 @_exit(i64 %21)
unreachable
23: ; preds = %10
ret void
}
declare dso_local i32 @sigemptyset(i32*)
declare dso_local i32 @sigprocmask(i32, i32*, i32*)
declare dso_local i32 @exraise(i32)
declare dso_local i32 @signal(i64, i32)
declare dso_local i32 @kill(i64, i64)
declare dso_local i64 @getpid(...)
declare dso_local i32 @_exit(i64) | /* BEGIN FUNCTION-DEF onint LOC=UNKNOWN VKEY=4939 */
void onint(void)
{
sigset_t___0 sigs ;
scalar_t__ tmp ;
unsigned long _TIG_FN_6ube_1_onint_next ;
{
_TIG_FN_6ube_1_onint_next = 0UL;
while (1) {
switch (_TIG_FN_6ube_1_onint_next) {
case 8UL:
{
#line 78 "/tmp/forklift_obfu_habslgcr/input.c"
signal(SIGINT, SIG_DFL);
#line 79
tmp = getpid();
#line 79
kill(tmp, SIGINT);
#line 80
_exit((128L - ~ SIGINT) - 1L);
}
_TIG_FN_6ube_1_onint_next = 6UL;
break;
case 3UL:
{
#line 64
intpending = (scalar_t__ )0;
#line 65
sigemptyset(& sigs);
#line 66
sigprocmask(SIG_SETMASK, & sigs, (int *)((void *)0));
}
_TIG_FN_6ube_1_onint_next = 5UL;
break;
case 9UL:
#line 76
exraise(EXINT);
_TIG_FN_6ube_1_onint_next = 6UL;
break;
case 6UL: ;
return;
break;
case 5UL: ;
if (rootshell) {
_TIG_FN_6ube_1_onint_next = 7UL;
} else {
_TIG_FN_6ube_1_onint_next = 8UL;
}
break;
case 0UL: ;
_TIG_FN_6ube_1_onint_next = 3UL;
break;
case 7UL: ;
if (iflag) {
_TIG_FN_6ube_1_onint_next = 9UL;
} else {
_TIG_FN_6ube_1_onint_next = 2UL;
}
break;
case 2UL:
{
#line 78
signal(SIGINT, SIG_DFL);
#line 79
tmp = getpid();
#line 79
kill(tmp, SIGINT);
#line 80
_exit((128L - ~ SIGINT) - 1L);
}
_TIG_FN_6ube_1_onint_next = 6UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF onint LOC=UNKNOWN VKEY=4939 */ | 479,112,937 | train_synth_compilable |
functor_get_id | int functor_get_id(Functor f)
{
return f->v.functor_id;
} | Flatten+EncodeArithmetic | .global functor_get_id
.type functor_get_id, %function
functor_get_id:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global functor_get_id
.type functor_get_id, %function
functor_get_id:
.LFB4:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str xzr, [sp, 24]
.L10:
ldr x0, [sp, 24]
cmp x0, 0
bne .L13
ldr x0, [sp, 8]
ldr w0, [x0]
b .L12
.L13:
nop
b .L10
.L12:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size functor_get_id, .-functor_get_id | %struct.TYPE_5__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
define dso_local i32 @functor_get_id(%struct.TYPE_5__* %0) {
%2 = alloca %struct.TYPE_5__*, align 8
store %struct.TYPE_5__* %0, %struct.TYPE_5__** %2, align 8
%3 = load %struct.TYPE_5__*, %struct.TYPE_5__** %2, align 8
%4 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i32 0, i32 0
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = load i32, i32* %5, align 4
ret i32 %6
} | /* BEGIN FUNCTION-DEF functor_get_id LOC=UNKNOWN VKEY=4885 */
int functor_get_id(Functor f )
{
unsigned long _TIG_FN_oFmv_1_functor_get_id_next ;
{
_TIG_FN_oFmv_1_functor_get_id_next = 0UL;
while (1) {
switch (_TIG_FN_oFmv_1_functor_get_id_next) {
case 0UL: ;
return (f->v.functor_id);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF functor_get_id LOC=UNKNOWN VKEY=4885 */ | 1,131,247,330 | train_synth_compilable |
set_flags_cp | static inline void set_flags_cp(Z80 *z80, uint16_t rh)
{
uint8_t lh = z80->regs.a;
uint8_t res = lh - rh;
set_flags(z80, (((lh) - (rh)) & 0x100), 1, ((!((lh) & 0x80)) && ((rh) & 0x80) && ((res) & 0x80) || ((lh) & 0x80) && (!((rh) & 0x80)) && (!((res) & 0x80))), ((rh) & 0x08),
((((lh) & 0x0F) - ((rh) & 0x0F)) & 0x10), ((rh) & 0x20), ((res) == 0), ((res) & 0x80), 0xFF);
} | Flatten+EncodeArithmetic | .global set_flags_cp
.type set_flags_cp, %function
set_flags_cp:
.LFB0:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
stp x29, x30, [sp, 16]
.cfi_offset 29, -48
.cfi_offset 30, -40
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 48]
ldr x1, [sp, 48]
ldr x0, [sp, 32]
sub x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 48]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
and w8, w0, 256
ldr x0, [sp, 48]
and x0, x0, 128
cmp x0, 0
bne .L2
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
beq .L2
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L3
.L2:
ldr x0, [sp, 48]
and x0, x0, 128
cmp x0, 0
beq .L4
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
bne .L4
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L4
.L3:
mov w0, 1
b .L5
.L4:
mov w0, 0
.L5:
ldr x1, [sp, 32]
and w3, w1, 8
ldr x1, [sp, 48]
and w2, w1, 15
ldr x1, [sp, 32]
and w1, w1, 15
sub w1, w2, w1
and w4, w1, 16
ldr x1, [sp, 32]
and w5, w1, 32
ldr x1, [sp, 56]
cmp x1, 0
cset w1, eq
and w1, w1, 255
mov w6, w1
ldr x1, [sp, 56]
and x1, x1, 128
mov w2, 255
str w2, [sp, 8]
str x1, [sp]
mov w7, w6
mov w6, w5
mov w5, w4
mov w4, w3
mov w3, w0
mov w2, 1
mov w1, w8
ldr x0, [sp, 40]
bl set_flags
nop
ldp x29, x30, [sp, 16]
add sp, sp, 64
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global set_flags_cp
.type set_flags_cp, %function
set_flags_cp:
.LFB7:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
stp x29, x30, [sp, 16]
.cfi_offset 29, -64
.cfi_offset 30, -56
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
mov x0, 16
str x0, [sp, 48]
.L39:
ldr x0, [sp, 48]
cmp x0, 16
beq .L8
ldr x0, [sp, 48]
cmp x0, 16
bhi .L40
ldr x0, [sp, 48]
cmp x0, 15
beq .L10
ldr x0, [sp, 48]
cmp x0, 15
bhi .L40
ldr x0, [sp, 48]
cmp x0, 14
beq .L11
ldr x0, [sp, 48]
cmp x0, 14
bhi .L40
ldr x0, [sp, 48]
cmp x0, 13
beq .L12
ldr x0, [sp, 48]
cmp x0, 13
bhi .L40
ldr x0, [sp, 48]
cmp x0, 12
beq .L13
ldr x0, [sp, 48]
cmp x0, 12
bhi .L40
ldr x0, [sp, 48]
cmp x0, 11
beq .L14
ldr x0, [sp, 48]
cmp x0, 11
bhi .L40
ldr x0, [sp, 48]
cmp x0, 10
beq .L15
ldr x0, [sp, 48]
cmp x0, 10
bhi .L40
ldr x0, [sp, 48]
cmp x0, 9
beq .L41
ldr x0, [sp, 48]
cmp x0, 9
bhi .L40
ldr x0, [sp, 48]
cmp x0, 8
beq .L17
ldr x0, [sp, 48]
cmp x0, 8
bhi .L40
ldr x0, [sp, 48]
cmp x0, 7
beq .L34
ldr x0, [sp, 48]
cmp x0, 7
bhi .L40
ldr x0, [sp, 48]
cmp x0, 6
beq .L19
ldr x0, [sp, 48]
cmp x0, 6
bhi .L40
ldr x0, [sp, 48]
cmp x0, 5
beq .L20
ldr x0, [sp, 48]
cmp x0, 5
bhi .L40
ldr x0, [sp, 48]
cmp x0, 4
beq .L21
ldr x0, [sp, 48]
cmp x0, 4
bhi .L40
ldr x0, [sp, 48]
cmp x0, 2
beq .L22
ldr x0, [sp, 48]
cmp x0, 3
beq .L23
b .L40
.L21:
ldr x0, [sp, 72]
and x0, x0, 128
cmp x0, 0
bne .L24
mov x0, 15
str x0, [sp, 48]
b .L26
.L24:
mov x0, 7
str x0, [sp, 48]
b .L26
.L11:
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 72]
ldr x0, [sp, 32]
mvn x1, x0
ldr x0, [sp, 72]
add x0, x1, x0
add x0, x0, 1
str x0, [sp, 64]
mov x0, 4
str x0, [sp, 48]
b .L26
.L10:
ldr x0, [sp, 32]
mvn x0, x0
and x0, x0, 128
cmp x0, 0
bne .L27
mov x0, 13
str x0, [sp, 48]
b .L26
.L27:
mov x0, 7
str x0, [sp, 48]
b .L26
.L13:
ldr x0, [sp, 64]
and x0, x0, 128
cmp x0, 0
bne .L29
mov x0, 5
str x0, [sp, 48]
b .L26
.L29:
mov x0, 8
str x0, [sp, 48]
b .L26
.L17:
str wzr, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L23:
str wzr, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L8:
mov x0, 14
str x0, [sp, 48]
b .L26
.L14:
mov w0, 1
str w0, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L12:
ldr x0, [sp, 64]
mvn x0, x0
and x0, x0, 128
cmp x0, 0
bne .L32
mov x0, 11
str x0, [sp, 48]
b .L26
.L32:
mov x0, 7
str x0, [sp, 48]
b .L26
.L19:
str wzr, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L20:
mov w0, 1
str w0, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L15:
ldr x0, [sp, 72]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
and w8, w0, 256
ldr x0, [sp, 32]
and w2, w0, 8
ldr x0, [sp, 72]
and w1, w0, 15
ldr x0, [sp, 32]
and w0, w0, 15
sub w0, w1, w0
and w3, w0, 16
ldr x0, [sp, 32]
and w4, w0, 32
ldr x0, [sp, 64]
cmp x0, 0
cset w0, eq
and w0, w0, 255
mov w5, w0
ldr x0, [sp, 64]
mvn x0, x0
orr x1, x0, 128
ldr x0, [sp, 64]
add x0, x1, x0
add x0, x0, 1
mov w1, 255
str w1, [sp, 8]
str x0, [sp]
mov w7, w5
mov w6, w4
mov w5, w3
mov w4, w2
ldr w3, [sp, 60]
mov w2, 1
mov w1, w8
ldr x0, [sp, 40]
bl set_flags
mov x0, 9
str x0, [sp, 48]
b .L26
.L18:
.L34:
ldr x0, [sp, 72]
mvn x0, x0
and x0, x0, 128
cmp x0, 0
bne .L35
mov x0, 2
str x0, [sp, 48]
b .L26
.L35:
mov x0, 6
str x0, [sp, 48]
b .L26
.L22:
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
bne .L37
mov x0, 12
str x0, [sp, 48]
b .L26
.L37:
mov x0, 3
str x0, [sp, 48]
b .L26
.L40:
nop
.L26:
b .L39
.L41:
nop
ldp x29, x30, [sp, 16]
add sp, sp, 80
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size set_flags_cp, .-set_flags_cp | %struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i64 }
define dso_local void @set_flags_cp(%struct.TYPE_6__* %0, i64 %1) {
%3 = alloca %struct.TYPE_6__*, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
%6 = alloca i64, align 8
store %struct.TYPE_6__* %0, %struct.TYPE_6__** %3, align 8
store i64 %1, i64* %4, align 8
%7 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3, align 8
%8 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %8, i32 0, i32 0
%10 = load i64, i64* %9, align 8
store i64 %10, i64* %5, align 8
%11 = load i64, i64* %5, align 8
%12 = load i64, i64* %4, align 8
%13 = sub nsw i64 %11, %12
store i64 %13, i64* %6, align 8
%14 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3, align 8
%15 = load i64, i64* %5, align 8
%16 = load i64, i64* %4, align 8
%17 = sub nsw i64 %15, %16
%18 = and i64 %17, 256
%19 = trunc i64 %18 to i32
%20 = load i64, i64* %5, align 8
%21 = and i64 %20, 128
%22 = icmp ne i64 %21, 0
br i1 %22, label %31, label %23
23: ; preds = %2
%24 = load i64, i64* %4, align 8
%25 = and i64 %24, 128
%26 = icmp ne i64 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %23
%28 = load i64, i64* %6, align 8
%29 = and i64 %28, 128
%30 = icmp ne i64 %29, 0
br i1 %30, label %46, label %31
31: ; preds = %27, %23, %2
%32 = load i64, i64* %5, align 8
%33 = and i64 %32, 128
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %44
35: ; preds = %31
%36 = load i64, i64* %4, align 8
%37 = and i64 %36, 128
%38 = icmp ne i64 %37, 0
br i1 %38, label %44, label %39
39: ; preds = %35
%40 = load i64, i64* %6, align 8
%41 = and i64 %40, 128
%42 = icmp ne i64 %41, 0
%43 = xor i1 %42, true
br label %44
44: ; preds = %39, %35, %31
%45 = phi i1 [ false, %35 ], [ false, %31 ], [ %43, %39 ]
br label %46
46: ; preds = %44, %27
%47 = phi i1 [ true, %27 ], [ %45, %44 ]
%48 = zext i1 %47 to i32
%49 = load i64, i64* %4, align 8
%50 = and i64 %49, 8
%51 = trunc i64 %50 to i32
%52 = load i64, i64* %5, align 8
%53 = and i64 %52, 15
%54 = load i64, i64* %4, align 8
%55 = and i64 %54, 15
%56 = sub nsw i64 %53, %55
%57 = and i64 %56, 16
%58 = trunc i64 %57 to i32
%59 = load i64, i64* %4, align 8
%60 = and i64 %59, 32
%61 = trunc i64 %60 to i32
%62 = load i64, i64* %6, align 8
%63 = icmp eq i64 %62, 0
%64 = zext i1 %63 to i32
%65 = load i64, i64* %6, align 8
%66 = and i64 %65, 128
%67 = call i32 @set_flags(%struct.TYPE_6__* %14, i32 %19, i32 1, i32 %48, i32 %51, i32 %58, i32 %61, i32 %64, i64 %66, i32 255)
ret void
}
declare dso_local i32 @set_flags(%struct.TYPE_6__*, i32, i32, i32, i32, i32, i32, i32, i64, i32) | /* BEGIN FUNCTION-DEF set_flags_cp LOC=UNKNOWN VKEY=4919 */
void set_flags_cp(Z80 *z80 , uint16_t___0 rh___0 )
{
uint8_t___0 lh___0 ;
uint8_t___0 res___0 ;
int tmp ;
unsigned long _TIG_FN_XlJE_1_set_flags_cp_next ;
{
_TIG_FN_XlJE_1_set_flags_cp_next = 16UL;
while (1) {
switch (_TIG_FN_XlJE_1_set_flags_cp_next) {
case 4UL: ;
if (! (lh___0 & 128L)) {
_TIG_FN_XlJE_1_set_flags_cp_next = 15UL;
} else {
_TIG_FN_XlJE_1_set_flags_cp_next = 7UL;
}
break;
case 14UL:
{
#line 54 "/tmp/forklift_obfu_4a1v99ru/input.c"
lh___0 = z80->regs.a;
#line 55
res___0 = (lh___0 + ~ rh___0) + 1L;
}
_TIG_FN_XlJE_1_set_flags_cp_next = 4UL;
break;
case 15UL: ;
if ((~ rh___0 | 128L) - ~ rh___0) {
_TIG_FN_XlJE_1_set_flags_cp_next = 13UL;
} else {
_TIG_FN_XlJE_1_set_flags_cp_next = 7UL;
}
break;
case 12UL: ;
if (! (res___0 & 128L)) {
_TIG_FN_XlJE_1_set_flags_cp_next = 5UL;
} else {
_TIG_FN_XlJE_1_set_flags_cp_next = 8UL;
}
break;
case 8UL:
#line 56
tmp = 0;
_TIG_FN_XlJE_1_set_flags_cp_next = 10UL;
break;
case 3UL:
#line 56
tmp = 0;
_TIG_FN_XlJE_1_set_flags_cp_next = 10UL;
break;
case 16UL: ;
_TIG_FN_XlJE_1_set_flags_cp_next = 14UL;
break;
case 11UL:
#line 56
tmp = 1;
_TIG_FN_XlJE_1_set_flags_cp_next = 10UL;
break;
case 9UL: ;
return;
break;
case 13UL: ;
if ((~ res___0 | 128L) - ~ res___0) {
_TIG_FN_XlJE_1_set_flags_cp_next = 11UL;
} else {
_TIG_FN_XlJE_1_set_flags_cp_next = 7UL;
}
break;
case 6UL:
#line 56
tmp = 0;
_TIG_FN_XlJE_1_set_flags_cp_next = 10UL;
break;
case 5UL:
#line 56
tmp = 1;
_TIG_FN_XlJE_1_set_flags_cp_next = 10UL;
break;
case 10UL:
#line 56
set_flags(z80, (int )((lh___0 - rh___0) & 256L), 1, tmp, (int )(rh___0 & 8L),
(int )(((lh___0 & 15L) - (rh___0 & 15L)) & 16L), (int )(rh___0 & 32L),
res___0 == 0L, ((~ res___0 | 128L) + res___0) + 1L, 0xFF);
_TIG_FN_XlJE_1_set_flags_cp_next = 9UL;
break;
case 7UL:
_L___0: /* CIL Label */
_L: /* CIL Label */ ;
if ((~ lh___0 | 128L) - ~ lh___0) {
_TIG_FN_XlJE_1_set_flags_cp_next = 2UL;
} else {
_TIG_FN_XlJE_1_set_flags_cp_next = 6UL;
}
break;
case 2UL: ;
if (! (rh___0 & 128L)) {
_TIG_FN_XlJE_1_set_flags_cp_next = 12UL;
} else {
_TIG_FN_XlJE_1_set_flags_cp_next = 3UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF set_flags_cp LOC=UNKNOWN VKEY=4919 */ | 1,281,810,600 | train_synth_compilable |
set_flags_cp | static inline void set_flags_cp(Z80 *z80, uint16_t rh)
{
uint8_t lh = z80->regs.a;
uint8_t res = lh - rh;
set_flags(z80, (((lh) - (rh)) & 0x100), 1, ((!((lh) & 0x80)) && ((rh) & 0x80) && ((res) & 0x80) || ((lh) & 0x80) && (!((rh) & 0x80)) && (!((res) & 0x80))), ((rh) & 0x08),
((((lh) & 0x0F) - ((rh) & 0x0F)) & 0x10), ((rh) & 0x20), ((res) == 0), ((res) & 0x80), 0xFF);
} | Flatten | .global set_flags_cp
.type set_flags_cp, %function
set_flags_cp:
.LFB0:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
stp x29, x30, [sp, 16]
.cfi_offset 29, -48
.cfi_offset 30, -40
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 48]
ldr x1, [sp, 48]
ldr x0, [sp, 32]
sub x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 48]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
and w8, w0, 256
ldr x0, [sp, 48]
and x0, x0, 128
cmp x0, 0
bne .L2
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
beq .L2
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L3
.L2:
ldr x0, [sp, 48]
and x0, x0, 128
cmp x0, 0
beq .L4
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
bne .L4
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L4
.L3:
mov w0, 1
b .L5
.L4:
mov w0, 0
.L5:
ldr x1, [sp, 32]
and w3, w1, 8
ldr x1, [sp, 48]
and w2, w1, 15
ldr x1, [sp, 32]
and w1, w1, 15
sub w1, w2, w1
and w4, w1, 16
ldr x1, [sp, 32]
and w5, w1, 32
ldr x1, [sp, 56]
cmp x1, 0
cset w1, eq
and w1, w1, 255
mov w6, w1
ldr x1, [sp, 56]
and x1, x1, 128
mov w2, 255
str w2, [sp, 8]
str x1, [sp]
mov w7, w6
mov w6, w5
mov w5, w4
mov w4, w3
mov w3, w0
mov w2, 1
mov w1, w8
ldr x0, [sp, 40]
bl set_flags
nop
ldp x29, x30, [sp, 16]
add sp, sp, 64
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global set_flags_cp
.type set_flags_cp, %function
set_flags_cp:
.LFB3:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
stp x29, x30, [sp, 16]
.cfi_offset 29, -64
.cfi_offset 30, -56
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
mov x0, 16
str x0, [sp, 48]
.L39:
ldr x0, [sp, 48]
cmp x0, 16
beq .L8
ldr x0, [sp, 48]
cmp x0, 16
bhi .L40
ldr x0, [sp, 48]
cmp x0, 15
beq .L10
ldr x0, [sp, 48]
cmp x0, 15
bhi .L40
ldr x0, [sp, 48]
cmp x0, 14
beq .L11
ldr x0, [sp, 48]
cmp x0, 14
bhi .L40
ldr x0, [sp, 48]
cmp x0, 13
beq .L12
ldr x0, [sp, 48]
cmp x0, 13
bhi .L40
ldr x0, [sp, 48]
cmp x0, 12
beq .L13
ldr x0, [sp, 48]
cmp x0, 12
bhi .L40
ldr x0, [sp, 48]
cmp x0, 11
beq .L14
ldr x0, [sp, 48]
cmp x0, 11
bhi .L40
ldr x0, [sp, 48]
cmp x0, 10
beq .L15
ldr x0, [sp, 48]
cmp x0, 10
bhi .L40
ldr x0, [sp, 48]
cmp x0, 9
beq .L41
ldr x0, [sp, 48]
cmp x0, 9
bhi .L40
ldr x0, [sp, 48]
cmp x0, 8
beq .L17
ldr x0, [sp, 48]
cmp x0, 8
bhi .L40
ldr x0, [sp, 48]
cmp x0, 7
beq .L34
ldr x0, [sp, 48]
cmp x0, 7
bhi .L40
ldr x0, [sp, 48]
cmp x0, 6
beq .L19
ldr x0, [sp, 48]
cmp x0, 6
bhi .L40
ldr x0, [sp, 48]
cmp x0, 5
beq .L20
ldr x0, [sp, 48]
cmp x0, 5
bhi .L40
ldr x0, [sp, 48]
cmp x0, 4
beq .L21
ldr x0, [sp, 48]
cmp x0, 4
bhi .L40
ldr x0, [sp, 48]
cmp x0, 2
beq .L22
ldr x0, [sp, 48]
cmp x0, 3
beq .L23
b .L40
.L21:
ldr x0, [sp, 72]
and x0, x0, 128
cmp x0, 0
bne .L24
mov x0, 15
str x0, [sp, 48]
b .L26
.L24:
mov x0, 7
str x0, [sp, 48]
b .L26
.L11:
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 72]
ldr x1, [sp, 72]
ldr x0, [sp, 32]
sub x0, x1, x0
str x0, [sp, 64]
mov x0, 4
str x0, [sp, 48]
b .L26
.L10:
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
beq .L27
mov x0, 13
str x0, [sp, 48]
b .L26
.L27:
mov x0, 7
str x0, [sp, 48]
b .L26
.L13:
ldr x0, [sp, 64]
and x0, x0, 128
cmp x0, 0
bne .L29
mov x0, 5
str x0, [sp, 48]
b .L26
.L29:
mov x0, 8
str x0, [sp, 48]
b .L26
.L17:
str wzr, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L23:
str wzr, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L8:
mov x0, 14
str x0, [sp, 48]
b .L26
.L14:
mov w0, 1
str w0, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L12:
ldr x0, [sp, 64]
and x0, x0, 128
cmp x0, 0
beq .L32
mov x0, 11
str x0, [sp, 48]
b .L26
.L32:
mov x0, 7
str x0, [sp, 48]
b .L26
.L19:
str wzr, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L20:
mov w0, 1
str w0, [sp, 60]
mov x0, 10
str x0, [sp, 48]
b .L26
.L15:
ldr x0, [sp, 72]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
and w8, w0, 256
ldr x0, [sp, 32]
and w2, w0, 8
ldr x0, [sp, 72]
and w1, w0, 15
ldr x0, [sp, 32]
and w0, w0, 15
sub w0, w1, w0
and w1, w0, 16
ldr x0, [sp, 32]
and w3, w0, 32
ldr x0, [sp, 64]
cmp x0, 0
cset w0, eq
and w0, w0, 255
mov w5, w0
ldr x0, [sp, 64]
and x0, x0, 128
mov w4, 255
str w4, [sp, 8]
str x0, [sp]
mov w7, w5
mov w6, w3
mov w5, w1
mov w4, w2
ldr w3, [sp, 60]
mov w2, 1
mov w1, w8
ldr x0, [sp, 40]
bl set_flags
mov x0, 9
str x0, [sp, 48]
b .L26
.L18:
.L34:
ldr x0, [sp, 72]
and x0, x0, 128
cmp x0, 0
beq .L35
mov x0, 2
str x0, [sp, 48]
b .L26
.L35:
mov x0, 6
str x0, [sp, 48]
b .L26
.L22:
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
bne .L37
mov x0, 12
str x0, [sp, 48]
b .L26
.L37:
mov x0, 3
str x0, [sp, 48]
b .L26
.L40:
nop
.L26:
b .L39
.L41:
nop
ldp x29, x30, [sp, 16]
add sp, sp, 80
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size set_flags_cp, .-set_flags_cp | %struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i64 }
define dso_local void @set_flags_cp(%struct.TYPE_6__* %0, i64 %1) {
%3 = alloca %struct.TYPE_6__*, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
%6 = alloca i64, align 8
store %struct.TYPE_6__* %0, %struct.TYPE_6__** %3, align 8
store i64 %1, i64* %4, align 8
%7 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3, align 8
%8 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %8, i32 0, i32 0
%10 = load i64, i64* %9, align 8
store i64 %10, i64* %5, align 8
%11 = load i64, i64* %5, align 8
%12 = load i64, i64* %4, align 8
%13 = sub nsw i64 %11, %12
store i64 %13, i64* %6, align 8
%14 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3, align 8
%15 = load i64, i64* %5, align 8
%16 = load i64, i64* %4, align 8
%17 = sub nsw i64 %15, %16
%18 = and i64 %17, 256
%19 = trunc i64 %18 to i32
%20 = load i64, i64* %5, align 8
%21 = and i64 %20, 128
%22 = icmp ne i64 %21, 0
br i1 %22, label %31, label %23
23: ; preds = %2
%24 = load i64, i64* %4, align 8
%25 = and i64 %24, 128
%26 = icmp ne i64 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %23
%28 = load i64, i64* %6, align 8
%29 = and i64 %28, 128
%30 = icmp ne i64 %29, 0
br i1 %30, label %46, label %31
31: ; preds = %27, %23, %2
%32 = load i64, i64* %5, align 8
%33 = and i64 %32, 128
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %44
35: ; preds = %31
%36 = load i64, i64* %4, align 8
%37 = and i64 %36, 128
%38 = icmp ne i64 %37, 0
br i1 %38, label %44, label %39
39: ; preds = %35
%40 = load i64, i64* %6, align 8
%41 = and i64 %40, 128
%42 = icmp ne i64 %41, 0
%43 = xor i1 %42, true
br label %44
44: ; preds = %39, %35, %31
%45 = phi i1 [ false, %35 ], [ false, %31 ], [ %43, %39 ]
br label %46
46: ; preds = %44, %27
%47 = phi i1 [ true, %27 ], [ %45, %44 ]
%48 = zext i1 %47 to i32
%49 = load i64, i64* %4, align 8
%50 = and i64 %49, 8
%51 = trunc i64 %50 to i32
%52 = load i64, i64* %5, align 8
%53 = and i64 %52, 15
%54 = load i64, i64* %4, align 8
%55 = and i64 %54, 15
%56 = sub nsw i64 %53, %55
%57 = and i64 %56, 16
%58 = trunc i64 %57 to i32
%59 = load i64, i64* %4, align 8
%60 = and i64 %59, 32
%61 = trunc i64 %60 to i32
%62 = load i64, i64* %6, align 8
%63 = icmp eq i64 %62, 0
%64 = zext i1 %63 to i32
%65 = load i64, i64* %6, align 8
%66 = and i64 %65, 128
%67 = call i32 @set_flags(%struct.TYPE_6__* %14, i32 %19, i32 1, i32 %48, i32 %51, i32 %58, i32 %61, i32 %64, i64 %66, i32 255)
ret void
}
declare dso_local i32 @set_flags(%struct.TYPE_6__*, i32, i32, i32, i32, i32, i32, i32, i64, i32) | /* BEGIN FUNCTION-DEF set_flags_cp LOC=UNKNOWN VKEY=4911 */
void set_flags_cp(Z80 *z80 , uint16_t___0 rh___0 )
{
uint8_t___0 lh___0 ;
uint8_t___0 res___0 ;
int tmp ;
unsigned long _TIG_FN_hHlq_1_set_flags_cp_next ;
{
{
_TIG_FN_hHlq_1_set_flags_cp_next = 16UL;
}
while (1) {
switch (_TIG_FN_hHlq_1_set_flags_cp_next) {
case 4UL: ;
if (! (lh___0 & 128L)) {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 15UL;
}
} else {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 7UL;
}
}
break;
case 14UL:
#line 54
lh___0 = z80->regs.a;
#line 55
res___0 = lh___0 - rh___0;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 4UL;
}
break;
case 15UL: ;
if (rh___0 & 128L) {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 13UL;
}
} else {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 7UL;
}
}
break;
case 12UL: ;
if (! (res___0 & 128L)) {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 5UL;
}
} else {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 8UL;
}
}
break;
case 8UL:
#line 56
tmp = 0;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 10UL;
}
break;
case 3UL:
#line 56
tmp = 0;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 10UL;
}
break;
case 16UL: ;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 14UL;
}
break;
case 11UL:
#line 56
tmp = 1;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 10UL;
}
break;
case 9UL: ;
return;
break;
case 13UL: ;
if (res___0 & 128L) {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 11UL;
}
} else {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 7UL;
}
}
break;
case 6UL:
#line 56
tmp = 0;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 10UL;
}
break;
case 5UL:
#line 56
tmp = 1;
{
_TIG_FN_hHlq_1_set_flags_cp_next = 10UL;
}
break;
case 10UL:
#line 56
set_flags(z80, (int )((lh___0 - rh___0) & 256L), 1, tmp, (int )(rh___0 & 8L),
(int )(((lh___0 & 15L) - (rh___0 & 15L)) & 16L), (int )(rh___0 & 32L),
res___0 == 0L, res___0 & 128L, 0xFF);
{
_TIG_FN_hHlq_1_set_flags_cp_next = 9UL;
}
break;
case 7UL:
_L___0: /* CIL Label */
_L: /* CIL Label */ ;
if (lh___0 & 128L) {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 2UL;
}
} else {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 6UL;
}
}
break;
case 2UL: ;
if (! (rh___0 & 128L)) {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 12UL;
}
} else {
{
_TIG_FN_hHlq_1_set_flags_cp_next = 3UL;
}
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF set_flags_cp LOC=UNKNOWN VKEY=4911 */ | 767,303,988 | train_synth_compilable |
set_flags_cp | static inline void set_flags_cp(Z80 *z80, uint16_t rh)
{
uint8_t lh = z80->regs.a;
uint8_t res = lh - rh;
set_flags(z80, (((lh) - (rh)) & 0x100), 1, ((!((lh) & 0x80)) && ((rh) & 0x80) && ((res) & 0x80) || ((lh) & 0x80) && (!((rh) & 0x80)) && (!((res) & 0x80))), ((rh) & 0x08),
((((lh) & 0x0F) - ((rh) & 0x0F)) & 0x10), ((rh) & 0x20), ((res) == 0), ((res) & 0x80), 0xFF);
} | EncodeArithmetic | .global set_flags_cp
.type set_flags_cp, %function
set_flags_cp:
.LFB0:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
stp x29, x30, [sp, 16]
.cfi_offset 29, -48
.cfi_offset 30, -40
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 48]
ldr x1, [sp, 48]
ldr x0, [sp, 32]
sub x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 48]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
and w8, w0, 256
ldr x0, [sp, 48]
and x0, x0, 128
cmp x0, 0
bne .L2
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
beq .L2
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L3
.L2:
ldr x0, [sp, 48]
and x0, x0, 128
cmp x0, 0
beq .L4
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
bne .L4
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L4
.L3:
mov w0, 1
b .L5
.L4:
mov w0, 0
.L5:
ldr x1, [sp, 32]
and w3, w1, 8
ldr x1, [sp, 48]
and w2, w1, 15
ldr x1, [sp, 32]
and w1, w1, 15
sub w1, w2, w1
and w4, w1, 16
ldr x1, [sp, 32]
and w5, w1, 32
ldr x1, [sp, 56]
cmp x1, 0
cset w1, eq
and w1, w1, 255
mov w6, w1
ldr x1, [sp, 56]
and x1, x1, 128
mov w2, 255
str w2, [sp, 8]
str x1, [sp]
mov w7, w6
mov w6, w5
mov w5, w4
mov w4, w3
mov w3, w0
mov w2, 1
mov w1, w8
ldr x0, [sp, 40]
bl set_flags
nop
ldp x29, x30, [sp, 16]
add sp, sp, 64
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global set_flags_cp
.type set_flags_cp, %function
set_flags_cp:
.LFB6:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
stp x29, x30, [sp, 16]
.cfi_offset 29, -64
.cfi_offset 30, -56
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 64]
ldr x0, [sp, 32]
mvn x1, x0
ldr x0, [sp, 64]
add x0, x1, x0
add x0, x0, 1
str x0, [sp, 56]
ldr x0, [sp, 64]
and x0, x0, 128
cmp x0, 0
bne .L17
ldr x0, [sp, 32]
mvn x0, x0
and x0, x0, 128
cmp x0, 0
bne .L18
ldr x0, [sp, 56]
mvn x0, x0
and x0, x0, 128
cmp x0, 0
bne .L19
mov w0, 1
str w0, [sp, 76]
b .L11
.L8:
.L17:
nop
b .L12
.L18:
nop
b .L12
.L19:
nop
.L12:
ldr x0, [sp, 64]
mvn x0, x0
and x0, x0, 128
cmp x0, 0
bne .L13
ldr x0, [sp, 32]
and x0, x0, 128
cmp x0, 0
bne .L14
ldr x0, [sp, 56]
and x0, x0, 128
cmp x0, 0
bne .L15
mov w0, 1
str w0, [sp, 76]
b .L11
.L15:
str wzr, [sp, 76]
b .L11
.L14:
str wzr, [sp, 76]
b .L11
.L13:
str wzr, [sp, 76]
.L11:
ldr x0, [sp, 64]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
and w8, w0, 256
ldr x0, [sp, 32]
and w2, w0, 8
ldr x0, [sp, 64]
and w1, w0, 15
ldr x0, [sp, 32]
and w0, w0, 15
sub w0, w1, w0
and w3, w0, 16
ldr x0, [sp, 32]
and w4, w0, 32
ldr x0, [sp, 56]
cmp x0, 0
cset w0, eq
and w0, w0, 255
mov w5, w0
ldr x0, [sp, 56]
mvn x0, x0
orr x1, x0, 128
ldr x0, [sp, 56]
add x0, x1, x0
add x0, x0, 1
mov w1, 255
str w1, [sp, 8]
str x0, [sp]
mov w7, w5
mov w6, w4
mov w5, w3
mov w4, w2
ldr w3, [sp, 76]
mov w2, 1
mov w1, w8
ldr x0, [sp, 40]
bl set_flags
nop
ldp x29, x30, [sp, 16]
add sp, sp, 80
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size set_flags_cp, .-set_flags_cp | %struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i64 }
define dso_local void @set_flags_cp(%struct.TYPE_6__* %0, i64 %1) {
%3 = alloca %struct.TYPE_6__*, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
%6 = alloca i64, align 8
store %struct.TYPE_6__* %0, %struct.TYPE_6__** %3, align 8
store i64 %1, i64* %4, align 8
%7 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3, align 8
%8 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %8, i32 0, i32 0
%10 = load i64, i64* %9, align 8
store i64 %10, i64* %5, align 8
%11 = load i64, i64* %5, align 8
%12 = load i64, i64* %4, align 8
%13 = sub nsw i64 %11, %12
store i64 %13, i64* %6, align 8
%14 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3, align 8
%15 = load i64, i64* %5, align 8
%16 = load i64, i64* %4, align 8
%17 = sub nsw i64 %15, %16
%18 = and i64 %17, 256
%19 = trunc i64 %18 to i32
%20 = load i64, i64* %5, align 8
%21 = and i64 %20, 128
%22 = icmp ne i64 %21, 0
br i1 %22, label %31, label %23
23: ; preds = %2
%24 = load i64, i64* %4, align 8
%25 = and i64 %24, 128
%26 = icmp ne i64 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %23
%28 = load i64, i64* %6, align 8
%29 = and i64 %28, 128
%30 = icmp ne i64 %29, 0
br i1 %30, label %46, label %31
31: ; preds = %27, %23, %2
%32 = load i64, i64* %5, align 8
%33 = and i64 %32, 128
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %44
35: ; preds = %31
%36 = load i64, i64* %4, align 8
%37 = and i64 %36, 128
%38 = icmp ne i64 %37, 0
br i1 %38, label %44, label %39
39: ; preds = %35
%40 = load i64, i64* %6, align 8
%41 = and i64 %40, 128
%42 = icmp ne i64 %41, 0
%43 = xor i1 %42, true
br label %44
44: ; preds = %39, %35, %31
%45 = phi i1 [ false, %35 ], [ false, %31 ], [ %43, %39 ]
br label %46
46: ; preds = %44, %27
%47 = phi i1 [ true, %27 ], [ %45, %44 ]
%48 = zext i1 %47 to i32
%49 = load i64, i64* %4, align 8
%50 = and i64 %49, 8
%51 = trunc i64 %50 to i32
%52 = load i64, i64* %5, align 8
%53 = and i64 %52, 15
%54 = load i64, i64* %4, align 8
%55 = and i64 %54, 15
%56 = sub nsw i64 %53, %55
%57 = and i64 %56, 16
%58 = trunc i64 %57 to i32
%59 = load i64, i64* %4, align 8
%60 = and i64 %59, 32
%61 = trunc i64 %60 to i32
%62 = load i64, i64* %6, align 8
%63 = icmp eq i64 %62, 0
%64 = zext i1 %63 to i32
%65 = load i64, i64* %6, align 8
%66 = and i64 %65, 128
%67 = call i32 @set_flags(%struct.TYPE_6__* %14, i32 %19, i32 1, i32 %48, i32 %51, i32 %58, i32 %61, i32 %64, i64 %66, i32 255)
ret void
}
declare dso_local i32 @set_flags(%struct.TYPE_6__*, i32, i32, i32, i32, i32, i32, i32, i64, i32) | /* BEGIN FUNCTION-DEF set_flags_cp LOC=UNKNOWN VKEY=4911 */
void set_flags_cp(Z80 *z80 , uint16_t___0 rh___0 )
{
uint8_t___0 lh___0 ;
uint8_t___0 res___0 ;
int tmp ;
{
{
#line 54 "/tmp/forklift_obfu_0o7tj_2_/input.c"
lh___0 = z80->regs.a;
#line 55
res___0 = (lh___0 + ~ rh___0) + 1L;
}
#line 56
if (! (lh___0 & 128L)) {
#line 56
if ((~ rh___0 | 128L) - ~ rh___0) {
#line 56
if ((~ res___0 | 128L) - ~ res___0) {
#line 56
tmp = 1;
} else {
#line 56
goto _L___0;
}
} else {
#line 56
goto _L___0;
}
} else
_L___0: /* CIL Label */
_L: /* CIL Label */
#line 56
if ((~ lh___0 | 128L) - ~ lh___0) {
#line 56
if (! (rh___0 & 128L)) {
#line 56
if (! (res___0 & 128L)) {
#line 56
tmp = 1;
} else {
#line 56
tmp = 0;
}
} else {
#line 56
tmp = 0;
}
} else {
#line 56
tmp = 0;
}
#line 56
set_flags(z80, (int )((lh___0 - rh___0) & 256L), 1, tmp, (int )(rh___0 & 8L), (int )(((lh___0 & 15L) - (rh___0 & 15L)) & 16L),
(int )(rh___0 & 32L), res___0 == 0L, ((~ res___0 | 128L) + res___0) + 1L,
0xFF);
#line 58
return;
}
}
/* END FUNCTION-DEF set_flags_cp LOC=UNKNOWN VKEY=4911 */ | 457,031,004 | train_synth_compilable |
ascii2int | static uint64_t ascii2int(const unsigned char *string, const unsigned int max_length)
{
uint64_t res=0;
unsigned int i;
for(i=0;i<max_length;i++)
{
if(string[i]>='0' && string[i]<='9')
res=res*10+(string[i]-'0');
else if(!(string[i]==' ' && res==0))
return 0;
}
return res;
} | Flatten | .global ascii2int
.type ascii2int, %function
ascii2int:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
str wzr, [sp, 28]
b .L2
.L7:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 47
bls .L3
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 57
bhi .L3
ldr w1, [sp, 24]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w0, #48
add w0, w2, w0
str w0, [sp, 24]
b .L4
.L3:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 32
bne .L5
ldr w0, [sp, 24]
cmp w0, 0
beq .L4
.L5:
mov w0, 0
b .L6
.L4:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
bcc .L7
ldr w0, [sp, 24]
.L6:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global ascii2int
.type ascii2int, %function
ascii2int:
.LFB3:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
mov x0, 13
str x0, [sp, 16]
.L27:
ldr x0, [sp, 16]
cmp x0, 13
beq .L2
ldr x0, [sp, 16]
cmp x0, 13
bhi .L28
ldr x0, [sp, 16]
cmp x0, 12
beq .L4
ldr x0, [sp, 16]
cmp x0, 12
bhi .L28
ldr x0, [sp, 16]
cmp x0, 11
beq .L5
ldr x0, [sp, 16]
cmp x0, 11
bhi .L28
ldr x0, [sp, 16]
cmp x0, 9
beq .L6
ldr x0, [sp, 16]
cmp x0, 9
bhi .L28
ldr x0, [sp, 16]
cmp x0, 7
beq .L7
ldr x0, [sp, 16]
cmp x0, 7
bhi .L28
ldr x0, [sp, 16]
cmp x0, 6
beq .L8
ldr x0, [sp, 16]
cmp x0, 6
bhi .L28
ldr x0, [sp, 16]
cmp x0, 5
beq .L9
ldr x0, [sp, 16]
cmp x0, 5
bhi .L28
ldr x0, [sp, 16]
cmp x0, 4
beq .L10
ldr x0, [sp, 16]
cmp x0, 4
bhi .L28
ldr x0, [sp, 16]
cmp x0, 3
beq .L11
ldr x0, [sp, 16]
cmp x0, 3
bhi .L28
ldr x0, [sp, 16]
cmp x0, 2
beq .L12
ldr x0, [sp, 16]
cmp x0, 2
bhi .L28
ldr x0, [sp, 16]
cmp x0, 0
beq .L13
ldr x0, [sp, 16]
cmp x0, 1
beq .L14
b .L28
.L10:
mov w0, 0
b .L15
.L4:
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w0, #48
add w0, w2, w0
str w0, [sp, 28]
mov x0, 2
str x0, [sp, 16]
b .L16
.L14:
ldr w0, [sp, 28]
cmp w0, 0
bne .L17
mov x0, 2
str x0, [sp, 16]
b .L16
.L17:
str xzr, [sp, 16]
b .L16
.L11:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 57
bhi .L19
mov x0, 12
str x0, [sp, 16]
b .L16
.L19:
mov x0, 6
str x0, [sp, 16]
b .L16
.L5:
ldr w1, [sp, 24]
ldr w0, [sp, 4]
cmp w1, w0
bcs .L21
mov x0, 9
str x0, [sp, 16]
b .L16
.L21:
mov x0, 7
str x0, [sp, 16]
b .L16
.L6:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 47
bls .L23
mov x0, 3
str x0, [sp, 16]
b .L16
.L23:
mov x0, 6
str x0, [sp, 16]
b .L16
.L2:
mov x0, 5
str x0, [sp, 16]
b .L16
.L8:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 32
bne .L25
mov x0, 1
str x0, [sp, 16]
b .L16
.L25:
mov x0, 4
str x0, [sp, 16]
b .L16
.L9:
str wzr, [sp, 28]
str wzr, [sp, 24]
mov x0, 11
str x0, [sp, 16]
b .L16
.L13:
mov w0, 0
b .L15
.L7:
ldr w0, [sp, 28]
b .L15
.L12:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
mov x0, 11
str x0, [sp, 16]
b .L16
.L28:
nop
.L16:
b .L27
.L15:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size ascii2int, .-ascii2int | define dso_local i32 @ascii2int(i8* %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca i8*, align 8
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = alloca i32, align 4
store i8* %0, i8** %4, align 8
store i32 %1, i32* %5, align 4
store i32 0, i32* %6, align 4
store i32 0, i32* %7, align 4
br label %8
8: ; preds = %53, %2
%9 = load i32, i32* %7, align 4
%10 = load i32, i32* %5, align 4
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %56
12: ; preds = %8
%13 = load i8*, i8** %4, align 8
%14 = load i32, i32* %7, align 4
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16, align 1
%18 = zext i8 %17 to i32
%19 = icmp sge i32 %18, 48
br i1 %19, label %20, label %39
20: ; preds = %12
%21 = load i8*, i8** %4, align 8
%22 = load i32, i32* %7, align 4
%23 = zext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24, align 1
%26 = zext i8 %25 to i32
%27 = icmp sle i32 %26, 57
br i1 %27, label %28, label %39
28: ; preds = %20
%29 = load i32, i32* %6, align 4
%30 = mul nsw i32 %29, 10
%31 = load i8*, i8** %4, align 8
%32 = load i32, i32* %7, align 4
%33 = zext i32 %32 to i64
%34 = getelementptr inbounds i8, i8* %31, i64 %33
%35 = load i8, i8* %34, align 1
%36 = zext i8 %35 to i32
%37 = sub nsw i32 %36, 48
%38 = add nsw i32 %30, %37
store i32 %38, i32* %6, align 4
br label %52
39: ; preds = %20, %12
%40 = load i8*, i8** %4, align 8
%41 = load i32, i32* %7, align 4
%42 = zext i32 %41 to i64
%43 = getelementptr inbounds i8, i8* %40, i64 %42
%44 = load i8, i8* %43, align 1
%45 = zext i8 %44 to i32
%46 = icmp eq i32 %45, 32
br i1 %46, label %47, label %50
47: ; preds = %39
%48 = load i32, i32* %6, align 4
%49 = icmp eq i32 %48, 0
br i1 %49, label %51, label %50
50: ; preds = %47, %39
store i32 0, i32* %3, align 4
br label %58
51: ; preds = %47
br label %52
52: ; preds = %51, %28
br label %53
53: ; preds = %52
%54 = load i32, i32* %7, align 4
%55 = add i32 %54, 1
store i32 %55, i32* %7, align 4
br label %8
56: ; preds = %8
%57 = load i32, i32* %6, align 4
store i32 %57, i32* %3, align 4
br label %58
58: ; preds = %56, %50
%59 = load i32, i32* %3, align 4
ret i32 %59
} | /* BEGIN FUNCTION-DEF ascii2int LOC=UNKNOWN VKEY=4886 */
static uint64_t___0 ascii2int(unsigned char const *string , unsigned int const max_length )
{
uint64_t___0 res ;
unsigned int i ;
unsigned long _TIG_FN_nSCO_1_ascii2int_next ;
{
{
_TIG_FN_nSCO_1_ascii2int_next = 13UL;
}
while (1) {
switch (_TIG_FN_nSCO_1_ascii2int_next) {
case 4UL: ;
return (0);
break;
case 12UL:
#line 49 "/tmp/forklift_obfu_wv7390h8/input.c"
res = res * 10 + (uint64_t___0 )((int const )*(string + i) - 48);
{
_TIG_FN_nSCO_1_ascii2int_next = 2UL;
}
break;
case 1UL: ;
if (res == 0) {
{
_TIG_FN_nSCO_1_ascii2int_next = 2UL;
}
} else {
{
_TIG_FN_nSCO_1_ascii2int_next = 0UL;
}
}
break;
case 3UL: ;
if ((int const )*(string + i) <= 57) {
{
_TIG_FN_nSCO_1_ascii2int_next = 12UL;
}
} else {
{
_TIG_FN_nSCO_1_ascii2int_next = 6UL;
}
}
break;
case 11UL: ;
if (i < (unsigned int )max_length) {
{
_TIG_FN_nSCO_1_ascii2int_next = 9UL;
}
} else {
{
_TIG_FN_nSCO_1_ascii2int_next = 7UL;
}
}
break;
case 9UL: ;
if ((int const )*(string + i) >= 48) {
{
_TIG_FN_nSCO_1_ascii2int_next = 3UL;
}
} else {
{
_TIG_FN_nSCO_1_ascii2int_next = 6UL;
}
}
break;
case 13UL: ;
{
_TIG_FN_nSCO_1_ascii2int_next = 5UL;
}
break;
case 6UL:
_L: /* CIL Label */ ;
if ((int const )*(string + i) == 32) {
{
_TIG_FN_nSCO_1_ascii2int_next = 1UL;
}
} else {
{
_TIG_FN_nSCO_1_ascii2int_next = 4UL;
}
}
break;
case 5UL:
#line 44
res = 0;
#line 46
i = 0U;
{
_TIG_FN_nSCO_1_ascii2int_next = 11UL;
}
break;
case 0UL: ;
return (0);
break;
case 7UL: ;
return (res);
break;
case 2UL:
#line 46
i ++;
{
_TIG_FN_nSCO_1_ascii2int_next = 11UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF ascii2int LOC=UNKNOWN VKEY=4886 */ | 248,786,714 | train_synth_compilable |
ascii2int | static uint64_t ascii2int(const unsigned char *string, const unsigned int max_length)
{
uint64_t res=0;
unsigned int i;
for(i=0;i<max_length;i++)
{
if(string[i]>='0' && string[i]<='9')
res=res*10+(string[i]-'0');
else if(!(string[i]==' ' && res==0))
return 0;
}
return res;
} | EncodeArithmetic | .global ascii2int
.type ascii2int, %function
ascii2int:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
str wzr, [sp, 28]
b .L2
.L7:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 47
bls .L3
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 57
bhi .L3
ldr w1, [sp, 24]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w0, #48
add w0, w2, w0
str w0, [sp, 24]
b .L4
.L3:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 32
bne .L5
ldr w0, [sp, 24]
cmp w0, 0
beq .L4
.L5:
mov w0, 0
b .L6
.L4:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
bcc .L7
ldr w0, [sp, 24]
.L6:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global ascii2int
.type ascii2int, %function
ascii2int:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 28]
str wzr, [sp, 24]
b .L8
.L14:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 47
bls .L15
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
mov w0, -58
orr w1, w1, w0
ldr w0, [sp, 24]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w2, [x0]
mov w0, 57
eor w0, w2, w0
and w0, w0, 255
mov w3, w0
ldr w0, [sp, 24]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w0, [x0]
sub w0, w0, #58
orr w0, w3, w0
and w0, w1, w0
cmp w0, 0
bge .L16
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w0, #48
eor w2, w2, w0
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w3, w0
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w0, #48
and w0, w3, w0
lsl w0, w0, 1
add w0, w2, w0
str w0, [sp, 28]
b .L11
.L15:
nop
b .L9
.L16:
nop
.L9:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w3, w0
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
mov w0, 2147483616
add w0, w1, w0
lsl w1, w0, 1
ldr w0, [sp, 24]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w0, [x0]
mov w2, w0
mov w0, 2147483616
add w0, w2, w0
asr w0, w0, 31
and w0, w1, w0
sub w1, w3, w0
mov w0, 2147483616
add w0, w1, w0
cmp w0, 0
bge .L12
ldr w0, [sp, 28]
neg w1, w0
ldr w0, [sp, 28]
orr w0, w1, w0
cmp w0, 0
bge .L11
mov w0, 0
b .L13
.L12:
mov w0, 0
b .L13
.L11:
ldr w0, [sp, 24]
eor w1, w0, 1
ldr w0, [sp, 24]
and w0, w0, 1
lsl w0, w0, 1
add w0, w1, w0
str w0, [sp, 24]
.L8:
ldr w0, [sp, 24]
mvn w1, w0
ldr w0, [sp, 4]
and w1, w1, w0
ldr w2, [sp, 24]
ldr w0, [sp, 4]
eor w0, w2, w0
mvn w2, w0
ldr w3, [sp, 24]
ldr w0, [sp, 4]
sub w0, w3, w0
and w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L14
ldr w0, [sp, 28]
.L13:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size ascii2int, .-ascii2int | define dso_local i32 @ascii2int(i8* %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca i8*, align 8
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = alloca i32, align 4
store i8* %0, i8** %4, align 8
store i32 %1, i32* %5, align 4
store i32 0, i32* %6, align 4
store i32 0, i32* %7, align 4
br label %8
8: ; preds = %53, %2
%9 = load i32, i32* %7, align 4
%10 = load i32, i32* %5, align 4
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %56
12: ; preds = %8
%13 = load i8*, i8** %4, align 8
%14 = load i32, i32* %7, align 4
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16, align 1
%18 = zext i8 %17 to i32
%19 = icmp sge i32 %18, 48
br i1 %19, label %20, label %39
20: ; preds = %12
%21 = load i8*, i8** %4, align 8
%22 = load i32, i32* %7, align 4
%23 = zext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24, align 1
%26 = zext i8 %25 to i32
%27 = icmp sle i32 %26, 57
br i1 %27, label %28, label %39
28: ; preds = %20
%29 = load i32, i32* %6, align 4
%30 = mul nsw i32 %29, 10
%31 = load i8*, i8** %4, align 8
%32 = load i32, i32* %7, align 4
%33 = zext i32 %32 to i64
%34 = getelementptr inbounds i8, i8* %31, i64 %33
%35 = load i8, i8* %34, align 1
%36 = zext i8 %35 to i32
%37 = sub nsw i32 %36, 48
%38 = add nsw i32 %30, %37
store i32 %38, i32* %6, align 4
br label %52
39: ; preds = %20, %12
%40 = load i8*, i8** %4, align 8
%41 = load i32, i32* %7, align 4
%42 = zext i32 %41 to i64
%43 = getelementptr inbounds i8, i8* %40, i64 %42
%44 = load i8, i8* %43, align 1
%45 = zext i8 %44 to i32
%46 = icmp eq i32 %45, 32
br i1 %46, label %47, label %50
47: ; preds = %39
%48 = load i32, i32* %6, align 4
%49 = icmp eq i32 %48, 0
br i1 %49, label %51, label %50
50: ; preds = %47, %39
store i32 0, i32* %3, align 4
br label %58
51: ; preds = %47
br label %52
52: ; preds = %51, %28
br label %53
53: ; preds = %52
%54 = load i32, i32* %7, align 4
%55 = add i32 %54, 1
store i32 %55, i32* %7, align 4
br label %8
56: ; preds = %8
%57 = load i32, i32* %6, align 4
store i32 %57, i32* %3, align 4
br label %58
58: ; preds = %56, %50
%59 = load i32, i32* %3, align 4
ret i32 %59
} | /* BEGIN FUNCTION-DEF ascii2int LOC=UNKNOWN VKEY=4886 */
static uint64_t___0 ascii2int(unsigned char const *string , unsigned int const max_length )
{
uint64_t___0 res ;
unsigned int i ;
{
{
#line 44 "/tmp/forklift_obfu_ib1cjlx8/input.c"
res = 0;
#line 46
i = 0U;
}
#line 46
while ((int )((((~ i & (unsigned int )max_length) | (~ (i ^ (unsigned int )max_length) & (i - (unsigned int )max_length))) >> 31U) & 1U)) {
#line 48
if (48 <= (int const )*(string + i)) {
#line 48
if ((int )(((unsigned int const )(((int const )*(string + i) | ~ 57) & (((int const )*(string + i) ^ 57) | ~ (57 - (int const )*(string + i)))) >> (unsigned int const )31) & 1)) {
#line 49
res = (res * 10 ^ (uint64_t___0 )((int const )*(string + i) - 48)) + ((res * 10 & (uint64_t___0 )((int const )*(string + i) - 48)) << 1);
} else {
#line 48
goto _L;
}
} else
_L: /* CIL Label */
#line 50
if ((int )(((unsigned int const )((((int const )*(string + i) - 32) + (1 << 31)) - (((((int const )*(string + i) - 32) + (1 << 31)) + (((int const )*(string + i) - 32) + (1 << 31))) & ((((int const )*(string + i) - 32) + (1 << 31)) >> (int const )31))) >> (unsigned int const )31) & 1)) {
#line 50
if (! (((unsigned int )(~ (res | - res)) >> 31U) & 1)) {
#line 51
return (0);
}
} else {
#line 51
return (0);
}
#line 46
i = (i ^ 1U) + ((i & 1U) + (i & 1U));
}
#line 53
return (res);
}
}
/* END FUNCTION-DEF ascii2int LOC=UNKNOWN VKEY=4886 */ | 1,034,535,593 | train_synth_compilable |
rs_rainflow_set_cycle_style | int
rs_rainflow_set_cycle_style (rs_rainflow_t *obj, int style)
{
if (obj == NULL)
{
errno = EINVAL;
return -1;
}
if (obj->busy != SETUP)
{
errno = EBUSY;
return -1;
}
if (style < 0 || style >= RS_RAINFLOW_CYCLE_REPRESENTATIONS)
{
errno = EINVAL;
return -1;
}
obj->style = style;
return 0;
} | EncodeArithmetic | .global rs_rainflow_set_cycle_style
.type rs_rainflow_set_cycle_style, %function
rs_rainflow_set_cycle_style:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
cmp x0, 0
bne .L2
adrp x0, :got:EINVAL
ldr x0, [x0, #:got_lo12:EINVAL]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L2:
ldr x0, [sp, 8]
ldr x1, [x0]
adrp x0, :got:SETUP
ldr x0, [x0, #:got_lo12:SETUP]
ldr x0, [x0]
cmp x1, x0
beq .L4
adrp x0, :got:EBUSY
ldr x0, [x0, #:got_lo12:EBUSY]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L4:
ldr w0, [sp, 4]
cmp w0, 0
blt .L5
adrp x0, :got:RS_RAINFLOW_CYCLE_REPRESENTATIONS
ldr x0, [x0, #:got_lo12:RS_RAINFLOW_CYCLE_REPRESENTATIONS]
ldr w0, [x0]
ldr w1, [sp, 4]
cmp w1, w0
blt .L6
.L5:
adrp x0, :got:EINVAL
ldr x0, [x0, #:got_lo12:EINVAL]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L6:
ldr x0, [sp, 8]
ldr w1, [sp, 4]
str w1, [x0, 8]
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global rs_rainflow_set_cycle_style
.type rs_rainflow_set_cycle_style, %function
rs_rainflow_set_cycle_style:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
neg x1, x0
ldr x0, [sp, 8]
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L2
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov w0, -1
b .L3
.L2:
ldr x0, [sp, 8]
ldr x1, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
sub x0, x1, x0
lsl x1, x0, 1
ldr x0, [sp, 8]
ldr x2, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
sub x0, x2, x0
asr x0, x0, 63
and x1, x1, x0
ldr x0, [sp, 8]
ldr x2, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
sub x0, x2, x0
sub x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L4
adrp x0, EBUSY
add x0, x0, :lo12:EBUSY
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov w0, -1
b .L3
.L4:
ldr w0, [sp, 4]
cmp w0, 0
bge .L5
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov w0, -1
b .L3
.L5:
adrp x0, RS_RAINFLOW_CYCLE_REPRESENTATIONS
add x0, x0, :lo12:RS_RAINFLOW_CYCLE_REPRESENTATIONS
ldr w0, [x0]
ldr w1, [sp, 4]
cmp w1, w0
blt .L6
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov w0, -1
b .L3
.L6:
ldr x0, [sp, 8]
ldr w1, [sp, 4]
str w1, [x0, 8]
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size rs_rainflow_set_cycle_style, .-rs_rainflow_set_cycle_style | %struct.TYPE_3__ = type { i64, i32 }
@EINVAL = external dso_local global i32, align 4
@errno = external dso_local global i32, align 4
@SETUP = external dso_local global i64, align 8
@EBUSY = external dso_local global i32, align 4
@RS_RAINFLOW_CYCLE_REPRESENTATIONS = external dso_local global i32, align 4
define dso_local i32 @rs_rainflow_set_cycle_style(%struct.TYPE_3__* %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca %struct.TYPE_3__*, align 8
%5 = alloca i32, align 4
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %4, align 8
store i32 %1, i32* %5, align 4
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%7 = icmp eq %struct.TYPE_3__* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* @EINVAL, align 4
store i32 %9, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
10: ; preds = %2
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 0
%13 = load i64, i64* %12, align 8
%14 = load i64, i64* @SETUP, align 8
%15 = icmp ne i64 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i32, i32* @EBUSY, align 4
store i32 %17, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
18: ; preds = %10
%19 = load i32, i32* %5, align 4
%20 = icmp slt i32 %19, 0
br i1 %20, label %25, label %21
21: ; preds = %18
%22 = load i32, i32* %5, align 4
%23 = load i32, i32* @RS_RAINFLOW_CYCLE_REPRESENTATIONS, align 4
%24 = icmp sge i32 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21, %18
%26 = load i32, i32* @EINVAL, align 4
store i32 %26, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
27: ; preds = %21
%28 = load i32, i32* %5, align 4
%29 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%30 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %29, i32 0, i32 1
store i32 %28, i32* %30, align 8
store i32 0, i32* %3, align 4
br label %31
31: ; preds = %27, %25, %16, %8
%32 = load i32, i32* %3, align 4
ret i32 %32
} | /* BEGIN FUNCTION-DEF rs_rainflow_set_cycle_style LOC=UNKNOWN VKEY=4894 */
int rs_rainflow_set_cycle_style(rs_rainflow_t *obj , int style )
{
{
#line 52
if ((int )((~ (((unsigned long )obj - (unsigned long )((void *)0)) | ((unsigned long )((void *)0) - (unsigned long )obj)) >> 63UL) & 1UL)) {
#line 54 "/tmp/forklift_obfu_ro3iiwpp/input.c"
errno = EINVAL;
#line 55
return (-1);
}
#line 58
if ((int )(((unsigned long )((((obj->busy - SETUP) + (obj->busy - SETUP)) & ((obj->busy - SETUP) >> 63L)) - (obj->busy - SETUP)) >> 63UL) & 1L)) {
#line 60
errno = EBUSY;
#line 61
return (-1);
}
#line 64
if (((unsigned int )style >> 31U) & 1) {
#line 66
errno = EINVAL;
#line 67
return (-1);
} else
#line 64
if (RS_RAINFLOW_CYCLE_REPRESENTATIONS <= style) {
#line 66
errno = EINVAL;
#line 67
return (-1);
}
#line 70
obj->style = style;
#line 72
return (0);
}
}
/* END FUNCTION-DEF rs_rainflow_set_cycle_style LOC=UNKNOWN VKEY=4894 */ | 551,437,149 | train_synth_compilable |
ascii2int | static uint64_t ascii2int(const unsigned char *string, const unsigned int max_length)
{
uint64_t res=0;
unsigned int i;
for(i=0;i<max_length;i++)
{
if(string[i]>='0' && string[i]<='9')
res=res*10+(string[i]-'0');
else if(!(string[i]==' ' && res==0))
return 0;
}
return res;
} | Flatten+EncodeArithmetic | .global ascii2int
.type ascii2int, %function
ascii2int:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
str wzr, [sp, 28]
b .L2
.L7:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 47
bls .L3
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 57
bhi .L3
ldr w1, [sp, 24]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w0, #48
add w0, w2, w0
str w0, [sp, 24]
b .L4
.L3:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 32
bne .L5
ldr w0, [sp, 24]
cmp w0, 0
beq .L4
.L5:
mov w0, 0
b .L6
.L4:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
bcc .L7
ldr w0, [sp, 24]
.L6:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global ascii2int
.type ascii2int, %function
ascii2int:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
mov x0, 13
str x0, [sp, 16]
.L27:
ldr x0, [sp, 16]
cmp x0, 13
beq .L2
ldr x0, [sp, 16]
cmp x0, 13
bhi .L28
ldr x0, [sp, 16]
cmp x0, 12
beq .L4
ldr x0, [sp, 16]
cmp x0, 12
bhi .L28
ldr x0, [sp, 16]
cmp x0, 11
beq .L5
ldr x0, [sp, 16]
cmp x0, 11
bhi .L28
ldr x0, [sp, 16]
cmp x0, 9
beq .L6
ldr x0, [sp, 16]
cmp x0, 9
bhi .L28
ldr x0, [sp, 16]
cmp x0, 7
beq .L7
ldr x0, [sp, 16]
cmp x0, 7
bhi .L28
ldr x0, [sp, 16]
cmp x0, 6
beq .L8
ldr x0, [sp, 16]
cmp x0, 6
bhi .L28
ldr x0, [sp, 16]
cmp x0, 5
beq .L9
ldr x0, [sp, 16]
cmp x0, 5
bhi .L28
ldr x0, [sp, 16]
cmp x0, 4
beq .L10
ldr x0, [sp, 16]
cmp x0, 4
bhi .L28
ldr x0, [sp, 16]
cmp x0, 3
beq .L11
ldr x0, [sp, 16]
cmp x0, 3
bhi .L28
ldr x0, [sp, 16]
cmp x0, 2
beq .L12
ldr x0, [sp, 16]
cmp x0, 2
bhi .L28
ldr x0, [sp, 16]
cmp x0, 0
beq .L13
ldr x0, [sp, 16]
cmp x0, 1
beq .L14
b .L28
.L10:
mov w0, 0
b .L15
.L4:
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
mov w0, 47
sub w0, w0, w1
sub w0, w2, w0
sub w0, w0, #1
str w0, [sp, 28]
mov x0, 2
str x0, [sp, 16]
b .L16
.L14:
ldr w0, [sp, 28]
neg w1, w0
ldr w0, [sp, 28]
orr w0, w1, w0
cmp w0, 0
blt .L17
mov x0, 2
str x0, [sp, 16]
b .L16
.L17:
str xzr, [sp, 16]
b .L16
.L11:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
mov w0, -58
orr w1, w1, w0
ldr w0, [sp, 24]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w2, [x0]
mov w0, 57
eor w0, w2, w0
and w0, w0, 255
mov w3, w0
ldr w0, [sp, 24]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w0, [x0]
sub w0, w0, #58
orr w0, w3, w0
and w0, w1, w0
cmp w0, 0
bge .L19
mov x0, 12
str x0, [sp, 16]
b .L16
.L19:
mov x0, 6
str x0, [sp, 16]
b .L16
.L5:
ldr w0, [sp, 24]
mvn w1, w0
ldr w0, [sp, 4]
and w1, w1, w0
ldr w0, [sp, 24]
mvn w2, w0
ldr w0, [sp, 4]
orr w2, w2, w0
ldr w3, [sp, 24]
ldr w0, [sp, 4]
sub w0, w3, w0
and w0, w2, w0
orr w0, w1, w0
cmp w0, 0
bge .L21
mov x0, 9
str x0, [sp, 16]
b .L16
.L21:
mov x0, 7
str x0, [sp, 16]
b .L16
.L6:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 47
bls .L23
mov x0, 3
str x0, [sp, 16]
b .L16
.L23:
mov x0, 6
str x0, [sp, 16]
b .L16
.L2:
mov x0, 5
str x0, [sp, 16]
b .L16
.L8:
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
mov w0, 2147483616
add w0, w1, w0
mov w2, w0
ldr w0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
mov w0, 2147483616
add w0, w1, w0
asr w0, w0, 31
eor w0, w2, w0
ldr w1, [sp, 24]
ldr x2, [sp, 8]
add x1, x2, x1
ldrb w1, [x1]
mov w2, w1
mov w1, 2147483616
add w1, w2, w1
lsr w1, w1, 31
add w0, w0, w1
cmp w0, 0
bge .L25
mov x0, 1
str x0, [sp, 16]
b .L16
.L25:
mov x0, 4
str x0, [sp, 16]
b .L16
.L9:
str wzr, [sp, 28]
str wzr, [sp, 24]
mov x0, 11
str x0, [sp, 16]
b .L16
.L13:
mov w0, 0
b .L15
.L7:
ldr w0, [sp, 28]
b .L15
.L12:
ldr w0, [sp, 24]
orr w0, w0, 1
lsl w1, w0, 1
ldr w0, [sp, 24]
eor w0, w0, 1
sub w0, w1, w0
str w0, [sp, 24]
mov x0, 11
str x0, [sp, 16]
b .L16
.L28:
nop
.L16:
b .L27
.L15:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size ascii2int, .-ascii2int | define dso_local i32 @ascii2int(i8* %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca i8*, align 8
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = alloca i32, align 4
store i8* %0, i8** %4, align 8
store i32 %1, i32* %5, align 4
store i32 0, i32* %6, align 4
store i32 0, i32* %7, align 4
br label %8
8: ; preds = %53, %2
%9 = load i32, i32* %7, align 4
%10 = load i32, i32* %5, align 4
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %56
12: ; preds = %8
%13 = load i8*, i8** %4, align 8
%14 = load i32, i32* %7, align 4
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16, align 1
%18 = zext i8 %17 to i32
%19 = icmp sge i32 %18, 48
br i1 %19, label %20, label %39
20: ; preds = %12
%21 = load i8*, i8** %4, align 8
%22 = load i32, i32* %7, align 4
%23 = zext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24, align 1
%26 = zext i8 %25 to i32
%27 = icmp sle i32 %26, 57
br i1 %27, label %28, label %39
28: ; preds = %20
%29 = load i32, i32* %6, align 4
%30 = mul nsw i32 %29, 10
%31 = load i8*, i8** %4, align 8
%32 = load i32, i32* %7, align 4
%33 = zext i32 %32 to i64
%34 = getelementptr inbounds i8, i8* %31, i64 %33
%35 = load i8, i8* %34, align 1
%36 = zext i8 %35 to i32
%37 = sub nsw i32 %36, 48
%38 = add nsw i32 %30, %37
store i32 %38, i32* %6, align 4
br label %52
39: ; preds = %20, %12
%40 = load i8*, i8** %4, align 8
%41 = load i32, i32* %7, align 4
%42 = zext i32 %41 to i64
%43 = getelementptr inbounds i8, i8* %40, i64 %42
%44 = load i8, i8* %43, align 1
%45 = zext i8 %44 to i32
%46 = icmp eq i32 %45, 32
br i1 %46, label %47, label %50
47: ; preds = %39
%48 = load i32, i32* %6, align 4
%49 = icmp eq i32 %48, 0
br i1 %49, label %51, label %50
50: ; preds = %47, %39
store i32 0, i32* %3, align 4
br label %58
51: ; preds = %47
br label %52
52: ; preds = %51, %28
br label %53
53: ; preds = %52
%54 = load i32, i32* %7, align 4
%55 = add i32 %54, 1
store i32 %55, i32* %7, align 4
br label %8
56: ; preds = %8
%57 = load i32, i32* %6, align 4
store i32 %57, i32* %3, align 4
br label %58
58: ; preds = %56, %50
%59 = load i32, i32* %3, align 4
ret i32 %59
} | /* BEGIN FUNCTION-DEF ascii2int LOC=UNKNOWN VKEY=4893 */
static uint64_t___0 ascii2int(unsigned char const *string , unsigned int const max_length )
{
uint64_t___0 res ;
unsigned int i ;
unsigned long _TIG_FN_cMfW_1_ascii2int_next ;
{
_TIG_FN_cMfW_1_ascii2int_next = 13UL;
while (1) {
switch (_TIG_FN_cMfW_1_ascii2int_next) {
case 4UL: ;
return (0);
break;
case 12UL:
#line 49 "/tmp/forklift_obfu_ea8vdezy/input.c"
res = (res * 10 - ~ ((uint64_t___0 )((int const )*(string + i) - 48))) - 1;
_TIG_FN_cMfW_1_ascii2int_next = 2UL;
break;
case 1UL: ;
if (((unsigned int )(~ (res | - res)) >> 31U) & 1) {
_TIG_FN_cMfW_1_ascii2int_next = 2UL;
} else {
_TIG_FN_cMfW_1_ascii2int_next = 0UL;
}
break;
case 3UL: ;
if ((int )(((unsigned int const )(((int const )*(string + i) | ~ 57) & (((int const )*(string + i) ^ 57) | ~ (57 - (int const )*(string + i)))) >> (unsigned int const )31) & 1)) {
_TIG_FN_cMfW_1_ascii2int_next = 12UL;
} else {
_TIG_FN_cMfW_1_ascii2int_next = 6UL;
}
break;
case 11UL: ;
if ((int )((((~ i & (unsigned int )max_length) | ((~ i | (unsigned int )max_length) & (i - (unsigned int )max_length))) >> 31U) & 1U)) {
_TIG_FN_cMfW_1_ascii2int_next = 9UL;
} else {
_TIG_FN_cMfW_1_ascii2int_next = 7UL;
}
break;
case 9UL: ;
if (48 <= (int const )*(string + i)) {
_TIG_FN_cMfW_1_ascii2int_next = 3UL;
} else {
_TIG_FN_cMfW_1_ascii2int_next = 6UL;
}
break;
case 13UL: ;
_TIG_FN_cMfW_1_ascii2int_next = 5UL;
break;
case 6UL:
_L: /* CIL Label */ ;
if ((int )(((unsigned int const )(((((int const )*(string + i) - 32) + (1 << 31)) ^ ((((int const )*(string + i) - 32) + (1 << 31)) >> (int const )31)) - ((((int const )*(string + i) - 32) + (1 << 31)) >> (int const )31)) >> (unsigned int const )31) & 1)) {
_TIG_FN_cMfW_1_ascii2int_next = 1UL;
} else {
_TIG_FN_cMfW_1_ascii2int_next = 4UL;
}
break;
case 5UL:
{
#line 44
res = 0;
#line 46
i = 0U;
}
_TIG_FN_cMfW_1_ascii2int_next = 11UL;
break;
case 0UL: ;
return (0);
break;
case 7UL: ;
return (res);
break;
case 2UL:
#line 46
i = ((i | 1U) + (i | 1U)) - (i ^ 1U);
_TIG_FN_cMfW_1_ascii2int_next = 11UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF ascii2int LOC=UNKNOWN VKEY=4893 */ | 338,258,951 | train_synth_compilable |
WindowRemoveElement | void WindowRemoveElement( struct GUIWindow * w, struct GUIBase * g )
{
int i;
for( i = 0; i < 2048; i++ )
{
if( w->elements[i] == g )
w->elements[i] = 0;
}
} | EncodeArithmetic | .global WindowRemoveElement
.type WindowRemoveElement, %function
WindowRemoveElement:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 28]
b .L2
.L4:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
ldr x1, [sp]
cmp x1, x0
bne .L3
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
.L3:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 2047
ble .L4
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global WindowRemoveElement
.type WindowRemoveElement, %function
WindowRemoveElement:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 28]
b .L2
.L4:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
ldr x0, [sp]
sub x1, x1, x0
ldr x0, [sp]
ldr x2, [sp, 8]
ldr x3, [x2]
ldrsw x2, [sp, 28]
lsl x2, x2, 3
add x2, x3, x2
ldr x2, [x2]
sub x0, x0, x2
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L3
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
.L3:
ldr w0, [sp, 28]
eor w1, w0, 1
ldr w0, [sp, 28]
lsl w0, w0, 1
and w0, w0, 2
add w0, w1, w0
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
and w1, w0, -2049
ldr w0, [sp, 28]
eor w2, w0, -2049
ldr w0, [sp, 28]
sub w0, w0, #2048
and w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L4
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size WindowRemoveElement, .-WindowRemoveElement | %struct.GUIWindow = type { %struct.GUIBase** }
%struct.GUIBase = type { i32 }
define dso_local void @WindowRemoveElement(%struct.GUIWindow* %0, %struct.GUIBase* %1) {
%3 = alloca %struct.GUIWindow*, align 8
%4 = alloca %struct.GUIBase*, align 8
%5 = alloca i32, align 4
store %struct.GUIWindow* %0, %struct.GUIWindow** %3, align 8
store %struct.GUIBase* %1, %struct.GUIBase** %4, align 8
store i32 0, i32* %5, align 4
br label %6
6: ; preds = %27, %2
%7 = load i32, i32* %5, align 4
%8 = icmp slt i32 %7, 2048
br i1 %8, label %9, label %30
9: ; preds = %6
%10 = load %struct.GUIWindow*, %struct.GUIWindow** %3, align 8
%11 = getelementptr inbounds %struct.GUIWindow, %struct.GUIWindow* %10, i32 0, i32 0
%12 = load %struct.GUIBase**, %struct.GUIBase*** %11, align 8
%13 = load i32, i32* %5, align 4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds %struct.GUIBase*, %struct.GUIBase** %12, i64 %14
%16 = load %struct.GUIBase*, %struct.GUIBase** %15, align 8
%17 = load %struct.GUIBase*, %struct.GUIBase** %4, align 8
%18 = icmp eq %struct.GUIBase* %16, %17
br i1 %18, label %19, label %26
19: ; preds = %9
%20 = load %struct.GUIWindow*, %struct.GUIWindow** %3, align 8
%21 = getelementptr inbounds %struct.GUIWindow, %struct.GUIWindow* %20, i32 0, i32 0
%22 = load %struct.GUIBase**, %struct.GUIBase*** %21, align 8
%23 = load i32, i32* %5, align 4
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds %struct.GUIBase*, %struct.GUIBase** %22, i64 %24
store %struct.GUIBase* null, %struct.GUIBase** %25, align 8
br label %26
26: ; preds = %19, %9
br label %27
27: ; preds = %26
%28 = load i32, i32* %5, align 4
%29 = add nsw i32 %28, 1
store i32 %29, i32* %5, align 4
br label %6
30: ; preds = %6
ret void
} | /* BEGIN FUNCTION-DEF WindowRemoveElement LOC=UNKNOWN VKEY=4885 */
void WindowRemoveElement(struct GUIWindow *w , struct GUIBase *g )
{
int i ;
{
#line 46 "/tmp/forklift_obfu_mbj00idh/input.c"
i = 0;
#line 46
while (((unsigned int )((i & ~ 2048) | (~ (i ^ 2048) & (i - 2048))) >> 31U) & 1) {
#line 48
if ((int )((~ (((unsigned long )*(w->elements + i) - (unsigned long )g) | ((unsigned long )g - (unsigned long )*(w->elements + i))) >> 63UL) & 1UL)) {
#line 49
*(w->elements + i) = (struct GUIBase *)0;
}
#line 46
i = (i ^ 1) + ((i & 1) << 1);
}
#line 52
return;
}
}
/* END FUNCTION-DEF WindowRemoveElement LOC=UNKNOWN VKEY=4885 */ | 863,937,247 | train_synth_compilable |
rs_rainflow_set_cycle_style | int
rs_rainflow_set_cycle_style (rs_rainflow_t *obj, int style)
{
if (obj == NULL)
{
errno = EINVAL;
return -1;
}
if (obj->busy != SETUP)
{
errno = EBUSY;
return -1;
}
if (style < 0 || style >= RS_RAINFLOW_CYCLE_REPRESENTATIONS)
{
errno = EINVAL;
return -1;
}
obj->style = style;
return 0;
} | Flatten+EncodeArithmetic | .global rs_rainflow_set_cycle_style
.type rs_rainflow_set_cycle_style, %function
rs_rainflow_set_cycle_style:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
cmp x0, 0
bne .L2
adrp x0, :got:EINVAL
ldr x0, [x0, #:got_lo12:EINVAL]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L2:
ldr x0, [sp, 8]
ldr x1, [x0]
adrp x0, :got:SETUP
ldr x0, [x0, #:got_lo12:SETUP]
ldr x0, [x0]
cmp x1, x0
beq .L4
adrp x0, :got:EBUSY
ldr x0, [x0, #:got_lo12:EBUSY]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L4:
ldr w0, [sp, 4]
cmp w0, 0
blt .L5
adrp x0, :got:RS_RAINFLOW_CYCLE_REPRESENTATIONS
ldr x0, [x0, #:got_lo12:RS_RAINFLOW_CYCLE_REPRESENTATIONS]
ldr w0, [x0]
ldr w1, [sp, 4]
cmp w1, w0
blt .L6
.L5:
adrp x0, :got:EINVAL
ldr x0, [x0, #:got_lo12:EINVAL]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L6:
ldr x0, [sp, 8]
ldr w1, [sp, 4]
str w1, [x0, 8]
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global rs_rainflow_set_cycle_style
.type rs_rainflow_set_cycle_style, %function
rs_rainflow_set_cycle_style:
.LFB4:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
mov x0, 12
str x0, [sp, 24]
.L27:
ldr x0, [sp, 24]
cmp x0, 13
beq .L2
ldr x0, [sp, 24]
cmp x0, 13
bhi .L28
ldr x0, [sp, 24]
cmp x0, 12
beq .L4
ldr x0, [sp, 24]
cmp x0, 12
bhi .L28
ldr x0, [sp, 24]
cmp x0, 11
beq .L5
ldr x0, [sp, 24]
cmp x0, 11
bhi .L28
ldr x0, [sp, 24]
cmp x0, 10
beq .L6
ldr x0, [sp, 24]
cmp x0, 10
bhi .L28
ldr x0, [sp, 24]
cmp x0, 9
beq .L7
ldr x0, [sp, 24]
cmp x0, 9
bhi .L28
ldr x0, [sp, 24]
cmp x0, 8
beq .L8
ldr x0, [sp, 24]
cmp x0, 8
bhi .L28
ldr x0, [sp, 24]
cmp x0, 7
beq .L9
ldr x0, [sp, 24]
cmp x0, 7
bhi .L28
ldr x0, [sp, 24]
cmp x0, 6
beq .L10
ldr x0, [sp, 24]
cmp x0, 6
bhi .L28
ldr x0, [sp, 24]
cmp x0, 5
beq .L11
ldr x0, [sp, 24]
cmp x0, 5
bhi .L28
ldr x0, [sp, 24]
cmp x0, 4
beq .L12
ldr x0, [sp, 24]
cmp x0, 4
bhi .L28
ldr x0, [sp, 24]
cmp x0, 3
beq .L13
ldr x0, [sp, 24]
cmp x0, 3
bhi .L28
ldr x0, [sp, 24]
cmp x0, 2
beq .L14
ldr x0, [sp, 24]
cmp x0, 2
bhi .L28
ldr x0, [sp, 24]
cmp x0, 0
beq .L15
ldr x0, [sp, 24]
cmp x0, 1
beq .L16
b .L28
.L12:
ldr x0, [sp, 8]
ldr w1, [sp, 4]
str w1, [x0, 8]
mov x0, 2
str x0, [sp, 24]
b .L17
.L4:
ldr x0, [sp, 8]
asr x0, x0, 63
mov x1, x0
ldr x0, [sp, 8]
eor x0, x1, x0
ldr x1, [sp, 8]
asr x1, x1, 63
sub x0, x0, x1
sub x0, x0, #1
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L18
mov x0, 5
str x0, [sp, 24]
b .L17
.L18:
mov x0, 10
str x0, [sp, 24]
b .L17
.L8:
mov w0, -1
b .L20
.L16:
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
str xzr, [sp, 24]
b .L17
.L13:
ldr w0, [sp, 4]
cmp w0, 0
bge .L21
mov x0, 11
str x0, [sp, 24]
b .L17
.L21:
mov x0, 6
str x0, [sp, 24]
b .L17
.L5:
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov x0, 7
str x0, [sp, 24]
b .L17
.L7:
mov w0, -1
b .L20
.L2:
adrp x0, EBUSY
add x0, x0, :lo12:EBUSY
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov x0, 8
str x0, [sp, 24]
b .L17
.L10:
adrp x0, RS_RAINFLOW_CYCLE_REPRESENTATIONS
add x0, x0, :lo12:RS_RAINFLOW_CYCLE_REPRESENTATIONS
ldr w0, [x0]
ldr w1, [sp, 4]
cmp w1, w0
blt .L23
mov x0, 1
str x0, [sp, 24]
b .L17
.L23:
mov x0, 4
str x0, [sp, 24]
b .L17
.L11:
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov x0, 9
str x0, [sp, 24]
b .L17
.L6:
ldr x0, [sp, 8]
ldr x1, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
sub x0, x1, x0
lsl x1, x0, 1
ldr x0, [sp, 8]
ldr x2, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
sub x0, x2, x0
asr x0, x0, 63
and x1, x1, x0
ldr x0, [sp, 8]
ldr x2, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
sub x0, x2, x0
sub x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L25
mov x0, 13
str x0, [sp, 24]
b .L17
.L25:
mov x0, 3
str x0, [sp, 24]
b .L17
.L15:
mov w0, -1
b .L20
.L9:
mov w0, -1
b .L20
.L14:
mov w0, 0
b .L20
.L28:
nop
.L17:
b .L27
.L20:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size rs_rainflow_set_cycle_style, .-rs_rainflow_set_cycle_style | %struct.TYPE_3__ = type { i64, i32 }
@EINVAL = external dso_local global i32, align 4
@errno = external dso_local global i32, align 4
@SETUP = external dso_local global i64, align 8
@EBUSY = external dso_local global i32, align 4
@RS_RAINFLOW_CYCLE_REPRESENTATIONS = external dso_local global i32, align 4
define dso_local i32 @rs_rainflow_set_cycle_style(%struct.TYPE_3__* %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca %struct.TYPE_3__*, align 8
%5 = alloca i32, align 4
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %4, align 8
store i32 %1, i32* %5, align 4
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%7 = icmp eq %struct.TYPE_3__* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* @EINVAL, align 4
store i32 %9, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
10: ; preds = %2
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 0
%13 = load i64, i64* %12, align 8
%14 = load i64, i64* @SETUP, align 8
%15 = icmp ne i64 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i32, i32* @EBUSY, align 4
store i32 %17, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
18: ; preds = %10
%19 = load i32, i32* %5, align 4
%20 = icmp slt i32 %19, 0
br i1 %20, label %25, label %21
21: ; preds = %18
%22 = load i32, i32* %5, align 4
%23 = load i32, i32* @RS_RAINFLOW_CYCLE_REPRESENTATIONS, align 4
%24 = icmp sge i32 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21, %18
%26 = load i32, i32* @EINVAL, align 4
store i32 %26, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
27: ; preds = %21
%28 = load i32, i32* %5, align 4
%29 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%30 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %29, i32 0, i32 1
store i32 %28, i32* %30, align 8
store i32 0, i32* %3, align 4
br label %31
31: ; preds = %27, %25, %16, %8
%32 = load i32, i32* %3, align 4
ret i32 %32
} | /* BEGIN FUNCTION-DEF rs_rainflow_set_cycle_style LOC=UNKNOWN VKEY=4899 */
int rs_rainflow_set_cycle_style(rs_rainflow_t *obj , int style )
{
unsigned long _TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next ;
{
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 12UL;
while (1) {
switch (_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next) {
case 4UL:
#line 70 "/tmp/forklift_obfu_g_n4qzxh/input.c"
obj->style = style;
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 2UL;
break;
case 12UL: ;
if ((int )(((((((unsigned long )obj - (unsigned long )((void *)0)) ^ ((long )((unsigned long )obj - (unsigned long )((void *)0)) >> 63L)) - ((long )((unsigned long )obj - (unsigned long )((void *)0)) >> 63L)) - 1UL) >> 63UL) & 1UL)) {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 5UL;
} else {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 10UL;
}
break;
case 8UL: ;
return (-1);
break;
case 1UL:
#line 66
errno = EINVAL;
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 0UL;
break;
case 3UL: ;
if (((unsigned int )style >> 31U) & 1) {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 11UL;
} else {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 6UL;
}
break;
case 11UL:
#line 66
errno = EINVAL;
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 7UL;
break;
case 9UL: ;
return (-1);
break;
case 13UL:
#line 60
errno = EBUSY;
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 8UL;
break;
case 6UL: ;
if (RS_RAINFLOW_CYCLE_REPRESENTATIONS <= style) {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 1UL;
} else {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 4UL;
}
break;
case 5UL:
#line 54
errno = EINVAL;
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 9UL;
break;
case 10UL: ;
if ((int )(((unsigned long )((((obj->busy - SETUP) + (obj->busy - SETUP)) & ((obj->busy - SETUP) >> 63L)) - (obj->busy - SETUP)) >> 63UL) & 1L)) {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 13UL;
} else {
_TIG_FN_nKzJ_1_rs_rainflow_set_cycle_style_next = 3UL;
}
break;
case 0UL: ;
return (-1);
break;
case 7UL: ;
return (-1);
break;
case 2UL: ;
return (0);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF rs_rainflow_set_cycle_style LOC=UNKNOWN VKEY=4899 */ | 2,041,322,270 | train_synth_compilable |
DACCheckOn | static inline uint8_t DACCheckOn(void)
{
return DACB.CTRLB;
} | Flatten+EncodeArithmetic | .global DACCheckOn
.type DACCheckOn, %function
DACCheckOn:
.LFB0:
.cfi_startproc
adrp x0, :got:DACB
ldr x0, [x0, #:got_lo12:DACB]
ldr w0, [x0]
ret
.cfi_endproc
| .global DACCheckOn
.type DACCheckOn, %function
DACCheckOn:
.LFB5:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str xzr, [sp, 8]
.L11:
ldr x0, [sp, 8]
cmp x0, 0
bne .L14
adrp x0, DACB
add x0, x0, :lo12:DACB
ldr w0, [x0]
b .L13
.L14:
nop
b .L11
.L13:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size DACCheckOn, .-DACCheckOn | %struct.TYPE_2__ = type { i32 }
@DACB = external dso_local global %struct.TYPE_2__, align 4
define dso_local i32 @DACCheckOn() {
%1 = load i32, i32* getelementptr inbounds (%struct.TYPE_2__, %struct.TYPE_2__* @DACB, i32 0, i32 0), align 4
ret i32 %1
} | /* BEGIN FUNCTION-DEF DACCheckOn LOC=UNKNOWN VKEY=4884 */
uint8_t___0 DACCheckOn(void)
{
unsigned long _TIG_FN_LDn7_1_DACCheckOn_next ;
{
_TIG_FN_LDn7_1_DACCheckOn_next = 0UL;
while (1) {
switch (_TIG_FN_LDn7_1_DACCheckOn_next) {
case 0UL: ;
return (DACB.CTRLB);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF DACCheckOn LOC=UNKNOWN VKEY=4884 */ | 1,817,363,615 | train_synth_compilable |
rs_rainflow_set_cycle_style | int
rs_rainflow_set_cycle_style (rs_rainflow_t *obj, int style)
{
if (obj == NULL)
{
errno = EINVAL;
return -1;
}
if (obj->busy != SETUP)
{
errno = EBUSY;
return -1;
}
if (style < 0 || style >= RS_RAINFLOW_CYCLE_REPRESENTATIONS)
{
errno = EINVAL;
return -1;
}
obj->style = style;
return 0;
} | Flatten | .global rs_rainflow_set_cycle_style
.type rs_rainflow_set_cycle_style, %function
rs_rainflow_set_cycle_style:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
cmp x0, 0
bne .L2
adrp x0, :got:EINVAL
ldr x0, [x0, #:got_lo12:EINVAL]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L2:
ldr x0, [sp, 8]
ldr x1, [x0]
adrp x0, :got:SETUP
ldr x0, [x0, #:got_lo12:SETUP]
ldr x0, [x0]
cmp x1, x0
beq .L4
adrp x0, :got:EBUSY
ldr x0, [x0, #:got_lo12:EBUSY]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L4:
ldr w0, [sp, 4]
cmp w0, 0
blt .L5
adrp x0, :got:RS_RAINFLOW_CYCLE_REPRESENTATIONS
ldr x0, [x0, #:got_lo12:RS_RAINFLOW_CYCLE_REPRESENTATIONS]
ldr w0, [x0]
ldr w1, [sp, 4]
cmp w1, w0
blt .L6
.L5:
adrp x0, :got:EINVAL
ldr x0, [x0, #:got_lo12:EINVAL]
ldr w1, [x0]
adrp x0, :got:errno
ldr x0, [x0, #:got_lo12:errno]
str w1, [x0]
mov w0, -1
b .L3
.L6:
ldr x0, [sp, 8]
ldr w1, [sp, 4]
str w1, [x0, 8]
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global rs_rainflow_set_cycle_style
.type rs_rainflow_set_cycle_style, %function
rs_rainflow_set_cycle_style:
.LFB3:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
mov x0, 12
str x0, [sp, 24]
.L27:
ldr x0, [sp, 24]
cmp x0, 13
beq .L2
ldr x0, [sp, 24]
cmp x0, 13
bhi .L28
ldr x0, [sp, 24]
cmp x0, 12
beq .L4
ldr x0, [sp, 24]
cmp x0, 12
bhi .L28
ldr x0, [sp, 24]
cmp x0, 11
beq .L5
ldr x0, [sp, 24]
cmp x0, 11
bhi .L28
ldr x0, [sp, 24]
cmp x0, 10
beq .L6
ldr x0, [sp, 24]
cmp x0, 10
bhi .L28
ldr x0, [sp, 24]
cmp x0, 9
beq .L7
ldr x0, [sp, 24]
cmp x0, 9
bhi .L28
ldr x0, [sp, 24]
cmp x0, 8
beq .L8
ldr x0, [sp, 24]
cmp x0, 8
bhi .L28
ldr x0, [sp, 24]
cmp x0, 7
beq .L9
ldr x0, [sp, 24]
cmp x0, 7
bhi .L28
ldr x0, [sp, 24]
cmp x0, 6
beq .L10
ldr x0, [sp, 24]
cmp x0, 6
bhi .L28
ldr x0, [sp, 24]
cmp x0, 5
beq .L11
ldr x0, [sp, 24]
cmp x0, 5
bhi .L28
ldr x0, [sp, 24]
cmp x0, 4
beq .L12
ldr x0, [sp, 24]
cmp x0, 4
bhi .L28
ldr x0, [sp, 24]
cmp x0, 3
beq .L13
ldr x0, [sp, 24]
cmp x0, 3
bhi .L28
ldr x0, [sp, 24]
cmp x0, 2
beq .L14
ldr x0, [sp, 24]
cmp x0, 2
bhi .L28
ldr x0, [sp, 24]
cmp x0, 0
beq .L15
ldr x0, [sp, 24]
cmp x0, 1
beq .L16
b .L28
.L12:
ldr x0, [sp, 8]
ldr w1, [sp, 4]
str w1, [x0, 8]
mov x0, 2
str x0, [sp, 24]
b .L17
.L4:
ldr x0, [sp, 8]
cmp x0, 0
bne .L18
mov x0, 5
str x0, [sp, 24]
b .L17
.L18:
mov x0, 10
str x0, [sp, 24]
b .L17
.L8:
mov w0, -1
b .L20
.L16:
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
str xzr, [sp, 24]
b .L17
.L13:
ldr w0, [sp, 4]
cmp w0, 0
bge .L21
mov x0, 11
str x0, [sp, 24]
b .L17
.L21:
mov x0, 6
str x0, [sp, 24]
b .L17
.L5:
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov x0, 7
str x0, [sp, 24]
b .L17
.L7:
mov w0, -1
b .L20
.L2:
adrp x0, EBUSY
add x0, x0, :lo12:EBUSY
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov x0, 8
str x0, [sp, 24]
b .L17
.L10:
adrp x0, RS_RAINFLOW_CYCLE_REPRESENTATIONS
add x0, x0, :lo12:RS_RAINFLOW_CYCLE_REPRESENTATIONS
ldr w0, [x0]
ldr w1, [sp, 4]
cmp w1, w0
blt .L23
mov x0, 1
str x0, [sp, 24]
b .L17
.L23:
mov x0, 4
str x0, [sp, 24]
b .L17
.L11:
adrp x0, EINVAL
add x0, x0, :lo12:EINVAL
ldr w1, [x0]
adrp x0, errno
add x0, x0, :lo12:errno
str w1, [x0]
mov x0, 9
str x0, [sp, 24]
b .L17
.L6:
ldr x0, [sp, 8]
ldr x1, [x0]
adrp x0, SETUP
add x0, x0, :lo12:SETUP
ldr x0, [x0]
cmp x1, x0
beq .L25
mov x0, 13
str x0, [sp, 24]
b .L17
.L25:
mov x0, 3
str x0, [sp, 24]
b .L17
.L15:
mov w0, -1
b .L20
.L9:
mov w0, -1
b .L20
.L14:
mov w0, 0
b .L20
.L28:
nop
.L17:
b .L27
.L20:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size rs_rainflow_set_cycle_style, .-rs_rainflow_set_cycle_style | %struct.TYPE_3__ = type { i64, i32 }
@EINVAL = external dso_local global i32, align 4
@errno = external dso_local global i32, align 4
@SETUP = external dso_local global i64, align 8
@EBUSY = external dso_local global i32, align 4
@RS_RAINFLOW_CYCLE_REPRESENTATIONS = external dso_local global i32, align 4
define dso_local i32 @rs_rainflow_set_cycle_style(%struct.TYPE_3__* %0, i32 %1) {
%3 = alloca i32, align 4
%4 = alloca %struct.TYPE_3__*, align 8
%5 = alloca i32, align 4
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %4, align 8
store i32 %1, i32* %5, align 4
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%7 = icmp eq %struct.TYPE_3__* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* @EINVAL, align 4
store i32 %9, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
10: ; preds = %2
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 0
%13 = load i64, i64* %12, align 8
%14 = load i64, i64* @SETUP, align 8
%15 = icmp ne i64 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i32, i32* @EBUSY, align 4
store i32 %17, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
18: ; preds = %10
%19 = load i32, i32* %5, align 4
%20 = icmp slt i32 %19, 0
br i1 %20, label %25, label %21
21: ; preds = %18
%22 = load i32, i32* %5, align 4
%23 = load i32, i32* @RS_RAINFLOW_CYCLE_REPRESENTATIONS, align 4
%24 = icmp sge i32 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21, %18
%26 = load i32, i32* @EINVAL, align 4
store i32 %26, i32* @errno, align 4
store i32 -1, i32* %3, align 4
br label %31
27: ; preds = %21
%28 = load i32, i32* %5, align 4
%29 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4, align 8
%30 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %29, i32 0, i32 1
store i32 %28, i32* %30, align 8
store i32 0, i32* %3, align 4
br label %31
31: ; preds = %27, %25, %16, %8
%32 = load i32, i32* %3, align 4
ret i32 %32
} | /* BEGIN FUNCTION-DEF rs_rainflow_set_cycle_style LOC=UNKNOWN VKEY=4894 */
int rs_rainflow_set_cycle_style(rs_rainflow_t *obj , int style )
{
unsigned long _TIG_FN_47He_1_rs_rainflow_set_cycle_style_next ;
{
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 12UL;
}
while (1) {
switch (_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next) {
case 4UL:
#line 70 "/tmp/forklift_obfu_adb803r0/input.c"
obj->style = style;
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 2UL;
}
break;
case 12UL: ;
if ((unsigned long )obj == (unsigned long )((void *)0)) {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 5UL;
}
} else {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 10UL;
}
}
break;
case 8UL: ;
return (-1);
break;
case 1UL:
#line 66
errno = EINVAL;
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 0UL;
}
break;
case 3UL: ;
if (style < 0) {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 11UL;
}
} else {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 6UL;
}
}
break;
case 11UL:
#line 66
errno = EINVAL;
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 7UL;
}
break;
case 9UL: ;
return (-1);
break;
case 13UL:
#line 60
errno = EBUSY;
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 8UL;
}
break;
case 6UL: ;
if (style >= RS_RAINFLOW_CYCLE_REPRESENTATIONS) {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 1UL;
}
} else {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 4UL;
}
}
break;
case 5UL:
#line 54
errno = EINVAL;
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 9UL;
}
break;
case 10UL: ;
if (obj->busy != SETUP) {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 13UL;
}
} else {
{
_TIG_FN_47He_1_rs_rainflow_set_cycle_style_next = 3UL;
}
}
break;
case 0UL: ;
return (-1);
break;
case 7UL: ;
return (-1);
break;
case 2UL: ;
return (0);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF rs_rainflow_set_cycle_style LOC=UNKNOWN VKEY=4894 */ | 540,137,296 | train_synth_compilable |
DACCheckOn | static inline uint8_t DACCheckOn(void)
{
return DACB.CTRLB;
} | Flatten | .global DACCheckOn
.type DACCheckOn, %function
DACCheckOn:
.LFB0:
.cfi_startproc
adrp x0, :got:DACB
ldr x0, [x0, #:got_lo12:DACB]
ldr w0, [x0]
ret
.cfi_endproc
| .global DACCheckOn
.type DACCheckOn, %function
DACCheckOn:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str xzr, [sp, 8]
.L4:
ldr x0, [sp, 8]
cmp x0, 0
bne .L7
adrp x0, DACB
add x0, x0, :lo12:DACB
ldr w0, [x0]
b .L6
.L7:
nop
b .L4
.L6:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size DACCheckOn, .-DACCheckOn | %struct.TYPE_2__ = type { i32 }
@DACB = external dso_local global %struct.TYPE_2__, align 4
define dso_local i32 @DACCheckOn() {
%1 = load i32, i32* getelementptr inbounds (%struct.TYPE_2__, %struct.TYPE_2__* @DACB, i32 0, i32 0), align 4
ret i32 %1
} | /* BEGIN FUNCTION-DEF DACCheckOn LOC=UNKNOWN VKEY=4881 */
uint8_t___0 DACCheckOn(void)
{
unsigned long _TIG_FN_C64d_1_DACCheckOn_next ;
{
{
_TIG_FN_C64d_1_DACCheckOn_next = 0UL;
}
while (1) {
switch (_TIG_FN_C64d_1_DACCheckOn_next) {
case 0UL: ;
return (DACB.CTRLB);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF DACCheckOn LOC=UNKNOWN VKEY=4881 */ | 709,214,891 | train_synth_compilable |
pgm_vertical_symmetry | void pgm_vertical_symmetry(pgm_image* pgm)
{
unsigned char** matrix = pgm_create_matrix(pgm->width, pgm->height);
for (size_t x = 0; x < pgm->width; x++)
for (size_t y = 0; y < pgm->height; y++) {
matrix[x][y] = pgm->matrix[pgm->width - x - 1][y];
}
pgm_destroy_matrix(pgm->width, pgm->matrix);
pgm->matrix = matrix;
} | Flatten | .global pgm_vertical_symmetry
.type pgm_vertical_symmetry, %function
pgm_vertical_symmetry:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl pgm_create_matrix
str x0, [sp, 56]
str xzr, [sp, 40]
b .L2
.L5:
str xzr, [sp, 48]
b .L3
.L4:
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 40]
sub x0, x2, x0
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 40]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr x2, [x0]
ldr x0, [sp, 48]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L3:
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x1, [sp, 48]
cmp x1, x0
bcc .L4
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 40]
cmp x1, x0
bcc .L5
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x2
bl pgm_destroy_matrix
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0, 16]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global pgm_vertical_symmetry
.type pgm_vertical_symmetry, %function
pgm_vertical_symmetry:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
mov x0, 13
str x0, [sp, 48]
.L24:
ldr x0, [sp, 48]
cmp x0, 13
beq .L8
ldr x0, [sp, 48]
cmp x0, 13
bhi .L25
ldr x0, [sp, 48]
cmp x0, 11
beq .L10
ldr x0, [sp, 48]
cmp x0, 11
bhi .L25
ldr x0, [sp, 48]
cmp x0, 10
beq .L11
ldr x0, [sp, 48]
cmp x0, 10
bhi .L25
ldr x0, [sp, 48]
cmp x0, 5
beq .L12
ldr x0, [sp, 48]
cmp x0, 5
bhi .L25
ldr x0, [sp, 48]
cmp x0, 4
beq .L13
ldr x0, [sp, 48]
cmp x0, 4
bhi .L25
ldr x0, [sp, 48]
cmp x0, 3
beq .L14
ldr x0, [sp, 48]
cmp x0, 3
bhi .L25
ldr x0, [sp, 48]
cmp x0, 2
beq .L15
ldr x0, [sp, 48]
cmp x0, 2
bhi .L25
ldr x0, [sp, 48]
cmp x0, 0
beq .L26
ldr x0, [sp, 48]
cmp x0, 1
beq .L17
b .L25
.L13:
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 64]
cmp x1, x0
bcs .L18
mov x0, 3
str x0, [sp, 48]
b .L20
.L18:
mov x0, 5
str x0, [sp, 48]
b .L20
.L17:
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 64]
sub x0, x2, x0
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 64]
lsl x0, x0, 3
ldr x2, [sp, 72]
add x0, x2, x0
ldr x2, [x0]
ldr x0, [sp, 56]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
mov x0, 10
str x0, [sp, 48]
b .L20
.L14:
str xzr, [sp, 56]
mov x0, 10
str x0, [sp, 48]
b .L20
.L10:
ldr x0, [sp, 64]
add x0, x0, 1
str x0, [sp, 64]
mov x0, 4
str x0, [sp, 48]
b .L20
.L8:
mov x0, 2
str x0, [sp, 48]
b .L20
.L12:
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x2
bl pgm_destroy_matrix
ldr x0, [sp, 24]
ldr x1, [sp, 72]
str x1, [x0, 16]
str xzr, [sp, 48]
b .L20
.L11:
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x1, [sp, 56]
cmp x1, x0
bcs .L21
mov x0, 1
str x0, [sp, 48]
b .L20
.L21:
mov x0, 11
str x0, [sp, 48]
b .L20
.L15:
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl pgm_create_matrix
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 72]
str xzr, [sp, 64]
mov x0, 4
str x0, [sp, 48]
b .L20
.L25:
nop
.L20:
b .L24
.L26:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size pgm_vertical_symmetry, .-pgm_vertical_symmetry | %struct.TYPE_3__ = type { i64, i64, i8** }
define dso_local void @pgm_vertical_symmetry(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*, align 8
%3 = alloca i8**, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2, align 8
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 0
%8 = load i64, i64* %7, align 8
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 1
%11 = load i64, i64* %10, align 8
%12 = call i8** @pgm_create_matrix(i64 %8, i64 %11)
store i8** %12, i8*** %3, align 8
store i64 0, i64* %4, align 8
br label %13
13: ; preds = %51, %1
%14 = load i64, i64* %4, align 8
%15 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%16 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %15, i32 0, i32 0
%17 = load i64, i64* %16, align 8
%18 = icmp ult i64 %14, %17
br i1 %18, label %19, label %54
19: ; preds = %13
store i64 0, i64* %5, align 8
br label %20
20: ; preds = %47, %19
%21 = load i64, i64* %5, align 8
%22 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%23 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %22, i32 0, i32 1
%24 = load i64, i64* %23, align 8
%25 = icmp ult i64 %21, %24
br i1 %25, label %26, label %50
26: ; preds = %20
%27 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%28 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %27, i32 0, i32 2
%29 = load i8**, i8*** %28, align 8
%30 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%31 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %30, i32 0, i32 0
%32 = load i64, i64* %31, align 8
%33 = load i64, i64* %4, align 8
%34 = sub i64 %32, %33
%35 = sub i64 %34, 1
%36 = getelementptr inbounds i8*, i8** %29, i64 %35
%37 = load i8*, i8** %36, align 8
%38 = load i64, i64* %5, align 8
%39 = getelementptr inbounds i8, i8* %37, i64 %38
%40 = load i8, i8* %39, align 1
%41 = load i8**, i8*** %3, align 8
%42 = load i64, i64* %4, align 8
%43 = getelementptr inbounds i8*, i8** %41, i64 %42
%44 = load i8*, i8** %43, align 8
%45 = load i64, i64* %5, align 8
%46 = getelementptr inbounds i8, i8* %44, i64 %45
store i8 %40, i8* %46, align 1
br label %47
47: ; preds = %26
%48 = load i64, i64* %5, align 8
%49 = add i64 %48, 1
store i64 %49, i64* %5, align 8
br label %20
50: ; preds = %20
br label %51
51: ; preds = %50
%52 = load i64, i64* %4, align 8
%53 = add i64 %52, 1
store i64 %53, i64* %4, align 8
br label %13
54: ; preds = %13
%55 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%56 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %55, i32 0, i32 0
%57 = load i64, i64* %56, align 8
%58 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%59 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %58, i32 0, i32 2
%60 = load i8**, i8*** %59, align 8
%61 = call i32 @pgm_destroy_matrix(i64 %57, i8** %60)
%62 = load i8**, i8*** %3, align 8
%63 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%64 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %63, i32 0, i32 2
store i8** %62, i8*** %64, align 8
ret void
}
declare dso_local i8** @pgm_create_matrix(i64, i64)
declare dso_local i32 @pgm_destroy_matrix(i64, i8**) | /* BEGIN FUNCTION-DEF pgm_vertical_symmetry LOC=UNKNOWN VKEY=4895 */
void pgm_vertical_symmetry(pgm_image *pgm )
{
unsigned char **matrix ;
unsigned char **tmp ;
size_t___0 x ;
size_t___0 y ;
unsigned long _TIG_FN_Ad9O_1_pgm_vertical_symmetry_next ;
{
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 13UL;
}
while (1) {
switch (_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next) {
case 4UL: ;
if (x < pgm->width) {
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 3UL;
}
} else {
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 5UL;
}
}
break;
case 1UL:
#line 52
*(*(matrix + x) + y) = *(*(pgm->matrix + ((pgm->width - x) - 1UL)) + y);
#line 51
y ++;
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 10UL;
}
break;
case 3UL:
#line 51
y = (size_t___0 )0;
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 10UL;
}
break;
case 11UL:
#line 50
x ++;
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 4UL;
}
break;
case 13UL: ;
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 2UL;
}
break;
case 5UL:
#line 54
pgm_destroy_matrix(pgm->width, pgm->matrix);
#line 55
pgm->matrix = matrix;
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 0UL;
}
break;
case 10UL: ;
if (y < pgm->height) {
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 1UL;
}
} else {
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 11UL;
}
}
break;
case 0UL: ;
return;
break;
case 2UL:
#line 48
tmp = pgm_create_matrix(pgm->width, pgm->height);
#line 48
matrix = tmp;
#line 50
x = (size_t___0 )0;
{
_TIG_FN_Ad9O_1_pgm_vertical_symmetry_next = 4UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pgm_vertical_symmetry LOC=UNKNOWN VKEY=4895 */ | 1,713,658,874 | train_synth_compilable |
WindowRemoveElement | void WindowRemoveElement( struct GUIWindow * w, struct GUIBase * g )
{
int i;
for( i = 0; i < 2048; i++ )
{
if( w->elements[i] == g )
w->elements[i] = 0;
}
} | Flatten+EncodeArithmetic | .global WindowRemoveElement
.type WindowRemoveElement, %function
WindowRemoveElement:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 28]
b .L2
.L4:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
ldr x1, [sp]
cmp x1, x0
bne .L3
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
.L3:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 2047
ble .L4
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global WindowRemoveElement
.type WindowRemoveElement, %function
WindowRemoveElement:
.LFB5:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
mov x0, 3
str x0, [sp, 16]
.L21:
ldr x0, [sp, 16]
cmp x0, 7
beq .L8
ldr x0, [sp, 16]
cmp x0, 7
bhi .L22
ldr x0, [sp, 16]
cmp x0, 6
beq .L10
ldr x0, [sp, 16]
cmp x0, 6
bhi .L22
ldr x0, [sp, 16]
cmp x0, 4
beq .L23
ldr x0, [sp, 16]
cmp x0, 4
bhi .L22
ldr x0, [sp, 16]
cmp x0, 3
beq .L12
ldr x0, [sp, 16]
cmp x0, 3
bhi .L22
ldr x0, [sp, 16]
cmp x0, 1
beq .L13
ldr x0, [sp, 16]
cmp x0, 2
beq .L14
b .L22
.L13:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
ldr x0, [sp]
sub x1, x1, x0
ldr x0, [sp]
ldr x2, [sp, 8]
ldr x3, [x2]
ldrsw x2, [sp, 28]
lsl x2, x2, 3
add x2, x3, x2
ldr x2, [x2]
sub x0, x0, x2
orr x0, x1, x0
mvn x0, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L16
mov x0, 2
str x0, [sp, 16]
b .L18
.L16:
mov x0, 6
str x0, [sp, 16]
b .L18
.L12:
str wzr, [sp, 28]
mov x0, 7
str x0, [sp, 16]
b .L18
.L10:
ldr w0, [sp, 28]
eor w1, w0, 1
ldr w0, [sp, 28]
lsl w0, w0, 1
and w0, w0, 2
add w0, w1, w0
str w0, [sp, 28]
mov x0, 7
str x0, [sp, 16]
b .L18
.L8:
ldr w0, [sp, 28]
and w1, w0, -2049
ldr w0, [sp, 28]
eor w2, w0, -2049
ldr w0, [sp, 28]
sub w0, w0, #2048
and w0, w2, w0
orr w0, w1, w0
cmp w0, 0
bge .L19
mov x0, 1
str x0, [sp, 16]
b .L18
.L19:
mov x0, 4
str x0, [sp, 16]
b .L18
.L14:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
mov x0, 6
str x0, [sp, 16]
b .L18
.L22:
nop
.L18:
b .L21
.L23:
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size WindowRemoveElement, .-WindowRemoveElement | %struct.GUIWindow = type { %struct.GUIBase** }
%struct.GUIBase = type { i32 }
define dso_local void @WindowRemoveElement(%struct.GUIWindow* %0, %struct.GUIBase* %1) {
%3 = alloca %struct.GUIWindow*, align 8
%4 = alloca %struct.GUIBase*, align 8
%5 = alloca i32, align 4
store %struct.GUIWindow* %0, %struct.GUIWindow** %3, align 8
store %struct.GUIBase* %1, %struct.GUIBase** %4, align 8
store i32 0, i32* %5, align 4
br label %6
6: ; preds = %27, %2
%7 = load i32, i32* %5, align 4
%8 = icmp slt i32 %7, 2048
br i1 %8, label %9, label %30
9: ; preds = %6
%10 = load %struct.GUIWindow*, %struct.GUIWindow** %3, align 8
%11 = getelementptr inbounds %struct.GUIWindow, %struct.GUIWindow* %10, i32 0, i32 0
%12 = load %struct.GUIBase**, %struct.GUIBase*** %11, align 8
%13 = load i32, i32* %5, align 4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds %struct.GUIBase*, %struct.GUIBase** %12, i64 %14
%16 = load %struct.GUIBase*, %struct.GUIBase** %15, align 8
%17 = load %struct.GUIBase*, %struct.GUIBase** %4, align 8
%18 = icmp eq %struct.GUIBase* %16, %17
br i1 %18, label %19, label %26
19: ; preds = %9
%20 = load %struct.GUIWindow*, %struct.GUIWindow** %3, align 8
%21 = getelementptr inbounds %struct.GUIWindow, %struct.GUIWindow* %20, i32 0, i32 0
%22 = load %struct.GUIBase**, %struct.GUIBase*** %21, align 8
%23 = load i32, i32* %5, align 4
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds %struct.GUIBase*, %struct.GUIBase** %22, i64 %24
store %struct.GUIBase* null, %struct.GUIBase** %25, align 8
br label %26
26: ; preds = %19, %9
br label %27
27: ; preds = %26
%28 = load i32, i32* %5, align 4
%29 = add nsw i32 %28, 1
store i32 %29, i32* %5, align 4
br label %6
30: ; preds = %6
ret void
} | /* BEGIN FUNCTION-DEF WindowRemoveElement LOC=UNKNOWN VKEY=4891 */
void WindowRemoveElement(struct GUIWindow *w , struct GUIBase *g )
{
int i ;
unsigned long _TIG_FN_iSw6_1_WindowRemoveElement_next ;
{
_TIG_FN_iSw6_1_WindowRemoveElement_next = 3UL;
while (1) {
switch (_TIG_FN_iSw6_1_WindowRemoveElement_next) {
case 4UL: ;
return;
break;
case 1UL: ;
if ((int )((~ (((unsigned long )*(w->elements + i) - (unsigned long )g) | ((unsigned long )g - (unsigned long )*(w->elements + i))) >> 63UL) & 1UL)) {
_TIG_FN_iSw6_1_WindowRemoveElement_next = 2UL;
} else {
_TIG_FN_iSw6_1_WindowRemoveElement_next = 6UL;
}
break;
case 3UL:
#line 46 "/tmp/forklift_obfu_l255ku50/input.c"
i = 0;
_TIG_FN_iSw6_1_WindowRemoveElement_next = 7UL;
break;
case 6UL:
#line 46
i = (i ^ 1) + ((i & 1) << 1);
_TIG_FN_iSw6_1_WindowRemoveElement_next = 7UL;
break;
case 7UL: ;
if (((unsigned int )((i & ~ 2048) | (~ (i ^ 2048) & (i - 2048))) >> 31U) & 1) {
_TIG_FN_iSw6_1_WindowRemoveElement_next = 1UL;
} else {
_TIG_FN_iSw6_1_WindowRemoveElement_next = 4UL;
}
break;
case 2UL:
#line 49
*(w->elements + i) = (struct GUIBase *)0;
_TIG_FN_iSw6_1_WindowRemoveElement_next = 6UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF WindowRemoveElement LOC=UNKNOWN VKEY=4891 */ | 1,338,811,290 | train_synth_compilable |
pgm_vertical_symmetry | void pgm_vertical_symmetry(pgm_image* pgm)
{
unsigned char** matrix = pgm_create_matrix(pgm->width, pgm->height);
for (size_t x = 0; x < pgm->width; x++)
for (size_t y = 0; y < pgm->height; y++) {
matrix[x][y] = pgm->matrix[pgm->width - x - 1][y];
}
pgm_destroy_matrix(pgm->width, pgm->matrix);
pgm->matrix = matrix;
} | Flatten+EncodeArithmetic | .global pgm_vertical_symmetry
.type pgm_vertical_symmetry, %function
pgm_vertical_symmetry:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl pgm_create_matrix
str x0, [sp, 56]
str xzr, [sp, 40]
b .L2
.L5:
str xzr, [sp, 48]
b .L3
.L4:
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 40]
sub x0, x2, x0
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 40]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr x2, [x0]
ldr x0, [sp, 48]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L3:
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x1, [sp, 48]
cmp x1, x0
bcc .L4
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 40]
cmp x1, x0
bcc .L5
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x2
bl pgm_destroy_matrix
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0, 16]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global pgm_vertical_symmetry
.type pgm_vertical_symmetry, %function
pgm_vertical_symmetry:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
mov x0, 13
str x0, [sp, 48]
.L24:
ldr x0, [sp, 48]
cmp x0, 13
beq .L8
ldr x0, [sp, 48]
cmp x0, 13
bhi .L25
ldr x0, [sp, 48]
cmp x0, 11
beq .L10
ldr x0, [sp, 48]
cmp x0, 11
bhi .L25
ldr x0, [sp, 48]
cmp x0, 10
beq .L11
ldr x0, [sp, 48]
cmp x0, 10
bhi .L25
ldr x0, [sp, 48]
cmp x0, 5
beq .L12
ldr x0, [sp, 48]
cmp x0, 5
bhi .L25
ldr x0, [sp, 48]
cmp x0, 4
beq .L13
ldr x0, [sp, 48]
cmp x0, 4
bhi .L25
ldr x0, [sp, 48]
cmp x0, 3
beq .L14
ldr x0, [sp, 48]
cmp x0, 3
bhi .L25
ldr x0, [sp, 48]
cmp x0, 2
beq .L15
ldr x0, [sp, 48]
cmp x0, 2
bhi .L25
ldr x0, [sp, 48]
cmp x0, 0
beq .L26
ldr x0, [sp, 48]
cmp x0, 1
beq .L17
b .L25
.L13:
ldr x0, [sp, 64]
mvn x1, x0
ldr x0, [sp, 24]
ldr x0, [x0]
and x1, x1, x0
ldr x0, [sp, 64]
mvn x2, x0
ldr x0, [sp, 24]
ldr x0, [x0]
orr x2, x2, x0
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x3, [sp, 64]
sub x0, x3, x0
and x0, x2, x0
orr x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L18
mov x0, 3
str x0, [sp, 48]
b .L20
.L18:
mov x0, 5
str x0, [sp, 48]
b .L20
.L17:
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 64]
sub x0, x2, x0
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 64]
lsl x0, x0, 3
ldr x2, [sp, 72]
add x0, x2, x0
ldr x2, [x0]
ldr x0, [sp, 56]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
mov x0, 10
str x0, [sp, 48]
b .L20
.L14:
str xzr, [sp, 56]
mov x0, 10
str x0, [sp, 48]
b .L20
.L10:
ldr x0, [sp, 64]
add x0, x0, 1
str x0, [sp, 64]
mov x0, 4
str x0, [sp, 48]
b .L20
.L8:
mov x0, 2
str x0, [sp, 48]
b .L20
.L12:
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x2
bl pgm_destroy_matrix
ldr x0, [sp, 24]
ldr x1, [sp, 72]
str x1, [x0, 16]
str xzr, [sp, 48]
b .L20
.L11:
ldr x0, [sp, 56]
mvn x1, x0
ldr x0, [sp, 24]
ldr x0, [x0, 8]
and x1, x1, x0
ldr x0, [sp, 24]
ldr x2, [x0, 8]
ldr x0, [sp, 56]
eor x0, x2, x0
mvn x2, x0
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x3, [sp, 56]
sub x0, x3, x0
and x0, x2, x0
orr x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
beq .L21
mov x0, 1
str x0, [sp, 48]
b .L20
.L21:
mov x0, 11
str x0, [sp, 48]
b .L20
.L15:
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl pgm_create_matrix
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 72]
str xzr, [sp, 64]
mov x0, 4
str x0, [sp, 48]
b .L20
.L25:
nop
.L20:
b .L24
.L26:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size pgm_vertical_symmetry, .-pgm_vertical_symmetry | %struct.TYPE_3__ = type { i64, i64, i8** }
define dso_local void @pgm_vertical_symmetry(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*, align 8
%3 = alloca i8**, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2, align 8
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 0
%8 = load i64, i64* %7, align 8
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 1
%11 = load i64, i64* %10, align 8
%12 = call i8** @pgm_create_matrix(i64 %8, i64 %11)
store i8** %12, i8*** %3, align 8
store i64 0, i64* %4, align 8
br label %13
13: ; preds = %51, %1
%14 = load i64, i64* %4, align 8
%15 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%16 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %15, i32 0, i32 0
%17 = load i64, i64* %16, align 8
%18 = icmp ult i64 %14, %17
br i1 %18, label %19, label %54
19: ; preds = %13
store i64 0, i64* %5, align 8
br label %20
20: ; preds = %47, %19
%21 = load i64, i64* %5, align 8
%22 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%23 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %22, i32 0, i32 1
%24 = load i64, i64* %23, align 8
%25 = icmp ult i64 %21, %24
br i1 %25, label %26, label %50
26: ; preds = %20
%27 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%28 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %27, i32 0, i32 2
%29 = load i8**, i8*** %28, align 8
%30 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%31 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %30, i32 0, i32 0
%32 = load i64, i64* %31, align 8
%33 = load i64, i64* %4, align 8
%34 = sub i64 %32, %33
%35 = sub i64 %34, 1
%36 = getelementptr inbounds i8*, i8** %29, i64 %35
%37 = load i8*, i8** %36, align 8
%38 = load i64, i64* %5, align 8
%39 = getelementptr inbounds i8, i8* %37, i64 %38
%40 = load i8, i8* %39, align 1
%41 = load i8**, i8*** %3, align 8
%42 = load i64, i64* %4, align 8
%43 = getelementptr inbounds i8*, i8** %41, i64 %42
%44 = load i8*, i8** %43, align 8
%45 = load i64, i64* %5, align 8
%46 = getelementptr inbounds i8, i8* %44, i64 %45
store i8 %40, i8* %46, align 1
br label %47
47: ; preds = %26
%48 = load i64, i64* %5, align 8
%49 = add i64 %48, 1
store i64 %49, i64* %5, align 8
br label %20
50: ; preds = %20
br label %51
51: ; preds = %50
%52 = load i64, i64* %4, align 8
%53 = add i64 %52, 1
store i64 %53, i64* %4, align 8
br label %13
54: ; preds = %13
%55 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%56 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %55, i32 0, i32 0
%57 = load i64, i64* %56, align 8
%58 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%59 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %58, i32 0, i32 2
%60 = load i8**, i8*** %59, align 8
%61 = call i32 @pgm_destroy_matrix(i64 %57, i8** %60)
%62 = load i8**, i8*** %3, align 8
%63 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%64 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %63, i32 0, i32 2
store i8** %62, i8*** %64, align 8
ret void
}
declare dso_local i8** @pgm_create_matrix(i64, i64)
declare dso_local i32 @pgm_destroy_matrix(i64, i8**) | /* BEGIN FUNCTION-DEF pgm_vertical_symmetry LOC=UNKNOWN VKEY=4903 */
void pgm_vertical_symmetry(pgm_image *pgm )
{
unsigned char **matrix ;
unsigned char **tmp ;
size_t___0 x ;
size_t___0 y ;
unsigned long _TIG_FN_8oV9_1_pgm_vertical_symmetry_next ;
{
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 13UL;
while (1) {
switch (_TIG_FN_8oV9_1_pgm_vertical_symmetry_next) {
case 4UL: ;
if ((int )((((~ x & pgm->width) | ((~ x | pgm->width) & (x - pgm->width))) >> 63UL) & 1UL)) {
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 3UL;
} else {
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 5UL;
}
break;
case 1UL:
{
#line 52 "/tmp/forklift_obfu_lnzq0nsz/input.c"
*(*(matrix + x) + y) = *(*(pgm->matrix + ((pgm->width - x) - 1UL)) + y);
#line 51
y = (y - ~ 1UL) - 1UL;
}
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 10UL;
break;
case 3UL:
#line 51
y = (size_t___0 )0;
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 10UL;
break;
case 11UL:
#line 50
x = (x - ~ 1UL) - 1UL;
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 4UL;
break;
case 13UL: ;
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 2UL;
break;
case 5UL:
{
#line 54
pgm_destroy_matrix(pgm->width, pgm->matrix);
#line 55
pgm->matrix = matrix;
}
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 0UL;
break;
case 10UL: ;
if ((int )((((~ y & pgm->height) | (~ (y ^ pgm->height) & (y - pgm->height))) >> 63UL) & 1UL)) {
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 1UL;
} else {
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 11UL;
}
break;
case 0UL: ;
return;
break;
case 2UL:
{
#line 48
tmp = pgm_create_matrix(pgm->width, pgm->height);
#line 48
matrix = tmp;
#line 50
x = (size_t___0 )0;
}
_TIG_FN_8oV9_1_pgm_vertical_symmetry_next = 4UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF pgm_vertical_symmetry LOC=UNKNOWN VKEY=4903 */ | 1,881,625,505 | train_synth_compilable |
DACCheckOn | static inline uint8_t DACCheckOn(void)
{
return DACB.CTRLB;
} | EncodeArithmetic | .global DACCheckOn
.type DACCheckOn, %function
DACCheckOn:
.LFB0:
.cfi_startproc
adrp x0, :got:DACB
ldr x0, [x0, #:got_lo12:DACB]
ldr w0, [x0]
ret
.cfi_endproc
| .global DACCheckOn
.type DACCheckOn, %function
DACCheckOn:
.LFB2:
.cfi_startproc
adrp x0, DACB
add x0, x0, :lo12:DACB
ldr w0, [x0]
ret
.cfi_endproc
.LFE2:
.size DACCheckOn, .-DACCheckOn | %struct.TYPE_2__ = type { i32 }
@DACB = external dso_local global %struct.TYPE_2__, align 4
define dso_local i32 @DACCheckOn() {
%1 = load i32, i32* getelementptr inbounds (%struct.TYPE_2__, %struct.TYPE_2__* @DACB, i32 0, i32 0), align 4
ret i32 %1
} | /* BEGIN FUNCTION-DEF DACCheckOn LOC=UNKNOWN VKEY=4881 */
uint8_t___0 DACCheckOn(void)
{
{
#line 47 "/tmp/forklift_obfu_ifj3h6sy/input.c"
return (DACB.CTRLB);
}
}
/* END FUNCTION-DEF DACCheckOn LOC=UNKNOWN VKEY=4881 */ | 1,138,409,539 | train_synth_compilable |
WindowRemoveElement | void WindowRemoveElement( struct GUIWindow * w, struct GUIBase * g )
{
int i;
for( i = 0; i < 2048; i++ )
{
if( w->elements[i] == g )
w->elements[i] = 0;
}
} | Flatten | .global WindowRemoveElement
.type WindowRemoveElement, %function
WindowRemoveElement:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 28]
b .L2
.L4:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
ldr x1, [sp]
cmp x1, x0
bne .L3
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
.L3:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 2047
ble .L4
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global WindowRemoveElement
.type WindowRemoveElement, %function
WindowRemoveElement:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
mov x0, 3
str x0, [sp, 16]
.L21:
ldr x0, [sp, 16]
cmp x0, 7
beq .L8
ldr x0, [sp, 16]
cmp x0, 7
bhi .L22
ldr x0, [sp, 16]
cmp x0, 6
beq .L10
ldr x0, [sp, 16]
cmp x0, 6
bhi .L22
ldr x0, [sp, 16]
cmp x0, 4
beq .L23
ldr x0, [sp, 16]
cmp x0, 4
bhi .L22
ldr x0, [sp, 16]
cmp x0, 3
beq .L12
ldr x0, [sp, 16]
cmp x0, 3
bhi .L22
ldr x0, [sp, 16]
cmp x0, 1
beq .L13
ldr x0, [sp, 16]
cmp x0, 2
beq .L14
b .L22
.L13:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
ldr x0, [sp]
cmp x1, x0
bne .L16
mov x0, 2
str x0, [sp, 16]
b .L18
.L16:
mov x0, 6
str x0, [sp, 16]
b .L18
.L12:
str wzr, [sp, 28]
mov x0, 7
str x0, [sp, 16]
b .L18
.L10:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
mov x0, 7
str x0, [sp, 16]
b .L18
.L8:
ldr w0, [sp, 28]
cmp w0, 2047
bgt .L19
mov x0, 1
str x0, [sp, 16]
b .L18
.L19:
mov x0, 4
str x0, [sp, 16]
b .L18
.L14:
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
mov x0, 6
str x0, [sp, 16]
b .L18
.L22:
nop
.L18:
b .L21
.L23:
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size WindowRemoveElement, .-WindowRemoveElement | %struct.GUIWindow = type { %struct.GUIBase** }
%struct.GUIBase = type { i32 }
define dso_local void @WindowRemoveElement(%struct.GUIWindow* %0, %struct.GUIBase* %1) {
%3 = alloca %struct.GUIWindow*, align 8
%4 = alloca %struct.GUIBase*, align 8
%5 = alloca i32, align 4
store %struct.GUIWindow* %0, %struct.GUIWindow** %3, align 8
store %struct.GUIBase* %1, %struct.GUIBase** %4, align 8
store i32 0, i32* %5, align 4
br label %6
6: ; preds = %27, %2
%7 = load i32, i32* %5, align 4
%8 = icmp slt i32 %7, 2048
br i1 %8, label %9, label %30
9: ; preds = %6
%10 = load %struct.GUIWindow*, %struct.GUIWindow** %3, align 8
%11 = getelementptr inbounds %struct.GUIWindow, %struct.GUIWindow* %10, i32 0, i32 0
%12 = load %struct.GUIBase**, %struct.GUIBase*** %11, align 8
%13 = load i32, i32* %5, align 4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds %struct.GUIBase*, %struct.GUIBase** %12, i64 %14
%16 = load %struct.GUIBase*, %struct.GUIBase** %15, align 8
%17 = load %struct.GUIBase*, %struct.GUIBase** %4, align 8
%18 = icmp eq %struct.GUIBase* %16, %17
br i1 %18, label %19, label %26
19: ; preds = %9
%20 = load %struct.GUIWindow*, %struct.GUIWindow** %3, align 8
%21 = getelementptr inbounds %struct.GUIWindow, %struct.GUIWindow* %20, i32 0, i32 0
%22 = load %struct.GUIBase**, %struct.GUIBase*** %21, align 8
%23 = load i32, i32* %5, align 4
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds %struct.GUIBase*, %struct.GUIBase** %22, i64 %24
store %struct.GUIBase* null, %struct.GUIBase** %25, align 8
br label %26
26: ; preds = %19, %9
br label %27
27: ; preds = %26
%28 = load i32, i32* %5, align 4
%29 = add nsw i32 %28, 1
store i32 %29, i32* %5, align 4
br label %6
30: ; preds = %6
ret void
} | /* BEGIN FUNCTION-DEF WindowRemoveElement LOC=UNKNOWN VKEY=4885 */
void WindowRemoveElement(struct GUIWindow *w , struct GUIBase *g )
{
int i ;
unsigned long _TIG_FN_C0jz_1_WindowRemoveElement_next ;
{
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 3UL;
}
while (1) {
switch (_TIG_FN_C0jz_1_WindowRemoveElement_next) {
case 4UL: ;
return;
break;
case 1UL: ;
if ((unsigned long )*(w->elements + i) == (unsigned long )g) {
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 2UL;
}
} else {
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 6UL;
}
}
break;
case 3UL:
#line 46 "/tmp/forklift_obfu_rs_5aws8/input.c"
i = 0;
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 7UL;
}
break;
case 6UL:
#line 46
i ++;
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 7UL;
}
break;
case 7UL: ;
if (i < 2048) {
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 1UL;
}
} else {
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 4UL;
}
}
break;
case 2UL:
#line 49
*(w->elements + i) = (struct GUIBase *)0;
{
_TIG_FN_C0jz_1_WindowRemoveElement_next = 6UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF WindowRemoveElement LOC=UNKNOWN VKEY=4885 */ | 909,666,337 | train_synth_compilable |
pgm_vertical_symmetry | void pgm_vertical_symmetry(pgm_image* pgm)
{
unsigned char** matrix = pgm_create_matrix(pgm->width, pgm->height);
for (size_t x = 0; x < pgm->width; x++)
for (size_t y = 0; y < pgm->height; y++) {
matrix[x][y] = pgm->matrix[pgm->width - x - 1][y];
}
pgm_destroy_matrix(pgm->width, pgm->matrix);
pgm->matrix = matrix;
} | EncodeArithmetic | .global pgm_vertical_symmetry
.type pgm_vertical_symmetry, %function
pgm_vertical_symmetry:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl pgm_create_matrix
str x0, [sp, 56]
str xzr, [sp, 40]
b .L2
.L5:
str xzr, [sp, 48]
b .L3
.L4:
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 40]
sub x0, x2, x0
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 40]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr x2, [x0]
ldr x0, [sp, 48]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L3:
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x1, [sp, 48]
cmp x1, x0
bcc .L4
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 40]
cmp x1, x0
bcc .L5
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x2
bl pgm_destroy_matrix
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0, 16]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global pgm_vertical_symmetry
.type pgm_vertical_symmetry, %function
pgm_vertical_symmetry:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl pgm_create_matrix
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
str xzr, [sp, 56]
b .L2
.L5:
str xzr, [sp, 48]
b .L3
.L4:
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 56]
sub x0, x2, x0
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 56]
lsl x0, x0, 3
ldr x2, [sp, 32]
add x0, x2, x0
ldr x2, [x0]
ldr x0, [sp, 48]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L3:
ldr x0, [sp, 48]
mvn x1, x0
ldr x0, [sp, 24]
ldr x0, [x0, 8]
and x1, x1, x0
ldr x0, [sp, 24]
ldr x2, [x0, 8]
ldr x0, [sp, 48]
eor x0, x2, x0
mvn x2, x0
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x3, [sp, 48]
sub x0, x3, x0
and x0, x2, x0
orr x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
bne .L4
ldr x0, [sp, 56]
eor x1, x0, -2
ldr x0, [sp, 56]
orr x0, x0, 1
lsl x0, x0, 1
add x0, x1, x0
add x0, x0, 1
str x0, [sp, 56]
.L2:
ldr x0, [sp, 56]
mvn x1, x0
ldr x0, [sp, 24]
ldr x0, [x0]
and x1, x1, x0
ldr x0, [sp, 56]
mvn x2, x0
ldr x0, [sp, 24]
ldr x0, [x0]
orr x2, x2, x0
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x3, [sp, 56]
sub x0, x3, x0
and x0, x2, x0
orr x0, x1, x0
lsr x0, x0, 63
and w0, w0, 1
cmp w0, 0
bne .L5
ldr x0, [sp, 24]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x2
bl pgm_destroy_matrix
ldr x0, [sp, 24]
ldr x1, [sp, 32]
str x1, [x0, 16]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size pgm_vertical_symmetry, .-pgm_vertical_symmetry | %struct.TYPE_3__ = type { i64, i64, i8** }
define dso_local void @pgm_vertical_symmetry(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*, align 8
%3 = alloca i8**, align 8
%4 = alloca i64, align 8
%5 = alloca i64, align 8
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2, align 8
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 0
%8 = load i64, i64* %7, align 8
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 1
%11 = load i64, i64* %10, align 8
%12 = call i8** @pgm_create_matrix(i64 %8, i64 %11)
store i8** %12, i8*** %3, align 8
store i64 0, i64* %4, align 8
br label %13
13: ; preds = %51, %1
%14 = load i64, i64* %4, align 8
%15 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%16 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %15, i32 0, i32 0
%17 = load i64, i64* %16, align 8
%18 = icmp ult i64 %14, %17
br i1 %18, label %19, label %54
19: ; preds = %13
store i64 0, i64* %5, align 8
br label %20
20: ; preds = %47, %19
%21 = load i64, i64* %5, align 8
%22 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%23 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %22, i32 0, i32 1
%24 = load i64, i64* %23, align 8
%25 = icmp ult i64 %21, %24
br i1 %25, label %26, label %50
26: ; preds = %20
%27 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%28 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %27, i32 0, i32 2
%29 = load i8**, i8*** %28, align 8
%30 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%31 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %30, i32 0, i32 0
%32 = load i64, i64* %31, align 8
%33 = load i64, i64* %4, align 8
%34 = sub i64 %32, %33
%35 = sub i64 %34, 1
%36 = getelementptr inbounds i8*, i8** %29, i64 %35
%37 = load i8*, i8** %36, align 8
%38 = load i64, i64* %5, align 8
%39 = getelementptr inbounds i8, i8* %37, i64 %38
%40 = load i8, i8* %39, align 1
%41 = load i8**, i8*** %3, align 8
%42 = load i64, i64* %4, align 8
%43 = getelementptr inbounds i8*, i8** %41, i64 %42
%44 = load i8*, i8** %43, align 8
%45 = load i64, i64* %5, align 8
%46 = getelementptr inbounds i8, i8* %44, i64 %45
store i8 %40, i8* %46, align 1
br label %47
47: ; preds = %26
%48 = load i64, i64* %5, align 8
%49 = add i64 %48, 1
store i64 %49, i64* %5, align 8
br label %20
50: ; preds = %20
br label %51
51: ; preds = %50
%52 = load i64, i64* %4, align 8
%53 = add i64 %52, 1
store i64 %53, i64* %4, align 8
br label %13
54: ; preds = %13
%55 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%56 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %55, i32 0, i32 0
%57 = load i64, i64* %56, align 8
%58 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%59 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %58, i32 0, i32 2
%60 = load i8**, i8*** %59, align 8
%61 = call i32 @pgm_destroy_matrix(i64 %57, i8** %60)
%62 = load i8**, i8*** %3, align 8
%63 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2, align 8
%64 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %63, i32 0, i32 2
store i8** %62, i8*** %64, align 8
ret void
}
declare dso_local i8** @pgm_create_matrix(i64, i64)
declare dso_local i32 @pgm_destroy_matrix(i64, i8**) | /* BEGIN FUNCTION-DEF pgm_vertical_symmetry LOC=UNKNOWN VKEY=4895 */
void pgm_vertical_symmetry(pgm_image *pgm )
{
unsigned char **matrix ;
unsigned char **tmp ;
size_t___0 x ;
size_t___0 y ;
{
{
#line 48 "/tmp/forklift_obfu_g3mnl780/input.c"
tmp = pgm_create_matrix(pgm->width, pgm->height);
#line 48
matrix = tmp;
#line 50
x = (size_t___0 )0;
}
#line 50
while ((int )((((~ x & pgm->width) | ((~ x | pgm->width) & (x - pgm->width))) >> 63UL) & 1UL)) {
#line 51
y = (size_t___0 )0;
#line 51
while ((int )((((~ y & pgm->height) | (~ (y ^ pgm->height) & (y - pgm->height))) >> 63UL) & 1UL)) {
{
#line 52
*(*(matrix + x) + y) = *(*(pgm->matrix + ((pgm->width - x) - 1UL)) + y);
#line 51
y = (y - ~ 1UL) - 1UL;
}
}
#line 50
x = ((x ^ ~ 1UL) + ((x | 1UL) + (x | 1UL))) + 1UL;
}
{
#line 54
pgm_destroy_matrix(pgm->width, pgm->matrix);
#line 55
pgm->matrix = matrix;
}
#line 56
return;
}
}
/* END FUNCTION-DEF pgm_vertical_symmetry LOC=UNKNOWN VKEY=4895 */ | 1,603,828,849 | train_synth_compilable |
blit | static inline void blit(fz_pixmap *pix, int x, int y,
unsigned char *list, int skipx, int len,
unsigned char *argb, int over)
{
unsigned char *dst;
unsigned char cov;
dst = pix->samples + ( (y - pix->y) * pix->w + (x - pix->x) ) * pix->n;
cov = 0;
while (skipx--)
{
cov += *list;
*list = 0;
++list;
}
if (argb)
fz_path_w4i1o4(argb, list, cov, len, dst);
else if (over)
fz_path_1o1(list, cov, len, dst);
else
fz_path_1c1(list, cov, len, dst);
} | Flatten | .global blit
.type blit, %function
blit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str x3, [sp, 40]
str w4, [sp, 36]
str w5, [sp, 32]
str x6, [sp, 24]
str w7, [sp, 20]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
ldr w2, [sp, 48]
sub w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 12]
mul w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w3, [sp, 52]
sub w0, w3, w0
add w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 20]
mul w0, w2, w0
sxtw x0, w0
add x0, x1, x0
str x0, [sp, 72]
strb wzr, [sp, 71]
b .L2
.L3:
ldr x0, [sp, 40]
ldrb w0, [x0]
ldrb w1, [sp, 71]
add w0, w0, w1
strb w0, [sp, 71]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr w0, [sp, 36]
sub w1, w0, #1
str w1, [sp, 36]
cmp w0, 0
bne .L3
ldr x0, [sp, 24]
cmp x0, 0
beq .L4
ldr x4, [sp, 72]
ldr w3, [sp, 32]
ldrb w2, [sp, 71]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl fz_path_w4i1o4
b .L7
.L4:
ldr w0, [sp, 20]
cmp w0, 0
beq .L6
ldr x3, [sp, 72]
ldr w2, [sp, 32]
ldrb w1, [sp, 71]
ldr x0, [sp, 40]
bl fz_path_1o1
b .L7
.L6:
ldr x3, [sp, 72]
ldr w2, [sp, 32]
ldrb w1, [sp, 71]
ldr x0, [sp, 40]
bl fz_path_1c1
.L7:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global blit
.type blit, %function
blit:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str x3, [sp, 40]
str w4, [sp, 36]
str w5, [sp, 32]
str x6, [sp, 24]
str w7, [sp, 20]
mov x0, 13
str x0, [sp, 72]
.L22:
ldr x0, [sp, 72]
cmp x0, 14
beq .L2
ldr x0, [sp, 72]
cmp x0, 14
bhi .L23
ldr x0, [sp, 72]
cmp x0, 13
beq .L4
ldr x0, [sp, 72]
cmp x0, 13
bhi .L23
ldr x0, [sp, 72]
cmp x0, 12
beq .L5
ldr x0, [sp, 72]
cmp x0, 12
bhi .L23
ldr x0, [sp, 72]
cmp x0, 11
beq .L6
ldr x0, [sp, 72]
cmp x0, 11
bhi .L23
ldr x0, [sp, 72]
cmp x0, 7
beq .L7
ldr x0, [sp, 72]
cmp x0, 7
bhi .L23
ldr x0, [sp, 72]
cmp x0, 6
beq .L8
ldr x0, [sp, 72]
cmp x0, 6
bhi .L23
ldr x0, [sp, 72]
cmp x0, 5
beq .L9
ldr x0, [sp, 72]
cmp x0, 5
bhi .L23
ldr x0, [sp, 72]
cmp x0, 3
beq .L10
ldr x0, [sp, 72]
cmp x0, 3
bhi .L23
ldr x0, [sp, 72]
cmp x0, 2
beq .L11
ldr x0, [sp, 72]
cmp x0, 2
bhi .L23
ldr x0, [sp, 72]
cmp x0, 0
beq .L24
ldr x0, [sp, 72]
cmp x0, 1
beq .L13
b .L23
.L2:
ldr x0, [sp, 40]
ldrb w0, [x0]
ldrb w1, [sp, 87]
add w0, w0, w1
strb w0, [sp, 87]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
mov x0, 12
str x0, [sp, 72]
b .L14
.L5:
ldr w0, [sp, 36]
str w0, [sp, 80]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
mov x0, 3
str x0, [sp, 72]
b .L14
.L13:
ldr x4, [sp, 88]
ldr w3, [sp, 32]
ldrb w2, [sp, 87]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl fz_path_w4i1o4
str xzr, [sp, 72]
b .L14
.L10:
ldr w0, [sp, 80]
cmp w0, 0
beq .L15
mov x0, 14
str x0, [sp, 72]
b .L14
.L15:
mov x0, 7
str x0, [sp, 72]
b .L14
.L6:
ldr w0, [sp, 20]
cmp w0, 0
beq .L17
mov x0, 6
str x0, [sp, 72]
b .L14
.L17:
mov x0, 5
str x0, [sp, 72]
b .L14
.L4:
mov x0, 2
str x0, [sp, 72]
b .L14
.L8:
ldr x3, [sp, 88]
ldr w2, [sp, 32]
ldrb w1, [sp, 87]
ldr x0, [sp, 40]
bl fz_path_1o1
str xzr, [sp, 72]
b .L14
.L9:
ldr x3, [sp, 88]
ldr w2, [sp, 32]
ldrb w1, [sp, 87]
ldr x0, [sp, 40]
bl fz_path_1c1
str xzr, [sp, 72]
b .L14
.L7:
ldr x0, [sp, 24]
cmp x0, 0
beq .L20
mov x0, 1
str x0, [sp, 72]
b .L14
.L20:
mov x0, 11
str x0, [sp, 72]
b .L14
.L11:
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
ldr w2, [sp, 48]
sub w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 12]
mul w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w3, [sp, 52]
sub w0, w3, w0
add w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 20]
mul w0, w2, w0
sxtw x0, w0
add x0, x1, x0
str x0, [sp, 88]
strb wzr, [sp, 87]
mov x0, 12
str x0, [sp, 72]
b .L14
.L23:
nop
.L14:
b .L22
.L24:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size blit, .-blit | %struct.TYPE_3__ = type { i8*, i32, i32, i32, i32 }
define dso_local void @blit(%struct.TYPE_3__* %0, i32 %1, i32 %2, i8* %3, i32 %4, i32 %5, i8* %6, i32 %7) {
%9 = alloca %struct.TYPE_3__*, align 8
%10 = alloca i32, align 4
%11 = alloca i32, align 4
%12 = alloca i8*, align 8
%13 = alloca i32, align 4
%14 = alloca i32, align 4
%15 = alloca i8*, align 8
%16 = alloca i32, align 4
%17 = alloca i8*, align 8
%18 = alloca i8, align 1
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %9, align 8
store i32 %1, i32* %10, align 4
store i32 %2, i32* %11, align 4
store i8* %3, i8** %12, align 8
store i32 %4, i32* %13, align 4
store i32 %5, i32* %14, align 4
store i8* %6, i8** %15, align 8
store i32 %7, i32* %16, align 4
%19 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%20 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %19, i32 0, i32 0
%21 = load i8*, i8** %20, align 8
%22 = load i32, i32* %11, align 4
%23 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%24 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %23, i32 0, i32 1
%25 = load i32, i32* %24, align 8
%26 = sub nsw i32 %22, %25
%27 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%28 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %27, i32 0, i32 2
%29 = load i32, i32* %28, align 4
%30 = mul nsw i32 %26, %29
%31 = load i32, i32* %10, align 4
%32 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%33 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %32, i32 0, i32 3
%34 = load i32, i32* %33, align 8
%35 = sub nsw i32 %31, %34
%36 = add nsw i32 %30, %35
%37 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%38 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %37, i32 0, i32 4
%39 = load i32, i32* %38, align 4
%40 = mul nsw i32 %36, %39
%41 = sext i32 %40 to i64
%42 = getelementptr inbounds i8, i8* %21, i64 %41
store i8* %42, i8** %17, align 8
store i8 0, i8* %18, align 1
br label %43
43: ; preds = %47, %8
%44 = load i32, i32* %13, align 4
%45 = add nsw i32 %44, -1
store i32 %45, i32* %13, align 4
%46 = icmp ne i32 %44, 0
br i1 %46, label %47, label %58
47: ; preds = %43
%48 = load i8*, i8** %12, align 8
%49 = load i8, i8* %48, align 1
%50 = zext i8 %49 to i32
%51 = load i8, i8* %18, align 1
%52 = zext i8 %51 to i32
%53 = add nsw i32 %52, %50
%54 = trunc i32 %53 to i8
store i8 %54, i8* %18, align 1
%55 = load i8*, i8** %12, align 8
store i8 0, i8* %55, align 1
%56 = load i8*, i8** %12, align 8
%57 = getelementptr inbounds i8, i8* %56, i32 1
store i8* %57, i8** %12, align 8
br label %43
58: ; preds = %43
%59 = load i8*, i8** %15, align 8
%60 = icmp ne i8* %59, null
br i1 %60, label %61, label %68
61: ; preds = %58
%62 = load i8*, i8** %15, align 8
%63 = load i8*, i8** %12, align 8
%64 = load i8, i8* %18, align 1
%65 = load i32, i32* %14, align 4
%66 = load i8*, i8** %17, align 8
%67 = call i32 @fz_path_w4i1o4(i8* %62, i8* %63, i8 zeroext %64, i32 %65, i8* %66)
br label %84
68: ; preds = %58
%69 = load i32, i32* %16, align 4
%70 = icmp ne i32 %69, 0
br i1 %70, label %71, label %77
71: ; preds = %68
%72 = load i8*, i8** %12, align 8
%73 = load i8, i8* %18, align 1
%74 = load i32, i32* %14, align 4
%75 = load i8*, i8** %17, align 8
%76 = call i32 @fz_path_1o1(i8* %72, i8 zeroext %73, i32 %74, i8* %75)
br label %83
77: ; preds = %68
%78 = load i8*, i8** %12, align 8
%79 = load i8, i8* %18, align 1
%80 = load i32, i32* %14, align 4
%81 = load i8*, i8** %17, align 8
%82 = call i32 @fz_path_1c1(i8* %78, i8 zeroext %79, i32 %80, i8* %81)
br label %83
83: ; preds = %77, %71
br label %84
84: ; preds = %83, %61
ret void
}
declare dso_local i32 @fz_path_w4i1o4(i8*, i8*, i8 zeroext, i32, i8*)
declare dso_local i32 @fz_path_1o1(i8*, i8 zeroext, i32, i8*)
declare dso_local i32 @fz_path_1c1(i8*, i8 zeroext, i32, i8*) | /* BEGIN FUNCTION-DEF blit LOC=UNKNOWN VKEY=4934 */
void blit(fz_pixmap *pix , int x , int y , unsigned char *list , int skipx , int len ,
unsigned char *argb , int over )
{
unsigned char *dst ;
unsigned char cov ;
int tmp ;
unsigned long _TIG_FN_6TTB_1_blit_next ;
{
{
_TIG_FN_6TTB_1_blit_next = 13UL;
}
while (1) {
switch (_TIG_FN_6TTB_1_blit_next) {
case 14UL:
#line 59 "/tmp/forklift_obfu__cae9tjy/input.c"
cov = (unsigned char )((int )cov + (int )*list);
#line 60
*list = (unsigned char)0;
#line 61
list ++;
{
_TIG_FN_6TTB_1_blit_next = 12UL;
}
break;
case 12UL:
#line 57
tmp = skipx;
#line 57
skipx --;
{
_TIG_FN_6TTB_1_blit_next = 3UL;
}
break;
case 1UL:
#line 65
fz_path_w4i1o4(argb, list, cov, len, dst);
{
_TIG_FN_6TTB_1_blit_next = 0UL;
}
break;
case 3UL: ;
if (tmp) {
{
_TIG_FN_6TTB_1_blit_next = 14UL;
}
} else {
{
_TIG_FN_6TTB_1_blit_next = 7UL;
}
}
break;
case 11UL: ;
if (over) {
{
_TIG_FN_6TTB_1_blit_next = 6UL;
}
} else {
{
_TIG_FN_6TTB_1_blit_next = 5UL;
}
}
break;
case 13UL: ;
{
_TIG_FN_6TTB_1_blit_next = 2UL;
}
break;
case 6UL:
#line 67
fz_path_1o1(list, cov, len, dst);
{
_TIG_FN_6TTB_1_blit_next = 0UL;
}
break;
case 5UL:
#line 69
fz_path_1c1(list, cov, len, dst);
{
_TIG_FN_6TTB_1_blit_next = 0UL;
}
break;
case 0UL: ;
return;
break;
case 7UL: ;
if (argb) {
{
_TIG_FN_6TTB_1_blit_next = 1UL;
}
} else {
{
_TIG_FN_6TTB_1_blit_next = 11UL;
}
}
break;
case 2UL:
#line 54
dst = pix->samples + ((y - pix->y) * pix->w + (x - pix->x)) * pix->n;
#line 55
cov = (unsigned char)0;
{
_TIG_FN_6TTB_1_blit_next = 12UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF blit LOC=UNKNOWN VKEY=4934 */ | 1,939,118,223 | train_synth_compilable |
blit | static inline void blit(fz_pixmap *pix, int x, int y,
unsigned char *list, int skipx, int len,
unsigned char *argb, int over)
{
unsigned char *dst;
unsigned char cov;
dst = pix->samples + ( (y - pix->y) * pix->w + (x - pix->x) ) * pix->n;
cov = 0;
while (skipx--)
{
cov += *list;
*list = 0;
++list;
}
if (argb)
fz_path_w4i1o4(argb, list, cov, len, dst);
else if (over)
fz_path_1o1(list, cov, len, dst);
else
fz_path_1c1(list, cov, len, dst);
} | EncodeArithmetic | .global blit
.type blit, %function
blit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str x3, [sp, 40]
str w4, [sp, 36]
str w5, [sp, 32]
str x6, [sp, 24]
str w7, [sp, 20]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
ldr w2, [sp, 48]
sub w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 12]
mul w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w3, [sp, 52]
sub w0, w3, w0
add w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 20]
mul w0, w2, w0
sxtw x0, w0
add x0, x1, x0
str x0, [sp, 72]
strb wzr, [sp, 71]
b .L2
.L3:
ldr x0, [sp, 40]
ldrb w0, [x0]
ldrb w1, [sp, 71]
add w0, w0, w1
strb w0, [sp, 71]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr w0, [sp, 36]
sub w1, w0, #1
str w1, [sp, 36]
cmp w0, 0
bne .L3
ldr x0, [sp, 24]
cmp x0, 0
beq .L4
ldr x4, [sp, 72]
ldr w3, [sp, 32]
ldrb w2, [sp, 71]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl fz_path_w4i1o4
b .L7
.L4:
ldr w0, [sp, 20]
cmp w0, 0
beq .L6
ldr x3, [sp, 72]
ldr w2, [sp, 32]
ldrb w1, [sp, 71]
ldr x0, [sp, 40]
bl fz_path_1o1
b .L7
.L6:
ldr x3, [sp, 72]
ldr w2, [sp, 32]
ldrb w1, [sp, 71]
ldr x0, [sp, 40]
bl fz_path_1c1
.L7:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global blit
.type blit, %function
blit:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str x3, [sp, 40]
str w4, [sp, 36]
str w5, [sp, 32]
str x6, [sp, 24]
str w7, [sp, 20]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
ldr w2, [sp, 48]
sub w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 12]
mul w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w3, [sp, 52]
sub w0, w3, w0
add w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 20]
mul w0, w2, w0
sxtw x0, w0
add x0, x1, x0
str x0, [sp, 80]
strb wzr, [sp, 95]
.L4:
ldr w0, [sp, 36]
str w0, [sp, 76]
ldr w0, [sp, 36]
eor w1, w0, 1
ldr w0, [sp, 36]
mvn w0, w0
lsl w0, w0, 1
and w0, w0, 2
sub w0, w1, w0
str w0, [sp, 36]
ldr w0, [sp, 76]
cmp w0, 0
beq .L10
ldr x0, [sp, 40]
ldrb w0, [x0]
ldrb w1, [sp, 95]
add w0, w0, w1
strb w0, [sp, 95]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
b .L4
.L10:
nop
ldr x0, [sp, 24]
cmp x0, 0
beq .L5
ldr x4, [sp, 80]
ldr w3, [sp, 32]
ldrb w2, [sp, 95]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl fz_path_w4i1o4
b .L1
.L5:
ldr w0, [sp, 20]
cmp w0, 0
beq .L7
ldr x3, [sp, 80]
ldr w2, [sp, 32]
ldrb w1, [sp, 95]
ldr x0, [sp, 40]
bl fz_path_1o1
b .L1
.L7:
ldr x3, [sp, 80]
ldr w2, [sp, 32]
ldrb w1, [sp, 95]
ldr x0, [sp, 40]
bl fz_path_1c1
nop
.L1:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size blit, .-blit | %struct.TYPE_3__ = type { i8*, i32, i32, i32, i32 }
define dso_local void @blit(%struct.TYPE_3__* %0, i32 %1, i32 %2, i8* %3, i32 %4, i32 %5, i8* %6, i32 %7) {
%9 = alloca %struct.TYPE_3__*, align 8
%10 = alloca i32, align 4
%11 = alloca i32, align 4
%12 = alloca i8*, align 8
%13 = alloca i32, align 4
%14 = alloca i32, align 4
%15 = alloca i8*, align 8
%16 = alloca i32, align 4
%17 = alloca i8*, align 8
%18 = alloca i8, align 1
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %9, align 8
store i32 %1, i32* %10, align 4
store i32 %2, i32* %11, align 4
store i8* %3, i8** %12, align 8
store i32 %4, i32* %13, align 4
store i32 %5, i32* %14, align 4
store i8* %6, i8** %15, align 8
store i32 %7, i32* %16, align 4
%19 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%20 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %19, i32 0, i32 0
%21 = load i8*, i8** %20, align 8
%22 = load i32, i32* %11, align 4
%23 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%24 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %23, i32 0, i32 1
%25 = load i32, i32* %24, align 8
%26 = sub nsw i32 %22, %25
%27 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%28 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %27, i32 0, i32 2
%29 = load i32, i32* %28, align 4
%30 = mul nsw i32 %26, %29
%31 = load i32, i32* %10, align 4
%32 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%33 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %32, i32 0, i32 3
%34 = load i32, i32* %33, align 8
%35 = sub nsw i32 %31, %34
%36 = add nsw i32 %30, %35
%37 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%38 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %37, i32 0, i32 4
%39 = load i32, i32* %38, align 4
%40 = mul nsw i32 %36, %39
%41 = sext i32 %40 to i64
%42 = getelementptr inbounds i8, i8* %21, i64 %41
store i8* %42, i8** %17, align 8
store i8 0, i8* %18, align 1
br label %43
43: ; preds = %47, %8
%44 = load i32, i32* %13, align 4
%45 = add nsw i32 %44, -1
store i32 %45, i32* %13, align 4
%46 = icmp ne i32 %44, 0
br i1 %46, label %47, label %58
47: ; preds = %43
%48 = load i8*, i8** %12, align 8
%49 = load i8, i8* %48, align 1
%50 = zext i8 %49 to i32
%51 = load i8, i8* %18, align 1
%52 = zext i8 %51 to i32
%53 = add nsw i32 %52, %50
%54 = trunc i32 %53 to i8
store i8 %54, i8* %18, align 1
%55 = load i8*, i8** %12, align 8
store i8 0, i8* %55, align 1
%56 = load i8*, i8** %12, align 8
%57 = getelementptr inbounds i8, i8* %56, i32 1
store i8* %57, i8** %12, align 8
br label %43
58: ; preds = %43
%59 = load i8*, i8** %15, align 8
%60 = icmp ne i8* %59, null
br i1 %60, label %61, label %68
61: ; preds = %58
%62 = load i8*, i8** %15, align 8
%63 = load i8*, i8** %12, align 8
%64 = load i8, i8* %18, align 1
%65 = load i32, i32* %14, align 4
%66 = load i8*, i8** %17, align 8
%67 = call i32 @fz_path_w4i1o4(i8* %62, i8* %63, i8 zeroext %64, i32 %65, i8* %66)
br label %84
68: ; preds = %58
%69 = load i32, i32* %16, align 4
%70 = icmp ne i32 %69, 0
br i1 %70, label %71, label %77
71: ; preds = %68
%72 = load i8*, i8** %12, align 8
%73 = load i8, i8* %18, align 1
%74 = load i32, i32* %14, align 4
%75 = load i8*, i8** %17, align 8
%76 = call i32 @fz_path_1o1(i8* %72, i8 zeroext %73, i32 %74, i8* %75)
br label %83
77: ; preds = %68
%78 = load i8*, i8** %12, align 8
%79 = load i8, i8* %18, align 1
%80 = load i32, i32* %14, align 4
%81 = load i8*, i8** %17, align 8
%82 = call i32 @fz_path_1c1(i8* %78, i8 zeroext %79, i32 %80, i8* %81)
br label %83
83: ; preds = %77, %71
br label %84
84: ; preds = %83, %61
ret void
}
declare dso_local i32 @fz_path_w4i1o4(i8*, i8*, i8 zeroext, i32, i8*)
declare dso_local i32 @fz_path_1o1(i8*, i8 zeroext, i32, i8*)
declare dso_local i32 @fz_path_1c1(i8*, i8 zeroext, i32, i8*) | /* BEGIN FUNCTION-DEF blit LOC=UNKNOWN VKEY=4934 */
void blit(fz_pixmap *pix , int x , int y , unsigned char *list , int skipx , int len ,
unsigned char *argb , int over )
{
unsigned char *dst ;
unsigned char cov ;
int tmp ;
{
{
#line 54 "/tmp/forklift_obfu_lvulev2y/input.c"
dst = pix->samples + ((y - pix->y) * pix->w + (x - pix->x)) * pix->n;
#line 55
cov = (unsigned char)0;
}
#line 57
while (1) {
{
#line 57
tmp = skipx;
#line 57
skipx = (skipx ^ 1) - ((~ skipx & 1) << 1);
}
#line 57
if (! tmp) {
#line 57
break;
}
{
#line 59
cov = (unsigned char )((int )cov + (int )*list);
#line 60
*list = (unsigned char)0;
#line 61
list ++;
}
}
#line 64
if (argb) {
#line 65
fz_path_w4i1o4(argb, list, cov, len, dst);
} else
#line 66
if (over) {
#line 67
fz_path_1o1(list, cov, len, dst);
} else {
#line 69
fz_path_1c1(list, cov, len, dst);
}
#line 70
return;
}
}
/* END FUNCTION-DEF blit LOC=UNKNOWN VKEY=4934 */ | 519,709,079 | train_synth_compilable |
blit | static inline void blit(fz_pixmap *pix, int x, int y,
unsigned char *list, int skipx, int len,
unsigned char *argb, int over)
{
unsigned char *dst;
unsigned char cov;
dst = pix->samples + ( (y - pix->y) * pix->w + (x - pix->x) ) * pix->n;
cov = 0;
while (skipx--)
{
cov += *list;
*list = 0;
++list;
}
if (argb)
fz_path_w4i1o4(argb, list, cov, len, dst);
else if (over)
fz_path_1o1(list, cov, len, dst);
else
fz_path_1c1(list, cov, len, dst);
} | Flatten+EncodeArithmetic | .global blit
.type blit, %function
blit:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str x3, [sp, 40]
str w4, [sp, 36]
str w5, [sp, 32]
str x6, [sp, 24]
str w7, [sp, 20]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
ldr w2, [sp, 48]
sub w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 12]
mul w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w3, [sp, 52]
sub w0, w3, w0
add w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 20]
mul w0, w2, w0
sxtw x0, w0
add x0, x1, x0
str x0, [sp, 72]
strb wzr, [sp, 71]
b .L2
.L3:
ldr x0, [sp, 40]
ldrb w0, [x0]
ldrb w1, [sp, 71]
add w0, w0, w1
strb w0, [sp, 71]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr w0, [sp, 36]
sub w1, w0, #1
str w1, [sp, 36]
cmp w0, 0
bne .L3
ldr x0, [sp, 24]
cmp x0, 0
beq .L4
ldr x4, [sp, 72]
ldr w3, [sp, 32]
ldrb w2, [sp, 71]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl fz_path_w4i1o4
b .L7
.L4:
ldr w0, [sp, 20]
cmp w0, 0
beq .L6
ldr x3, [sp, 72]
ldr w2, [sp, 32]
ldrb w1, [sp, 71]
ldr x0, [sp, 40]
bl fz_path_1o1
b .L7
.L6:
ldr x3, [sp, 72]
ldr w2, [sp, 32]
ldrb w1, [sp, 71]
ldr x0, [sp, 40]
bl fz_path_1c1
.L7:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global blit
.type blit, %function
blit:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str x3, [sp, 40]
str w4, [sp, 36]
str w5, [sp, 32]
str x6, [sp, 24]
str w7, [sp, 20]
mov x0, 13
str x0, [sp, 72]
.L28:
ldr x0, [sp, 72]
cmp x0, 14
beq .L8
ldr x0, [sp, 72]
cmp x0, 14
bhi .L29
ldr x0, [sp, 72]
cmp x0, 13
beq .L10
ldr x0, [sp, 72]
cmp x0, 13
bhi .L29
ldr x0, [sp, 72]
cmp x0, 12
beq .L11
ldr x0, [sp, 72]
cmp x0, 12
bhi .L29
ldr x0, [sp, 72]
cmp x0, 11
beq .L12
ldr x0, [sp, 72]
cmp x0, 11
bhi .L29
ldr x0, [sp, 72]
cmp x0, 7
beq .L13
ldr x0, [sp, 72]
cmp x0, 7
bhi .L29
ldr x0, [sp, 72]
cmp x0, 6
beq .L14
ldr x0, [sp, 72]
cmp x0, 6
bhi .L29
ldr x0, [sp, 72]
cmp x0, 5
beq .L15
ldr x0, [sp, 72]
cmp x0, 5
bhi .L29
ldr x0, [sp, 72]
cmp x0, 3
beq .L16
ldr x0, [sp, 72]
cmp x0, 3
bhi .L29
ldr x0, [sp, 72]
cmp x0, 2
beq .L17
ldr x0, [sp, 72]
cmp x0, 2
bhi .L29
ldr x0, [sp, 72]
cmp x0, 0
beq .L30
ldr x0, [sp, 72]
cmp x0, 1
beq .L19
b .L29
.L8:
ldr x0, [sp, 40]
ldrb w0, [x0]
ldrb w1, [sp, 87]
add w0, w0, w1
strb w0, [sp, 87]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
mov x0, 12
str x0, [sp, 72]
b .L20
.L11:
ldr w0, [sp, 36]
str w0, [sp, 80]
ldr w0, [sp, 36]
eor w1, w0, 1
ldr w0, [sp, 36]
mvn w0, w0
and w0, w0, 1
lsl w0, w0, 1
sub w0, w1, w0
str w0, [sp, 36]
mov x0, 3
str x0, [sp, 72]
b .L20
.L19:
ldr x4, [sp, 88]
ldr w3, [sp, 32]
ldrb w2, [sp, 87]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl fz_path_w4i1o4
str xzr, [sp, 72]
b .L20
.L16:
ldr w0, [sp, 80]
cmp w0, 0
beq .L21
mov x0, 14
str x0, [sp, 72]
b .L20
.L21:
mov x0, 7
str x0, [sp, 72]
b .L20
.L12:
ldr w0, [sp, 20]
cmp w0, 0
beq .L23
mov x0, 6
str x0, [sp, 72]
b .L20
.L23:
mov x0, 5
str x0, [sp, 72]
b .L20
.L10:
mov x0, 2
str x0, [sp, 72]
b .L20
.L14:
ldr x3, [sp, 88]
ldr w2, [sp, 32]
ldrb w1, [sp, 87]
ldr x0, [sp, 40]
bl fz_path_1o1
str xzr, [sp, 72]
b .L20
.L15:
ldr x3, [sp, 88]
ldr w2, [sp, 32]
ldrb w1, [sp, 87]
ldr x0, [sp, 40]
bl fz_path_1c1
str xzr, [sp, 72]
b .L20
.L13:
ldr x0, [sp, 24]
cmp x0, 0
beq .L26
mov x0, 1
str x0, [sp, 72]
b .L20
.L26:
mov x0, 11
str x0, [sp, 72]
b .L20
.L17:
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
ldr w2, [sp, 48]
sub w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 12]
mul w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w3, [sp, 52]
sub w0, w3, w0
add w2, w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 20]
mul w0, w2, w0
sxtw x0, w0
add x0, x1, x0
str x0, [sp, 88]
strb wzr, [sp, 87]
mov x0, 12
str x0, [sp, 72]
b .L20
.L29:
nop
.L20:
b .L28
.L30:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size blit, .-blit | %struct.TYPE_3__ = type { i8*, i32, i32, i32, i32 }
define dso_local void @blit(%struct.TYPE_3__* %0, i32 %1, i32 %2, i8* %3, i32 %4, i32 %5, i8* %6, i32 %7) {
%9 = alloca %struct.TYPE_3__*, align 8
%10 = alloca i32, align 4
%11 = alloca i32, align 4
%12 = alloca i8*, align 8
%13 = alloca i32, align 4
%14 = alloca i32, align 4
%15 = alloca i8*, align 8
%16 = alloca i32, align 4
%17 = alloca i8*, align 8
%18 = alloca i8, align 1
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %9, align 8
store i32 %1, i32* %10, align 4
store i32 %2, i32* %11, align 4
store i8* %3, i8** %12, align 8
store i32 %4, i32* %13, align 4
store i32 %5, i32* %14, align 4
store i8* %6, i8** %15, align 8
store i32 %7, i32* %16, align 4
%19 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%20 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %19, i32 0, i32 0
%21 = load i8*, i8** %20, align 8
%22 = load i32, i32* %11, align 4
%23 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%24 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %23, i32 0, i32 1
%25 = load i32, i32* %24, align 8
%26 = sub nsw i32 %22, %25
%27 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%28 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %27, i32 0, i32 2
%29 = load i32, i32* %28, align 4
%30 = mul nsw i32 %26, %29
%31 = load i32, i32* %10, align 4
%32 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%33 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %32, i32 0, i32 3
%34 = load i32, i32* %33, align 8
%35 = sub nsw i32 %31, %34
%36 = add nsw i32 %30, %35
%37 = load %struct.TYPE_3__*, %struct.TYPE_3__** %9, align 8
%38 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %37, i32 0, i32 4
%39 = load i32, i32* %38, align 4
%40 = mul nsw i32 %36, %39
%41 = sext i32 %40 to i64
%42 = getelementptr inbounds i8, i8* %21, i64 %41
store i8* %42, i8** %17, align 8
store i8 0, i8* %18, align 1
br label %43
43: ; preds = %47, %8
%44 = load i32, i32* %13, align 4
%45 = add nsw i32 %44, -1
store i32 %45, i32* %13, align 4
%46 = icmp ne i32 %44, 0
br i1 %46, label %47, label %58
47: ; preds = %43
%48 = load i8*, i8** %12, align 8
%49 = load i8, i8* %48, align 1
%50 = zext i8 %49 to i32
%51 = load i8, i8* %18, align 1
%52 = zext i8 %51 to i32
%53 = add nsw i32 %52, %50
%54 = trunc i32 %53 to i8
store i8 %54, i8* %18, align 1
%55 = load i8*, i8** %12, align 8
store i8 0, i8* %55, align 1
%56 = load i8*, i8** %12, align 8
%57 = getelementptr inbounds i8, i8* %56, i32 1
store i8* %57, i8** %12, align 8
br label %43
58: ; preds = %43
%59 = load i8*, i8** %15, align 8
%60 = icmp ne i8* %59, null
br i1 %60, label %61, label %68
61: ; preds = %58
%62 = load i8*, i8** %15, align 8
%63 = load i8*, i8** %12, align 8
%64 = load i8, i8* %18, align 1
%65 = load i32, i32* %14, align 4
%66 = load i8*, i8** %17, align 8
%67 = call i32 @fz_path_w4i1o4(i8* %62, i8* %63, i8 zeroext %64, i32 %65, i8* %66)
br label %84
68: ; preds = %58
%69 = load i32, i32* %16, align 4
%70 = icmp ne i32 %69, 0
br i1 %70, label %71, label %77
71: ; preds = %68
%72 = load i8*, i8** %12, align 8
%73 = load i8, i8* %18, align 1
%74 = load i32, i32* %14, align 4
%75 = load i8*, i8** %17, align 8
%76 = call i32 @fz_path_1o1(i8* %72, i8 zeroext %73, i32 %74, i8* %75)
br label %83
77: ; preds = %68
%78 = load i8*, i8** %12, align 8
%79 = load i8, i8* %18, align 1
%80 = load i32, i32* %14, align 4
%81 = load i8*, i8** %17, align 8
%82 = call i32 @fz_path_1c1(i8* %78, i8 zeroext %79, i32 %80, i8* %81)
br label %83
83: ; preds = %77, %71
br label %84
84: ; preds = %83, %61
ret void
}
declare dso_local i32 @fz_path_w4i1o4(i8*, i8*, i8 zeroext, i32, i8*)
declare dso_local i32 @fz_path_1o1(i8*, i8 zeroext, i32, i8*)
declare dso_local i32 @fz_path_1c1(i8*, i8 zeroext, i32, i8*) | /* BEGIN FUNCTION-DEF blit LOC=UNKNOWN VKEY=4948 */
void blit(fz_pixmap *pix , int x , int y , unsigned char *list , int skipx , int len ,
unsigned char *argb , int over )
{
unsigned char *dst ;
unsigned char cov ;
int tmp ;
unsigned long _TIG_FN_IW0D_1_blit_next ;
{
_TIG_FN_IW0D_1_blit_next = 13UL;
while (1) {
switch (_TIG_FN_IW0D_1_blit_next) {
case 14UL:
{
#line 59 "/tmp/forklift_obfu_ryz8tyhx/input.c"
cov = (unsigned char )((int )cov + (int )*list);
#line 60
*list = (unsigned char)0;
#line 61
list ++;
}
_TIG_FN_IW0D_1_blit_next = 12UL;
break;
case 12UL:
{
#line 57
tmp = skipx;
#line 57
skipx = (skipx ^ 1) - ((~ skipx & 1) + (~ skipx & 1));
}
_TIG_FN_IW0D_1_blit_next = 3UL;
break;
case 1UL:
#line 65
fz_path_w4i1o4(argb, list, cov, len, dst);
_TIG_FN_IW0D_1_blit_next = 0UL;
break;
case 3UL: ;
if (tmp) {
_TIG_FN_IW0D_1_blit_next = 14UL;
} else {
_TIG_FN_IW0D_1_blit_next = 7UL;
}
break;
case 11UL: ;
if (over) {
_TIG_FN_IW0D_1_blit_next = 6UL;
} else {
_TIG_FN_IW0D_1_blit_next = 5UL;
}
break;
case 13UL: ;
_TIG_FN_IW0D_1_blit_next = 2UL;
break;
case 6UL:
#line 67
fz_path_1o1(list, cov, len, dst);
_TIG_FN_IW0D_1_blit_next = 0UL;
break;
case 5UL:
#line 69
fz_path_1c1(list, cov, len, dst);
_TIG_FN_IW0D_1_blit_next = 0UL;
break;
case 0UL: ;
return;
break;
case 7UL: ;
if (argb) {
_TIG_FN_IW0D_1_blit_next = 1UL;
} else {
_TIG_FN_IW0D_1_blit_next = 11UL;
}
break;
case 2UL:
{
#line 54
dst = pix->samples + ((y - pix->y) * pix->w + (x - pix->x)) * pix->n;
#line 55
cov = (unsigned char)0;
}
_TIG_FN_IW0D_1_blit_next = 12UL;
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF blit LOC=UNKNOWN VKEY=4948 */ | 1,064,746,525 | train_synth_compilable |
CG_PoisonCloud_f | static void CG_PoisonCloud_f( void )
{
cg.poisonedTime = cg.time;
if( CG_IsParticleSystemValid( &cg.poisonCloudPS ) )
{
cg.poisonCloudPS = CG_SpawnNewParticleSystem( cgs.media.poisonCloudPS );
CG_SetAttachmentCent( &cg.poisonCloudPS->attachment, &cg.predictedPlayerEntity );
CG_AttachToCent( &cg.poisonCloudPS->attachment );
}
} | EncodeArithmetic | .global CG_PoisonCloud_f
.type CG_PoisonCloud_f, %function
CG_PoisonCloud_f:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr w1, [x0, 12]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
str w1, [x0, 16]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
bl CG_IsParticleSystemValid
cmp x0, 0
beq .L3
adrp x0, :got:cgs
ldr x0, [x0, #:got_lo12:cgs]
ldr w0, [x0]
bl CG_SpawnNewParticleSystem
mov x1, x0
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
str x1, [x0]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr x0, [x0]
mov x2, x0
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
add x1, x0, 8
mov x0, x2
bl CG_SetAttachmentCent
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr x0, [x0]
bl CG_AttachToCent
.L3:
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global CG_PoisonCloud_f
.type CG_PoisonCloud_f, %function
CG_PoisonCloud_f:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, cg
add x0, x0, :lo12:cg
ldr w1, [x0, 12]
adrp x0, cg
add x0, x0, :lo12:cg
str w1, [x0, 16]
adrp x0, cg
add x0, x0, :lo12:cg
bl CG_IsParticleSystemValid
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L12
adrp x0, cgs
add x0, x0, :lo12:cgs
ldr w0, [x0]
bl CG_SpawnNewParticleSystem
mov x1, x0
adrp x0, cg
add x0, x0, :lo12:cg
str x1, [x0]
adrp x0, cg
add x0, x0, :lo12:cg
ldr x0, [x0]
mov x2, x0
adrp x0, cg+8
add x1, x0, :lo12:cg+8
mov x0, x2
bl CG_SetAttachmentCent
adrp x0, cg
add x0, x0, :lo12:cg
ldr x0, [x0]
bl CG_AttachToCent
nop
.L12:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size CG_PoisonCloud_f, .-CG_PoisonCloud_f | %struct.TYPE_8__ = type { %struct.TYPE_9__*, i32, i32, i32 }
%struct.TYPE_9__ = type { i32 }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
@cg = external dso_local global %struct.TYPE_8__, align 8
@cgs = external dso_local global %struct.TYPE_7__, align 4
define dso_local void @CG_PoisonCloud_f() {
%1 = load i32, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 2), align 4
store i32 %1, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 3), align 8
%2 = call i64 @CG_IsParticleSystemValid(%struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0))
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %0
%5 = load i32, i32* getelementptr inbounds (%struct.TYPE_7__, %struct.TYPE_7__* @cgs, i32 0, i32 0, i32 0), align 4
%6 = call %struct.TYPE_9__* @CG_SpawnNewParticleSystem(i32 %5)
store %struct.TYPE_9__* %6, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%7 = load %struct.TYPE_9__*, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%8 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %7, i32 0, i32 0
%9 = call i32 @CG_SetAttachmentCent(i32* %8, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 1))
%10 = load %struct.TYPE_9__*, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%11 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %10, i32 0, i32 0
%12 = call i32 @CG_AttachToCent(i32* %11)
br label %13
13: ; preds = %4, %0
ret void
}
declare dso_local i64 @CG_IsParticleSystemValid(%struct.TYPE_9__**)
declare dso_local %struct.TYPE_9__* @CG_SpawnNewParticleSystem(i32)
declare dso_local i32 @CG_SetAttachmentCent(i32*, i32*)
declare dso_local i32 @CG_AttachToCent(i32*) | /* BEGIN FUNCTION-DEF CG_PoisonCloud_f LOC=UNKNOWN VKEY=4898 */
static void CG_PoisonCloud_f(void)
{
scalar_t__ tmp ;
{
{
#line 57 "/tmp/forklift_obfu_9sj_rbse/input.c"
cg.poisonedTime = cg.time;
#line 59
tmp = CG_IsParticleSystemValid(& cg.poisonCloudPS);
}
#line 59
if (tmp) {
{
#line 61
cg.poisonCloudPS = CG_SpawnNewParticleSystem(cgs.media.poisonCloudPS);
#line 62
CG_SetAttachmentCent(& (cg.poisonCloudPS)->attachment, & cg.predictedPlayerEntity);
#line 63
CG_AttachToCent(& (cg.poisonCloudPS)->attachment);
}
}
#line 65
return;
}
}
/* END FUNCTION-DEF CG_PoisonCloud_f LOC=UNKNOWN VKEY=4898 */ | 304,912,982 | train_synth_compilable |
Nokia5110_ClearBuffer | void Nokia5110_ClearBuffer(void){int i;
for(i=0; i<84*48/8; i=i+1){
Screen[i] = 0;
}
} | EncodeArithmetic | .global Nokia5110_ClearBuffer
.type Nokia5110_ClearBuffer, %function
Nokia5110_ClearBuffer:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
b .L2
.L3:
adrp x0, :got:Screen
ldr x0, [x0, #:got_lo12:Screen]
ldr x1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
.L2:
ldr w0, [sp, 12]
cmp w0, 503
ble .L3
nop
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global Nokia5110_ClearBuffer
.type Nokia5110_ClearBuffer, %function
Nokia5110_ClearBuffer:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
b .L2
.L3:
adrp x0, Screen
add x0, x0, :lo12:Screen
ldr x1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
.L2:
ldr w0, [sp, 12]
and w1, w0, -505
ldr w0, [sp, 12]
eor w2, w0, -505
ldr w0, [sp, 12]
sub w0, w0, #504
and w0, w2, w0
orr w0, w1, w0
cmp w0, 0
blt .L3
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size Nokia5110_ClearBuffer, .-Nokia5110_ClearBuffer | @Screen = external dso_local global i64*, align 8
define dso_local void @Nokia5110_ClearBuffer() {
%1 = alloca i32, align 4
store i32 0, i32* %1, align 4
br label %2
2: ; preds = %10, %0
%3 = load i32, i32* %1, align 4
%4 = icmp slt i32 %3, 504
br i1 %4, label %5, label %13
5: ; preds = %2
%6 = load i64*, i64** @Screen, align 8
%7 = load i32, i32* %1, align 4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i64, i64* %6, i64 %8
store i64 0, i64* %9, align 8
br label %10
10: ; preds = %5
%11 = load i32, i32* %1, align 4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1, align 4
br label %2
13: ; preds = %2
ret void
} | /* BEGIN FUNCTION-DEF Nokia5110_ClearBuffer LOC=UNKNOWN VKEY=4882 */
void Nokia5110_ClearBuffer(void)
{
int i ;
{
#line 43 "/tmp/forklift_obfu_mtwc94zs/input.c"
i = 0;
#line 43
while (((unsigned int )((i & ~ 504) | (~ (i ^ 504) & (i - 504))) >> 31U) & 1) {
{
#line 44
*(Screen + i) = (scalar_t__ )0;
#line 43
i = (i - ~ 1) - 1;
}
}
#line 46
return;
}
}
/* END FUNCTION-DEF Nokia5110_ClearBuffer LOC=UNKNOWN VKEY=4882 */ | 289,482,182 | train_synth_compilable |
CG_PoisonCloud_f | static void CG_PoisonCloud_f( void )
{
cg.poisonedTime = cg.time;
if( CG_IsParticleSystemValid( &cg.poisonCloudPS ) )
{
cg.poisonCloudPS = CG_SpawnNewParticleSystem( cgs.media.poisonCloudPS );
CG_SetAttachmentCent( &cg.poisonCloudPS->attachment, &cg.predictedPlayerEntity );
CG_AttachToCent( &cg.poisonCloudPS->attachment );
}
} | Flatten+EncodeArithmetic | .global CG_PoisonCloud_f
.type CG_PoisonCloud_f, %function
CG_PoisonCloud_f:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr w1, [x0, 12]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
str w1, [x0, 16]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
bl CG_IsParticleSystemValid
cmp x0, 0
beq .L3
adrp x0, :got:cgs
ldr x0, [x0, #:got_lo12:cgs]
ldr w0, [x0]
bl CG_SpawnNewParticleSystem
mov x1, x0
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
str x1, [x0]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr x0, [x0]
mov x2, x0
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
add x1, x0, 8
mov x0, x2
bl CG_SetAttachmentCent
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr x0, [x0]
bl CG_AttachToCent
.L3:
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global CG_PoisonCloud_f
.type CG_PoisonCloud_f, %function
CG_PoisonCloud_f:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 3
str x0, [sp, 16]
.L11:
ldr x0, [sp, 16]
cmp x0, 5
beq .L2
ldr x0, [sp, 16]
cmp x0, 5
bhi .L13
ldr x0, [sp, 16]
cmp x0, 3
beq .L4
ldr x0, [sp, 16]
cmp x0, 3
bhi .L13
ldr x0, [sp, 16]
cmp x0, 2
beq .L5
ldr x0, [sp, 16]
cmp x0, 2
bhi .L13
ldr x0, [sp, 16]
cmp x0, 0
beq .L6
ldr x0, [sp, 16]
cmp x0, 1
bne .L13
b .L12
.L4:
mov x0, 5
str x0, [sp, 16]
b .L8
.L2:
adrp x0, cg
add x0, x0, :lo12:cg
ldr w1, [x0, 12]
adrp x0, cg
add x0, x0, :lo12:cg
str w1, [x0, 16]
adrp x0, cg
add x0, x0, :lo12:cg
bl CG_IsParticleSystemValid
str x0, [sp, 24]
mov x0, 2
str x0, [sp, 16]
b .L8
.L6:
adrp x0, cgs
add x0, x0, :lo12:cgs
ldr w0, [x0]
bl CG_SpawnNewParticleSystem
mov x1, x0
adrp x0, cg
add x0, x0, :lo12:cg
str x1, [x0]
adrp x0, cg
add x0, x0, :lo12:cg
ldr x0, [x0]
mov x2, x0
adrp x0, cg+8
add x1, x0, :lo12:cg+8
mov x0, x2
bl CG_SetAttachmentCent
adrp x0, cg
add x0, x0, :lo12:cg
ldr x0, [x0]
bl CG_AttachToCent
mov x0, 1
str x0, [sp, 16]
b .L8
.L5:
ldr x0, [sp, 24]
cmp x0, 0
beq .L9
str xzr, [sp, 16]
b .L8
.L9:
mov x0, 1
str x0, [sp, 16]
b .L8
.L13:
nop
.L8:
b .L11
.L12:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size CG_PoisonCloud_f, .-CG_PoisonCloud_f | %struct.TYPE_8__ = type { %struct.TYPE_9__*, i32, i32, i32 }
%struct.TYPE_9__ = type { i32 }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
@cg = external dso_local global %struct.TYPE_8__, align 8
@cgs = external dso_local global %struct.TYPE_7__, align 4
define dso_local void @CG_PoisonCloud_f() {
%1 = load i32, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 2), align 4
store i32 %1, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 3), align 8
%2 = call i64 @CG_IsParticleSystemValid(%struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0))
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %0
%5 = load i32, i32* getelementptr inbounds (%struct.TYPE_7__, %struct.TYPE_7__* @cgs, i32 0, i32 0, i32 0), align 4
%6 = call %struct.TYPE_9__* @CG_SpawnNewParticleSystem(i32 %5)
store %struct.TYPE_9__* %6, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%7 = load %struct.TYPE_9__*, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%8 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %7, i32 0, i32 0
%9 = call i32 @CG_SetAttachmentCent(i32* %8, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 1))
%10 = load %struct.TYPE_9__*, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%11 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %10, i32 0, i32 0
%12 = call i32 @CG_AttachToCent(i32* %11)
br label %13
13: ; preds = %4, %0
ret void
}
declare dso_local i64 @CG_IsParticleSystemValid(%struct.TYPE_9__**)
declare dso_local %struct.TYPE_9__* @CG_SpawnNewParticleSystem(i32)
declare dso_local i32 @CG_SetAttachmentCent(i32*, i32*)
declare dso_local i32 @CG_AttachToCent(i32*) | /* BEGIN FUNCTION-DEF CG_PoisonCloud_f LOC=UNKNOWN VKEY=4902 */
static void CG_PoisonCloud_f(void)
{
scalar_t__ tmp ;
unsigned long _TIG_FN_ebcd_1_CG_PoisonCloud_f_next ;
{
_TIG_FN_ebcd_1_CG_PoisonCloud_f_next = 3UL;
while (1) {
switch (_TIG_FN_ebcd_1_CG_PoisonCloud_f_next) {
case 1UL: ;
return;
break;
case 3UL: ;
_TIG_FN_ebcd_1_CG_PoisonCloud_f_next = 5UL;
break;
case 5UL:
{
#line 57 "/tmp/forklift_obfu_uk2zp8fx/input.c"
cg.poisonedTime = cg.time;
#line 59
tmp = CG_IsParticleSystemValid(& cg.poisonCloudPS);
}
_TIG_FN_ebcd_1_CG_PoisonCloud_f_next = 2UL;
break;
case 0UL:
{
#line 61
cg.poisonCloudPS = CG_SpawnNewParticleSystem(cgs.media.poisonCloudPS);
#line 62
CG_SetAttachmentCent(& (cg.poisonCloudPS)->attachment, & cg.predictedPlayerEntity);
#line 63
CG_AttachToCent(& (cg.poisonCloudPS)->attachment);
}
_TIG_FN_ebcd_1_CG_PoisonCloud_f_next = 1UL;
break;
case 2UL: ;
if (tmp) {
_TIG_FN_ebcd_1_CG_PoisonCloud_f_next = 0UL;
} else {
_TIG_FN_ebcd_1_CG_PoisonCloud_f_next = 1UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF CG_PoisonCloud_f LOC=UNKNOWN VKEY=4902 */ | 252,860,896 | train_synth_compilable |
Nokia5110_ClearBuffer | void Nokia5110_ClearBuffer(void){int i;
for(i=0; i<84*48/8; i=i+1){
Screen[i] = 0;
}
} | Flatten+EncodeArithmetic | .global Nokia5110_ClearBuffer
.type Nokia5110_ClearBuffer, %function
Nokia5110_ClearBuffer:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
b .L2
.L3:
adrp x0, :got:Screen
ldr x0, [x0, #:got_lo12:Screen]
ldr x1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
.L2:
ldr w0, [sp, 12]
cmp w0, 503
ble .L3
nop
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global Nokia5110_ClearBuffer
.type Nokia5110_ClearBuffer, %function
Nokia5110_ClearBuffer:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov x0, 1
str x0, [sp]
.L10:
ldr x0, [sp]
cmp x0, 6
beq .L11
ldr x0, [sp]
cmp x0, 6
bhi .L12
ldr x0, [sp]
cmp x0, 5
beq .L4
ldr x0, [sp]
cmp x0, 5
bhi .L12
ldr x0, [sp]
cmp x0, 0
beq .L5
ldr x0, [sp]
cmp x0, 1
bne .L12
str wzr, [sp, 12]
str xzr, [sp]
b .L6
.L4:
adrp x0, Screen
add x0, x0, :lo12:Screen
ldr x1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 12]
orr w0, w0, 1
lsl w1, w0, 1
ldr w0, [sp, 12]
eor w0, w0, 1
sub w0, w1, w0
str w0, [sp, 12]
str xzr, [sp]
b .L6
.L5:
ldr w0, [sp, 12]
sub w1, w0, #504
ldr w0, [sp, 12]
eor w2, w0, 504
ldr w0, [sp, 12]
sub w3, w0, #504
ldr w0, [sp, 12]
eor w0, w3, w0
and w0, w2, w0
eor w0, w1, w0
cmp w0, 0
bge .L8
mov x0, 5
str x0, [sp]
b .L6
.L8:
mov x0, 6
str x0, [sp]
b .L6
.L12:
nop
.L6:
b .L10
.L11:
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size Nokia5110_ClearBuffer, .-Nokia5110_ClearBuffer | @Screen = external dso_local global i64*, align 8
define dso_local void @Nokia5110_ClearBuffer() {
%1 = alloca i32, align 4
store i32 0, i32* %1, align 4
br label %2
2: ; preds = %10, %0
%3 = load i32, i32* %1, align 4
%4 = icmp slt i32 %3, 504
br i1 %4, label %5, label %13
5: ; preds = %2
%6 = load i64*, i64** @Screen, align 8
%7 = load i32, i32* %1, align 4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i64, i64* %6, i64 %8
store i64 0, i64* %9, align 8
br label %10
10: ; preds = %5
%11 = load i32, i32* %1, align 4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1, align 4
br label %2
13: ; preds = %2
ret void
} | /* BEGIN FUNCTION-DEF Nokia5110_ClearBuffer LOC=UNKNOWN VKEY=4886 */
void Nokia5110_ClearBuffer(void)
{
int i ;
unsigned long _TIG_FN_Symf_1_Nokia5110_ClearBuffer_next ;
{
_TIG_FN_Symf_1_Nokia5110_ClearBuffer_next = 1UL;
while (1) {
switch (_TIG_FN_Symf_1_Nokia5110_ClearBuffer_next) {
case 1UL:
#line 43 "/tmp/forklift_obfu_rs8vhjpi/input.c"
i = 0;
_TIG_FN_Symf_1_Nokia5110_ClearBuffer_next = 0UL;
break;
case 6UL: ;
return;
break;
case 5UL:
{
#line 44
*(Screen + i) = (scalar_t__ )0;
#line 43
i = ((i | 1) + (i | 1)) - (i ^ 1);
}
_TIG_FN_Symf_1_Nokia5110_ClearBuffer_next = 0UL;
break;
case 0UL: ;
if (((unsigned int )((i - 504) ^ ((i ^ 504) & ((i - 504) ^ i))) >> 31U) & 1) {
_TIG_FN_Symf_1_Nokia5110_ClearBuffer_next = 5UL;
} else {
_TIG_FN_Symf_1_Nokia5110_ClearBuffer_next = 6UL;
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF Nokia5110_ClearBuffer LOC=UNKNOWN VKEY=4886 */ | 134,917,627 | train_synth_compilable |
CG_PoisonCloud_f | static void CG_PoisonCloud_f( void )
{
cg.poisonedTime = cg.time;
if( CG_IsParticleSystemValid( &cg.poisonCloudPS ) )
{
cg.poisonCloudPS = CG_SpawnNewParticleSystem( cgs.media.poisonCloudPS );
CG_SetAttachmentCent( &cg.poisonCloudPS->attachment, &cg.predictedPlayerEntity );
CG_AttachToCent( &cg.poisonCloudPS->attachment );
}
} | Flatten | .global CG_PoisonCloud_f
.type CG_PoisonCloud_f, %function
CG_PoisonCloud_f:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr w1, [x0, 12]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
str w1, [x0, 16]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
bl CG_IsParticleSystemValid
cmp x0, 0
beq .L3
adrp x0, :got:cgs
ldr x0, [x0, #:got_lo12:cgs]
ldr w0, [x0]
bl CG_SpawnNewParticleSystem
mov x1, x0
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
str x1, [x0]
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr x0, [x0]
mov x2, x0
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
add x1, x0, 8
mov x0, x2
bl CG_SetAttachmentCent
adrp x0, :got:cg
ldr x0, [x0, #:got_lo12:cg]
ldr x0, [x0]
bl CG_AttachToCent
.L3:
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global CG_PoisonCloud_f
.type CG_PoisonCloud_f, %function
CG_PoisonCloud_f:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 3
str x0, [sp, 16]
.L11:
ldr x0, [sp, 16]
cmp x0, 5
beq .L2
ldr x0, [sp, 16]
cmp x0, 5
bhi .L13
ldr x0, [sp, 16]
cmp x0, 3
beq .L4
ldr x0, [sp, 16]
cmp x0, 3
bhi .L13
ldr x0, [sp, 16]
cmp x0, 2
beq .L5
ldr x0, [sp, 16]
cmp x0, 2
bhi .L13
ldr x0, [sp, 16]
cmp x0, 0
beq .L6
ldr x0, [sp, 16]
cmp x0, 1
bne .L13
b .L12
.L4:
mov x0, 5
str x0, [sp, 16]
b .L8
.L2:
adrp x0, cg
add x0, x0, :lo12:cg
ldr w1, [x0, 12]
adrp x0, cg
add x0, x0, :lo12:cg
str w1, [x0, 16]
adrp x0, cg
add x0, x0, :lo12:cg
bl CG_IsParticleSystemValid
str x0, [sp, 24]
mov x0, 2
str x0, [sp, 16]
b .L8
.L6:
adrp x0, cgs
add x0, x0, :lo12:cgs
ldr w0, [x0]
bl CG_SpawnNewParticleSystem
mov x1, x0
adrp x0, cg
add x0, x0, :lo12:cg
str x1, [x0]
adrp x0, cg
add x0, x0, :lo12:cg
ldr x0, [x0]
mov x2, x0
adrp x0, cg+8
add x1, x0, :lo12:cg+8
mov x0, x2
bl CG_SetAttachmentCent
adrp x0, cg
add x0, x0, :lo12:cg
ldr x0, [x0]
bl CG_AttachToCent
mov x0, 1
str x0, [sp, 16]
b .L8
.L5:
ldr x0, [sp, 24]
cmp x0, 0
beq .L9
str xzr, [sp, 16]
b .L8
.L9:
mov x0, 1
str x0, [sp, 16]
b .L8
.L13:
nop
.L8:
b .L11
.L12:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size CG_PoisonCloud_f, .-CG_PoisonCloud_f | %struct.TYPE_8__ = type { %struct.TYPE_9__*, i32, i32, i32 }
%struct.TYPE_9__ = type { i32 }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
@cg = external dso_local global %struct.TYPE_8__, align 8
@cgs = external dso_local global %struct.TYPE_7__, align 4
define dso_local void @CG_PoisonCloud_f() {
%1 = load i32, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 2), align 4
store i32 %1, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 3), align 8
%2 = call i64 @CG_IsParticleSystemValid(%struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0))
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %0
%5 = load i32, i32* getelementptr inbounds (%struct.TYPE_7__, %struct.TYPE_7__* @cgs, i32 0, i32 0, i32 0), align 4
%6 = call %struct.TYPE_9__* @CG_SpawnNewParticleSystem(i32 %5)
store %struct.TYPE_9__* %6, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%7 = load %struct.TYPE_9__*, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%8 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %7, i32 0, i32 0
%9 = call i32 @CG_SetAttachmentCent(i32* %8, i32* getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 1))
%10 = load %struct.TYPE_9__*, %struct.TYPE_9__** getelementptr inbounds (%struct.TYPE_8__, %struct.TYPE_8__* @cg, i32 0, i32 0), align 8
%11 = getelementptr inbounds %struct.TYPE_9__, %struct.TYPE_9__* %10, i32 0, i32 0
%12 = call i32 @CG_AttachToCent(i32* %11)
br label %13
13: ; preds = %4, %0
ret void
}
declare dso_local i64 @CG_IsParticleSystemValid(%struct.TYPE_9__**)
declare dso_local %struct.TYPE_9__* @CG_SpawnNewParticleSystem(i32)
declare dso_local i32 @CG_SetAttachmentCent(i32*, i32*)
declare dso_local i32 @CG_AttachToCent(i32*) | /* BEGIN FUNCTION-DEF CG_PoisonCloud_f LOC=UNKNOWN VKEY=4898 */
static void CG_PoisonCloud_f(void)
{
scalar_t__ tmp ;
unsigned long _TIG_FN_RhmL_1_CG_PoisonCloud_f_next ;
{
{
_TIG_FN_RhmL_1_CG_PoisonCloud_f_next = 3UL;
}
while (1) {
switch (_TIG_FN_RhmL_1_CG_PoisonCloud_f_next) {
case 1UL: ;
return;
break;
case 3UL: ;
{
_TIG_FN_RhmL_1_CG_PoisonCloud_f_next = 5UL;
}
break;
case 5UL:
#line 57 "/tmp/forklift_obfu_j3_ohz8g/input.c"
cg.poisonedTime = cg.time;
#line 59
tmp = CG_IsParticleSystemValid(& cg.poisonCloudPS);
{
_TIG_FN_RhmL_1_CG_PoisonCloud_f_next = 2UL;
}
break;
case 0UL:
#line 61
cg.poisonCloudPS = CG_SpawnNewParticleSystem(cgs.media.poisonCloudPS);
#line 62
CG_SetAttachmentCent(& (cg.poisonCloudPS)->attachment, & cg.predictedPlayerEntity);
#line 63
CG_AttachToCent(& (cg.poisonCloudPS)->attachment);
{
_TIG_FN_RhmL_1_CG_PoisonCloud_f_next = 1UL;
}
break;
case 2UL: ;
if (tmp) {
{
_TIG_FN_RhmL_1_CG_PoisonCloud_f_next = 0UL;
}
} else {
{
_TIG_FN_RhmL_1_CG_PoisonCloud_f_next = 1UL;
}
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF CG_PoisonCloud_f LOC=UNKNOWN VKEY=4898 */ | 30,884,438 | train_synth_compilable |
Nokia5110_ClearBuffer | void Nokia5110_ClearBuffer(void){int i;
for(i=0; i<84*48/8; i=i+1){
Screen[i] = 0;
}
} | Flatten | .global Nokia5110_ClearBuffer
.type Nokia5110_ClearBuffer, %function
Nokia5110_ClearBuffer:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
b .L2
.L3:
adrp x0, :got:Screen
ldr x0, [x0, #:got_lo12:Screen]
ldr x1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
.L2:
ldr w0, [sp, 12]
cmp w0, 503
ble .L3
nop
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global Nokia5110_ClearBuffer
.type Nokia5110_ClearBuffer, %function
Nokia5110_ClearBuffer:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov x0, 1
str x0, [sp]
.L10:
ldr x0, [sp]
cmp x0, 6
beq .L11
ldr x0, [sp]
cmp x0, 6
bhi .L12
ldr x0, [sp]
cmp x0, 5
beq .L4
ldr x0, [sp]
cmp x0, 5
bhi .L12
ldr x0, [sp]
cmp x0, 0
beq .L5
ldr x0, [sp]
cmp x0, 1
bne .L12
str wzr, [sp, 12]
str xzr, [sp]
b .L6
.L4:
adrp x0, Screen
add x0, x0, :lo12:Screen
ldr x1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
str xzr, [sp]
b .L6
.L5:
ldr w0, [sp, 12]
cmp w0, 503
bgt .L8
mov x0, 5
str x0, [sp]
b .L6
.L8:
mov x0, 6
str x0, [sp]
b .L6
.L12:
nop
.L6:
b .L10
.L11:
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size Nokia5110_ClearBuffer, .-Nokia5110_ClearBuffer | @Screen = external dso_local global i64*, align 8
define dso_local void @Nokia5110_ClearBuffer() {
%1 = alloca i32, align 4
store i32 0, i32* %1, align 4
br label %2
2: ; preds = %10, %0
%3 = load i32, i32* %1, align 4
%4 = icmp slt i32 %3, 504
br i1 %4, label %5, label %13
5: ; preds = %2
%6 = load i64*, i64** @Screen, align 8
%7 = load i32, i32* %1, align 4
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i64, i64* %6, i64 %8
store i64 0, i64* %9, align 8
br label %10
10: ; preds = %5
%11 = load i32, i32* %1, align 4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1, align 4
br label %2
13: ; preds = %2
ret void
} | /* BEGIN FUNCTION-DEF Nokia5110_ClearBuffer LOC=UNKNOWN VKEY=4882 */
void Nokia5110_ClearBuffer(void)
{
int i ;
unsigned long _TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next ;
{
{
_TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next = 1UL;
}
while (1) {
switch (_TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next) {
case 1UL:
#line 43 "/tmp/forklift_obfu_4gv2p3l5/input.c"
i = 0;
{
_TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next = 0UL;
}
break;
case 6UL: ;
return;
break;
case 5UL:
#line 44
*(Screen + i) = (scalar_t__ )0;
#line 43
i ++;
{
_TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next = 0UL;
}
break;
case 0UL: ;
if (i < 504) {
{
_TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next = 5UL;
}
} else {
{
_TIG_FN_PWBS_1_Nokia5110_ClearBuffer_next = 6UL;
}
}
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF Nokia5110_ClearBuffer LOC=UNKNOWN VKEY=4882 */ | 983,297,492 | train_synth_compilable |
ixp23xx_pci_read_config | __attribute__((used)) static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *value)
{
u32 n;
u32 *addr;
n = where % 4;
DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where,
bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
addr = ixp23xx_pci_config_addr(bus->number, devfn, where);
if (!addr)
return PCIBIOS_DEVICE_NOT_FOUND;
pci_master_aborts = 0;
*value = (*addr >> (8*n)) & bytemask[size];
if (pci_master_aborts) {
pci_master_aborts = 0;
*value = 0xffffffff;
return PCIBIOS_DEVICE_NOT_FOUND;
}
return PCIBIOS_SUCCESSFUL;
} | EncodeArithmetic | .global ixp23xx_pci_read_config
.type ixp23xx_pci_read_config, %function
ixp23xx_pci_read_config:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -64
.cfi_offset 20, -56
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str w3, [sp, 44]
str x4, [sp, 32]
ldr w0, [sp, 48]
negs w1, w0
and w0, w0, 3
and w1, w1, 3
csneg w0, w0, w1, mi
str w0, [sp, 68]
ldr x0, [sp, 56]
ldr w19, [x0]
ldr w0, [sp, 52]
bl PCI_SLOT
mov w20, w0
ldr w0, [sp, 52]
bl PCI_FUNC
mov w5, w0
mov w4, w20
mov w3, w19
ldr w2, [sp, 48]
ldr w1, [sp, 44]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl DBG
ldr x0, [sp, 56]
ldr w0, [x0]
ldr w2, [sp, 48]
ldr w1, [sp, 52]
bl ixp23xx_pci_config_addr
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L2
adrp x0, :got:PCIBIOS_DEVICE_NOT_FOUND
ldr x0, [x0, #:got_lo12:PCIBIOS_DEVICE_NOT_FOUND]
ldr w0, [x0]
b .L3
.L2:
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
str xzr, [x0]
ldr x0, [sp, 72]
ldr w1, [x0]
ldr w0, [sp, 68]
lsl w0, w0, 3
asr w1, w1, w0
adrp x0, :got:bytemask
ldr x0, [x0, #:got_lo12:bytemask]
ldr x2, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
and w1, w1, w0
ldr x0, [sp, 32]
str w1, [x0]
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
ldr x0, [x0]
cmp x0, 0
beq .L4
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
str xzr, [x0]
ldr x0, [sp, 32]
mov w1, -1
str w1, [x0]
adrp x0, :got:PCIBIOS_DEVICE_NOT_FOUND
ldr x0, [x0, #:got_lo12:PCIBIOS_DEVICE_NOT_FOUND]
ldr w0, [x0]
b .L3
.L4:
adrp x0, :got:PCIBIOS_SUCCESSFUL
ldr x0, [x0, #:got_lo12:PCIBIOS_SUCCESSFUL]
ldr w0, [x0]
.L3:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "In config_read(%d) %d from dev %d:%d:%d\n"
| .global ixp23xx_pci_read_config
.type ixp23xx_pci_read_config, %function
ixp23xx_pci_read_config:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
str x4, [sp, 16]
ldr w0, [sp, 32]
negs w1, w0
and w0, w0, 3
and w1, w1, 3
csneg w0, w0, w1, mi
str w0, [sp, 76]
ldr w0, [sp, 36]
bl PCI_FUNC
str w0, [sp, 72]
ldr w0, [sp, 36]
bl PCI_SLOT
str w0, [sp, 68]
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w5, [sp, 72]
ldr w4, [sp, 68]
mov w3, w0
ldr w2, [sp, 32]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl DBG
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w2, [sp, 32]
ldr w1, [sp, 36]
bl ixp23xx_pci_config_addr
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L12
adrp x0, PCIBIOS_DEVICE_NOT_FOUND
add x0, x0, :lo12:PCIBIOS_DEVICE_NOT_FOUND
ldr w0, [x0]
b .L13
.L12:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
str xzr, [x0]
ldr x0, [sp, 56]
ldr w1, [x0]
ldr w0, [sp, 76]
lsl w0, w0, 3
asr w0, w1, w0
mvn w1, w0
adrp x0, bytemask
add x0, x0, :lo12:bytemask
ldr x2, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
orr w1, w1, w0
ldr x0, [sp, 56]
ldr w2, [x0]
ldr w0, [sp, 76]
lsl w0, w0, 3
asr w0, w2, w0
add w0, w1, w0
add w1, w0, 1
ldr x0, [sp, 16]
str w1, [x0]
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
ldr x0, [x0]
cmp x0, 0
beq .L14
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
str xzr, [x0]
ldr x0, [sp, 16]
mov w1, -1
str w1, [x0]
adrp x0, PCIBIOS_DEVICE_NOT_FOUND
add x0, x0, :lo12:PCIBIOS_DEVICE_NOT_FOUND
ldr w0, [x0]
b .L13
.L14:
adrp x0, PCIBIOS_SUCCESSFUL
add x0, x0, :lo12:PCIBIOS_SUCCESSFUL
ldr w0, [x0]
.L13:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size ixp23xx_pci_read_config, .-ixp23xx_pci_read_config | %struct.pci_bus = type { i32 }
@.str = external hidden unnamed_addr constant [41 x i8], align 1
@PCIBIOS_DEVICE_NOT_FOUND = external dso_local global i32, align 4
@pci_master_aborts = external dso_local global i64, align 8
@bytemask = external dso_local global i32*, align 8
@PCIBIOS_SUCCESSFUL = external dso_local global i32, align 4
define dso_local i32 @ixp23xx_pci_read_config(%struct.pci_bus* %0, i32 %1, i32 %2, i32 %3, i32* %4) {
%6 = alloca i32, align 4
%7 = alloca %struct.pci_bus*, align 8
%8 = alloca i32, align 4
%9 = alloca i32, align 4
%10 = alloca i32, align 4
%11 = alloca i32*, align 8
%12 = alloca i32, align 4
%13 = alloca i32*, align 8
store %struct.pci_bus* %0, %struct.pci_bus** %7, align 8
store i32 %1, i32* %8, align 4
store i32 %2, i32* %9, align 4
store i32 %3, i32* %10, align 4
store i32* %4, i32** %11, align 8
%14 = load i32, i32* %9, align 4
%15 = srem i32 %14, 4
store i32 %15, i32* %12, align 4
%16 = load i32, i32* %10, align 4
%17 = load i32, i32* %9, align 4
%18 = load %struct.pci_bus*, %struct.pci_bus** %7, align 8
%19 = getelementptr inbounds %struct.pci_bus, %struct.pci_bus* %18, i32 0, i32 0
%20 = load i32, i32* %19, align 4
%21 = load i32, i32* %8, align 4
%22 = call i32 @PCI_SLOT(i32 %21)
%23 = load i32, i32* %8, align 4
%24 = call i32 @PCI_FUNC(i32 %23)
%25 = call i32 @DBG(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %16, i32 %17, i32 %20, i32 %22, i32 %24)
%26 = load %struct.pci_bus*, %struct.pci_bus** %7, align 8
%27 = getelementptr inbounds %struct.pci_bus, %struct.pci_bus* %26, i32 0, i32 0
%28 = load i32, i32* %27, align 4
%29 = load i32, i32* %8, align 4
%30 = load i32, i32* %9, align 4
%31 = call i32* @ixp23xx_pci_config_addr(i32 %28, i32 %29, i32 %30)
store i32* %31, i32** %13, align 8
%32 = load i32*, i32** %13, align 8
%33 = icmp ne i32* %32, null
br i1 %33, label %36, label %34
34: ; preds = %5
%35 = load i32, i32* @PCIBIOS_DEVICE_NOT_FOUND, align 4
store i32 %35, i32* %6, align 4
br label %56
36: ; preds = %5
store i64 0, i64* @pci_master_aborts, align 8
%37 = load i32*, i32** %13, align 8
%38 = load i32, i32* %37, align 4
%39 = load i32, i32* %12, align 4
%40 = mul nsw i32 8, %39
%41 = ashr i32 %38, %40
%42 = load i32*, i32** @bytemask, align 8
%43 = load i32, i32* %10, align 4
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i32, i32* %42, i64 %44
%46 = load i32, i32* %45, align 4
%47 = and i32 %41, %46
%48 = load i32*, i32** %11, align 8
store i32 %47, i32* %48, align 4
%49 = load i64, i64* @pci_master_aborts, align 8
%50 = icmp ne i64 %49, 0
br i1 %50, label %51, label %54
51: ; preds = %36
store i64 0, i64* @pci_master_aborts, align 8
%52 = load i32*, i32** %11, align 8
store i32 -1, i32* %52, align 4
%53 = load i32, i32* @PCIBIOS_DEVICE_NOT_FOUND, align 4
store i32 %53, i32* %6, align 4
br label %56
54: ; preds = %36
%55 = load i32, i32* @PCIBIOS_SUCCESSFUL, align 4
store i32 %55, i32* %6, align 4
br label %56
56: ; preds = %54, %51, %34
%57 = load i32, i32* %6, align 4
ret i32 %57
}
declare dso_local i32 @DBG(i8*, i32, i32, i32, i32, i32)
declare dso_local i32 @PCI_SLOT(i32)
declare dso_local i32 @PCI_FUNC(i32)
declare dso_local i32* @ixp23xx_pci_config_addr(i32, i32, i32) | /* BEGIN FUNCTION-DEF ixp23xx_pci_read_config LOC=UNKNOWN VKEY=4932 */
static int ixp23xx_pci_read_config(struct pci_bus *bus , unsigned int devfn , int where ,
int size , u32 *value )
{
u32 n ;
u32 *addr ;
int tmp ;
int tmp___0 ;
{
{
#line 57 "/tmp/forklift_obfu_os1ilxf7/input.c"
n = where % 4;
#line 59
tmp = PCI_FUNC(devfn);
#line 59
tmp___0 = PCI_SLOT(devfn);
#line 59
DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where, bus->number, tmp___0,
tmp);
#line 62
addr = ixp23xx_pci_config_addr(bus->number, devfn, where);
}
#line 63
if (! addr) {
#line 64
return (PCIBIOS_DEVICE_NOT_FOUND);
}
{
#line 66
pci_master_aborts = (scalar_t__ )0;
#line 67
*value = ((~ (*addr >> 8 * n) | *(bytemask + size)) + (*addr >> 8 * n)) + 1;
}
#line 68
if (pci_master_aborts) {
{
#line 69
pci_master_aborts = (scalar_t__ )0;
#line 70
*value = (u32 )0xffffffff;
}
#line 71
return (PCIBIOS_DEVICE_NOT_FOUND);
}
#line 74
return (PCIBIOS_SUCCESSFUL);
}
}
/* END FUNCTION-DEF ixp23xx_pci_read_config LOC=UNKNOWN VKEY=4932 */ | 2,030,106,617 | train_synth_compilable |
ixp23xx_pci_read_config | __attribute__((used)) static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *value)
{
u32 n;
u32 *addr;
n = where % 4;
DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where,
bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
addr = ixp23xx_pci_config_addr(bus->number, devfn, where);
if (!addr)
return PCIBIOS_DEVICE_NOT_FOUND;
pci_master_aborts = 0;
*value = (*addr >> (8*n)) & bytemask[size];
if (pci_master_aborts) {
pci_master_aborts = 0;
*value = 0xffffffff;
return PCIBIOS_DEVICE_NOT_FOUND;
}
return PCIBIOS_SUCCESSFUL;
} | Flatten | .global ixp23xx_pci_read_config
.type ixp23xx_pci_read_config, %function
ixp23xx_pci_read_config:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -64
.cfi_offset 20, -56
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str w3, [sp, 44]
str x4, [sp, 32]
ldr w0, [sp, 48]
negs w1, w0
and w0, w0, 3
and w1, w1, 3
csneg w0, w0, w1, mi
str w0, [sp, 68]
ldr x0, [sp, 56]
ldr w19, [x0]
ldr w0, [sp, 52]
bl PCI_SLOT
mov w20, w0
ldr w0, [sp, 52]
bl PCI_FUNC
mov w5, w0
mov w4, w20
mov w3, w19
ldr w2, [sp, 48]
ldr w1, [sp, 44]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl DBG
ldr x0, [sp, 56]
ldr w0, [x0]
ldr w2, [sp, 48]
ldr w1, [sp, 52]
bl ixp23xx_pci_config_addr
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L2
adrp x0, :got:PCIBIOS_DEVICE_NOT_FOUND
ldr x0, [x0, #:got_lo12:PCIBIOS_DEVICE_NOT_FOUND]
ldr w0, [x0]
b .L3
.L2:
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
str xzr, [x0]
ldr x0, [sp, 72]
ldr w1, [x0]
ldr w0, [sp, 68]
lsl w0, w0, 3
asr w1, w1, w0
adrp x0, :got:bytemask
ldr x0, [x0, #:got_lo12:bytemask]
ldr x2, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
and w1, w1, w0
ldr x0, [sp, 32]
str w1, [x0]
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
ldr x0, [x0]
cmp x0, 0
beq .L4
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
str xzr, [x0]
ldr x0, [sp, 32]
mov w1, -1
str w1, [x0]
adrp x0, :got:PCIBIOS_DEVICE_NOT_FOUND
ldr x0, [x0, #:got_lo12:PCIBIOS_DEVICE_NOT_FOUND]
ldr w0, [x0]
b .L3
.L4:
adrp x0, :got:PCIBIOS_SUCCESSFUL
ldr x0, [x0, #:got_lo12:PCIBIOS_SUCCESSFUL]
ldr w0, [x0]
.L3:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "In config_read(%d) %d from dev %d:%d:%d\n"
| .global ixp23xx_pci_read_config
.type ixp23xx_pci_read_config, %function
ixp23xx_pci_read_config:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
str x4, [sp, 16]
mov x0, 4
str x0, [sp, 56]
.L28:
ldr x0, [sp, 56]
cmp x0, 10
beq .L12
ldr x0, [sp, 56]
cmp x0, 10
bhi .L29
ldr x0, [sp, 56]
cmp x0, 9
beq .L14
ldr x0, [sp, 56]
cmp x0, 9
bhi .L29
ldr x0, [sp, 56]
cmp x0, 8
beq .L15
ldr x0, [sp, 56]
cmp x0, 8
bhi .L29
ldr x0, [sp, 56]
cmp x0, 7
beq .L16
ldr x0, [sp, 56]
cmp x0, 7
bhi .L29
ldr x0, [sp, 56]
cmp x0, 6
beq .L17
ldr x0, [sp, 56]
cmp x0, 6
bhi .L29
ldr x0, [sp, 56]
cmp x0, 4
beq .L18
ldr x0, [sp, 56]
cmp x0, 4
bhi .L29
ldr x0, [sp, 56]
cmp x0, 3
beq .L19
ldr x0, [sp, 56]
cmp x0, 3
bhi .L29
ldr x0, [sp, 56]
cmp x0, 0
beq .L20
ldr x0, [sp, 56]
cmp x0, 2
beq .L21
b .L29
.L18:
mov x0, 6
str x0, [sp, 56]
b .L22
.L15:
adrp x0, PCIBIOS_SUCCESSFUL
add x0, x0, :lo12:PCIBIOS_SUCCESSFUL
ldr w0, [x0]
b .L23
.L19:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
str xzr, [x0]
ldr x0, [sp, 64]
ldr w1, [x0]
ldr w0, [sp, 76]
lsl w0, w0, 3
asr w1, w1, w0
adrp x0, bytemask
add x0, x0, :lo12:bytemask
ldr x2, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
and w1, w1, w0
ldr x0, [sp, 16]
str w1, [x0]
mov x0, 7
str x0, [sp, 56]
b .L22
.L14:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
str xzr, [x0]
ldr x0, [sp, 16]
mov w1, -1
str w1, [x0]
mov x0, 2
str x0, [sp, 56]
b .L22
.L17:
ldr w0, [sp, 32]
negs w1, w0
and w0, w0, 3
and w1, w1, 3
csneg w0, w0, w1, mi
str w0, [sp, 76]
ldr w0, [sp, 36]
bl PCI_FUNC
str w0, [sp, 52]
ldr w0, [sp, 36]
bl PCI_SLOT
str w0, [sp, 48]
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w5, [sp, 52]
ldr w4, [sp, 48]
mov w3, w0
ldr w2, [sp, 32]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl DBG
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w2, [sp, 32]
ldr w1, [sp, 36]
bl ixp23xx_pci_config_addr
str x0, [sp, 64]
mov x0, 10
str x0, [sp, 56]
b .L22
.L12:
ldr x0, [sp, 64]
cmp x0, 0
bne .L24
str xzr, [sp, 56]
b .L22
.L24:
mov x0, 3
str x0, [sp, 56]
b .L22
.L20:
adrp x0, PCIBIOS_DEVICE_NOT_FOUND
add x0, x0, :lo12:PCIBIOS_DEVICE_NOT_FOUND
ldr w0, [x0]
b .L23
.L16:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
ldr x0, [x0]
cmp x0, 0
beq .L26
mov x0, 9
str x0, [sp, 56]
b .L22
.L26:
mov x0, 8
str x0, [sp, 56]
b .L22
.L21:
adrp x0, PCIBIOS_DEVICE_NOT_FOUND
add x0, x0, :lo12:PCIBIOS_DEVICE_NOT_FOUND
ldr w0, [x0]
b .L23
.L29:
nop
.L22:
b .L28
.L23:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size ixp23xx_pci_read_config, .-ixp23xx_pci_read_config | %struct.pci_bus = type { i32 }
@.str = external hidden unnamed_addr constant [41 x i8], align 1
@PCIBIOS_DEVICE_NOT_FOUND = external dso_local global i32, align 4
@pci_master_aborts = external dso_local global i64, align 8
@bytemask = external dso_local global i32*, align 8
@PCIBIOS_SUCCESSFUL = external dso_local global i32, align 4
define dso_local i32 @ixp23xx_pci_read_config(%struct.pci_bus* %0, i32 %1, i32 %2, i32 %3, i32* %4) {
%6 = alloca i32, align 4
%7 = alloca %struct.pci_bus*, align 8
%8 = alloca i32, align 4
%9 = alloca i32, align 4
%10 = alloca i32, align 4
%11 = alloca i32*, align 8
%12 = alloca i32, align 4
%13 = alloca i32*, align 8
store %struct.pci_bus* %0, %struct.pci_bus** %7, align 8
store i32 %1, i32* %8, align 4
store i32 %2, i32* %9, align 4
store i32 %3, i32* %10, align 4
store i32* %4, i32** %11, align 8
%14 = load i32, i32* %9, align 4
%15 = srem i32 %14, 4
store i32 %15, i32* %12, align 4
%16 = load i32, i32* %10, align 4
%17 = load i32, i32* %9, align 4
%18 = load %struct.pci_bus*, %struct.pci_bus** %7, align 8
%19 = getelementptr inbounds %struct.pci_bus, %struct.pci_bus* %18, i32 0, i32 0
%20 = load i32, i32* %19, align 4
%21 = load i32, i32* %8, align 4
%22 = call i32 @PCI_SLOT(i32 %21)
%23 = load i32, i32* %8, align 4
%24 = call i32 @PCI_FUNC(i32 %23)
%25 = call i32 @DBG(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %16, i32 %17, i32 %20, i32 %22, i32 %24)
%26 = load %struct.pci_bus*, %struct.pci_bus** %7, align 8
%27 = getelementptr inbounds %struct.pci_bus, %struct.pci_bus* %26, i32 0, i32 0
%28 = load i32, i32* %27, align 4
%29 = load i32, i32* %8, align 4
%30 = load i32, i32* %9, align 4
%31 = call i32* @ixp23xx_pci_config_addr(i32 %28, i32 %29, i32 %30)
store i32* %31, i32** %13, align 8
%32 = load i32*, i32** %13, align 8
%33 = icmp ne i32* %32, null
br i1 %33, label %36, label %34
34: ; preds = %5
%35 = load i32, i32* @PCIBIOS_DEVICE_NOT_FOUND, align 4
store i32 %35, i32* %6, align 4
br label %56
36: ; preds = %5
store i64 0, i64* @pci_master_aborts, align 8
%37 = load i32*, i32** %13, align 8
%38 = load i32, i32* %37, align 4
%39 = load i32, i32* %12, align 4
%40 = mul nsw i32 8, %39
%41 = ashr i32 %38, %40
%42 = load i32*, i32** @bytemask, align 8
%43 = load i32, i32* %10, align 4
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i32, i32* %42, i64 %44
%46 = load i32, i32* %45, align 4
%47 = and i32 %41, %46
%48 = load i32*, i32** %11, align 8
store i32 %47, i32* %48, align 4
%49 = load i64, i64* @pci_master_aborts, align 8
%50 = icmp ne i64 %49, 0
br i1 %50, label %51, label %54
51: ; preds = %36
store i64 0, i64* @pci_master_aborts, align 8
%52 = load i32*, i32** %11, align 8
store i32 -1, i32* %52, align 4
%53 = load i32, i32* @PCIBIOS_DEVICE_NOT_FOUND, align 4
store i32 %53, i32* %6, align 4
br label %56
54: ; preds = %36
%55 = load i32, i32* @PCIBIOS_SUCCESSFUL, align 4
store i32 %55, i32* %6, align 4
br label %56
56: ; preds = %54, %51, %34
%57 = load i32, i32* %6, align 4
ret i32 %57
}
declare dso_local i32 @DBG(i8*, i32, i32, i32, i32, i32)
declare dso_local i32 @PCI_SLOT(i32)
declare dso_local i32 @PCI_FUNC(i32)
declare dso_local i32* @ixp23xx_pci_config_addr(i32, i32, i32) | /* BEGIN FUNCTION-DEF ixp23xx_pci_read_config LOC=UNKNOWN VKEY=4932 */
static int ixp23xx_pci_read_config(struct pci_bus *bus , unsigned int devfn , int where ,
int size , u32 *value )
{
u32 n ;
u32 *addr ;
int tmp ;
int tmp___0 ;
unsigned long _TIG_FN_WLmR_1_ixp23xx_pci_read_config_next ;
{
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 4UL;
}
while (1) {
switch (_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next) {
case 4UL: ;
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 6UL;
}
break;
case 8UL: ;
return (PCIBIOS_SUCCESSFUL);
break;
case 3UL:
#line 66 "/tmp/forklift_obfu_htii1xf0/input.c"
pci_master_aborts = (scalar_t__ )0;
#line 67
*value = (*addr >> 8 * n) & *(bytemask + size);
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 7UL;
}
break;
case 9UL:
#line 69
pci_master_aborts = (scalar_t__ )0;
#line 70
*value = (u32 )0xffffffff;
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 2UL;
}
break;
case 6UL:
#line 57
n = where % 4;
#line 59
tmp = PCI_FUNC(devfn);
#line 59
tmp___0 = PCI_SLOT(devfn);
#line 59
DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where, bus->number, tmp___0,
tmp);
#line 62
addr = ixp23xx_pci_config_addr(bus->number, devfn, where);
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 10UL;
}
break;
case 10UL: ;
if (! addr) {
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 0UL;
}
} else {
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 3UL;
}
}
break;
case 0UL: ;
return (PCIBIOS_DEVICE_NOT_FOUND);
break;
case 7UL: ;
if (pci_master_aborts) {
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 9UL;
}
} else {
{
_TIG_FN_WLmR_1_ixp23xx_pci_read_config_next = 8UL;
}
}
break;
case 2UL: ;
return (PCIBIOS_DEVICE_NOT_FOUND);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF ixp23xx_pci_read_config LOC=UNKNOWN VKEY=4932 */ | 568,275,055 | train_synth_compilable |
cleanup_pop | struct cleanup_item *
cleanup_pop(void)
{
return cleanup_pop_r(&static_stack);
} | EncodeArithmetic | .global cleanup_pop
.type cleanup_pop, %function
cleanup_pop:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:static_stack
ldr x0, [x0, #:got_lo12:static_stack]
bl cleanup_pop_r
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
| .global cleanup_pop
.type cleanup_pop, %function
cleanup_pop:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, static_stack
add x0, x0, :lo12:static_stack
bl cleanup_pop_r
str x0, [sp, 24]
ldr x0, [sp, 24]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size cleanup_pop, .-cleanup_pop | %struct.cleanup_item = type { i32 }
@static_stack = external dso_local global i32, align 4
define dso_local %struct.cleanup_item* @cleanup_pop() {
%1 = call %struct.cleanup_item* @cleanup_pop_r(i32* @static_stack)
ret %struct.cleanup_item* %1
}
declare dso_local %struct.cleanup_item* @cleanup_pop_r(i32*) | /* BEGIN FUNCTION-DEF cleanup_pop LOC=UNKNOWN VKEY=4885 */
struct cleanup_item *cleanup_pop(void)
{
struct cleanup_item *tmp ;
{
#line 47 "/tmp/forklift_obfu_zjnv3r5p/input.c"
tmp = cleanup_pop_r(& static_stack);
#line 47
return (tmp);
}
}
/* END FUNCTION-DEF cleanup_pop LOC=UNKNOWN VKEY=4885 */ | 416,314,667 | train_synth_compilable |
ixp23xx_pci_read_config | __attribute__((used)) static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *value)
{
u32 n;
u32 *addr;
n = where % 4;
DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where,
bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
addr = ixp23xx_pci_config_addr(bus->number, devfn, where);
if (!addr)
return PCIBIOS_DEVICE_NOT_FOUND;
pci_master_aborts = 0;
*value = (*addr >> (8*n)) & bytemask[size];
if (pci_master_aborts) {
pci_master_aborts = 0;
*value = 0xffffffff;
return PCIBIOS_DEVICE_NOT_FOUND;
}
return PCIBIOS_SUCCESSFUL;
} | Flatten+EncodeArithmetic | .global ixp23xx_pci_read_config
.type ixp23xx_pci_read_config, %function
ixp23xx_pci_read_config:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -64
.cfi_offset 20, -56
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str w3, [sp, 44]
str x4, [sp, 32]
ldr w0, [sp, 48]
negs w1, w0
and w0, w0, 3
and w1, w1, 3
csneg w0, w0, w1, mi
str w0, [sp, 68]
ldr x0, [sp, 56]
ldr w19, [x0]
ldr w0, [sp, 52]
bl PCI_SLOT
mov w20, w0
ldr w0, [sp, 52]
bl PCI_FUNC
mov w5, w0
mov w4, w20
mov w3, w19
ldr w2, [sp, 48]
ldr w1, [sp, 44]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl DBG
ldr x0, [sp, 56]
ldr w0, [x0]
ldr w2, [sp, 48]
ldr w1, [sp, 52]
bl ixp23xx_pci_config_addr
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L2
adrp x0, :got:PCIBIOS_DEVICE_NOT_FOUND
ldr x0, [x0, #:got_lo12:PCIBIOS_DEVICE_NOT_FOUND]
ldr w0, [x0]
b .L3
.L2:
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
str xzr, [x0]
ldr x0, [sp, 72]
ldr w1, [x0]
ldr w0, [sp, 68]
lsl w0, w0, 3
asr w1, w1, w0
adrp x0, :got:bytemask
ldr x0, [x0, #:got_lo12:bytemask]
ldr x2, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
and w1, w1, w0
ldr x0, [sp, 32]
str w1, [x0]
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
ldr x0, [x0]
cmp x0, 0
beq .L4
adrp x0, :got:pci_master_aborts
ldr x0, [x0, #:got_lo12:pci_master_aborts]
str xzr, [x0]
ldr x0, [sp, 32]
mov w1, -1
str w1, [x0]
adrp x0, :got:PCIBIOS_DEVICE_NOT_FOUND
ldr x0, [x0, #:got_lo12:PCIBIOS_DEVICE_NOT_FOUND]
ldr w0, [x0]
b .L3
.L4:
adrp x0, :got:PCIBIOS_SUCCESSFUL
ldr x0, [x0, #:got_lo12:PCIBIOS_SUCCESSFUL]
ldr w0, [x0]
.L3:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LC0: .string "In config_read(%d) %d from dev %d:%d:%d\n"
| .global ixp23xx_pci_read_config
.type ixp23xx_pci_read_config, %function
ixp23xx_pci_read_config:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
str x4, [sp, 16]
mov x0, 4
str x0, [sp, 56]
.L28:
ldr x0, [sp, 56]
cmp x0, 10
beq .L12
ldr x0, [sp, 56]
cmp x0, 10
bhi .L29
ldr x0, [sp, 56]
cmp x0, 9
beq .L14
ldr x0, [sp, 56]
cmp x0, 9
bhi .L29
ldr x0, [sp, 56]
cmp x0, 8
beq .L15
ldr x0, [sp, 56]
cmp x0, 8
bhi .L29
ldr x0, [sp, 56]
cmp x0, 7
beq .L16
ldr x0, [sp, 56]
cmp x0, 7
bhi .L29
ldr x0, [sp, 56]
cmp x0, 6
beq .L17
ldr x0, [sp, 56]
cmp x0, 6
bhi .L29
ldr x0, [sp, 56]
cmp x0, 4
beq .L18
ldr x0, [sp, 56]
cmp x0, 4
bhi .L29
ldr x0, [sp, 56]
cmp x0, 3
beq .L19
ldr x0, [sp, 56]
cmp x0, 3
bhi .L29
ldr x0, [sp, 56]
cmp x0, 0
beq .L20
ldr x0, [sp, 56]
cmp x0, 2
beq .L21
b .L29
.L18:
mov x0, 6
str x0, [sp, 56]
b .L22
.L15:
adrp x0, PCIBIOS_SUCCESSFUL
add x0, x0, :lo12:PCIBIOS_SUCCESSFUL
ldr w0, [x0]
b .L23
.L19:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
str xzr, [x0]
ldr x0, [sp, 64]
ldr w1, [x0]
ldr w0, [sp, 76]
lsl w0, w0, 3
asr w0, w1, w0
mvn w1, w0
adrp x0, bytemask
add x0, x0, :lo12:bytemask
ldr x2, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
orr w1, w1, w0
ldr x0, [sp, 64]
ldr w2, [x0]
ldr w0, [sp, 76]
lsl w0, w0, 3
asr w0, w2, w0
mvn w0, w0
sub w1, w1, w0
ldr x0, [sp, 16]
str w1, [x0]
mov x0, 7
str x0, [sp, 56]
b .L22
.L14:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
str xzr, [x0]
ldr x0, [sp, 16]
mov w1, -1
str w1, [x0]
mov x0, 2
str x0, [sp, 56]
b .L22
.L17:
ldr w0, [sp, 32]
negs w1, w0
and w0, w0, 3
and w1, w1, 3
csneg w0, w0, w1, mi
str w0, [sp, 76]
ldr w0, [sp, 36]
bl PCI_FUNC
str w0, [sp, 52]
ldr w0, [sp, 36]
bl PCI_SLOT
str w0, [sp, 48]
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w5, [sp, 52]
ldr w4, [sp, 48]
mov w3, w0
ldr w2, [sp, 32]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl DBG
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w2, [sp, 32]
ldr w1, [sp, 36]
bl ixp23xx_pci_config_addr
str x0, [sp, 64]
mov x0, 10
str x0, [sp, 56]
b .L22
.L12:
ldr x0, [sp, 64]
cmp x0, 0
bne .L24
str xzr, [sp, 56]
b .L22
.L24:
mov x0, 3
str x0, [sp, 56]
b .L22
.L20:
adrp x0, PCIBIOS_DEVICE_NOT_FOUND
add x0, x0, :lo12:PCIBIOS_DEVICE_NOT_FOUND
ldr w0, [x0]
b .L23
.L16:
adrp x0, pci_master_aborts
add x0, x0, :lo12:pci_master_aborts
ldr x0, [x0]
cmp x0, 0
beq .L26
mov x0, 9
str x0, [sp, 56]
b .L22
.L26:
mov x0, 8
str x0, [sp, 56]
b .L22
.L21:
adrp x0, PCIBIOS_DEVICE_NOT_FOUND
add x0, x0, :lo12:PCIBIOS_DEVICE_NOT_FOUND
ldr w0, [x0]
b .L23
.L29:
nop
.L22:
b .L28
.L23:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size ixp23xx_pci_read_config, .-ixp23xx_pci_read_config | %struct.pci_bus = type { i32 }
@.str = external hidden unnamed_addr constant [41 x i8], align 1
@PCIBIOS_DEVICE_NOT_FOUND = external dso_local global i32, align 4
@pci_master_aborts = external dso_local global i64, align 8
@bytemask = external dso_local global i32*, align 8
@PCIBIOS_SUCCESSFUL = external dso_local global i32, align 4
define dso_local i32 @ixp23xx_pci_read_config(%struct.pci_bus* %0, i32 %1, i32 %2, i32 %3, i32* %4) {
%6 = alloca i32, align 4
%7 = alloca %struct.pci_bus*, align 8
%8 = alloca i32, align 4
%9 = alloca i32, align 4
%10 = alloca i32, align 4
%11 = alloca i32*, align 8
%12 = alloca i32, align 4
%13 = alloca i32*, align 8
store %struct.pci_bus* %0, %struct.pci_bus** %7, align 8
store i32 %1, i32* %8, align 4
store i32 %2, i32* %9, align 4
store i32 %3, i32* %10, align 4
store i32* %4, i32** %11, align 8
%14 = load i32, i32* %9, align 4
%15 = srem i32 %14, 4
store i32 %15, i32* %12, align 4
%16 = load i32, i32* %10, align 4
%17 = load i32, i32* %9, align 4
%18 = load %struct.pci_bus*, %struct.pci_bus** %7, align 8
%19 = getelementptr inbounds %struct.pci_bus, %struct.pci_bus* %18, i32 0, i32 0
%20 = load i32, i32* %19, align 4
%21 = load i32, i32* %8, align 4
%22 = call i32 @PCI_SLOT(i32 %21)
%23 = load i32, i32* %8, align 4
%24 = call i32 @PCI_FUNC(i32 %23)
%25 = call i32 @DBG(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %16, i32 %17, i32 %20, i32 %22, i32 %24)
%26 = load %struct.pci_bus*, %struct.pci_bus** %7, align 8
%27 = getelementptr inbounds %struct.pci_bus, %struct.pci_bus* %26, i32 0, i32 0
%28 = load i32, i32* %27, align 4
%29 = load i32, i32* %8, align 4
%30 = load i32, i32* %9, align 4
%31 = call i32* @ixp23xx_pci_config_addr(i32 %28, i32 %29, i32 %30)
store i32* %31, i32** %13, align 8
%32 = load i32*, i32** %13, align 8
%33 = icmp ne i32* %32, null
br i1 %33, label %36, label %34
34: ; preds = %5
%35 = load i32, i32* @PCIBIOS_DEVICE_NOT_FOUND, align 4
store i32 %35, i32* %6, align 4
br label %56
36: ; preds = %5
store i64 0, i64* @pci_master_aborts, align 8
%37 = load i32*, i32** %13, align 8
%38 = load i32, i32* %37, align 4
%39 = load i32, i32* %12, align 4
%40 = mul nsw i32 8, %39
%41 = ashr i32 %38, %40
%42 = load i32*, i32** @bytemask, align 8
%43 = load i32, i32* %10, align 4
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i32, i32* %42, i64 %44
%46 = load i32, i32* %45, align 4
%47 = and i32 %41, %46
%48 = load i32*, i32** %11, align 8
store i32 %47, i32* %48, align 4
%49 = load i64, i64* @pci_master_aborts, align 8
%50 = icmp ne i64 %49, 0
br i1 %50, label %51, label %54
51: ; preds = %36
store i64 0, i64* @pci_master_aborts, align 8
%52 = load i32*, i32** %11, align 8
store i32 -1, i32* %52, align 4
%53 = load i32, i32* @PCIBIOS_DEVICE_NOT_FOUND, align 4
store i32 %53, i32* %6, align 4
br label %56
54: ; preds = %36
%55 = load i32, i32* @PCIBIOS_SUCCESSFUL, align 4
store i32 %55, i32* %6, align 4
br label %56
56: ; preds = %54, %51, %34
%57 = load i32, i32* %6, align 4
ret i32 %57
}
declare dso_local i32 @DBG(i8*, i32, i32, i32, i32, i32)
declare dso_local i32 @PCI_SLOT(i32)
declare dso_local i32 @PCI_FUNC(i32)
declare dso_local i32* @ixp23xx_pci_config_addr(i32, i32, i32) | /* BEGIN FUNCTION-DEF ixp23xx_pci_read_config LOC=UNKNOWN VKEY=4944 */
static int ixp23xx_pci_read_config(struct pci_bus *bus , unsigned int devfn , int where ,
int size , u32 *value )
{
u32 n ;
u32 *addr ;
int tmp ;
int tmp___0 ;
unsigned long _TIG_FN_pHxe_1_ixp23xx_pci_read_config_next ;
{
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 4UL;
while (1) {
switch (_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next) {
case 4UL: ;
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 6UL;
break;
case 8UL: ;
return (PCIBIOS_SUCCESSFUL);
break;
case 3UL:
{
#line 66 "/tmp/forklift_obfu_goq0_e0n/input.c"
pci_master_aborts = (scalar_t__ )0;
#line 67
*value = (~ (*addr >> 8 * n) | *(bytemask + size)) - ~ (*addr >> 8 * n);
}
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 7UL;
break;
case 9UL:
{
#line 69
pci_master_aborts = (scalar_t__ )0;
#line 70
*value = (u32 )0xffffffff;
}
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 2UL;
break;
case 6UL:
{
#line 57
n = where % 4;
#line 59
tmp = PCI_FUNC(devfn);
#line 59
tmp___0 = PCI_SLOT(devfn);
#line 59
DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where, bus->number, tmp___0,
tmp);
#line 62
addr = ixp23xx_pci_config_addr(bus->number, devfn, where);
}
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 10UL;
break;
case 10UL: ;
if (! addr) {
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 0UL;
} else {
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 3UL;
}
break;
case 0UL: ;
return (PCIBIOS_DEVICE_NOT_FOUND);
break;
case 7UL: ;
if (pci_master_aborts) {
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 9UL;
} else {
_TIG_FN_pHxe_1_ixp23xx_pci_read_config_next = 8UL;
}
break;
case 2UL: ;
return (PCIBIOS_DEVICE_NOT_FOUND);
break;
default:
break;
}
}
}
}
/* END FUNCTION-DEF ixp23xx_pci_read_config LOC=UNKNOWN VKEY=4944 */ | 1,043,665,192 | train_synth_compilable |
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