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| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- |
MCS@51
| 8-BIT | | CONTROL-ORIENTED | | | MICROCONTROLLERS | | | | |
| ----- | --- | ---------------- | --- | --- | ---------------- | --- | --- | --- | --- |
Commercial/Express
8031AH18051AH18051AHP
8032N+18052N-I
8751W8751H-8
8751BW8752BI-I
| n HighPerformance | | HMOSProcess | | | n BooleanProcessor | | | | |
| ----------------- | ------------ | ----------- | -------- | --- | ------------------ | --- | --- | --- | --- |
| n | | | | | n Bit-Addressable | | RAM | | |
| Internal | Timers/Event | | Counters | | | | | | |
n 2-Level interrupt Priority Structure n ProgrammableFullDuplexSerial
Channel
| n 32 1/0 | Lines(Four | 8-Bit | Ports) | | | | | | |
| --------------- | ---------- | ------------- | ---------- | ----- | --------------------- | --------- | ---- | ------------- | ----- |
| | | | | | n 111Instructions(64 | | | Single-Cycle) | |
| n 64K | External | ProgramMemory | | Space | | | | | |
| | | | | | 64K External | | Data | Memory | Space |
| n Security | Feature | Protects | EPROMParts | | n | | | | |
| AgainstSoftware | | Piracy | | | n ExtendedTemperature | | | Range | |
| | | | | | (–40”C | to +85”C) | | | |
The MCS@51controllers areoptimizedforcontrol applications. Byte-processingandnumericaloperations on
smalldatastructuresarefacilitated byavarietyoffastaddressingmodesforaccessingtheinternal RAM.The
instructionsetprovidesaconvenient menuof8-bitarithmetic instructions,includingmultiplyanddivideinstruc-
tions. Extensiveon-chip support isprovided for one-bit variables asa separate data type, allowing direct bit
manipulation andtesting incontrol and logic systemsthat require Boolean processing.
The8751HisanEPROMversionofthe8051AH.Ithas4Kbytesofelectricallyprogrammable ROMwhichcan
beerasedwithultraviolet light.Hisfullycompatible withthe8051AHbutincorporates oneadditional feature:a
Program Memory Security bit that can be used to protect the EPROM against unauthorized readout. The
| 8751H-8isidentical | | to the 8751Hbutonlyoperates | | | upto 8 MHz. | | | | |
| ------------------ | --- | --------------------------- | --- | --- | ----------- | --- | --- | --- | --- |
The 8051AHP is identical to the 8051AH with the exception of the Protection Feature. To incorporate this
Protection Feature,programverification hasbeendisabledandexternal memoryaccesseshavebeen limited
to 4K.
The 8052AH is an enhanced version of the 8051AH. It is backwards compatible with the 8051AH and is
fabricated withHMOSIItechnology.The8052AHenhancements arelistedinthetablebelow.Alsorefertothis
| table for | the ROM,ROMlessand-EPROMversionsof | | | | each product. | | | | |
| --------- | ---------------------------------- | --- | -------- | ------ | ------------- | ------- | --- | --- | ---------- |
| | | | Intsrnal | Memory | | Timera/ | | | |
| Device | | | | | | | | | Interrupts |
Event Counters
| | | Program | | Data | | | | | |
| ------- | --- | --------- | --- | -------- | --- | -------- | --- | --- | --- |
| 8031AH | | none | | 128X8RAM | | 2x18-Bit | | | 5 |
| 8051AH | | 4KX8ROM | | 128X8RAM | | 2x16-Bit | | | 5 |
| 6051AHP | | 4KX6ROM | | 128X8RAM | | 2x16-Bit | | | 5 |
| 8751H | | 4KX8EPROM | | 128X8RAM | | 2x16-Bit | | | 5 |
| 8751H-8 | | 4KX8EPROM | | 128X6RAM | | 2x16-Bit | | | 5 |
| 6751BH | | 4KX8EPROM | | 128X8RAM | | 2x16-Bit | | | 5 |
| 8032AH | | none | | 256X6RAM | | 3x16-Bit | | | 6 |
| 6052AH | | 8KX8ROM | | 256X8RAM | | 3x16-Bit | | | 6 |
| 8752BH | | 8KX8EPROM | | 256X8RAM | | 3x16-Bit | | | 6 |
IIntelCorporationassumesnoresponsibilityfortheuseofanycircuit~otherthancircuitryembodiedinanIntelproduct.Noothercircuitpatent
licensesareimplied.InformationcontainedhereinsupersedespreviouslypublishedspecificationsontheaadavicesfromIntel.
| OINTELCORPORATION,1994 | | | | October | 1994 | | | OrderNumben272318-002 | |
| ---------------------- | --- | --- | --- | ------- | ---- | --- | --- | --------------------- | --- |
MCS” 51CONTROLLER
| | | | | | | MO-M 7 P2.&P27 | | | | |
| --- | --- | --- | --- | --- | --- | -------------- | --- | --- | --- | --- |
-
I
I
| | | fl | 13 | I I | | II | ,, | , | | |
| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- |
i JK2U
b
STACK
| | | | Acc | | | | POINTER | | | |
| --- | --- | --- | --- | --- | --- | --- | ------- | --- | --- | --- |
1==4
~M‘f2#fi+-oN,TMoD,TJ
L-J
| | | | | +1 | L“ | | | | | |
| --- | ---- | --- | --- | --- | --- | --- | ------ | --- | --- | --- |
| | I | | | <>1 | | I | | | | |
| | 1 | | | m l | | I | | | | |
| | | | | ... | ,,“ | , | | | | |
| | | | | 7 ’ | 7 | 1 . | . .. . | | | |
| | ‘% I | | | | | | 9 | | | |
PSEN
| | | TyG | g~ | | | | | | | |
| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- |
| | ALE | | | | | | | I | | |
E
| | RST-+ | | ‘* | | | | II | P0nT3 | | |
| --- | ----- | --- | --- | --- | --- | --- | --- | ----- | --- | --- |
n
119LATCH
| | h-+ | | | T | | | | | | |
| --- | --- | --- | --- | --- | --- | --- | --- | ---- | --- | --- |
| | | | | | | | 5 | 7 | | |
| | i- | | | | | | | Pm W | | I |
3
| | ,,(-1 | | | | | | | LHvI!RS ————— | —.. | J |
| --- | ----- | --- | --- | --- | --- | --- | --- | ------------- | --- | --- |
———————————
--%=2
| | | w | | PIO*1 | 7 | | | P]O-P37 | | |
| --- | --- | --- | --- | ----- | --- | --- | --- | ------- | --- | --- |
x
=
272318-1
| | | | | Figure | 1.MCSI@51Controller | | Block | Diagram | | |
| ------- | ---------------- | ------------- | --- | ------------- | ------------------- | -------- | ----- | ------- | --- | --- |
| PROCESS | | INFORMATION | | | | | | | | |
| The | 8031AH/8051AH | | and | 8032AH/8052AH | | devic- | | | | |
| es | are manufactured | | on | P414.1, | an HMOS | II pro- | | | | |
| cess. | The | 8751H/8751H-8 | | devices | are | manufac- | | | | |
tured on P421.X,anHMOS-Eprocess.The8751BH
| and | 8752BH | devices | are | manufactured | | on P422. | | | | |
| ---------- | ---------- | -------------------------------- | ---------- | ------------ | --- | ----------- | --- | --- | --- | --- |
| Additional | | processandreliabilityinformation | | | | isavail- | | | | |
| able | in Intel’s | ComponentQsuality | | | and | Reliability | | | | |
| Handbook, | | Order | No,210997. | | | | | | | |
| | | | | | MCS@51 | CONTROLLER |
| --- | --- | --- | --- | --- | ------ | ---------- |
PACKAGES
| Part | | Prefix | Package | Type | | |
| ------ | --- | ------ | ---------------- | ---- | ------- | ------- |
| | | | | | ‘ja | Ojc |
| 8051AH | | P | 40-PinPlasticDIP | | 45°chV | 16“C/W |
| 8031AH | | D | 40-PinCERDIP | | 4!5”CIW | 15“CAIV |
| 8052AH | | N | | | | |
| | | | 44-PinPLCC | | 46°C/W | 18°CfW |
8032AH
6752BH*
| 8751H | | D | 40-PinCERDIP | | 45”CIW | 45“CIW |
| ----- | --- | --- | ------------ | --- | ------ | ------ |
8751H-8
| 8051AHP | | P | 40-PinPlasticDIP | | 45”CIW | 16°CfW |
| ------- | --- | --- | ---------------- | --- | ------ | ------ |
| | | D | 40-PinCERDIP | | 45°c/w | 15“cfw |
| 8751BH | | P | 40-PinPlasticDIP | | 36”CIW | 12°cfw |
| | | N | 44-PinPLCC | | 47”C1W | 16”CfW |
NOTE:
*8752BHis36”/10”forD,and38”/22”forN.
All thermal impedance data isapproximate for static air conditions at IW of power dissipation. Values will
changedepending onoperating conditions andapplication. SeetheIntelPac/ragingHandbook (OrderNumber
240800) for adescription of Intel’sthermal impedance test methodology.
| ~“52’80320NL’ | | | ~ | | | |
| ------------- | --- | --- | --- | --- | --- | --- |
L
I’__”ll
{
| | T2 PI.’ | 1 | 40 | | | |
| --- | ------- | --- | --- | --- | --- | --- |
Vcc
| T2EX | P1.1 | 2 | 39 P’,’ ADO | | | |
| ---- | ---- | --- | ----------- | --- | --- | --- |
| | P1.2 | 3 | 38 | | | |
PO.1AD1
| | P1.3 | 4 | 37 PO.2A02 | | | |
| --- | -------- | --- | ------------ | --------------- | ---- | --- |
| | P1.4 | 5 | 36 PO.3A03 | | | |
| | P1.5 | 6 | 35 PO.4AD4 | | | |
| | P1,6 | 7 | 34 PO.5AD5 | PI.6 ::8:; | | |
| | ‘P1.7 16 | | 33 P06 AD’ | P*,7 .:,.: | | |
| | RST | 9 | 3 PO.7A07 | RST io; | | |
| | RU2 P3.O | 10 | 3 EIJvpp” | (Rxo)P3.O:ji: | | |
| | TXDP3.1 | 11 | ZALEIPROG” | neaslvsd** .1:; | 8X5X | |
| | INTOP3.2 | 12 | 29 | | | |
| | | | 3%FFI | fTXD)P3.1:ji; | | |
| | INT1P3,3 | 13 | 26 3 P2.7A15 | | | |
(INTo)P3.2 :!;;
| | TOP34 | 14 | 27 2 P2.6A14 | (INT1)P3.3 :j:; | | |
| --- | ------ | --- | ------------ | --------------- | --- | --- |
| | 11P3.5 | 15 | 26 3 P2.5A13 | | | |
fTo)P3.4:>!:
| | ~ P3.6 | 16 | 25 I P2.4A12 | | | |
| --- | ----------- | --- | ------------ | --- | --- | --- |
| | t% P3.7 | 17 | 24 1 P2.3Al1 | | | |
| | XTAL2 | 16 | 23 > P2.2AlO | | | |
| | XTAL1+1!9-- | | 22 3 P21A9 | | | |
| | ‘ss | | 21 X P20 A8 | | | |
272318-2
| | | DIP | | | PLCC | |
| --- | --- | --- | --- | --- | ---- | --- |
l EPROM only
| “*Donotconnect | reserved | pins. | | | | |
| -------------- | -------- | ----- | ------------------------- | ----------- | --- | --- |
| | | | Figure 2.MCS@51Controller | Connections | | |
3
MCS” 51 CONTROLLER
w
| | | | | | | Port 2 emits | the | high-order | address | | byte during |
| --- | --- | --- | --- | --- | --- | ------------ | --- | ---------- | ------- | --- | ----------- |
PIN DESCRIPTIONS
| | | | | | | fetches from | external | Program | Memory | | and during |
| --- | --- | --- | --- | --- | --- | ------------ | -------- | ------- | ------ | --- | ---------- |
Vcc: Supplyvoltage. accesses to external Data Memory that use 16-bit
| | | | | | | addresses | (MOVX | @DPTR).In | | this application | it |
| --- | --- | --- | --- | --- | --- | ---------- | -------- | --------- | ---- | ---------------- | -------- |
| | | | | | | usesstrong | internal | pullups | when | emitting | 1‘s.Dur- |
Vss: Circuitground.
| | | | | | | ingaccessestoexternal | | DataMemorythat | | | use8-bit |
| --- | --- | --- | --- | --- | --- | --------------------- | --- | -------------- | --- | --- | -------- |
Port O:PortOisan8-bitopendrainbidirectional 1/0 addresses(MOVX@Ri),Port2emitsthecontents of
port. Asan output port each pincan sink8 LSTTL the P2Special Function Register.
inputs.
| | | | | | | Port2alsoreceivesthe | | high-orderaddressbitsdur- | | | |
| --- | --- | --- | --- | --- | --- | -------------------- | --- | ------------------------- | --- | --- | --- |
PortOpinsthat have1‘swrittentothemfloat, andin ing programming of the EPROM parts and during
that state can beusedashigh-impedance inputs. programverification ofthe ROMand EPROMparts.
PortOisalsothe multiplexed low-orderaddressand The protection feature of the 8051AHPcauses bits
| | | | | | | P2.4through | P2.7tobeforced | | toO,effectively | | limit- |
| -------- | ------ | -------- | ----------- | ------- | --- | ----------- | -------------- | --- | --------------- | --- | ------ |
| data bus | during | accesses | to external | Program | and | | | | | | |
DataMemory.Inthisapplication itusesstronginter- ingexternalDataandCodespaceto4Keachduring
nal pullups when emitting 1‘s and can source and external accesses.
| sink8 LSTTL | inputs. | | | | | | | | | | |
| ------------------------ | ------- | --- | ------------------- | --- | --- | -------------------- | ---- | ----------- | ------------- | ------- | --------- |
| | | | | | | Port 3: Port3 | isan | 8-bit | bidirectional | l/O | port with |
| | | | | | | internal pullups.The | | Port3output | | buffers | cansink/ |
| PortOalsoreceivesthecode | | | bytesduringprogram- | | | | | | | | |
ming of the EPROM parts, and outputs the code source 4 LSTTL inputs. Port 3 pins that have 1‘s
bytes during program verification of the ROM and written to them are pulled high bythe internal pull-
EPROM parts. External pullups are required during UPS,and in that state can be used as inputs. As
| | | | | | | inputs, Port3 | pinsthat | areexternally | | pulled | lowwill |
| --- | --- | --- | --- | --- | --- | ------------- | -------- | ------------- | --- | ------ | ------- |
programverification.
sourcecurrent(IILonthedatasheet)becauseofthe
| Port 1:Port | 1isan | 8-bit bidirectional | | 1/0 | port with | pullups. | | | | | |
| ----------- | ----------- | ------------------- | --- | ------- | --------- | -------- | --- | --- | --- | --- | --- |
| internal | pullups,The | Port 1output | | buffers | cansink/ | | | | | | |
source 4 LS TTL inputs. Port 1 pins that have 1‘s Port 3 also serves the functions of various special
| | | | | | | features | ofthe MCS51Family,aslisted | | | | below: |
| ----------- | --------- | ------------- | ---------- | -------- | ---------- | -------- | -------------------------- | --- | --- | --- | ------ |
| written to | them | are pulled | high bythe | internal | pull- | | | | | | |
| UPS,and | in that | state can | be used | as | inputs. As | | | | | | |
| inputs,Port | 1pinsthat | areexternally | | pulled | lowwill | | | | | | |
Port
sourcecurrent(IILonthedatasheet)becauseofthe Alternative Function
Pin
internal pullups.
P3,0 RXD(serialinputport)
Port 1 also receives the low-order address bytes P3.1 TXD(serialoutputport)
| duringprogramming | | ofthe | EPROMpartsandduring | | | | | | | | |
| ----------------- | --- | ----- | ------------------- | --- | --- | --- | --- | --- | --- | --- | --- |
P3.2 INTO(externalinterruptO)
| programverification | | ofthe | ROMand | EPROMparts. | | | | | | | |
| ------------------- | --- | ----- | ------ | ----------- | --- | ---- | ---------------------- | --- | --- | --- | --- |
| | | | | | | P3,3 | INT1(externalinterrupt | | | 1) | |
P3.4 TO(TimerOexternalinput)
| In the 8032AH, | | 8052AH and | 8752BH, | Port | 1 pins | | | | | | |
| -------------- | --- | ---------- | ------- | ---- | ------ | --- | --- | --- | --- | --- | --- |
P3.5 T1(Timer1externalinput)
| P1.Oand | P1.1 | also serve | the T2 | and T2EX | func- | | | | | | |
| -------------------- | ---- | ---------- | ------ | -------- | ----- | ---- | --------------------------------- | --- | --- | --- | --- |
| tions, respectively. | | | | | | P3.6 | WR(externaldatamemorywritestrobe) | | | | |
| | | | | | | P3.7 | ~ (externaldatamemoryreadstrobe) | | | | |
| I | I | | | | | I | | | | | |
Port
Alternative Function RST:Resetinput.Ahighonthispinfortwo machine
Pin
| | | | | | | cycleswhile | the | oscillator | isrunning | resetsthe | de- |
| --- | --- | --- | --- | --- | --- | ----------- | --- | ---------- | --------- | --------- | --- |
P1.0
| | T2(Timer/Counter | | 2ExternalInput) | | | vice, | | | | | |
| --- | ------------------ | --- | --------------- | --- | --- | ----- | --- | --- | --- | --- | --- |
| | T2EX(Timer/Counter | | | 2 | | | | | | | |
P1.1
Capture/Reload Trigger) ALE/PROG: Address Latch Enableoutput pulsefor
latchingthelowbyteoftheaddressduringaccesses
| | | | | | | to external | memory. | This | pin is | also the | program |
| ------- | ----- | ------------------------ | --- | --- | --------- | ----------- | ------- | ------ | ----------- | -------- | ------- |
| Port 2: | Port2 | isan 8-bit bidirectional | | l/O | port with | | | | | | |
| | | | | | | pulse input | (PROG) | during | programming | | of the |
internal pullups.The Port2output buffers cansink/ EPROMparts.
| source 4 | LS TTL | inputs. Porl | 2 pins | that | have 1‘s | | | | | | |
| ---------- | ------- | ------------ | ---------- | -------- | ---------- | ------------- | ---------- | ---------------------- | ---------- | --- | ---------- |
| written to | them | are pulled | high bythe | internal | pull- | | | | | | |
| | | | | | | In normal | operation | ALE | is emitted | at | a constant |
| UPS,and | in that | state can | be used | as | inputs. As | | | | | | |
| | | | | | | rateof 1/6the | oscillator | frequency,andmaybeused | | | |
inputs, Port2 pinsthat areexternally pulled lowwill forexternal timing orclocking purposes. Note,how-
sourcecurrent(IILonthedatasheet)becauseofthe ever,that oneALEpulseisskippedduringeachac-
internal pullups.
| | | | | | | cessto external | | DataMemory. | | | |
| --- | --- | --- | --- | --- | --- | --------------- | --- | ----------- | --- | --- | --- |
| | | | | | | | MCS” | 51CONTROLLER | | |
| --- | --- | --- | --- | --- | --- | --- | ---- | ------------ | --- | --- |
w
PSEN:Program Store Enable isthe read strobe to To drive the device from an external clock source,
external ProgramMemory. XTAL1 should be grounded, while XTAL2 isdriven,
| | | | | | asshowninFigure4.Therearenorequirements | | | | | on |
| --- | --- | --- | --- | --- | --------------------------------------- | --- | --- | --- | --- | --- |
When the device is executing code from external thedutycycleofthe externalclock signal,sincethe
ProgramMemory,PSENisactivatedtwiceeachma- input to the internal clocking circuitry is through a
chine cycle, except that two PSENactivations are divide-by-two flip-flop, but minimum and maximum
skippedduringeachaccesstoexternal DataMemo- highandlowtimesspecifiedonthedatasheet must
beobserved.
ry
| ~/Vpp: | External | Access | enable | ~ must be | | | | | | |
| -------- | ------------- | ------ | ------ | ----------- | --- | --- | --- | --- | --- | --- |
| strapped | to VSSinorder | to | enable | anyMCS51de- | | | | | | |
EXTERNAL
vice to fetch code from external Program memory OSCILLATOR XTAL2
| locations | starting | at OOOOHupto | | FFFFH.~ must | | | | | | |
| --------- | -------- | ------------ | --- | ------------ | --- | --- | --- | --- | --- | --- |
SIGNAL
| bestrapped | to VCCfor | internal | program | execution. | | | | | | |
| ------------------- | ----------- | --------------------- | ---------- | -------------- | --- | --- | --- | --- | --- | --- |
| Note,however,that | | iftheSecurityBitinthe | | EPROM | | | | | | |
| devices is | programmed, | | the device | will not fetch | | | | | | |
| codefromanylocation | | inexternal | | ProgramMemory. | | | | | | |
XTAL1
| This pinalso | receivesthe | | programming | supplyvolt- | | | | | | |
| ------------------------- | ----------- | --- | ----------- | ----------- | --- | --- | --- | --- | --- | --- |
| age(VPP)duringprogramming | | | ofthe | EPROMparts. | | | | | Vss | |
El
| | | C2 | | I | | | | | | 272318-4 |
| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | -------- |
XTAL2
| | | | | | Figure | 4.External | | Drive Configuration | | |
| --- | --- | --- | --- | --- | ------ | ---------- | --- | ------------------- | --- | --- |
n
EXPRESSVersion
| | | | | | The IntelEXPRESSsystemoffersenhancements | | | | | to |
| --- | --- | --- | --- | --- | ---------------------------------------- | --- | --- | --- | --- | --- |
XTAL1
| | | | | | the operational | specifications | | of | the MCS51 | family |
| --- | --- | --- | --- | --- | --------------- | -------------- | --- | --- | --------- | ------ |
cl
| | | | | | of microcontrollers. | | These | EXPRESSproducts | | are |
| --- | --- | --- | --- | --- | -------------------- | ------- | --------- | --------------- | ------------------ | --- |
| | | | | | designed | to meet | the needs | of | those applications | |
Vss
| | | | | | whose operating | | requirements | exceed | commercial | |
| --- | --- | --- | --- | --- | --------------- | --- | ------------ | ------ | ---------- | --- |
| | = | | | | standards. | | | | | |
272318-3
Cl, C2= 30PF+10 PFforCrystals The EXPRESS program includes the commercial
ForCeramicResonatorscontactresonatormanufacturer. standardtemperature rangewithburn-in,andanex-
| | | | | | tended temperature | | rangewith | orwithout | | burn-in. |
| --- | ------------------- | --- | ----------- | --- | ------------------ | --- | --------- | --------- | --- | -------- |
| | Figure 3.Oscillator | | Connections | | | | | | | |
XTAL1: Inputtothe inverting oscillator amplifier. With the commercial standard temperature range,
| | | | | | operational | characteristics | | are guaranteed | | over the |
| ------------- | ---- | --- | --------- | ------------------- | ------------------ | --------------- | -------- | -------------- | ----------- | -------- |
| | | | | | temperature | range | of O“Cto | +70”C. | With | the ex- |
| XTAL2: Output | from | the | inverting | oscillator amplifi- | | | | | | |
| | | | | | tended temperature | | range | option, | operational | char- |
er,
| | | | | | acteristicsareguaranteedoverarangeof | | | | | –40”C to |
| --- | --- | --- | --- | --- | ------------------------------------ | --- | --- | --- | --- | -------- |
+85”C.
| OSCILLATOR | | CHARACTERISTICS | | | | | | | | |
| ------------------- | --- | --------------- | --------------- | ------- | ------------ | -------------------- | --------- | ---- | ------------ | -------- |
| | | | | | Theoptional | burn-inisdynamic,for | | | aminimumtime | |
| | | | | | of 160 hours | at | 125°Cwith | VCC= | 5.5V | * 0.25V, |
| XTAL1andXTAL2arethe | | | inputandoutput, | respec- | | | | | | |
tively, of an inverting amplifier which can beconfig- following guidelines inMIL-STD-883,Method 1015.
| ured for | use as | an on-chip | oscillator, | as shown in | | | | | | |
| -------- | ------ | ---------- | ----------- | ----------- | --- | --- | --- | --- | --- | --- |
Figure3.Eitheraquartzcrystalorceramicresonator PackagetypesandEXPRESSversionsareidentified
| | | | | | byaone-ortwo-letter | | prefixtothepartnumber.The | | | |
| ------------------- | ------- | ------------ | ----------- | ----------------- | ------------------- | ------ | ------------------------- | --- | --- | --- |
| maybeused. | More | detailed | information | concerning | | | | | | |
| | | | | | prefixesare | listed | inTable | 1. | | |
| the useoftheon-chip | | oscillator | isavailable | inAppli- | | | | | | |
| cation Note | AP-155; | “Oscillators | | for Microcontrol- | | | | | | |
Iers,” Order No,230659. For the extended temperature range option, this
| | | | | | data sheet | specifies | the | parameters | which | deviate |
| --- | --- | --- | --- | --- | ---------- | ---------- | ----------- | ---------- | ----- | ------- |
| | | | | | from their | commercial | temperature | | range | limits. |
| I | | | | | | | | | | 5 |
MCS@51CONTROLLER
| | | | Table | 1.EXPRESSPrefix | Identification | | | | |
| ------ | --- | ------- | ------- | --------------- | -------------- | ----- | --- | ------- | --- |
| Prefix | | Package | Type | | Temperature | Range | | Burn-In | |
| P | | | Plastic | | Commercial | | | | No |
| D | | | Cerdip | | Commercial | | | | No |
| N | | | PLCC | | Commercial | | | | No |
| TD | | | Cerdip | | Extended | | | | No |
| TP | | | Plastic | | Extended | | | | No |
| | | | PLCC | | Extended | | | | No |
TN
| LD | | | Cerdip | | Extended | | | Yes | |
| --- | --- | --- | ------- | --- | -------- | --- | --- | --- | --- |
| LP | | | Plastic | | Extended | | | Yes | |
NOTE:
ContactdistributororlocalsalesofficetomatchEXPRESSprefixwithproperdevice.
DESIGN CONSIDERATIONS l The 8051AHP cannot access external Program
Ifan8751BHor8752BH isreplacingan8751Hin or Data memory above 4K. This means that the
| | | | | | following | instructions | that | use the Data | Pointer |
| ---------------- | -------------- | ------------------ | --------- | ---- | --------------- | ------------ | ---------- | ------------ | ------- |
| a future design, | the | user should | carefully | com- | | | | | |
| | | | | | only read/write | data | at address | locations | below |
| pare both | data sheetsfor | DCorACCharacteris- | | | | | | | |
OFFFH:
| tic differences. | Note | that the | VIHand | IIHspecifi- | | | | | |
| ---------------- | ---- | --------- | ------------- | ----------- | ----------- | --- | --- | --- | --- |
| cationsforthe~ | | pindiffer | significantly | between | MOVXA,@DPTR | | | | |
the devices.
MOVX(6JDPTRA,
| Exposureto | light | when the | EPROMdevice | isin | | | | | |
| ---------- | ----- | -------- | ----------- | ---- | --- | --- | --- | --- | --- |
operation maycauselogicerrors.Forthisreason, When the Data Pointer contains an address
| it is suggested | that | an opaque | label | be placed | | | | | |
| ------------------ | ---- | --------- | --------- | --------- | --------------------- | --- | --------------------- | --- | --- |
| | | | | | abovethe4Klimit,those | | locationswillnotbeac- | | |
| overthe windowwhen | | the die | isexposed | to am- | | | | | |
cessed.
bient light.
| | | | | | To access | Data | Memory | above | 4K, the |
| --- | --- | --- | --- | --- | --------- | ------- | --------------------- | ----- | ------- |
| | | | | | MOVX | @Ri,Aor | MOVXA,@Riinstructions | | must |
beused.
6
| | | | | | | | | MCS” | 51CONTROLLER | |
| --- | --- | --- | --- | --- | --- | --- | --- | ---- | ------------ | --- |
ABSOLUTE MAXIMUM RATINGS* NOTICE:Thisisaproductiondatasheet.Itisvalidfor
| | | | | | the | devices | indicated | in the | revision | history.The |
| --- | --- | --- | --- | --- | --- | ------- | --------- | ------ | -------- | ----------- |
AmbientTemperature UnderBias –40”C to +85°C specificationsaresubjecttochangewithoutnotice.
StorageTemperature . –65°C to +150°C *WARNING:Stressingthedevicebeyondthe“Absolute
Voltage on EA/Vpp Pinto Vss Maximum Ratings” may cause permanent damage.
| | | | | | These | are | stress ratings | orr~. | Operation | beyond the |
| ------ | ----------- | ---- | ------- | --------- | ----------------------- | --- | -------------- | ----- | ----------- | ---------- |
| 8751H. | ........... | .... | . –0.5V | to +21.5V | | | | | | |
| | | | | | “OperatingConditions”is | | | not | recommended | and ex- |
8751BH/6752BH –0.5V tO + 13.OV tended exposure beyond the “Operating Conditions”
VoltageonAnyOtherPinto Vss . –0.5V to +7V mayaffectdevicereliabili~.
| PowerDissipation. | | | | . . ... 1.5W | | | | | | |
| ----------------- | ---------- | --- | ----------- | ------------ | --- | --- | --- | --- | --- | ----- |
| OPERATING | CONDITIONS | | | | | | | | | |
| Symbol | | | Description | | | Min | | Msx | | Units |
TA
| | | Ambient | Temperature | Under Bias | | | | | | |
| ------------------ | --------------- | ------------------- | -------------------------- | ---------- | --- | --------- | --- | ----- | ---- | ---------- |
| | | Commercial | | | | | o | +70 | | “c |
| | | Express | | | | –40 | | +65 | | “c |
| Vcc | | SupplyVoltage | | | | 4.5 | | 5.5 | | v |
| Fosc | | OscillatorFrequency | | | | 3.5 | | 12 | | MHz |
| DC CHARACTERISTICS | | | (OverOperatingConditions) | | | | | | | |
| All parameter | values | applyto | all devicesunlessotherwise | | | indicated | | | | |
| Symbol | | | Parameter | | | Min | Max | Units | Test | Conditions |
| VIL | InputLowVoltage | | (Except~ | Pinof | | –0.5 | 0.8 | v | | |
6751Hand8751H-8)
| VIL1 | InputLowVoltageto~ | | | Pinof | | o | 0.7 | v | | |
| ---- | ------------------ | --- | --- | ----- | --- | --- | --- | --- | --- | --- |
6751Hand8751H-8
| VIH | InputHighVoltage | | (ExceptXTAL2,RST) | | | 2.0 | Vcc | + 0.5 v | | |
| ---- | --------------------------- | --- | ----------------- | --- | --- | --- | ---- | ------- | ----- | ----- |
| VIH1 | InputHighVoltagetoXTAL2,RST | | | | | 2.5 | Vcc | + 0.5 v | XTAL1 | = Vss |
| VIH2 | InputHighVoltageto~ | | | pin | | 4.5 | 5.5V | | | |
of6751BHand8752BH
| VoL | OutputLowVoltage(Ports1,2, | | | 3)* | | | 0.45 | v | loL | = 1.6mA |
| ---- | --------------------------------- | --- | --- | ------------- | --- | --- | ---- | --- | ---- | ------- |
| VoLl | OutputLowVoltage(PortO,ALE,PSEN)* | | | | | | | | | |
| | | | | 8751H,8751H-8 | | | 0.60 | v | ioL | = 3.2mA |
| | | | | | | | 0.45 | v | !OL= | 2.4mA |
| | | | | AllOthers | | | 0.45 | v | IOL= | 3.2mA |
VOH OutputHighVoltage(Ports1,2,3, ALE,PSEN) 2.4 v IOH= –80 PA
| VOH1 | OutputHighVoltage(PortOin | | | | | 2.4 | | v | IOH= | –400 pA |
| ---- | ------------------------- | --- | --- | --- | --- | --- | --- | --- | ---- | ------- |
ExternalBusMode)
IIL LogicalOInputCurrent(Ports1,2,3, andRST) –500 pA VIN= 0.45V
| IILI | LogicalOInputCurrent(~) | | | | | | | | | |
| ---- | ----------------------- | --- | --- | --------------- | --- | --- | --- | --- | ---- | ----- |
| | | | | 8751Hand8751H-8 | | | –15 | mA | VIN= | 0.45V |
| | | | | 8751BH | | | –lo | mA | VIN= | Vss |
| | | | | 8752BH | | –lo | | mA | VIN= | Vss |
| | | | | | | | 0.5 | mA | | |
7
MCS” 51CONTROLLER
DC CHARACTERISTICS
(OverOperatingConditions)
| o~a—ra.m-.e.t.e—r | v.—alu.esarmrl.v,to.a-ll.devices | | | | | | | |
| ----------------- | -------------------------------- | --- | --------------- | --------- | ----------- | --- | --- | --- |
| All | | | unlessotherwise | indicated | (Continued) | | | |
_r
| Symbol | | Parameter | | Min | Max | Units | Teat Conditions | |
| ------ | --------------------------- | --------- | --- | --- | ------ | ----- | --------------- | --- |
| 11L2 | LogicalOInputCurrent(XTAL2) | | | | –3.2 | mA | VIN= 0.45V | |
| ILI | InputLeakageCurrent(PorfO) | | | | | | | |
| | 8751Hand8751H-8 | | | | * 1or) | pA | 0.45< VIN< | VCC |
| | AllOthers | | | | t 10 | pA | 0.45< VIN< | VCC |
IIH
Logical1InputCurrent(~)
| | 8751Hand8751H-8 | | | | 500 | pA | VIN= 2.4V | |
| --- | --------------- | --- | --- | --- | --- | --- | ----------- | ---- |
| | 8751BH/8752BH | | | | 1 | mA | 4.5V < VIN< | 5.5V |
IIH1 InputCurrenttoRSTtoActivateReset 500 pA VIN< (Vcc – 1.5V)
| Icc | PowerSupplyCurrent: | | | | | | | |
| --- | --------------------- | --- | --------- | --- | --- | --- | ------------- | --- |
| | 8031AH/8051AH/8051AHP | | | | 125 | mA | AllOutputs | |
| | 8032AH/8052AH/8751 | | BH/8752BH | | 175 | mA | Disconnected; | |
| | 8751H/8751H-8 | | | | 250 | | m = Vcc | |
mA
| Clo | PinCapacitance | | | | 10 | pF | Testfreq | = 1MHz |
| --- | -------------- | --- | --- | --- | --- | --- | -------- | ------ |
NOTES:
1. Capacitive loading on PortsOand 2 may csuse spurious noise pulses to be superimposed on the VOLSof ALE/PROG
isduetoexternalbuscapacitancedischargingintothePortOandPort2pinswhenthesepins
| and Ports | 1and 3.The noise | | | | | | | |
| --------- | ---------------- | --- | --- | --- | --- | --- | --- | --- |
make1-to-Otransitionsduringbusoperations.Intheworstcases(capacitiveloading> 100pF),thenoisepulseonthe
ALE/PROGpinmayexceed0.8V.InsuchcasesitmaybedesirabletoqualifyALEwithaSchmittTrigger,oruseanaddress
latchwithaSchmi~TriggerSTROBEinput.
2,ALE/PROGreferstoapinonthe8751BH.ALEreferstoatimingsignalthatisoutputontheALE/PROGpin.
3.Understeadystate(non-transientc)onditions,loLmustbeexternallylimitedasfollows:
| MaximumloLperportpin: | | | 10mA | | | | | |
| --------------------- | --- | --- | ---- | --- | --- | --- | --- | --- |
MaximumloLper8-bitpori-
Porto: 26mA
| | Ports1,2,and3: | | 15mA | | | | | |
| -------------------------------- | -------------- | --- | ---- | --- | --- | --- | --- | --- |
| MaximumtotaltoLforalloutputpins: | | | 71mA | | | | | |
IfloLexceedsthetestcondition,VOLmayexceedtherelatedspecificationP.insarenotguaranteedtosinkcurrentgreater
thanthelistedtestconditions.
8
MCS@51CONTROLLER
| | | | | | | L:~level | LOW,orALE | | | |
| ----------- | --- | --- | --- | ---------- | --- | -------- | --------- | --- | --- | --- |
| EXPLANATION | | OF | THE | AC SYMBOLS | | | | | | |
P:PSEN
| Eachtimingsymbolhas5characters.Thefirstchar- | | | | | | Q:Outputdata | | | | |
| -------------------------------------------- | --- | --- | --- | --- | --- | ------------ | --- | --- | --- | --- |
acter is always a ‘T’ (stands for time). The other R:~ signal
| characters, | depending | on | their | positions, | stand for | T:Time | | | | |
| ----------- | --------- | --- | ----- | ---------- | --------- | ------ | --- | --- | --- | --- |
V:Valid
| the name | of a signal | or | the logical | status | of that | | | | | |
| -------- | ----------- | --- | ----------- | ------ | ------- | --- | --- | --- | --- | --- |
W:WRsignal
| signal.Thefollowing | | isalistofallthecharactersand | | | | | | | | |
| ------------------- | --------- | ---------------------------- | --- | --- | --- | ---------------- | --- | ----- | ----- | --- |
| what they | standfor. | | | | | X:Nolongeravalid | | logic | level | |
Z: Float
A:Address
Forexample,
C:Clock
D:InputData
| H:Logiclevel | HIGH | | | | | TAVLL | = Timefrom | AddressValidto | | ALE Low. |
| ------------ | ---- | --- | --- | --- | --- | ----- | ---------- | -------------- | --- | -------- |
1:Instruction (program memorycontents) TLLPL = Timefrom ALE Lowto PSENLow.
AC CHARACTERISTICS (UnderOperatingConditions;LoadCapacitanceforPortO,ALE/PROG, and
| PSEN= 100pF;LoadCapacitanceforAllOtherOutputs | | | | | | = 80pF) | | | | |
| --------------------------------------------- | ---------------------- | --------- | ------ | --- | --------------- | ------- | --------- | ---------- | ------- | ------ |
| EXTERNAL | PROGRAM | | MEMORY | | CHARACTERISTICS | | | | | |
| | | | | | 12MHzOscillator | | Variable | Oscillator | | |
| Symbol | | Parameter | | | | | | | | Units |
| | | | | | Min | Max | Min | | Max | |
| 1/TCLCL | OscillatorFrequency | | | | | | 3.5 | | 12.0 | MHz |
| TLHLL | ALEPulseWidth | | | | 127 | | 2TCLCL–40 | | | ns |
| TAVLL | AddressValidtoALELow | | | | 43 | | TCLCL–40 | | | ns |
| TLLAX | AddressHoldafterALELow | | | | 48 | | TCLCL–35 | | | ns |
| TLLIV | ALELowtoValidInstrIn | | | | | | | | | |
| | 8751H | | | | | 183 | | | 4TCLCL– | 150 ns |
| | AllOthers | | | | | 233 | | | 4TCLCL– | 100 ns |
| TLLPL | ALELOW | toPSENLOW | | | 58 | | TCLCL–25 | | | ns |
| TPLPH | PSENPulseWidth | | | | | | | | | |
ns
| | 8751H | | | | 190 | | 3TCLCL–60 | | | |
| ----- | ------------------------ | --- | --- | --- | --- | --- | --------- | --- | -------- | ------ |
| | AllOthers | | | | 215 | | 3TCLCL–35 | | | ns |
| TPLIV | PSENLowtoValidInstrIn | | | | | | | | | |
| | | | | | | 100 | | | 3TCLCL– | 150 |
| | 8751H | | | | | | | | | ns |
| | AllOthers | | | | | 125 | | | 3TCLCL– | 125 ns |
| TPXIX | InputInstrHoldafterPSEN | | | | o | | 0 | | | ns |
| TPXIZ | InputInstrFloatafterPSEN | | | | | 63 | | | TCLCL–20 | ns |
ns
| TPXAV | PSENtoAddressValid | | | | 75 | | TCLCL–8 | | | |
| --------- | --------------------- | ---------------- | ------------- | --- | --- | ----- | ------- | --- | --------- | -------- |
| TAVIV | AddresstoValidInstrIn | | | | | | | | | |
| | 8751H | | | | | 287 | | | 5TCLCL–1 | 50 ns |
| | | | | | | 302 | | | 5TCLCL–1 | 15 |
| | AllOthers | | | | | | | | | ns |
| TPLAZ | PSENLowtoAddressFloat | | | | | 20 | | | 20 | ns |
| TRLRH | ~ | PulseWidth | | | 400 | | 6TCLCL– | 100 | | ns |
| TWLWH | WRPulseWidth | | | | 400 | | 6TCLCL– | 100 | | ns |
| TRLDV | ~ | LowtoValidDataIn | | | | 252 | | | 5TCLCL– | 165 ns |
| | | | | | o | | | 0 | | ns |
| TRHDX | DataHoldafter~ | | | | | | | | | |
| TRHDZ | DataFloatafter~ | | | | | 97 | | | 2TCLCL–70 | ns |
| TLLDV | ALELowtoValidDataIn | | | | | 517 | | | 8TCLCL–1 | 50 ns |
| -.. .. .. | . ,, | | .,–,.,-—.—,.– | | | .,.- | | | nl-n, n, | .ec -- |
| IAVUV | IAaaress10valla | | Ua[am | | I | I DUD | I | I | YI~LUL— | 103 I rm |
9
MCS@51CONTROLLER
| EXTERNAL | PROGRAM | MEMORY | CHARACTERISTICS | | | |
| -------- | ------- | ------ | --------------- | --- | --- | --- |
(Continued)
| | | | I---%ci#llator | VariableOscillator | | |
| ------ | --------- | --- | -------------- | ------------------ | --- | ----- |
| Symbol | ‘arame’er | | | | | Units |
Max
| | | | | Min | Max | |
| ----- | ----------------- | ------- | ------- | --------- | ------- | ----- |
| TLLWL | ALELowtoRDorWRLow | | 200 300 | 3TCLCL–50 | 3TCLCL+ | 50 ns |
| TAVWL | Addressto~ | orWRLow | 203 | 4TCLCL– | 130 | ns |
I
| TQVWX | DataValidtoWRTransition | | | | | |
| ----- | ----------------------- | --- | ------ | -------- | -------- | ----- |
| | 8751H | | 13 | TCLCL–70 | | ns |
| | AllOthers | | 23 | TCLCL–60 | | ns |
| TQVWH | DataValidtoWRHigh | | 433 | 7TCLCL– | 150 | ns |
| TWHQX | DataHoldafterWR | | 33 | TCLCL–50 | | ns |
| | | | 20 | I | I 20 | I |
| TRLAZ | RDLowtoAddressFloat | | | | | ns I |
| TWHLH | RDorWRHightoALEHigh | | | | | |
| | 8751H | | 33 133 | TCLCL–50 | TCLCL+ | 50 ns |
| | AllOthers | | 43 123 | TCLCL–40 | TCLCL+40 | ns |
NOTE:
“The8751H-8isidenticaltothe8751Hbutonlyo~eratesutIto8MHz.WhencalculatingtheACCharacteristicsforthe
| 8751 H-8, use | the 8751 Hformula | for variable oscillators. | | | | |
| ------------- | ----------------- | ------------------------- | --- | --- | --- | --- |
10
MCS@51CONTROLLER
| EXTERNAL | PROGRAM | | MEMORY | READ | CYCLE | | | | |
| -------- | ------- | --- | ------ | ---- | ----- | --- | --- | --- | --- |
w--- TLHLL_
| | ALE | | | \ , | | | | | |
| --- | --- | --- | ------- | ------- | ----- | --- | --- | --- | --- |
| | | | | | | / | \ | | |
| | | | | TLLPL-~ | TPLPH | | | | |
| | | | -TAVLL+ | + TLLIV | | | | | |
PSEN
/
TLLAX
PORTO
| | | | x1 | AO | | x | | | |
| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- |
A8-A15
| | PORT2 | | | | -A15 | | | | |
| --- | ----- | --- | --- | --- | ---- | --- | --- | --- | --- |
272318-5
| EXTERNAL | DATA | MEMORY | | READ | CYCLE | | | | |
| -------- | ---- | ------ | --- | ---- | ----- | --- | --- | --- | --- |
ALE
| | | Y | | | | | | \ | / |
| --- | ------- | --- | --- | --- | --- | --- | ----- | --- | --- |
| | +TLHLL+ | | | | | | TWHLH | | |
PSEN
‘LLOv~
| | | — | TLLWL | | TRLRH | –— | | | |
| --- | --- | --- | ----- | --- | ----- | --- | --- | --- | --- |
m
| | + | TAVLL + | | b | | i ‘ | | | |
| --- | --- | ------- | --- | --- | --- | --- | --- | --- | --- |
—TRLDV4
| | | _TLLAX | | | | TRHOX+ | | | |
| ----- | --- | ----------------- | --- | --- | --- | ------ | --- | --- | --- |
| PORTO | | AO-A7 FROMRIOROPL | | | | OATAIN | | | |
.
| | . | | | TAVOV | | b | | | |
| --- | --- | --- | --- | ----- | --- | --- | --- | --- | --- |
x
| | | | | | | | | A8-A15 FROMPCH | |
| ----- | --- | --- | --------- | -------- | ------- | --- | --- | -------------- | --- |
| PORT2 | xr | | P2.O-P2.7 | ORA8-A15 | FROMDPH | | | | |
272318-6
| EXTERNAL | DATA | MEMORY | | WRITE | CYCLE | | | | |
| -------- | ---- | ------ | --- | ----- | ----- | --- | --- | --- | --- |
ALE
| | | \ , | | | | | | \ | / |
| --- | ------ | --- | --- | --- | --- | --- | ----- | --- | --- |
| | TLHLL— | | | | | | TWHLH | | |
m
/
| | | ‘TLLwL~TwLwH | | | | * | | | |
| ----- | ------ | ------------ | --------- | ----------- | ------- | --- | ----- | -------------- | --- |
| WT | 1TAVLL | | | | | | | | |
| | | | | 7t=TQV-WX k | | 1 ‘ | | | |
| | | +TLLAX | | | | | TWHQX | | |
| | | | | | TQVWH | : | r | | |
| | | | | II I | | | x1 x | | |
| | | A | O -A 7 | | OATAOUT | | AO-A7 | FROMFCL | |
| PORTO | | FROM R | IO R OPL | M | | | | | |
| | xI | | | | | | x | | |
| PORT2 | | | P2.O-P2.7 | ORA8-A15 | FROMOPH | | | A8-A15 FROMPCH | |
272318-7
11
M=” 51CONTROLLER
| SERIAL | PORT TIMING—SHIFT | | | | | | | | |
| ------ | ----------------- | --- | --- | --- | --- | --- | --- | --- | --- |
TestConditions: OverODeratinaConditions: LoadCapacitance = 80 rJF
| | | | 12MHzOscillator | | | VariableOscillator | | | |
| ------ | ---------------------------- | --- | --------------- | --- | ----------- | ------------------ | --- | --- | ----- |
| Symbol | Parameter | | | | | | | | Unite |
| | | | | Min | Max | Min | | Max | |
| TXLXL | SerialPortClockCycleTime | | | 1.0 | | 12TCLCL | | | ps |
| TQVXH | OutputDataSetuptoClockRising | | | 700 | 1OTCLCL–133 | | | | ns |
Edge
| TXHQX | OutputDataHoldafterClock | | | 50 | | 2TCLCL–1 | 17 | | ns |
| ----- | ------------------------ | --- | --- | --- | --- | -------- | --- | --- | --- |
RisingEdge
| TXHDX | InputDataHoldafterClockRising | | | o | | 0 | | | ns |
| ----- | ----------------------------- | --- | --- | --- | --- | --- | --- | --- | --- |
Edge
| TXHDV | ClockRisingEdgetoInputData | | | | 700 | | 10TCLCL– | | 133 ns |
| ----- | -------------------------- | --- | --- | --- | --- | --- | -------- | --- | ------ |
Valid
;HI17REGISTERMODETIMINGWAVEFORMS
| INSTRUCTIONI | O | I 1 I 2 | I | 3 I | 4 I | 5 I | 6 I | 7 I | 8 I |
| ------------ | --- | ------- | --- | --- | --- | --- | --- | --- | --- |
| | n n | n n n | n n | n n | n n | n n | n n | n n | n I |
ALE
I-TXLXL-7
CLOCK
| | | WI-TXHQX | I | | | | | | |
| ---------- | --- | -------- | --- | --- | --- | --- | --- | --- | --- |
| | | o 1)( 1 | | 2 | 3 | 4 | 5 | 6 | 7 |
| OUTPUTOATA | | | | x | x | x | x | x | / |
| , | | | | | | | | | + |
SETTI
INPUTDATA
4
~
SE TRI
272318-8
12
MCS@51CONTROLLER
| EXTERNAL | CLOCK | DRIVE | | | | | | |
| -------- | ----- | ----- | --- | --- | --- | --- | --- | --- |
1
| Symbol | | | Parameter | | | Min | Max | Units |
| ------- | --- | ---------------------------------- | --------- | --- | --- | --- | --- | ----- |
| 1/TCLCL | | OscillatorFrequency(except8751H-8) | | | | 3.5 | 12 | MHz |
| | | 8751H-8 | | | | 3.5 | 8 | MHz |
| TCHCX | | HighTime | | | | 20 | | ns |
| TCLCX | | LowTime | | | | 20 | | ns |
I
| I TCLCH | I | RiseTime | | | | | I 20 | I ns I |
| -------- | ----- | -------------- | --- | --------- | ----- | --- | ---------- | ------ |
| TCHCL | | FallTime | | | | | 20 | ns |
| EXTERNAL | CLOCK | DRIVE WAVEFORM | | | | | | |
| | | | | | — | | — ~ TCliCL | |
| | | — TCHCX— | | TCLCH_ | | | | |
| | | t | | | | | A | |
| | 2.5 | | | a | t | 2.5 | | |
| | | | | -— TCLCX— | | | | |
| | | | | + | TCLCL | | w | |
272318-9
| AC TESTING | INPUT,OUTPUTWAVEFORM | | | | | | | |
| ---------- | -------------------- | --- | --- | --- | --- | --- | --- | --- |
| 2.4 | 2.0 | | 2.0 | | | | | |
TESTPOINTS
><
| 0.45 | 0.s | | 0.8 | | | | | |
| ---- | --- | --- | --- | --- | --- | --- | --- | --- |
272318-10
ACTesting:Inputsaredrivenat2.4VforaLogic“1”and0.45V
| foraLogic“O”.Timingmeasurementsara | | | madeat2.OVfora | | | | | |
| ---------------------------------- | --- | --- | -------------- | --- | --- | --- | --- | --- |
Logic“1”and0.8VforaLogic“O”.
MCS@51CONTROLLER
EPROM CHARACTERISTICS
Table3.EPROMProgrammingModea
Mode RST PSEN ALE m P2.7 P2.6 P2.5 P2.4
Program 1 0 o* VPP 1 0 x x
Verify 1 0 1 1 0 0 x x
SecuritySet 1 0 o* VPP 1 1 x x
NOTE:
“1” = logichighforthatpin “VPP”= +21V *0.5V
“O”= logiclowforthatpin *ALEispulsedlowfor50ms
“X” = “don’tcare”
PROGRAMMINGTHE 8751H Notethatthe~/VPP pinmustnotbeallowedtogo
abovethe maximumspecifiedVPPlevelof21.5Vfor
To beprogrammed, the part mustberunningwitha anyamount oftime. Evenanarrowglitchabovethat
4 to 6 MHz oscillator. (The reason the oscillator voltage Ieveican cause permanent damage to the
needsto berunning isthat the internal busisbeing device. The VPP source should be well regulated
usedtotransferaddressandprogramdatatoappro- andfree of glitches.
priate internal registers.)TheaddressofanEPROM
location to be programmed isapplied to Port 1and
ProgramVerification
pins P2.O-P2.3 of Port2,while the code byteto be
programmed into that location is applied to Port O.
IftheSecurityBithasnotbeenprogrammed,theon-
Theother Porl2pins,and RST,PSEN,and~/Vpp
chip Program Memory can be read out for verifica-
should beheld atthe “Program” levels indicated in
tion purposes, if desired, either during or after the
Table3.ALE/PROG ispulsed lowfor50msto pro-
programmingoperation.TheaddressoftheProgram
gram the code byte into the addressed EPROMlo-
Memorylocation to bereadisappiied to Port 1and
cation.The setupisshown inFigure5.
pinsP2.O-P2.3.Theotherpinsshouldbeheldatthe
“Verify” Ieveisindicated inTabie 3.Thecontents of
Normally ~~is held at a logic highflntil just
the addressed location will come out on PortO.Ex-
before ALE/PROG isto bepulsed.Then EA/Vpp is
ternal pullups are required on PortOfor this opera-
raised to +21V, ALE/PROG is pulsed, and then
tion.
~/Vpp isreturned to a logic high.Waveforms and
detailed timing specifications areshowninlatersec- The setup,which isshown in Figure6,isthe same
tions of thisdata sheet. asforprogrammingtheEPROMexceptthatpinP2.7
isheld at alogic low,or maybe usedasanactive-
Iowreadstrobe
+5V
Vcc +5V
AOOR A&b? p? ?
—FFH w PGMDATA Vcc
P2.0–
U–All P2.3 mu
‘=a ’’-”87T51H‘LCEAlR=$E—F=FHJ-=E w + D
(U
A
S
T
E
A
10K
PULLUPS]
W51H
U ~. ,,W,, CARE,. x- ~~b
Vlli P2.7 X-9 P2.5 ALE
XTAU 5 F&vPP VILd P2.S VIH
4-SUN* n ENAS4E . P27 G
XTAU
XTAL1 RST VIH1 J-
4-6MHZm RSTh VIH1
Vss PSEN XTAL1
. . Vss PSEN
27231a-1 I .
Figure5.ProgrammingConfiguration 27231S-12
Figure6.ProgramVerification
14
MCS@51CONTROLLER
EPROMSecurity
+
5V
X=OGN’TCARE”
Thesecurityfeatureconsistsofa‘locking” bitwhich f o
when programmed denies electrical access by any
Vcc
external means to the on-chip Program Memory. PI
‘-
The bit is programmed as shown in Figure 7. The
setup and procedure are the same as for normal m x
P2.0-
EPROMprogramming, except that P2.6isheld ata X P2.3
logichigh,PorlO,Port1andpinsP2.O–P2.3maybe 8751H
in any state. The other pins should be held at the P2.4 ALE ALE/PROO
“Security” levelsindicated inTable 3. 50maPULSE TOGND
{: P2.5
P2.6
Oncethe SecurityBithasbeen programmed, itcan VIM
P2,7 fi + EAYPP
becleared onlybyfullerasureofthe ProgramMem-
XTAU
ory. While it is programmed, the internal Program
Memorycan not bereadout,the device cannot be m RST — WH1
further programmed, anditcannotexecuteoutof XTAL1
externalprogrammemory.Erasing the EPROM, Vss PSEN 7
thus clearing the Security Bit, restores the device’s * *
full functionality. Itcanthen be reprogrammed.
272318-13
Figure7.ProgrammingtheSecurityBit
ErasureCharacteristics
The recommended erasure procedure is exposure
Erasure of the EPROM begins to occur when the
toultravioletlight(at2537Angstroms)toanintegrat-
device isexposed to light with wavelengths shorter
ed dose of at least 15 W-sec/cm2. Exposing the
than approximately 4,000Angstroms. Sincesunlight
EPROM to an ultraviolet lamp of 12,000 pW/cm2
and fluorescent lighting have wavelengths in this
rating for 20 to 30 minutes, at a distance of about
range, exposure to these light sources over an ex-
1inch,should besufficient.
tended time (about 1week insunlight, or3yearsin
room-levelfluorescent lighting)couldcauseinadver-
Erasureleavesthe arrayinanall 1‘sstate.
tent erasure.Ifanapplication subjectsthe deviceto
thistypeofexposure,itissuggestedthat anopaque
label beplaced overthe window.
EPROM PROGRAMMING AND VERIFICATION CHARACTERISTICS
TA = 21°Cto 27”C;VCC = 5V +10%; VSS = OV
Symbol Parameter Min Max Unita
VPP ProgrammingSupplyVoltage 20.5 21.5 v
IPP ProgrammingSupplyCurrent 30 mA
1/TCLCL OscillatorFrequency 4 6 MHz
TAVGL AddressSetuptoPROGLow 46TCLCL
TGHAX AddressHoldafterPROG 48TCLCL
TDVGL DataSetuptoPROGLow 48TCLCL
TGHDX DataHoldafter~ 48TCLCL
TEHSH P2.7(ENABLE)HightoVPP 48TCLCL
TSHGL VPPSetuptoPROGLow 10 ps
TGHSL VPPHoldafterPROG 10 ps
TGLGH PROGWidth 45 55 ms
TAVQV AddresstoDataValid 48TCLCL
TELQV ENABLELowtoDataValid 48TCLCL
TEHQZ DataFloatafterENABLE o 48TCLCL
15
MCS” 51CONTROLLER
| GI-” ”nlr“”” | ”mrnmrlmn. w | I-8. ” ,Lrl.. | .“4-s . m“.. ..-. b. “..8.,” |
| ------------ | ------------ | ------------- | ---------------------------- |
PROGRAMMING VERIFICATION
P1.O-PI.7
P3,0-P3,3 ( ADDRESS
| | | $ | J |
| --- | --- | --- | --- |
—
| PORTO | | DATAIN | |
| ----- | ------ | ------ | ------- |
| | | { , | |
| | TOVGL— | — | —TGHOX |
| | TAVGL | | — TGHAX |
kLE/PROG
| | | \ ~ | ‘ |
| --- | ------ | --- | ------- |
| | TSHGL— | — | — TGHSL |
TGLGH
21V* .5V
r
\
m HIGH TTLHIGH TTLHIGH
Fi.vPP
TSHSN
— TELOV
P3.7
(ENABLE) \
1 ‘
272318-14
ForprogrammingconditionsseeFigure5. ForverificationconditionsseeFigure6.
16
inlA
| | | | | | | MCS” | 51CONTROLLER | |
| --- | --- | --- | --- | --- | --- | ---- | ------------ | --- |
Programmingthe 8751BH/8752BH Normally ~&is held at a logic high until just
| | | | | | before ALE/PROG | isto bepulsed.Then~/Vpp | | is |
| --- | --- | --- | --- | --- | --------------- | ----------------------- | --- | --- |
To be programmed, the 875XBH must be running raised to Vpp,ALE/PROG is pulsed low, and then
| | | | | | ~/Vpp isreturnedto | avalidhighvoltage. | | Thevolt- |
| ----------------------- | --- | --- | --------------------- | --- | ------------------ | ------------------ | --- | -------- |
| witha4to6MHzoscillator. | | | (Thereasontheoscilla- | | | | | |
tor needs to be running is that the internal bus is ageonthe~/Vpp pinmustbeatthevalidEA/Vpp
beingusedto transfer addressand programdatato high level before a verify is attempted. Waveforms
appropriate internal registers.) The address of an anddetailed timing specifications areshowninlater
EPROM location to be programmed is applied to sections of thisdata sheet.
| Porl 1andpinsP2.O-P2.4of | | | Port2,whilethe | code | | | | |
| ------------------------ | --- | --- | -------------- | ---- | --- | --- | --- | --- |
byteto beprogrammed into that location isapplied Notethatthe~/Vpp pinmustnotbeallowedtogo
to Port O.The other Port 2 and 3 pins, and RST, above the maximum specified Vpp level for any
PSEN,and~/Vpp shouldbeheldatthe “Program” amountoftime.Evenanarrowglitchabovethatvolt-
levelsindicatedinTable 1.ALE/PROG ispulsedlow age level can cause permanent damage to the de-
| | | | | | vice.The Vppsource | should bewell | | regulated and |
| ---------- | --- | ---- | ------------- | --------- | ------------------ | ------------- | --- | ------------- |
| to croaram | the | code | bvte into the | addressed | | | | |
EPROfl location. The setu’pisshowninFigure8. free of glitches.
+5V
Vcc
Po
1~
| | | | | RST | E/vpp ~ +12.75V | | | |
| --- | --- | --- | --- | ------ | --------------- | ----------------- | --- | --- |
| | | | | | ALE/PROG~25 | 100p, PULSESTOGND | | |
| | | | 1~ | P3.6 | | | | |
| | | | | 875X,, | ~ ~“ | | | |
| | | | 1~ | P3.7 | | | | |
| | | | | | P2.7 ~1 | | | |
| | | | | XTAL2 | P2.6 ~o | | | |
qlJ-
4-6 MHz
| | | | T= ; | | | | | |
| --- | --- | --- | ---- | --- | --- | --- | --- | --- |
XTAL1 P2.O
-P2,4
‘ks
| | | | = | | | | 272318-15 | |
| --- | --- | --- | ---------------------- | --- | ----- | --- | --------- | --- |
| | | | —. | — | | | | |
| | | | Figure8.Programmingthe | | EPROM | | | |
Table4.EPROMProgrammingModeafor875XBH
| | | | | | ALE/ ml | | | |
| ---------------------- | ---- | --- | --- | ---- | -------- | --------- | ---- | ---- |
| | MODE | | RST | PSEN | — | P2.7 P2.6 | P3.6 | P3.7 |
| | | | | | PROG Vpp | | | |
| ProgramCodeData | | | 1 | 0 | o* Vpp | 1 0 | | 1 1 |
| VerifyCodeData | | | 1 | 0 | 1 1 | 0 0 | | 1 1 |
| ProgramEncryptionTabie | | | 1 | 0 | o* Vpp | 1 0 | 0 | 1 |
UseAddressesO-1FH
| ProgramLock | | ~= 1 | 1 | 0 | o* Vpp | 1 1 | | 1 1 |
| ------------- | --- | ---- | --- | --- | ------ | --- | --- | --- |
| Bits(LBx) | | x=2 | 1 | 0 | o* Vpp | 1 1 | 0 | 0 |
| ReadSignature | | | 1 | 0 | 1 1 | 0 0 | 0 | 0 |
NOTES:
“1” = Validhighforthatpin
“O”= Validlowforthatpin
“vpp” = +12.75V+0.25V
*ALE/PROGispulsedlowfor100USforprogramming(.Quick-PulseProgramming)
17
MCS@51CONTROLLER
| QUICK-PULSE | PROGRAMMING | | | | PROGRAM | VERIFICATION | | | |
| ----------- | ----------- | --- | --- | --- | ------- | ------------ | --- | --- | --- |
ALGORITHM
| | | | | | Ifthe LockBitshavenotbeenprogrammed, | | | | the on- |
| ---------- | ----------------- | --- | -------- | ------ | ------------------------------------ | ------ | ----------- | ------- | --------- |
| | | | | | chip Program | Memory | can be read | out for | verifica- |
| The 875XBH | can be programmed | | usingthe | Quick- | | | | | |
Pulse Programming Algorithm for microcontrollers. tion purposes, if desired, either during or after the
Thefeatures ofthe newprogramming method area programmingoperation.TheaddressoftheProgram
lowerVpp(12.75voltsascompared to21volts)and Memorylocation to bereadisapplied to Port 1and
ashorter programming pulse.Forexample,itispos- pins P2.O- P2.4.The other pins should be held at
| | | | | | the “Verify” | levels | indicated in | Table 1. | The con- |
| -------- | ------------------ | -------- | --- | ------ | ------------ | ------ | ------------ | -------- | -------- |
| sible to | program the entire | 8 Kbytes | of | 875XBH | | | | | |
EPROM memory in lessthan 25 seconds with this tentsoftheaddressedlocationwillcomeoutonPort
| algorithm! | | | | | O.External | pullups | are required | on Port | Ofor this |
| ---------- | -------------- | -------------- | --- | --- | ---------- | ------------------ | ------------ | ------- | --------- |
| | | | | | operation. | (If the Encryption | Array | in the | EPROM |
| | | | | | has been | programmed, | the data | present | at Port O |
| To program | the part using | the new~rithm, | | Vpp | | | | | |
must be 12,75 f 0.25 Volts. ALE/PROG is pulsed willbeCode DataXNOREncryption Data.The user
low for 100 pseconds, 25 times as shown in mustknowthe EncryptionArraycontents tomanual-
Figure 9, Then, the byte just programmed may be ly“unencrypt” the data duringverify.)
| verified. After | programming, | the entire | arrayshould | | | | | | |
| --------------- | ------------ | ------------- | ----------- | -------- | -------------- | ----------------------- | --- | --- | ---- |
| | | | | | Thesetup,which | isshowninFigure10,isthe | | | same |
| be verified. | The Program | Lock features | | are pro- | | | | | |
asforprogrammingtheEPROMexceptthatpinP2.7
grammedusingthesamemethod,butwiththesetup
asshowninTable4.Theonlydifference inprogram- isheld at a logic low,or maybe used as an active
mingLockfeatures isthat the Lockfeatures cannot low readstrob~.
| be directly | verified. Instead,verification | | of | program- | | | | | |
| ---------------------------------- | ------------------------------ | --- | ----------- | -------- | --- | --- | --- | --- | --- |
| mingisbyobservingthattheirfeatures | | | areenabled. | | | | | | |
| | | | ~25p”LsEs | | ~ | | | | |
,
ALEM
n--------
| | | | | 10P,MIN | | 100JM | | | |
| --- | --- | --- | --- | ------- | --- | ----- | --- | --- | --- |
| | | | | | I | *lops | | | |
“
1
ALE/PROG:
0
272318-16
Figure9.PROGWaveforma
+~v
‘r-h
F’
10kJl
X8
Vcc
P G M
| | | | AO-A7 | P! | Po | D AT A | | | |
| --- | --- | --- | ----- | --- | ------- | ------ | --- | --- | --- |
| | | | | RST | rmpp | | | | |
| | | | | | ALE/PRW | 1 | | | |
P3.6
| | | | | | B75xBH = | 0 | | | |
| --- | --- | --- | --- | ---- | -------- | ------- | --- | --- | --- |
| | | | 1 | P3.7 | | | | | |
| | | | | | P2.7 | 0 (i-mm | | | |
L
| | | | | XTAL2 | P2.6 | 0 | | | |
| --- | --- | --- | --- | ----- | ---- | --- | --- | --- | --- |
q
4-6 MHz
P2.O
| | | | | XTAL1 | | A8-A12 | | | |
| --- | --- | --- | --- | ----- | --- | ------ | --- | --- | --- |
-P2.4
Vss
F
=
272318-17
Figure10.VerifyingtheEPROM
18
MCS@51CONTROLLER
| PROGRAM | MEMORY | | LOCK | | | | Table5.LockBitsandtheirFeatures | | | | |
| --------------- | -------- | ---------- | ------ | ---------- | ----- | --- | ------------------------------- | -------------------------- | ------------ | --- | --- |
| The two-level | Program | Lock | system | consists | of 2 | | | | LogicEnabled | | |
| Lockbitsand | a32-byte | Encryption | | Arraywhich | are | LB1 | | | | | |
| used to protect | the | program | memory | against | soft- | | | | | | |
| ware piracy. | | | | | | | u | MinimumProgramLockfeatures | | | |
enabled.(CodeVerifyWIIIstillbe
=
| ENCRYPTION | | ARRAY | | | | | | | | | |
| ---------- | ---------------------- | ----- | --- | ---------- | --- | --- | --- | ------------------------------ | --- | --- | --- |
| | | | | | | | P | u MOVCinstructionsexecutedfrom | | | |
| Within the | EPROMarrayare32bytesof | | | Encryption | | | | | | | |
externalprogrammemoryare
Arraythat are initially unprogrammed (all 1s).Every disabledfromfetching codebytes
time that a byte isaddressed during a verify, 5 ad- frominternalmemory,EAis
| dress linesareusedto | | select | abyteofthe | | Encryp- | | | | | | |
| -------------------- | --- | ------ | ---------- | --- | ------- | --- | --- | --- | --- | --- | --- |
sampledandlatchedonreset,
| tion Array. | This | byte is | then exclusive-NORed | | | | | | | | |
| ----------- | -------- | ------- | -------------------- | ------------ | --- | --- | --- | ---------- | ---------------- | --- | --- |
| | | | | | | | | andfurther | programmingofthe | | |
| (XNOR)with | the code | byte, | creating | an Encrypted | | | | | | | |
EPROMisdisabled
| Verify byte.The | algorithm, | | with the | arrayinthe | un- | | I | | | | |
| -------------------- | ---------- | ------------- | --------- | ---------- | ----- | --- | --- | ----------------------------- | --- | --- | --- |
| | | | | | | | P | P Sameasabove,butVerifyisalso | | | |
| programmed | state | (all 1s),will | returnthe | code | inits | | | | | | |
| original, unmodified | | form. | | | | | | disabled | | | |
I
| | | | | | | | U | P IReservedfor | FutureDefinition | | I |
| --------------- | -------- | --------------- | -------- | ------------- | ------- | --- | ------------ | -------------- | ---------------- | --- | --- |
| Itisrecommended | | thatwheneverthe | | EncryptionAr- | | | | | | | |
| ray is used, | at least | one of | the Lock | Bits | be pro- | = | Programmed | | | | |
| | | | | | | = | Unprogrammed | | | | |
grammed aswell.
| | | | | | | READING | | THE SIGNATURE | | BYTES | |
| --- | --- | --- | --- | --- | --- | ------- | --- | ------------- | --- | ----- | --- |
LOCK BITS
Also included inthe EPROMProgramLockscheme Thesignaturebytesarereadbythesameprocedure
| | | | | | | asanormalverification | | | oflocations030Hand031H, | | |
| ---------------------------- | --- | --- | ------- | --- | ------- | --------------------- | ---- | -------- | ----------------------- | ------------ | ---- |
| aretwo LockBitswhichfunction | | | asshown | | inTable | | | | | | |
| | | | | | | except | that | P3.6 and | P3.7 need | to be pulled | to a |
5.
| | | | | | | logiclow.Thevaluesreturned | | | are: | | |
| ----------- | --------- | --------------- | --- | ---------- | -------- | -------------------------- | -------- | ------------ | ------------ | ------- | --- |
| | | | | | | | (030H) = | 89Hindicates | manufactured | byIntel | |
| Erasingthe | EPROMalso | erasesthe | | Encryption | Ar- | | | | | | |
| ray and the | Lock | Bits, returning | the | part to | full un- | | | | | | |
| | | | | | | | (031H) = | 51Hindicates | 8751BH | | |
lockedfunctionality.
| | | | | | | | | 52Hindicates | 8752BH | | |
| --------------- | ----------- | ------------- | ---------------- | -------- | ------ | --- | --- | ------------ | ------ | --- | --- |
| To ensureproper | | functionality | ofthe | chip,the | inter- | | | | | | |
| nallylatched | valueofthe~ | | pinmustagreewith | | its | | | | | | |
external state.
19
MCS” 51 CONTROLLER
ERASURE CHARACTERISTICS thistypeofexposure,itissuggestedthat anopaque
label beplaced overthe window.
Erasure of the EPROM begins to occur when the
8752BHisexposedtolightwithwavelengths shorter The recommended erasure procedure is exposure
than approximately 4,000Angstroms.Sincesunlight toultravioletlight(at2537Angstroms)toanintegrat-
and fluorescent lighting have wavelengths in this ed dose of at lease 15 W-see/cm. Exposing the
range, exposure to these light sources over an ex- EPROMtoanultraviolet lampof 12,000pW/cm rat-
tended time (about 1week insunlight, or3yearsin ing for 30 minutes, at a distance of about 1 inch,
room-levelfluorescent lighting)couldcauseinadver- should besufficient.
tent erasure.Ifanapplication subjectsthe deviceto
Erasureleavesthe arrayinanall Is state.
EPROM PROGRAMMING AND VERIFICATION CHARACTERISTICS
(T,4= 21°Cto 27”C,Vcc = 5.OV+10%, Vss = OV)
Symbol Parameter Min Max Units
Vpp Programming Supply Voltage 12.5 13.0 v
Ipp Programming Supply Current 50 mA
1/TCLCL OscillatorFrequency 4 8 MHz
TAVGL AddressSetuptoPROGLow 48TCLCL
TGHAX AddressHoldAfter PROG 48TCLCL
TDVGL DataSetuptoPROGLow 48TCLCL
TGHDX DataHoldAfterPROG 48TCLCL
TEHSH P2.7(ENABLE)HightoVpp 48TCLCL
TSHGL VppSetuptoPROGLow 10 ps
TGHSL VppHoldAfter PROG 10 ps
TGLGH PROGWidth 90 110 ps
TAVQV AddresstoDataValid 48TCLCL
TELQV ENABLELowtoDataValid 48TCLCL
TEHQZ DataFloatAfterENABLE o 48TCLCL
TGHGL PROGHightoPROGLow 10 ps
EPROM PROGRAMMING AND VERIFICATION WAVEFORMS
PROGRAMMING VERIFICATION
ADDRESS ADDRFSS
TAvQV
DATAIN DATAOUT
‘::=&z TDVGL ~ .~-TGHDX }
TAVGL Pu& TGHAX
TSHGL d TGHsL
TGLGH TGHGL
~wpp t
[A/HIGH
TELQV L TEHQZ
P2.7
272318-18
20
MCS@51CONTROLLER
| DATA SHEET | REVISION | HISTORY | |
| ---------- | -------- | ------- | --- |
Datasheetsarechangedasnewdeviceinformation becomesavailable.Verifywithyourlocal Intelsalesoffice
that youhavethe latest version before finalizing adesign orordering devices.
Thefollowing differences existbetween this datasheet (272318-002) andthe previousversion (272318-001):
1.Removed QPand QD(commercial with extended burn-in)from Table 1.EXPRESSPrefixIdentification.
| Thisdatasheet | (272318-001) | replacesthe following | datasheets: |
| ----------------- | ------------ | --------------------- | ----------- |
| MCS@51Controllers | | (270048-007) | |
| 8051AHP | (270279-004) | | |
| 8751BH | (270248-005) | | |
8751BHEXPRESS(270708-001)
| 8752BH | (270429-004) | | |
| ------ | ------------------- | --- | --- |
| 8752BH | EXPRESS(270650-002) | | |
21 |