{
  "recorded_date": "2026-05-10",
  "previous_recorded_date": "2026-05-05",
  "platform": "RTX 3070 Ti Laptop (GA104, sm_86, Ampere)",
  "note": "Re-baselined under Tier 10 valid_when policy on CUDA 13.2 (median of 5 valid samples per kernel; SKIPPED samples discarded). Original 2026-05-05 baselines were CUDA 12.8 — most kernels match within 0.5%, two showed real measured improvement, igemm_sparse_tiled regressed per Obs HH (CUDA 13.2 IMMA stall behavior change).",
  "default_valid_when": {
    "require_no_throttle": true,
    "allow_throttle": ["GpuIdle"],
    "comment": "Inherited by every kernel that doesn't set its own valid_when. Override per-kernel for stricter requirements (min_clock_sm, max_temp_c, require_ac)."
  },
  "schema": {
    "exe":         "(optional) path to bench binary; defaults to <kernel-dir>/bench or <kernel-dir>/bench_<basename>",
    "match":       "(optional) substring of the bench-output line that holds this kernel's number; required when bench.cu prints multiple kernels",
    "section":     "(optional) substring of a section header; parser only considers lines after this header until the next header",
    "value_label": "(optional) text immediately following the throughput number on the matched line; required when the line has multiple numbers",
    "valid_when":  "(optional) GPU/host state requirement for a fair comparison; refuses to compare if violated. Fields: require_no_throttle (default TRUE), allow_throttle (default ['GpuIdle']), min_clock_sm (MHz), max_temp_c (degC), require_ac (laptop). Tier 10.",
    "tolerance":   "(optional) per-config tolerance override (fraction). Default is the CLI --tolerance (0.10). Use for kernels that are intrinsically noisy on this hardware."
  },
  "kernels": {
    "kernels/gemm/hgemm/hgemm_16warp.cu": {
      "exe": "kernels/gemm/hgemm/bench",
      "2048_2048_2048": {"ms": 0.539, "gflops": 31875,
                         "match": "hgemm_16warp (128x128 2blk/SM)",
                         "note": "median of 5 valid samples, 2026-05-10 (was 0.527 / 31910 on CUDA 12.8)"},
      "4096_4096_4096": {"ms": 4.327, "gflops": 31765,
                         "match": "hgemm_16warp (128x128 2blk/SM)",
                         "note": "median of 5 valid samples, 2026-05-10 (was 4.220 / 31910 on CUDA 12.8)"}
    },
    "kernels/gemm/igemm/igemm_sparse_tiled.cu": {
      "exe": "kernels/gemm/igemm/bench_sparse",
      "2048_2048_2048": {"ms": 0.544, "tops": 31588,
                         "match": "igemm_sparse_tiled",
                         "value_label": "dense-equiv GFLOPS",
                         "note": "median of 5 valid samples, 2026-05-10. Was 0.433 / 39674 on CUDA 12.8; CUDA 13.2 reverts the metadata-preload IMMA gain (see Obs HH). Stable at this level on the new toolchain."},
      "4096_4096_4096": {"ms": 4.449, "tops": 30889,
                         "match": "igemm_sparse_tiled",
                         "value_label": "dense-equiv GFLOPS",
                         "tolerance": 0.30,
                         "note": "median of 5 valid samples, 2026-05-10. Bimodal on this laptop: 3.85ms (boost) vs 6.5ms (steady) at the same clock and no throttle signal — likely DRAM cache state at launch. Wider tolerance accepts both modes; re-investigate when running on a desktop GPU."}
    },
    "kernels/gemm/igemm/igemm_pipelined_cpasync.cu": {
      "exe": "kernels/gemm/igemm/bench",
      "4096_4096_4096": {"ms": 6.796, "tops": 20227,
                         "match": "igemm_cpasync",
                         "note": "median of 2 valid samples (3 of 5 hit SwPowerCap and were dropped), 2026-05-10. Within 2.5% of CUDA-12.8 baseline (6.6 ms / 20688 TOPS)."}
    },
    "kernels/attention/flash_attention/flash_attn_br16_regpv.cu": {
      "exe": "kernels/attention/flash_attention/bench_br16_regpv",
      "1024_8_8": {"ms": 2.449, "gflops": 7152,
                   "match": "flash_attn_br16_regpv",
                   "config_note": "seq_len=1024, batch=8, heads=8",
                   "note": "median of 5 valid samples, 2026-05-10. +17% throughput vs 2026-05-05 baseline (was 2.810 / 6112) — real improvement from regpv tuning between recordings."}
    },
    "kernels/convolution/conv2d/conv2d_implicit_gemm.cu": {
      "exe": "kernels/convolution/conv2d/bench_implicit_gemm",
      "1_64_64_320_320": {"ms": 1.056, "gflops": 7150,
                          "section": "SD 64",
                          "match": "Implicit (single kern)",
                          "config_note": "N=1, H=W=64, Cin=Cout=320; bench shape 'SD 64x64 Cin=Cout=320'",
                          "note": "median of 5 valid samples, 2026-05-10. +7% throughput vs 2026-05-05 baseline (was 1.130 / 6687)."}
    }
  }
}