| /** | |
| ****************************************************************************** | |
| * File Name : TIM.c | |
| * Date : 28/01/2015 07:01:45 | |
| * Description : This file provides code for the configuration | |
| * of the TIM instances. | |
| ****************************************************************************** | |
| * | |
| * COPYRIGHT(c) 2015 STMicroelectronics | |
| * | |
| * Redistribution and use in source and binary forms, with or without modification, | |
| * are permitted provided that the following conditions are met: | |
| * 1. Redistributions of source code must retain the above copyright notice, | |
| * this list of conditions and the following disclaimer. | |
| * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| * this list of conditions and the following disclaimer in the documentation | |
| * and/or other materials provided with the distribution. | |
| * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| * may be used to endorse or promote products derived from this software | |
| * without specific prior written permission. | |
| * | |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| * | |
| ****************************************************************************** | |
| */ | |
| /* Includes ------------------------------------------------------------------*/ | |
| /* USER CODE BEGIN 0 */ | |
| /* USER CODE END 0 */ | |
| TIM_HandleTypeDef htim1; | |
| TIM_HandleTypeDef htim2; | |
| /* TIM1 init function */ | |
| void MX_TIM1_Init(void) | |
| { | |
| TIM_ClockConfigTypeDef sClockSourceConfig; | |
| TIM_MasterConfigTypeDef sMasterConfig; | |
| TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig; | |
| TIM_OC_InitTypeDef sConfigOC; | |
| htim1.Instance = TIM1; | |
| htim1.Init.Prescaler = 47; | |
| htim1.Init.CounterMode = TIM_COUNTERMODE_UP; | |
| htim1.Init.Period = 999; | |
| htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; | |
| htim1.Init.RepetitionCounter = 0; | |
| HAL_TIM_Base_Init(&htim1); | |
| sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; | |
| HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig); | |
| HAL_TIM_PWM_Init(&htim1); | |
| sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; | |
| sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; | |
| HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig); | |
| sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; | |
| sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; | |
| sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; | |
| sBreakDeadTimeConfig.DeadTime = 0; | |
| sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; | |
| sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; | |
| sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; | |
| HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig); | |
| sConfigOC.OCMode = TIM_OCMODE_PWM1; | |
| sConfigOC.Pulse = 500; | |
| sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; | |
| sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; | |
| sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; | |
| sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; | |
| sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; | |
| HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2); | |
| } | |
| /* TIM2 init function */ | |
| void MX_TIM2_Init(void) | |
| { | |
| TIM_ClockConfigTypeDef sClockSourceConfig; | |
| TIM_MasterConfigTypeDef sMasterConfig; | |
| htim2.Instance = TIM2; | |
| htim2.Init.Prescaler = 47; | |
| htim2.Init.CounterMode = TIM_COUNTERMODE_UP; | |
| htim2.Init.Period = 294967295; | |
| htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; | |
| HAL_TIM_Base_Init(&htim2); | |
| sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; | |
| HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig); | |
| sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; | |
| sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; | |
| HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig); | |
| } | |
| void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) | |
| { | |
| GPIO_InitTypeDef GPIO_InitStruct; | |
| if(htim_base->Instance==TIM1) | |
| { | |
| /* USER CODE BEGIN TIM1_MspInit 0 */ | |
| /* USER CODE END TIM1_MspInit 0 */ | |
| /* Peripheral clock enable */ | |
| __TIM1_CLK_ENABLE(); | |
| /**TIM1 GPIO Configuration | |
| PA9 ------> TIM1_CH2 | |
| */ | |
| GPIO_InitStruct.Pin = GPIO_PIN_9; | |
| GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| GPIO_InitStruct.Alternate = GPIO_AF2_TIM1; | |
| HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| /* USER CODE BEGIN TIM1_MspInit 1 */ | |
| /* USER CODE END TIM1_MspInit 1 */ | |
| } | |
| else if(htim_base->Instance==TIM2) | |
| { | |
| /* USER CODE BEGIN TIM2_MspInit 0 */ | |
| /* USER CODE END TIM2_MspInit 0 */ | |
| /* Peripheral clock enable */ | |
| __TIM2_CLK_ENABLE(); | |
| /* Peripheral interrupt init*/ | |
| HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0); | |
| HAL_NVIC_EnableIRQ(TIM2_IRQn); | |
| /* USER CODE BEGIN TIM2_MspInit 1 */ | |
| /* USER CODE END TIM2_MspInit 1 */ | |
| } | |
| } | |
| void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) | |
| { | |
| if(htim_base->Instance==TIM1) | |
| { | |
| /* USER CODE BEGIN TIM1_MspDeInit 0 */ | |
| /* USER CODE END TIM1_MspDeInit 0 */ | |
| /* Peripheral clock disable */ | |
| __TIM1_CLK_DISABLE(); | |
| /**TIM1 GPIO Configuration | |
| PA9 ------> TIM1_CH2 | |
| */ | |
| HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9); | |
| /* USER CODE BEGIN TIM1_MspDeInit 1 */ | |
| /* USER CODE END TIM1_MspDeInit 1 */ | |
| } | |
| else if(htim_base->Instance==TIM2) | |
| { | |
| /* USER CODE BEGIN TIM2_MspDeInit 0 */ | |
| /* USER CODE END TIM2_MspDeInit 0 */ | |
| /* Peripheral clock disable */ | |
| __TIM2_CLK_DISABLE(); | |
| /* Peripheral interrupt Deinit*/ | |
| HAL_NVIC_DisableIRQ(TIM2_IRQn); | |
| /* USER CODE BEGIN TIM2_MspDeInit 1 */ | |
| /* USER CODE END TIM2_MspDeInit 1 */ | |
| } | |
| } | |
| /* USER CODE BEGIN 1 */ | |
| /* USER CODE END 1 */ | |
| /** | |
| * @} | |
| */ | |
| /** | |
| * @} | |
| */ | |
| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |