[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Methods And Devices For Power Compensation

Technical Field and Background:
Reactive power compensators are used for voltage control, reactive/active power flow control, transient and steady-state stabilization for improving the operation and functionality of e.g. electrical power transmission and distribution systems. Thyristor Controlled Reactors (TCRs)/Thyristor Switched Reactors (TSRs) and Thyristor Switched Capacitors (TSCs) have been widely used as inductive and capacitive reactive power branches of Static Var Compensators (SVCs), respectively. A drawback of the TCR is the amount of harmonics, e.g. 5 th , 7 th , 11 th , 13 th , . . . , etc. harmonics, that it generates during steady state operation and also, during unbalanced network voltage, harmonics of 3 rd , 9 th , . . . etc. order. For the TCR, harmonic filter branches are normally required in order to reduce the harmonic emission to reach performance levels specified by the network operator. Such filter branches are expensive and require large footprint, e.g. in a substation where they are typically placed. The TSR does not generate low order harmonics, but a drawback of the TSR is that it creates large current transients in the feeding network when switched in or out, causing voltage disturbances. In order to minimize the voltage transients from the TSR, it is often necessary to divide the TSR in smaller sizes and/or use it together with TSC. The TSC comprises capacitor banks requiring large footprint, and energizing transients of the capacitor banks have to be taken care of. In particular, energizing a second capacitor bank when a first capacitor bank is already energized, i.e. back-to-back switching, requires the frequency and amplitude of voltage oscillations on a busbar to be limited in order not to generate overvoltages. Nowadays, it is a trend to replace these branches by Voltage Source Converter (VSC) based chain-link technology. The chain-link technology of the VSC is however rather costly to implement, mainly since it entails advanced power electronics switching devices and advanced control technology. The various power compensation devices thus have their advantages as well as drawbacks and while high performance can be obtained, it comes with high costs, both initial costs and maintenance costs.

Invention Disclosure:
A method is performed in a control device for controlling a power compensation arrangement including a voltage source converter and one or more power compensation branches, each power compensation branch including a thyristor controlled reactor, a thyristor switched reactor or a thyristor controlled capacitor. The voltage source converter and the one or more power compensation branches are connected to a same busbar. The method includes: detecting a request in an electrical power system to which the power compensation arrangement is connected; determining, based on the request, a need for reactive power supply to the electrical power system; providing reactive power by means of the voltage source converter and/or by one or more of the power compensation branches; and compensating, by means of the voltage source converter, any disturbances caused by the power compensation branches when providing the reactive power to the electrical power system. Corresponding devices are also disclosed.

[Assistant]
1. A method performed in a control device for controlling a power compensation arrangement comprising a voltage source converter and one or more power compensation branches, each power compensation branch comprising a thyristor controlled reactor, a thyristor switched reactor or a thyristor switched capacitor, the voltage source converter and the one or more power compensation branches being connected to a same busbar, wherein at least one of the one or more power compensation branches comprises a thyristor switched capacitor, the method comprising the steps of:
detecting a request in an electrical power system to which the power compensation arrangement is connected, wherein the request indicates a need of change in reactive power output of the power compensation arrangement;
determining, based on the request, whether the need of change in reactive power output of the power compensation arrangement is larger than a reactive power capacity of the voltage source converter;
providing reactive power by the voltage source converter and by one or more of the power compensation branches when it is determined that the need of change in reactive power output of the power compensation arrangement is larger than the reactive power capacity of the voltage source converter; and
compensating, by the voltage source converter, any disturbances caused by the power compensation branches when providing the reactive power to the electrical power system, wherein the compensating of disturbances comprises the steps of:
measuring a current and voltage of the thyristor switched capacitor, and a bus voltage; and
compensating, by the voltage source converter, based on the measured current and voltages and a switching time instance giving a minimal voltage of the thyristor switched capacitor, for the sum of transient currents of the thyristor switched capacitor and the voltage source converter.

2. The method as claimed in claim 1, wherein at least one of the one or more power compensation branches comprises a thyristor controlled reactor and the compensating of disturbances comprises the steps of:
measuring a current from the thyristor controlled reactor; and
compensating, based on the measured current of the thyristor controlled reactor, harmonics caused by the thyristor controlled reactor.

3. The method as claimed in claim 2, wherein the providing of reactive power comprises a sub-step of determining whether the power compensation branches are available to provide the reactive power and providing the reactive power based on the determination.

4. The method as claimed in claim 2, wherein the request comprises a fault condition, a request from a voltage control, a request from a reactive power control, a request from an operator of the electrical power system or a request based on changes in the electrical power system.

5. The method as claimed in claim 1, wherein at least one of the one or more power compensation branches comprises a thyristor switched reactor, and the compensating of disturbances comprises the steps of:
measuring a current from the thyristor switched reactor; and
compensating, based on the measured current of the thyristor switched reactor, current transients caused by the thyristor switched reactor.

6. The method as claimed in claim 5, wherein the providing of reactive power comprises a sub-step of determining whether the power compensation branches are available to provide the reactive power and providing the reactive power based on the determination.

7. The method as claimed in claim 5, wherein the request comprises a fault condition, a request from a voltage control, a request from a reactive power control, a request from an operator of the electrical power system or a request based on changes in the electrical power system.

8. The method as claimed in claim 1, wherein the providing of reactive power comprises a sub-step of determining whether the power compensation branches are available to provide the reactive power and providing the reactive power based on the determination.

9. The method as claimed in claim 8, wherein the request comprises a fault condition, a request from a voltage control, a request from a reactive power control, a request from an operator of the electrical power system or a request based on changes in the electrical power system.

10. The method as claimed in claim 1, wherein the request comprises a fault condition, a request from a voltage control, a request from a reactive power control, a request from an operator of the electrical power system or a request based on changes in the electrical power system.

11. A control device for controlling a power compensation arrangement comprising a voltage source converter and one or more power compensation branches, each power compensation branch comprising a thyristor switched reactor, a thyristor switched reactor or a thyristor controlled capacitor, at least one of the one or more power compensation branches comprising a thyristor switched capacitor, the voltage source converter and the one or more power compensation branches being connected to a same busbar, the control device being configured to:
detect a request in an electrical power system to which the power compensation arrangement is connected, wherein the request indicates a need of change in reactive power output of the power compensation arrangement;
determine, based on the request, whether the need of change in reactive power output of the power compensation arrangement is larger than a reactive power capacity of the voltage source converter;
provide reactive power by the voltage source converter and by one or more of the power compensation branches when the control device determines that the need of change in reactive power output of the power compensation arrangement is larger than the reactive power capacity of the voltage source converter; and
compensate, by the voltage source converter, any disturbances caused by the power compensation branches when providing the reactive power to the electrical power system, by:
measuring a current and voltage of the thyristor switched capacitor, and a bus voltage; and
compensating, by the voltage source converter, based on the measured current and voltages and a switching time instance giving a minimal voltage of the thyristor switched capacitor, for the sum of transient currents of the thyristor switched capacitor and the voltage source converter.

12. The control device as claimed in claim 11, wherein at least one of the one or more power compensation branches comprises a thyristor controlled reactor and the control device is configured to compensate disturbances by:
measuring a current from the thyristor controlled reactor; and
compensating, based on the measured current of the thyristor controlled reactor, harmonics caused by the thyristor controlled reactor.

13. The control device as claimed in claim 11, wherein at least one of the one or more power compensation branches comprises a thyristor switched reactor and the control device is configured to compensate disturbances by:
measuring a current from the thyristor switched reactor; and
compensating, based on the measured current of the thyristor switched reactor, current transients caused by the thyristor switched reactor.

14. A computer program for a control device configured to control a power compensation arrangement comprising a voltage source converter and one or more power compensation branches, each power compensation branch comprising a thyristor controlled reactor, a thyristor switched reactor or a thyristor switched capacitor, at least one of the one or more power compensation branches comprising a thyristor switched capacitor, the voltage source converter and the one or more power compensation branches being connected to a same busbar, the computer program comprising computer program code, which, when run on the control device causes the control device to:
detect a request in an electrical power system to which the power compensation arrangement is connected, wherein the request indicates a need of change in reactive power output of the power compensation arrangement;
determine, based on the request, whether the need of change in reactive power output of the power compensation arrangement is larger than a reactive power capacity of the voltage source converter;
provide reactive power by the voltage source converter and by one or more of the power compensation branches when the control device determines that the need of change in reactive power output of the power compensation arrangement is larger than the reactive power capacity of the voltage source converter; and
compensate, by the voltage source converter, any disturbances caused by the power compensation branches when providing the reactive power to the electrical power system, by:
measuring a current and voltage of the thyristor switched capacitor, and a bus voltage; and
compensating, by the voltage source converter, based on the measured current and voltages and a switching time instance giving a minimal voltage of the thyristor switched capacitor, for the sum of transient currents of the thyristor switched capacitor and the voltage source converter.

15. A computer program product comprising the computer program as claimed in claim 14, and a non-transitory computer readable medium on which the computer program is stored.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Electronically Controlled Internal Damper

Technical Field and Background:
1. Field of the Invention The present invention relates to an electronically controlle2d internal damper, and more particularly, to an electronically controlled internal damper that is capable of implementing damping performance in both a soft mode and a hard mode through a relatively simple structure and increasing sealing performance while reducing rigidity. 2. Description of the Related Art Generally, in an electronically controlled external damper, since a passage of a rebound stroke is the same as a passage of a compression stroke, damping forces of the rebound stroke and the compression stroke is adjusted through one variable valve. Consequently, the electronically controlled external damper cannot independently adjust the damping forces of the rebound stroke and the compression stroke in the valve, wherein a difference in the damping force occurs depending on the difference in a flow rate passing through the same valve. In consideration of these points, it is possible to adjust the damping force of the compression stroke through a rigidity of a check valve on a compression side of a main piston, but its degree of freedom is considerably limited as compared with a conventional damper that adjusts a damping force by using a separate valve in each stroke. Therefore, even though the electronically controlled damper is expensive as compared with the conventional damper, the degree of freedom of damping force adjustment decreases. On the other hand, the electronically controlled internal damper can independently control the damping forces through the separate independent valves in the rebound stroke and the compression stroke as in the conventional damper. However, in order to increase the flow rate on the compression side of the variable valve and implement damping performance in a hard mode, the stacking number of disks for sealing increases and thus the rigidity increases. If the rigidity on the compression side of the variable valve increases, a damping force of a soft mode increases and thus the degree of freedom of damping force adjustment decreases.

Invention Disclosure:
An electronically controlled internal damper includes: a main passage formed by a working fluid flowing through a main piston; a pilot passage formed by a working fluid as much as a predetermined amount discharged from a first pilot chamber and a second pilot chamber so as to maintain internal pressures of the first pilot chamber and the second pilot chamber to a predetermined level when pressures of the first pilot chamber and the second pilot chamber are increased beyond the predetermined level; and a bypass passage formed by a working fluid passing through the compression retainer and the rebound retainer symmetrically disposed above and under the main piston and a plurality of holes formed transversely to a vertical length direction of a spool rod. Accordingly, the electronically controlled internal damper is capable of implementing damping performance in both a soft mode and a hard mode with a relatively simple structure and increasing sealing performance while reducing rigidity.

[Assistant]
1. An electronically controlled internal damper comprising:
a main passage formed by a working fluid flowing through a main piston in which compression passages and rebound passages are alternately disposed;
a pilot passage formed by the working fluid as much as a predetermined amount discharged from a first pilot chamber and a second pilot chamber so as to maintain internal pressures of the first pilot chamber and the second pilot chamber to a predetermined level when pressures of the first pilot chamber and the second pilot chamber are increased beyond the predetermined level, the first pilot chamber being formed by a compression retainer disposed above the main piston and a first housing disposed above the compression retainer, and the second pilot chamber being formed by a rebound retainer disposed under the main piston and a second housing disposed under the rebound retainer; and
a bypass passage formed by the working fluid passing through the compression retainer and the rebound retainer symmetrically disposed above and under the main piston and a plurality of holes formed transversely to a vertical length direction of a spool rod, the bypass passage being formed by the working fluid flowing between a cylinder upper chamber and a cylinder lower chamber bypassing the first pilot chamber and the second pilot chamber,
wherein the spool rod penetrates in central portions of the main piston, the compression retainer, the rebound retainer, the first housing, and the second housing.

2. The electronically controlled internal damper according to claim 1, wherein, during a rebound stroke, the main passage is formed by the working fluid that flows from an upper portion of the rebound passage of the main piston to a communication hole of the rebound retainer disposed on a bottom surface of the main piston and is discharged to the outside of the second housing through an upper space of the second housing disposed under the rebound retainer.

3. The electronically controlled internal damper according to claim 1, wherein, during a compression stroke, the main passage is formed by the working fluid that flows from a lower portion of the compression passage of the main piston to a communication hole of the compression retainer disposed on a top surface of the main piston and is discharged to the outside of the first housing through a lower space of the first housing disposed above the compression retainer.

4. The electronically controlled internal damper according to claim 1, wherein, during a rebound stroke, the bypass passage is formed by the working fluid that flows from an upper portion of the rebound passage of the main piston through a communication hole of the rebound retainer and passes through the spool rod across a reciprocating direction of a driven spool and is then discharged to the outside of the rebound retainer through the compression passage of the main piston and bypass a top surface of the rebound retainer.

5. The electronically controlled internal damper according to claim 1, wherein, during a compression stroke, the bypass passage is formed by the working fluid that flows from a lower portion of the compression passage of the main piston through a communication hole of the compression retainer and passes through the spool rod across the reciprocating direction of the driven spool and is then discharged to the outside of the compression retainer through the rebound passage of the main piston and bypass a top surface of the compression retainer.

6. The electronically controlled internal damper according to claim 1, wherein, during a rebound stroke, the pilot passage is formed by the working fluid that flows from an upper portion of the compression passage of the main piston through a communication hole of the rebound retainer and passes through the spool rod across the reciprocating direction of the driven spool and is then discharged to the bottom outside of the second housing through the second pilot chamber that is the inner space of the second housing.

7. The electronically controlled internal damper according to claim 1, wherein, during a compression stroke, the pilot passage is formed by the working fluid that flows from a lower portion of the compression passage of the main piston through a communication hole of the compression retainer and passes through the spool rod across the reciprocating direction of the driven spool and is then discharged to the top outside of the first housing through the first pilot chamber that is the inner space of the first housing.

8. The electronically controlled internal damper according to claim 1, further comprising:
a piston assembly including the main piston in which the compression passages and the rebound passages are alternately disposed, the compression retainer disposed on a top surface of the main piston and including a plurality of communication holes respectively communicating with the compression passages, and the rebound retainer disposed on a bottom surface of the main piston and including communication holes respectively communicating with the rebound passages, wherein the spool rod penetrates in central portions of the main piston, the compression retainer, and the rebound retainer; and
a housing assembly including a first housing and a second housing, wherein the first housing is disposed above the compression retainer, a bottom surface of the first housing is opened, an inner space of the first housing communicates with its top outside, the second housing is disposed under the rebound retainer, a top surface of the second housing is opened, and an inner space of the second housing communicates with its bottom outside.

9. The electronically controlled internal damper according to claim 8, further comprising:
a first sealing member mounted on a top surface of the compression retainer and allowing a vertical reciprocation to some degree by pressure of the working fluid while abutting sealingly a lower inner peripheral surface of the first housing such that the inner space of the first housing becomes the first pilot chamber; and
a second sealing member mounted on a bottom surface of the rebound retainer and allowing a vertical reciprocation to some degree by pressure of the working fluid while abutting sealingly an upper inner peripheral surface of the second housing such that the inner space of the second housing becomes the second pilot chamber.

10. The electronically controlled internal damper according to claim 9, wherein the first sealing member includes:
a first compression disk disposed between the compression retainer and the first housing; and
a first seal lip that is an elastic member connected to the first compression disk and contacting a lower inner peripheral surface of the first housing.

11. The electronically controlled internal damper according to claim 10, wherein a connection between the first compression disk and the first seal lip is performed by inserting a first coupling protrusion formed in the first seal lip into a first coupling slot formed in the first compression disk and having a first tapered surface, and
the first tapered surface is gradually widened toward a bottom surface of the first sealing disk.

12. The electronically controlled internal damper according to claim 9, wherein the second sealing member includes:
a second compression disk disposed between the rebound retainer and the second housing; and
a second seal lip that is an elastic member connected to the second compression disk and contacting an upper inner peripheral surface of the second housing.

13. The electronically controlled internal damper according to claim 12, wherein a connection between the second compression disk and the second seal lip is performed by inserting a second coupling protrusion formed in the second seal lip into a second coupling slot formed in the second compression disk and having a second tapered surface, and
the second tapered surface is gradually widened toward a top surface of the second sealing disk.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Wireless Communications Systems Using Multiple Radios

Technical Field and Background:
Wireless communications are implemented by any of a variety of radio technologies, depending on the type of application. Cellular phones, for example, may use the Global System for Mobile communications (GSM™), the IS-54 Time Division Multiple Access (TDMA) or the IS-95 Code Division Multiple Access (CDMA) radio technologies, whereas a wireless local area network may use Wi-Fi™, Bluetooth™ or ZigBee® radio technologies. In an ad-hoc, or peer-to-peer, network, a wireless device communicates directly with another wireless device. In an infrastructure network, a wireless device communicates with another wireless device through one or more intermediary gate devices, such as a base station or an access point. Generally, a wireless device uses a single radio technology to effect communication with its peer (in the case of a peer-to-peer network) or with the access point (in the case of an infrastructure network). In the prior art, dual radios are used in a wireless device to support different air interface standards, in order to provide compatibility with different wireless service providers. For example, a dual-radio device may support GSM, a cellular phone service, and Wi-Fi, a wireless Local Area Network (LAN) service, and uses one of these two radios for communication, depending on which service (GSM or Wi-Fi) is available in a geographic area. Generally, such a wireless device selects and uses a single radio for the duration of the connection or service. The present invention relates to an innovative wireless communications system employing multiple radios. The communications system selects amongst and switches between multiple radios—possibly multiple times—while a connection or session is in progress. This switching allows the communications system to achieve one or more of the following performance objectives: Maximize communications reliability and robustness against interference and other impairments Minimize interference to co-existing users Minimize power consumption Accommodate any disparity between the uplink and downlink bandwidths Moreover, the multiple radio system can reduce the physical footprint of the radio nodes and lead to improved data rates and communication range. When a single radio type is used, the degrees of freedom are limited for desired optimization. A given radio can be optimized, for example, by the following means: Switch transmission channels within the given band to dynamically mitigate interference (to improve reliability). Adjust transmitted power as needed (to improve power dissipation or reliability). There are few other meaningful operations that can be performed to optimize single-radio systems. With a single type of radio, it is particularly challenging to design a system that calls for simultaneous optimization of multiple factors—for example, optimization of all of these four factors: link range/reliability, node power, node cost and low interference to other radios. If a radio is optimized for one factor, it will typically negatively impact other factors. For example, if power is reduced for a low-power design, it would typically reduce the range/reliability. If an ultra-wideband (UWB) radio is deployed to cause minimum interference to other radios, it would result in short range, high complexity and potentially high cost (the UWB receiver being complex and high power). Accordingly, a radio scheme is desired for a wireless communication system that addresses the optimization of multiple factors.

Invention Disclosure:
The present invention relates to a communication system and methods of use thereof. The system includes sets of complementary radios for transmitting and receiving signals to achieve high reliability and reduced costs. The sets of complementary radios are in wireless communication with each other. A new connection is made by selecting from amongst the complementary radios. Switching between complementary radios during a connection is also permitted. Optimized protocols and hardware for implementing the system are disclosed.

[Assistant]
1. A method of using radio connections in a communication system, comprising:
providing a base node comprising a first plurality of radios for transmitting or receiving signals, wherein the first plurality of radios have complementary properties by differing in receiver sensitivity, spectrum usage, permissible radiated power, or inherent interference mitigation;
providing a peripheral node comprising a second plurality of radios for transmitting or receiving signals, wherein the second plurality of radios have complementary properties by differing in receiver sensitivity, spectrum usage, permissible radiated power, or inherent interference mitigation, wherein the peripheral node and the base node are constructed and arranged to wirelessly connect via both the first plurality of radios and the second plurality of radios;
activating a wireless connection between the base node and the peripheral node;
simultaneously transmitting signals from two or more radios of the second plurality of radios to the base node via the wireless connection;
combining the transmitted signals from the two or more radios of the second plurality of radios at the base node; and
switching to different radios from the first plurality or the second plurality of radios according to a performance objective.

2. The method of claim 1, wherein combining the transmitted signals comprise combining the transmitted signals in baseband.

3. The method of claim 2, wherein the transmitted signals are summed together immediately prior to slicing and the summed signal is sent to a single slicer.

4. The method of claim 1, wherein the transmitted signals are combined with aid of a radio receiver comprising a plurality of finger sub-receivers.

5. The method of claim 4, wherein each finger-sub receiver independently decodes a single multipath component, which is later combined with other multipath components.

6. The method of claim 1, wherein the peripheral node is provided on a patch configured to attach to a person's body.

7. The method of claim 6, wherein the patch is configured to collect physiological data of the person from at least one body sensor attached to the patch.

8. A communication system, comprising:
a base node comprising a first plurality of radios for transmitting or receiving signals, wherein the first plurality of radios have complementary properties by differing in receiver sensitivity, spectrum usage, permissible radiated power, or inherent interference mitigation; and
a peripheral node comprising a second plurality of radios for transmitting or receiving signals, wherein the second plurality of radios have complementary properties by differing in receiver sensitivity, spectrum usage, permissible radiated power, or inherent interference mitigation, wherein the peripheral node and the base node are constructed and arranged to wirelessly connect via both the first plurality of radios and the second plurality of radios;
wherein (1) the peripheral node and the base node are to configured to activate a wireless connection between the base node and the peripheral node, (2) two or more radios of the second plurality of radios are configured to simultaneously transmit signals to the base node via the wireless connection, and (3) signals transmitted from the two or more radios of the second plurality of radios are combined at the base node.

9. The system of claim 8, wherein the peripheral node is provided on a patch configured to attach to a person's body, wherein the patch collects physiological data from at least one body sensor attached to the patch.

10. The system of claim 8, wherein the first plurality of radios or the second plurality of radios use a same symbol constellation alphabet for encoding data.

11. The method of claim 8, wherein the first plurality of radios or second plurality of radios comprise a dual mode reconfigurable radio.

12. The system of claim 11, wherein the dual mode reconfigurable radio is configured to operate as both a narrowband transceiver and a broadband transceiver.

13. The system of claim 11, wherein the dual mode reconfigurable radio comprises a reconfigurable receiver.

14. The system of claim 13, wherein the dual mode reconfigurable radio comprises a reconfigurable bandpass filter.

15. The system of claim 11, wherein the dual mode reconfigurable radio comprises a reconfigurable transmitter.

16. The system of claim 8, wherein the peripheral node comprises an on-board power source and operates at sufficiently low power to continuously operate from the power source for several days.

17. A method of using radio connections in a communication system, comprising:
providing a base node comprising a first plurality of radios for transmitting or receiving signals, wherein the first plurality of radios have complementary properties by differing in receiver sensitivity, spectrum usage, permissible radiated power, or inherent interference mitigation and wherein the first plurality of radios comprise a first radio configured to utilize two or more antennas to increase a link reliability;
providing a peripheral node comprising a second plurality of radios for transmitting or receiving signals, wherein the second plurality of radios have complementary properties by differing in receiver sensitivity, spectrum usage, permissible radiated power, or inherent interference mitigation, wherein the peripheral node and the base node are constructed and arranged to wirelessly connect via both the first plurality of radios and the second plurality of radios;
activating a wireless connection between the base node and the peripheral node;
transmitting signals from a second radio of the second plurality of radios to the first radio via the wireless connection;
processing, using the two or more antennas of the first radio, the signals; and
switching to different radios from the first plurality or the second plurality of radios according to a performance objective.

18. The method of claim 17, wherein the second plurality of radios utilize a single antenna scheme.

19. The method of claim 17, wherein the first radio comprises a Wi-Fi radio.

20. The method of claim 17, wherein the base node consumes more resources than the peripheral node, or the base node consumes more power than the peripheral node.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Driving Circuit According To Rgbw And Flat Panel Display

Technical Field and Background:
As shown in FIG. 1 , a pixel point of a conventional flat panel display includes three sub-pixels including red, green and blue (RGB). Each sub-pixel has a total of 256 gray levels from 0 to 255. Different colors are formed by combining different gray levels of the red, green and blue sub-pixels. With the development of a flat panel display, people demand more and more high definition of the flat panel display and more and more high resolution. This results in less and less aperture ratio of the flat panel display with the same size and less and less transmittance of a backlight thereof. Therefore, a present RGB model cannot satisfy the requirements of developing the flat panel display. An RGBW model is innovated from a basis of the conventional three basic colors RGB and adds a white sub-pixel. A transmittance of the white sub-pixel is three times of that of any one of the red, green and blue sub-pixels. Accordingly, a transmittance of an entire flat panel display can be efficiently increased. As shown in FIG. 2 , the pixel point including the red, green, blue and white sub-pixels requires a driving circuit to drive. The driving circuit according to RGBW comprises: a first driving lines 201 , a second driving lines 202 , a third driving lines 203 , a fourth driving lines 204 , a first switch K 1 , a second switch K 2 , a third switch K 3 and a fourth switch K 4 , a control terminal of the first switch K 1 connected to the first driving line 201 , an input terminal of the first switch K 1 connected to a driving signal source 205 , another input terminal of the first switch K 1 connected to the red sub-pixel, a control terminal of the second switch K 2 connected to the second driving line 202 , an input terminal of the second switch K 2 connected to the driving signal source 205 , another input terminal of the second switch K 2 connected to the green sub-pixel, a control terminal of the third switch K 3 connected to the third driving line 203 , an input terminal of the third switch K 3 connected to the driving signal source 205 , another input terminal of the third switch K 3 connected to the blue sub-pixel, a control terminal of the fourth switch K 4 connected to the fourth driving line 204 , an input terminal of the fourth switch K 4 connected to a driving signal source 205 and another input terminal of the fourth switch K 4 connected to the white sub-pixel. When the first driving line 201 outputs a high voltage level, the second driving line 202 outputs a low voltage level, the third driving line 203 outputs a low voltage level and the fourth driving line 204 outputs a low voltage level, the first switch K 1 is turned on, the second switch K 2 is turned off, the third switch K 3 is turned off and the fourth switch K 4 is turned off. A driving signal from the driving signal source 205 is outputted to the red sub-pixel through the first switch K 1 so the red sub-pixel generates a red light through a light generated by the backlight lamp. When the first driving line 201 outputs a low voltage level, the second driving line 202 outputs a high voltage level, the third driving line 203 outputs the low voltage level and the fourth driving line 204 outputs the low voltage level, the first switch K 1 is turned off, the second switch K 2 is turned on, the third switch K 3 is turned off and the fourth switch K 4 is turned off. The driving signal from the driving signal source 205 is outputted to the green sub-pixel through the second switch K 2 so the green sub-pixel generates a green light through the light generated by the backlight lamp. When the first driving line 201 outputs the low voltage level, the second driving line 202 outputs the low voltage level, the third driving line 203 outputs a high voltage level and the fourth driving line 204 outputs the low voltage level, the first switch K 1 is turned off, the second switch K 2 is turned off, the third switch K 3 is turned on and the fourth switch K 4 is turned off. The driving signal from the driving signal source 205 is outputted to the blue sub-pixel through the third switch K 3 so the blue sub-pixel generates a blue light through the light generated by the backlight lamp.

Invention Disclosure:
The present invention discloses a driving circuit according to RGBW and a flat panel display. In the driving circuit: control terminals of a first and second voltage-level switches and a first non-voltage-level switch are connected to a first driving line, input terminals are connected to a driving signal source, output terminals are respectively connected to input terminals of a third non-voltage-level switch, a third and fourth voltage-level switches, control terminals of the third non-voltage-level switch and the third and fourth voltage-level switches are connected to a second driving line, output terminals of the third non-voltage-level switch and the third and fourth voltage-level switches are connected to a first to third sub-pixels. The circuit can implement that a size occupied by the driving lines is decreased and the aperture ratio of the display is increased.

[Assistant]
1. A driving circuit for driving a RGBW pixel of a display, the driving circuit comprising:
a first driving line, a second driving line, a first voltage-level switch, a second voltage-level switch, a third voltage-level switch, a fourth voltage-level switch, a first non-voltage-level switch, a second non-voltage-level switch, a third non-voltage-level switch and a fourth non-voltage-level switch, wherein a voltage-level switch is a switch, which is turned on when a first voltage level is inputted to a control terminal thereof, and a non-voltage-level switch is a switch, which is turned on when a second voltage level is inputted to a control terminal thereof;
a control terminal of the first voltage-level switch connected to the first driving line, an input terminal of the first voltage-level switch connected to a driving signal source, an output terminal of the first voltage-level switch connected to an input terminal of the third non-voltage level switch, a control terminal of the third non-voltage-level switch connected to the second driving line and an input terminal of the third non-voltage-level switch used to connect to a first sub-pixel;
a control terminal of the second voltage-level switch connected to the first driving line, an input terminal of the second voltage-level switch connected to the driving signal source, an output terminal of the second voltage-level switch connected to an input terminal of the third voltage-level switch, a control terminal of the third voltage-level switch connected to the second driving line, an output terminal of the third voltage-level switch used to connect to a second sub-pixel;
a control terminal of the first non-voltage-level switch connected to the first driving line, an input terminal of the first non-voltage level switch connected to the driving signal source, an output terminal of the first non-voltage level switch connected to an input terminal of the fourth voltage-level switch, a control terminal of the fourth voltage-level switch connected to the second driving line, an output terminal of the fourth voltage-level switch used to connect to a third sub-pixel;
a control terminal of the second non-voltage-level switch connected to the first driving line, an input terminal of the second non-voltage level switch connected to the driving signal source, an output terminal of the second non-voltage level switch connected to an input terminal of the fourth non-voltage-level switch, a control terminal of the fourth non-voltage-level switch connected to the second driving line, an output terminal of the fourth non-voltage-level switch used to connect to a fourth sub-pixel;
when the first driving line outputs a first voltage level, the second driving line outputs the second voltage level, the first voltage-level switch and the third non-voltage-level switch are turned on, a driving signal outputted from the driving signal source outputted to the first sub-pixel through the first voltage-level switch and the third non-voltage-level switch;
when the first driving line outputs the first voltage level, the second driving line outputs the first voltage level, the second voltage-level switch and the third voltage-level switch are turned on, the driving signal outputted from the driving signal source outputted to the second sub-pixel through the second voltage-level switch and the third voltage-level switch;
when the first driving line outputs the second voltage level, the second driving line outputs the first voltage level, the first non-voltage-level switch and the fourth voltage-level switch are turned on, the driving signal outputted from the driving signal source outputted to the third sub-pixel through the first non-voltage-level switch and the fourth voltage-level switch;
when the first driving line outputs the second voltage level, the second driving line outputs the second voltage level, the second non-voltage-level switch and the fourth non-voltage-level switch are turned on, the driving signal outputted from the driving signal source outputted to the fourth sub-pixel through the second non-voltage-level switch and the fourth non-voltage-level switch.

2. The circuit according to claim 1, characterized in that the first voltage level is a high voltage level and the second voltage level is a low voltage level, the voltage-level switch is a switch, which is turned on by the high voltage level, and the non-voltage-level switch is a switch, which is turned on by the low voltage level.

3. The circuit according to claim 2, characterized in that the switch, which is turned on by the high voltage level, is a N type FET or C type FET and the switch, which is turned on by the low voltage level, is a P type FET.

4. The circuit according to claim 1, characterized in that the first voltage level is the low voltage level and the second voltage level is the high voltage level, the voltage-level switch is a switch, which is turned on by the low voltage level, and the non-voltage-level switch is a switch, which is turned on by the high voltage level.

5. The circuit according to claim 4, characterized in that the switch, which is turned on by the high voltage level, is a N type FET or C type FET and the switch, which is turned on by the low voltage level, is a P type FET.

6. A flat panel display comprising:
a flat display panel and a bottom plate, wherein the flat display panel comprises an RGBW driving circuit and the RGBW driving circuit comprises:
a first driving line, a second driving line, a first voltage-level switch, a second voltage-level switch, a third voltage-level switch, a fourth voltage-level switch, a first non-voltage-level switch, a second non-voltage-level switch, a third non-voltage-level switch and a fourth non-voltage-level switch, wherein a voltage-level switch is a switch, which is turned on when a first voltage level is inputted to a control terminal thereof, and a non-voltage-level switch is a switch, which is turned on when a second voltage level is inputted to a control terminal thereof;
a control terminal of the first voltage-level switch connected to the first driving line, an input terminal of the first voltage-level switch connected to a driving signal source, an output terminal of the first voltage-level switch connected to an input terminal of the third non-voltage level switch, a control terminal of the third non-voltage-level switch connected to the second driving line and an input terminal of the third non-voltage-level switch used to connect to a first sub-pixel;
a control terminal of the second voltage-level switch connected to the first driving line, an input terminal of the second voltage-level switch connected to the driving signal source, an output terminal of the second voltage-level switch connected to an input terminal of the third voltage-level switch, a control terminal of the third voltage-level switch connected to the second driving line, an output terminal of the third voltage-level switch used to connect to a second sub-pixel;
a control terminal of the first non-voltage-level switch connected to the first driving line, an input terminal of the first non-voltage level switch connected to the driving signal source, an output terminal of the first non-voltage level switch connected to an input terminal of the fourth voltage-level switch, a control terminal of the fourth voltage-level switch connected to the second driving line, an output terminal of the fourth voltage-level switch used to connect to a third sub-pixel;
a control terminal of the second non-voltage-level switch connected to the first driving line, an input terminal of the second non-voltage level switch connected to the driving signal source, an output terminal of the second non-voltage level switch connected to an input terminal of the fourth non-voltage-level switch, a control terminal of the fourth non-voltage-level switch connected to the second driving line, an output terminal of the fourth non-voltage-level switch used to connect to a fourth sub-pixel;
when the first driving line outputs a first voltage level, the second driving line outputs the second voltage level, the first voltage-level switch and the third non-voltage-level switch are turned on, a driving signal outputted from the driving signal source outputted to the first sub-pixel through the first voltage-level switch and the third non-voltage-level switch;
when the first driving line outputs the first voltage level, the second driving line outputs the first voltage level, the second voltage-level switch and the third voltage-level switch are turned on, the driving signal outputted from the driving signal source outputted to the second sub-pixel through the second voltage-level switch and the third voltage-level switch;
when the first driving line outputs the second voltage level, the second driving line outputs the first voltage level, the first non-voltage-level switch and the fourth voltage-level switch are turned on, the driving signal outputted from the driving signal source outputted to the third sub-pixel through the first non-voltage-level switch and the fourth voltage-level switch;
when the first driving line outputs the second voltage level, the second driving line outputs the second voltage level, the second non-voltage-level switch and the fourth non-voltage-level switch are turned on, the driving signal outputted from the driving signal source outputted to the fourth sub-pixel through the second non-voltage-level switch and the fourth non-voltage-level switch.

7. The flat panel display according to claim 6, characterized in that the first voltage level is a high voltage level and the second voltage level is a low voltage level, the voltage-level switch is a switch, which is turned on by the high voltage level, and the non-voltage-level switch is a switch, which is turned on by the low voltage level.

8. The flat panel display according to claim 7, characterized in that the switch, which is turned on by the high voltage level, is a N type FET or C type FET and the switch, which is turned on by the low voltage level, is a P type FET.

9. The flat panel display according to claim 6, wherein when the first voltage level is a low voltage level and the second voltage level is a high voltage level, the voltage-level switch is a switch, which is turned on by the low voltage level, and the non-voltage-level switch is a switch, which is turned on by the high voltage level.

10. The flat panel display according to claim 9, wherein the switch, which is turned on by the high voltage level, is a N type FET or C type FET; and the switch, which is turned on by the low voltage level, is a P type FET.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Semiconductor Device

Technical Field and Background:
In hybrid vehicles and electric vehicles, a vehicle drive battery is configured so as to output a prescribed drive voltage, and it is necessary to always monitor its output voltage. For example, a vehicle drive battery of a hybrid vehicle may produce an output voltage of about 200 V, and it may be boosted to about 500 V for use. In connection with this, a voltage monitoring circuit for watching for occurrence of an abnormal voltage is necessary. In recent years, a high-voltage monitoring circuit for watching for occurrence of an abnormal voltage that is higher than 1,000 V is demanded. For example, JP-2009-201192-A and JP-2012-095427-A are related to an example motor drive device. FIG. 8 shows an example motor drive device 100 . A high-voltage battery B is mounted on a vehicle body while being insulated therefrom. In the motor drive device 100 , a boost converter 101 boosts a DC high voltage (e.g., 200 V) that is output from the battery B (to 600 V, for example), and an inverter circuit 103 converts the boost voltage into a 3-phase AC voltage for motor drive via a smoothing capacitor 102 . The 3-phase AC voltage is supplied to a vehicle drive motor M. To monitor the boost voltage, the motor drive device 100 is equipped with a voltage detection circuit 200 . The voltage detection circuit 200 detects voltages at nodes b 1 and b 2 which are connected to the positive terminal and the negative terminal of the battery B, respectively. And, a control circuit (not shown) controls motor driving by outputting control signals the boost converter 101 and the inverter circuit 103 on the basis of detection results of the voltage detection circuit 200 . As shown in FIG. 9 , the voltage detection circuit 200 may be formed by an operational amplifier 201 and resistors 202 a - 202 e. As shown in FIG. 9 , the series-connected resistors 202 a and 202 b divide a positive-side high voltage of the battery B. One terminal B 1 is connected to the node b 1 which is connected to the positive terminal of the battery B (see FIG. 8 ), and the other end is grounded to the vehicle body. The series connection point of the resistors 202 a and 202 b is connected to the non-inverting input terminal of the operational amplifier 201 . On the other hand, the series connected resistors 202 c and 202 d divide a negative-side high voltage of the battery B. One terminal B 2 is connected to the node b 2 which is connected to the negative terminal of the battery B (see FIG. 8 ), and the other end is grounded to the vehicle body. The series connection point of the resistors 202 c and 202 d is connected to the inverting input terminal of the operational amplifier 201 . The resistor (feedback resistor) 202 e is provided to set an amplification gain of the operational amplifier 201 . One end of the resistor 202 e is connected to the inverting input terminal of the operational amplifier 201 , and the other end is connected to an output terminal OUT of the operational amplifier 201 . A detection signal that is output from the voltage detection circuit 200 is input to the control circuit (not shown), and the control circuit outputs control signals for controlling operations of the boost converter 101 and the inverter circuit 103 , whereby driving of the motor M is controlled. To manufacture a voltage detection circuit for detecting a high voltage to be used in a motor drive device of a hybrid vehicle or an electric vehicle, an integrated circuit chip consisting of an operational amplifier and resistors may be formed by a regular semiconductor device manufacturing process, and the integrated circuit chip may be mounted on a lead frame and sealed with resin. In this case, the resulting voltage detection circuit may not function if discharge occurs between high voltage application leads or between these leads and other, neighboring leads. In view of this, it may be considered to employ a high-withstand-voltage structure as shown in FIG. 10 with a wide mounting area. Specifically, an operational amplifier integrated circuit 302 and plural chip resistors 303 are mounted on a mounting board 301 , and are connected to each other by interconnections (not shown). If a voltage that is higher than 600 to 1,000 V is applied to the voltage detection circuit, assuming that the resistance of each chip resistor 303 is 620 kΩ the number of resistors 303 to be mounted becomes as large as about 30 to 80.

Invention Disclosure:
One embodiment provides a semiconductor device having a first chip for lowering an input voltage and a second chip for performing signal processing, mounted on a die pad. Lead terminals are divided into a first lead row and a second lead row. The first lead row are connected with the first chip, the first chip are connected with the second chip or the second lead row, and the second chip are connected with the second lead row. A distance between the lead terminals of the first lead row is set longer than a distance between the lead terminals of the second lead row, and a sealing resin is provided to fill at least between the lead terminals of the first lead row.

[Assistant]
1. A semiconductor device in which a first chip having a function of lowering an input voltage and a second chip having a function of performing signal processing on an output signal of the first chip are mounted on a die pad, wire connections are made between a part of chip electrodes of the first chip and the second chip and between an other part of the chip electrodes of the first chip and the second chip and external lead terminals, and a sealing resin is provided to seal,
wherein the lead terminals constitute a first lead row and a second lead row which are opposite to each other with the die pad interposed in between, each of the first lead row and the second lead row having plural lead terminals,
wherein the lead terminals of the first lead row are connected to a part of the chip electrodes of the first chip, an other part of the chip electrodes of the first chip are connected to a part of the chip electrodes of the second chip or a part of the lead terminals of the second lead row, and an other part of the chip electrodes of the second chip are connected to an other part of the lead terminals of the second lead row,
wherein a distance between the lead terminals of the first lead row is set longer than a distance between the lead terminals of the second lead row to thereby allow the lead terminals of the first lead row withstand a higher applied voltage than the lead terminals of the second lead row, and
wherein the sealing resin fills at least between the lead terminals of the first lead row.

2. A semiconductor device in which a first chip having a function of lowering an input voltage and a second chip having a function of performing signal processing on an output signal of the first chip are mounted on a die pad, wire connections are made between a part of chip electrodes of the first chip and the second chip and between an other part of the chip electrodes of the first chip and the second chip and external lead terminals, and a sealing resin is provided to seal,
wherein the lead terminals constitute a first lead row and a second lead row which are opposite to each other with the die pad interposed in between, each of the first lead row and the second lead row having plural lead terminals,
wherein the first chip has resistors as main constituent elements,
wherein the second chip has an operational amplifier as a main constituent element,
wherein the lead terminals of the first lead row are two lead terminals which are connected to two respective resistor chip electrodes formed along one side of the rectangular-shaped first chip facing the first lead row,
wherein other resistor chip electrodes formed along an other side of the first chip opposite to the first lead row are connected to a part of operational amplifier chip electrodes formed along one side of the rectangular-shaped second chip facing the first lead row or a part of the lead terminals of the second lead row,
wherein an other part of the operational amplifier chip electrodes of the second chip are connected to an other part of the lead terminals of the second lead row,
wherein voltages applied to the two lead terminals of the first lead row are divided by resistors formed in the first chip, and resulting divided voltages are input to an inverting input terminal and a non-inverting input terminal of the operational amplifier formed in the second chip, and
wherein an output signal that is produced by the second chip is externally output from one of the lead terminals of the second lead row,
wherein the two lead terminals of the first lead row are spaced from each other by a distance adjusted to allow the two lead terminals to withstand the voltages applied thereto, and
wherein the sealing resin fills at least between the two lead terminals of the first lead row.

3. A semiconductor device in which a first chip having a function of lowering an input voltage and a second chip having a function of performing signal processing on an output signal of the first chip are mounted on a die pad, wire connections are made between a part of chip electrodes of the first chip and the second chip and between an other part of the chip electrodes of the first chip and the second chip and external lead terminals, and a sealing resin is provided to seal,
wherein the lead terminals constitute a first lead row and a second lead row which are opposite to each other with the die pad interposed in between, each of the first lead row and the second lead row having plural lead terminals,
wherein the first chip has resistors as main constituent elements, the resistors including a first voltage-dividing resistor series, a second voltage-dividing resistor series and a feedback resistor.
wherein the second chip has an operational amplifier as a main constituent element,
wherein the lead terminals of the first lead row are two lead terminals which are connected to two respective resistor chip electrodes formed along one side of the rectangular-shaped first chip facing the first lead row, one of the two resistor chip electrodes being connected to the first voltage-dividing resistor series for dividing a voltage applied thereto, an other one of the two resistor chip electrodes being connected to the second voltage-dividing resistor series for dividing a voltage applied thereto,
wherein other resistor chip electrodes formed along an other side of the first chip opposite to the first lead row are connected to a part of operational amplifier chip electrodes formed along one side of the rectangular-shaped second chip facing the first lead row or a part of the lead terminals of the second lead row, the other resistor chip electrodes including a first series connection point for outputting a first divisional voltage from the first voltage-dividing resistor series and a second series connection point for outputting a second divisional voltage from the second voltage-dividing resistor series, the first series connection point and the second series connection point being connected to an inverting input terminal and a non-inverting input terminal of the part of the operational amplifier chip electrodes,
wherein the feedback resistor is connected between an output terminal of the part of the operational amplifier chip electrodes and the inverting input terminal of the part of the operational amplifier chip electrodes,
wherein an other part of the operational amplifier chip electrode is connected to an other part of the lead terminals of the second lead row,
wherein voltages applied to the two lead terminals of the first lead row are divided by the first voltage-dividing resistor series and the second voltage-dividing resistor series, and resulting divided voltages are input to the inverting input terminal and the non-inverting input terminal of the operational amplifier formed in the second chip,
wherein an output signal that is produced by the second chip is externally output from one of the lead terminals of the second lead row,
wherein the two lead terminals of the first lead row are spaced from each other by a distance adjusted to allow the two lead terminals to withstand the voltages applied thereto, and
wherein the sealing resin fills at least between the two lead terminals of the first lead row.

4. The semiconductor device of claim 1,
wherein auxiliary interconnections are formed on a surface portion of the first chip at the other side thereof facing the second lead row, and
wherein the other chip electrode of the second chip is connected to the other lead terminal of the second lead row via the auxiliary interconnections.

5. The semiconductor device of claim 2,
wherein auxiliary interconnections are formed on a surface portion of the first chip at the other side thereof facing the second lead row, and
wherein an other part of the operational amplifier chip electrodes and the output terminal of the operational amplifier are connected to the lead terminals of the second lead row via the auxiliary interconnections.

6. The semiconductor device of claim 1,
wherein one lead terminal of the second lead row is connected to one chip electrode of the first chip or one chip electrode of the second chip via a relay chip that is mounted on the die pad.

7. The semiconductor device of claim 2,
wherein one lead terminal of the second lead row is connected to one resistance chip electrode of the first chip or one operational amplifier chip electrode of the second chip via a relay chip that is mounted on the die pad.

8. The semiconductor device of claim 1,
wherein suspension leads are further provided to the second lead row.

9. The semiconductor device of claim 1,
wherein the sealing resin further covers a back surface of the die pad.

10. The semiconductor device of claim 1,
wherein one lead terminal of the second lead row is connected to one chip electrode of the first chip and the second chip, one resistor chip electrode of the first chip, or one operational amplifier chip electrode of the second chip via a relay chip that is mounted on the die pad, the relay chip including an ESD protection element.

11. The semiconductor device of claim 2,
wherein the second chip further includes an additional operational amplifier in addition to the operational amplifier, and
wherein operational amplifier electrodes of the additional operational amplifier are arranged along an other side of the second chip facing the second lead row, and alongside a second-lead-row-side edge of the second chip and connected to the other part of the lead terminals of the second lead row.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Systems And Methods For Producing Objects Incorporating Selectably Active Electromagnetic Energy Filtering Layers And Coatings

Technical Field and Background:
1. Field of the Disclosed Embodiments This disclosure relates to systems and methods for forming electrically-activated filter layers and shutter components including energy/light directing or scattering layers that are actively electrically switchable between a first mode in which the layers, and thus the presentation of the shutter component, appear substantially transparent (or translucent) to impinging energy when viewed from an energy/light incident side and a second mode in which the layers, and thus the presentation of the shutter component, appear opaque to the impinging energy when viewed from the energy/light incident side, by uniquely implementing energy/light directing/scattering techniques in energy/light transmissive layers, and to objects, object portions, wall plates, lenses, filters, screens and the like that are formed of, or that otherwise incorporate, such electrically-activated layers and/or shutter components. 2. Related Art An ability to provide or promote selectable transmission of electromagnetic energy, including light in the visual or near-visual radiofrequency (RF) spectrum through layers, materials, screens, structures or structural components provide substantial benefit in a number of real-world use cases and applications. In the Background Section of the related EE1-P1 and EE1-P2 cases identified above, certain of these real-world use cases and applications are discussed in detail. The different uses of windows, skylights and the like, whether left transparent, or otherwise frosted, tinted or treated in some manner, in allowing the interiors of structures to be “naturally” sunlit are examples. Modification of the transparent lighting capability of a particular window is useful to address certain concerns including privacy and security, and to provide certain selected aesthetics (in the use of, for example, stained-glass windows). It is recognized that clear (transparent) windows may be usable in some scenarios, while surface, or internally, treated windows may be usable in other scenarios. In generally all techniques employed to modify the energy/light transmissive properties of a particular window, or window pane, whether formed of glass or other transparent material, it is recognized that light passing through those windows, in either direction, is generally affected by whatever treatment is applied on, or in, the individual glass or other material windows or window panes substantially equally in both directions. Window treatments are also provided that result in a substantially one-way mirror (also referred to in some instances as a two-way mirror). The one-way mirror panels are particularly formed to be partially reflective, and partially transparent, by tuning the optical properties of the panels to produce an optical “trick” based on differential lighting between opposing surfaces of the mirror. It is noted that the intensity of the light has to be differential between the two sides of the one-way mirror because, in actuality, the light energy always passes through the mirror again substantially equally in both directions. Thus, the principle of operation is to keep one side brightly lit rendering that side “difficult” to see through based on the principle that the reflected light masks visual penetration of the mirror from the brightly lit side. The very effect that is intended, in that a substantial portion of the incident light be reflected back from the “lighted” side of the mirror, provides a substantially non-modifiable adverse transmissive property of the ambient light on the lighted side of the panel through the panel. High-end vehicle window tinting accomplishes essentially the same effect in adding an inner or outer reflective layer. The configuration of the substantially darkened tinting is known to adversely affect a light transmissive property, for example, when observed from an outside of the vehicle to an inside of the vehicle, which is necessarily darkened or shaded in a non-discriminant manner. Recently, advertising schemes have emerged in which what is commercially described as a “View Through Vinyl” is applied to windows to provide what, at first observation, appears to be opaque signage, often in the form of a particular advertisement, formed on office windows, on a bus windows, or on other like glass surface that is selected for ease of application, and removal as necessary of the vinyl application.

Invention Disclosure:
A system and method are provided for forming body structures including energy filters/shutter components, including energy/light directing/scattering layers that are actively electrically switchable. The filters or components are operable between at least a first mode in which the layers, and thus the presentation of the shutter components, appear substantially transparent when viewed from an energy/light incident side, and a second mode in which the layers, and thus the presentation of the energy filters or shutter components, appear opaque to the incident energy impinging on the energy incident side. The differing modes are selectable by electrically energizing, differentially energizing and/or de-energizing electric fields in a vicinity of the energy scattering layers, including electric fields generated between a pair of transparent electrodes sandwiching an energy scattering layer. Refractive indices of transparent particles, and the transparent matrices in which the particles are fixed, are tunable according to the applied electric fields.

[Assistant]
1. An object body structure, comprising:
a structural body member with an energy-incident face including at least first portions and second portions; and
an energy scattering layer formed over the at least the first portions of the energy-incident face of the structural body member, the energy scattering layer having an energy-incident surface and a body side surface opposite the energy-incident surface, the energy scattering layer comprising:
a plurality of substantially-transparent particles; and
a substantially-transparent matrix material that fixes the substantially-transparent particles in a layer arrangement to form the energy scattering layer,
the substantially-transparent particles being fixed in the matrix material in a manner that causes the layer arrangement to have a first refractive index in a first mode, and a second refractive index different from the first refractive index in a second mode when subjected to effects from an externally-applied electrical field,
refractive indices of at least some of the plurality of substantially-transparent particles fixed in the substantially-transparent matrix material being modified by the externally-applied electrical field between the first mode and the second mode, and
a refractive index of at least a portion of the substantially-transparent matrix material being modified by the externally-applied electrical field between the first mode and the second mode.

2. The object body structure of claim 1, further comprising:
at least one transparent electrode positioned on one of the energy-incident surface or the body side surface of the energy scattering layer, and in contact with the energy scattering layer; and
a power source that generates the electrical field via the at least one first transparent electrode.

3. The object body structure of claim 2, further comprising a controller for controlling the power source,
the controller being configured to receive a control input from one of an electrically-activated component or an electronic device with which the object body structure is associated, the controller commanding the power source to generate the electrical field to switch the layer arrangement between the first mode and the second mode according to the control input.

4. The object body structure of claim 3,
the first refractive index in the first mode rendering the energy scattering layer substantially transparent over the at least the first portions of the energy-incident face of the structural body member, and
the second refractive index in the second mode causing the energy-incident surface of the energy scattering layer to present an opaque appearance in response to incident energy in the form of light energy in the visual range over the at least the first portions of the energy-incident face of the structural body member.

5. The object body structure of claim 4, the second refractive index in the second mode being adjusted according to (1) the applied electrical field and (2) one or more of an index of refraction of the particles, a size of the particles, a material from which the particles are formed, a structural composition of the particles including a multi-layered structure in which each of a plurality of layers displays a different index of refraction and a composition of the matrix material.

6. The object body structure of claim 5, the at least one transparent electrode being formed to have a plurality of discrete electrode portions for inducing a plurality of separate electrical fields acting on the energy scattering layer,
discrete portions of the energy scattering layer exhibiting different responses to the plurality of separate electrical fields based on having a plurality of different second refractive indices among the discrete portions in the second mode.

7. The object body structure of claim 6, the discrete portions of the at least one transparent electrode comprising a pattern formed by one or more of (1) valleys formed in and (2) protrusions formed on the energy-scattering layer facing side of the at least one transparent electrode, the different responses causing the pattern to appear in the energy-incident surface of the energy scattering layer in the second mode.

8. The object body structure of claim 1, the energy scattering layer in the second mode reflecting a substantially same wavelength of the incident light from the energy-incident surface in a manner that causes the energy-incident surface to cause the first portions of the structural member to appear as single-color opaque surface portions.

9. The object body structure of claim 1, the energy scattering layer in the second mode reflecting a first wavelength of the incident light from first discrete portions of the energy-incident surface and at least one second wavelength of the incident light from one or more second discrete portions of the energy-incident surface in a manner that causes the first portions of the structural member to appear as at least one of multi-color or texturized opaque surface portions.

10. The object body structure of claim 1, the energy scattering layer being formed additionally over the at least the second portions of the energy-incident face of the structural body member.

11. The object body structure of claim 10, the structural body member being a transparent structural body member.

12. The object body structure of claim 1, the structural body member comprising a wall plate.

13. A method for filtering energy through a structure, comprising:
providing a structural body member with an energy-incident face including at least first portions and second portions, the at least the first portions being transparent; and
forming an energy scattering layer over the at least the first portions of the energy-incident face of the structural body member, the energy scattering layer having an energy-incident surface and a body side surface opposite the energy-incident surface, the energy scattering layer comprising:
a plurality of substantially-transparent particles; and
a substantially-transparent matrix material that fixes the substantially-transparent particles in a layer arrangement to form the energy scattering layer;
fixing the substantially-transparent particles in the matrix material in a manner that causes the layer arrangement to have a first refractive index in a first mode, and a second refractive index different from the first refractive index in a second mode when subjected to effects from an externally-applied electrical field, and
alternately exposing the layer arrangement to the externally-applied electrical field to cause the layer arrangement to switch between the first mode and the second mode,
refractive indices of at least some of the plurality of substantially-transparent particles fixed in the substantially-transparent matrix material being modified by the externally-applied electrical field between the first mode and the second mode, and
a refractive index of at least a portion of the substantially-transparent matrix material being modified by the externally-applied electrical field between the first mode and the second mode.

14. The method of claim 13, further comprising:
positioning at least one transparent electrode on one of the energy-incident surface and the body side surface of the energy scattering layer;
connecting the at least one transparent electrode to a power source that is controlled to induce the electrical field in the energy scattering layer; and
controlling, with a controller, the power source to switch the energy scattering layer between the first mode and the second mode.

15. The method of claim 14, further comprising receiving, with the controller, a control input from one of an electrically-activated component or an electronic device with which the object body structure is associated, the controller commanding the power source to generate the electrical field to switch the layer arrangement between the first mode and the second mode according to the control input.

16. The method of claim 15,
the first refractive index in the first mode rendering the energy scattering layer substantially transparent over the at least the first portions of the energy-incident face of the structural body member, and
the second refractive index in the second mode causing the energy-incident surface of the energy scattering layer to present an opaque appearance in response to incident energy in the form of light energy in the visual range over the at least the first portions of the energy-incident face of the structural body member.

17. The method of claim 16, the second refractive index in the second mode being adjusted according to (1) the applied electrical field and (2) one or more of an index of refraction of the particles, a size of the particles, a material from which the particles are formed, a structural composition of the particles including a multi-layered structure in which each of a plurality of layers displays a different index of refraction and a composition of the matrix material.

18. The method of claim 17, further comprising forming the at least one transparent electrode to have a plurality of discrete electrode portions for inducing a plurality of separate electrical fields acting on the energy scattering layer, the discrete portions of the energy scattering layer exhibiting different responses to the plurality of separate electrical fields based on having a plurality of different second refractive indices among the discrete portions in the second mode.

19. The method of claim 18, further comprising patterning the plurality of discrete portions of the at least one transparent electrode by forming one or more of (1) valleys in and (2) protrusions on the energy scattering layer facing side of the at least one transparent electrode, the different responses causing the pattern to appear in the energy-incident surface of the energy scattering layer in the second mode.

20. The method of claim 13, further comprising causing the energy scattering layer in the second mode to reflect a substantially same wavelength of the incident light from the energy-incident surface in a manner that causes the energy-incident surface to cause the first portions of the structural member to appear as single-color opaque surface portions.

21. The method of claim 13, further comprising causing the energy scattering layer in the second mode to reflect a first wavelength of the incident light from first discrete portions of the energy-incident surface and at least one second wavelength of the incident light from one or more second discrete portions of the energy-incident surface in a manner that causes the first portions of the structural member to appear as at least one of multi-color or texturized opaque surface portions.

22. The method of claim 13, further comprising forming the energy scattering layer additionally over the at least the second portions of the energy-incident face of the structural body member.

23. The method of claim 22, the structural body member being a transparent structural body member.

24. The method of claim 13, further comprising configuring the structural body member as a wall plate.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Diode Structure

Technical Field and Background:
1. Field of the Invention The present invention generally relates to a diode structure. More particularly, the present invention relates to a diode with multiple-concentric-rectangular-ring structure. 2. Description of the Prior Art A charge pump is a kind of circuit design which is very common in a circuit system. The charge pump is able to generate an output voltage greater in magnitude than the input voltage. The charge pump is applied widely in different kind of chips. For example, a charge pump is usually integrated in an electrical erasable programmable read only memory (EEPROM), which usually needs a voltage for the programming and erasing operations higher than the voltage available from the peripheral circuit. The integrated charge pump may multiply the voltage from the circuit, to provide an appropriate voltage for the programming and erasing operations of the memory. With the integration of the semiconductor manufacturing technology and the micro-electromechanical systems (MEMS), a semiconductor chip (biochip) which is able to detect and monitor the biological signals is developed. Generally, the electrical signal generated by an organism is very small, such as only several millivolts (mV), or even only several microvolts (μV). To detect and analyze the biological signal, a charge pump is usually integrated in a biochip to multiply the voltage of the biological electrical signal to a magnitude within the operation voltage range of the semiconductor devices embedded in the chip. The typical charge pump circuit, for example, the Dickson Charge Pump, comprises serial connected clocked diode-capacitor voltage multipliers. By controlling the capacitors' charging/discharging cycle and the diodes' dis-conducting/conducting cycle, the charges are pumped and the total number of the charges is multiplied successively along the diode chain in the forward-biased direction, and therefore the current is multiplied. However, in real process of the charge pumping, a portion of the current would tend to flow to the substrate instead of the ideal path aforesaid when the diode is forward-biased and conducting. The current flowing to the substrate becomes the leakage current. This phenomenon would have negative influences on the efficiency of the charge pump. Therefore, there is still a need in the field to provide a diode with better performance, which has smaller leakage current and larger forward current.

Invention Disclosure:
A diode structure includes a rectangular first doping region, and a second doping region surrounds the first doping region wherein the first doping region and the second doping region are separated by a first isolation structure. A third doping region surrounds the second doping region wherein the second doping region and the third doping region are separated by a second isolation structure. The first isolation structure, the second doping region, the second isolation structure and the third doping region are arranged in a quadruple concentric rectangular ring surrounding the first doping region.

[Assistant]
1. A diode structure, comprising:
a substrate;
a first doping region disposed in the substrate, wherein the first doping region has a first conductive type and is a rectangle from the top view, and has an aspect ratio of dividing the length of the first doping region by the width of the first doping region larger than 2;
a second doping region, encircling the first doping region and having a second conductive type, wherein the first conductivity type and the second conductivity type are complementary;
a first isolation structure disposed between the first doping region and the second doping region;
a third doping region, encircling the second doping region;
a second isolation structure disposed between the second doping region and the third doping region;
a fourth doping region, encircling the third doping region; and
a third isolation structure disposed between the third doping region and the fourth doping region, wherein the first isolation structure, the second doping region, the second isolation structure, the third doping region, the third isolation structure and the fourth doping region are arranged in a sextuple concentric rectangular ring encircling the first doping region from the top view.

2. The diode structure according to claim 1 further comprising a connecting structure, wherein the connecting structure is electrically connecting the second doping region and the third doping region.

3. The diode structure according to claim 1, wherein the aspect ratio of the first doping region is between 2 and 10.

4. The diode structure according to claim 1, wherein the aspect ratio of the first doping region is between 10 and 20.

5. The diode structure according to claim 1, wherein the aspect ratios of the first isolation structure, the second doping region, the second isolation structure and the third doping region in the quadruple concentric rectangular ring are the same as that of the first doping region.

6. The diode structure according to claim 1, wherein the first doping region, the second doping region and the first isolation structure are disposed in a first well which has the second conductive type.

7. The diode structure according to claim 6, wherein the first doping region is the cathode of the diode, and the second doping region is the anode of the diode.

8. The diode structure according to claim 6, wherein the first well, the third doping region and the second isolation structure are encompassed by a deep well.

9. The diode structure according to claim 8, wherein the third doping region and the deep well have the first conductive type.

10. The diode structure according to claim 8, wherein the third doping region and the deep well have the second conductive type.

11. The diode structure according to claim 10, wherein the first doping region is the cathode of the diode, and the electrically connected second doping region and the third toping region are the anode of the diode.

12. The diode structure according to claim 8 further comprising a second well disposed between the third doping region and the deep well, and the second well is fully separated from the first well by the second isolation structure.

13. The diode structure according to claim 1, wherein the first isolation structure, the second doping region, the second isolation structure, the third doping region, the third isolation structure and the fourth doping region have the same aspect ratio as the first doping region.

14. The diode structure according to claim 1, further comprising a third well-disposed between the fourth doping region and the substrate.


[System] You are an expert US patent attorney. Draft a set of independent and dependent claims based on the provided invention description. Use correct USPTO formatting.

[User]
Title: Vehicle Upper Back Panel Structure

Technical Field and Background:
1. Technical Field The present disclosure relates to a vehicle upper back panel structure. 2. Related Art Japanese Patent Application Laid-Open (JP-A) No. 2012-111308 describes an upper back panel (rear parcel shelf) structure. Specifically, an upper back panel that is installed to a rear section of a vehicle, partitions between a vehicle compartment and a luggage compartment. The upper back panel includes: a horizontal wall section disposed substantially horizontally; a speaker attachment hole for attaching a speaker; an anchor member disposed in front of the speaker attachment hole and for anchoring an anchor member of a child seat, and a patch provided at peripheral edges of the speaker attachment opening. A bead extending along the vehicle width direction at a position near the anchor member is formed to the patch. In general, when tension load toward the vehicle front-rear direction front side is applied through the anchor member, high stress is imparted in a localized manner to the peripheral edge of the speaker attachment opening, particularly at portions on both vehicle width direction sides. In this structure, the front bead formed to the patch disperses the tension load, thus avoiding a concentration of stress at the peripheral edge of the speaker attachment opening. When the upper back panel vibrates in the vehicle up-down direction due to, for example, input from the road surface when the vehicle is travelling, a drop in the NV (Noise and Vibration) performance (vibration and vibration noise suppression performance) may occur. Accordingly, in order to suppress vibration of the upper back panel in the vehicle up-down direction, it is necessary to dispose a structure that increases the rigidity of the upper back panel at an optimal position. However, in the configuration described in JP-A No. 2012-111308, since front-rear direction beads that increase the rigidity of the upper back panel and that extend along the vehicle front-rear direction in shapes protruding toward the vehicle upper side, are formed adjacent on both sides of the anchor member attached at the vehicle width direction center, vibration of the upper back panel may not be suitably suppressed.

Invention Disclosure:
The present disclosure provides a vehicle upper back panel structure including: an upper back panel, provided at a rear section of a vehicle, that is formed in a rectangular plate shape with a length direction along a vehicle width direction in vehicle plan view, that is fixed to a vehicle body at end portions on both vehicle width direction sides by respective fixing portions, and that includes a horizontal wall section disposed horizontally between the fixing portions; and a front-rear direction bead that is formed continuously along a vehicle front-rear direction from a front end portion to a rear end portion of the horizontal wall section of the upper back panel, at a position including a central portion in the vehicle width direction between one of the fixing portions and the other of the fixing portions of the upper back panel.

[Assistant]
1. A vehicle upper back panel structure comprising:
an upper back panel, provided at a rear section of a vehicle, the upper back panel being formed in a rectangular plate shape with a length direction along a vehicle width direction in vehicle plan view, the upper back panel having one end and another end in the vehicle width direction, each of the one end and the other end having a fixing portion which is fixed to a body of the vehicle, and the upper back panel including a horizontal wall section disposed horizontally between the fixing portions; and
a front-rear direction bead that is formed continuously along a vehicle front-rear direction from a front end portion to a rear end portion of the horizontal wall section of the upper back panel, the front-rear direction bead being formed at a position including a central portion in the vehicle width direction between (i) the fixing portion of the one end of the upper back panel and (ii) the fixing portion of the other end of the upper back panel,
wherein the front-rear direction bead projects downward in a vehicle up-down direction from the horizontal wall section, and is formed with a bottom face that is disposed lower than the horizontal wall section in the vehicle up-down direction, and
wherein, a protrusion is formed at at least one of a front end portion or a rear end portion of the bottom face, an upper end of the protrusion being disposed lower than the horizontal wall section in the vehicle up-down direction.

2. The vehicle upper back panel structure of claim 1, wherein an anchor member is provided at a vehicle upper side face of the front-rear direction bead, the anchor member projecting upward from the vehicle upper side face of the front-rear direction bead in the vehicle up-down direction, the anchor member is configured to detachably anchor a child seat.

3. The vehicle upper back panel structure of claim 1, wherein the upper back panel is provided with:
a speaker attachment portion for attaching a speaker;
a terminal front-rear direction bead, provided at the vehicle width direction outside of the speaker attachment portion, the terminal front-rear direction bead being formed continuously along the vehicle front-rear direction from the front end portion to the rear end portion of the horizontal wall section; and
a step portion is formed at the vehicle front-rear direction rear side of the speaker attachment portion, the step portion extending along the vehicle width direction, and the step portion projecting downward in the vehicle up-down direction with respect to the speaker attachment portion, and
wherein the front-rear direction bead is provided inside of the speaker attachment portion in the vehicle width direction.

4. The vehicle upper back panel structure of claim 1, wherein the front-rear direction bead projects downward from the horizontal wall section in a vehicle up-down direction, and is formed with a bottom face that is disposed lower than the horizontal wall section in the vehicle up-down direction, the horizontal wall section having a hole that is configured to receive a speaker.