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| 1 |
+
# Bug Report: 4 Critical Issues Found in NAS / GPU Path (branch `do-not-merge-gpu-tests-from-23`)
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**Reporter:** ML Intern
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**Branch audited:** `do-not-merge-gpu-tests-from-23`
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**Fix branch:** `fix-gpu-tests-from-23-v2`
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**Severity:** High β NAS trials have been wasted on dead parameters; GPU training fails with OOM / NaN / compile crashes.
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---
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## Summary
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During a neural-architecture-search audit of `nas_helixlm.py` v2.3 on the `do-not-merge-gpu-tests-from-23` branch, four interrelated bugs were found in `graph.py`, `mamba2.py`, `nodes.py`, `trainer.py`, and `nas_helixlm.py`. All four have been fixed in branch `fix-gpu-tests-from-23-v2` (see commit `d6619f4`).
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| # | Bug | File(s) | Impact |
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|---|-----|---------|--------|
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| 1 | `nodes_per_column` is ignored by `_build_node_spec()` | `graph.py` | NAS permutes a dead parameter; topology is not reproducible by `seed` alone |
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| 2 | Mamba2 / SSM scan builds a 256-step autograd chain β OOM | `mamba2.py`, `nodes.py` | GPU OOM on SSM configs; ~1.1 GB saved tensors per mamba2 node |
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| 3 | `fp16` AMP forced for `seq_len > 128` β NaN | `nas_helixlm.py`, `trainer.py` | Immediate NaN on small models where there is no memory pressure |
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| 4 | `torch.compile` crashes on custom Python loops | `mamba2.py`, `nodes.py`, `nas_helixlm.py` | Inductor graph-breaks / invalid kernels on GPU; compile silently skipped for SSM/Titans configs |
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---
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## 1. `nodes_per_column` is dead β `_build_node_spec()` ignores it
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### Evidence
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`config.py` docstrings and presets (lines 22-28, 311-380) advertise `nodes_per_column` tuples like `(2,2)`, `(2,3,2)`, `(3,4,4,3)`. Validation logic (lines 249-256) even pads/truncates the tuple to match `n_columns`.
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**However**, `graph.py` lines 88-148 hardcode every column to:
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```python
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column = [
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("linear_attn" | "full_attn", {β¦}),
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("swiglu", {β¦}),
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("mamba2" | "ssm", {β¦}) # if use_ssm
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("titans", {β¦}) # if use_titans and ci==0
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("gate", {β¦}) # always appended
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]
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```
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`nodes_per_column` is **never read** after validation.
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### Fix
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Wire `nodes_per_column` into `_build_node_spec()` by repeating the `[attention, swiglu]` base pattern until the target count is reached. Optional SSM/Titans nodes consume one slot each. A gate is appended when there are multiple compute nodes or when `ci > 0`.
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```python
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for ci in range(cfg.n_columns):
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target = cfg.nodes_per_column[ci] # e.g. 3
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# Build base: attn + swiglu
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# Insert optional SSM/Titans if room
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# Repeat [attn, swiglu] to fill remaining slots
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# Append gate for aggregation
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```
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The RNG seed already controls lateral/vertical wiring; with this fix the **node count** is also deterministic and reproducible.
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---
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## 2. OOM from mamba2 scan's 256-step autograd chain
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### Evidence
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`_ssd_chunked_scan` (and `_ssm_chunked_scan` in `nodes.py`) keeps every intermediate `h` tensor for backward:
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```python
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h = A_c[:, t] * h + B_c[:, t] * x_c[:, t].unsqueeze(-1)
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# h is (B, d_inner, d_state) β kept for ALL timesteps
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```
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For `B=32, d_inner=768, d_state=64`, each mamba2 node alone stores **~1.1 GB** of saved tensors. Multiple columns and loops multiply this.
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### Fix
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Wrap each chunk's inner loop in `torch.utils.checkpoint`:
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```python
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def _chunk_scan(h_in, A_c_in, ...):
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h = h_in
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for t in range(chunk_size):
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h = ...
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ys_c.append(y_t)
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return h, torch.stack(ys_c, dim=1)
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h, ys_chunk = torch.utils.checkpoint.checkpoint(
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_chunk_scan, h, A_c, B_c, x_c, C_c,
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use_reentrant=False,
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)
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```
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Only the **chunk boundary** `h` states are materialised for backward. Trade ~10β20 % extra compute for an order-of-magnitude memory reduction.
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---
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## 3. fp16 AMP causes NaN on `seq_len β₯ 256`
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### Evidence
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`nas_helixlm.py` line 395 forced `dtype_str = "float32"` everywhere because fp16 caused immediate NaN on `d β₯ 256` with `LR=3e-3`. The root cause is not fp16 universally, but this architecture's SSM scan, Titans memory updates, and `ELU+1.0` feature maps β all of which underflow in fp16's narrow dynamic range.
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### Fix
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Use **bfloat16** instead of fp16 on GPU. bf16 shares the same 8-bit exponent range as fp32, so it does not underflow on the scan or memory updates. It is natively supported on Ampere+ (A100, H100, L4) and is typically as fast as fp16.
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```python
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if torch.cuda.is_available():
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dtype_str = "bfloat16"
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use_amp = True
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else:
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dtype_str = "float32"
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use_amp = False
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```
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The `Trainer` was also updated to skip `GradScaler` when the AMP dtype is bf16 (no loss-scaling needed) and to pass `torch.bfloat16` to `torch.amp.autocast`.
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---
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## 4. `torch.compile` breaks on custom Python loops
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### Evidence
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The inductor backend cannot compile the `for t in range(chunk_size)` loops with in-place `h` mutations inside `_ssd_chunked_scan` and `TitansMemoryNode.forward`. The old workaround in `nas_helixlm.py` simply **skipped compilation entirely** for any SSM/Titans config:
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```python
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if use_ssm or use_titans:
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return model, False, "skipped: SSM/Titans autograd not compile-safe"
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```
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### Fix
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Decorate the loop functions with `@torch.compiler.disable`. This tells the inductor backend to treat them as opaque ops β the rest of the model (embeddings, linear projections, attention, SwiGLU) still gets compiled.
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Decorated functions:
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- `mamba2._ssd_chunked_scan`
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- `nodes._ssm_chunked_scan`
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- `nodes.TitansMemoryNode.forward`
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`try_compile_model` in `nas_helixlm.py` now removes the SSM/Titans skip and attempts compilation for all configs.
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---
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## Reproducing the Baseline
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The sacred CPU baseline (1000 samples, seq_len=96, 14 epochs) should yield:
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- Train perplexity **~ 23**
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- Val perplexity **~ 85β86**
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- Throughput **~ 1,892 tok/s**
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With these fixes applied, GPU configs should hit the same numbers (or better, thanks to bf16 + compile) without NaN or OOM.
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---
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## Patched Files
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| File | Lines changed | Nature of change |
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|------|---------------|------------------|
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| `helix_lm/graph.py` | +56 / β20 | `_build_node_spec()` now reads `nodes_per_column` |
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| `helix_lm/mamba2.py` | +25 / β6 | `@torch.compiler.disable` + `checkpoint` on chunk scan |
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| `helix_lm/nodes.py` | +23 / β7 | Same for `_ssm_chunked_scan` + `TitansMemoryNode.forward` |
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| `helix_lm/trainer.py` | +29 / β11 | bf16 autocast, conditional GradScaler |
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| `nas_helixlm.py` | +25 / β12 | bf16 dtype selection, remove compile skip for SSM/Titans |
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---
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## Branch
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`fix-gpu-tests-from-23-v2` (forked from `do-not-merge-gpu-tests-from-23`)
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**Note:** I do not have write access to push this branch to GitHub. The commit `d6619f4` is ready in the local workspace; please pull / cherry-pick / review before merging to `main`.
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