RegisterInfo,eliminateFrameIndex,PULP,Allocation,Err_Def
RegisterInfo,getReservedRegs,PULP,Allocation,Err_Def
RegisterInfo,hasReservedSpillSlot,PULP,Allocation,Err_Def
AsmParser,addFenceArgOperands,PULP,Assembler,Err_Def
AsmParser,AsmParser,PULP,Assembler,Err_Def
AsmParser,classifySymbolRef,PULP,Assembler,Err_Def
AsmParser,defaultMaskRegOp,PULP,Assembler,Err_Def
AsmParser,getFeatureBits,PULP,Assembler,Err_Def
AsmParser,getRoundingMode,PULP,Assembler,Err_Def
AsmParser,isFenceArg,PULP,Assembler,Err_Def
AsmParser,isFRMArg,PULP,Assembler,Err_Def
AsmParser,MatchAndEmitInstruction,PULP,Assembler,Err_Def
AsmParser,matchRegisterNameHelper,PULP,Assembler,Err_Def
AsmParser,Operand2,PULP,Assembler,Err_Def
AsmParser,parseAtomicMemOp,PULP,Assembler,Err_Def
AsmParser,parseCallSymbol,PULP,Assembler,Err_Def
AsmParser,parseCSRSyestemRegister,PULP,Assembler,Err_Def
AsmParser,ParseDirective,PULP,Assembler,Err_Def
AsmParser,ParseInstruction,PULP,Assembler,Err_Def
AsmParser,parseJALOffset,PULP,Assembler,Err_Def
AsmParser,parseMaskReg,PULP,Assembler,Err_Def
AsmParser,parseMemOpBaseReg,PULP,Assembler,Err_Def
AsmParser,parseOperand,PULP,Assembler,Err_Def
AsmParser,parsePseudoJumpSymbol,PULP,Assembler,Err_Def
AsmParser,parseRegister2,PULP,Assembler,Err_Def
AsmParser,parseVTypeI,PULP,Assembler,Err_Def
AsmParser,print,PULP,Assembler,Err_Def
Disassembler,decodeFRMArg,PULP,Disassembler,Err_Def
Disassembler,DecodeGPRRegisterClass,PULP,Disassembler,Err_Def
Disassembler,decodeRVCInstrRdRs1UImm,PULP,Disassembler,Err_Def
Disassembler,decodeRVCInstrRdSImm,PULP,Disassembler,Err_Def
Disassembler,decodeRVCInstrSImm,PULP,Disassembler,Err_Def
Disassembler,getInstruction,PULP,Disassembler,Err_Def
AsmBackend,AsmBackend,PULP,Emission,Err_Def
AsmBackend,evaluateTargetFixup,PULP,Emission,Err_Def
AsmBackend,relaxInstruction,PULP,Emission,Err_Def
AsmBackend,requiresDiffExpressionRelocations,PULP,Emission,Err_Def
AsmBackend,shouldForceRelocation,PULP,Emission,Err_Def
AsmBackend,shouldInsertExtraNopBytesForCodeAlign,PULP,Emission,Err_Def
AsmBackend,shouldInsertFixupForCodeAlign,PULP,Emission,Err_Def
AsmBackend,willForceRelocations,PULP,Emission,Err_Def
BaseInfo,computeTargetABI,PULP,Emission,Err_Def
BaseInfo,validate,PULP,Emission,Err_Def
BaseInfo,VMTs,PULP,Emission,Err_Def
ELFStreamer,TargetELFStreamer,PULP,Emission,Err_Def
InstPrinter,printAtomicMemOp,PULP,Emission,Err_Def
InstPrinter,printCSRSystemRegister,PULP,Emission,Err_Def
InstPrinter,printFenceArg,PULP,Emission,Err_Def
InstPrinter,printFRMArg,PULP,Emission,Err_Def
InstPrinter,printInst,PULP,Emission,Err_Def
InstPrinter,printVMaskReg,PULP,Emission,Err_Def
InstPrinter,printVTypeI,PULP,Emission,Err_Def
MatInt,generateInstSeq,PULP,Emission,Err_Def
MatInt,getIntMatCost,PULP,Emission,Err_Def
MCCodeEmitter,encodeInstruction,PULP,Emission,Err_Def
MCCodeEmitter,getImmOpValue,PULP,Emission,Err_Def
MCCodeEmitter,getImmOpValueAsr1,PULP,Emission,Err_Def
MCCodeEmitter,getImmOpValueMinus1,PULP,Emission,Err_Def
MCExpr,evaluateAsConstant,PULP,Emission,Err_Def
MCExpr,getPCRelHiFixup,PULP,Emission,Err_Def
TargetStreamer,emitTargetAttributes,PULP,Emission,Err_Def
CleanupVSETVLI,runOnMachineBasicBlock,PULP,Optimization,Err_Def
ExpandAtomicPseudoInsts,expandMI,PULP,Optimization,Err_Def
ExpandPseudoInsts,expandMI,PULP,Optimization,Err_Def
ExpandSDMAInsts,expandMI,PULP,Optimization,Err_Def
ExpandSSRInsts,expandMI,PULP,Optimization,Err_Def
ExpandSSRInsts,runOnMachineFunction,PULP,Optimization,Err_Def
MergeBaseOffset,runOnMachineFunction,PULP,Optimization,Err_Def
PULPFixupHwLoops,runOnMachineFunction,PULP,Optimization,Err_Def
PULPHardwareLoops,checkForImmediate,PULP,Optimization,Err_Def
PULPHardwareLoops,convertToHardwareLoop,PULP,Optimization,Err_Def
PULPHardwareLoops,findInductionRegister,PULP,Optimization,Err_Def
PULPHardwareLoops,getLoopTripCount,PULP,Optimization,Err_Def
PULPHardwareLoops,isInvalidLoopOperation,PULP,Optimization,Err_Def
PULPHardwareLoops,runOnMachineFunction,PULP,Optimization,Err_Def
SNITCHFrepLoops,checkForImmediate,PULP,Optimization,Err_Def
SNITCHFrepLoops,containsInvalidInstruction,PULP,Optimization,Err_Def
SNITCHFrepLoops,convertToHardwareLoop,PULP,Optimization,Err_Def
SNITCHFrepLoops,findBranchInstruction,PULP,Optimization,Err_Def
SNITCHFrepLoops,findInductionRegister,PULP,Optimization,Err_Def
SNITCHFrepLoops,getLoopTripCount,PULP,Optimization,Err_Def
SNITCHFrepLoops,isInvalidLoopOperation,PULP,Optimization,Err_Def
SNITCHFrepLoops,runOnMachineFunction,PULP,Optimization,Err_Def
InstrInfo,buildOutlinedFrame,PULP,Scheduling,Err_Def
InstrInfo,copyPhysReg,PULP,Scheduling,Err_Def
InstrInfo,getInstSizeInBytes,PULP,Scheduling,Err_Def
InstrInfo,getOutliningCandidateInfo,PULP,Scheduling,Err_Def
InstrInfo,getOutliningType,PULP,Scheduling,Err_Def
InstrInfo,insertIndirectBranch,PULP,Scheduling,Err_Def
InstrInfo,insertOutlinedCall,PULP,Scheduling,Err_Def
InstrInfo,isAsCheapAsAMove,PULP,Scheduling,Err_Def
InstrInfo,isCopyInstrImpl,PULP,Scheduling,Err_Def
InstrInfo,movImm,PULP,Scheduling,Err_Def
InstrInfo,verifyInstruction,PULP,Scheduling,Err_Def
MachineFunctionInfo,getMoveF64FrameIndex,PULP,Scheduling,Err_Def
MachineFunctionInfo,useSaveRestoreLibCalls,PULP,Scheduling,Err_Def
Subtarget,initializeSubtargetDependencies,PULP,Scheduling,Err_Def
TargetMachine,addPreRegAlloc,PULP,Scheduling,Err_Def
TargetMachine,setTargetOptionsWithModuleMetadata,PULP,Scheduling,Err_Def
TargetMachine,TargetMachine,PULP,Scheduling,Err_Def
TargetObjectFile,getModuleMetadata,PULP,Scheduling,Err_Def
TargetObjectFile,isGlobalInSmallSection,PULP,Scheduling,Err_Def
TargetTransformInfo,getIntImmCost,PULP,Scheduling,Err_Def
TargetTransformInfo,getIntImmCostInst,PULP,Scheduling,Err_Def
FrameLowering,canUseAsEpilogue,PULP,Selection,Err_Def
FrameLowering,canUseAsPrologue,PULP,Selection,Err_Def
FrameLowering,determineCalleeSaves,PULP,Selection,Err_Def
FrameLowering,emitEpilogue,PULP,Selection,Err_Def
FrameLowering,emitPrologue,PULP,Selection,Err_Def
FrameLowering,getFrameIndexReference,PULP,Selection,Err_Def
FrameLowering,restoreCalleeSavedRegisters,PULP,Selection,Err_Def
FrameLowering,spillCalleeSavedRegisters,PULP,Selection,Err_Def
ISelDAGtoDAG,MatchSLLIUW,PULP,Selection,Err_Def
ISelDAGtoDAG,MatchSRLIUW,PULP,Selection,Err_Def
ISelDAGtoDAG,PostprocessISelDAG,PULP,Selection,Err_Def
ISelDAGtoDAG,Select,PULP,Selection,Err_Def
ISelDAGtoDAG,selectVLOp,PULP,Selection,Err_Def
ISelDAGtoDAG,selectVSplat,PULP,Selection,Err_Def
ISelDAGtoDAG,selectVSplatSimm5,PULP,Selection,Err_Def
ISelDAGtoDAG,selectVSplatUimm5,PULP,Selection,Err_Def
ISelLowering,analyzeInputArgs,PULP,Selection,Err_Def
ISelLowering,analyzeOutputArgs,PULP,Selection,Err_Def
ISelLowering,CanLowerReturn,PULP,Selection,Err_Def
ISelLowering,computeKnownBitsForTargetNode,PULP,Selection,Err_Def
ISelLowering,ComputeNumSignBitsForTargetNode,PULP,Selection,Err_Def
ISelLowering,decomposeMulByConstant,PULP,Selection,Err_Def
ISelLowering,EmitInstrWithCustomInserter,PULP,Selection,Err_Def
ISelLowering,emitLeadingFence,PULP,Selection,Err_Def
ISelLowering,emitMaskedAtomicCmpXchgIntrinsic,PULP,Selection,Err_Def
ISelLowering,emitMaskedAtomicRMWIntrinsic,PULP,Selection,Err_Def
ISelLowering,emitTrailingFence,PULP,Selection,Err_Def
ISelLowering,getAddr,PULP,Selection,Err_Def
ISelLowering,getPostIndexedAddressParts,PULP,Selection,Err_Def
ISelLowering,getRegForInlineAsmConstraint,PULP,Selection,Err_Def
ISelLowering,getRegisterByName,PULP,Selection,Err_Def
ISelLowering,getStaticTLSAddr,PULP,Selection,Err_Def
ISelLowering,getTgtMemIntrinsic,PULP,Selection,Err_Def
ISelLowering,isDesirableToCommuteWithShift,PULP,Selection,Err_Def
ISelLowering,isEligibleForTailCallOptimization,PULP,Selection,Err_Def
ISelLowering,isFPImmLegal,PULP,Selection,Err_Def
ISelLowering,LowerCall,PULP,Selection,Err_Def
ISelLowering,lowerEXTRACT_VECTOR_ELT,PULP,Selection,Err_Def
ISelLowering,LowerFormalArguments,PULP,Selection,Err_Def
ISelLowering,lowerINSERT_VECTOR_ELT,PULP,Selection,Err_Def
ISelLowering,LowerINTRINSIC_W_CHAIN,PULP,Selection,Err_Def
ISelLowering,LowerINTRINSIC_WO_CHAIN,PULP,Selection,Err_Def
ISelLowering,LowerOperation,PULP,Selection,Err_Def
ISelLowering,LowerReturn,PULP,Selection,Err_Def
ISelLowering,lowerShiftLeftParts,PULP,Selection,Err_Def
ISelLowering,lowerShiftRightParts,PULP,Selection,Err_Def
ISelLowering,lowerSPLATVECTOR,PULP,Selection,Err_Def
ISelLowering,lowerVectorMaskExt,PULP,Selection,Err_Def
ISelLowering,lowerVectorMaskTrunc,PULP,Selection,Err_Def
ISelLowering,PerformDAGCombine,PULP,Selection,Err_Def
ISelLowering,ReplaceNodeResults,PULP,Selection,Err_Def
ISelLowering,shouldExtendTypeInLibCall,PULP,Selection,Err_Def
ISelLowering,TargetLowering,PULP,Selection,Err_Def
ISelLowering,targetShrinkDemandedConstant,PULP,Selection,Err_Def
ISelLowering,validateCCReservedRegs,PULP,Selection,Err_Def
MCInstLower,lowerMachineInstrToMCInst,PULP,Selection,Err_Def
RegisterInfo,eliminateFrameIndex,RISCV,Allocation,Err_Def
RegisterInfo,hasReservedSpillSlot,RISCV,Allocation,Err_Def
AsmParser,addFenceArgOperands,RISCV,Assembler,Err_Def
AsmParser,AsmParser,RISCV,Assembler,Err_Def
AsmParser,classifySymbolRef,RISCV,Assembler,Err_Def
AsmParser,defaultMaskRegOp,RISCV,Assembler,Err_Def
AsmParser,getFeatureBits,RISCV,Assembler,Err_Def
AsmParser,getRoundingMode,RISCV,Assembler,Err_Def
AsmParser,isFenceArg,RISCV,Assembler,Err_Def
AsmParser,isFRMArg,RISCV,Assembler,Err_Def
AsmParser,MatchAndEmitInstruction,RISCV,Assembler,Err_Def
AsmParser,matchRegisterNameHelper,RISCV,Assembler,Err_Def
AsmParser,Operand2,RISCV,Assembler,Err_Def
AsmParser,parseAtomicMemOp,RISCV,Assembler,Err_Def
AsmParser,parseCallSymbol,RISCV,Assembler,Err_Def
AsmParser,parseCSRSyestemRegister,RISCV,Assembler,Err_Def
AsmParser,ParseDirective,RISCV,Assembler,Err_Def
AsmParser,ParseInstruction,RISCV,Assembler,Err_Def
AsmParser,parseJALOffset,RISCV,Assembler,Err_Def
AsmParser,parseMaskReg,RISCV,Assembler,Err_Def
AsmParser,parsePseudoJumpSymbol,RISCV,Assembler,Err_Def
AsmParser,parseRegister2,RISCV,Assembler,Err_Def
AsmParser,parseVTypeI,RISCV,Assembler,Err_Def
AsmParser,print,RISCV,Assembler,Err_Def
Disassembler,decodeFRMArg,RISCV,Disassembler,Err_Def
Disassembler,DecodeGPRRegisterClass,RISCV,Disassembler,Err_Def
Disassembler,decodeRVCInstrRdRs1UImm,RISCV,Disassembler,Err_Def
Disassembler,decodeRVCInstrRdSImm,RISCV,Disassembler,Err_Def
Disassembler,decodeRVCInstrSImm,RISCV,Disassembler,Err_Def
Disassembler,getInstruction,RISCV,Disassembler,Err_Def
AsmBackend,AsmBackend,RISCV,Emission,Err_Def
AsmBackend,evaluateTargetFixup,RISCV,Emission,Err_Def
AsmBackend,relaxInstruction,RISCV,Emission,Err_Def
AsmBackend,requiresDiffExpressionRelocations,RISCV,Emission,Err_Def
AsmBackend,shouldForceRelocation,RISCV,Emission,Err_Def
AsmBackend,shouldInsertExtraNopBytesForCodeAlign,RISCV,Emission,Err_Def
AsmBackend,shouldInsertFixupForCodeAlign,RISCV,Emission,Err_Def
AsmBackend,willForceRelocations,RISCV,Emission,Err_Def
BaseInfo,computeTargetABI,RISCV,Emission,Err_Def
BaseInfo,validate,RISCV,Emission,Err_Def
BaseInfo,VMTs,RISCV,Emission,Err_Def
ELFStreamer,TargetELFStreamer,RISCV,Emission,Err_Def
InstPrinter,printAtomicMemOp,RISCV,Emission,Err_Def
InstPrinter,printCSRSystemRegister,RISCV,Emission,Err_Def
InstPrinter,printFenceArg,RISCV,Emission,Err_Def
InstPrinter,printFRMArg,RISCV,Emission,Err_Def
InstPrinter,printInst,RISCV,Emission,Err_Def
InstPrinter,printVMaskReg,RISCV,Emission,Err_Def
InstPrinter,printVTypeI,RISCV,Emission,Err_Def
MatInt,generateInstSeq,RISCV,Emission,Err_Def
MatInt,getIntMatCost,RISCV,Emission,Err_Def
MCCodeEmitter,encodeInstruction,RISCV,Emission,Err_Def
MCCodeEmitter,getImmOpValue,RISCV,Emission,Err_Def
MCCodeEmitter,getImmOpValueAsr1,RISCV,Emission,Err_Def
MCExpr,evaluateAsConstant,RISCV,Emission,Err_Def
MCExpr,getPCRelHiFixup,RISCV,Emission,Err_Def
TargetStreamer,emitTargetAttributes,RISCV,Emission,Err_Def
CleanupVSETVLI,runOnMachineBasicBlock,RISCV,Optimization,Err_Def
ExpandAtomicPseudoInsts,expandMI,RISCV,Optimization,Err_Def
ExpandPseudoInsts,expandMI,RISCV,Optimization,Err_Def
MergeBaseOffset,runOnMachineFunction,RISCV,Optimization,Err_Def
InstrInfo,buildOutlinedFrame,RISCV,Scheduling,Err_Def
InstrInfo,copyPhysReg,RISCV,Scheduling,Err_Def
InstrInfo,getInstSizeInBytes,RISCV,Scheduling,Err_Def
InstrInfo,getOutliningCandidateInfo,RISCV,Scheduling,Err_Def
InstrInfo,getOutliningType,RISCV,Scheduling,Err_Def
InstrInfo,insertIndirectBranch,RISCV,Scheduling,Err_Def
InstrInfo,insertOutlinedCall,RISCV,Scheduling,Err_Def
InstrInfo,isAsCheapAsAMove,RISCV,Scheduling,Err_Def
InstrInfo,isCopyInstrImpl,RISCV,Scheduling,Err_Def
InstrInfo,movImm,RISCV,Scheduling,Err_Def
InstrInfo,verifyInstruction,RISCV,Scheduling,Err_Def
MachineFunctionInfo,getMoveF64FrameIndex,RISCV,Scheduling,Err_Def
MachineFunctionInfo,useSaveRestoreLibCalls,RISCV,Scheduling,Err_Def
Subtarget,initializeSubtargetDependencies,RISCV,Scheduling,Err_Def
TargetMachine,addPreRegAlloc,RISCV,Scheduling,Err_Def
TargetMachine,TargetMachine,RISCV,Scheduling,Err_Def
TargetObjectFile,getModuleMetadata,RISCV,Scheduling,Err_Def
TargetObjectFile,isGlobalInSmallSection,RISCV,Scheduling,Err_Def
TargetTransformInfo,getIntImmCost,RISCV,Scheduling,Err_Def
TargetTransformInfo,getIntImmCostInst,RISCV,Scheduling,Err_Def
FrameLowering,canUseAsEpilogue,RISCV,Selection,Err_Def
FrameLowering,canUseAsPrologue,RISCV,Selection,Err_Def
FrameLowering,determineCalleeSaves,RISCV,Selection,Err_Def
FrameLowering,emitEpilogue,RISCV,Selection,Err_Def
FrameLowering,emitPrologue,RISCV,Selection,Err_Def
FrameLowering,getFrameIndexReference,RISCV,Selection,Err_Def
FrameLowering,restoreCalleeSavedRegisters,RISCV,Selection,Err_Def
FrameLowering,spillCalleeSavedRegisters,RISCV,Selection,Err_Def
ISelDAGtoDAG,MatchSLLIUW,RISCV,Selection,Err_Def
ISelDAGtoDAG,MatchSRLIUW,RISCV,Selection,Err_Def
ISelDAGtoDAG,PostprocessISelDAG,RISCV,Selection,Err_Def
ISelDAGtoDAG,Select,RISCV,Selection,Err_Def
ISelDAGtoDAG,selectVLOp,RISCV,Selection,Err_Def
ISelDAGtoDAG,selectVSplat,RISCV,Selection,Err_Def
ISelDAGtoDAG,selectVSplatSimm5,RISCV,Selection,Err_Def
ISelDAGtoDAG,selectVSplatUimm5,RISCV,Selection,Err_Def
ISelLowering,analyzeInputArgs,RISCV,Selection,Err_Def
ISelLowering,analyzeOutputArgs,RISCV,Selection,Err_Def
ISelLowering,CanLowerReturn,RISCV,Selection,Err_Def
ISelLowering,computeKnownBitsForTargetNode,RISCV,Selection,Err_Def
ISelLowering,ComputeNumSignBitsForTargetNode,RISCV,Selection,Err_Def
ISelLowering,decomposeMulByConstant,RISCV,Selection,Err_Def
ISelLowering,EmitInstrWithCustomInserter,RISCV,Selection,Err_Def
ISelLowering,emitLeadingFence,RISCV,Selection,Err_Def
ISelLowering,emitMaskedAtomicCmpXchgIntrinsic,RISCV,Selection,Err_Def
ISelLowering,emitMaskedAtomicRMWIntrinsic,RISCV,Selection,Err_Def
ISelLowering,emitTrailingFence,RISCV,Selection,Err_Def
ISelLowering,getAddr,RISCV,Selection,Err_Def
ISelLowering,getRegForInlineAsmConstraint,RISCV,Selection,Err_Def
ISelLowering,getRegisterByName,RISCV,Selection,Err_Def
ISelLowering,getStaticTLSAddr,RISCV,Selection,Err_Def
ISelLowering,getTgtMemIntrinsic,RISCV,Selection,Err_Def
ISelLowering,isDesirableToCommuteWithShift,RISCV,Selection,Err_Def
ISelLowering,isEligibleForTailCallOptimization,RISCV,Selection,Err_Def
ISelLowering,isFPImmLegal,RISCV,Selection,Err_Def
ISelLowering,LowerCall,RISCV,Selection,Err_Def
ISelLowering,lowerEXTRACT_VECTOR_ELT,RISCV,Selection,Err_Def
ISelLowering,LowerFormalArguments,RISCV,Selection,Err_Def
ISelLowering,lowerINSERT_VECTOR_ELT,RISCV,Selection,Err_Def
ISelLowering,LowerINTRINSIC_W_CHAIN,RISCV,Selection,Err_Def
ISelLowering,LowerINTRINSIC_WO_CHAIN,RISCV,Selection,Err_Def
ISelLowering,LowerOperation,RISCV,Selection,Err_Def
ISelLowering,LowerReturn,RISCV,Selection,Err_Def
ISelLowering,lowerShiftLeftParts,RISCV,Selection,Err_Def
ISelLowering,lowerShiftRightParts,RISCV,Selection,Err_Def
ISelLowering,lowerSPLATVECTOR,RISCV,Selection,Err_Def
ISelLowering,lowerVectorMaskExt,RISCV,Selection,Err_Def
ISelLowering,lowerVectorMaskTrunc,RISCV,Selection,Err_Def
ISelLowering,PerformDAGCombine,RISCV,Selection,Err_Def
ISelLowering,ReplaceNodeResults,RISCV,Selection,Err_Def
ISelLowering,shouldExtendTypeInLibCall,RISCV,Selection,Err_Def
ISelLowering,TargetLowering,RISCV,Selection,Err_Def
ISelLowering,targetShrinkDemandedConstant,RISCV,Selection,Err_Def
ISelLowering,validateCCReservedRegs,RISCV,Selection,Err_Def
MCInstLower,lowerMachineInstrToMCInst,RISCV,Selection,Err_Def
RegisterInfo,eliminateCallFramePseudoInstr,XCore,Allocation,Err_Def
RegisterInfo,eliminateFrameIndex,XCore,Allocation,Err_Def
RegisterInfo,getCalleeSavedRegs,XCore,Allocation,Err_Def
AsmPrinter,AsmPrinter,XCore,Assembler,Err_Def
AsmPrinter,EmitBasicBlockStart,XCore,Assembler,Err_Def
AsmPrinter,EmitConstantPool,XCore,Assembler,Err_Def
AsmPrinter,EmitEndOfAsmFile,XCore,Assembler,Err_Def
AsmPrinter,EmitFunctionEntryLabel,XCore,Assembler,Err_Def
AsmPrinter,EmitGlobalVariable,XCore,Assembler,Err_Def
AsmPrinter,EmitInstruction,XCore,Assembler,Err_Def
AsmPrinter,EmitStartOfAsmFile,XCore,Assembler,Err_Def
AsmPrinter,printInlineJT,XCore,Assembler,Err_Def
AsmPrinter,printInlineJT32,XCore,Assembler,Err_Def
AsmPrinter,PrintSpecial,XCore,Assembler,Err_Def
AsmPrinter,runOnMachineFunction,XCore,Assembler,Err_Def
FrameToArgsOffsetElim,runOnMachineFunction,XCore,Optimization,Err_Def
LoopMetadataLowering,runOnFunction,XCore,Optimization,Err_Def
SimpleBranchOpt,runOnMachineFunction,XCore,Optimization,Err_Def
StackAnalysisPrepare,runOnFunction,XCore,Optimization,Err_Def
StackUsage,runOnMachineFunction,XCore,Optimization,Err_Def
InstrInfo,analyzeBranch,XCore,Scheduling,Err_Def
InstrInfo,copyPhysReg,XCore,Scheduling,Err_Def
InstrInfo,GetInstSizeInBytes,XCore,Scheduling,Err_Def
InstrInfo,insertBranch,XCore,Scheduling,Err_Def
MachineFunctionInfo,~FunctionInfo,XCore,Scheduling,Err_Def
MachineFunctionInfo,Call,XCore,Scheduling,Err_Def
MachineFunctionInfo,ExternalSymbolCall,XCore,Scheduling,Err_Def
MachineFunctionInfo,FunctionCall,XCore,Scheduling,Err_Def
MachineFunctionInfo,FunctionInfo,XCore,Scheduling,Err_Def
MachineFunctionInfo,FunctionInfo2,XCore,Scheduling,Err_Def
TargetObjectFile,getExplicitSectionGlobal,XCore,Scheduling,Err_Def
TargetObjectFile,getSectionForConstant,XCore,Scheduling,Err_Def
TargetObjectFile,Initialize,XCore,Scheduling,Err_Def
TargetObjectFile,SelectSectionForGlobal,XCore,Scheduling,Err_Def
FrameLowering,emitEpilogue,XCore,Selection,Err_Def
FrameLowering,emitPrologue,XCore,Selection,Err_Def
FrameLowering,processFunctionBeforeCalleeSavedScan,XCore,Selection,Err_Def
FrameLowering,restoreCalleeSavedRegisters,XCore,Selection,Err_Def
FrameLowering,spillCalleeSavedRegisters,XCore,Selection,Err_Def
ISelDAGToDAG,immBitp,XCore,Selection,Err_Def
ISelDAGToDAG,immMskBitp,XCore,Selection,Err_Def
ISelDAGToDAG,Select,XCore,Selection,Err_Def
ISelDAGToDAG,SelectInlineAsmMemoryOperand,XCore,Selection,Err_Def
ISelLowering,computeMaskedBitsForTargetNode,XCore,Selection,Err_Def
ISelLowering,ExpandADDSUB,XCore,Selection,Err_Def
ISelLowering,isLegalAddImmediate,XCore,Selection,Err_Def
ISelLowering,isLegalAddressingMode,XCore,Selection,Err_Def
ISelLowering,LowerBR_JT,XCore,Selection,Err_Def
ISelLowering,LowerCall,XCore,Selection,Err_Def
ISelLowering,LowerDYNAMIC_STACKALLOC,XCore,Selection,Err_Def
ISelLowering,LowerEH_RETURN,XCore,Selection,Err_Def
ISelLowering,LowerFormalArguments,XCore,Selection,Err_Def
ISelLowering,LowerFRAME_TO_ARGS_OFFSET,XCore,Selection,Err_Def
ISelLowering,LowerFRAMEADDR,XCore,Selection,Err_Def
ISelLowering,LowerGlobalAddress,XCore,Selection,Err_Def
ISelLowering,LowerGlobalTLSAddress,XCore,Selection,Err_Def
ISelLowering,LowerINIT_TRAMPOLINE,XCore,Selection,Err_Def
ISelLowering,LowerINTRINSIC_WO_CHAIN,XCore,Selection,Err_Def
ISelLowering,LowerLOAD,XCore,Selection,Err_Def
ISelLowering,LowerOperation,XCore,Selection,Err_Def
ISelLowering,LowerReturn,XCore,Selection,Err_Def
ISelLowering,LowerRETURNADDR,XCore,Selection,Err_Def
ISelLowering,LowerSMUL_LOHI,XCore,Selection,Err_Def
ISelLowering,LowerSTACKSAVE,XCore,Selection,Err_Def
ISelLowering,LowerSTORE,XCore,Selection,Err_Def
ISelLowering,LowerUMUL_LOHI,XCore,Selection,Err_Def
ISelLowering,PerformDAGCombine,XCore,Selection,Err_Def
ISelLowering,ReplaceNodeResults,XCore,Selection,Err_Def
ISelLowering,TargetLowering,XCore,Selection,Err_Def
SelectionDAGInfo,EmitTargetCodeForMemcpy,XCore,Selection,Err_Def