Module,File,Function,Time (Secs)
allocation,RegisterBankInfo,RegisterBankInfo,4
allocation,RegisterInfo,eliminateFrameIndex,583
allocation,RegisterInfo,getCalleeSavedRegs,51
allocation,RegisterInfo,getCallPreservedMask,38
allocation,RegisterInfo,getFrameRegister,6
allocation,RegisterInfo,getNoPreservedMask,8
allocation,RegisterInfo,getPointerRegClass,8
allocation,RegisterInfo,getReservedRegs,112
allocation,RegisterInfo,hasReservedSpillSlot,534
allocation,RegisterInfo,isAsmClobberable,13
allocation,RegisterInfo,isConstantPhysReg,13
allocation,RegisterInfo,RegisterInfo,18
allocation,RegisterInfo,requiresFrameIndexScavenging,3
allocation,RegisterInfo,requiresRegisterScavenging,5
Assembler,AsmParser,addCSRSystemRegisterOperands,53
Assembler,AsmParser,addExpr,60
Assembler,AsmParser,addFenceArgOperands,773
Assembler,AsmParser,addFRMArgOperands,10
Assembler,AsmParser,addImmOperands,23
Assembler,AsmParser,addRegOperands,29
Assembler,AsmParser,addVTypeIOperands,16
Assembler,AsmParser,AsmParser,202
Assembler,AsmParser,classifySymbolRef,548
Assembler,AsmParser,convertFPR64ToFPR16,40
Assembler,AsmParser,convertFPR64ToFPR32,25
Assembler,AsmParser,createImm,88
Assembler,AsmParser,createReg,50
Assembler,AsmParser,createSysReg,131
Assembler,AsmParser,createToken,58
Assembler,AsmParser,createVType,50
Assembler,AsmParser,defaultMaskRegOp,651
Assembler,AsmParser,emitToStreamer,68
Assembler,AsmParser,evaluateConstantImm,93
Assembler,AsmParser,generateImmOutOfRangeError,120
Assembler,AsmParser,getEndLoc,86
Assembler,AsmParser,getFeatureBits,186
Assembler,AsmParser,getImm,259
Assembler,AsmParser,getLoc,81
Assembler,AsmParser,getReg,38
Assembler,AsmParser,getRoundingMode,502
Assembler,AsmParser,getStartLoc,13
Assembler,AsmParser,getSysReg,33
Assembler,AsmParser,getTargetStreamer,51
Assembler,AsmParser,getToken,28
Assembler,AsmParser,getVType,9
Assembler,AsmParser,isBareSimmNLsb0,214
Assembler,AsmParser,isBareSymbol,366
Assembler,AsmParser,isCallSymbol,58
Assembler,AsmParser,isCLUIImm,115
Assembler,AsmParser,isCSRSystemRegister,64
Assembler,AsmParser,isFenceArg,1626
Assembler,AsmParser,isFRMArg,697
Assembler,AsmParser,isGPR,44
Assembler,AsmParser,isImm,20
Assembler,AsmParser,isImmXLenLI,338
Assembler,AsmParser,isMem,5
Assembler,AsmParser,isPseudoJumpSymbol,44
Assembler,AsmParser,isReg,20
Assembler,AsmParser,isRV32E,21
Assembler,AsmParser,isRV64,13
Assembler,AsmParser,isRV64-2,11
Assembler,AsmParser,isSImm10Lsb0000NonZero,44
Assembler,AsmParser,isSImm12,316
Assembler,AsmParser,isSImm12Lsb0,128
Assembler,AsmParser,isSImm13Lsb0,115
Assembler,AsmParser,isSImm21Lsb0JAL,62
Assembler,AsmParser,isSImm5,52
Assembler,AsmParser,isSImm5Plus1,46
Assembler,AsmParser,isSImm6,29
Assembler,AsmParser,isSImm6NonZero,44
Assembler,AsmParser,isSImm9Lsb0,43
Assembler,AsmParser,isSystemRegister,11
Assembler,AsmParser,isToken,17
Assembler,AsmParser,isTPRelAddSymbol,47
Assembler,AsmParser,isUImm10Lsb00NonZero,50
Assembler,AsmParser,isUImm20AUIPC,96
Assembler,AsmParser,isUImm20LUI,46
Assembler,AsmParser,isUImm5,52
Assembler,AsmParser,isUImm7Lsb00,27
Assembler,AsmParser,isUImm8Lsb00,19
Assembler,AsmParser,isUImm8Lsb000,19
Assembler,AsmParser,isUImm9Lsb000,25
Assembler,AsmParser,isUImmLog2XLen,445
Assembler,AsmParser,isUImmLog2XLenHalf,43
Assembler,AsmParser,isUImmLog2XLenNonZero,55
Assembler,AsmParser,isV0Reg,9
Assembler,AsmParser,isVType,10
Assembler,AsmParser,isVTypeI,7
Assembler,AsmParser,KindTy,23
Assembler,AsmParser,LLVMInitializeAsmParser,8
Assembler,AsmParser,MatchAndEmitInstruction,4413
Assembler,AsmParser,matchRegisterNameHelper,243
Assembler,AsmParser,Operand,12
Assembler,AsmParser,Operand2,34
Assembler,AsmParser,parseAtomicMemOp,764
Assembler,AsmParser,parseBareSymbol,432
Assembler,AsmParser,parseCallSymbol,1172
Assembler,AsmParser,parseCSRSyestemRegister,1285
Assembler,AsmParser,ParseDirective,3966
Assembler,AsmParser,parseImmediate,1014
Assembler,AsmParser,ParseInstruction,664
Assembler,AsmParser,parseJALOffset,315
Assembler,AsmParser,parseMaskReg,1241
Assembler,AsmParser,parseMemOpBaseReg,69
Assembler,AsmParser,parseOperand,106
Assembler,AsmParser,parseOperandWithModifier,111
Assembler,AsmParser,parsePseudoJumpSymbol,730
Assembler,AsmParser,ParseRegister,251
Assembler,AsmParser,parseRegister2,10
Assembler,AsmParser,parseVTypeI,425
Assembler,AsmParser,print,52
Assembler,AsmParser,setFeatureBits,32
Assembler,AsmParser,tryParseRegister,19
Assembler,AsmParser,validateTargetOperandClass,195
Assembler,AsmPrinter,AsmPrinter,21
Assembler,AsmPrinter,emitAttributes,107
Assembler,AsmPrinter,emitEndOfAsmFile,38
Assembler,AsmPrinter,emitInstruction,11
Assembler,AsmPrinter,emitStartOfAsmFile,13
Assembler,AsmPrinter,EmitToStreamer,19
Assembler,AsmPrinter,getPassName,4
Assembler,AsmPrinter,LLVMInitializeAsmPrinter,12
Assembler,AsmPrinter,lowerOperand,330
Assembler,AsmPrinter,PrintAsmMemoryOperand,44
Assembler,AsmPrinter,PrintAsmOperand,318
Assembler,AsmPrinter,runOnMachineFunction,41
Disassembler,Disassembler,addImplySP,69
Disassembler,Disassembler,createDisassembler,17
Disassembler,Disassembler,decodeCLUIImmOperand,69
Disassembler,Disassembler,DecodeFPR16RegisterClass,27
Disassembler,Disassembler,DecodeFPR32CRegisterClass,23
Disassembler,Disassembler,DecodeFPR32RegisterClass,28
Disassembler,Disassembler,DecodeFPR64CRegisterClass,15
Disassembler,Disassembler,DecodeFPR64RegisterClass,22
Disassembler,Disassembler,decodeFRMArg,21
Disassembler,Disassembler,DecodeGPRCRegisterClass,16
Disassembler,Disassembler,DecodeGPRNoX0RegisterClass,54
Disassembler,Disassembler,DecodeGPRNoX0X2RegisterClass,43
Disassembler,Disassembler,DecodeGPRRegisterClass,50
Disassembler,Disassembler,decodeRVCInstrRdRs1Rs2,51
Disassembler,Disassembler,decodeRVCInstrRdRs1UImm,565
Disassembler,Disassembler,decodeRVCInstrRdRs2,353
Disassembler,Disassembler,decodeRVCInstrRdSImm,251
Disassembler,Disassembler,decodeRVCInstrSImm,135
Disassembler,Disassembler,decodeSImmNonZeroOperand,78
Disassembler,Disassembler,decodeSImmOperand,42
Disassembler,Disassembler,decodeSImmOperandAndLsl1,28
Disassembler,Disassembler,decodeUImmNonZeroOperand,123
Disassembler,Disassembler,decodeUImmOperand,33
Disassembler,Disassembler,decodeVMaskReg,148
Disassembler,Disassembler,DecodeVRRegisterClass,27
Disassembler,Disassembler,Disassembler,12
Disassembler,Disassembler,getInstruction,1214
Disassembler,Disassembler,LLVMInitializeDisassembler,19
Emission,AsmBackend,~AsmBackend,42
Emission,AsmBackend,adjustFixupValue,1776
Emission,AsmBackend,applyFixup,573
Emission,AsmBackend,AsmBackend,236
Emission,AsmBackend,createAsmBackend,112
Emission,AsmBackend,createObjectTargetWriter,80
Emission,AsmBackend,evaluateTargetFixup,2968
Emission,AsmBackend,fixupNeedsRelaxation,52
Emission,AsmBackend,fixupNeedsRelaxationAdvanced,188
Emission,AsmBackend,getFixupKind,161
Emission,AsmBackend,getFixupKindInfo,1009
Emission,AsmBackend,getNumFixupKinds,88
Emission,AsmBackend,getRelaxedOpcode,346
Emission,AsmBackend,getTargetABI,54
Emission,AsmBackend,getTargetOptions,56
Emission,AsmBackend,mayNeedRelaxation,859
Emission,AsmBackend,relaxInstruction,1616
Emission,AsmBackend,requiresDiffExpressionRelocations,260
Emission,AsmBackend,setForceRelocs,12
Emission,AsmBackend,shouldForceRelocation,782
Emission,AsmBackend,shouldInsertExtraNopBytesForCodeAlign,821
Emission,AsmBackend,shouldInsertFixupForCodeAlign,812
Emission,AsmBackend,willForceRelocations,13
Emission,AsmBackend,writeNopData,1613
Emission,AsmInfo,anchor,135
Emission,AsmInfo,getExprForFDESymbol,1258
Emission,AsmInfo,MCAsmInfo,217
Emission,BaseInfo,ABI,12
Emission,BaseInfo,computeTargetABI,218
Emission,BaseInfo,FenceField,11
Emission,BaseInfo,getTargetABI,16
Emission,BaseInfo,II,67
Emission,BaseInfo,OperandType,35
Emission,BaseInfo,RISCVVSEW,10
Emission,BaseInfo,RoundingMode,14
Emission,BaseInfo,roundingModeToString,27
Emission,BaseInfo,RVVConstraintType,17
Emission,BaseInfo,stringToRoundingMode,30
Emission,BaseInfo,validate,13
Emission,BaseInfo,VLMUL,10
Emission,BaseInfo,VMTs,51
Emission,ELFObjectWriter,~ELFObjectWriter,2
Emission,ELFObjectWriter,createELFObjectWriter,2
Emission,ELFObjectWriter,ELFObjectWriter,4
Emission,ELFObjectWriter,getRelocType,944
Emission,ELFObjectWriter,needsRelocateWithSymbol,3
Emission,ELFStreamer,AttributeItem,56
Emission,ELFStreamer,AttributeType,8
Emission,ELFStreamer,calculateContentSize,94
Emission,ELFStreamer,emitAttribute,50
Emission,ELFStreamer,emitDirectiveOptionNoPIC,8
Emission,ELFStreamer,emitDirectiveOptionNoRelax,11
Emission,ELFStreamer,emitDirectiveOptionNoRVC,4
Emission,ELFStreamer,emitDirectiveOptionPIC,3
Emission,ELFStreamer,emitDirectiveOptionPop,3
Emission,ELFStreamer,emitDirectiveOptionPush,2
Emission,ELFStreamer,emitDirectiveOptionRelax,3
Emission,ELFStreamer,emitDirectiveOptionRVC,2
Emission,ELFStreamer,emitIntTextAttribute,9
Emission,ELFStreamer,emitTextAttribute,6
Emission,ELFStreamer,finishAttributeSection,534
Emission,ELFStreamer,getAttributeItem,16
Emission,ELFStreamer,getStreamer,6
Emission,ELFStreamer,setAttributeItem1,17
Emission,ELFStreamer,setAttributeItem2,19
Emission,ELFStreamer,setAttributeItems,30
Emission,ELFStreamer,TargetELFStreamer,342
Emission,FixupKind,enumFixups,74
Emission,InstPrinter,applyTargetSpecificCLOption,38
Emission,InstPrinter,getRegisterName,25
Emission,InstPrinter,InstPrinter,27
Emission,InstPrinter,printAtomicMemOp,59
Emission,InstPrinter,printBranchOperand,62
Emission,InstPrinter,printCSRSystemRegister,37
Emission,InstPrinter,printFenceArg,89
Emission,InstPrinter,printFRMArg,76
Emission,InstPrinter,printInst,30
Emission,InstPrinter,printOperand,57
Emission,InstPrinter,printRegName,26
Emission,InstPrinter,printVMaskReg,193
Emission,InstPrinter,printVTypeI,14
Emission,MatInt,generateInstSeq,415
Emission,MatInt,getIntMatCost,275
Emission,MatInt,structInst,27
Emission,MCCodeEmitter,~MCCodeEmitter,4
Emission,MCCodeEmitter,createMCCodeEmitter,36
Emission,MCCodeEmitter,encodeInstruction,862
Emission,MCCodeEmitter,getImmOpValue,1772
Emission,MCCodeEmitter,getImmOpValueAsr1,266
Emission,MCCodeEmitter,getMachineOpValue,36
Emission,MCCodeEmitter,getVMaskReg,61
Emission,MCCodeEmitter,MCCodeEmitter,8
Emission,MCExpr,classof1,11
Emission,MCExpr,classof2,8
Emission,MCExpr,create,6
Emission,MCExpr,enumVariantKind,24
Emission,MCExpr,evaluateAsConstant,162
Emission,MCExpr,evaluateAsInt64,118
Emission,MCExpr,evaluateAsRelocatableImpl,53
Emission,MCExpr,findAssociatedFragment,4
Emission,MCExpr,fixELFSymbolsInTLSFixups,28
Emission,MCExpr,fixELFSymbolsInTLSFixupsImpl,74
Emission,MCExpr,getKind,8
Emission,MCExpr,getPCRelHiFixup,458
Emission,MCExpr,getSubExpr,4
Emission,MCExpr,getVariantKindForName,78
Emission,MCExpr,getVariantKindName,47
Emission,MCExpr,MCExpr,20
Emission,MCExpr,printImpl,470
Emission,MCExpr,visitUsedExpr,6
Emission,MCTargetDesc,createAsmTargetStreamer,16
Emission,MCTargetDesc,createInstrAnalysis,6
Emission,MCTargetDesc,createMCAsmInfo,24
Emission,MCTargetDesc,createMCInstPrinter,11
Emission,MCTargetDesc,createMCInstrInfo,10
Emission,MCTargetDesc,createMCRegisterInfo,9
Emission,MCTargetDesc,createMCSubtargetInfo,15
Emission,MCTargetDesc,createNullTargetStreamer,13
Emission,MCTargetDesc,createObjectTargetStreamer,38
Emission,MCTargetDesc,evaluateBranch,763
Emission,MCTargetDesc,InstrAnalysis,43
Emission,MCTargetDesc,LLVMInitializeTargetMC,84
Emission,TargetStreamer,emitAttribute,5
Emission,TargetStreamer,emitAttribute2,9
Emission,TargetStreamer,emitDirectiveOptionNoPIC,2
Emission,TargetStreamer,emitDirectiveOptionNoPIC2,5
Emission,TargetStreamer,emitDirectiveOptionNoRelax,4
Emission,TargetStreamer,emitDirectiveOptionNoRelax2,5
Emission,TargetStreamer,emitDirectiveOptionNoRVC,5
Emission,TargetStreamer,emitDirectiveOptionNoRVC2,3
Emission,TargetStreamer,emitDirectiveOptionPIC,4
Emission,TargetStreamer,emitDirectiveOptionPIC2,4
Emission,TargetStreamer,emitDirectiveOptionPop,5
Emission,TargetStreamer,emitDirectiveOptionPop2,4
Emission,TargetStreamer,emitDirectiveOptionPush,4
Emission,TargetStreamer,emitDirectiveOptionPush2,4
Emission,TargetStreamer,emitDirectiveOptionRelax,5
Emission,TargetStreamer,emitDirectiveOptionRelax2,4
Emission,TargetStreamer,emitDirectiveOptionRVC,5
Emission,TargetStreamer,emitDirectiveOptionRVC2,4
Emission,TargetStreamer,emitIntTextAttribute,4
Emission,TargetStreamer,emitIntTextAttribute2,5
Emission,TargetStreamer,emitTargetAttributes,739
Emission,TargetStreamer,emitTextAttribute,3
Emission,TargetStreamer,emitTextAttribute2,6
Emission,TargetStreamer,finish,7
Emission,TargetStreamer,finishAttributeSection,4
Emission,TargetStreamer,finishAttributeSection2,6
Emission,TargetStreamer,TargetAsmStreamer,6
Emission,TargetStreamer,TargetStreamer,9
Optimization,CleanupVSETVLI,CleanupVSETVLI,12
Optimization,CleanupVSETVLI,createPass,7
Optimization,CleanupVSETVLI,getAnalysisUsage,10
Optimization,CleanupVSETVLI,getPassName,16
Optimization,CleanupVSETVLI,getRequiredProperties,15
Optimization,CleanupVSETVLI,runOnMachineBasicBlock,8186
Optimization,CleanupVSETVLI,runOnMachineFunction,727
Optimization,ExpandAtomicPseudoInsts,createPass,8
Optimization,ExpandAtomicPseudoInsts,ExpandAtomicPseudo,12
Optimization,ExpandAtomicPseudoInsts,expandMBB,879
Optimization,ExpandAtomicPseudoInsts,expandMI,7297
Optimization,ExpandAtomicPseudoInsts,getPassName,10
Optimization,ExpandAtomicPseudoInsts,runOnMachineFunction,96
Optimization,ExpandPseudoInsts,createPass,8
Optimization,ExpandPseudoInsts,expandMBB,1571
Optimization,ExpandPseudoInsts,expandMI,10891
Optimization,ExpandPseudoInsts,ExpandPseudo,12
Optimization,ExpandPseudoInsts,getPassName,10
Optimization,ExpandPseudoInsts,runOnMachineFunction,115
Optimization,MergeBaseOffset,createPass,15
Optimization,MergeBaseOffset,getPassName,12
Optimization,MergeBaseOffset,getRequiredProperties,10
Optimization,MergeBaseOffset,MergeBaseOffsetOpt,7
Optimization,MergeBaseOffset,runOnMachineFunction,9213
Scheduling,InstrInfo,analyzeBranch,145
Scheduling,InstrInfo,areMemAccessesTriviallyDisjoint,66
Scheduling,InstrInfo,buildOutlinedFrame,489
Scheduling,InstrInfo,copyPhysReg,539
Scheduling,InstrInfo,decomposeMachineOperandsTargetFlags,10
Scheduling,InstrInfo,getBranchDestBlock,24
Scheduling,InstrInfo,getInstSizeInBytes,532
Scheduling,InstrInfo,getMemOperandWithOffsetWidth,39
Scheduling,InstrInfo,getOutliningCandidateInfo,665
Scheduling,InstrInfo,getOutliningType,701
Scheduling,InstrInfo,getSerializableDirectMachineOperandTargetFlags,34
Scheduling,InstrInfo,insertBranch,82
Scheduling,InstrInfo,insertIndirectBranch,679
Scheduling,InstrInfo,insertOutlinedCall,256
Scheduling,InstrInfo,InstrInfo,13
Scheduling,InstrInfo,isAsCheapAsAMove,518
Scheduling,InstrInfo,isBranchOffsetInRange,47
Scheduling,InstrInfo,isCopyInstrImpl,648
Scheduling,InstrInfo,isFunctionSafeToOutlineFrom,23
Scheduling,InstrInfo,isLoadFromStackSlot,94
Scheduling,InstrInfo,isMBBSafeToOutlineFrom,7
Scheduling,InstrInfo,isStoreToStackSlot,81
Scheduling,InstrInfo,loadRegFromStackSlot,121
Scheduling,InstrInfo,movImm,819
Scheduling,InstrInfo,parseCondBranch,25
Scheduling,InstrInfo,removeBranch,40
Scheduling,InstrInfo,reverseBranchCondition,229
Scheduling,InstrInfo,storeRegToStackSlot,87
Scheduling,InstrInfo,verifyInstruction,629
Scheduling,MachineFunctionInfo,getLibCallStackSize,5
Scheduling,MachineFunctionInfo,getMoveF64FrameIndex,198
Scheduling,MachineFunctionInfo,getVarArgsFrameIndex,11
Scheduling,MachineFunctionInfo,getVarArgsSaveSize,10
Scheduling,MachineFunctionInfo,MachineFunctionInfo,7
Scheduling,MachineFunctionInfo,setLibCallStackSize,4
Scheduling,MachineFunctionInfo,setVarArgsFrameIndex,6
Scheduling,MachineFunctionInfo,setVarArgsSaveSize,5
Scheduling,MachineFunctionInfo,useSaveRestoreLibCalls,75
Scheduling,Subtarget,anchor,6
Scheduling,Subtarget,enableLinkerRelax,7
Scheduling,Subtarget,enableMachineScheduler,6
Scheduling,Subtarget,enableRVCHintInstrs,7
Scheduling,Subtarget,enableSaveRestore,13
Scheduling,Subtarget,getCallLowering,4
Scheduling,Subtarget,getFrameLowering,10
Scheduling,Subtarget,getInstrInfo,4
Scheduling,Subtarget,getInstructionSelector,5
Scheduling,Subtarget,getLegalizerInfo,5
Scheduling,Subtarget,getRegBankInfo,4
Scheduling,Subtarget,getRegisterInfo,6
Scheduling,Subtarget,getSelectionDAGInfo,5
Scheduling,Subtarget,getTargetABI,8
Scheduling,Subtarget,getTargetLowering,9
Scheduling,Subtarget,getXLen,9
Scheduling,Subtarget,getXLenVT,5
Scheduling,Subtarget,hasStdExtA,3
Scheduling,Subtarget,hasStdExtB,2
Scheduling,Subtarget,hasStdExtC,4
Scheduling,Subtarget,hasStdExtD,3
Scheduling,Subtarget,hasStdExtF,3
Scheduling,Subtarget,hasStdExtM,4
Scheduling,Subtarget,hasStdExtV,3
Scheduling,Subtarget,hasStdExtZba,2
Scheduling,Subtarget,hasStdExtZbb,4
Scheduling,Subtarget,hasStdExtZbc,3
Scheduling,Subtarget,hasStdExtZbe,3
Scheduling,Subtarget,hasStdExtZbf,4
Scheduling,Subtarget,hasStdExtZbm,5
Scheduling,Subtarget,hasStdExtZbp,3
Scheduling,Subtarget,hasStdExtZbproposedc,3
Scheduling,Subtarget,hasStdExtZbr,4
Scheduling,Subtarget,hasStdExtZbs,3
Scheduling,Subtarget,hasStdExtZbt,3
Scheduling,Subtarget,hasStdExtZfh,4
Scheduling,Subtarget,hasStdExtZvamo,4
Scheduling,Subtarget,hasStdExtZvlsseg,3
Scheduling,Subtarget,initializeSubtargetDependencies,322
Scheduling,Subtarget,is64Bit,4
Scheduling,Subtarget,isRegisterReservedByUser,18
Scheduling,Subtarget,isRV32E,5
Scheduling,Subtarget,Subtarget,81
Scheduling,TargetInfo,getThe32Target,17
Scheduling,TargetInfo,getThe64Target,16
Scheduling,TargetInfo,LLVMInitializeTargetInfo,15
Scheduling,TargetMachine,addGlobalInstructionSelect,6
Scheduling,TargetMachine,addInstSelector,5
Scheduling,TargetMachine,addIRPasses,7
Scheduling,TargetMachine,addIRTranslator,5
Scheduling,TargetMachine,addLegalizeMachineIR,7
Scheduling,TargetMachine,addPreEmitPass,8
Scheduling,TargetMachine,addPreEmitPass2,11
Scheduling,TargetMachine,addPreRegAlloc,8
Scheduling,TargetMachine,addPreSched2,5
Scheduling,TargetMachine,addRegBankSelect,4
Scheduling,TargetMachine,computeDataLayout,20
Scheduling,TargetMachine,createPassConfig,6
Scheduling,TargetMachine,getEffectiveRelocModel,5
Scheduling,TargetMachine,getObjFileLowering,7
Scheduling,TargetMachine,getSubtargetImpl,56
Scheduling,TargetMachine,getTargetMachine,17
Scheduling,TargetMachine,getTargetTransformInfo,7
Scheduling,TargetMachine,isNoopAddrSpaceCast,8
Scheduling,TargetMachine,LLVMInitializeTarget,16
Scheduling,TargetMachine,PassConfig,15
Scheduling,TargetMachine,TargetMachine,34
Scheduling,TargetObjectFIle,getModuleMetadata,359
Scheduling,TargetObjectFIle,getSectionForConstant,21
Scheduling,TargetObjectFIle,Initialize,28
Scheduling,TargetObjectFIle,isConstantInSmallSection,16
Scheduling,TargetObjectFIle,isGlobalInSmallSection,597
Scheduling,TargetObjectFIle,isInSmallSection,8
Scheduling,TargetObjectFIle,SelectSectionForGlobal,27
Scheduling,TargetTransformInfo,getIntImmCost,282
Scheduling,TargetTransformInfo,getIntImmCostInst,669
Scheduling,TargetTransformInfo,getIntImmCostIntrin,9
Scheduling,TargetTransformInfo,getST,6
Scheduling,TargetTransformInfo,getTLI,5
Scheduling,TargetTransformInfo,TTIImpl,21
Selection,CallLowering,CallLowering,5
Selection,CallLowering,lowerCall,4
Selection,CallLowering,lowerFormalArguments,9
Selection,CallLowering,lowerReturn,39
Selection,FrameLowering,adjustReg,199
Selection,FrameLowering,canUseAsEpilogue,357
Selection,FrameLowering,canUseAsPrologue,329
Selection,FrameLowering,determineCalleeSaves,1004
Selection,FrameLowering,eliminateCallFramePseudoInstr,38
Selection,FrameLowering,emitEpilogue,1178
Selection,FrameLowering,emitPrologue,2777
Selection,FrameLowering,FrameLowering,23
Selection,FrameLowering,getFrameIndexReference,1142
Selection,FrameLowering,hasBP,18
Selection,FrameLowering,hasFP,48
Selection,FrameLowering,hasReservedCallFrame,20
Selection,FrameLowering,processFunctionBeforeFrameFinalized,63
Selection,FrameLowering,restoreCalleeSavedRegisters,436
Selection,FrameLowering,spillCalleeSavedRegisters,425
Selection,InstructionSelector,createInstructionSelector,51
Selection,InstructionSelector,getName,11
Selection,InstructionSelector,InstructionSelector,9
Selection,InstructionSelector,select,15
Selection,ISelDAGToDAG,createISelDag,47
Selection,ISelDAGToDAG,DAGToDAGISel,6
Selection,ISelDAGToDAG,getPassName,5
Selection,ISelDAGToDAG,MatchSLLIUW,163
Selection,ISelDAGToDAG,MatchSRLIUW,497
Selection,ISelDAGToDAG,PostprocessISelDAG,14
Selection,ISelDAGToDAG,runOnMachineFunction,12
Selection,ISelDAGToDAG,Select,6381
Selection,ISelDAGToDAG,SelectAddrFI,16
Selection,ISelDAGToDAG,SelectInlineAsmMemoryOperand,34
Selection,ISelDAGToDAG,selectVLOp,105
Selection,ISelDAGToDAG,selectVSplat,179
Selection,ISelDAGToDAG,selectVSplatSimm5,210
Selection,ISelDAGToDAG,selectVSplatUimm5,70
Selection,ISelLowering,analyzeInputArgs,423
Selection,ISelLowering,analyzeOutputArgs,245
Selection,ISelLowering,CanLowerReturn,265
Selection,ISelLowering,computeKnownBitsForTargetNode,516
Selection,ISelLowering,ComputeNumSignBitsForTargetNode,307
Selection,ISelLowering,convertSelectOfConstantsToMath,3
Selection,ISelLowering,convertSetCCLogicToBitwiseLogic,5
Selection,ISelLowering,decomposeMulByConstant,342
Selection,ISelLowering,EmitInstrWithCustomInserter,310
Selection,ISelLowering,emitLeadingFence,267
Selection,ISelLowering,emitMaskedAtomicCmpXchgIntrinsic,431
Selection,ISelLowering,emitMaskedAtomicRMWIntrinsic,315
Selection,ISelLowering,emitTrailingFence,114
Selection,ISelLowering,getAddr,365
Selection,ISelLowering,getConstraintType,26
Selection,ISelLowering,getDynamicTLSAddr,39
Selection,ISelLowering,getExceptionPointerRegister,7
Selection,ISelLowering,getExceptionSelectorRegister,6
Selection,ISelLowering,getExtendForAtomicCmpSwapArg,6
Selection,ISelLowering,getExtendForAtomicOps,5
Selection,ISelLowering,getInlineAsmMemConstraint,12
Selection,ISelLowering,getRegForInlineAsmConstraint,602
Selection,ISelLowering,getRegisterByName,372
Selection,ISelLowering,getSetCCResultType,14
Selection,ISelLowering,getStaticTLSAddr,354
Selection,ISelLowering,getSubtarget,6
Selection,ISelLowering,getTargetNodeName,461
Selection,ISelLowering,getTgtMemIntrinsic,388
Selection,ISelLowering,hasBitPreservingFPLogic,10
Selection,ISelLowering,isCheapToSpeculateCtlz,4
Selection,ISelLowering,isCheapToSpeculateCttz,6
Selection,ISelLowering,isDesirableToCommuteWithShift,558
Selection,ISelLowering,isEligibleForTailCallOptimization,692
Selection,ISelLowering,isFMAFasterThanFMulAndFAdd,302
Selection,ISelLowering,isFPImmLegal,24
Selection,ISelLowering,isLegalAddImmediate,7
Selection,ISelLowering,isLegalAddressingMode,27
Selection,ISelLowering,isLegalICmpImmediate,8
Selection,ISelLowering,isSExtCheaperThanZExt,14
Selection,ISelLowering,isTruncateFree,34
Selection,ISelLowering,isTruncateFree2,40
Selection,ISelLowering,isZExtFree,479
Selection,ISelLowering,LowerAsmOperandForConstraint,422
Selection,ISelLowering,LowerBlockAddress,23
Selection,ISelLowering,LowerCall,5547
Selection,ISelLowering,LowerConstantPool,19
Selection,ISelLowering,lowerEXTRACT_VECTOR_ELT,351
Selection,ISelLowering,LowerFormalArguments,2978
Selection,ISelLowering,LowerFRAMEADDR,69
Selection,ISelLowering,LowerGlobalAddress,55
Selection,ISelLowering,LowerGlobalTLSAddress,52
Selection,ISelLowering,lowerINSERT_VECTOR_ELT,481
Selection,ISelLowering,LowerINTRINSIC_W_CHAIN,1953
Selection,ISelLowering,LowerINTRINSIC_WO_CHAIN,414
Selection,ISelLowering,LowerJumpTable,46
Selection,ISelLowering,LowerOperation,1384
Selection,ISelLowering,LowerReturn,2083
Selection,ISelLowering,LowerRETURNADDR,206
Selection,ISelLowering,lowerSELECT,243
Selection,ISelLowering,lowerShiftLeftParts,478
Selection,ISelLowering,lowerShiftRightParts,743
Selection,ISelLowering,lowerSPLATVECTOR,828
Selection,ISelLowering,LowerVASTART,93
Selection,ISelLowering,lowerVectorMaskExt,678
Selection,ISelLowering,lowerVectorMaskTrunc,567
Selection,ISelLowering,mayBeEmittedAsTailCall,127
Selection,ISelLowering,NodeType,109
Selection,ISelLowering,normaliseSetCC,41
Selection,ISelLowering,PerformDAGCombine,3528
Selection,ISelLowering,ReplaceNodeResults,5797
Selection,ISelLowering,shouldConsiderGEPOffsetSplit,6
Selection,ISelLowering,shouldConvertConstantLoadToIntImm,4
Selection,ISelLowering,shouldExpandAtomicCmpXchgInIR,69
Selection,ISelLowering,shouldExpandAtomicRMWInIR,47
Selection,ISelLowering,shouldExpandShift,15
Selection,ISelLowering,shouldExtendTypeInLibCall,85
Selection,ISelLowering,shouldInsertFencesForAtomic,6
Selection,ISelLowering,shouldSignExtendTypeInLibCall,11
Selection,ISelLowering,TargetLowering,5993
Selection,ISelLowering,targetShrinkDemandedConstant,1157
Selection,ISelLowering,validateCCReservedRegs,182
Selection,LegalizeInfo,LegalizerInfo,16
Selection,MCInstLower,lowerMachineInstrToMCInst,774
Selection,MCInstLower,lowerMachineOperandToMCOperand,129
Selection,MCInstLower,lowerSymbolOperand,729