Commit History
18 days ago
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v1.2: packed-bias one-DMA for SwiGLU (swiglu_stream/_ln)
Silu bias b1 and up bias bg host-packed to [128, I/128] and loaded in one DMA each on the Scalar HW-DGE queue (same technique as v1.1 K4). Bitwise-identical to v1.1 at LNC=1 and LNC=2; swiglu_stream -2.5% device cycles, swiglu_stream_ln within noise. GELU path unchanged.7f9eb4c
21 days ago
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v1: NKI kernels for RoPE ViT encoders (DINOv3, V-JEPA2) on Trainium2
c855122