liangsu9988 commited on
Commit
c69d125
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1 Parent(s): a6c1802

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build/torch211-cxx11-cu128-x86_64-linux/__init__.py CHANGED
@@ -37,6 +37,34 @@ def _fp8_linear_residual_bf16_fake(
37
  return None
38
 
39
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
40
  @torch.library.register_fake(add_op_namespace_prefix("fp8_blockwise_linear_bf16"))
41
  def _fp8_blockwise_linear_bf16_fake(
42
  input: torch.Tensor,
@@ -95,9 +123,35 @@ def select_fp8_linear_tile(m: int, n: int, k: int, variant: int = 0) -> str:
95
  variant = int(variant)
96
  if m <= 0 or n <= 0 or k <= 0:
97
  raise RuntimeError("m, n, and k must be positive")
98
- if k % 32 != 0:
99
- raise RuntimeError("k must be divisible by 32")
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
100
  if m == 1:
 
 
101
  if variant == 4:
102
  return "gemv_fp8_m1_w4"
103
  if variant == 8:
@@ -113,6 +167,8 @@ def select_fp8_linear_tile(m: int, n: int, k: int, variant: int = 0) -> str:
113
  return "gemv_fp8_m1_w16"
114
  if variant != 0:
115
  raise RuntimeError("small-M dispatcher currently supports variant=0 only")
 
 
116
  if m <= 16:
117
  if k % 256 == 0:
118
  return "ld_fp8_gemm_16x128x256_w4" if n % 128 == 0 else "ld_fp8_gemm_16x64x256_w4"
@@ -151,7 +207,9 @@ def fp8_linear_bf16(
151
 
152
  ``input`` and ``weight`` must be FP8 E4M3 CUDA tensors with shapes
153
  ``(M, K)`` and ``(N, K)``. ``alpha`` is a host float, normally the product
154
- of static per-tensor input and weight scales.
 
 
155
  """
156
 
157
  if out is None:
@@ -177,6 +235,56 @@ def fp8_linear_residual_bf16(
177
  return residual
178
 
179
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
180
  def fp8_blockwise_linear_bf16(
181
  input: torch.Tensor,
182
  weight: torch.Tensor,
@@ -184,7 +292,7 @@ def fp8_blockwise_linear_bf16(
184
  weight_scale: torch.Tensor,
185
  out: torch.Tensor | None = None,
186
  ) -> torch.Tensor:
187
- """Block-128 scaled FP8 linear with BF16 output on SM120."""
188
 
189
  if out is None:
190
  out = torch.empty(
@@ -228,6 +336,9 @@ def fp8_blockwise_swiglu_quantize_fp8(
228
  __all__ = [
229
  "fp8_linear_bf16",
230
  "fp8_linear_residual_bf16",
 
 
 
231
  "fp8_blockwise_linear_bf16",
232
  "fp8_blockwise_swiglu_quantize_fp8",
233
  "select_fp8_linear_tile",
 
37
  return None
38
 
39
 
40
+ def _check_bias_linear_shapes(input, weight, bias, out) -> None:
41
+ if input.dim() != 2 or weight.dim() != 2:
42
+ raise RuntimeError("input and weight must be rank-2 tensors")
43
+ if input.shape[1] != weight.shape[1]:
44
+ raise RuntimeError("input and weight K dimensions must match")
45
+ if bias.shape != (weight.shape[0],):
46
+ raise RuntimeError("bias must have shape (weight.shape[0],)")
47
+ if out.shape != (input.shape[0], weight.shape[0]):
48
+ raise RuntimeError("out must have shape (input.shape[0], weight.shape[0])")
49
+
50
+
51
+ @torch.library.register_fake(add_op_namespace_prefix("fp8_linear_bias_bf16"))
52
+ def _fp8_linear_bias_bf16_fake(input, weight, bias, alpha: float, out) -> None:
53
+ _check_bias_linear_shapes(input, weight, bias, out)
54
+
55
+
56
+ @torch.library.register_fake(add_op_namespace_prefix("fp8_linear_bias_residual_bf16"))
57
+ def _fp8_linear_bias_residual_bf16_fake(
58
+ input, weight, bias, alpha: float, residual
59
+ ) -> None:
60
+ _check_bias_linear_shapes(input, weight, bias, residual)
61
+
62
+
63
+ @torch.library.register_fake(add_op_namespace_prefix("fp8_linear_bias_gelu_bf16"))
64
+ def _fp8_linear_bias_gelu_bf16_fake(input, weight, bias, alpha: float, out) -> None:
65
+ _check_bias_linear_shapes(input, weight, bias, out)
66
+
67
+
68
  @torch.library.register_fake(add_op_namespace_prefix("fp8_blockwise_linear_bf16"))
69
  def _fp8_blockwise_linear_bf16_fake(
70
  input: torch.Tensor,
 
123
  variant = int(variant)
124
  if m <= 0 or n <= 0 or k <= 0:
125
  raise RuntimeError("m, n, and k must be positive")
126
+ if k % 16 != 0:
127
+ raise RuntimeError("k must be divisible by 16")
128
+ capability = torch.cuda.get_device_capability() if torch.cuda.is_available() else None
129
+ if capability == (11, 0):
130
+ forced = {1: "sm110_sq_bf16", 2: "sm110_t1_bf16", 3: "sm110_wide_bf16"}
131
+ if variant not in {0, *forced}:
132
+ raise RuntimeError("SM110 variant must be 0 (auto), 1 (Sq), 2 (T1), or 3 (Wide)")
133
+ if n % 16 or k % 16:
134
+ raise RuntimeError("SM110 requires n and k divisible by 16")
135
+ if variant:
136
+ return forced[variant]
137
+ if m >= 512 and k == 2048 and 2048 <= n <= 2560:
138
+ return "sm110_sq_bf16"
139
+ if m >= 512 and n >= 16 * k:
140
+ return "sm110_t1_bf16"
141
+ if m >= 512 and k >= 4 * n:
142
+ return "sm110_wide_bf16"
143
+ if n >= 8 * k:
144
+ return "sm110_wide_bf16"
145
+ if m >= 128 and k >= 4 * n:
146
+ return "sm110_sq_bf16"
147
+ if n == k and m >= 512:
148
+ return "sm110_sq_bf16" if k <= 1024 else "sm110_wide_bf16"
149
+ if n == k and m >= 128:
150
+ return "sm110_wide_bf16"
151
+ return "sm110_t1_bf16"
152
  if m == 1:
153
+ if k % 32:
154
+ raise RuntimeError("SM120 requires k divisible by 32")
155
  if variant == 4:
156
  return "gemv_fp8_m1_w4"
157
  if variant == 8:
 
167
  return "gemv_fp8_m1_w16"
168
  if variant != 0:
169
  raise RuntimeError("small-M dispatcher currently supports variant=0 only")
170
+ if k % 32:
171
+ raise RuntimeError("SM120 requires k divisible by 32")
172
  if m <= 16:
173
  if k % 256 == 0:
174
  return "ld_fp8_gemm_16x128x256_w4" if n % 128 == 0 else "ld_fp8_gemm_16x64x256_w4"
 
207
 
208
  ``input`` and ``weight`` must be FP8 E4M3 CUDA tensors with shapes
209
  ``(M, K)`` and ``(N, K)``. ``alpha`` is a host float, normally the product
210
+ of static per-tensor input and weight scales. SM110 uses the production
211
+ CUTLASS Sq/T1/Wide dispatcher over full model row counts; SM120 uses the
212
+ hand-tuned M<=64 path.
213
  """
214
 
215
  if out is None:
 
235
  return residual
236
 
237
 
238
+ def fp8_linear_bias_bf16(
239
+ input: torch.Tensor,
240
+ weight: torch.Tensor,
241
+ bias: torch.Tensor,
242
+ alpha: float = 1.0,
243
+ out: torch.Tensor | None = None,
244
+ ) -> torch.Tensor:
245
+ """SM110 FP8 linear with fused BF16 bias and BF16 output."""
246
+ if out is None:
247
+ out = torch.empty(
248
+ (input.shape[0], weight.shape[0]),
249
+ device=input.device,
250
+ dtype=torch.bfloat16,
251
+ )
252
+ ops.fp8_linear_bias_bf16(input, weight, bias, float(alpha), out)
253
+ return out
254
+
255
+
256
+ def fp8_linear_bias_residual_bf16(
257
+ input: torch.Tensor,
258
+ weight: torch.Tensor,
259
+ bias: torch.Tensor,
260
+ residual: torch.Tensor,
261
+ alpha: float = 1.0,
262
+ ) -> torch.Tensor:
263
+ """SM110 fused ``residual += alpha * input @ weight.T + bias``."""
264
+ ops.fp8_linear_bias_residual_bf16(
265
+ input, weight, bias, float(alpha), residual
266
+ )
267
+ return residual
268
+
269
+
270
+ def fp8_linear_bias_gelu_bf16(
271
+ input: torch.Tensor,
272
+ weight: torch.Tensor,
273
+ bias: torch.Tensor,
274
+ alpha: float = 1.0,
275
+ out: torch.Tensor | None = None,
276
+ ) -> torch.Tensor:
277
+ """SM110 FP8 linear with fused BF16 bias and GELU epilogue."""
278
+ if out is None:
279
+ out = torch.empty(
280
+ (input.shape[0], weight.shape[0]),
281
+ device=input.device,
282
+ dtype=torch.bfloat16,
283
+ )
284
+ ops.fp8_linear_bias_gelu_bf16(input, weight, bias, float(alpha), out)
285
+ return out
286
+
287
+
288
  def fp8_blockwise_linear_bf16(
289
  input: torch.Tensor,
290
  weight: torch.Tensor,
 
292
  weight_scale: torch.Tensor,
293
  out: torch.Tensor | None = None,
294
  ) -> torch.Tensor:
295
+ """Block-128 scaled FP8 linear with BF16 output on SM89/SM120."""
296
 
297
  if out is None:
298
  out = torch.empty(
 
336
  __all__ = [
337
  "fp8_linear_bf16",
338
  "fp8_linear_residual_bf16",
339
+ "fp8_linear_bias_bf16",
340
+ "fp8_linear_bias_residual_bf16",
341
+ "fp8_linear_bias_gelu_bf16",
342
  "fp8_blockwise_linear_bf16",
343
  "fp8_blockwise_swiglu_quantize_fp8",
344
  "select_fp8_linear_tile",
build/torch211-cxx11-cu128-x86_64-linux/{_fp8_gemm_cuda_bcb0782.abi3.so → _fp8_gemm_cuda_a6f59d3.abi3.so} RENAMED
@@ -1,3 +1,3 @@
1
  version https://git-lfs.github.com/spec/v1
2
- oid sha256:182510f121f814d7c367c58c641dc57f8992cc1b62fa25409ed9128e292fcec8
3
- size 3942856
 
1
  version https://git-lfs.github.com/spec/v1
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+ oid sha256:050b9317e0055fff914a3cf9ff3177bc890b3f29f549780f5feb96e406b58093
3
+ size 3968152
build/torch211-cxx11-cu128-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _fp8_gemm_cuda_bcb0782
3
- ops = torch.ops._fp8_gemm_cuda_bcb0782
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_fp8_gemm_cuda_bcb0782::{op_name}"
 
1
  import torch
2
+ from . import _fp8_gemm_cuda_a6f59d3
3
+ ops = torch.ops._fp8_gemm_cuda_a6f59d3
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_fp8_gemm_cuda_a6f59d3::{op_name}"
build/torch211-cxx11-cu128-x86_64-linux/metadata.json CHANGED
@@ -1,6 +1,6 @@
1
  {
2
  "name": "fp8-gemm",
3
- "id": "_fp8_gemm_cuda_bcb0782",
4
  "version": 1,
5
  "license": "Apache-2.0",
6
  "python-depends": [],
@@ -14,9 +14,9 @@
14
  "digest": {
15
  "algorithm": "sha256",
16
  "files": {
17
- "__init__.py": "AhlkcnyTuk3G4aYsvMqu3QdiEZSTA6Y00poqqiX+Mps=",
18
- "_fp8_gemm_cuda_bcb0782.abi3.so": "GCUQ8SH4FNfDZ8WMZB3Ff4mSzBti+iVAntkSjikvzsg=",
19
- "_ops.py": "qpBYMOKsfVJtHhKzoX/hxuQPF3MGISv+MQwpPmbzUcw=",
20
  "fp8_gemm/__init__.py": "DFYPlrhXwYjEqCl/8n0SmWGZV8NFml5DPhMjKfv98GY="
21
  }
22
  }
 
1
  {
2
  "name": "fp8-gemm",
3
+ "id": "_fp8_gemm_cuda_a6f59d3",
4
  "version": 1,
5
  "license": "Apache-2.0",
6
  "python-depends": [],
 
14
  "digest": {
15
  "algorithm": "sha256",
16
  "files": {
17
+ "__init__.py": "HsFfsGY7AK/6Fziv4r2VQ+R2kDjS6hxKKgWqlA+zrKY=",
18
+ "_fp8_gemm_cuda_a6f59d3.abi3.so": "BQuTF+AFX/+RSjz5/zF3vIkLPyn1SXgPX+uW5Aa1gJM=",
19
+ "_ops.py": "kgQ6LWi/1cNaF3rEiBHA8t3jyz0toqRVj94wVDPiqVU=",
20
  "fp8_gemm/__init__.py": "DFYPlrhXwYjEqCl/8n0SmWGZV8NFml5DPhMjKfv98GY="
21
  }
22
  }