sync 91d990483a17
Browse files- README.md +15 -11
- build/webgpu/bench.json +27 -3
- build/webgpu/manifest.json +356 -479
- build/webgpu/max-pool2d-nchw-k3s2p1-vec4.wgsl.jinja +9 -10
- build/webgpu/max-pool2d-nchw-u32.wgsl.jinja +3 -3
- build/webgpu/metadata.json +32 -14
- build/webgpu/pool-global-reduction.wgsl.jinja +41 -37
- build/webgpu/pool-ncl1d-x4.wgsl.jinja +5 -11
- build/webgpu/pool-window-nd.wgsl.jinja +16 -17
- build/webgpu/pool-window-unroll.wgsl.jinja +19 -23
- build/webgpu/pool2d-nchw-k2s2-vec4.wgsl.jinja +8 -12
- build/webgpu/pool2d-nchw-separable.wgsl.jinja +9 -22
- build/webgpu/test.json +57 -21
README.md
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@@ -18,16 +18,16 @@ See the [ONNX `MaxPool` spec](https://onnx.ai/onnx/operators/onnx__MaxPool.html)
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## Inputs
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| Name |
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| --- | --- | --- | --- | --- | --- | --- |
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| `
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## Outputs
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| --- | --- | --- | --- | --- | --- | --- | --- |
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## Attributes
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@@ -36,12 +36,12 @@ Attributes and default values (overridable per request):
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| Attribute | Default | Description |
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| --- | --- | --- |
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| `auto_pad` | `"NOTSET"` | Deprecated auto-padding mode: `NOTSET` (use explicit pads), `SAME_UPPER`, `SAME_LOWER` (pad so output size is `ceil(input / stride)`), or `VALID` (no padding). It cannot be used together with `pads`. |
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| `storage_order` | `0` | Storage order of the Indices output tensor: 0 for row-major, 1 for column-major. |
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| `ceil_mode` | `0` | When non-zero, use ceiling instead of floor when computing output spatial dimensions. |
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| `kernel_shape` | — | Required kernel shape, with one positive value per spatial axis. |
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| `strides` | — | Stride along each spatial axis. When omitted, every stride is 1. |
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| `pads` | — | Padding at the beginning and end of each spatial axis, ordered as `[begin_0, ..., begin_n, end_0, ..., end_n]`. When omitted, every pad is 0. |
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## Type constraints
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## Files
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- [`metadata.json`](build/webgpu/metadata.json) — kernel metadata (id, digests, provenance)
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- [`manifest.json`](build/webgpu/manifest.json) — the op contract (source of truth)
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- [`test.json`](build/webgpu/test.json) — correctness cases
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- [`bench.json`](build/webgpu/bench.json) — benchmark + tuning cases
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## Use with `@huggingface/kernels`
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The `version: 1` option selects the published kernel contract; it is independent of any operator opset, contrib `since_version`, or model version.
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Replace each `*Data` placeholder with a typed array containing the corresponding input data.
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## Inputs
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| Name | Upstream name | Logical dtype | Rank | Shape | Description | Presence |
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| --- | --- | --- | --- | --- | --- | --- |
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| `x` | `X` | `T` | — | — | Input tensor of shape `(N x C x D1 x ... x Dn)`; batch size `N`, channels `C`, followed by spatial dimensions. | required |
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## Outputs
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| Name | Upstream name | Logical dtype | WebGPU storage | Rank | Shape | Description | Presence |
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| --- | --- | --- | --- | --- | --- | --- | --- |
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| `y` | `Y` | `T` | runtime-selected; narrow integers and bool use 32-bit slots | same as `x` | derived | Pooled output tensor with the same batch and channel dimensions as X but reduced spatial dimensions. | required |
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| `indices` | `Indices` | `I` | `uint32` | same as `x` | derived | Optional logical int64 flat indices of the maximum values selected during pooling, with the same shape as Y; indices do not account for padding and use uint32 WebGPU storage. | optional |
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## Attributes
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| Attribute | Default | Description |
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| --- | --- | --- |
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| `auto_pad` | `"NOTSET"` | Deprecated auto-padding mode: `NOTSET` (use explicit pads), `SAME_UPPER`, `SAME_LOWER` (pad so output size is `ceil(input / stride)`), or `VALID` (no padding). It cannot be used together with `pads`. |
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| `ceil_mode` | `0` | When non-zero, use ceiling instead of floor when computing output spatial dimensions. |
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| `dilations` | — | Dilation along each spatial axis. When omitted, every dilation is 1. |
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| `kernel_shape` | — | Required kernel shape, with one positive value per spatial axis. |
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| `pads` | — | Padding at the beginning and end of each spatial axis, ordered as `[begin_0, ..., begin_n, end_0, ..., end_n]`. When omitted, every pad is 0. |
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| `storage_order` | `0` | Storage order of the Indices output tensor: 0 for row-major, 1 for column-major. |
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| `strides` | — | Stride along each spatial axis. When omitted, every stride is 1. |
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## Type constraints
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## Files
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- [`metadata.json`](build/webgpu/metadata.json) — kernel metadata (id, digests, per-variant templates, provenance)
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- [`manifest.json`](build/webgpu/manifest.json) — the op contract (source of truth)
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- [`test.json`](build/webgpu/test.json) — correctness cases
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- [`bench.json`](build/webgpu/bench.json) — benchmark + tuning cases
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## Use with `@huggingface/kernels`
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```sh
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npm install --save-exact @huggingface/kernels@0.0.1-preview.2
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```
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Required output shapes and logical data types are inferred from the supplied inputs and attributes; result tensors are allocated automatically.
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The `version: 1` option selects the published kernel contract; it is independent of any operator opset, contrib `since_version`, or model version.
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It follows the `v1` branch as fixes land. To pin exact artifact bytes, pass a 40-character commit `revision` instead of `version`.
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Replace each `*Data` placeholder with a typed array containing the corresponding input data.
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build/webgpu/bench.json
CHANGED
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@@ -1,5 +1,4 @@
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{
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"op": "ai.onnx.MaxPool",
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"cases": [
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{
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"name": "nchw_1x64x112x112",
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"name": "global-maxpool-rank5-serial-reduction-pathology",
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"preset": "stress",
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"provenance": {
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"source": "
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"notes": "Rank-5 global max
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},
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"vars": { "batch": 1, "channels": 32, "inD": 32, "inH": 64, "inW": 64 },
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"attrs": { "kernel_shape": [32, 64, 64] },
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"inputs": { "x": { "dtype": "float32", "shape": [1, 128, 160, 160], "dist": "normal", "seed": 311, "scale": 2 } },
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"outputs": { "y": { "dtype": "float32", "shape": [1, 128, 80, 80], "dist": "empty" } },
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"bench": { "metrics": [{ "type": "bandwidth", "value": "args.batch * args.channels * args.inH * args.inW * 4" }] }
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}
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],
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"tunableSpace": { "WORKGROUP_SIZE": [64, 128, 256] }
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{
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"cases": [
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{
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"name": "nchw_1x64x112x112",
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"name": "global-maxpool-rank5-serial-reduction-pathology",
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"preset": "stress",
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"provenance": {
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"source": "synthetic benchmark",
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"notes": "Rank-5 global max pooling over 131,072 spatial values per plane measures the parallel global-window reduction and its workgroup-tree feature-tier alternative."
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},
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"vars": { "batch": 1, "channels": 32, "inD": 32, "inH": 64, "inW": 64 },
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"attrs": { "kernel_shape": [32, 64, 64] },
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"inputs": { "x": { "dtype": "float32", "shape": [1, 128, 160, 160], "dist": "normal", "seed": 311, "scale": 2 } },
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"outputs": { "y": { "dtype": "float32", "shape": [1, 128, 80, 80], "dist": "empty" } },
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"bench": { "metrics": [{ "type": "bandwidth", "value": "args.batch * args.channels * args.inH * args.inW * 4" }] }
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},
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{
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"name": "maxpool-f32-b1c512-20x20-k5s1p2-separable-floor",
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"provenance": {
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"notes": "A YOLO-class detector shape with a 5x5 window exercises the minimum window size admitted by the separable route."
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},
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"attrs": { "kernel_shape": [5, 5], "strides": [1, 1], "pads": [2, 2, 2, 2] },
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"inputs": { "x": { "dtype": "float32", "shape": [1, 512, 20, 20], "dist": "uniform" } },
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"outputs": { "y": { "dtype": "float32", "shape": [1, 512, 20, 20], "dist": "empty" } }
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},
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{
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"name": "maxpool-f32-b8c64-56x56-k7s1-valid-no-pad",
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"preset": "edge",
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"attrs": { "kernel_shape": [7, 7], "strides": [1, 1] },
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"inputs": { "x": { "dtype": "float32", "shape": [8, 64, 56, 56] } },
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"outputs": { "y": { "dtype": "float32", "shape": [8, 64, 50, 50] } },
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"bench": { "metrics": [{ "type": "bandwidth", "value": "(numel(shapes.x) + numel(shapes.y)) * 4" }] }
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},
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{
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"name": "maxpool-f32-b8c64-56x56-k7s7-valid-no-pad",
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"preset": "edge",
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"attrs": { "kernel_shape": [7, 7], "strides": [7, 7] },
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"inputs": { "x": { "dtype": "float32", "shape": [8, 64, 56, 56] } },
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"outputs": { "y": { "dtype": "float32", "shape": [8, 64, 8, 8] } },
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"bench": { "metrics": [{ "type": "bandwidth", "value": "(numel(shapes.x) + numel(shapes.y)) * 4" }] }
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}
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],
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"tunableSpace": { "WORKGROUP_SIZE": [64, 128, 256] }
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build/webgpu/manifest.json
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"domain": "ai.onnx",
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"name": "MaxPool",
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"sinceVersion": 12,
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"
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{
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"
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"description": "Input tensor of shape `(N x C x D1 x ... x Dn)`; batch size `N`, channels `C`, followed by spatial dimensions."
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}
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],
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"outputs": [
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{
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"role": "Y",
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"dtype": "T",
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"description": "Pooled output tensor with the same batch and channel dimensions as X but reduced spatial dimensions.",
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"rank": "ranks.X",
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"shape": "poolOutputShape"
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},
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{
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"role": "Indices",
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"dtype": "I",
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"optional": true,
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"shape": "poolOutputShape"
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}
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"attributes": {
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"
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"kernel_shape":
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"strides":
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"pads":
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"dilations":
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"ceil_mode": "When non-zero, use ceiling instead of floor when computing output spatial dimensions."
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},
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"attributeConstraints": {
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"auto_pad": { "values": ["NOTSET", "SAME_UPPER", "SAME_LOWER", "VALID"] },
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"kernel_shape": { "required": true }
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},
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"typeConstraints": { "T": ["float32", "float16", "int8", "uint8"], "I": ["int64"] },
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},
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"derive": {
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"spatialRank": "ranks.
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"kernelShapeLengthOk": "not has(attrs, \"kernel_shape\") or (attrs.kernel_shape | length) == spatialRank",
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"stridesLengthOk": "not has(attrs, \"strides\") or (attrs.strides | length) == spatialRank",
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"dilationsLengthOk": "not has(attrs, \"dilations\") or (attrs.dilations | length) == spatialRank",
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"padBack": "attrs.pads[spatialRank] if padsLengthOk and has(attrs, \"pads\") and spatialRank == 3 else 0",
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"padBottom": "attrs.pads[2 * spatialRank - 2] if padsLengthOk and has(attrs, \"pads\") and spatialRank >= 2 else 0",
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"padRight": "attrs.pads[2 * spatialRank - 1] if padsLengthOk and has(attrs, \"pads\") and spatialRank >= 1 else 0",
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"poolShapeOk": "ranks.
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"explicitOutW": "min(ceil((dim(shapes.
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"explicitOutH": "min(ceil((dim(shapes.
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"explicitOutD": "(min(ceil((dim(shapes.
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"inferredOutW": "ceil(dim(shapes.
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"inferredOutH": "ceil(dim(shapes.
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"inferredOutD": "ceil(dim(shapes.
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"poolOutputShape": "[dim(shapes.
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"pool2dOutputShapeOk": "(dim(shapes.
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"autoPadTotalH": "max(0, (dim(shapes.
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"autoPadTotalW": "max(0, (dim(shapes.
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"effectivePadH": "(floor(autoPadTotalH / 2) if attrs.auto_pad == \"SAME_UPPER\" else autoPadTotalH - floor(autoPadTotalH / 2)) if
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"effectivePadW": "(floor(autoPadTotalW / 2) if attrs.auto_pad == \"SAME_UPPER\" else autoPadTotalW - floor(autoPadTotalW / 2)) if
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"floatDtypeOk": "(dtypes.T == \"f32\" or dtypes.T == \"f16\") and f16Ok(dtypes.T)",
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"globalWindowParallelCovered": "not present.indices and floatDtypeOk and poolShapeOk and numel(shapes.
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"tiledStorageBytes": "(tunables.TILED_D + kernelD - 1) * (tunables.TILED_H + kernelH - 1) * (tunables.TILED_W + kernelW - 1) * 4",
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"tiledDeviceOk": "tiledStorageBytes <= device.limits.maxComputeWorkgroupStorageSize and tunables.TILED_W * tunables.TILED_H * tunables.TILED_LANES_D <= device.limits.maxComputeInvocationsPerWorkgroup and tunables.TILED_W <= device.limits.maxComputeWorkgroupSizeX and tunables.TILED_H <= device.limits.maxComputeWorkgroupSizeY and tunables.TILED_LANES_D <= device.limits.maxComputeWorkgroupSizeZ",
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"tiledDispatchOk": "ceilDiv(dim(shapes.
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"separableTmpElements": "dim(shapes.
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"separableFits": "separableTmpElements * 4 <= min(device.limits.maxStorageBufferBindingSize, device.limits.maxBufferSize) and ceilDiv(separableTmpElements, tunables.WORKGROUP_SIZE) <= device.limits.maxComputeWorkgroupsPerDimension * device.limits.maxComputeWorkgroupsPerDimension"
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},
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"buffer": { "type": "uniform" },
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"name": "Params",
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"fields": [
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{
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"name": "blockCount",
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"type": "u32",
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"value": "dim(shapes.X, 0) * dim(shapes.X, 1) * ceilDiv(dim(shapes.Y, 2), 4)"
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}
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]
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}
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}
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],
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"rank1Direct": [
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{ "name": "x", "arg": "x", "semantic": "X", "buffer": { "type": "read-only-storage" }, "elementType": "$T" },
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{ "name": "y", "arg": "y", "semantic": "Y", "buffer": { "type": "storage" }, "elementType": "$T" },
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{
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"name": "params",
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"semantic": "kernel.params",
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"buffer": { "type": "uniform" },
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"struct": {
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"name": "Params",
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"fields": [
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{ "name": "channels", "type": "u32", "value": "dim(shapes.X, 1)" },
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{ "name": "inW", "type": "u32", "value": "dim(shapes.X, 2)" },
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{ "name": "outW", "type": "u32", "value": "dim(shapes.Y, 2)" },
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{ "name": "kernelW", "type": "u32", "value": "kernelW" },
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| 156 |
-
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| 188 |
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| 195 |
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| 196 |
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| 197 |
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| 198 |
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| 208 |
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| 209 |
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| 210 |
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| 211 |
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| 215 |
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| 216 |
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| 219 |
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| 236 |
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| 239 |
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| 242 |
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| 243 |
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| 245 |
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| 246 |
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| 247 |
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{ "name": "count", "type": "u32", "value": "numel(shapes.Y)" }
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| 248 |
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| 249 |
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| 250 |
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| 251 |
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| 253 |
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| 254 |
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{ "name": "y", "arg": "y", "semantic": "Y", "buffer": { "type": "storage" }, "elementType": "f32" },
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| 255 |
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{
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| 256 |
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| 257 |
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| 258 |
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| 259 |
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| 260 |
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| 261 |
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| 262 |
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{ "name": "inD", "type": "u32", "value": "dim(shapes.X, 2)" },
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{ "name": "inH", "type": "u32", "value": "dim(shapes.X, 3)" },
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| 264 |
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| 265 |
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| 266 |
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| 267 |
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|
| 268 |
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]
|
| 269 |
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| 270 |
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| 271 |
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| 272 |
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| 273 |
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| 274 |
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{ "name": "y", "arg": "y", "semantic": "Y", "buffer": { "type": "storage" }, "elementType": "$T" },
|
| 275 |
-
{
|
| 276 |
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|
| 277 |
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"arg": "indices",
|
| 278 |
-
"semantic": "Indices",
|
| 279 |
-
"buffer": { "type": "storage" },
|
| 280 |
-
"elementType": "u32"
|
| 281 |
-
},
|
| 282 |
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{
|
| 283 |
-
"name": "params",
|
| 284 |
-
"semantic": "kernel.params",
|
| 285 |
-
"buffer": { "type": "uniform" },
|
| 286 |
-
"struct": {
|
| 287 |
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"name": "Params",
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| 288 |
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| 289 |
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{ "name": "channels", "type": "u32", "value": "dim(shapes.X, 1)" },
|
| 290 |
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{ "name": "inW", "type": "u32", "value": "dim(shapes.X, 2)" },
|
| 291 |
-
{ "name": "outW", "type": "u32", "value": "dim(shapes.Y, 2)" },
|
| 292 |
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{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 293 |
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{ "name": "strideW", "type": "u32", "value": "strideW" },
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| 294 |
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{ "name": "dilationW", "type": "u32", "value": "dilationW" },
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| 295 |
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{ "name": "padW", "type": "i32", "value": "padLeft" },
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| 296 |
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{ "name": "count", "type": "u32", "value": "numel(shapes.Y)" }
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| 297 |
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|
| 298 |
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| 299 |
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| 300 |
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| 303 |
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| 304 |
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{
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| 305 |
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| 306 |
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|
| 307 |
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"semantic": "Indices",
|
| 308 |
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|
| 309 |
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|
| 310 |
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},
|
| 311 |
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{
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| 312 |
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"name": "params",
|
| 313 |
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"semantic": "kernel.params",
|
| 314 |
-
"buffer": { "type": "uniform" },
|
| 315 |
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| 316 |
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"name": "Params",
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| 317 |
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| 318 |
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{ "name": "channels", "type": "u32", "value": "dim(shapes.X, 1)" },
|
| 319 |
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{ "name": "inH", "type": "u32", "value": "dim(shapes.X, 2)" },
|
| 320 |
-
{ "name": "inW", "type": "u32", "value": "dim(shapes.X, 3)" },
|
| 321 |
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{ "name": "outH", "type": "u32", "value": "dim(shapes.Y, 2)" },
|
| 322 |
-
{ "name": "outW", "type": "u32", "value": "dim(shapes.Y, 3)" },
|
| 323 |
-
{ "name": "kernelH", "type": "u32", "value": "kernelH" },
|
| 324 |
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{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 325 |
-
{ "name": "strideH", "type": "u32", "value": "strideH" },
|
| 326 |
-
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 327 |
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{ "name": "dilationH", "type": "u32", "value": "dilationH" },
|
| 328 |
-
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 329 |
-
{ "name": "padH", "type": "i32", "value": "effectivePadH" },
|
| 330 |
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{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 331 |
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{ "name": "count", "type": "u32", "value": "numel(shapes.Y)" }
|
| 332 |
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|
| 333 |
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}
|
| 334 |
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|
| 335 |
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|
| 336 |
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| 337 |
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{ "name": "x", "arg": "x", "semantic": "X", "buffer": { "type": "read-only-storage" }, "elementType": "$T" },
|
| 338 |
-
{ "name": "tmp", "semantic": "tmp", "buffer": { "type": "storage" }, "elementType": "f32" },
|
| 339 |
-
{
|
| 340 |
-
"name": "params",
|
| 341 |
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"semantic": "kernel.params",
|
| 342 |
-
"buffer": { "type": "uniform" },
|
| 343 |
-
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|
| 344 |
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"name": "Params",
|
| 345 |
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"fields": [
|
| 346 |
-
{ "name": "inH", "type": "u32", "value": "dim(shapes.X, 2)" },
|
| 347 |
-
{ "name": "inW", "type": "u32", "value": "dim(shapes.X, 3)" },
|
| 348 |
-
{ "name": "outW", "type": "u32", "value": "dim(shapes.Y, 3)" },
|
| 349 |
-
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 350 |
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{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 351 |
-
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 352 |
-
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 353 |
-
{
|
| 354 |
-
"name": "tmpCount",
|
| 355 |
-
"type": "u32",
|
| 356 |
-
"value": "dim(shapes.X, 0) * dim(shapes.X, 1) * dim(shapes.X, 2) * dim(shapes.Y, 3)"
|
| 357 |
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}
|
| 358 |
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]
|
| 359 |
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}
|
| 360 |
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}
|
| 361 |
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|
| 362 |
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|
| 363 |
-
{ "name": "tmp", "semantic": "tmp", "buffer": { "type": "read-only-storage" }, "elementType": "f32" },
|
| 364 |
-
{ "name": "y", "arg": "y", "semantic": "Y", "buffer": { "type": "storage" }, "elementType": "$T" },
|
| 365 |
-
{
|
| 366 |
-
"name": "params",
|
| 367 |
-
"semantic": "kernel.params",
|
| 368 |
-
"buffer": { "type": "uniform" },
|
| 369 |
-
"struct": {
|
| 370 |
-
"name": "Params",
|
| 371 |
-
"fields": [
|
| 372 |
-
{ "name": "inH", "type": "u32", "value": "dim(shapes.X, 2)" },
|
| 373 |
-
{ "name": "inW", "type": "u32", "value": "dim(shapes.X, 3)" },
|
| 374 |
-
{ "name": "outH", "type": "u32", "value": "dim(shapes.Y, 2)" },
|
| 375 |
-
{ "name": "outW", "type": "u32", "value": "dim(shapes.Y, 3)" },
|
| 376 |
-
{ "name": "kernelH", "type": "u32", "value": "kernelH" },
|
| 377 |
-
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 378 |
-
{ "name": "strideH", "type": "u32", "value": "strideH" },
|
| 379 |
-
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 380 |
-
{ "name": "dilationH", "type": "u32", "value": "dilationH" },
|
| 381 |
-
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 382 |
-
{ "name": "padH", "type": "i32", "value": "effectivePadH" },
|
| 383 |
-
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 384 |
-
{ "name": "count", "type": "u32", "value": "numel(shapes.Y)" }
|
| 385 |
-
]
|
| 386 |
-
}
|
| 387 |
-
}
|
| 388 |
-
]
|
| 389 |
},
|
| 390 |
"variants": [
|
| 391 |
{
|
| 392 |
"id": "global_window_parallel",
|
| 393 |
"priority": 50,
|
| 394 |
"when": ["globalWindowParallelCovered"],
|
| 395 |
-
"
|
| 396 |
-
"usesF16": "dtypes.T == \"f16\"",
|
| 397 |
"scalar": "dtypes.T",
|
| 398 |
-
"xElem": "(\"vec4<f16>\" if dtypes.T == \"f16\" else \"vec4<f32>\") if inner(shapes.
|
| 399 |
},
|
| 400 |
"passes": [
|
| 401 |
{
|
| 402 |
"id": "main",
|
| 403 |
"name": "MaxPool.GlobalWindowParallel",
|
| 404 |
-
"
|
| 405 |
-
|
| 406 |
-
|
| 407 |
-
|
| 408 |
-
|
| 409 |
-
|
| 410 |
-
|
| 411 |
-
}
|
| 412 |
},
|
| 413 |
-
"bindings":
|
| 414 |
-
|
|
|
|
|
|
|
|
|
|
|
|
|
| 415 |
}
|
| 416 |
]
|
| 417 |
},
|
| 418 |
{
|
| 419 |
"id": "nchw2d_k3s2p1_vec4",
|
| 420 |
"priority": 35,
|
| 421 |
-
"when": ["not present.indices", "f16Ok(dtypes.T)", "dtypes.T == \"f16\"", "poolShapeOk", "ranks.
|
| 422 |
-
"
|
| 423 |
"passes": [
|
| 424 |
{
|
| 425 |
"id": "main",
|
| 426 |
"name": "MaxPool.Nchw2dK3s2p1Vec4",
|
| 427 |
-
"
|
| 428 |
-
|
| 429 |
-
"
|
| 430 |
-
|
| 431 |
-
|
| 432 |
-
|
| 433 |
-
|
| 434 |
-
"outBlocks": "dim(shapes.Y, 3) / 4"
|
| 435 |
-
}
|
| 436 |
},
|
| 437 |
-
"bindings":
|
| 438 |
-
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 439 |
}
|
| 440 |
]
|
| 441 |
},
|
| 442 |
{
|
| 443 |
"id": "nchw2d_k2s2_vec4",
|
| 444 |
"priority": 30,
|
| 445 |
-
"when": ["not present.indices", "f16Ok(dtypes.T)", "poolShapeOk", "ranks.
|
| 446 |
-
"
|
| 447 |
-
"scalar": "dtypes.T",
|
| 448 |
-
"usesF16": "dtypes.T == \"f16\"",
|
| 449 |
-
"xVec4": "\"vec4<f16>\" if dtypes.T == \"f16\" else \"vec4<f32>\""
|
| 450 |
-
},
|
| 451 |
"passes": [
|
| 452 |
{
|
| 453 |
"id": "main",
|
| 454 |
"name": "MaxPool.Nchw2dK2s2Vec4",
|
| 455 |
-
"
|
| 456 |
-
|
| 457 |
-
"
|
| 458 |
-
|
| 459 |
-
|
| 460 |
-
|
| 461 |
-
|
| 462 |
-
|
| 463 |
-
"inPlaneVec4": "floor(dim(shapes.X, 2) * dim(shapes.X, 3) / 4)"
|
| 464 |
-
}
|
| 465 |
},
|
| 466 |
-
"bindings":
|
| 467 |
-
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 468 |
}
|
| 469 |
]
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},
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{
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"id": "nchw2d_unrolled",
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"priority": 25,
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-
"when": ["not present.indices", "floatDtypeOk", "poolShapeOk", "ranks.
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-
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"passes": [
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{
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"id": "main",
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"name": "MaxPool.Nchw2dUnrolled",
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"outW": "dim(shapes.Y, 3)"
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},
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"bindings":
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{
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"id": "ncl1d_k2s2_x4",
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"priority": 30,
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"when": ["not present.indices", "floatDtypeOk", "poolShapeOk", "ranks.
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"usesF16": "dtypes.T == \"f16\"",
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"scalar": "dtypes.T",
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-
"xVec4": "\"vec4<f16>\" if dtypes.T == \"f16\" else \"vec4<f32>\""
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-
},
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"passes": [
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{
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"id": "main",
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"name": "MaxPool.Ncl1dK2s2X4",
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"dispatch": {
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@@ -528,83 +283,162 @@
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{
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"id": "ncl1d",
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"priority": 10,
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"when": ["not present.indices", "f16Ok(dtypes.T)", "poolShapeOk", "ranks.
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"passes": [
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{
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"id": "main",
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"name": "MaxPool.Ncl1d",
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},
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{
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"id": "nchw2d_uint8",
|
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"priority": 20,
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-
"when": ["not present.indices", "tensorDtypes.
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"passes": [
|
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{
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"id": "main",
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"name": "nchw2d_uint8",
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"shader": "max-pool2d-nchw-u32.wgsl.jinja",
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"bindings": "
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"dispatch": {
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}
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]
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},
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{
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"id": "nchw2d_separable",
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"priority": 22,
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| 560 |
-
"when": ["not present.indices", "f16Ok(dtypes.T) and dtypes.T != \"u32\"", "poolShapeOk", "ranks.
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-
"
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| 562 |
"intermediates": [{ "id": "tmp", "dtype": "float32", "shape": "[separableTmpElements]" }],
|
| 563 |
"passes": [
|
| 564 |
{
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"id": "reduce_w",
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"name": "MaxPool.SeparableW",
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},
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{
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"id": "reduce_h",
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| 573 |
"name": "MaxPool.SeparableH",
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}
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]
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},
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| 580 |
{
|
| 581 |
"id": "nchw2d",
|
| 582 |
-
"when": ["not present.indices", "f16Ok(dtypes.T) and dtypes.T != \"u32\"", "poolShapeOk", "ranks.
|
| 583 |
-
"
|
| 584 |
"passes": [
|
| 585 |
{
|
| 586 |
"id": "main",
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| 587 |
"name": "nchw2d",
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}
|
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]
|
| 593 |
},
|
| 594 |
{
|
| 595 |
"id": "ncdhw3d_k5s1_tiled",
|
| 596 |
"priority": 20,
|
| 597 |
-
"when": ["not present.indices", "dtypes.T == \"f32\"", "poolShapeOk", "ranks.
|
| 598 |
"passes": [
|
| 599 |
{
|
| 600 |
"id": "main",
|
| 601 |
"name": "MaxPool.Ncdhw3dK5s1Tiled",
|
| 602 |
"shader": "max-pool3d-ncdhw-k5-tiled.wgsl.jinja",
|
| 603 |
-
"bindings":
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| 604 |
"dispatch": {
|
| 605 |
-
"x": "ceilDiv(dim(shapes.
|
| 606 |
-
"y": "ceilDiv(dim(shapes.
|
| 607 |
-
"z": "dim(shapes.
|
| 608 |
}
|
| 609 |
}
|
| 610 |
]
|
|
@@ -612,68 +446,111 @@
|
|
| 612 |
{
|
| 613 |
"id": "ncdhw3d",
|
| 614 |
"priority": 10,
|
|
|
|
| 615 |
"supersededBy": ["global_window_parallel"],
|
| 616 |
-
"
|
| 617 |
-
"constants": { "usesF16": "dtypes.T == \"f16\"", "scalar": "dtypes.T" },
|
| 618 |
"passes": [
|
| 619 |
{
|
| 620 |
"id": "main",
|
| 621 |
"name": "MaxPool.Ncdhw3d",
|
| 622 |
-
"
|
| 623 |
-
"
|
| 624 |
-
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| 625 |
}
|
| 626 |
]
|
| 627 |
},
|
| 628 |
{
|
| 629 |
"id": "ncl1d_indices",
|
| 630 |
"priority": 15,
|
| 631 |
-
"when": ["present.indices", "f16Ok(dtypes.T)", "poolShapeOk", "ranks.
|
| 632 |
-
"
|
| 633 |
"passes": [
|
| 634 |
{
|
| 635 |
"id": "main",
|
| 636 |
"name": "MaxPool.Ncl1dIndices",
|
| 637 |
-
"
|
| 638 |
-
"
|
| 639 |
-
"
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|
| 640 |
}
|
| 641 |
]
|
| 642 |
},
|
| 643 |
{
|
| 644 |
"id": "nchw2d_uint8_indices",
|
| 645 |
"priority": 16,
|
| 646 |
-
"when": ["present.indices", "tensorDtypes.
|
| 647 |
-
"
|
| 648 |
"passes": [
|
| 649 |
{
|
| 650 |
"id": "main",
|
| 651 |
"name": "MaxPool.Nchw2dUint8Indices",
|
| 652 |
-
"
|
| 653 |
-
"
|
| 654 |
-
"
|
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|
| 655 |
}
|
| 656 |
]
|
| 657 |
},
|
| 658 |
{
|
| 659 |
"id": "nchw2d_indices",
|
| 660 |
-
"
|
| 661 |
-
"
|
| 662 |
-
|
| 663 |
-
"usesF16": "dtypes.T == \"f16\"",
|
| 664 |
-
"hasIndices": true,
|
| 665 |
-
"storageOrder": "attrs.storage_order"
|
| 666 |
-
},
|
| 667 |
"passes": [
|
| 668 |
{
|
| 669 |
"id": "main",
|
| 670 |
"name": "MaxPool.Nchw2dIndices",
|
| 671 |
-
"
|
| 672 |
-
"
|
| 673 |
-
"
|
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|
| 674 |
}
|
| 675 |
-
]
|
| 676 |
-
"priority": 15
|
| 677 |
}
|
| 678 |
]
|
| 679 |
}
|
|
|
|
| 2 |
"domain": "ai.onnx",
|
| 3 |
"name": "MaxPool",
|
| 4 |
"sinceVersion": 12,
|
| 5 |
+
"inputs": { "x": { "onnx": "X", "dtype": "T" } },
|
| 6 |
+
"outputs": {
|
| 7 |
+
"y": { "onnx": "Y", "dtype": "T", "rank": "ranks.x", "shape": "poolOutputShape" },
|
| 8 |
+
"indices": {
|
| 9 |
+
"onnx": "Indices",
|
|
|
|
|
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|
| 10 |
"dtype": "I",
|
| 11 |
+
"rank": "ranks.x",
|
| 12 |
"optional": true,
|
| 13 |
+
"shape": "poolOutputShape",
|
| 14 |
+
"storage": "uint32"
|
|
|
|
| 15 |
}
|
| 16 |
+
},
|
| 17 |
+
"attributes": {
|
| 18 |
+
"auto_pad": { "default": "NOTSET" },
|
| 19 |
+
"storage_order": { "default": 0 },
|
| 20 |
+
"ceil_mode": { "default": 0 },
|
| 21 |
+
"kernel_shape": {},
|
| 22 |
+
"strides": {},
|
| 23 |
+
"pads": {},
|
| 24 |
+
"dilations": {}
|
|
|
|
| 25 |
},
|
| 26 |
"attributeConstraints": {
|
| 27 |
"auto_pad": { "values": ["NOTSET", "SAME_UPPER", "SAME_LOWER", "VALID"] },
|
|
|
|
| 30 |
"kernel_shape": { "required": true }
|
| 31 |
},
|
| 32 |
"typeConstraints": { "T": ["float32", "float16", "int8", "uint8"], "I": ["int64"] },
|
| 33 |
+
"tunables": {
|
| 34 |
+
"WORKGROUP_SIZE": { "default": 128 },
|
| 35 |
+
"TILED_D": { "default": 24 },
|
| 36 |
+
"TILED_H": { "default": 8 },
|
| 37 |
+
"TILED_W": { "default": 8 },
|
| 38 |
+
"TILED_LANES_D": { "default": 4 },
|
| 39 |
+
"SEPARABLE_MIN_WINDOW": { "default": 25 }
|
| 40 |
},
|
| 41 |
"derive": {
|
| 42 |
+
"spatialRank": "ranks.x - 2",
|
| 43 |
"kernelShapeLengthOk": "not has(attrs, \"kernel_shape\") or (attrs.kernel_shape | length) == spatialRank",
|
| 44 |
"stridesLengthOk": "not has(attrs, \"strides\") or (attrs.strides | length) == spatialRank",
|
| 45 |
"dilationsLengthOk": "not has(attrs, \"dilations\") or (attrs.dilations | length) == spatialRank",
|
|
|
|
| 59 |
"padBack": "attrs.pads[spatialRank] if padsLengthOk and has(attrs, \"pads\") and spatialRank == 3 else 0",
|
| 60 |
"padBottom": "attrs.pads[2 * spatialRank - 2] if padsLengthOk and has(attrs, \"pads\") and spatialRank >= 2 else 0",
|
| 61 |
"padRight": "attrs.pads[2 * spatialRank - 1] if padsLengthOk and has(attrs, \"pads\") and spatialRank >= 1 else 0",
|
| 62 |
+
"poolShapeOk": "ranks.x >= 3 and ranks.x <= 5 and ranks.y == ranks.x and has(attrs, \"kernel_shape\") and kernelShapeLengthOk and stridesLengthOk and dilationsLengthOk and padsLengthOk and kernelD > 0 and kernelH > 0 and kernelW > 0 and strideD > 0 and strideH > 0 and strideW > 0 and dilationD > 0 and dilationH > 0 and dilationW > 0 and padFront >= 0 and padTop >= 0 and padLeft >= 0 and padBack >= 0 and padBottom >= 0 and padRight >= 0 and (attrs.auto_pad == \"NOTSET\" or not has(attrs, \"pads\")) and dim(shapes.y, 0) == dim(shapes.x, 0) and dim(shapes.y, 1) == dim(shapes.x, 1)",
|
| 63 |
+
"explicitOutW": "min(ceil((dim(shapes.x, ranks.x - 1) + padLeft + padRight - ((kernelW - 1) * dilationW + 1)) / strideW) + 1, ceil((dim(shapes.x, ranks.x - 1) + padLeft) / strideW)) if attrs.ceil_mode != 0 else floor((dim(shapes.x, ranks.x - 1) + padLeft + padRight - ((kernelW - 1) * dilationW + 1)) / strideW) + 1",
|
| 64 |
+
"explicitOutH": "min(ceil((dim(shapes.x, ranks.x - 2) + padTop + padBottom - ((kernelH - 1) * dilationH + 1)) / strideH) + 1, ceil((dim(shapes.x, ranks.x - 2) + padTop) / strideH)) if attrs.ceil_mode != 0 else floor((dim(shapes.x, ranks.x - 2) + padTop + padBottom - ((kernelH - 1) * dilationH + 1)) / strideH) + 1",
|
| 65 |
+
"explicitOutD": "(min(ceil((dim(shapes.x, 2) + padFront + padBack - ((kernelD - 1) * dilationD + 1)) / strideD) + 1, ceil((dim(shapes.x, 2) + padFront) / strideD)) if attrs.ceil_mode != 0 else floor((dim(shapes.x, 2) + padFront + padBack - ((kernelD - 1) * dilationD + 1)) / strideD) + 1) if ranks.x == 5 else 0",
|
| 66 |
+
"inferredOutW": "ceil(dim(shapes.x, ranks.x - 1) / strideW) if attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\" else explicitOutW",
|
| 67 |
+
"inferredOutH": "ceil(dim(shapes.x, ranks.x - 2) / strideH) if attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\" else explicitOutH",
|
| 68 |
+
"inferredOutD": "ceil(dim(shapes.x, 2) / strideD) if attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\" else explicitOutD",
|
| 69 |
+
"poolOutputShape": "[dim(shapes.x, 0), dim(shapes.x, 1), inferredOutW] if ranks.x == 3 else ([dim(shapes.x, 0), dim(shapes.x, 1), inferredOutH, inferredOutW] if ranks.x == 4 else [dim(shapes.x, 0), dim(shapes.x, 1), inferredOutD, inferredOutH, inferredOutW])",
|
| 70 |
+
"pool2dOutputShapeOk": "(dim(shapes.y, 2) == explicitOutH and dim(shapes.y, 3) == explicitOutW) or ((attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\") and dim(shapes.y, 2) == ceil(dim(shapes.x, 2) / strideH) and dim(shapes.y, 3) == ceil(dim(shapes.x, 3) / strideW))",
|
| 71 |
+
"autoPadTotalH": "max(0, (dim(shapes.y, ranks.x - 2) - 1) * strideH + ((kernelH - 1) * dilationH + 1) - dim(shapes.x, ranks.x - 2)) if ranks.x >= 4 else 0",
|
| 72 |
+
"autoPadTotalW": "max(0, (dim(shapes.y, ranks.x - 1) - 1) * strideW + ((kernelW - 1) * dilationW + 1) - dim(shapes.x, ranks.x - 1))",
|
| 73 |
+
"effectivePadH": "(floor(autoPadTotalH / 2) if attrs.auto_pad == \"SAME_UPPER\" else autoPadTotalH - floor(autoPadTotalH / 2)) if (attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\") else padTop",
|
| 74 |
+
"effectivePadW": "(floor(autoPadTotalW / 2) if attrs.auto_pad == \"SAME_UPPER\" else autoPadTotalW - floor(autoPadTotalW / 2)) if (attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\") else padLeft",
|
| 75 |
"floatDtypeOk": "(dtypes.T == \"f32\" or dtypes.T == \"f16\") and f16Ok(dtypes.T)",
|
| 76 |
+
"globalWindowParallelCovered": "not present.indices and floatDtypeOk and poolShapeOk and numel(shapes.y) == dim(shapes.x, 0) * dim(shapes.x, 1) and numel(shapes.y) <= min(device.limits.maxComputeWorkgroupsPerDimension, 65535) and attrs.auto_pad == \"NOTSET\" and strideD == 1 and strideH == 1 and strideW == 1 and dilationD == 1 and dilationH == 1 and dilationW == 1 and padFront == 0 and padTop == 0 and padLeft == 0 and padBack == 0 and padBottom == 0 and padRight == 0 and ((ranks.x == 3 and kernelW == dim(shapes.x, 2)) or (ranks.x == 4 and kernelH == dim(shapes.x, 2) and kernelW == dim(shapes.x, 3)) or (ranks.x == 5 and kernelD == dim(shapes.x, 2) and kernelH == dim(shapes.x, 3) and kernelW == dim(shapes.x, 4))) and inner(shapes.x, 1) >= 256",
|
| 77 |
"tiledStorageBytes": "(tunables.TILED_D + kernelD - 1) * (tunables.TILED_H + kernelH - 1) * (tunables.TILED_W + kernelW - 1) * 4",
|
| 78 |
"tiledDeviceOk": "tiledStorageBytes <= device.limits.maxComputeWorkgroupStorageSize and tunables.TILED_W * tunables.TILED_H * tunables.TILED_LANES_D <= device.limits.maxComputeInvocationsPerWorkgroup and tunables.TILED_W <= device.limits.maxComputeWorkgroupSizeX and tunables.TILED_H <= device.limits.maxComputeWorkgroupSizeY and tunables.TILED_LANES_D <= device.limits.maxComputeWorkgroupSizeZ",
|
| 79 |
+
"tiledDispatchOk": "ceilDiv(dim(shapes.y, 4), tunables.TILED_W) <= min(device.limits.maxComputeWorkgroupsPerDimension, 65535) and ceilDiv(dim(shapes.y, 3), tunables.TILED_H) <= min(device.limits.maxComputeWorkgroupsPerDimension, 65535) and dim(shapes.x, 0) * dim(shapes.x, 1) * ceilDiv(dim(shapes.y, 2), tunables.TILED_D) <= min(device.limits.maxComputeWorkgroupsPerDimension, 65535)",
|
| 80 |
+
"separableTmpElements": "dim(shapes.x, 0) * dim(shapes.x, 1) * dim(shapes.x, 2) * dim(shapes.y, 3)",
|
| 81 |
+
"separableFits": "separableTmpElements * 4 <= min(device.limits.maxStorageBufferBindingSize, device.limits.maxBufferSize) and ceilDiv(separableTmpElements, tunables.WORKGROUP_SIZE) <= min(device.limits.maxComputeWorkgroupsPerDimension, 65535) * min(device.limits.maxComputeWorkgroupsPerDimension, 65535)",
|
| 82 |
+
"autoPadTotalD": "max(0, (dim(shapes.y, 2) - 1) * strideD + ((kernelD - 1) * dilationD + 1) - dim(shapes.x, 2)) if ranks.x == 5 else 0",
|
| 83 |
+
"effectivePadD": "(floor(autoPadTotalD / 2) if attrs.auto_pad == \"SAME_UPPER\" else autoPadTotalD - floor(autoPadTotalD / 2)) if (attrs.auto_pad == \"SAME_UPPER\" or attrs.auto_pad == \"SAME_LOWER\") else padFront"
|
| 84 |
},
|
| 85 |
+
"bindings": {
|
| 86 |
+
"x_2": { "name": "x", "buffer": "read-only-storage", "elementType": "$xVec4" },
|
| 87 |
+
"params": {
|
| 88 |
+
"buffer": "uniform",
|
| 89 |
+
"struct": [
|
| 90 |
+
{ "name": "channels", "type": "u32", "value": "dim(shapes.x, 1)" },
|
| 91 |
+
{ "name": "inW", "type": "u32", "value": "dim(shapes.x, 2)" },
|
| 92 |
+
{ "name": "outW", "type": "u32", "value": "dim(shapes.y, 2)" },
|
| 93 |
+
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 94 |
+
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 95 |
+
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 96 |
+
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 97 |
+
{ "name": "count", "type": "u32", "value": "numel(shapes.y)" }
|
| 98 |
+
]
|
| 99 |
+
},
|
| 100 |
+
"params_7": {
|
| 101 |
+
"name": "params",
|
| 102 |
+
"buffer": "uniform",
|
| 103 |
+
"struct": [
|
| 104 |
+
{ "name": "channels", "type": "u32", "value": "dim(shapes.x, 1)" },
|
| 105 |
+
{ "name": "inH", "type": "u32", "value": "dim(shapes.x, 2)" },
|
| 106 |
+
{ "name": "inW", "type": "u32", "value": "dim(shapes.x, 3)" },
|
| 107 |
+
{ "name": "outH", "type": "u32", "value": "dim(shapes.y, 2)" },
|
| 108 |
+
{ "name": "outW", "type": "u32", "value": "dim(shapes.y, 3)" },
|
| 109 |
+
{ "name": "kernelH", "type": "u32", "value": "kernelH" },
|
| 110 |
+
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 111 |
+
{ "name": "strideH", "type": "u32", "value": "strideH" },
|
| 112 |
+
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 113 |
+
{ "name": "dilationH", "type": "u32", "value": "dilationH" },
|
| 114 |
+
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 115 |
+
{ "name": "padH", "type": "i32", "value": "effectivePadH" },
|
| 116 |
+
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 117 |
+
{ "name": "count", "type": "u32", "value": "numel(shapes.y)" }
|
| 118 |
+
]
|
| 119 |
+
}
|
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|
| 120 |
},
|
| 121 |
"variants": [
|
| 122 |
{
|
| 123 |
"id": "global_window_parallel",
|
| 124 |
"priority": 50,
|
| 125 |
"when": ["globalWindowParallelCovered"],
|
| 126 |
+
"derive": {
|
|
|
|
| 127 |
"scalar": "dtypes.T",
|
| 128 |
+
"xElem": "(\"vec4<f16>\" if dtypes.T == \"f16\" else \"vec4<f32>\") if inner(shapes.x, 1) % 4 == 0 else dtypes.T"
|
| 129 |
},
|
| 130 |
"passes": [
|
| 131 |
{
|
| 132 |
"id": "main",
|
| 133 |
"name": "MaxPool.GlobalWindowParallel",
|
| 134 |
+
"shader": "pool-global-reduction.wgsl.jinja",
|
| 135 |
+
"subgroupCollectivesWidth": "portable",
|
| 136 |
+
"derive": {
|
| 137 |
+
"op": "\"max\"",
|
| 138 |
+
"vec4": "inner(shapes.x, 1) % 4 == 0",
|
| 139 |
+
"workgroupSizeSpec": "tunables.WORKGROUP_SIZE",
|
| 140 |
+
"useSubgroups": "device.features.has(\"subgroups\")"
|
|
|
|
| 141 |
},
|
| 142 |
+
"bindings": [
|
| 143 |
+
{ "arg": "x", "elementType": "$xElem" },
|
| 144 |
+
{ "arg": "y", "elementType": "$scalar" },
|
| 145 |
+
{ "name": "params", "struct": [{ "name": "spatial", "type": "u32", "value": "inner(shapes.x, 1)" }] }
|
| 146 |
+
],
|
| 147 |
+
"dispatch": { "x": "numel(shapes.y)" }
|
| 148 |
}
|
| 149 |
]
|
| 150 |
},
|
| 151 |
{
|
| 152 |
"id": "nchw2d_k3s2p1_vec4",
|
| 153 |
"priority": 35,
|
| 154 |
+
"when": ["not present.indices", "f16Ok(dtypes.T)", "dtypes.T == \"f16\"", "poolShapeOk", "ranks.x == 4", "ranks.y == 4", "attrs.auto_pad == \"NOTSET\"", "kernelH == 3", "kernelW == 3", "strideH == 2", "strideW == 2", "dilationH == 1", "dilationW == 1", "padTop == 1", "padLeft == 1", "padBottom == 1", "padRight == 1", "attrs.ceil_mode == 0", "dim(shapes.x, 2) % 2 == 0", "dim(shapes.x, 3) % 8 == 0", "dim(shapes.y, 0) == dim(shapes.x, 0)", "dim(shapes.y, 1) == dim(shapes.x, 1)", "dim(shapes.y, 2) == dim(shapes.x, 2) / 2", "dim(shapes.y, 3) == dim(shapes.x, 3) / 2", "dim(shapes.y, 2) > 0", "dim(shapes.y, 3) >= 4"],
|
| 155 |
+
"derive": { "scalar": "dtypes.T", "xVec4": "\"vec4<f16>\"", "yVec4": "\"vec4<f16>\"" },
|
| 156 |
"passes": [
|
| 157 |
{
|
| 158 |
"id": "main",
|
| 159 |
"name": "MaxPool.Nchw2dK3s2p1Vec4",
|
| 160 |
+
"shader": "max-pool2d-nchw-k3s2p1-vec4.wgsl.jinja",
|
| 161 |
+
"derive": {
|
| 162 |
+
"inH": "dim(shapes.x, 2)",
|
| 163 |
+
"inWVec4": "dim(shapes.x, 3) / 4",
|
| 164 |
+
"inPlaneVec4": "dim(shapes.x, 2) * dim(shapes.x, 3) / 4",
|
| 165 |
+
"outH": "dim(shapes.y, 2)",
|
| 166 |
+
"outBlocks": "dim(shapes.y, 3) / 4"
|
|
|
|
|
|
|
| 167 |
},
|
| 168 |
+
"bindings": [
|
| 169 |
+
"x_2",
|
| 170 |
+
{ "arg": "y", "elementType": "$yVec4" },
|
| 171 |
+
{ "name": "params", "struct": [{ "name": "tileCount", "type": "u32", "value": "numel(shapes.y) / 4" }] }
|
| 172 |
+
],
|
| 173 |
+
"dispatch": {
|
| 174 |
+
"x": "min(ceilDiv((numel(shapes.y) / 4), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 175 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y) / 4), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 176 |
+
"z": 1
|
| 177 |
+
}
|
| 178 |
}
|
| 179 |
]
|
| 180 |
},
|
| 181 |
{
|
| 182 |
"id": "nchw2d_k2s2_vec4",
|
| 183 |
"priority": 30,
|
| 184 |
+
"when": ["not present.indices", "f16Ok(dtypes.T)", "poolShapeOk", "ranks.x == 4", "ranks.y == 4", "kernelH == 2", "kernelW == 2", "strideH == 2", "strideW == 2", "dilationH == 1", "dilationW == 1", "padTop == 0", "padLeft == 0", "padBottom == 0", "padRight == 0", "attrs.ceil_mode == 0", "dim(shapes.x, 3) % 4 == 0", "dim(shapes.y, 0) == dim(shapes.x, 0)", "dim(shapes.y, 1) == dim(shapes.x, 1)", "dim(shapes.y, 2) == floor(dim(shapes.x, 2) / 2)", "dim(shapes.y, 3) == floor(dim(shapes.x, 3) / 2)", "dim(shapes.y, 2) > 0", "dim(shapes.y, 3) > 0"],
|
| 185 |
+
"derive": { "scalar": "dtypes.T", "xVec4": "\"vec4<f16>\" if dtypes.T == \"f16\" else \"vec4<f32>\"" },
|
|
|
|
|
|
|
|
|
|
|
|
|
| 186 |
"passes": [
|
| 187 |
{
|
| 188 |
"id": "main",
|
| 189 |
"name": "MaxPool.Nchw2dK2s2Vec4",
|
| 190 |
+
"shader": "pool2d-nchw-k2s2-vec4.wgsl.jinja",
|
| 191 |
+
"derive": {
|
| 192 |
+
"op": "\"max\"",
|
| 193 |
+
"outH": "dim(shapes.y, 2)",
|
| 194 |
+
"outW": "dim(shapes.y, 3)",
|
| 195 |
+
"outWHalf": "floor(dim(shapes.y, 3) / 2)",
|
| 196 |
+
"inWVec4": "floor(dim(shapes.x, 3) / 4)",
|
| 197 |
+
"inPlaneVec4": "floor(dim(shapes.x, 2) * dim(shapes.x, 3) / 4)"
|
|
|
|
|
|
|
| 198 |
},
|
| 199 |
+
"bindings": [
|
| 200 |
+
"x_2",
|
| 201 |
+
"y",
|
| 202 |
+
{ "name": "params", "struct": [{ "name": "tileCount", "type": "u32", "value": "numel(shapes.y) / 2" }] }
|
| 203 |
+
],
|
| 204 |
+
"dispatch": {
|
| 205 |
+
"x": "min(ceilDiv((numel(shapes.y) / 2), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 206 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y) / 2), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 207 |
+
"z": 1
|
| 208 |
+
}
|
| 209 |
}
|
| 210 |
]
|
| 211 |
},
|
| 212 |
{
|
| 213 |
"id": "nchw2d_unrolled",
|
| 214 |
"priority": 25,
|
| 215 |
+
"when": ["not present.indices", "floatDtypeOk", "poolShapeOk", "ranks.x == 4", "ranks.y == 4", "dim(shapes.y, 0) == dim(shapes.x, 0)", "dim(shapes.y, 1) == dim(shapes.x, 1)", "dim(shapes.y, 2) == explicitOutH", "dim(shapes.y, 3) == explicitOutW", "kernelH >= 1", "kernelH <= 3", "kernelW >= 1", "kernelW <= 3", "strideH >= 1", "strideW >= 1", "dilationH >= 1", "dilationW >= 1", "dim(shapes.y, 2) > 0", "dim(shapes.y, 3) > 0"],
|
| 216 |
+
"derive": { "scalar": "dtypes.T" },
|
| 217 |
"passes": [
|
| 218 |
{
|
| 219 |
"id": "main",
|
| 220 |
"name": "MaxPool.Nchw2dUnrolled",
|
| 221 |
+
"shader": "pool-window-unroll.wgsl.jinja",
|
| 222 |
+
"derive": {
|
| 223 |
+
"op": "\"max\"",
|
| 224 |
+
"kernelHSpec": "kernelH",
|
| 225 |
+
"kernelWSpec": "kernelW",
|
| 226 |
+
"strideHSpec": "strideH",
|
| 227 |
+
"strideWSpec": "strideW",
|
| 228 |
+
"dilationHSpec": "dilationH",
|
| 229 |
+
"dilationWSpec": "dilationW",
|
| 230 |
+
"padTopSpec": "padTop",
|
| 231 |
+
"padLeftSpec": "padLeft",
|
| 232 |
+
"inH": "dim(shapes.x, 2)",
|
| 233 |
+
"inW": "dim(shapes.x, 3)",
|
| 234 |
+
"outH": "dim(shapes.y, 2)",
|
| 235 |
+
"outW": "dim(shapes.y, 3)"
|
|
|
|
|
|
|
| 236 |
},
|
| 237 |
+
"bindings": [
|
| 238 |
+
"x",
|
| 239 |
+
"y",
|
| 240 |
+
{ "name": "params", "struct": [{ "name": "count", "type": "u32", "value": "numel(shapes.y)" }] }
|
| 241 |
+
],
|
| 242 |
+
"dispatch": {
|
| 243 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 244 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 245 |
+
"z": 1
|
| 246 |
+
}
|
| 247 |
}
|
| 248 |
]
|
| 249 |
},
|
| 250 |
{
|
| 251 |
"id": "ncl1d_k2s2_x4",
|
| 252 |
"priority": 30,
|
| 253 |
+
"when": ["not present.indices", "floatDtypeOk", "poolShapeOk", "ranks.x == 3", "attrs.auto_pad == \"NOTSET\"", "kernelW == 2", "strideW == 2", "dilationW == 1", "padLeft == 0", "padRight == 0", "attrs.ceil_mode == 0", "dim(shapes.x, 2) % 4 == 0", "dim(shapes.y, 2) % 4 == 0", "dim(shapes.y, 2) * 2 == dim(shapes.x, 2)"],
|
| 254 |
+
"derive": { "scalar": "dtypes.T", "xVec4": "\"vec4<f16>\" if dtypes.T == \"f16\" else \"vec4<f32>\"" },
|
|
|
|
|
|
|
|
|
|
|
|
|
| 255 |
"passes": [
|
| 256 |
{
|
| 257 |
"id": "main",
|
| 258 |
"name": "MaxPool.Ncl1dK2s2X4",
|
| 259 |
+
"shader": "pool-ncl1d-x4.wgsl.jinja",
|
| 260 |
+
"derive": { "op": "\"max\"", "inW": "dim(shapes.x, 2)", "outW": "dim(shapes.y, 2)" },
|
| 261 |
+
"bindings": [
|
| 262 |
+
"x_2",
|
| 263 |
+
"y",
|
| 264 |
+
{
|
| 265 |
+
"name": "params",
|
| 266 |
+
"struct": [
|
| 267 |
+
{
|
| 268 |
+
"name": "blockCount",
|
| 269 |
+
"type": "u32",
|
| 270 |
+
"value": "dim(shapes.x, 0) * dim(shapes.x, 1) * ceilDiv(dim(shapes.y, 2), 4)"
|
| 271 |
+
}
|
| 272 |
+
]
|
| 273 |
+
}
|
| 274 |
+
],
|
| 275 |
"dispatch": {
|
| 276 |
+
"x": "min(ceilDiv((dim(shapes.x, 0) * dim(shapes.x, 1) * ceilDiv(dim(shapes.y, 2), 4)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 277 |
+
"y": "ceilDiv(ceilDiv((dim(shapes.x, 0) * dim(shapes.x, 1) * ceilDiv(dim(shapes.y, 2), 4)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 278 |
+
"z": 1
|
| 279 |
}
|
| 280 |
}
|
| 281 |
]
|
|
|
|
| 283 |
{
|
| 284 |
"id": "ncl1d",
|
| 285 |
"priority": 10,
|
| 286 |
+
"when": ["not present.indices", "f16Ok(dtypes.T)", "poolShapeOk", "ranks.x == 3", "dim(shapes.y, 2) == inferredOutW"],
|
| 287 |
+
"derive": { "scalar": "dtypes.T", "hasIndices": false },
|
| 288 |
"passes": [
|
| 289 |
{
|
| 290 |
"id": "main",
|
| 291 |
"name": "MaxPool.Ncl1d",
|
| 292 |
+
"shader": "pool-window-nd.wgsl.jinja",
|
| 293 |
+
"derive": { "op": "\"max\"", "spatialRankSpec": 1 },
|
| 294 |
+
"bindings": ["x", "y", "params"],
|
| 295 |
+
"dispatch": {
|
| 296 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 297 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 298 |
+
"z": 1
|
| 299 |
+
}
|
| 300 |
}
|
| 301 |
]
|
| 302 |
},
|
| 303 |
{
|
| 304 |
"id": "nchw2d_uint8",
|
| 305 |
"priority": 20,
|
| 306 |
+
"when": ["not present.indices", "tensorDtypes.x == \"uint8\"", "tensorDtypes.y == \"uint8\"", "poolShapeOk", "ranks.x == 4", "dim(shapes.y, 2) == explicitOutH", "dim(shapes.y, 3) == explicitOutW"],
|
| 307 |
"passes": [
|
| 308 |
{
|
| 309 |
"id": "main",
|
| 310 |
"name": "nchw2d_uint8",
|
| 311 |
"shader": "max-pool2d-nchw-u32.wgsl.jinja",
|
| 312 |
+
"bindings": ["x", "y", "params_7"],
|
| 313 |
+
"dispatch": {
|
| 314 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 315 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 316 |
+
"z": 1
|
| 317 |
+
}
|
| 318 |
}
|
| 319 |
]
|
| 320 |
},
|
| 321 |
{
|
| 322 |
"id": "nchw2d_separable",
|
| 323 |
"priority": 22,
|
| 324 |
+
"when": ["not present.indices", "f16Ok(dtypes.T) and dtypes.T != \"u32\"", "poolShapeOk", "ranks.x == 4", "ranks.y == 4", "pool2dOutputShapeOk", "kernelH > 1", "kernelW > 1", "kernelH * kernelW >= tunables.SEPARABLE_MIN_WINDOW", "strideH < kernelH", "separableFits"],
|
| 325 |
+
"derive": { "scalar": "dtypes.T", "pIs1": false, "pIs2": false },
|
| 326 |
"intermediates": [{ "id": "tmp", "dtype": "float32", "shape": "[separableTmpElements]" }],
|
| 327 |
"passes": [
|
| 328 |
{
|
| 329 |
"id": "reduce_w",
|
| 330 |
"name": "MaxPool.SeparableW",
|
| 331 |
+
"shader": "pool2d-nchw-separable.wgsl.jinja",
|
| 332 |
+
"derive": { "axisSpec": "\"w\"", "op": "\"max\"", "windowArea": "kernelH * kernelW" },
|
| 333 |
+
"bindings": [
|
| 334 |
+
"x",
|
| 335 |
+
{ "name": "tmp", "buffer": "storage", "elementType": "f32" },
|
| 336 |
+
{
|
| 337 |
+
"name": "params",
|
| 338 |
+
"struct": [
|
| 339 |
+
{ "name": "inH", "type": "u32", "value": "dim(shapes.x, 2)" },
|
| 340 |
+
{ "name": "inW", "type": "u32", "value": "dim(shapes.x, 3)" },
|
| 341 |
+
{ "name": "outW", "type": "u32", "value": "dim(shapes.y, 3)" },
|
| 342 |
+
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 343 |
+
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 344 |
+
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 345 |
+
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 346 |
+
{
|
| 347 |
+
"name": "tmpCount",
|
| 348 |
+
"type": "u32",
|
| 349 |
+
"value": "dim(shapes.x, 0) * dim(shapes.x, 1) * dim(shapes.x, 2) * dim(shapes.y, 3)"
|
| 350 |
+
}
|
| 351 |
+
]
|
| 352 |
+
}
|
| 353 |
+
],
|
| 354 |
+
"dispatch": {
|
| 355 |
+
"x": "min(ceilDiv((separableTmpElements), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 356 |
+
"y": "ceilDiv(ceilDiv((separableTmpElements), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 357 |
+
"z": 1
|
| 358 |
+
}
|
| 359 |
},
|
| 360 |
{
|
| 361 |
"id": "reduce_h",
|
| 362 |
"name": "MaxPool.SeparableH",
|
| 363 |
+
"shader": "pool2d-nchw-separable.wgsl.jinja",
|
| 364 |
+
"derive": { "axisSpec": "\"h\"", "op": "\"max\"", "windowArea": "kernelH * kernelW" },
|
| 365 |
+
"bindings": [
|
| 366 |
+
{ "name": "tmp", "buffer": "read-only-storage", "elementType": "f32" },
|
| 367 |
+
"y",
|
| 368 |
+
{
|
| 369 |
+
"name": "params",
|
| 370 |
+
"struct": [
|
| 371 |
+
{ "name": "inH", "type": "u32", "value": "dim(shapes.x, 2)" },
|
| 372 |
+
{ "name": "inW", "type": "u32", "value": "dim(shapes.x, 3)" },
|
| 373 |
+
{ "name": "outH", "type": "u32", "value": "dim(shapes.y, 2)" },
|
| 374 |
+
{ "name": "outW", "type": "u32", "value": "dim(shapes.y, 3)" },
|
| 375 |
+
{ "name": "kernelH", "type": "u32", "value": "kernelH" },
|
| 376 |
+
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 377 |
+
{ "name": "strideH", "type": "u32", "value": "strideH" },
|
| 378 |
+
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 379 |
+
{ "name": "dilationH", "type": "u32", "value": "dilationH" },
|
| 380 |
+
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 381 |
+
{ "name": "padH", "type": "i32", "value": "effectivePadH" },
|
| 382 |
+
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 383 |
+
{ "name": "count", "type": "u32", "value": "numel(shapes.y)" }
|
| 384 |
+
]
|
| 385 |
+
}
|
| 386 |
+
],
|
| 387 |
+
"dispatch": {
|
| 388 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 389 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 390 |
+
"z": 1
|
| 391 |
+
}
|
| 392 |
}
|
| 393 |
]
|
| 394 |
},
|
| 395 |
{
|
| 396 |
"id": "nchw2d",
|
| 397 |
+
"when": ["not present.indices", "f16Ok(dtypes.T) and dtypes.T != \"u32\"", "poolShapeOk", "ranks.x == 4", "pool2dOutputShapeOk"],
|
| 398 |
+
"derive": { "scalar": "dtypes.T", "hasIndices": false },
|
| 399 |
"passes": [
|
| 400 |
{
|
| 401 |
"id": "main",
|
| 402 |
"name": "nchw2d",
|
| 403 |
+
"shader": "pool-window-nd.wgsl.jinja",
|
| 404 |
+
"derive": { "op": "\"max\"", "spatialRankSpec": 2 },
|
| 405 |
+
"bindings": ["x", "y", "params_7"],
|
| 406 |
+
"dispatch": {
|
| 407 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 408 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 409 |
+
"z": 1
|
| 410 |
+
}
|
| 411 |
}
|
| 412 |
]
|
| 413 |
},
|
| 414 |
{
|
| 415 |
"id": "ncdhw3d_k5s1_tiled",
|
| 416 |
"priority": 20,
|
| 417 |
+
"when": ["not present.indices", "dtypes.T == \"f32\"", "poolShapeOk", "ranks.x == 5", "attrs.auto_pad == \"NOTSET\"", "kernelD == 5 and kernelH == 5 and kernelW == 5", "strideD == 1 and strideH == 1 and strideW == 1", "dilationD == 1 and dilationH == 1 and dilationW == 1", "padFront == 2 and padTop == 2 and padLeft == 2 and padBack == 2 and padBottom == 2 and padRight == 2", "attrs.ceil_mode == 0", "dim(shapes.y, 2) == dim(shapes.x, 2)", "dim(shapes.y, 3) == dim(shapes.x, 3)", "dim(shapes.y, 4) == dim(shapes.x, 4)", "dim(shapes.y, 2) >= tunables.TILED_D", "dim(shapes.y, 3) >= tunables.TILED_H", "dim(shapes.y, 4) >= tunables.TILED_W", "tiledDeviceOk", "tiledDispatchOk"],
|
| 418 |
"passes": [
|
| 419 |
{
|
| 420 |
"id": "main",
|
| 421 |
"name": "MaxPool.Ncdhw3dK5s1Tiled",
|
| 422 |
"shader": "max-pool3d-ncdhw-k5-tiled.wgsl.jinja",
|
| 423 |
+
"bindings": [
|
| 424 |
+
{ "arg": "x", "elementType": "f32" },
|
| 425 |
+
{ "arg": "y", "elementType": "f32" },
|
| 426 |
+
{
|
| 427 |
+
"name": "params",
|
| 428 |
+
"struct": [
|
| 429 |
+
{ "name": "inD", "type": "u32", "value": "dim(shapes.x, 2)" },
|
| 430 |
+
{ "name": "inH", "type": "u32", "value": "dim(shapes.x, 3)" },
|
| 431 |
+
{ "name": "inW", "type": "u32", "value": "dim(shapes.x, 4)" },
|
| 432 |
+
{ "name": "outD", "type": "u32", "value": "dim(shapes.y, 2)" },
|
| 433 |
+
{ "name": "outH", "type": "u32", "value": "dim(shapes.y, 3)" },
|
| 434 |
+
{ "name": "outW", "type": "u32", "value": "dim(shapes.y, 4)" }
|
| 435 |
+
]
|
| 436 |
+
}
|
| 437 |
+
],
|
| 438 |
"dispatch": {
|
| 439 |
+
"x": "ceilDiv(dim(shapes.y, 4), tunables.TILED_W)",
|
| 440 |
+
"y": "ceilDiv(dim(shapes.y, 3), tunables.TILED_H)",
|
| 441 |
+
"z": "dim(shapes.x, 0) * dim(shapes.x, 1) * ceilDiv(dim(shapes.y, 2), tunables.TILED_D)"
|
| 442 |
}
|
| 443 |
}
|
| 444 |
]
|
|
|
|
| 446 |
{
|
| 447 |
"id": "ncdhw3d",
|
| 448 |
"priority": 10,
|
| 449 |
+
"when": ["not present.indices", "floatDtypeOk", "poolShapeOk", "ranks.x == 5", "dim(shapes.y, 2) == inferredOutD", "dim(shapes.y, 3) == inferredOutH", "dim(shapes.y, 4) == inferredOutW"],
|
| 450 |
"supersededBy": ["global_window_parallel"],
|
| 451 |
+
"derive": { "scalar": "dtypes.T" },
|
|
|
|
| 452 |
"passes": [
|
| 453 |
{
|
| 454 |
"id": "main",
|
| 455 |
"name": "MaxPool.Ncdhw3d",
|
| 456 |
+
"shader": "pool-window-nd.wgsl.jinja",
|
| 457 |
+
"derive": { "op": "\"max\"", "spatialRankSpec": 3 },
|
| 458 |
+
"bindings": [
|
| 459 |
+
"x",
|
| 460 |
+
"y",
|
| 461 |
+
{
|
| 462 |
+
"name": "params",
|
| 463 |
+
"struct": [
|
| 464 |
+
{ "name": "channels", "type": "u32", "value": "dim(shapes.x, 1)" },
|
| 465 |
+
{ "name": "inD", "type": "u32", "value": "dim(shapes.x, 2)" },
|
| 466 |
+
{ "name": "inH", "type": "u32", "value": "dim(shapes.x, 3)" },
|
| 467 |
+
{ "name": "inW", "type": "u32", "value": "dim(shapes.x, 4)" },
|
| 468 |
+
{ "name": "outD", "type": "u32", "value": "dim(shapes.y, 2)" },
|
| 469 |
+
{ "name": "outH", "type": "u32", "value": "dim(shapes.y, 3)" },
|
| 470 |
+
{ "name": "outW", "type": "u32", "value": "dim(shapes.y, 4)" },
|
| 471 |
+
{ "name": "kernelD", "type": "u32", "value": "kernelD" },
|
| 472 |
+
{ "name": "kernelH", "type": "u32", "value": "kernelH" },
|
| 473 |
+
{ "name": "kernelW", "type": "u32", "value": "kernelW" },
|
| 474 |
+
{ "name": "strideD", "type": "u32", "value": "strideD" },
|
| 475 |
+
{ "name": "strideH", "type": "u32", "value": "strideH" },
|
| 476 |
+
{ "name": "strideW", "type": "u32", "value": "strideW" },
|
| 477 |
+
{ "name": "dilationD", "type": "u32", "value": "dilationD" },
|
| 478 |
+
{ "name": "dilationH", "type": "u32", "value": "dilationH" },
|
| 479 |
+
{ "name": "dilationW", "type": "u32", "value": "dilationW" },
|
| 480 |
+
{ "name": "padD", "type": "i32", "value": "effectivePadD" },
|
| 481 |
+
{ "name": "padH", "type": "i32", "value": "effectivePadH" },
|
| 482 |
+
{ "name": "padW", "type": "i32", "value": "effectivePadW" },
|
| 483 |
+
{ "name": "count", "type": "u32", "value": "numel(shapes.y)" }
|
| 484 |
+
]
|
| 485 |
+
}
|
| 486 |
+
],
|
| 487 |
+
"dispatch": {
|
| 488 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 489 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 490 |
+
"z": 1
|
| 491 |
+
}
|
| 492 |
}
|
| 493 |
]
|
| 494 |
},
|
| 495 |
{
|
| 496 |
"id": "ncl1d_indices",
|
| 497 |
"priority": 15,
|
| 498 |
+
"when": ["present.indices", "f16Ok(dtypes.T)", "poolShapeOk", "ranks.x == 3", "dim(shapes.y, 2) == inferredOutW"],
|
| 499 |
+
"derive": { "scalar": "dtypes.T", "hasIndices": true },
|
| 500 |
"passes": [
|
| 501 |
{
|
| 502 |
"id": "main",
|
| 503 |
"name": "MaxPool.Ncl1dIndices",
|
| 504 |
+
"shader": "pool-window-nd.wgsl.jinja",
|
| 505 |
+
"derive": { "op": "\"max\"", "spatialRankSpec": 1 },
|
| 506 |
+
"bindings": ["x", "y", "indices", "params"],
|
| 507 |
+
"dispatch": {
|
| 508 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 509 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 510 |
+
"z": 1
|
| 511 |
+
}
|
| 512 |
}
|
| 513 |
]
|
| 514 |
},
|
| 515 |
{
|
| 516 |
"id": "nchw2d_uint8_indices",
|
| 517 |
"priority": 16,
|
| 518 |
+
"when": ["present.indices", "tensorDtypes.x == \"uint8\"", "tensorDtypes.y == \"uint8\"", "poolShapeOk", "ranks.x == 4", "dim(shapes.y, 2) == explicitOutH", "dim(shapes.y, 3) == explicitOutW"],
|
| 519 |
+
"derive": { "scalar": "\"u32\"", "hasIndices": true, "storageOrder": "attrs.storage_order" },
|
| 520 |
"passes": [
|
| 521 |
{
|
| 522 |
"id": "main",
|
| 523 |
"name": "MaxPool.Nchw2dUint8Indices",
|
| 524 |
+
"shader": "pool-window-nd.wgsl.jinja",
|
| 525 |
+
"derive": { "op": "\"max\"", "spatialRankSpec": 2 },
|
| 526 |
+
"bindings": ["x", "y", "indices", "params_7"],
|
| 527 |
+
"dispatch": {
|
| 528 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 529 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 530 |
+
"z": 1
|
| 531 |
+
}
|
| 532 |
}
|
| 533 |
]
|
| 534 |
},
|
| 535 |
{
|
| 536 |
"id": "nchw2d_indices",
|
| 537 |
+
"priority": 15,
|
| 538 |
+
"when": ["present.indices", "f16Ok(dtypes.T) and dtypes.T != \"u32\"", "poolShapeOk", "ranks.x == 4", "pool2dOutputShapeOk"],
|
| 539 |
+
"derive": { "scalar": "dtypes.T", "hasIndices": true, "storageOrder": "attrs.storage_order" },
|
|
|
|
|
|
|
|
|
|
|
|
|
| 540 |
"passes": [
|
| 541 |
{
|
| 542 |
"id": "main",
|
| 543 |
"name": "MaxPool.Nchw2dIndices",
|
| 544 |
+
"shader": "pool-window-nd.wgsl.jinja",
|
| 545 |
+
"derive": { "op": "\"max\"", "spatialRankSpec": 2 },
|
| 546 |
+
"bindings": ["x", "y", "indices", "params_7"],
|
| 547 |
+
"dispatch": {
|
| 548 |
+
"x": "min(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 549 |
+
"y": "ceilDiv(ceilDiv((numel(shapes.y)), (tunables.WORKGROUP_SIZE)), 65535)",
|
| 550 |
+
"z": 1
|
| 551 |
+
}
|
| 552 |
}
|
| 553 |
+
]
|
|
|
|
| 554 |
}
|
| 555 |
]
|
| 556 |
}
|
build/webgpu/max-pool2d-nchw-k3s2p1-vec4.wgsl.jinja
CHANGED
|
@@ -4,16 +4,16 @@
|
|
| 4 |
// row, and the output is committed with one vec4 store.
|
| 5 |
//
|
| 6 |
// The first loaded vector normally contributes only its final lane. At the left
|
| 7 |
-
// edge that lane is padding, so the load is skipped.
|
| 8 |
-
//
|
| 9 |
enable f16;
|
| 10 |
{{ env.wgsl.resourceDeclarations }}
|
| 11 |
|
| 12 |
-
const IN_H: i32 = {{
|
| 13 |
-
const IN_W_VEC4: u32 = {{
|
| 14 |
-
const IN_PLANE_VEC4: u32 = {{
|
| 15 |
-
const OUT_H: u32 = {{
|
| 16 |
-
const OUT_BLOCKS: u32 = {{
|
| 17 |
|
| 18 |
fn negative_infinity() -> f32 {
|
| 19 |
var bits = 0xff800000u;
|
|
@@ -72,10 +72,9 @@ fn combine_rows(a: vec4<f32>, b: vec4<f32>) -> vec4<f32> {
|
|
| 72 |
|
| 73 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 74 |
fn main(
|
| 75 |
-
@builtin(global_invocation_id) gid: vec3<u32>
|
| 76 |
-
@builtin(num_workgroups) nwg: vec3<u32>
|
| 77 |
) {
|
| 78 |
-
let tile = gid.x + gid.y *
|
| 79 |
if (tile >= params.tileCount) {
|
| 80 |
return;
|
| 81 |
}
|
|
|
|
| 4 |
// row, and the output is committed with one vec4 store.
|
| 5 |
//
|
| 6 |
// The first loaded vector normally contributes only its final lane. At the left
|
| 7 |
+
// edge that lane is padding, so the load is skipped. A NaN in any selected input
|
| 8 |
+
// propagates to the corresponding output lane.
|
| 9 |
enable f16;
|
| 10 |
{{ env.wgsl.resourceDeclarations }}
|
| 11 |
|
| 12 |
+
const IN_H: i32 = {{ inH }};
|
| 13 |
+
const IN_W_VEC4: u32 = {{ inWVec4 }}u;
|
| 14 |
+
const IN_PLANE_VEC4: u32 = {{ inPlaneVec4 }}u;
|
| 15 |
+
const OUT_H: u32 = {{ outH }}u;
|
| 16 |
+
const OUT_BLOCKS: u32 = {{ outBlocks }}u;
|
| 17 |
|
| 18 |
fn negative_infinity() -> f32 {
|
| 19 |
var bits = 0xff800000u;
|
|
|
|
| 72 |
|
| 73 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 74 |
fn main(
|
| 75 |
+
@builtin(global_invocation_id) gid: vec3<u32>
|
|
|
|
| 76 |
) {
|
| 77 |
+
let tile = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 78 |
if (tile >= params.tileCount) {
|
| 79 |
return;
|
| 80 |
}
|
build/webgpu/max-pool2d-nchw-u32.wgsl.jinja
CHANGED
|
@@ -1,10 +1,10 @@
|
|
| 1 |
{{ env.wgsl.resourceDeclarations }}
|
| 2 |
|
| 3 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 4 |
-
fn main(@builtin(global_invocation_id) gid: vec3<u32>
|
| 5 |
// 2D-folded flat index: gid.y carries the high bits past the
|
| 6 |
-
//
|
| 7 |
-
let index = gid.x + gid.y *
|
| 8 |
if (index >= params.count) {
|
| 9 |
return;
|
| 10 |
}
|
|
|
|
| 1 |
{{ env.wgsl.resourceDeclarations }}
|
| 2 |
|
| 3 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 4 |
+
fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
|
| 5 |
// 2D-folded flat index: gid.y carries the high bits past the
|
| 6 |
+
// per-axis dispatch fold width (outputs > 16.7M elements).
|
| 7 |
+
let index = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 8 |
if (index >= params.count) {
|
| 9 |
return;
|
| 10 |
}
|
build/webgpu/metadata.json
CHANGED
|
@@ -1,26 +1,44 @@
|
|
| 1 |
{
|
| 2 |
"name": "ai.onnx.MaxPool",
|
| 3 |
-
"id": "
|
| 4 |
"version": 1,
|
| 5 |
"license": "Apache-2.0",
|
| 6 |
"backend": { "type": "webgpu" },
|
| 7 |
"digest": {
|
| 8 |
"algorithm": "sha256",
|
| 9 |
"files": {
|
| 10 |
-
"bench.json": "
|
| 11 |
-
"manifest.json": "
|
| 12 |
-
"max-pool2d-nchw-k3s2p1-vec4.wgsl.jinja": "
|
| 13 |
-
"max-pool2d-nchw-u32.wgsl.jinja": "
|
| 14 |
"max-pool3d-ncdhw-k5-tiled.wgsl.jinja": "Zwv1VailOkU7xlslNrbnUz9zyTXUSPGefhG71ybRVIk=",
|
| 15 |
-
"pool-global-reduction.wgsl.jinja": "
|
| 16 |
-
"pool-ncl1d-x4.wgsl.jinja": "
|
| 17 |
-
"pool-window-nd.wgsl.jinja": "
|
| 18 |
-
"pool-window-unroll.wgsl.jinja": "
|
| 19 |
-
"pool2d-nchw-k2s2-vec4.wgsl.jinja": "
|
| 20 |
-
"pool2d-nchw-separable.wgsl.jinja": "
|
| 21 |
-
"test.json": "
|
| 22 |
}
|
| 23 |
},
|
| 24 |
-
"provenance": { "kernel": { "sha": "
|
| 25 |
-
"webgpu": {
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 26 |
}
|
|
|
|
| 1 |
{
|
| 2 |
"name": "ai.onnx.MaxPool",
|
| 3 |
+
"id": "_ai_onnx_maxpool_webgpu_0edff93",
|
| 4 |
"version": 1,
|
| 5 |
"license": "Apache-2.0",
|
| 6 |
"backend": { "type": "webgpu" },
|
| 7 |
"digest": {
|
| 8 |
"algorithm": "sha256",
|
| 9 |
"files": {
|
| 10 |
+
"bench.json": "AOgKxSadb2wkwmpf8SkHhMdwM1IpGC/TbJxTvDQZdNQ=",
|
| 11 |
+
"manifest.json": "5TTbqWe4MvoPE69DBi3YswL01bPFczoJuMndbfJkd2Q=",
|
| 12 |
+
"max-pool2d-nchw-k3s2p1-vec4.wgsl.jinja": "NhbuTmSlBus0wOCYKCGshztjvOa5Ql6fscn6l5+9plc=",
|
| 13 |
+
"max-pool2d-nchw-u32.wgsl.jinja": "iLeF9bnjdoEU7ZeANJl9SED9RLEjB3Uo1/0MR5ktRCI=",
|
| 14 |
"max-pool3d-ncdhw-k5-tiled.wgsl.jinja": "Zwv1VailOkU7xlslNrbnUz9zyTXUSPGefhG71ybRVIk=",
|
| 15 |
+
"pool-global-reduction.wgsl.jinja": "d0Kc8mGbdDfI0PElsqLqjpnRqfyQeaS5LqSO/f8tfTM=",
|
| 16 |
+
"pool-ncl1d-x4.wgsl.jinja": "wADuoaBQjOxDwie14Tmpl/I5T6TzYIKKjepOAPZNwEE=",
|
| 17 |
+
"pool-window-nd.wgsl.jinja": "FtY2LWLhpfgAj3ye2GP+8uez3BF7qpIncbH7yX+bauo=",
|
| 18 |
+
"pool-window-unroll.wgsl.jinja": "/7wF7g88WmvgGS45Lg8NikpwzGdUoIX7VkTGRWjQy9w=",
|
| 19 |
+
"pool2d-nchw-k2s2-vec4.wgsl.jinja": "9LgEqP1IYbTszmUOHFYrIPpobfhunkVDsVITvSPdn58=",
|
| 20 |
+
"pool2d-nchw-separable.wgsl.jinja": "1v8HRM4mORp/jBxY1NUObJ3vjeV5fgR6PD3mBSmyIUM=",
|
| 21 |
+
"test.json": "1TZGbirb+TNnfoZRenB4AaQ1b5pqHnIrKUf9SGrs/Ac="
|
| 22 |
}
|
| 23 |
},
|
| 24 |
+
"provenance": { "kernel": { "sha": "91d990483a174128daf7673f3f37a7c890493ae1", "dirty": false } },
|
| 25 |
+
"webgpu": {
|
| 26 |
+
"manifestSpec": "2.0",
|
| 27 |
+
"variants": {
|
| 28 |
+
"global_window_parallel": ["pool-global-reduction.wgsl.jinja"],
|
| 29 |
+
"nchw2d_k3s2p1_vec4": ["max-pool2d-nchw-k3s2p1-vec4.wgsl.jinja"],
|
| 30 |
+
"nchw2d_k2s2_vec4": ["pool2d-nchw-k2s2-vec4.wgsl.jinja"],
|
| 31 |
+
"nchw2d_unrolled": ["pool-window-unroll.wgsl.jinja"],
|
| 32 |
+
"ncl1d_k2s2_x4": ["pool-ncl1d-x4.wgsl.jinja"],
|
| 33 |
+
"ncl1d": ["pool-window-nd.wgsl.jinja"],
|
| 34 |
+
"nchw2d_uint8": ["max-pool2d-nchw-u32.wgsl.jinja"],
|
| 35 |
+
"nchw2d_separable": ["pool2d-nchw-separable.wgsl.jinja"],
|
| 36 |
+
"nchw2d": ["pool-window-nd.wgsl.jinja"],
|
| 37 |
+
"ncdhw3d_k5s1_tiled": ["max-pool3d-ncdhw-k5-tiled.wgsl.jinja"],
|
| 38 |
+
"ncdhw3d": ["pool-window-nd.wgsl.jinja"],
|
| 39 |
+
"ncl1d_indices": ["pool-window-nd.wgsl.jinja"],
|
| 40 |
+
"nchw2d_uint8_indices": ["pool-window-nd.wgsl.jinja"],
|
| 41 |
+
"nchw2d_indices": ["pool-window-nd.wgsl.jinja"]
|
| 42 |
+
}
|
| 43 |
+
}
|
| 44 |
}
|
build/webgpu/pool-global-reduction.wgsl.jinja
CHANGED
|
@@ -1,7 +1,4 @@
|
|
| 1 |
-
{% if
|
| 2 |
-
enable f16;
|
| 3 |
-
{% endif %}
|
| 4 |
-
{% if source.useSubgroups %}
|
| 5 |
enable subgroups;
|
| 6 |
{% endif %}
|
| 7 |
{{ env.wgsl.resourceDeclarations }}
|
|
@@ -9,17 +6,17 @@ enable subgroups;
|
|
| 9 |
// Workgroup-parallel global pooling: one workgroup reduces one contiguous
|
| 10 |
// (n, c) spatial plane (NC[D]HW layout makes the plane contiguous).
|
| 11 |
// Threads stride the plane (vec4 loads when the plane size is divisible by 4),
|
| 12 |
-
// then combine the per-thread partials. With subgroups: a subgroup collective
|
| 13 |
-
//
|
| 14 |
-
//
|
| 15 |
-
//
|
| 16 |
-
//
|
| 17 |
-
|
| 18 |
-
|
| 19 |
-
|
| 20 |
-
//
|
| 21 |
-
|
| 22 |
-
var<workgroup> wg_partials: array<f32,
|
| 23 |
{% else %}
|
| 24 |
var<workgroup> wg_tree: array<f32, WG>;
|
| 25 |
{% endif %}
|
|
@@ -28,7 +25,7 @@ fn negative_infinity() -> f32 {
|
|
| 28 |
var bits = 0xff800000u;
|
| 29 |
return bitcast<f32>(bits);
|
| 30 |
}
|
| 31 |
-
{% if
|
| 32 |
|
| 33 |
fn quiet_nan() -> f32 {
|
| 34 |
var bits = 0x7fc00000u;
|
|
@@ -54,23 +51,13 @@ fn max_propagate_nan(a: f32, b: f32) -> f32 {
|
|
| 54 |
@compute @workgroup_size(WG)
|
| 55 |
fn main(@builtin(workgroup_id) wid: vec3<u32>,
|
| 56 |
@builtin(local_invocation_id) lid: vec3<u32>
|
| 57 |
-
{%- if
|
| 58 |
@builtin(subgroup_size) sg_size: u32
|
| 59 |
{%- endif %}) {
|
| 60 |
let plane = wid.x;
|
| 61 |
let tid = lid.x;
|
| 62 |
-
{% if source.useSubgroups %}
|
| 63 |
-
|
| 64 |
-
// Seed cross-subgroup slots with the reduction identity so unwritten slots
|
| 65 |
-
// (when the workgroup has fewer than MAX_SUBGROUPS subgroups) are harmless.
|
| 66 |
-
if (tid < MAX_SUBGROUPS) {
|
| 67 |
-
wg_partials[tid] = negative_infinity();
|
| 68 |
-
}
|
| 69 |
-
workgroupBarrier();
|
| 70 |
-
|
| 71 |
-
{% endif %}
|
| 72 |
var partial = negative_infinity();
|
| 73 |
-
{% if
|
| 74 |
let spatialVec = params.spatial / 4u;
|
| 75 |
let base = plane * spatialVec;
|
| 76 |
for (var i = tid; i < spatialVec; i = i + WG) {
|
|
@@ -88,21 +75,38 @@ fn main(@builtin(workgroup_id) wid: vec3<u32>,
|
|
| 88 |
}
|
| 89 |
{% endif %}
|
| 90 |
|
| 91 |
-
{% if
|
| 92 |
// subgroupMax does not propagate NaN; carry an explicit NaN flag alongside.
|
| 93 |
let lane_nan = is_nan_f32(partial);
|
| 94 |
let sg_nan = subgroupAny(lane_nan);
|
| 95 |
let sg_max = subgroupMax(select(partial, negative_infinity(), lane_nan));
|
| 96 |
-
|
| 97 |
-
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 98 |
}
|
| 99 |
-
workgroupBarrier();
|
| 100 |
if (tid == 0u) {
|
| 101 |
-
let nsg = min((WG + sg_size - 1u) / sg_size, MAX_SUBGROUPS);
|
| 102 |
-
var total = negative_infinity();
|
| 103 |
-
for (var i = 0u; i < nsg; i = i + 1u) {
|
| 104 |
-
total = max_propagate_nan(total, wg_partials[i]);
|
| 105 |
-
}
|
| 106 |
y[plane] = {{ scalar }}(total);
|
| 107 |
}
|
| 108 |
{% else %}
|
|
|
|
| 1 |
+
{% if useSubgroups %}
|
|
|
|
|
|
|
|
|
|
| 2 |
enable subgroups;
|
| 3 |
{% endif %}
|
| 4 |
{{ env.wgsl.resourceDeclarations }}
|
|
|
|
| 6 |
// Workgroup-parallel global pooling: one workgroup reduces one contiguous
|
| 7 |
// (n, c) spatial plane (NC[D]HW layout makes the plane contiguous).
|
| 8 |
// Threads stride the plane (vec4 loads when the plane size is divisible by 4),
|
| 9 |
+
// then combine the per-thread partials. With subgroups: a subgroup collective,
|
| 10 |
+
// then one shared-memory slot per invocation (the subgroup partial from its
|
| 11 |
+
// elected lane, the identity from every other lane) that every subgroup folds.
|
| 12 |
+
// Without subgroups, a full workgroup tree combines the per-thread partials.
|
| 13 |
+
// The fold propagates NaNs while taking the maximum.
|
| 14 |
+
const WG: u32 = {{ workgroupSizeSpec }}u;
|
| 15 |
+
{% if useSubgroups %}
|
| 16 |
+
// One slot per invocation: the cross-subgroup fold below indexes by
|
| 17 |
+
// local_invocation_id, never by a subgroup ordinal, so no subgroup width or
|
| 18 |
+
// partition can overflow or alias it.
|
| 19 |
+
var<workgroup> wg_partials: array<f32, WG>;
|
| 20 |
{% else %}
|
| 21 |
var<workgroup> wg_tree: array<f32, WG>;
|
| 22 |
{% endif %}
|
|
|
|
| 25 |
var bits = 0xff800000u;
|
| 26 |
return bitcast<f32>(bits);
|
| 27 |
}
|
| 28 |
+
{% if useSubgroups %}
|
| 29 |
|
| 30 |
fn quiet_nan() -> f32 {
|
| 31 |
var bits = 0x7fc00000u;
|
|
|
|
| 51 |
@compute @workgroup_size(WG)
|
| 52 |
fn main(@builtin(workgroup_id) wid: vec3<u32>,
|
| 53 |
@builtin(local_invocation_id) lid: vec3<u32>
|
| 54 |
+
{%- if useSubgroups %},
|
| 55 |
@builtin(subgroup_size) sg_size: u32
|
| 56 |
{%- endif %}) {
|
| 57 |
let plane = wid.x;
|
| 58 |
let tid = lid.x;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 59 |
var partial = negative_infinity();
|
| 60 |
+
{% if vec4 %}
|
| 61 |
let spatialVec = params.spatial / 4u;
|
| 62 |
let base = plane * spatialVec;
|
| 63 |
for (var i = tid; i < spatialVec; i = i + WG) {
|
|
|
|
| 75 |
}
|
| 76 |
{% endif %}
|
| 77 |
|
| 78 |
+
{% if useSubgroups %}
|
| 79 |
// subgroupMax does not propagate NaN; carry an explicit NaN flag alongside.
|
| 80 |
let lane_nan = is_nan_f32(partial);
|
| 81 |
let sg_nan = subgroupAny(lane_nan);
|
| 82 |
let sg_max = subgroupMax(select(partial, negative_infinity(), lane_nan));
|
| 83 |
+
var total = select(sg_max, quiet_nan(), sg_nan);
|
| 84 |
+
// Cross-subgroup fold that assumes nothing about which invocations share a
|
| 85 |
+
// subgroup, how many subgroups there are, or which of a subgroup's lanes are
|
| 86 |
+
// active: every invocation owns the slot at its own index, the elected lane
|
| 87 |
+
// publishes its subgroup partial there and every other lane publishes the
|
| 88 |
+
// reduction identity. Each subgroup then folds all WG slots — lane `rank`,
|
| 89 |
+
// its dense position among the active lanes, walks slots rank, rank + count,
|
| 90 |
+
// ... — and one more collective merges the lane partials, so every slot is
|
| 91 |
+
// merged exactly once at any legal width and partition. A one-subgroup
|
| 92 |
+
// workgroup skips shared memory entirely; that test reads the `subgroup_size`
|
| 93 |
+
// builtin, which is uniform, because a collective's result is not uniform to
|
| 94 |
+
// WGSL's analysis and may not guard a barrier.
|
| 95 |
+
if (sg_size != WG) {
|
| 96 |
+
let rank = subgroupExclusiveAdd(1u);
|
| 97 |
+
let count = subgroupAdd(1u);
|
| 98 |
+
wg_partials[tid] = select(negative_infinity(), total, rank == 0u);
|
| 99 |
+
workgroupBarrier();
|
| 100 |
+
var acc = negative_infinity();
|
| 101 |
+
for (var i = rank; i < WG; i = i + count) {
|
| 102 |
+
acc = max_propagate_nan(acc, wg_partials[i]);
|
| 103 |
+
}
|
| 104 |
+
let acc_nan = is_nan_f32(acc);
|
| 105 |
+
let fold_nan = subgroupAny(acc_nan);
|
| 106 |
+
let fold_max = subgroupMax(select(acc, negative_infinity(), acc_nan));
|
| 107 |
+
total = select(fold_max, quiet_nan(), fold_nan);
|
| 108 |
}
|
|
|
|
| 109 |
if (tid == 0u) {
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 110 |
y[plane] = {{ scalar }}(total);
|
| 111 |
}
|
| 112 |
{% else %}
|
build/webgpu/pool-ncl1d-x4.wgsl.jinja
CHANGED
|
@@ -1,14 +1,9 @@
|
|
| 1 |
-
{% if usesF16 %}
|
| 2 |
-
enable f16;
|
| 3 |
-
{% endif %}
|
| 4 |
{{ env.wgsl.resourceDeclarations }}
|
| 5 |
|
| 6 |
-
// Four adjacent NCL outputs per invocation for non-overlapping
|
| 7 |
-
//
|
| 8 |
-
|
| 9 |
-
|
| 10 |
-
const IN_W: u32 = {{ source.inW }}u;
|
| 11 |
-
const OUT_W: u32 = {{ source.outW }}u;
|
| 12 |
const BLOCKS_PER_PLANE: u32 = (OUT_W + 3u) / 4u;
|
| 13 |
|
| 14 |
fn is_nan_f32(value: f32) -> bool {
|
|
@@ -30,9 +25,8 @@ fn pair_max(a: f32, b: f32) -> f32 {
|
|
| 30 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 31 |
fn main(
|
| 32 |
@builtin(global_invocation_id) gid: vec3<u32>,
|
| 33 |
-
@builtin(num_workgroups) nwg: vec3<u32>,
|
| 34 |
) {
|
| 35 |
-
let block = gid.x + gid.y *
|
| 36 |
if (block >= params.blockCount) { return; }
|
| 37 |
|
| 38 |
let plane = block / BLOCKS_PER_PLANE;
|
|
|
|
|
|
|
|
|
|
|
|
|
| 1 |
{{ env.wgsl.resourceDeclarations }}
|
| 2 |
|
| 3 |
+
// Four adjacent NCL max-pool outputs per invocation for non-overlapping k2/s2
|
| 4 |
+
// windows. Two aligned vec4 input words contain all four windows.
|
| 5 |
+
const IN_W: u32 = {{ inW }}u;
|
| 6 |
+
const OUT_W: u32 = {{ outW }}u;
|
|
|
|
|
|
|
| 7 |
const BLOCKS_PER_PLANE: u32 = (OUT_W + 3u) / 4u;
|
| 8 |
|
| 9 |
fn is_nan_f32(value: f32) -> bool {
|
|
|
|
| 25 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 26 |
fn main(
|
| 27 |
@builtin(global_invocation_id) gid: vec3<u32>,
|
|
|
|
| 28 |
) {
|
| 29 |
+
let block = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 30 |
if (block >= params.blockCount) { return; }
|
| 31 |
|
| 32 |
let plane = block / BLOCKS_PER_PLANE;
|
build/webgpu/pool-window-nd.wgsl.jinja
CHANGED
|
@@ -1,9 +1,8 @@
|
|
| 1 |
-
{%
|
| 2 |
-
|
| 3 |
-
{% endif %}
|
| 4 |
{{ env.wgsl.resourceDeclarations }}
|
| 5 |
|
| 6 |
-
// Direct
|
| 7 |
fn negative_infinity() -> f32 {
|
| 8 |
var bits = 0xff800000u;
|
| 9 |
return bitcast<f32>(bits);
|
|
@@ -22,17 +21,17 @@ fn max_propagate_nan(a: f32, b: f32) -> f32 {
|
|
| 22 |
}
|
| 23 |
|
| 24 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 25 |
-
fn main(@builtin(global_invocation_id) gid: vec3<u32>
|
| 26 |
-
let index = gid.x + gid.y *
|
| 27 |
if (index >= params.count) { return; }
|
| 28 |
|
| 29 |
let ow = index % params.outW;
|
| 30 |
var t = index / params.outW;
|
| 31 |
-
{% if
|
| 32 |
let oh = t % params.outH;
|
| 33 |
t /= params.outH;
|
| 34 |
{% endif %}
|
| 35 |
-
{% if
|
| 36 |
let od = t % params.outD;
|
| 37 |
t /= params.outD;
|
| 38 |
{% endif %}
|
|
@@ -42,18 +41,18 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>, @builtin(num_workgroups)
|
|
| 42 |
var best = negative_infinity();
|
| 43 |
var seen = false;
|
| 44 |
{% if hasIndices %}
|
| 45 |
-
{% if
|
| 46 |
var bestIh = 0u;
|
| 47 |
{% endif %}
|
| 48 |
var bestIw = 0u;
|
| 49 |
{% endif %}
|
| 50 |
|
| 51 |
-
{% if
|
| 52 |
for (var kd = 0u; kd < params.kernelD; kd += 1u) {
|
| 53 |
let id = i32(od * params.strideD + kd * params.dilationD) - params.padD;
|
| 54 |
if (id < 0 || id >= i32(params.inD)) { continue; }
|
| 55 |
{% endif %}
|
| 56 |
-
{% if
|
| 57 |
for (var kh = 0u; kh < params.kernelH; kh += 1u) {
|
| 58 |
let ih = i32(oh * params.strideH + kh * params.dilationH) - params.padH;
|
| 59 |
if (ih < 0 || ih >= i32(params.inH)) { continue; }
|
|
@@ -61,9 +60,9 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>, @builtin(num_workgroups)
|
|
| 61 |
for (var kw = 0u; kw < params.kernelW; kw += 1u) {
|
| 62 |
let iw = i32(ow * params.strideW + kw * params.dilationW) - params.padW;
|
| 63 |
if (iw < 0 || iw >= i32(params.inW)) { continue; }
|
| 64 |
-
{% if
|
| 65 |
let xIndex = (batch * params.channels + channel) * params.inW + u32(iw);
|
| 66 |
-
{% elif
|
| 67 |
let xIndex = ((batch * params.channels + channel) * params.inH + u32(ih)) * params.inW + u32(iw);
|
| 68 |
{% else %}
|
| 69 |
let xIndex = (((batch * params.channels + channel) * params.inD + u32(id)) * params.inH + u32(ih)) * params.inW + u32(iw);
|
|
@@ -71,7 +70,7 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>, @builtin(num_workgroups)
|
|
| 71 |
let value = f32(x[xIndex]);
|
| 72 |
{% if hasIndices %}
|
| 73 |
if (!seen || value > best) {
|
| 74 |
-
{% if
|
| 75 |
bestIh = u32(ih);
|
| 76 |
{% endif %}
|
| 77 |
bestIw = u32(iw);
|
|
@@ -80,17 +79,17 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>, @builtin(num_workgroups)
|
|
| 80 |
best = max_propagate_nan(best, value);
|
| 81 |
seen = true;
|
| 82 |
}
|
| 83 |
-
{% if
|
| 84 |
}
|
| 85 |
{% endif %}
|
| 86 |
-
{% if
|
| 87 |
}
|
| 88 |
{% endif %}
|
| 89 |
|
| 90 |
y[index] = {{ scalar }}(select(0.0, best, seen));
|
| 91 |
{% if hasIndices %}
|
| 92 |
let nc = batch * params.channels + channel;
|
| 93 |
-
{% if
|
| 94 |
indices[index] = nc * params.inW + bestIw;
|
| 95 |
{% elif storageOrder == 1 %}
|
| 96 |
indices[index] = (nc * params.inW + bestIw) * params.inH + bestIh;
|
|
|
|
| 1 |
+
{% set hasIndices = hasIndices is defined and hasIndices %}
|
| 2 |
+
{% set storageOrder = storageOrder | default(0) %}
|
|
|
|
| 3 |
{{ env.wgsl.resourceDeclarations }}
|
| 4 |
|
| 5 |
+
// Direct spatial-pooling traversal for a channels-first tensor.
|
| 6 |
fn negative_infinity() -> f32 {
|
| 7 |
var bits = 0xff800000u;
|
| 8 |
return bitcast<f32>(bits);
|
|
|
|
| 21 |
}
|
| 22 |
|
| 23 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 24 |
+
fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
|
| 25 |
+
let index = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 26 |
if (index >= params.count) { return; }
|
| 27 |
|
| 28 |
let ow = index % params.outW;
|
| 29 |
var t = index / params.outW;
|
| 30 |
+
{% if spatialRankSpec >= 2 %}
|
| 31 |
let oh = t % params.outH;
|
| 32 |
t /= params.outH;
|
| 33 |
{% endif %}
|
| 34 |
+
{% if spatialRankSpec == 3 %}
|
| 35 |
let od = t % params.outD;
|
| 36 |
t /= params.outD;
|
| 37 |
{% endif %}
|
|
|
|
| 41 |
var best = negative_infinity();
|
| 42 |
var seen = false;
|
| 43 |
{% if hasIndices %}
|
| 44 |
+
{% if spatialRankSpec >= 2 %}
|
| 45 |
var bestIh = 0u;
|
| 46 |
{% endif %}
|
| 47 |
var bestIw = 0u;
|
| 48 |
{% endif %}
|
| 49 |
|
| 50 |
+
{% if spatialRankSpec == 3 %}
|
| 51 |
for (var kd = 0u; kd < params.kernelD; kd += 1u) {
|
| 52 |
let id = i32(od * params.strideD + kd * params.dilationD) - params.padD;
|
| 53 |
if (id < 0 || id >= i32(params.inD)) { continue; }
|
| 54 |
{% endif %}
|
| 55 |
+
{% if spatialRankSpec >= 2 %}
|
| 56 |
for (var kh = 0u; kh < params.kernelH; kh += 1u) {
|
| 57 |
let ih = i32(oh * params.strideH + kh * params.dilationH) - params.padH;
|
| 58 |
if (ih < 0 || ih >= i32(params.inH)) { continue; }
|
|
|
|
| 60 |
for (var kw = 0u; kw < params.kernelW; kw += 1u) {
|
| 61 |
let iw = i32(ow * params.strideW + kw * params.dilationW) - params.padW;
|
| 62 |
if (iw < 0 || iw >= i32(params.inW)) { continue; }
|
| 63 |
+
{% if spatialRankSpec == 1 %}
|
| 64 |
let xIndex = (batch * params.channels + channel) * params.inW + u32(iw);
|
| 65 |
+
{% elif spatialRankSpec == 2 %}
|
| 66 |
let xIndex = ((batch * params.channels + channel) * params.inH + u32(ih)) * params.inW + u32(iw);
|
| 67 |
{% else %}
|
| 68 |
let xIndex = (((batch * params.channels + channel) * params.inD + u32(id)) * params.inH + u32(ih)) * params.inW + u32(iw);
|
|
|
|
| 70 |
let value = f32(x[xIndex]);
|
| 71 |
{% if hasIndices %}
|
| 72 |
if (!seen || value > best) {
|
| 73 |
+
{% if spatialRankSpec >= 2 %}
|
| 74 |
bestIh = u32(ih);
|
| 75 |
{% endif %}
|
| 76 |
bestIw = u32(iw);
|
|
|
|
| 79 |
best = max_propagate_nan(best, value);
|
| 80 |
seen = true;
|
| 81 |
}
|
| 82 |
+
{% if spatialRankSpec >= 2 %}
|
| 83 |
}
|
| 84 |
{% endif %}
|
| 85 |
+
{% if spatialRankSpec == 3 %}
|
| 86 |
}
|
| 87 |
{% endif %}
|
| 88 |
|
| 89 |
y[index] = {{ scalar }}(select(0.0, best, seen));
|
| 90 |
{% if hasIndices %}
|
| 91 |
let nc = batch * params.channels + channel;
|
| 92 |
+
{% if spatialRankSpec == 1 %}
|
| 93 |
indices[index] = nc * params.inW + bestIw;
|
| 94 |
{% elif storageOrder == 1 %}
|
| 95 |
indices[index] = (nc * params.inW + bestIw) * params.inH + bestIh;
|
build/webgpu/pool-window-unroll.wgsl.jinja
CHANGED
|
@@ -1,20 +1,17 @@
|
|
| 1 |
// Compile-time-unrolled 2D NCHW pooling for small windows. Accumulation remains
|
| 2 |
-
// kh-major/kw-minor, matching the
|
| 3 |
-
{% if usesF16 %}
|
| 4 |
-
enable f16;
|
| 5 |
-
{% endif %}
|
| 6 |
{{ env.wgsl.resourceDeclarations }}
|
| 7 |
|
| 8 |
-
const OUT_W: u32 = {{
|
| 9 |
-
const OUT_H: u32 = {{
|
| 10 |
-
const IN_H: i32 = {{
|
| 11 |
-
const IN_W: i32 = {{
|
| 12 |
-
const IN_W_U: u32 = {{
|
| 13 |
-
const IN_PLANE: u32 = {{
|
| 14 |
-
const STRIDE_H: u32 = {{
|
| 15 |
-
const STRIDE_W: u32 = {{
|
| 16 |
-
const PAD_TOP: i32 = {{
|
| 17 |
-
const PAD_LEFT: i32 = {{
|
| 18 |
|
| 19 |
fn negative_infinity() -> f32 {
|
| 20 |
var bits = 0xff800000u;
|
|
@@ -39,11 +36,10 @@ fn max_propagate_nan(a: f32, b: f32) -> f32 {
|
|
| 39 |
|
| 40 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 41 |
fn main(
|
| 42 |
-
@builtin(global_invocation_id) gid: vec3<u32>
|
| 43 |
-
@builtin(num_workgroups) nwg: vec3<u32>
|
| 44 |
) {
|
| 45 |
// Fold very large flat outputs into the dispatch's second dimension.
|
| 46 |
-
let index = gid.x + gid.y *
|
| 47 |
if (index >= params.count) {
|
| 48 |
return;
|
| 49 |
}
|
|
@@ -55,19 +51,19 @@ fn main(
|
|
| 55 |
let planeBase = plane * IN_PLANE;
|
| 56 |
let startH = i32(oh * STRIDE_H) - PAD_TOP;
|
| 57 |
let startW = i32(ow * STRIDE_W) - PAD_LEFT;
|
| 58 |
-
{% for kh in range(
|
| 59 |
-
let ih_{{ kh }} = startH + {{ kh *
|
| 60 |
{% endfor %}
|
| 61 |
-
{% for kw in range(
|
| 62 |
-
let iw_{{ kw }} = startW + {{ kw *
|
| 63 |
{% endfor %}
|
| 64 |
|
| 65 |
var result = negative_infinity();
|
| 66 |
var seen = 0u;
|
| 67 |
-
{% for kh in range(
|
| 68 |
if (ih_{{ kh }} >= 0 && ih_{{ kh }} < IN_H) {
|
| 69 |
let rowBase{{ kh }} = planeBase + u32(ih_{{ kh }}) * IN_W_U;
|
| 70 |
-
{% for kw in range(
|
| 71 |
if (iw_{{ kw }} >= 0 && iw_{{ kw }} < IN_W) {
|
| 72 |
let value_{{ kh }}_{{ kw }} = f32(x[rowBase{{ kh }} + u32(iw_{{ kw }})]);
|
| 73 |
result = max_propagate_nan(result, value_{{ kh }}_{{ kw }});
|
|
|
|
| 1 |
// Compile-time-unrolled 2D NCHW pooling for small windows. Accumulation remains
|
| 2 |
+
// kh-major/kw-minor, matching the loop-based implementations.
|
|
|
|
|
|
|
|
|
|
| 3 |
{{ env.wgsl.resourceDeclarations }}
|
| 4 |
|
| 5 |
+
const OUT_W: u32 = {{ outW }}u;
|
| 6 |
+
const OUT_H: u32 = {{ outH }}u;
|
| 7 |
+
const IN_H: i32 = {{ inH }};
|
| 8 |
+
const IN_W: i32 = {{ inW }};
|
| 9 |
+
const IN_W_U: u32 = {{ inW }}u;
|
| 10 |
+
const IN_PLANE: u32 = {{ inH * inW }}u;
|
| 11 |
+
const STRIDE_H: u32 = {{ strideHSpec }}u;
|
| 12 |
+
const STRIDE_W: u32 = {{ strideWSpec }}u;
|
| 13 |
+
const PAD_TOP: i32 = {{ padTopSpec }};
|
| 14 |
+
const PAD_LEFT: i32 = {{ padLeftSpec }};
|
| 15 |
|
| 16 |
fn negative_infinity() -> f32 {
|
| 17 |
var bits = 0xff800000u;
|
|
|
|
| 36 |
|
| 37 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 38 |
fn main(
|
| 39 |
+
@builtin(global_invocation_id) gid: vec3<u32>
|
|
|
|
| 40 |
) {
|
| 41 |
// Fold very large flat outputs into the dispatch's second dimension.
|
| 42 |
+
let index = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 43 |
if (index >= params.count) {
|
| 44 |
return;
|
| 45 |
}
|
|
|
|
| 51 |
let planeBase = plane * IN_PLANE;
|
| 52 |
let startH = i32(oh * STRIDE_H) - PAD_TOP;
|
| 53 |
let startW = i32(ow * STRIDE_W) - PAD_LEFT;
|
| 54 |
+
{% for kh in range(kernelHSpec) %}
|
| 55 |
+
let ih_{{ kh }} = startH + {{ kh * dilationHSpec }};
|
| 56 |
{% endfor %}
|
| 57 |
+
{% for kw in range(kernelWSpec) %}
|
| 58 |
+
let iw_{{ kw }} = startW + {{ kw * dilationWSpec }};
|
| 59 |
{% endfor %}
|
| 60 |
|
| 61 |
var result = negative_infinity();
|
| 62 |
var seen = 0u;
|
| 63 |
+
{% for kh in range(kernelHSpec) %}
|
| 64 |
if (ih_{{ kh }} >= 0 && ih_{{ kh }} < IN_H) {
|
| 65 |
let rowBase{{ kh }} = planeBase + u32(ih_{{ kh }}) * IN_W_U;
|
| 66 |
+
{% for kw in range(kernelWSpec) %}
|
| 67 |
if (iw_{{ kw }} >= 0 && iw_{{ kw }} < IN_W) {
|
| 68 |
let value_{{ kh }}_{{ kw }} = f32(x[rowBase{{ kh }} + u32(iw_{{ kw }})]);
|
| 69 |
result = max_propagate_nan(result, value_{{ kh }}_{{ kw }});
|
build/webgpu/pool2d-nchw-k2s2-vec4.wgsl.jinja
CHANGED
|
@@ -1,19 +1,15 @@
|
|
| 1 |
-
{% if usesF16 %}
|
| 2 |
-
enable f16;
|
| 3 |
-
{% endif %}
|
| 4 |
{{ env.wgsl.resourceDeclarations }}
|
| 5 |
|
| 6 |
// 2D NCHW MaxPool specialised for the dense 2x2 / stride-2 / no-pad /
|
| 7 |
// dilation-1 window. Each thread produces two adjacent output columns from one
|
| 8 |
// aligned vec4 load per input row. A vec4 over
|
| 9 |
// input columns [4*tileCol .. 4*tileCol+3] holds the two side-by-side 2-wide
|
| 10 |
-
// windows. NaN
|
| 11 |
-
//
|
| 12 |
-
const
|
| 13 |
-
const
|
| 14 |
-
const
|
| 15 |
-
const
|
| 16 |
-
const IN_PLANE_VEC4: u32 = {{ source.inPlaneVec4 }}u;
|
| 17 |
|
| 18 |
fn is_nan_v(value: {{ scalar }}) -> bool {
|
| 19 |
let bits = bitcast<u32>(f32(value));
|
|
@@ -27,9 +23,9 @@ fn max_nan(a: {{ scalar }}, b: {{ scalar }}) -> {{ scalar }} {
|
|
| 27 |
}
|
| 28 |
|
| 29 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 30 |
-
fn main(@builtin(global_invocation_id) gid: vec3<u32>
|
| 31 |
// 2D-folded flat tile index (one tile = two output columns).
|
| 32 |
-
let tile = gid.x + gid.y *
|
| 33 |
if (tile >= params.tileCount) {
|
| 34 |
return;
|
| 35 |
}
|
|
|
|
|
|
|
|
|
|
|
|
|
| 1 |
{{ env.wgsl.resourceDeclarations }}
|
| 2 |
|
| 3 |
// 2D NCHW MaxPool specialised for the dense 2x2 / stride-2 / no-pad /
|
| 4 |
// dilation-1 window. Each thread produces two adjacent output columns from one
|
| 5 |
// aligned vec4 load per input row. A vec4 over
|
| 6 |
// input columns [4*tileCol .. 4*tileCol+3] holds the two side-by-side 2-wide
|
| 7 |
+
// windows. Any NaN in a window produces a NaN result for that column.
|
| 8 |
+
const OUT_W: u32 = {{ outW }}u; // == IN_W / 2 (no pad, stride 2)
|
| 9 |
+
const OUT_H: u32 = {{ outH }}u;
|
| 10 |
+
const OUT_W_HALF: u32 = {{ outWHalf }}u;
|
| 11 |
+
const IN_W_VEC4: u32 = {{ inWVec4 }}u; // input row length in vec4 units
|
| 12 |
+
const IN_PLANE_VEC4: u32 = {{ inPlaneVec4 }}u;
|
|
|
|
| 13 |
|
| 14 |
fn is_nan_v(value: {{ scalar }}) -> bool {
|
| 15 |
let bits = bitcast<u32>(f32(value));
|
|
|
|
| 23 |
}
|
| 24 |
|
| 25 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 26 |
+
fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
|
| 27 |
// 2D-folded flat tile index (one tile = two output columns).
|
| 28 |
+
let tile = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 29 |
if (tile >= params.tileCount) {
|
| 30 |
return;
|
| 31 |
}
|
build/webgpu/pool2d-nchw-separable.wgsl.jinja
CHANGED
|
@@ -1,26 +1,13 @@
|
|
| 1 |
-
{% if usesF16 %}
|
| 2 |
-
enable f16;
|
| 3 |
-
{% endif %}
|
| 4 |
{{ env.wgsl.resourceDeclarations }}
|
| 5 |
|
| 6 |
// Separable NCHW pooling: one spatial axis per pass.
|
| 7 |
//
|
| 8 |
-
//
|
| 9 |
-
//
|
| 10 |
-
//
|
| 11 |
-
//
|
| 12 |
-
//
|
| 13 |
-
//
|
| 14 |
-
// The intermediate is f32 because the direct kernel also accumulates in f32
|
| 15 |
-
// and casts once at the end, including for i32 input.
|
| 16 |
-
//
|
| 17 |
-
// Max pooling is bit-identical to the direct kernel because max is idempotent
|
| 18 |
-
// as well as associative. Lp pooling is within tolerance but not bit-identical:
|
| 19 |
-
// summing each row first regroups f32 additions relative to the direct kernel.
|
| 20 |
-
//
|
| 21 |
-
// `axis` selects the pass: "w" reduces x into tmp, and "h" reduces tmp into y.
|
| 22 |
-
// AveragePool is not wired here because its denominator would require valid-tap
|
| 23 |
-
// counts to travel alongside the sum.
|
| 24 |
fn negative_infinity() -> f32 {
|
| 25 |
var bits = 0xff800000u;
|
| 26 |
return bitcast<f32>(bits);
|
|
@@ -39,9 +26,9 @@ fn max_propagate_nan(a: f32, b: f32) -> f32 {
|
|
| 39 |
}
|
| 40 |
|
| 41 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 42 |
-
fn main(@builtin(global_invocation_id) gid: vec3<u32>
|
| 43 |
-
let index = gid.x + gid.y *
|
| 44 |
-
{% if
|
| 45 |
if (index >= params.tmpCount) { return; }
|
| 46 |
// One cell per (batch, channel, input row, output column).
|
| 47 |
let ow = index % params.outW;
|
|
|
|
|
|
|
|
|
|
|
|
|
| 1 |
{{ env.wgsl.resourceDeclarations }}
|
| 2 |
|
| 3 |
// Separable NCHW pooling: one spatial axis per pass.
|
| 4 |
//
|
| 5 |
+
// A kernelH x kernelW window factorizes into a width reduction followed by a
|
| 6 |
+
// height reduction. The width pass writes one f32 intermediate per input row
|
| 7 |
+
// and output column; the height pass completes the selected pooling operation.
|
| 8 |
+
// `axis == "w"` writes `tmp`, and `axis == "h"` writes `y`.
|
| 9 |
+
// Each pass propagates NaNs while taking maxima. Because max is associative and
|
| 10 |
+
// idempotent, the two folds produce the same result as a two-dimensional fold.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 11 |
fn negative_infinity() -> f32 {
|
| 12 |
var bits = 0xff800000u;
|
| 13 |
return bitcast<f32>(bits);
|
|
|
|
| 26 |
}
|
| 27 |
|
| 28 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 29 |
+
fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
|
| 30 |
+
let index = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 31 |
+
{% if axisSpec == "w" %}
|
| 32 |
if (index >= params.tmpCount) { return; }
|
| 33 |
// One cell per (batch, channel, input row, output column).
|
| 34 |
let ow = index % params.outW;
|
build/webgpu/test.json
CHANGED
|
@@ -1,5 +1,4 @@
|
|
| 1 |
{
|
| 2 |
-
"op": "ai.onnx.MaxPool",
|
| 3 |
"fixtureArrays": {
|
| 4 |
"onnx_backend_maxpool_2d_input_x": [1.764052391052246, 0.40015721321105957, 0.978738009929657, 2.2408931255340576, 1.8675580024719238, -0.9772778749465942, 0.9500884413719177, -0.15135720372200012, -0.10321885347366333, 0.4105985164642334, 0.14404356479644775, 1.4542734622955322, 0.7610377073287964, 0.12167501449584961, 0.44386324286460876, 0.3336743414402008, 1.4940791130065918, -0.2051582634449005, 0.3130677044391632, -0.8540957570075989, -2.5529897212982178, 0.653618574142456, 0.8644362092018127, -0.7421650290489197, 2.269754648208618, -1.4543657302856445, 0.04575851559638977, -0.18718385696411133, 1.5327792167663574, 1.4693588018417358, 0.154947429895401, 0.37816253304481506, -0.8877857327461243, -1.980796456336975, -0.34791216254234314, 0.15634897351264954, 1.2302906513214111, 1.202379822731018, -0.38732680678367615, -0.302302747964859, -1.0485529899597168, -1.420017957687378, -1.7062702178955078, 1.950775384902954, -0.5096521973609924, -0.4380742907524109, -1.2527953386306763, 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| 5 |
"ceil_mode_partial_windows_input_x": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16],
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{
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"name": "f32_positive_subnormal_beats_zero_2d_gpu_gap",
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"attrs": { "kernel_shape": [2, 2] },
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"provenance": {
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"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
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"test": "PoolTest.MaxPool1D_8_With_Index",
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"provenance": {
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"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
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"test": "PoolTest.MaxPool1D_12_With_Index_8bits",
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"attrs": { "storage_order": 0, "kernel_shape": [2], "strides": [2] },
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"provenance": {
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"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
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"test": "PoolTest.MaxPool1D_12_With_Index_8bits",
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"attrs": { "storage_order": 0, "kernel_shape": [2], "strides": [2] },
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"provenance": {
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"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
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"test": "PoolTest.MaxPool_8_With_Index",
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"attrs": { "storage_order": 0, "kernel_shape": [2, 2] },
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"provenance": {
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"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
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"test": "PoolTest.MaxPool_8_With_Index",
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"attrs": { "storage_order": 1, "kernel_shape": [2, 2] },
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{
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"inputs": {
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@@ -1148,7 +1147,7 @@
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{
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"name": "f16_2d_indices_k2s2_multichannel",
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"inputs": {
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@@ -1179,7 +1178,7 @@
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{
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"name": "f16_nchw_realistic_k3s2_pad1",
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@@ -1194,7 +1193,7 @@
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{
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@@ -1224,7 +1223,7 @@
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{
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"attrs": { "kernel_shape": [3, 3], "strides": [2, 2], "pads": [1, 1, 1, 1] },
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@@ -1293,7 +1292,7 @@
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{
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"name": "uint8_2d_indices_col_major_storage_order1",
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"attrs": { "storage_order": 1, "kernel_shape": [2, 2] },
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{
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"name": "nchw_f32_indices_duplicate_max_tie_first_window_pos",
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"attrs": { "storage_order": 0, "kernel_shape": [2, 2] },
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"inputs": {
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"x": {
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"dtype": "float32",
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"shape": [1, 1, 2, 3],
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"y": {
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"dtype": "float32",
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"dtype": "uint32",
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@@ -1349,7 +1348,7 @@
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{
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"name": "nchw_f16_k2s2_vec4_odd_outH_boundary",
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"inputs": {
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@@ -1364,7 +1363,7 @@
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{
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"name": "nchw_f32_dispatch_fold_65537_rows_generic",
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"attrs": { "kernel_shape": [1, 1] },
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"inputs": {
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@@ -1379,7 +1378,7 @@
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{
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| 1380 |
"name": "ncl1d_k2s2_x4_two_planes",
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"inputs": {
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{
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"name": "separable_k6_nopad_f16",
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"provenance": {
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-
"notes": "float16
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},
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"attrs": { "kernel_shape": [6, 6] },
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"inputs": {
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"outputs": { "y": { "dtype": "float16", "shape": [1, 2, 11, 11], "tolerance": 0 } }
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{
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"fixtureArrays": {
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|
| 4 |
"ceil_mode_partial_windows_input_x": [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16],
|
|
|
|
| 22 |
{
|
| 23 |
"name": "f32_positive_subnormal_beats_zero_2d_gpu_gap",
|
| 24 |
"provenance": {
|
| 25 |
+
"notes": "In two-dimensional pooling, a positive subnormal must remain greater than zero-valued neighbors."
|
| 26 |
},
|
| 27 |
"attrs": { "kernel_shape": [2, 2] },
|
| 28 |
"inputs": {
|
|
|
|
| 171 |
"provenance": {
|
| 172 |
"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
|
| 173 |
"test": "PoolTest.MaxPool1D_8_With_Index",
|
| 174 |
+
"notes": "This WebGPU package stores the ONNX int64 MaxPool indices in uint32 output slots."
|
| 175 |
},
|
| 176 |
"attrs": { "storage_order": 0, "kernel_shape": [2], "strides": [2] },
|
| 177 |
"inputs": {
|
|
|
|
| 201 |
"provenance": {
|
| 202 |
"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
|
| 203 |
"test": "PoolTest.MaxPool1D_12_With_Index_8bits",
|
| 204 |
+
"notes": "An int8 one-dimensional MaxPool emits representable logical int64 indices in uint32 storage."
|
| 205 |
},
|
| 206 |
"attrs": { "storage_order": 0, "kernel_shape": [2], "strides": [2] },
|
| 207 |
"inputs": {
|
|
|
|
| 227 |
"provenance": {
|
| 228 |
"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
|
| 229 |
"test": "PoolTest.MaxPool1D_12_With_Index_8bits",
|
| 230 |
+
"notes": "A uint8 one-dimensional MaxPool emits representable logical int64 indices in uint32 storage."
|
| 231 |
},
|
| 232 |
"attrs": { "storage_order": 0, "kernel_shape": [2], "strides": [2] },
|
| 233 |
"inputs": {
|
|
|
|
| 253 |
"provenance": {
|
| 254 |
"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
|
| 255 |
"test": "PoolTest.MaxPool_8_With_Index",
|
| 256 |
+
"notes": "A compact two-dimensional MaxPool emits row-major indices with storage_order=0, represented in uint32 storage."
|
| 257 |
},
|
| 258 |
"attrs": { "storage_order": 0, "kernel_shape": [2, 2] },
|
| 259 |
"inputs": {
|
|
|
|
| 283 |
"provenance": {
|
| 284 |
"source": "onnxruntime/test/providers/cpu/nn/pool_op_test.cc",
|
| 285 |
"test": "PoolTest.MaxPool_8_With_Index",
|
| 286 |
+
"notes": "A compact two-dimensional MaxPool emits column-major indices with storage_order=1, represented in uint32 storage."
|
| 287 |
},
|
| 288 |
"attrs": { "storage_order": 1, "kernel_shape": [2, 2] },
|
| 289 |
"inputs": {
|
|
|
|
| 1104 |
{
|
| 1105 |
"name": "f16_k2s2_vec4_2x8x16x16_gpu",
|
| 1106 |
"provenance": {
|
| 1107 |
+
"notes": "A dense float16 2x2/stride-2/no-pad downsample exercises coalesced vec4 loads. Deterministic values give each pooling window a distinct maximum."
|
| 1108 |
},
|
| 1109 |
"attrs": { "kernel_shape": [2, 2], "strides": [2, 2] },
|
| 1110 |
"inputs": {
|
|
|
|
| 1147 |
{
|
| 1148 |
"name": "f16_2d_indices_k2s2_multichannel",
|
| 1149 |
"provenance": {
|
| 1150 |
+
"notes": "A CNN-like float16 k2/s2 downsample over two channels exercises both pooled values and argmax indices on the NCHW two-dimensional indexed path."
|
| 1151 |
},
|
| 1152 |
"attrs": { "storage_order": 0, "kernel_shape": [2, 2], "strides": [2, 2] },
|
| 1153 |
"inputs": {
|
|
|
|
| 1178 |
{
|
| 1179 |
"name": "f16_nchw_realistic_k3s2_pad1",
|
| 1180 |
"provenance": {
|
| 1181 |
+
"notes": "A realistic float16 ResNet-stem shape [1,64,56,56] with k3/s2/pad1 bypasses the k2 vec4 specialization and exercises padded windows in the generic NCHW loop."
|
| 1182 |
},
|
| 1183 |
"attrs": { "kernel_shape": [3, 3], "strides": [2, 2], "pads": [1, 1, 1, 1] },
|
| 1184 |
"inputs": {
|
|
|
|
| 1193 |
{
|
| 1194 |
"name": "int8_2d_k3s2_pad1_realistic",
|
| 1195 |
"provenance": {
|
| 1196 |
+
"notes": "A signed int8 rank-4 k3/s2/pad1 MaxPool exercises logical int8 values carried through the generic NCHW int32 storage path."
|
| 1197 |
},
|
| 1198 |
"attrs": { "kernel_shape": [3, 3], "strides": [2, 2], "pads": [1, 1, 1, 1] },
|
| 1199 |
"inputs": {
|
|
|
|
| 1223 |
{
|
| 1224 |
"name": "f16_nchw_3x3_s2_pad1_unrolled",
|
| 1225 |
"provenance": {
|
| 1226 |
+
"notes": "A float16 3x3 window with stride 2 and one-cell padding exercises complete and boundary-clipped NCHW pooling windows."
|
| 1227 |
},
|
| 1228 |
"attrs": { "kernel_shape": [3, 3], "strides": [2, 2], "pads": [1, 1, 1, 1] },
|
| 1229 |
"inputs": {
|
|
|
|
| 1292 |
{
|
| 1293 |
"name": "uint8_2d_indices_col_major_storage_order1",
|
| 1294 |
"provenance": {
|
| 1295 |
+
"notes": "A rank-4 uint8 MaxPool emits column-major indices with storage_order=1. The expected indices use (nc*inputWidth+column)*inputHeight+row and are computed directly from each pooling window."
|
| 1296 |
},
|
| 1297 |
"attrs": { "storage_order": 1, "kernel_shape": [2, 2] },
|
| 1298 |
"inputs": {
|
|
|
|
| 1320 |
{
|
| 1321 |
"name": "nchw_f32_indices_duplicate_max_tie_first_window_pos",
|
| 1322 |
"provenance": {
|
| 1323 |
+
"notes": "Equal maxima must resolve to the first, lowest window index. The expected row-major flat indices are derived directly from the pooling windows."
|
| 1324 |
},
|
| 1325 |
"attrs": { "storage_order": 0, "kernel_shape": [2, 2] },
|
| 1326 |
"inputs": {
|
| 1327 |
"x": {
|
| 1328 |
"dtype": "float32",
|
| 1329 |
"shape": [1, 1, 2, 3],
|
| 1330 |
+
"data": { "kind": "values", "values": [9.0, 9.0, 12.0, 2.0, 3.0, 12.0] }
|
| 1331 |
}
|
| 1332 |
},
|
| 1333 |
"outputs": {
|
| 1334 |
"y": {
|
| 1335 |
"dtype": "float32",
|
| 1336 |
"shape": [1, 1, 1, 2],
|
| 1337 |
+
"data": { "kind": "values", "values": [9.0, 12.0] },
|
| 1338 |
"tolerance": 0
|
| 1339 |
},
|
| 1340 |
"indices": {
|
| 1341 |
"dtype": "uint32",
|
| 1342 |
"shape": [1, 1, 1, 2],
|
| 1343 |
+
"data": { "kind": "values", "values": [0, 2] },
|
| 1344 |
"tolerance": 0
|
| 1345 |
}
|
| 1346 |
}
|
|
|
|
| 1348 |
{
|
| 1349 |
"name": "nchw_f16_k2s2_vec4_odd_outH_boundary",
|
| 1350 |
"provenance": {
|
| 1351 |
+
"notes": "A float16 2x2/s2/no-pad input with height 10 produces odd output height 5, exercising two-output-per-thread row mapping at the final tile."
|
| 1352 |
},
|
| 1353 |
"attrs": { "kernel_shape": [2, 2], "strides": [2, 2] },
|
| 1354 |
"inputs": {
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|
|
|
| 1363 |
{
|
| 1364 |
"name": "nchw_f32_dispatch_fold_65537_rows_generic",
|
| 1365 |
"provenance": {
|
| 1366 |
+
"notes": "A 1x1 identity window produces more than 16.7 million outputs and crosses the two-dimensional dispatch-fold boundary. Every output must equal the corresponding input, including the final folded row."
|
| 1367 |
},
|
| 1368 |
"attrs": { "kernel_shape": [1, 1] },
|
| 1369 |
"inputs": {
|
|
|
|
| 1378 |
{
|
| 1379 |
"name": "ncl1d_k2s2_x4_two_planes",
|
| 1380 |
"provenance": {
|
| 1381 |
+
"notes": "Two planes exercise the four-output aligned NCL path across a plane boundary, with distinct maxima on each side."
|
| 1382 |
},
|
| 1383 |
"attrs": { "kernel_shape": [2], "strides": [2] },
|
| 1384 |
"inputs": {
|
|
|
|
| 1429 |
{
|
| 1430 |
"name": "separable_k6_nopad_f16",
|
| 1431 |
"provenance": {
|
| 1432 |
+
"notes": "A float16 6x6 window is the smallest square reaching SEPARABLE_MIN_WINDOW=36 and exercises the separable two-dimensional pooling path."
|
| 1433 |
},
|
| 1434 |
"attrs": { "kernel_shape": [6, 6] },
|
| 1435 |
"inputs": {
|
|
|
|
| 1440 |
}
|
| 1441 |
},
|
| 1442 |
"outputs": { "y": { "dtype": "float16", "shape": [1, 2, 11, 11], "tolerance": 0 } }
|
| 1443 |
+
},
|
| 1444 |
+
{
|
| 1445 |
+
"name": "autopad_same_upper_rank3_route",
|
| 1446 |
+
"provenance": {
|
| 1447 |
+
"notes": "A 1-D SAME_UPPER pool is a legal ONNX graph whose output extent the port itself infers, and the generic rank-3 selector compared that extent against the explicit-pad arithmetic, which SAME cannot satisfy. The pinned values are exact: padding contributes negative infinity, so the maxima over the three windows are 2, 4 and 5."
|
| 1448 |
+
},
|
| 1449 |
+
"attrs": { "auto_pad": "SAME_UPPER", "kernel_shape": [3], "strides": [2] },
|
| 1450 |
+
"inputs": {
|
| 1451 |
+
"x": {
|
| 1452 |
+
"dtype": "float32",
|
| 1453 |
+
"shape": [1, 1, 5],
|
| 1454 |
+
"data": { "kind": "values", "values": [1.0, 2.0, 3.0, 4.0, 5.0] }
|
| 1455 |
+
}
|
| 1456 |
+
},
|
| 1457 |
+
"outputs": {
|
| 1458 |
+
"y": {
|
| 1459 |
+
"dtype": "float32",
|
| 1460 |
+
"shape": [1, 1, 3],
|
| 1461 |
+
"data": { "kind": "values", "values": [2.0, 4.0, 5.0] },
|
| 1462 |
+
"tolerance": 0
|
| 1463 |
+
}
|
| 1464 |
+
}
|
| 1465 |
+
},
|
| 1466 |
+
{
|
| 1467 |
+
"name": "autopad_same_upper_rank5_route",
|
| 1468 |
+
"provenance": {
|
| 1469 |
+
"notes": "A rank-5 SAME_UPPER pool derives output extents from automatic padding on all three spatial axes; volumetric path eligibility must use those derived extents."
|
| 1470 |
+
},
|
| 1471 |
+
"attrs": { "auto_pad": "SAME_UPPER", "kernel_shape": [3, 3, 3], "strides": [2, 2, 2] },
|
| 1472 |
+
"inputs": {
|
| 1473 |
+
"x": {
|
| 1474 |
+
"dtype": "float32",
|
| 1475 |
+
"shape": [1, 1, 3, 3, 3],
|
| 1476 |
+
"data": { "kind": "fillFloat32", "sinStep": 0.31, "cosStep": 0.17, "scale": 2.0 }
|
| 1477 |
+
}
|
| 1478 |
+
},
|
| 1479 |
+
"outputs": { "y": { "dtype": "float32", "shape": [1, 1, 2, 2, 2], "tolerance": 0 } }
|
| 1480 |
}
|
| 1481 |
]
|
| 1482 |
}
|