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Add static INT8 channelwise MobileNetV3-large model

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README.md CHANGED
@@ -45,6 +45,20 @@ num_params: 5,483,032
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  The license information of the original model was missing.
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  ## Intended uses & limitations
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@@ -156,4 +170,4 @@ python classify.py --image cat.jpg
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  biburl = {https://dblp.org/rec/journals/corr/abs-1905-02244.bib},
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  bibsource = {dblp computer science bibliography, https://dblp.org}
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  }
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- ```
 
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  The license information of the original model was missing.
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+ ## Available model files
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+
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+ | File | Description |
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+ | --- | --- |
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+ | `mobilenet_v3_large.tflite` | Full precision LiteRT/TFLite model. |
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+ | `mobilenet_v3_large_dynamic_wi8_afp32.tflite` | Dynamic weight-only INT8 model with FP32 activations. |
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+ | `mobilenet_v3_large_Google_Tensor_G5_apply_plugin.tflite` | AOT-compiled artifact for the Google Tensor G5 target. |
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+ | `mobilenet_v3_large_int8_channelwise.tflite` | Static INT8 model with channelwise INT8 weights and asymmetric INT8 activations. |
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+
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+ ## Quantization
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+
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+ `mobilenet_v3_large_int8_channelwise.tflite` was produced with the `STATIC_WI8_AI8` quantization recipe. Weights are signed INT8 and use symmetric channelwise quantization for weight tensors. Activations are signed INT8 with asymmetric quantization parameters.
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+
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+ The INT8 channelwise artifact keeps standard LiteRT/TFLite model structure before AOT compilation. Local LiteRT compiler checks fully delegated this artifact for Qualcomm NPU targets. MediaTek NPU compiler checks produced partial delegation for this channelwise artifact, with one Conv2D op left outside the NPU partition.
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  ## Intended uses & limitations
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  biburl = {https://dblp.org/rec/journals/corr/abs-1905-02244.bib},
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  bibsource = {dblp computer science bibliography, https://dblp.org}
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  }
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+ ```
mobilenet_v3_large_int8_channelwise.tflite ADDED
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