---
pipeline_tag: text-generation
base_model:
- Qwen/Qwen3-Coder-480B-A35B-Instruct
license: apache-2.0
library_name: Model Optimizer
tags:
- nvidia
- ModelOpt
- Qwen3
- quantized
- FP4
- fp4
---
# Model Overview
## Description:
The NVIDIA Qwen3-Coder-480B-A35B-Instruct NVFP4 model is the quantized version of Alibaba's Qwen3-Coder-480B-A35B-Instruct model, which is an auto-regressive language model that uses an optimized transformer architecture. For more information, please check [here](https://huggingface.co/Qwen/Qwen3-Coder-480B-A35B-Instruct). The NVIDIA Qwen3-Coder-480B-A35B-Instruct FP4 model is quantized with [Model Optimizer](https://github.com/NVIDIA/Model-Optimizer).
This model is ready for commercial/non-commercial use.
## Third-Party Community Consideration
This model is not owned or developed by NVIDIA. This model has been developed and built to a third-party’s requirements for this application and use case; see link to Non-NVIDIA [(Qwen3-Coder-480B-A35B-Instruct) Model Card](https://huggingface.co/Qwen/Qwen3-Coder-480B-A35B-Instruct).
### License/Terms of Use:
[Apache license 2.0](https://huggingface.co/datasets/choosealicense/licenses/blob/main/markdown/apache-2.0.md)
### Deployment Geography:
Global
### Use Case:
Developers looking to take off-the-shelf, pre-quantized models for deployment in AI Agent systems, chatbots, RAG systems, and other AI-powered applications.
### Release Date:
Hugging Face 08/22/2025 via https://huggingface.co/nvidia/Qwen3-Coder-480B-A35B-Instruct-FP4
## Model Architecture:
**Architecture Type:** Transformers
**Network Architecture:** Qwen3-Coder-480B-A35B-Instruct
**This model was developed based on [Qwen/Qwen3-Coder-480B-A35B-Instruct](https://huggingface.co/Qwen/Qwen3-Coder-480B-A35B-Instruct)
** Number of model parameters: 480B
## Input:
**Input Type(s):** Text
**Input Format(s):** String
**Input Parameters:** 1D (One-Dimensional): Sequences
**Other Properties Related to Input:** Context length up to 256K
## Output:
**Output Type(s):** Text
**Output Format:** String
**Output Parameters:** 1D (One-Dimensional): Sequences
**Other Properties Related to Output:** N/A
Our AI models are designed and/or optimized to run on NVIDIA GPU-accelerated systems. By leveraging NVIDIA’s hardware (e.g. GPU cores) and software frameworks (e.g., CUDA libraries), the model achieves faster training and inference times compared to CPU-only solutions.
## Software Integration:
**Supported Runtime Engine(s):**
* TensorRT-LLM
**Supported Hardware Microarchitecture Compatibility:**
* NVIDIA Blackwell
**Preferred Operating System(s):**
* Linux
The integration of foundation and fine-tuned models into AI systems requires additional testing using use-case-specific data to ensure safe and effective deployment. Following the V-model methodology, iterative testing and validation at both unit and system levels are essential to mitigate risks, meet technical and functional requirements, and ensure compliance with safety and ethical standards before deployment.
## Model Version(s):
The model is quantized with nvidia-modelopt **v0.41.0**
## Training, Testing, and Evaluation Datasets:
## Calibration Dataset:
** Link: [cnn_dailymail](https://huggingface.co/datasets/abisee/cnn_dailymail), [Nemotron-Post-Training-Dataset-v2](https://huggingface.co/datasets/nvidia/Nemotron-Post-Training-Dataset-v2)
** Data Collection Method by dataset: Automated.
** Labeling method: Automated.
## Training Dataset:
** Data Collection Method by dataset by Dataset: Undisclosed
** Labeling Method by dataset: Undisclosed
** Properties: Undisclosed
## Testing Dataset:
** Data Collection Method by dataset by Dataset: Undisclosed
** Labeling Method by dataset: Undisclosed
** Properties: Undisclosed
## Evaluation Dataset:
* Datasets: LiveCodeBench, SciCode
** Data Collection Method by dataset: Hybrid: Automated, Human
** Labeling method: Hybrid: Human, Automated
## Inference:
**Acceleration Engine:** TensorRT-LLM
**Test Hardware:** B200
## Post Training Quantization
This model was obtained by quantizing the weights and activations of Qwen3-Coder-480B-A35B-Instruct to FP4 data type, ready for inference with TensorRT-LLM. Only the weights and activations of the linear operators within transformer blocks are quantized. This optimization reduces the number of bits per parameter from 16 to 4, reducing the disk size and GPU memory requirements by approximately 3.5x.
## Usage
### Deploy with TensorRT-LLM
To deploy the quantized checkpoint with [TensorRT-LLM](https://github.com/NVIDIA/TensorRT-LLM) LLM API, follow the sample codes below:
* LLM API sample usage:
```
from tensorrt_llm import LLM, SamplingParams
def main():
prompts = [
"Hello, my name is",
"The president of the United States is",
"The capital of France is",
"The future of AI is",
]
sampling_params = SamplingParams(temperature=0.8, top_p=0.95)
llm = LLM(model="nvidia/Qwen3-Coder-480B-A35B-Instruct-FP4", tensor_parallel_size=4)
outputs = llm.generate(prompts, sampling_params)
# Print the outputs.
for output in outputs:
prompt = output.prompt
generated_text = output.outputs[0].text
print(f"Prompt: {prompt!r}, Generated text: {generated_text!r}")
# The entry point of the program needs to be protected for spawning processes.
if __name__ == '__main__':
main()
```
### Evaluation
The accuracy benchmark results are presented in the table below:
| Precision | LiveCodeBench | SciCode |
| BF16 | 0.486 | 0.412 |
| FP4 | 0.481 | 0.415 |