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1
- ---
2
- license: mit
3
- tags:
4
- - threshold-logic
5
- - neuromorphic
6
- - computer-architecture
7
- - formal-verification
8
- - coq
9
- - turing-complete
10
- - loihi
11
- - truenorth
12
- - akida
13
  ---
14
 
15
- # 8bit-threshold-computer
16
 
17
- A complete **Turing-complete 8-bit computer** implemented entirely in threshold logic neurons. No traditional logic gates - every operation uses weighted sums with Heaviside step activation.
18
 
19
- **Tested**: Rock-Paper-Scissors, FizzBuzz, countdown loops, and ALU operations all execute correctly using only threshold neuron computations.
 
 
 
 
 
 
 
20
 
21
- ## System Architecture
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
22
 
23
  | Component | Specification |
24
  |-----------|---------------|
25
- | Registers | 4 x 8-bit (R0, R1, R2, R3) |
26
- | Memory | 256 bytes |
27
- | Program Counter | 8-bit |
28
- | Instruction Width | 16-bit |
29
- | ALU Operations | 16 |
30
- | Status Flags | Z (Zero), N (Negative), C (Carry), V (Overflow) |
31
- | **Total Circuits** | **93** |
32
- | **Total Tensors** | **1,193** |
33
- | **Total Parameters** | **2,386** |
34
-
35
- ## Quick Start
36
-
37
- ```python
38
- import torch
39
- from safetensors.torch import load_file
40
 
41
- weights = load_file("neural_computer.safetensors")
42
 
43
- def heaviside(x):
44
- """Threshold activation: fires if x >= 0"""
45
- return (x >= 0).int()
46
 
47
- def threshold_neuron(inputs, weight, bias):
48
- """Single threshold neuron computation"""
49
- weighted_sum = (inputs.float() * weight.float()).sum() + bias.float()
50
- return heaviside(weighted_sum)
51
 
52
- # Example: AND gate
53
- and_w = weights['boolean.and.weight'] # [1.0, 1.0]
54
- and_b = weights['boolean.and.bias'] # [-2.0]
55
 
56
- for a in [0, 1]:
57
- for b in [0, 1]:
58
- result = threshold_neuron(torch.tensor([a, b]), and_w, and_b)
59
- print(f"AND({a}, {b}) = {result.item()}")
60
- ```
 
61
 
62
- ## Instruction Set
63
-
64
- ### ALU Operations (Opcodes 0-15)
65
-
66
- | Op | Mnemonic | Operation | Opcode |
67
- |----|----------|-----------|--------|
68
- | 0 | ADD | dest = src1 + src2 | 0000 |
69
- | 1 | SUB | dest = src1 - src2 | 0001 |
70
- | 2 | AND | dest = src1 & src2 | 0010 |
71
- | 3 | OR | dest = src1 \| src2 | 0011 |
72
- | 4 | XOR | dest = src1 ^ src2 | 0100 |
73
- | 5 | NOT | dest = ~src1 | 0101 |
74
- | 6 | SHL | dest = src1 << 1 | 0110 |
75
- | 7 | SHR | dest = src1 >> 1 | 0111 |
76
- | 8 | INC | dest = src1 + 1 | 1000 |
77
- | 9 | DEC | dest = src1 - 1 | 1001 |
78
- | 10 | CMP | flags = src1 - src2 | 1010 |
79
- | 11 | NEG | dest = -src1 | 1011 |
80
- | 12 | PASS | dest = src1 | 1100 |
81
- | 13 | ZERO | dest = 0 | 1101 |
82
- | 14 | ONES | dest = 0xFF | 1110 |
83
- | 15 | NOP | no operation | 1111 |
84
-
85
- ### Control Flow
86
-
87
- | Cond | Mnemonic | Condition |
88
- |------|----------|-----------|
89
- | 0 | JMP | unconditional |
90
- | 1 | JZ | Z = 1 (zero) |
91
- | 2 | JNZ | Z = 0 (not zero) |
92
- | 3 | JC | C = 1 (carry) |
93
- | 4 | JNC | C = 0 (no carry) |
94
- | 5 | JN | N = 1 (negative) |
95
- | 6 | JP | N = 0 (positive) |
96
- | 7 | JV | V = 1 (overflow) |
97
-
98
- ### Stack & Memory
99
-
100
- | Mnemonic | Operation |
101
- |----------|-----------|
102
- | LD | Load from memory |
103
- | ST | Store to memory |
104
- | PUSH | Push to stack |
105
- | POP | Pop from stack |
106
- | CALL | Call subroutine |
107
- | RET | Return from subroutine |
108
-
109
- ## Complete Circuit Inventory
110
-
111
- ### ALU (3 circuits, 305 params)
112
-
113
- | Circuit | Tensors | Parameters | Description |
114
- |---------|---------|------------|-------------|
115
- | alu8bit | 17 | 201 | Complete 8-bit ALU with 16 operations |
116
- | alucontrol | 32 | 80 | 4-bit opcode decoder |
117
- | aluflags | 8 | 24 | Z, N, C, V flag computation |
118
-
119
- ### Boolean (9 circuits, 44 params)
120
-
121
- | Circuit | Tensors | Parameters | Weights | Bias |
122
- |---------|---------|------------|---------|------|
123
- | and | 2 | 3 | [1, 1] | -2 |
124
- | or | 2 | 3 | [1, 1] | -1 |
125
- | not | 2 | 2 | [-1] | 0 |
126
- | nand | 2 | 3 | [-1, -1] | 1 |
127
- | nor | 2 | 3 | [-1, -1] | 0 |
128
- | xor | 6 | 9 | 2-layer network |
129
- | xnor | 6 | 9 | 2-layer network |
130
- | implies | 2 | 3 | [-1, 1] | 0 |
131
- | biimplies | 6 | 9 | 2-layer network |
132
-
133
- ### Arithmetic (16 circuits, 612 params)
134
-
135
- | Circuit | Tensors | Parameters | Description |
136
- |---------|---------|------------|-------------|
137
- | halfadder | 8 | 12 | 1-bit half adder |
138
- | fulladder | 18 | 27 | 1-bit full adder |
139
- | ripplecarry2bit | 36 | 54 | 2-bit ripple carry adder |
140
- | ripplecarry4bit | 72 | 108 | 4-bit ripple carry adder |
141
- | ripplecarry8bit | 144 | 216 | 8-bit ripple carry adder |
142
- | incrementer8bit | 2 | 16 | 8-bit increment |
143
- | decrementer8bit | 2 | 16 | 8-bit decrement |
144
- | equality8bit | 50 | 81 | 8-bit equality comparison |
145
- | greaterthan8bit | 1 | 8 | 8-bit greater than |
146
- | greaterorequal8bit | 1 | 8 | 8-bit greater or equal |
147
- | lessthan8bit | 1 | 8 | 8-bit less than |
148
- | lessorequal8bit | 1 | 8 | 8-bit less or equal |
149
- | absolutedifference8bit | 1 | 16 | 8-bit absolute difference |
150
- | max8bit | 1 | 16 | 8-bit maximum |
151
- | min8bit | 1 | 16 | 8-bit minimum |
152
- | multiplier2x2 | 8 | 12 | 2x2 bit multiplier |
153
-
154
- ### Combinational (10 circuits, 119 params)
155
-
156
- | Circuit | Tensors | Parameters | Description |
157
- |---------|---------|------------|-------------|
158
- | multiplexer2to1 | 8 | 11 | 2:1 MUX |
159
- | multiplexer4to1 | 1 | 6 | 4:1 MUX |
160
- | multiplexer8to1 | 1 | 11 | 8:1 MUX |
161
- | demultiplexer1to2 | 4 | 6 | 1:2 DEMUX |
162
- | demultiplexer1to4 | 1 | 3 | 1:4 DEMUX |
163
- | demultiplexer1to8 | 1 | 4 | 1:8 DEMUX |
164
- | encoder8to3 | 6 | 27 | 8:3 priority encoder |
165
- | decoder3to8 | 16 | 32 | 3:8 decoder |
166
- | priorityencoder8bit | 1 | 8 | 8-bit priority encoder |
167
- | barrelshifter8bit | 1 | 11 | 8-bit barrel shifter |
168
-
169
- ### Control (16 circuits, 806 params)
170
-
171
- | Circuit | Tensors | Parameters | Description |
172
- |---------|---------|------------|-------------|
173
- | jump | 16 | 16 | Unconditional jump |
174
- | jz | 64 | 88 | Jump if zero |
175
- | jnz | 64 | 88 | Jump if not zero |
176
- | jc | 64 | 88 | Jump if carry |
177
- | jnc | 64 | 88 | Jump if no carry |
178
- | jn | 64 | 88 | Jump if negative |
179
- | jp | 64 | 88 | Jump if positive |
180
- | jv | 64 | 88 | Jump if overflow |
181
- | jnv | 64 | 88 | Jump if no overflow |
182
- | conditionaljump | 64 | 88 | Generic conditional |
183
- | push | 2 | 2 | Push to stack |
184
- | pop | 2 | 2 | Pop from stack |
185
- | call | 2 | 2 | Call subroutine |
186
- | ret | 2 | 2 | Return |
187
- | sp_inc | 1 | 1 | Increment stack pointer |
188
- | sp_dec | 1 | 1 | Decrement stack pointer |
189
-
190
- ### Error Detection (11 circuits, 116 params)
191
-
192
- | Circuit | Tensors | Parameters | Description |
193
- |---------|---------|------------|-------------|
194
- | paritychecker8bit | 2 | 9 | 8-bit parity checker |
195
- | paritygenerator8bit | 2 | 9 | 8-bit parity generator |
196
- | evenparitychecker | 2 | 9 | Even parity |
197
- | oddparitychecker | 4 | 11 | Odd parity |
198
- | checksum8bit | 2 | 9 | 8-bit checksum |
199
- | crc4 | 1 | 5 | CRC-4 |
200
- | crc8 | 1 | 9 | CRC-8 |
201
- | hammingencode4bit | 6 | 12 | Hamming(7,4) encoder |
202
- | hammingdecode7bit | 6 | 15 | Hamming(7,4) decoder |
203
- | hammingsyndrome | 3 | 12 | Hamming syndrome |
204
- | longitudinalparity | 2 | 16 | Longitudinal parity |
205
-
206
- ### Modular Arithmetic (11 circuits, 99 params)
207
-
208
- | Circuit | Tensors | Parameters | Weights |
209
- |---------|---------|------------|---------|
210
- | mod2 | 2 | 9 | [1, -1, 1, -1, 1, -1, 1, -1] |
211
- | mod3 | 2 | 9 | [1, 1, -2, 1, 1, -2, 1, 1] |
212
- | mod4 | 2 | 9 | [1, 1, 1, -3, 1, 1, 1, -3] |
213
- | mod5 | 2 | 9 | [1, 1, 1, 1, -4, 1, 1, 1] |
214
- | mod6 | 2 | 9 | [1, 1, 1, 1, 1, -5, 1, 1] |
215
- | mod7 | 2 | 9 | [1, 1, 1, 1, 1, 1, -6, 1] |
216
- | mod8 | 2 | 9 | [1, 1, 1, 1, 1, 1, 1, -7] |
217
- | mod9 | 2 | 9 | [1, 1, 1, 1, 1, 1, 1, 1] |
218
- | mod10 | 2 | 9 | [1, 1, 1, 1, 1, 1, 1, 1] |
219
- | mod11 | 2 | 9 | [1, 1, 1, 1, 1, 1, 1, 1] |
220
- | mod12 | 2 | 9 | [1, 1, 1, 1, 1, 1, 1, 1] |
221
-
222
- ### Pattern Recognition (10 circuits, 125 params)
223
-
224
- | Circuit | Tensors | Parameters | Description |
225
- |---------|---------|------------|-------------|
226
- | popcount | 2 | 9 | Population count (Hamming weight) |
227
- | allones | 2 | 9 | Detect all 1s |
228
- | allzeros | 2 | 9 | Detect all 0s |
229
- | alternating8bit | 2 | 16 | Detect alternating pattern |
230
- | hammingdistance8bit | 2 | 24 | Hamming distance |
231
- | leadingones | 1 | 8 | Count leading ones |
232
- | trailingones | 1 | 8 | Count trailing ones |
233
- | symmetry8bit | 6 | 13 | Detect palindrome pattern |
234
- | runlength | 1 | 8 | Run length encoding |
235
- | onehotdetector | 6 | 21 | Detect one-hot encoding |
236
-
237
- ### Threshold (13 circuits, 117 params)
238
-
239
- | Circuit | Tensors | Parameters | Weights | Bias | Fires when |
240
- |---------|---------|------------|---------|------|------------|
241
- | oneoutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -1 | >= 1 of 8 |
242
- | twooutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -2 | >= 2 of 8 |
243
- | threeoutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -3 | >= 3 of 8 |
244
- | fouroutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -4 | >= 4 of 8 |
245
- | fiveoutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -5 | >= 5 of 8 |
246
- | sixoutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -6 | >= 6 of 8 |
247
- | sevenoutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -7 | >= 7 of 8 |
248
- | alloutof8 | 2 | 9 | [1,1,1,1,1,1,1,1] | -8 | = 8 of 8 |
249
- | majority | 2 | 9 | [1,1,1,1,1,1,1,1] | -5 | > 50% |
250
- | minority | 2 | 9 | [-1,-1,-1,-1,-1,-1,-1,-1] | 3 | <= 37.5% |
251
- | atleastk_4 | 2 | 9 | [1,1,1,1,1,1,1,1] | -4 | >= k |
252
- | atmostk_4 | 2 | 9 | [-1,-1,-1,-1,-1,-1,-1,-1] | 4 | <= k |
253
- | exactlyk_4 | 6 | 21 | 2-layer network | | = k |
254
-
255
- ## Example Programs
256
-
257
- ### FizzBuzz
258
 
259
  ```python
260
- mod3_w = weights['modular.mod3.weight'] # [1, 1, -2, 1, 1, -2, 1, 1]
261
- mod5_w = weights['modular.mod5.weight'] # [1, 1, 1, 1, -4, 1, 1, 1]
262
-
263
- for n in range(1, 16):
264
- bits = int_to_bits(n)
265
- div3 = (weighted_sum(bits, mod3_w, 0) % 3) == 0
266
- div5 = (weighted_sum(bits, mod5_w, 0) % 5) == 0
267
-
268
- if div3 and div5: print("FizzBuzz")
269
- elif div3: print("Fizz")
270
- elif div5: print("Buzz")
271
- else: print(n)
272
  ```
273
 
274
- ### Rock-Paper-Scissors
275
 
276
- ```python
277
- def play_round(player, computer):
278
- xor_result = alu_xor(player, computer)
279
- if bits_to_int(xor_result) == 0:
280
- return "Draw"
281
- diff = alu_sub(player, computer)
282
- return "Player wins" if (diff + 3) % 3 == 1 else "Computer wins"
283
- ```
284
 
285
- ### Sum 1 to N
286
 
287
- ```assembly
288
- LDI R0, 0 ; sum = 0
289
- LDI R1, 10 ; n = 10
290
- loop:
291
- ADD R0, R0, R1 ; sum += n
292
- DEC R1, R1 ; n--
293
- JNZ loop ; if n != 0, continue
294
- ; Result: R0 = 55
295
- ```
296
 
297
- ### Fibonacci
298
-
299
- ```assembly
300
- LDI R0, 1 ; fib(n-2) = 1
301
- LDI R1, 1 ; fib(n-1) = 1
302
- LDI R2, 6 ; iterations
303
- loop:
304
- ADD R3, R0, R1 ; fib(n) = fib(n-2) + fib(n-1)
305
- MOV R0, R1
306
- MOV R1, R3
307
- DEC R2, R2
308
- JNZ loop
309
- ; Result: R1 = 21 (fib(8))
310
- ```
311
 
312
- ## Hardware Compatibility
313
 
314
- All weights are integers. All activations are Heaviside step function. Designed for direct deployment on:
315
 
316
- - **Intel Loihi** - Neuromorphic research chip
317
- - **IBM TrueNorth** - 1M neuron chip
318
- - **BrainChip Akida** - Edge neuromorphic processor
 
319
 
320
- ## Verification
321
 
322
- Circuit weights derived from axiom-free Coq proofs:
323
 
324
- 1. **Exhaustive verification** - All inputs tested
325
- 2. **Universal quantification** - Symbolic proofs over all boolean combinations
326
- 3. **Algebraic characterization** - Weight patterns proven correct
327
 
328
- Full Coq proofs: [github.com/CharlesCNorton/coq-circuits](https://github.com/CharlesCNorton/coq-circuits)
 
329
 
330
- ## Tensor Naming Convention
 
331
 
 
 
 
 
 
 
332
  ```
333
- {category}.{circuit}.{layer}.{component}.{weight|bias}
334
-
335
- Examples:
336
- boolean.and.weight
337
- boolean.xor.layer1.or.weight
338
- alu.alu8bit.xor.layer2.bias
339
- control.jz.mux.bit0.weight
340
- arithmetic.ripplecarry8bit.fa7.sum.layer1.or.weight
341
- ```
 
 
342
 
343
  ## Citation
344
 
345
  ```bibtex
346
- @software{threshold_computer_2025,
347
- title={8bit-threshold-computer: Turing-Complete Threshold Logic Computer},
348
- author={Norton, Charles},
349
- url={https://huggingface.co/phanerozoic/8bit-threshold-computer},
350
- year={2025},
351
- note={93 verified circuits, 2386 parameters}
352
  }
353
  ```
354
 
355
- ## Links
 
 
 
 
 
 
 
 
 
 
 
 
 
356
 
357
- - [GitHub Repository](https://github.com/CharlesCNorton/coq-circuits)
358
- - [Coq Proofs](https://github.com/CharlesCNorton/coq-circuits/tree/main/coq)
359
- - [Individual Circuit Models](https://huggingface.co/phanerozoic)
 
1
+ # 8bit-threshold-computer-10166
2
+
3
+ **A Turing-complete 8-bit CPU implemented as threshold logic gates.**
4
+
5
+ This is the original, uncompressed model containing 10,166 bits of information.
6
+
7
+ ```
8
+ Parameters: 2,392
9
+ Unique Weights: 19
10
+ Information: 10,166 bits
11
+ ```
12
+
13
  ---
14
 
15
+ ## Naming Convention
16
 
17
+ The number in the repo name represents the **information content in bits**:
18
 
19
+ ```
20
+ Bits = Parameters × log₂(Unique Weights)
21
+ = 2,392 × log₂(19)
22
+ = 2,392 × 4.25
23
+ = 10,166 bits
24
+ ```
25
+
26
+ This naming scheme allows direct comparison of model complexity across the family:
27
 
28
+ | Model | Parameters | Unique Weights | Bits | Compression |
29
+ |-------|------------|----------------|------|-------------|
30
+ | **8bit-threshold-computer-10166** | 2,392 | 19 | **10,166** | Original |
31
+ | [8bit-threshold-computer-1640](https://huggingface.co/phanerozoic/8bit-threshold-computer-1640) | 386 | 19 | 1,640 | Pattern deduplication |
32
+ | [8bit-threshold-computer-772](https://huggingface.co/phanerozoic/8bit-threshold-computer-772) | 386 | 4 | 772 | Evolutionary minimization |
33
+
34
+ Lower bits = more compressed = same computation in less information.
35
+
36
+ ---
37
+
38
+ ## What Is This?
39
+
40
+ A complete 8-bit processor where every logic gate is implemented as a threshold neuron:
41
+
42
+ ```
43
+ output = 1 if (Σ wᵢxᵢ + b) ≥ 0
44
+ 0 otherwise
45
+ ```
46
 
47
  | Component | Specification |
48
  |-----------|---------------|
49
+ | Registers | 4 × 8-bit general purpose |
50
+ | Memory | 256 bytes addressable |
51
+ | ALU | 16 operations (ADD, SUB, AND, OR, XOR, NOT, SHL, SHR, INC, DEC, CMP, NEG, PASS, ZERO, ONES, NOP) |
52
+ | Flags | Zero, Negative, Carry, Overflow |
53
+ | Control | JMP, JZ, JNZ, JC, JNC, JN, JP, JV, JNV, CALL, RET, PUSH, POP |
 
 
 
 
 
 
 
 
 
 
54
 
55
+ **Turing complete.** Verified against 95 programs including loops, recursion, and self-modification.
56
 
57
+ ---
 
 
58
 
59
+ ## Model Structure
 
 
 
60
 
61
+ This model stores each circuit component as a separate tensor:
 
 
62
 
63
+ | Metric | Value |
64
+ |--------|-------|
65
+ | Total tensors | 1,194 |
66
+ | Total parameters | 2,392 |
67
+ | Unique weight values | 19 |
68
+ | File size | 119,960 bytes (~120 KB) |
69
 
70
+ ### Weight Vocabulary
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
71
 
72
  ```python
73
+ [-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 8, 16, 32, 64, 128, 256]
 
 
 
 
 
 
 
 
 
 
 
74
  ```
75
 
76
+ These 19 values are sufficient to implement all Boolean logic and arithmetic circuits.
77
 
78
+ ---
 
 
 
 
 
 
 
79
 
80
+ ## Circuit Categories
81
 
82
+ The 1,194 tensors implement 93 distinct circuit types:
 
 
 
 
 
 
 
 
83
 
84
+ | Category | Circuits | Examples |
85
+ |----------|----------|----------|
86
+ | Boolean | 10 | AND, OR, NOT, NAND, NOR, XOR, XNOR, IMPLIES, BIIMPLIES |
87
+ | Arithmetic | 18 | Half adder, full adder, 2/4/8-bit ripple carry, comparators |
88
+ | ALU | 8 | 8-bit ADD, SUB, AND, OR, XOR, NOT, SHL, SHR + control |
89
+ | Combinational | 12 | MUX (2:1, 4:1, 8:1), DEMUX, encoders, decoders, barrel shifter |
90
+ | Control Flow | 15 | JMP, conditional jumps (8 types), CALL, RET, PUSH, POP |
91
+ | Error Detection | 12 | Parity, checksum, CRC-4/8, Hamming encode/decode |
92
+ | Threshold | 10 | k-of-n gates, majority, minority |
93
+ | Pattern Recognition | 8 | Popcount, leading/trailing ones, symmetry detection |
 
 
 
 
94
 
95
+ ---
96
 
97
+ ## Files
98
 
99
+ | File | Description |
100
+ |------|-------------|
101
+ | `neural_computer.safetensors` | All 1,194 circuit tensors (120 KB) |
102
+ | `turing_completeness_test.py` | Verification suite |
103
 
104
+ ---
105
 
106
+ ## Usage
107
 
108
+ ```python
109
+ from safetensors.torch import load_file
 
110
 
111
+ # Load model
112
+ tensors = load_file("neural_computer.safetensors")
113
 
114
+ print(f"Tensors: {len(tensors)}")
115
+ # Output: Tensors: 1194
116
 
117
+ # Check weight vocabulary
118
+ all_weights = set()
119
+ for t in tensors.values():
120
+ all_weights.update(t.flatten().tolist())
121
+ print(f"Unique weights: {len(all_weights)}")
122
+ # Output: Unique weights: 19
123
  ```
124
+
125
+ ---
126
+
127
+ ## Compression Opportunity
128
+
129
+ Many of the 1,194 tensors are **duplicates** — the same weight pattern reused across different circuits. This model can be compressed via:
130
+
131
+ 1. **Pattern deduplication** → [8bit-threshold-computer-1640](https://huggingface.co/phanerozoic/8bit-threshold-computer-1640)
132
+ 2. **Weight vocabulary minimization** → [8bit-threshold-computer-772](https://huggingface.co/phanerozoic/8bit-threshold-computer-772)
133
+
134
+ ---
135
 
136
  ## Citation
137
 
138
  ```bibtex
139
+ @misc{8bit-threshold-computer-10166,
140
+ title={8bit-threshold-computer-10166: A Threshold Logic CPU},
141
+ author={phanerozoic},
142
+ year={2026},
143
+ howpublished={Hugging Face},
144
+ url={https://huggingface.co/phanerozoic/8bit-threshold-computer-10166}
145
  }
146
  ```
147
 
148
+ ---
149
+
150
+ ## License
151
+
152
+ MIT
153
+
154
+ ---
155
+
156
+ ## See Also
157
+
158
+ - [8bit-threshold-computer-1640](https://huggingface.co/phanerozoic/8bit-threshold-computer-1640) — Pattern-deduplicated (6.2× smaller)
159
+ - [8bit-threshold-computer-772](https://huggingface.co/phanerozoic/8bit-threshold-computer-772) — Evolutionarily minimized (13.2× smaller)
160
+
161
+ ---
162
 
163
+ *2,392 parameters. 19 weights. 10,166 bits. The original.*