Add PC Load MUX - 50 tensors, 1536/1536 tests pass

neural_computer.safetensors

@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:66c5573e13ed7339e77897da494a847a31d1244dcb883cbc1d82980d20cdccf9
-size 674476
+oid sha256:1d4d6d5a39d660390c5156d33b6ad3d5a2f49538a89ce0f2fcbb74e4c4ccb07a
+size 679380

tensors.txt

@@ -1,5 +1,5 @@
 # Tensor Manifest
-# Total: 6090 tensors
+# Total: 6140 tensors
 
 alu.alu8bit.add.bias: shape=[1], values=[0.0]
 alu.alu8bit.add.weight: shape=[16], values=[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0]
@@ -5677,6 +5677,56 @@ control.pc_inc.xor7.layer1.or.bias: shape=[1], values=[-1.0]
 control.pc_inc.xor7.layer1.or.weight: shape=[2], values=[1.0, 1.0]
 control.pc_inc.xor7.layer2.bias: shape=[1], values=[-2.0]
 control.pc_inc.xor7.layer2.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit0.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit0.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit0.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit0.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit0.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit0.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit1.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit1.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit1.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit1.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit1.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit1.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit2.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit2.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit2.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit2.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit2.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit2.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit3.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit3.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit3.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit3.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit3.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit3.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit4.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit4.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit4.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit4.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit4.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit4.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit5.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit5.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit5.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit5.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit5.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit5.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit6.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit6.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit6.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit6.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit6.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit6.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit7.and_jump.bias: shape=[1], values=[-2.0]
+control.pc_load.bit7.and_jump.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit7.and_pc.bias: shape=[1], values=[-2.0]
+control.pc_load.bit7.and_pc.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.bit7.or.bias: shape=[1], values=[-1.0]
+control.pc_load.bit7.or.weight: shape=[2], values=[1.0, 1.0]
+control.pc_load.not_jump.bias: shape=[1], values=[0.0]
+control.pc_load.not_jump.weight: shape=[1], values=[-1.0]
 control.pop.load: shape=[1], values=[1.0]
 control.pop.sp_inc: shape=[1], values=[1.0]
 control.push.sp_dec: shape=[1], values=[1.0]

todo.md

@@ -8,7 +8,7 @@
 | DIV                     | Division circuit            | DONE - 1984 tensors, 65280/65280 tests pass |
 | NEG                     | Two's complement negate     | DONE - 76 tensors, 256/256 tests pass |
 | Program Counter         | PC incrementer              | DONE - 62 tensors, 256/256 tests pass |
-| PC Load                 | Load PC from jump target    | Missing                        |
+| PC Load                 | 2-to-1 MUX for PC/jump      | DONE - 50 tensors, 1536/1536 tests pass |
 | Register File MUX       | Select 1-of-4 GPRs          | DONE - 84 tensors, 1036/1036 tests pass |
 | Register Write Enable   | Write back to register      | Missing                        |
 | Memory Address Register | MAR latch                   | Missing                        |