Wire all 8 conditional jumps into CPU via imm8[2:0] encoding

- Expand opcode 0xD to support Z/NZ/C/NC/N/P/V/NV conditions
- Update ref_step() and ThresholdCPU.step() with condition dispatch
- Fix README: tensor count 6296→9429, iron_eval.py→eval.py
- Document Jcc encoding in instruction table

README.md

@@ -17,8 +17,8 @@ tags:
 Every logic gate is a threshold neuron: `output = 1 if (Σ wᵢxᵢ + b) ≥ 0 else 0`
 
 ```
-Tensors:    6,296
-Parameters: 8,267,667
+Tensors:    9,429
+Parameters: 8,286,614
 ```
 
 ---
@@ -103,7 +103,7 @@ A self-contained, autonomous computational machine:
 | 0xA | LOAD | R[d] = M[addr] |
 | 0xB | STORE | M[addr] = R[s] |
 | 0xC | JMP | PC = addr |
-| 0xD | JZ/JNZ | PC = addr if flag |
+| 0xD | Jcc | PC = addr if cond (imm8[2:0]: 0=Z,1=NZ,2=C,3=NC,4=N,5=P,6=V,7=NV) |
 | 0xE | CALL | push PC; PC = addr |
 | 0xF | HALT | stop execution |
 
@@ -228,10 +228,10 @@ Interpretation:
 
 ## Verification
 
-The model includes `iron_eval.py` which exhaustively tests all circuits:
+The model includes `eval.py` which exhaustively tests all circuits:
 
 ```bash
-python iron_eval.py
+python eval.py
 # Output: Fitness: 1.000000
 ```
 

threshold_cpu.py

@@ -221,7 +221,24 @@ def ref_step(state: CPUState) -> CPUState:
         s.pc = addr16 & 0xFFFF
         write_result = False
     elif opcode == 0xD:
-        if s.flags[0] == 1:
+        cond_type = imm8 & 0x7
+        if cond_type == 0:
+            take_branch = s.flags[0] == 1
+        elif cond_type == 1:
+            take_branch = s.flags[0] == 0
+        elif cond_type == 2:
+            take_branch = s.flags[2] == 1
+        elif cond_type == 3:
+            take_branch = s.flags[2] == 0
+        elif cond_type == 4:
+            take_branch = s.flags[1] == 1
+        elif cond_type == 5:
+            take_branch = s.flags[1] == 0
+        elif cond_type == 6:
+            take_branch = s.flags[3] == 1
+        else:
+            take_branch = s.flags[3] == 0
+        if take_branch:
             s.pc = addr16 & 0xFFFF
         else:
             s.pc = next_pc_ext
@@ -594,17 +611,29 @@ class ThresholdCPU:
             s.pc = addr16 & 0xFFFF
             write_result = False
         elif opcode == 0xD:
+            cond_type = imm8 & 0x7
+            cond_circuits = [
+                ("control.jz", 0),
+                ("control.jnz", 0),
+                ("control.jc", 2),
+                ("control.jnc", 2),
+                ("control.jn", 1),
+                ("control.jp", 1),
+                ("control.jv", 3),
+                ("control.jnv", 3),
+            ]
+            circuit_prefix, flag_idx = cond_circuits[cond_type]
             hi_pc = self._conditional_jump_byte(
-                "control.jz",
+                circuit_prefix,
                 (next_pc_ext >> 8) & 0xFF,
                 (addr16 >> 8) & 0xFF,
-                s.flags[0],
+                s.flags[flag_idx],
             )
             lo_pc = self._conditional_jump_byte(
-                "control.jz",
+                circuit_prefix,
                 next_pc_ext & 0xFF,
                 addr16 & 0xFF,
-                s.flags[0],
+                s.flags[flag_idx],
             )
             s.pc = ((hi_pc & 0xFF) << 8) | (lo_pc & 0xFF)
             write_result = False