8-bit threshold-logic CPU family: ternary-weight gate networks from a one-instruction SUBLEQ machine to an RV32IM plus F-subset RISC-V processor that runs stock-compiler C; composed IEEE-754 float pipelines with round-to-nearest-even bit-exact to hardware and metadata-driven verification; fully-wired rv32 datapath, FCVT int/float conversions, single gate-routed CPU runtime, leveled fast evaluation; single-file docs and consolidated machine runtime; strict-ternary build
db536d3 - Xet hash:
- fc2d4dd9a82d593d8f4a5b2e67768ba186e017d348888f94f33c6ad918cf8855
- Size of remote file:
- 17.3 MB
- SHA256:
- 69ff9e584d08c9707e2932bc0f62cf89cd7167a453065146252c6b7cdb57cbc4
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