remove the superseded standalone float normalize stages from the core generators and their structure checks; the composed pipelines carry their own normalizers

src/build.py

@@ -1035,7 +1035,7 @@ def add_neg_nbits(tensors: Dict[str, torch.Tensor], bits: int) -> None:
 
 
 def add_float16_core(tensors: Dict[str, torch.Tensor]) -> None:
-    """Add float16 core circuits (unpack, pack, classify, normalize).
+    """Add float16 core circuits (unpack, pack, classify).
 
     IEEE 754 half-precision format (16 bits):
     - Bit 15: Sign (0=positive, 1=negative)
@@ -1065,27 +1065,6 @@ def add_float16_core(tensors: Dict[str, torch.Tensor]) -> None:
     add_gate(tensors, f"{prefix}.classify.is_inf.and", [1.0, 1.0], [-2.0])
     add_gate(tensors, f"{prefix}.classify.is_nan.and", [1.0, 1.0], [-2.0])
 
-    for stage in range(4):
-        shift = 1 << (3 - stage)
-        for bit in range(11):
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.not_sel", [-1.0], [0.0])
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.and_a", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.and_b", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.or", [1.0, 1.0], [-1.0])
-
-    for stage in range(4):
-        shift = 1 << (3 - stage)
-        for bit in range(5):
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.sum.layer1.or", [1.0, 1.0], [-1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.sum.layer1.nand", [-1.0, -1.0], [1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.sum.layer2", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.carry", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.sum.layer1.or", [1.0, 1.0], [-1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.sum.layer1.nand", [-1.0, -1.0], [1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.sum.layer2", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.carry", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.carry_or", [1.0, 1.0], [-1.0])
-
     for i in range(16):
         add_gate(tensors, f"{prefix}.pack.bit{i}", [1.0], [-1.0])
 
@@ -1773,7 +1752,7 @@ def add_float16_cmp(tensors: Dict[str, torch.Tensor]) -> None:
 
 
 def add_float32_core(tensors: Dict[str, torch.Tensor]) -> None:
-    """Add float32 core circuits (unpack, pack, classify, normalize).
+    """Add float32 core circuits (unpack, pack, classify).
 
     IEEE 754 single-precision format (32 bits):
     - Bit 31: Sign
@@ -1797,26 +1776,6 @@ def add_float32_core(tensors: Dict[str, torch.Tensor]) -> None:
     add_gate(tensors, f"{prefix}.classify.is_inf.and", [1.0, 1.0], [-2.0])
     add_gate(tensors, f"{prefix}.classify.is_nan.and", [1.0, 1.0], [-2.0])
 
-    for stage in range(5):
-        shift = 1 << (4 - stage)
-        for bit in range(24):
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.not_sel", [-1.0], [0.0])
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.and_a", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.and_b", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.stage{stage}.bit{bit}.or", [1.0, 1.0], [-1.0])
-
-    for stage in range(5):
-        for bit in range(8):
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.sum.layer1.or", [1.0, 1.0], [-1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.sum.layer1.nand", [-1.0, -1.0], [1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.sum.layer2", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha1.carry", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.sum.layer1.or", [1.0, 1.0], [-1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.sum.layer1.nand", [-1.0, -1.0], [1.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.sum.layer2", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.ha2.carry", [1.0, 1.0], [-2.0])
-            add_gate(tensors, f"{prefix}.normalize.exp_adj.stage{stage}.fa{bit}.carry_or", [1.0, 1.0], [-1.0])
-
     for i in range(32):
         add_gate(tensors, f"{prefix}.pack.bit{i}", [1.0], [-1.0])
 
@@ -5056,7 +5015,7 @@ def cmd_alu(args) -> None:
     print("\nGenerating float16 core circuits...")
     try:
         add_float16_core(tensors)
-        print("  Added float16 unpack/pack/classify/normalize")
+        print("  Added float16 unpack/pack/classify")
     except ValueError as e:
         print(f"  float16 core already exists: {e}")
 
@@ -5091,7 +5050,7 @@ def cmd_alu(args) -> None:
     print("\nGenerating float32 core circuits...")
     try:
         add_float32_core(tensors)
-        print("  Added float32 unpack/pack/classify/normalize")
+        print("  Added float32 unpack/pack/classify")
     except ValueError as e:
         print(f"  float32 core already exists: {e}")
 

src/eval.py

@@ -4212,9 +4212,6 @@ class BatchedFitnessEvaluator:
             ('float16.classify.frac_zero.weight', (10,)),
             ('float16.classify.is_zero.and.weight', (2,)),
             ('float16.classify.is_nan.and.weight', (2,)),
-            ('float16.normalize.stage0.bit0.not_sel.weight', (1,)),
-            ('float16.normalize.stage0.bit0.and_a.weight', (2,)),
-            ('float16.normalize.stage0.bit0.or.weight', (2,)),
             ('float16.pack.bit0.weight', (1,)),
         ]
 
@@ -4415,7 +4412,6 @@ class BatchedFitnessEvaluator:
             ('float32.classify.frac_zero.weight', (23,)),
             ('float32.classify.is_zero.and.weight', (2,)),
             ('float32.classify.is_nan.and.weight', (2,)),
-            ('float32.normalize.stage0.bit0.not_sel.weight', (1,)),
             ('float32.pack.bit0.weight', (1,)),
         ]
 

todo.md

@@ -2,9 +2,6 @@
 
 Unfinished work.
 
-- The float add, multiply, and divide pipelines handle subnormal operands and produce subnormal results rather than flushing them to zero.
 - The F extension includes a fused multiply-add instruction that rounds once.
 - Program-counter sequencing and instruction decode are computed by threshold gates rather than by fixed wiring in the runtimes.
-- The standalone float normalize stages, superseded by the composed pipelines' own normalizers, are removed from the circuit inventory.
-- Every gate in the 32-bit multiply circuit resolves its .inputs to a defined signal.
 - A machine-checked correctness proof relates the shipped weights to the ISA.