Add neural_reflect: a threshold interpreter whose state holds its own weights

README.md

@@ -37,10 +37,11 @@ variants/neural_subleq8.safetensors                              one-instruction
 variants/neural_rv32.safetensors                                 RV32IM + F-subset RISC-V processor
 variants/neural_matrix8.safetensors                              the CPU as one recurrent ternary matrix stack
 variants/neural_subleq8io.safetensors                            SUBLEQ host for the universal constructor
+variants/neural_reflect.safetensors                              interpreter whose state holds its own weights
 ```
 
-Four further machines are detailed in their own sections below, and together
-they carry the family from the smallest possible processor to two results
+Five further machines are detailed in their own sections below, and together
+they carry the family from the smallest possible processor to three results
 about what a threshold network can be. `neural_subleq8` is a Turing-complete
 one-instruction computer whose entire control flow is a single threshold
 neuron. `neural_rv32` is a RISC-V processor (RV32IM plus an F subset) that
@@ -49,10 +50,13 @@ self-referential NEUR opcode. `neural_matrix8` drops the gate graph entirely:
 the whole processor is compiled into a fixed stack of ternary weight matrices
 with a Heaviside step between them, so one clock cycle is one matrix-vector
 product followed by thresholding, exactly what a resistive or photonic
-crossbar computes. And `neural_subleq8io` hosts a universal constructor: a
+crossbar computes. `neural_subleq8io` hosts a universal constructor: a
 program that reads a description of any machine in the family and prints that
 machine's weight file byte for byte, self-reproduction being the case where
-the description is its own.
+the description is its own. And `neural_reflect` removes the last fixed part:
+its transition is a ternary threshold network whose weights are stored in the
+writable state it operates on, so a running program can edit the weights that
+define it.
 
 ---
 
@@ -498,6 +502,54 @@ weights and checked to the byte.
 
 ---
 
+## neural_reflect — an interpreter whose state holds its own weights
+
+Every machine above has a fixed weight tensor: the weights define the machine,
+the state is what it operates on, and the two are disjoint. `neural_reflect`
+removes that separation. The state is a flat array of 256 binary signals; a
+192-bit block of them (the NET region) encodes a netlist of six threshold
+gates, and a fixed ternary interpreter U evaluates one stored gate per
+recurrence. It selects gate `gp`, reads that gate's two ternary input weights,
+integer bias, two input addresses, and one output address from the NET bits,
+fetches the two addressed signals, computes `out = H(w0·v0 + w1·v1 + b)`,
+writes `out` to the addressed signal, and advances `gp`. Six recurrences
+evaluate the stored netlist once.
+
+- **The program shares memory with the data.** Addresses index the whole
+  signal array, so a gate's output can target the NET region: a stored gate
+  can overwrite another gate's weight, bias, or wiring. The running program
+  edits the weights that define it (self-modification), and rewriting the NET
+  region replaces the interpreted machine with another one, with no external
+  load step (metamorphosis).
+- **U is fixed and ternary.** The interpreter is one threshold circuit built
+  from the family's cells (address decoders, 2:1 muxes, a ternary
+  multiply-accumulate over full adders, Heaviside), 2,938 gates compiled to 27
+  ternary matrices by `matrix8`'s compiler. Its behavior is set entirely by
+  the netlist bits in the state, not by its own weights.
+- **Physical reading.** One recurrence is one matrix-vector product with a
+  threshold, and the write is a single bit flip in the state. On a memristive
+  crossbar that bit is a conductance, so a program editing the NET region is
+  the computation editing the array's own weights as it runs.
+
+Verified against a reference interpreter: exhaustive single-gate semantics
+(every ternary weight pair, bias, and input assignment), single-step agreement
+on 3,000 random full states plus halted fixed points, lockstep interpretation
+of a composed XOR built from the family's gates, and a program that rewrites
+its own AND gate into an OR gate between sweeps (output `a & b` on the first
+sweep, `a | b` on the second). The compiled matrix form is checked equal to
+the gate graph bit for bit.
+
+```bash
+python src/reflect.py build      # compile + save variants/neural_reflect.safetensors
+python src/reflect.py verify     # reference equality, self-modification, matrix == gate
+```
+
+The constructor prints a machine's weights; this interprets them out of its
+own memory and can rewrite them mid-run. The transition and the state it
+transforms are the same tensor.
+
+---
+
 ## Threshold logic
 
 A threshold gate computes a Boolean function by taking a weighted sum of binary inputs and comparing the result to a threshold; the output is 1 when the sum meets or exceeds the threshold and 0 otherwise. Equivalently, it is a neuron with Heaviside step activation, integer weights, and an integer bias.
@@ -670,8 +722,9 @@ Loss components: BCE on output bits, BCE on extracted A and B bits (2× weight),
 
 ```
 neural_computer.safetensors         canonical model (32-bit, 64 KB, ~8.61M params)
-variants/                           18 fitness variants + 4 standalone machines
-                                    (neural_subleq8, neural_rv32, neural_matrix8, neural_subleq8io)
+variants/                           18 fitness variants + 5 standalone machines
+                                    (neural_subleq8, neural_rv32, neural_matrix8,
+                                     neural_subleq8io, neural_reflect)
 src/                                the library (run scripts as `python src/<name>.py`)
   ├── build.py                      generator (one safetensors per invocation; also `subleq`, `rv32`)
   ├── quantize.py                   min integer dtypes + ternary verification/repair
@@ -681,8 +734,10 @@ src/                                the library (run scripts as `python src/<nam
   │                                 RV32 object loader, and the test suites (subleq / rv32 / rv32-c)
   ├── matrix8.py                    compiles the CPU to a recurrent ternary matrix stack; the
   │                                 exhaustive equality suite and the analog crossbar simulation
-  └── constructor8.py               the neural_subleq8io host, the recipe codec, and the universal
-                                    constructor / self-reproduction suite
+  ├── constructor8.py               the neural_subleq8io host, the recipe codec, and the universal
+  │                                 constructor / self-reproduction suite
+  └── reflect.py                    neural_reflect: a threshold interpreter whose state holds its
+                                    own gate table; reference equality + self-modification suite
 tools/                              build_all.py (build + quantize + verify every profile),
                                     cpu_programs.py (assembler + CPU program suite), test_cpu.py
                                     (program suite vs a variant), play.py (interactive demo),

src/eval_all.py

@@ -623,6 +623,7 @@ MACHINE_VERIFIER = {
     "rv32": "machines.py",
     "matrix8": "matrix8.py",
     "subleq8io": "constructor8.py",
+    "reflect": "reflect.py",
 }
 
 

src/reflect.py

@@ -0,0 +1,524 @@
+"""neural_reflect — a self-interpreting ternary threshold processor whose
+transition is determined by weights stored in its own writable state.
+
+Every other machine in the family has a fixed weight tensor: the weights are
+what the machine is, the state is what it operates on, and the two never
+touch. neural_reflect removes that separation. The state is a flat array of S
+binary signals; a contiguous block of them (the NET region) encodes a netlist
+of G threshold gates, and a fixed ternary interpreter U evaluates one stored
+gate per recurrence:
+
+  1. select gate gp (an interpreter register) from the stored table,
+  2. read its two ternary input weights, integer bias, and two input
+     addresses and one output address (all addresses index the S signals),
+  3. fetch the two addressed signal values (indirect read),
+  4. compute out = H(w0*v0 + w1*v1 + bias),
+  5. write out to the addressed signal (indirect write),
+  6. gp = (gp + 1) mod G.
+
+G recurrences evaluate the whole stored netlist once. Because the addresses
+in step 5 may point into the NET region, a stored gate can overwrite the
+encoding of another gate: the running program edits the weights that define
+it (self-modification), and by rewriting the whole NET region it becomes a
+different machine with no external constructor (metamorphosis). U is a fixed
+ternary threshold circuit ({-1,0,1} weights, integer biases, Heaviside step),
+compiled to a recurrent matrix stack by matrix8's compiler; on a memristive
+crossbar the write in step 5 is a conductance change, so a program editing
+NET is the computation editing the array's own weights.
+
+The interpreter is verified against a reference in four ways: exhaustive
+single-gate semantics, single-step agreement on random full states, lockstep
+interpretation of loaded netlists (a composed XOR built from the family's
+gates, and a program that rewrites its own gate table between sweeps), and
+gate-graph vs matrix-form equality.
+
+Usage:
+    python src/reflect.py build     # compile + save variants/neural_reflect.safetensors
+    python src/reflect.py verify    # reference equality + self-modification + matrix==gate
+    python src/reflect.py all
+"""
+
+from __future__ import annotations
+
+import argparse
+import json
+import os
+import sys
+import time
+from typing import Dict, List, Tuple
+
+import torch
+from safetensors.torch import save_file
+
+sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
+from matrix8 import Net, compile_net
+
+REPO = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
+MODEL_PATH = os.path.join(REPO, "variants", "neural_reflect.safetensors")
+
+# --- configuration (parametric; this instance is the shipped one) ----------
+S = 256            # addressable signal bits (the whole RAM)
+A = 8              # address width, 2**A == S
+G = 6              # stored gates
+F = 2              # inputs per gate (the family builds everything from <=2-in gates)
+WB = 2             # weight-code bits per input
+BB = 4             # bias bits (signed)
+R = F * (A + WB) + BB + A       # 32 bits per gate record
+NET_BASE = S - G * R            # 64: records occupy the high signals
+HALT_SIG = NET_BASE - 1         # 63: a data bit the program raises to halt
+GPW = 3                         # gp register width (ceil(log2 G))
+STATE_BITS = S + GPW + 1        # signals, gp, halt
+
+assert (1 << A) == S and NET_BASE == 64 and R == 32
+
+# record field offsets (MSB-first within the 32-bit record)
+OFF_A0, OFF_W0 = 0, 8
+OFF_A1, OFF_W1 = 10, 18
+OFF_BIAS, OFF_OUT = 20, 24
+
+WCODE = {1: (0, 1), -1: (1, 0), 0: (0, 0)}   # (hi, lo), MSB-first
+
+
+# =============================================================================
+# bit helpers and netlist encoding
+# =============================================================================
+
+def to_bits(v: int, n: int) -> List[int]:
+    return [(v >> (n - 1 - i)) & 1 for i in range(n)]
+
+
+def from_bits(bits: List[int]) -> int:
+    v = 0
+    for b in bits:
+        v = (v << 1) | int(b)
+    return v
+
+
+def signed(bits: List[int]) -> int:
+    v = from_bits(bits)
+    return v - (1 << len(bits)) if bits[0] else v
+
+
+def encode_gate(s0: Tuple[int, int], s1: Tuple[int, int], bias: int, out: int) -> List[int]:
+    """(addr, weight) per input, signed bias, output address -> 32-bit record."""
+    (a0, w0), (a1, w1) = s0, s1
+    rec = [0] * R
+    rec[OFF_A0:OFF_A0 + A] = to_bits(a0, A)
+    rec[OFF_W0:OFF_W0 + WB] = list(WCODE[w0])
+    rec[OFF_A1:OFF_A1 + A] = to_bits(a1, A)
+    rec[OFF_W1:OFF_W1 + WB] = list(WCODE[w1])
+    rec[OFF_BIAS:OFF_BIAS + BB] = to_bits(bias & ((1 << BB) - 1), BB)
+    rec[OFF_OUT:OFF_OUT + A] = to_bits(out, A)
+    return rec
+
+
+NOOP = ((0, 0), (0, 0), -1, HALT_SIG - 1)   # weights 0, bias<0 -> writes 0 to a scratch bit
+
+
+def encode_netlist(gates: List[tuple]) -> List[int]:
+    """Pack up to G gate records into the NET region (returns G*R bits)."""
+    assert len(gates) <= G
+    padded = list(gates) + [NOOP] * (G - len(gates))
+    out: List[int] = []
+    for (s0, s1, bias, o) in padded:
+        out += encode_gate(s0, s1, bias, o)
+    return out
+
+
+def make_state(signals: List[int], gp: int = 0, halt: int = 0,
+               netlist: List[tuple] | None = None) -> dict:
+    sig = list(signals) + [0] * (S - len(signals))
+    if netlist is not None:
+        sig[NET_BASE:S] = encode_netlist(netlist)
+    return {"sig": sig[:S], "gp": gp, "halt": int(halt)}
+
+
+# =============================================================================
+# reference interpreter (one stored gate per step)
+# =============================================================================
+
+def ref_step(st: dict) -> dict:
+    sig, gp, halt = list(st["sig"]), st["gp"], st["halt"]
+    if halt:
+        return {"sig": sig, "gp": gp, "halt": halt}
+    base = NET_BASE + gp * R
+    rec = sig[base:base + R]
+
+    def wval(hilo):
+        hi, lo = hilo
+        if (hi, lo) == (0, 1):
+            return 1
+        if (hi, lo) == (1, 0):
+            return -1
+        return 0
+
+    a0 = from_bits(rec[OFF_A0:OFF_A0 + A]); w0 = wval((rec[OFF_W0], rec[OFF_W0 + 1]))
+    a1 = from_bits(rec[OFF_A1:OFF_A1 + A]); w1 = wval((rec[OFF_W1], rec[OFF_W1 + 1]))
+    bias = signed(rec[OFF_BIAS:OFF_BIAS + BB])
+    oa = from_bits(rec[OFF_OUT:OFF_OUT + A])
+    acc = w0 * sig[a0] + w1 * sig[a1] + bias
+    out = 1 if acc >= 0 else 0
+    h = sig[HALT_SIG]              # halt latches from the pre-write value, as U does
+    sig[oa] = out
+    ngp = 0 if gp == G - 1 else gp + 1
+    nhalt = 1 if (halt or h) else 0
+    return {"sig": sig, "gp": ngp, "halt": nhalt}
+
+
+# =============================================================================
+# the interpreter as a fixed ternary threshold circuit
+# =============================================================================
+
+def build_reflect_net() -> Tuple[Net, List[str], List[str]]:
+    net = Net()
+    sig = [f"s{i}" for i in range(S)]
+    gp = [f"gp{k}" for k in range(GPW)]
+    halt = "halt"
+    nhalt = net.NOT("nhalt", halt)
+
+    # gate select (gp one-hot over 0..G-1)
+    gp_oh = [net.DECODE(f"gpoh{g}", gp, g) for g in range(G)]
+
+    # read the selected record: recbit[r] = OR_g (gp_oh[g] AND NET[g,r])
+    recbit = []
+    for r in range(R):
+        terms = [net.AND(f"rb{r}g{g}", [gp_oh[g], sig[NET_BASE + g * R + r]]) for g in range(G)]
+        recbit.append(net.OR(f"rb{r}", terms))
+
+    a0 = recbit[OFF_A0:OFF_A0 + A]
+    w0 = (recbit[OFF_W0], recbit[OFF_W0 + 1])
+    a1 = recbit[OFF_A1:OFF_A1 + A]
+    w1 = (recbit[OFF_W1], recbit[OFF_W1 + 1])
+    biasbits = recbit[OFF_BIAS:OFF_BIAS + BB]
+    oabits = recbit[OFF_OUT:OFF_OUT + A]
+
+    # indirect reads: val_j = OR_s ( decode(addr_j)==s AND sig[s] )
+    def read(addrbits, tag):
+        terms = []
+        for s in range(S):
+            oh = net.DECODE(f"rd{tag}oh{s}", addrbits, s)
+            terms.append(net.AND(f"rd{tag}a{s}", [oh, sig[s]]))
+        return net.OR(f"rd{tag}", terms)
+
+    v0 = read(a0, "0")
+    v1 = read(a1, "1")
+
+    # ternary contribution c_j in {-1,0,1}, two's complement (bit0 magnitude, sign)
+    def contrib(w, v, tag):
+        hi, lo = w
+        pos = net.AND(f"pos{tag}", [net.NOT(f"nhi{tag}", hi), lo])
+        neg = net.AND(f"neg{tag}", [hi, net.NOT(f"nlo{tag}", lo)])
+        mag = net.OR(f"mag{tag}", [net.AND(f"tp{tag}", [pos, v]),
+                                   net.AND(f"tn{tag}", [neg, v])])
+        sign = net.AND(f"csgn{tag}", [neg, v])
+        return mag, sign
+
+    m0, sg0 = contrib(w0, v0, "0")
+    m1, sg1 = contrib(w1, v1, "1")
+
+    # acc = c0 + c1 + bias over 6-bit two's complement (LSB-first), out = acc >= 0
+    W6 = 6
+
+    def c_lsb(mag, sign):
+        return [mag] + [sign] * (W6 - 1)
+
+    def bias_lsb():
+        b = biasbits  # MSB-first [b3(sign) b2 b1 b0]
+        lo = [b[3], b[2], b[1], b[0]]          # b0..b3 LSB-first
+        return lo + [b[0]] * (W6 - BB)         # sign-extend b3
+
+    def ripple(pfx, a_lsb, b_lsb):
+        c = "#0"
+        out = []
+        for k in range(W6):
+            s_, c = net.FA(f"{pfx}.fa{k}", a_lsb[k], b_lsb[k], c)
+            out.append(s_)
+        return out
+
+    s01 = ripple("acc0", c_lsb(m0, sg0), c_lsb(m1, sg1))
+    acc = ripple("acc1", s01, bias_lsb())
+    out = net.NOT("out", acc[W6 - 1])          # acc >= 0  <=>  sign bit 0
+
+    # indirect write: sig'[s] = (decode(outaddr)==s AND nhalt) ? out : sig[s]
+    nsig = []
+    for s in range(S):
+        oh = net.DECODE(f"wroh{s}", oabits, s)
+        sel = net.AND(f"wrsel{s}", [oh, nhalt])
+        nsig.append(net.MUX(f"nsig{s}", sel, out, sig[s]))
+
+    # gp' = nhalt ? ((gp == G-1) ? 0 : gp+1) : gp   (3-bit increment)
+    gp_lsb = [gp[GPW - 1 - k] for k in range(GPW)]
+    inc, c = [], "#1"
+    for k in range(GPW):
+        s_ = net.XOR(f"gpinc.x{k}", gp_lsb[k], c)
+        c = net.AND(f"gpinc.c{k}", [gp_lsb[k], c])
+        inc.append(s_)
+    inc_msb = [inc[GPW - 1 - k] for k in range(GPW)]
+    wrapped = [net.MUX(f"gpwrap{k}", gp_oh[G - 1], "#0", inc_msb[k]) for k in range(GPW)]
+    ngp = [net.MUX(f"ngp{k}", nhalt, wrapped[k], gp[k]) for k in range(GPW)]
+
+    nhalt_out = net.OR("halt_next", [halt, sig[HALT_SIG]])
+
+    outputs = nsig + ngp + [nhalt_out]
+    inputs = sig + gp + [halt]
+    return net, inputs, outputs
+
+
+# =============================================================================
+# gate-graph evaluator (independent of the matrix compile) for matrix==gate
+# =============================================================================
+
+def eval_net(net: Net, inputs: List[str], outputs: List[str],
+             values: Dict[str, int]) -> List[int]:
+    v = dict(values)
+    v["#0"], v["#1"] = 0, 1
+    indeg = {g: 0 for g in net.gates}
+    cons: Dict[str, List[str]] = {}
+    for g, (ins, _) in net.gates.items():
+        for s, _w in ins:
+            if s in net.gates:
+                indeg[g] += 1
+            cons.setdefault(s, []).append(g)
+    order = [g for g, d in indeg.items() if d == 0]
+    i = 0
+    while i < len(order):
+        for c in cons.get(order[i], []):
+            if c in net.gates:
+                indeg[c] -= 1
+                if indeg[c] == 0:
+                    order.append(c)
+        i += 1
+    for g in order:
+        ins, b = net.gates[g]
+        acc = b + sum(w * v[s] for s, w in ins)
+        v[g] = 1 if acc >= 0 else 0
+    return [v[o] for o in outputs]
+
+
+# =============================================================================
+# state <-> vector, and the compiled matrix runtime
+# =============================================================================
+
+def state_to_vec(st: dict) -> torch.Tensor:
+    v = torch.zeros(STATE_BITS)
+    v[:S] = torch.tensor(st["sig"], dtype=torch.float32)
+    v[S:S + GPW] = torch.tensor(to_bits(st["gp"], GPW), dtype=torch.float32)
+    v[S + GPW] = float(st["halt"])
+    return v
+
+
+def vec_to_state(v: torch.Tensor) -> dict:
+    b = [int(round(float(x))) for x in v.tolist()]
+    return {"sig": b[:S], "gp": from_bits(b[S:S + GPW]), "halt": b[S + GPW]}
+
+
+class Reflect:
+    HALT_IDX = S + GPW
+
+    def __init__(self, layers, device="cpu"):
+        self.W = [W.to(device=device, dtype=torch.float32) for W, _ in layers]
+        self.B = [B.to(device=device, dtype=torch.float32) for _, B in layers]
+        self.device = device
+
+    def step(self, v: torch.Tensor) -> torch.Tensor:
+        for W, b in zip(self.W, self.B):
+            v = ((v @ W.T + b) >= 0).float()
+        return v
+
+    def run_steps(self, st: dict, n: int) -> dict:
+        v = state_to_vec(st).unsqueeze(0).to(self.device)
+        for _ in range(n):
+            v = self.step(v)
+        return vec_to_state(v[0].cpu())
+
+
+# =============================================================================
+# build
+# =============================================================================
+
+def build(save: bool = True):
+    print("Assembling the interpreter U from the verified cell library...")
+    t0 = time.perf_counter()
+    net, inputs, outputs = build_reflect_net()
+    layers, info = compile_net(net, inputs, outputs)
+    for W, B in layers:
+        assert set(torch.unique(W).tolist()) <= {-1, 0, 1}
+    print(f"  {len(net.gates)} threshold gates -> {info['layers']} ternary matrices "
+          f"(max width {info['max_width']}, {info['total_weights']:,} weights) "
+          f"in {time.perf_counter() - t0:.1f}s")
+    if save:
+        tensors = {f"matrix.layer{i:03d}.weight": W for i, (W, _) in enumerate(layers)}
+        tensors.update({f"matrix.layer{i:03d}.bias": B for i, (_, B) in enumerate(layers)})
+        tensors["manifest.signals"] = torch.tensor([float(S)])
+        tensors["manifest.gates"] = torch.tensor([float(G)])
+        tensors["manifest.state_bits"] = torch.tensor([float(STATE_BITS)])
+        tensors["manifest.layers"] = torch.tensor([float(info["layers"])])
+        tensors["manifest.version"] = torch.tensor([1.0])
+        meta = {"machine": "reflect", "weight_quantization": "ternary",
+                "config": json.dumps({"S": S, "A": A, "G": G, "F": F,
+                                      "record_bits": R, "net_base": NET_BASE,
+                                      "halt_signal": HALT_SIG})}
+        save_file(tensors, MODEL_PATH, metadata=meta)
+        print(f"  saved {MODEL_PATH} ({os.path.getsize(MODEL_PATH) / 1e6:.1f} MB)")
+    return net, inputs, outputs, layers
+
+
+# =============================================================================
+# demonstration netlists
+# =============================================================================
+
+def netlist_xor(a=0, b=1, out=4, t0=2, t1=3):
+    # XOR = AND( OR(a,b), NAND(a,b) ), all from the family's threshold cells.
+    return [((a, 1), (b, 1), -1, t0),        # OR   -> t0
+            ((a, -1), (b, -1), 1, t1),       # NAND -> t1
+            ((t0, 1), (t1, 1), -2, out)]     # AND  -> out
+
+
+def _bias_lsb_signal(gate_index: int) -> int:
+    # signal index of the bias LSB (b0) of gate `gate_index`
+    return NET_BASE + gate_index * R + OFF_BIAS + (BB - 1)
+
+
+def netlist_selfmod(a=0, b=1, out=2):
+    # g0 computes AND(a,b)->out (bias -2). g1 writes 1 into g0's bias LSB,
+    # turning bias -2 (AND) into -1 (OR): the program edits the weights that
+    # define g0, so the interpreted function becomes OR on the next sweep.
+    return [((a, 1), (b, 1), -2, out),                 # g0: AND now, OR after edit
+            ((0, 0), (0, 0), 0, _bias_lsb_signal(0))]  # g1: write 1 -> g0.bias LSB
+
+
+# =============================================================================
+# verify
+# =============================================================================
+
+def _rand_states(n, gen):
+    sig = (torch.rand(n, S, generator=gen) < 0.5).long()
+    gp = torch.randint(0, G, (n,), generator=gen)
+    return sig, gp
+
+
+def verify(refl: Reflect, net, inputs, outputs, device) -> bool:
+    ok = True
+
+    # 1. exhaustive single-gate semantics: selected gate at gp=0, both inputs
+    # placed at fixed addresses, sweep the two ternary weights x both bias signs
+    # x all input assignments; U's write and out bit must match H(w0 v0 + w1 v1 + b).
+    print("[1/4] Exhaustive single-gate semantics "
+          "(all weights x biases x input assignments)")
+    bad = 0
+    total = 0
+    for w0 in (-1, 0, 1):
+        for w1 in (-1, 0, 1):
+            for bias in range(-(1 << (BB - 1)), (1 << (BB - 1))):
+                nl = [((10, w0), (11, w1), bias, 20)]
+                for va in (0, 1):
+                    for vb in (0, 1):
+                        st = make_state([0] * S, gp=0, netlist=nl)
+                        st["sig"][10] = va
+                        st["sig"][11] = vb
+                        got = refl.run_steps(st, 1)
+                        exp = ref_step(st)
+                        total += 1
+                        if got != exp or got["sig"][20] != (1 if w0 * va + w1 * vb + bias >= 0 else 0):
+                            bad += 1
+    print(f"  {'OK ' if bad == 0 else 'FAIL'} {total} gate configurations exact")
+    ok &= bad == 0
+
+    # 2. single step on random full states, plus halted fixed point
+    print("[2/4] Single step vs reference on random full states")
+    gen = torch.Generator().manual_seed(0x5EED)
+    sig, gp = _rand_states(3000, gen)
+    bad = 0
+    for i in range(sig.shape[0]):
+        st = {"sig": sig[i].tolist(), "gp": int(gp[i]), "halt": 0}
+        if refl.run_steps(st, 1) != ref_step(st):
+            bad += 1
+    print(f"  {'OK ' if bad == 0 else 'FAIL'} 3,000 random states exact")
+    ok &= bad == 0
+    hbad = 0
+    for i in range(300):
+        st = {"sig": sig[i].tolist(), "gp": int(gp[i]), "halt": 1}
+        if refl.run_steps(st, 1) != st:
+            hbad += 1
+    print(f"  {'OK ' if hbad == 0 else 'FAIL'} 300 halted states are fixed points")
+    ok &= hbad == 0
+
+    # 3. interpret a composed XOR, and a self-modifying program, in lockstep
+    print("[3/4] Interpretation lockstep (composed XOR; self-rewriting program)")
+    xbad = 0
+    for a in (0, 1):
+        for b in (0, 1):
+            st = make_state([0] * S, gp=0, netlist=netlist_xor())
+            st["sig"][0], st["sig"][1] = a, b
+            r = dict(st)
+            for k in range(G):                     # one sweep
+                st2 = refl.run_steps(st, 1)
+                r = ref_step(r)
+                if st2 != r:
+                    xbad += 1
+                st = st2
+            if st["sig"][4] != (a ^ b):
+                xbad += 1
+    print(f"  {'OK ' if xbad == 0 else 'FAIL'} XOR interpreted for all inputs "
+          f"(U == reference every step; s4 == a^b)")
+    ok &= xbad == 0
+
+    smbad = 0
+    for a in (0, 1):
+        for b in (0, 1):
+            st = make_state([0] * S, gp=0, netlist=netlist_selfmod())
+            st["sig"][0], st["sig"][1] = a, b
+            r = dict(st)
+            trace = []
+            for k in range(2 * G):                 # two sweeps
+                st = refl.run_steps(st, 1)
+                r = ref_step(r)
+                if st != r:
+                    smbad += 1
+                if (k + 1) % G == 0:
+                    trace.append(st["sig"][2])
+            # tick 1 computed AND, tick 2 (after the edit) computed OR
+            if trace != [a & b, a | b]:
+                smbad += 1
+    print(f"  {'OK ' if smbad == 0 else 'FAIL'} self-modification: AND rewrites "
+          f"itself to OR mid-run (out = a&b then a|b), U == reference")
+    ok &= smbad == 0
+
+    # 4. gate graph == matrix form on random states
+    print("[4/4] Gate graph == matrix form")
+    gbad = 0
+    for i in range(400):
+        vals = {f"s{j}": int(sig[i, j]) for j in range(S)}
+        vals.update({f"gp{k}": to_bits(int(gp[i]), GPW)[k] for k in range(GPW)})
+        vals["halt"] = 0
+        gate_out = eval_net(net, inputs, outputs, vals)
+        v = torch.zeros(STATE_BITS)
+        for j in range(S):
+            v[j] = int(sig[i, j])
+        v[S:S + GPW] = torch.tensor(to_bits(int(gp[i]), GPW), dtype=torch.float32)
+        mat_out = refl.step(v.unsqueeze(0).to(device))[0].cpu().tolist()
+        if [int(round(x)) for x in mat_out] != gate_out:
+            gbad += 1
+    print(f"  {'OK ' if gbad == 0 else 'FAIL'} 400 random states: matrix step "
+          f"== gate-graph step, bit for bit")
+    ok &= gbad == 0
+
+    print("\nREFLECT (interpreter == reference; matrix == gate):", "PASS" if ok else "FAIL")
+    return ok
+
+
+def main() -> int:
+    ap = argparse.ArgumentParser(description="neural_reflect builder / verifier")
+    ap.add_argument("cmd", choices=["build", "verify", "all"])
+    ap.add_argument("--device", default="cuda" if torch.cuda.is_available() else "cpu")
+    args = ap.parse_args()
+    net, inputs, outputs, layers = build(save=args.cmd in ("build", "all"))
+    rc = 0
+    if args.cmd in ("verify", "all"):
+        refl = Reflect(layers, device=args.device)
+        rc = 0 if verify(refl, net, inputs, outputs, args.device) else 1
+    return rc
+
+
+if __name__ == "__main__":
+    sys.exit(main())

variants/neural_reflect.safetensors

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:677c47e918126104af6c391b9f18eae30ee3759652548df144372b50abd9c81c
+size 8166918