float FMA: fused multiply-add with a single rounding (F extension). A composed gate netlist (pre-normalize a/b/c, full product, dual sticky align shifters into a max-exponent field, cancellation-correct signed-magnitude add, normalize, one round-to-nearest-even, gradual underflow, full specials) for float16 and float32, validated bit-exact against the single-rounding oracle. FMADD/FMSUB/FNMADD/FNMSUB.S wired into the RV32 assembler, reference, and threshold CPU (gate-computed, lockstep-verified); composed FMA test in the eval suite; all variants and neural_rv32 rebuilt.

README.md

@@ -378,7 +378,7 @@ The most capable member: a RISC-V CPU whose entire datapath is ternary threshold
 
 - **RV32I base**: LUI, AUIPC, JAL, JALR, all six branches, LB/LH/LW/LBU/LHU, SB/SH/SW, and the full OP-IMM/OP groups. 32 × 32-bit registers (x0 zero), little-endian memory through the packed threshold circuits. ECALL halts.
 - **M extension**: MUL, MULH, MULHSU, MULHU (full 64-bit product through a shift-add array with gate-level sign correction), DIV, DIVU, REM, REMU (32 restoring stages, spec-exact divide-by-zero and overflow).
-- **F subset**: FLW, FSW, FMV.W.X, FMV.X.W, FADD.S, FSUB.S, FMUL.S, FDIV.S, FEQ.S, FLT.S, FLE.S, FSGNJ[N/X].S, FCVT.W.S (honors the instruction's rounding-mode field), FCVT.S.W — the arithmetic executed by the composed float32 pipelines (round-to-nearest-even, bit-exact to hardware; specials and subnormals as above), the int/float conversions gate-routed through the priority encoder and barrel shifter and cross-checked bit-exact against native conversion.
+- **F subset**: FLW, FSW, FMV.W.X, FMV.X.W, FADD.S, FSUB.S, FMUL.S, FDIV.S, FMADD.S, FMSUB.S, FNMADD.S, FNMSUB.S, FEQ.S, FLT.S, FLE.S, FSGNJ[N/X].S, FCVT.W.S (honors the instruction's rounding-mode field), FCVT.S.W — the arithmetic executed by the composed float32 pipelines (round-to-nearest-even, bit-exact to hardware; specials and subnormals as above; the fused multiply-add rounds `a*b+c` with a single rounding), the int/float conversions gate-routed through the priority encoder and barrel shifter and cross-checked bit-exact against native conversion.
 - **NEUR (custom-0)**: `neur rd, rs1, rs2` evaluates one threshold neuron — `rd = H(popcount(rs1[7:0] & rs2[7:0]) - popcount(rs1[7:0] & rs2[15:8]) + sext(rs2[20:16]))`. Networks of NEUR instructions are neural networks running as software on the neural network; the test suite computes XOR with a two-layer NEUR net.
 - **Dual issue**: two adjacent OP/OP-IMM/LUI/AUIPC instructions retire in one cycle when the gate-level hazard comparators (`rv32.hazard.*`) clear RAW and WAW dependences.
 - **MMIO**: stores to `0xFF00` append a character to the console.
@@ -392,7 +392,7 @@ python src/machines.py rv32                                 # eight-program lock
 python src/machines.py rv32-c                               # stock-compiler C, end to end
 ```
 
-**Running compiled C.** `machines.py rv32-c` compiles a freestanding C program (gcd, Fibonacci, insertion sort; `rv32im`, so real `mul`/`rem`) with an unmodified clang rv32im toolchain, loads the relocatable object with an in-repo loader (no external linker — it resolves the R_RISCV relocations of one translation unit and lays the sections out flat), executes it on the threshold CPU, and checks the return value against the value computed natively. The program retires in ~300 instructions and matches exactly. Stock `rv32im` toolchains (gcc, clang, rustc) emit this ISA. The remaining float item, the fused multiply-add, is tracked in `todo.md`.
+**Running compiled C.** `machines.py rv32-c` compiles a freestanding C program (gcd, Fibonacci, insertion sort; `rv32im`, so real `mul`/`rem`) with an unmodified clang rv32im toolchain, loads the relocatable object with an in-repo loader (no external linker — it resolves the R_RISCV relocations of one translation unit and lays the sections out flat), executes it on the threshold CPU, and checks the return value against the value computed natively. The program retires in ~300 instructions and matches exactly. Stock `rv32im` toolchains (gcc, clang, rustc) emit this ISA.
 
 The composed circuits evaluate in a leveled mode (`NetlistEvaluator`, one padded tensor op per topological level instead of one Python step per gate), ~18× faster on the FPU-scale netlists.
 

neural_computer.safetensors

@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:c358cad0b5e5fd8cf83720eeb42a399047409d374932a9dc6ec3ebda754933bf
-size 34601074
+oid sha256:9257c5519edac4fb5f76724389d6950590c83b8fa6e5a5e48bb2eda41e208c08
+size 45921927

src/build.py

@@ -1651,6 +1651,302 @@ def add_float16_div(tensors: Dict[str, torch.Tensor]) -> None:
     """Add the float16 division pipeline."""
     add_float_div(tensors, "float16", 5, 10)
 
+
+def add_float_fma(tensors: Dict[str, torch.Tensor], family: str,
+                  exp_bits: int, frac_bits: int) -> None:
+    """Fused multiply-add: round(a*b + c) with a SINGLE rounding (F-extension).
+
+    Self-contained; external inputs are the raw operand words $a/$b/$c
+    (MSB-first). Contract: exact IEEE specials (NaN, infinities, inf*0 and
+    inf-inf -> NaN, signed zeros), subnormal operands and gradual-underflow
+    subnormal results, round-to-nearest-even, single rounding of a*b+c.
+
+    Datapath: each mantissa is pre-normalized (leading 1 at bit F, na=eexp-lz);
+    the (F+1)x(F+1) product Mp (2F+2 bits) and the addend Mc are right-shifted by
+    sticky barrel shifters into a common 3(F+1)+4-bit field anchored at
+    max(product,c) exponent; a signed magnitude add (with a borrow when the
+    shifted-out subtrahend leaves a tail) forms the sum; a leading-zero count and
+    normalize give the significand, one round-to-nearest-even rounds it, and a
+    one-hot specials network packs the result.
+    """
+    E, F = exp_bits, frac_bits
+    W = 1 + E + F
+    p = F + 1
+    PW = 2 * p                       # product width
+    WF = 3 * p + 4                   # alignment field width
+    prefix = f"{family}.fma"
+    bias = (1 << (E - 1)) - 1
+
+    ML = F + 1
+    mlzb = 0
+    while (1 << mlzb) <= ML:
+        mlzb += 1
+    SB = 0                           # bits to hold a shift amount up to WF
+    while (1 << SB) <= WF:
+        SB += 1
+    NB = 0                           # bits for the field leading-zero count
+    while (1 << NB) <= WF:
+        NB += 1
+
+    # sign of the product sp = sa ^ sb (c's sign is c(0) directly).
+    add_gate(tensors, f"{prefix}.sign_p.layer1.or", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.sign_p.layer1.nand", [-1.0, -1.0], [1.0])
+    add_gate(tensors, f"{prefix}.sign_p.layer2", [1.0, 1.0], [-2.0])
+
+    # operand classification.
+    for op in ("a", "b", "c"):
+        add_gate(tensors, f"{prefix}.{op}.exp_zero", [-1.0] * E, [0.0])
+        add_gate(tensors, f"{prefix}.{op}.exp_nzero", [1.0] * E, [-1.0])
+        add_gate(tensors, f"{prefix}.{op}.exp_max", [1.0] * E, [-float(E)])
+        add_gate(tensors, f"{prefix}.{op}.frac_nz", [1.0] * F, [-1.0])
+        add_gate(tensors, f"{prefix}.{op}.frac_zero", [-1.0] * F, [0.0])
+        add_gate(tensors, f"{prefix}.{op}.is_nan", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.{op}.is_inf", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.{op}.is_zero", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.{op}.nonzero", [-1.0], [0.0])
+        add_gate(tensors, f"{prefix}.{op}.eexp_lsb", [1.0, 1.0], [-1.0])
+
+    # pre-normalize each mantissa: leading 1 to bit F, na = eexp - lz.
+    for op in ("a", "b", "c"):
+        for pos in range(1, ML):
+            add_gate(tensors, f"{prefix}.{op}.pn.any_higher{pos}", [1.0] * pos, [-1.0])
+            add_gate(tensors, f"{prefix}.{op}.pn.is_highest{pos}.not_higher", [-1.0], [0.0])
+            add_gate(tensors, f"{prefix}.{op}.pn.is_highest{pos}.and", [1.0, 1.0], [-2.0])
+        for bbit in range(mlzb):
+            fan = sum(1 for pos in range(1, ML) if (pos >> bbit) & 1)
+            add_gate(tensors, f"{prefix}.{op}.pn.lz.bit{bbit}", [1.0] * max(1, fan), [-1.0])
+        for bbit in range(mlzb):
+            for k in range(ML):
+                add_gate(tensors, f"{prefix}.{op}.pn.s{bbit}.bit{k}.not_sel", [-1.0], [0.0])
+                add_gate(tensors, f"{prefix}.{op}.pn.s{bbit}.bit{k}.and_a", [1.0, 1.0], [-2.0])
+                add_gate(tensors, f"{prefix}.{op}.pn.s{bbit}.bit{k}.and_b", [1.0, 1.0], [-2.0])
+                add_gate(tensors, f"{prefix}.{op}.pn.s{bbit}.bit{k}.or", [1.0, 1.0], [-1.0])
+        for bbit in range(mlzb):
+            add_gate(tensors, f"{prefix}.{op}.nlz.bit{bbit}", [-1.0], [0.0])
+        for bit in range(E + 2):
+            add_full_adder(tensors, f"{prefix}.{op}.neff.fa{bit}")
+
+    # product Mp = Ma * Mb (PW bits) by shift-add over the pre-normalized mantissas.
+    for i in range(p):
+        for j in range(p):
+            add_gate(tensors, f"{prefix}.pp.a{i}b{j}", [1.0, 1.0], [-2.0])
+    for stage in range(F):
+        for bit in range(PW):
+            add_full_adder(tensors, f"{prefix}.acc.s{stage}.fa{bit}")
+
+    # exponent alignment (E+3-bit two's complement). q1 = na+nb - bias + 1 (product
+    # MSB exponent); q2 = nc; d = q1 - q2; neg_d = sign(d); |d|; sbig = |d| + 1.
+    # rp = neg_d ? sbig : 1, rc = neg_d ? 1 : sbig; A = max(q1,q2)+1 = neg_d ? q2+1 : q1+1.
+    for bit in range(E + 3):
+        add_full_adder(tensors, f"{prefix}.nab.fa{bit}")       # na + nb
+    for bit in range(E + 3):
+        add_full_adder(tensors, f"{prefix}.q1.fa{bit}")        # nab + (1 - bias)
+    # zero operands carry no exponent; force their q to a sentinel negative value
+    # (sign bit set, rest 0) so max(q1,q2) picks the nonzero operand.
+    add_gate(tensors, f"{prefix}.prod_zero", [1.0, 1.0], [-1.0])       # a_zero | b_zero
+    add_gate(tensors, f"{prefix}.not_prod_zero", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.not_c_zero", [-1.0], [0.0])
+    for bit in range(E + 3):
+        if bit in (E + 1, E + 2):                                             # sentinel -2^(E+1)
+            add_gate(tensors, f"{prefix}.q1e.bit{bit}", [1.0, 1.0], [-1.0])   # prod_zero | q1
+            add_gate(tensors, f"{prefix}.q2e.bit{bit}", [1.0, 1.0], [-1.0])   # c_zero | q2
+        else:
+            add_gate(tensors, f"{prefix}.q1e.bit{bit}", [1.0, 1.0], [-2.0])   # ~prod_zero & q1
+            add_gate(tensors, f"{prefix}.q2e.bit{bit}", [1.0, 1.0], [-2.0])   # ~c_zero & q2
+    for bit in range(E + 3):
+        add_gate(tensors, f"{prefix}.ncnot.bit{bit}", [-1.0], [0.0])   # ~q2e
+        add_full_adder(tensors, f"{prefix}.d.fa{bit}")         # q1e + ~q2e + 1 = q1e - q2e
+    add_gate(tensors, f"{prefix}.not_neg_d", [-1.0], [0.0])    # ~sign(d)
+    for bit in range(E + 3):
+        add_gate(tensors, f"{prefix}.dxor.bit{bit}.a", [1.0, 1.0], [-1.0])
+        add_gate(tensors, f"{prefix}.dxor.bit{bit}.b", [-1.0, -1.0], [1.0])
+        add_gate(tensors, f"{prefix}.dxor.bit{bit}", [1.0, 1.0], [-2.0])   # d ^ neg_d
+        add_full_adder(tensors, f"{prefix}.dabs.fa{bit}")      # dxor + neg_d = |d|
+    for bit in range(E + 3):
+        add_full_adder(tensors, f"{prefix}.sbig.fa{bit}")      # |d| + 1
+    for bit in range(SB):
+        add_gate(tensors, f"{prefix}.rp.bit{bit}.and_big", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.rp.bit{bit}.and_one", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.rp.bit{bit}.or", [1.0, 1.0], [-1.0])
+        add_gate(tensors, f"{prefix}.rc.bit{bit}.and_big", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.rc.bit{bit}.and_one", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.rc.bit{bit}.or", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.sbig.high", [1.0] * (E + 3 - SB), [-1.0])   # sbig >= 2^SB
+    add_gate(tensors, f"{prefix}.rp.deep", [1.0, 1.0], [-2.0])   # neg_d & sbig.high
+    add_gate(tensors, f"{prefix}.rc.deep", [1.0, 1.0], [-2.0])   # ~neg_d & sbig.high
+    for bit in range(E + 3):
+        add_full_adder(tensors, f"{prefix}.q1p.fa{bit}")        # q1 + 1
+        add_full_adder(tensors, f"{prefix}.q2p.fa{bit}")        # nc + 1
+        add_gate(tensors, f"{prefix}.atop.bit{bit}.and_p", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.atop.bit{bit}.and_c", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.atop.bit{bit}.or", [1.0, 1.0], [-1.0])
+
+    # two sticky right-barrel shifters into the WF-bit field.
+    for tag in ("pf", "cf"):
+        for j in range(SB):
+            add_gate(tensors, f"{prefix}.{tag}.s{j}.drop", [1.0] * (1 << j), [-1.0])
+            add_gate(tensors, f"{prefix}.{tag}.s{j}.st_and", [1.0, 1.0], [-2.0])
+            add_gate(tensors, f"{prefix}.{tag}.s{j}.sticky", [1.0, 1.0], [-1.0])
+            for k in range(WF):
+                add_gate(tensors, f"{prefix}.{tag}.s{j}.bit{k}.not_sel", [-1.0], [0.0])
+                add_gate(tensors, f"{prefix}.{tag}.s{j}.bit{k}.and_a", [1.0, 1.0], [-2.0])
+                add_gate(tensors, f"{prefix}.{tag}.s{j}.bit{k}.and_b", [1.0, 1.0], [-2.0])
+                add_gate(tensors, f"{prefix}.{tag}.s{j}.bit{k}.or", [1.0, 1.0], [-1.0])
+        add_gate(tensors, f"{prefix}.{tag}.not_deep", [-1.0], [0.0])
+        for k in range(WF):                                   # field masked to 0 when deep
+            add_gate(tensors, f"{prefix}.{tag}.field.bit{k}", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.{tag}.nz", [1.0] * WF, [-1.0])
+        add_gate(tensors, f"{prefix}.{tag}.deep_nz", [1.0, 1.0], [-2.0])       # deep & operand nonzero
+        add_gate(tensors, f"{prefix}.{tag}.sticky", [1.0, 1.0], [-1.0])        # barrel | deep_nz
+
+    # signed magnitude combine. eff_sub = sp ^ sc.
+    add_gate(tensors, f"{prefix}.eff_sub.layer1.or", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.eff_sub.layer1.nand", [-1.0, -1.0], [1.0])
+    add_gate(tensors, f"{prefix}.eff_sub", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.eff_add", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.s_tail", [1.0, 1.0], [-1.0])          # pf.sticky | cf.sticky (shifted-out)
+    add_gate(tensors, f"{prefix}.not_s_tail", [-1.0], [0.0])
+    # sub path: D = PF - CF (WF+1 bits); ge = PF >= CF = ~sign(D); borrow for a tail.
+    for bit in range(WF):
+        add_gate(tensors, f"{prefix}.cfnot.bit{bit}", [-1.0], [0.0])
+    for bit in range(WF + 1):
+        add_full_adder(tensors, f"{prefix}.dsum.fa{bit}")             # PF + ~CF + cin
+    add_gate(tensors, f"{prefix}.ge", [-1.0], [0.0])                  # ~sign(D)
+    add_gate(tensors, f"{prefix}.not_ge", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.borrow_in", [1.0, 1.0], [-2.0])      # eff_sub & ~s_tail -> cin=1
+    for bit in range(WF + 1):                                        # dmagx = D ^ sign(D)
+        add_gate(tensors, f"{prefix}.dmagx.bit{bit}.a", [1.0, 1.0], [-1.0])    # OR
+        add_gate(tensors, f"{prefix}.dmagx.bit{bit}.b", [-1.0, -1.0], [1.0])   # NAND
+        add_gate(tensors, f"{prefix}.dmagx.bit{bit}", [1.0, 1.0], [-2.0])      # AND(or, nand) = XOR
+    for bit in range(WF + 1):
+        add_full_adder(tensors, f"{prefix}.dmag.fa{bit}")            # + (~ge as +1 for complement)
+    # add path: A = PF + CF (WF+1 bits).
+    for bit in range(WF + 1):
+        add_full_adder(tensors, f"{prefix}.asum.fa{bit}")
+    # mag = eff_sub ? dmag : asum   (WF+1 bits)
+    for bit in range(WF + 1):
+        add_gate(tensors, f"{prefix}.mag.bit{bit}.and_sub", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.mag.bit{bit}.and_add", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.mag.bit{bit}.or", [1.0, 1.0], [-1.0])
+
+    # leading-zero count over mag (WF+1 bits) and normalize.
+    MG = WF + 1
+    for pos in range(1, MG):
+        add_gate(tensors, f"{prefix}.lz.any_higher{pos}", [1.0] * pos, [-1.0])
+        add_gate(tensors, f"{prefix}.lz.is_highest{pos}.not_higher", [-1.0], [0.0])
+        add_gate(tensors, f"{prefix}.lz.is_highest{pos}.and", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.mag.nz", [1.0] * MG, [-1.0])
+    for bbit in range(NB):
+        fan = sum(1 for pos in range(1, MG) if (pos >> bbit) & 1)
+        add_gate(tensors, f"{prefix}.lz.bit{bbit}", [1.0] * max(1, fan), [-1.0])
+    for j in range(NB):                                             # left-normalize barrel
+        for k in range(MG):
+            add_gate(tensors, f"{prefix}.nrm.s{j}.bit{k}.not_sel", [-1.0], [0.0])
+            add_gate(tensors, f"{prefix}.nrm.s{j}.bit{k}.and_a", [1.0, 1.0], [-2.0])
+            add_gate(tensors, f"{prefix}.nrm.s{j}.bit{k}.and_b", [1.0, 1.0], [-2.0])
+            add_gate(tensors, f"{prefix}.nrm.s{j}.bit{k}.or", [1.0, 1.0], [-1.0])
+
+    # er = A - lz (biased result exponent), E+3-bit.
+    for bit in range(E + 3):
+        add_gate(tensors, f"{prefix}.nlzf.bit{bit}", [-1.0], [0.0])
+        add_full_adder(tensors, f"{prefix}.er.fa{bit}")
+    add_gate(tensors, f"{prefix}.er.underflow", [1.0, 1.0], [-1.0])   # er <= 0
+    add_gate(tensors, f"{prefix}.er.zero", [-1.0] * (E + 3), [0.0])
+    add_gate(tensors, f"{prefix}.er.not_underflow", [-1.0], [0.0])
+    for bit in range(E + 3):
+        add_gate(tensors, f"{prefix}.exprc.bit{bit}", [1.0, 1.0], [-2.0])
+
+    # subnormal-aware round. Build the mantissa frame from the normalized
+    # significand (bit 0 guard, bits 1..F frac, bit F+1 implicit), right-shift it
+    # by max(0,1-er) for gradual underflow, then round-to-nearest-even once.
+    add_gate(tensors, f"{prefix}.round.sticky_lo", [1.0] * (MG - (F + 2)), [-1.0])
+    add_gate(tensors, f"{prefix}.round.sticky_pre", [1.0, 1.0], [-1.0])   # sticky_lo | s_tail
+    RBd = 0
+    while (1 << RBd) < (F + 2):
+        RBd += 1
+    for bit in range(E + 3):
+        add_gate(tensors, f"{prefix}.ernot.bit{bit}", [-1.0], [0.0])
+        add_full_adder(tensors, f"{prefix}.subv.fa{bit}")            # 1 - er
+        add_gate(tensors, f"{prefix}.rsh.bit{bit}", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.too_deep", [1.0] * (E + 3 - RBd), [-1.0])
+    add_gate(tensors, f"{prefix}.not_deep", [-1.0], [0.0])
+    for j in range(RBd):
+        add_gate(tensors, f"{prefix}.dsh.s{j}.drop", [1.0] * (1 << j), [-1.0])
+        add_gate(tensors, f"{prefix}.dsh.s{j}.st_and", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.dsh.s{j}.sticky", [1.0, 1.0], [-1.0])
+        for k in range(F + 2):
+            add_gate(tensors, f"{prefix}.dsh.s{j}.bit{k}.not_sel", [-1.0], [0.0])
+            add_gate(tensors, f"{prefix}.dsh.s{j}.bit{k}.and_a", [1.0, 1.0], [-2.0])
+            add_gate(tensors, f"{prefix}.dsh.s{j}.bit{k}.and_b", [1.0, 1.0], [-2.0])
+            add_gate(tensors, f"{prefix}.dsh.s{j}.bit{k}.or", [1.0, 1.0], [-1.0])
+    for k in range(F):
+        add_gate(tensors, f"{prefix}.sig.bit{k}", [1.0, 1.0], [-2.0])     # shifted(k+1) & not_deep
+    add_gate(tensors, f"{prefix}.round.guard", [1.0, 1.0], [-2.0])        # shifted(0) & not_deep
+    add_gate(tensors, f"{prefix}.round.sticky", [1.0, 1.0, 1.0], [-1.0])  # pre | barrel | too_deep
+    add_gate(tensors, f"{prefix}.round.rsl", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.round.up", [1.0, 1.0], [-2.0])
+    for k in range(F):
+        add_gate(tensors, f"{prefix}.rnd.bit{k}.xor.layer1.or", [1.0, 1.0], [-1.0])
+        add_gate(tensors, f"{prefix}.rnd.bit{k}.xor.layer1.nand", [-1.0, -1.0], [1.0])
+        add_gate(tensors, f"{prefix}.rnd.bit{k}.xor.layer2", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.rnd.bit{k}.carry", [1.0, 1.0], [-2.0])
+    for bit in range(E + 3):
+        add_gate(tensors, f"{prefix}.exp_round.bit{bit}.xor.layer1.or", [1.0, 1.0], [-1.0])
+        add_gate(tensors, f"{prefix}.exp_round.bit{bit}.xor.layer1.nand", [-1.0, -1.0], [1.0])
+        add_gate(tensors, f"{prefix}.exp_round.bit{bit}.xor.layer2", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.exp_round.bit{bit}.carry", [1.0, 1.0], [-2.0])
+
+    # specials + range detectors + output pack (priority NaN > Inf > Zero > Normal).
+    add_gate(tensors, f"{prefix}.p_inf", [1.0, 1.0], [-1.0])            # a_inf | b_inf
+    add_gate(tensors, f"{prefix}.not_p_inf", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.inf0a", [1.0, 1.0], [-2.0])            # a_inf & b_zero
+    add_gate(tensors, f"{prefix}.inf0b", [1.0, 1.0], [-2.0])            # b_inf & a_zero
+    add_gate(tensors, f"{prefix}.inf0", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.pc_sdiff.or", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.pc_sdiff.nand", [-1.0, -1.0], [1.0])
+    add_gate(tensors, f"{prefix}.pc_sdiff", [1.0, 1.0], [-2.0])         # sp ^ sc
+    add_gate(tensors, f"{prefix}.infinf_nan", [1.0, 1.0, 1.0], [-3.0])  # p_inf & c_inf & sdiff
+    add_gate(tensors, f"{prefix}.in_nan", [1.0, 1.0, 1.0], [-1.0])      # a/b/c nan
+    add_gate(tensors, f"{prefix}.nan", [1.0, 1.0, 1.0], [-1.0])         # in_nan | inf0 | infinf_nan
+    add_gate(tensors, f"{prefix}.not_nan", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.any_inf", [1.0, 1.0], [-1.0])          # p_inf | c_inf
+    add_gate(tensors, f"{prefix}.not_any_inf", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.er.and_low", [1.0] * E, [-float(E)])   # exp_round low E bits all 1
+    add_gate(tensors, f"{prefix}.er.hi", [1.0, 1.0, 1.0], [-1.0])       # exp_round bit E/E+1/E+2 set
+    add_gate(tensors, f"{prefix}.er.ge_emax", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.overflow", [1.0, 1.0], [-2.0])         # ge_emax & not_underflow
+    add_gate(tensors, f"{prefix}.inf_or_ovf", [1.0, 1.0], [-1.0])       # any_inf | overflow
+    add_gate(tensors, f"{prefix}.not_inf_path", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.inf", [1.0, 1.0], [-2.0])              # not_nan & inf_or_ovf
+    add_gate(tensors, f"{prefix}.res_zero", [-1.0] * MG, [0.0])         # mag == 0
+    add_gate(tensors, f"{prefix}.not_res_zero", [-1.0], [0.0])
+    add_gate(tensors, f"{prefix}.zero", [1.0, 1.0, 1.0], [-3.0])        # not_nan & not_inf_path & res_zero
+    add_gate(tensors, f"{prefix}.norm", [1.0, 1.0, 1.0], [-3.0])        # not_nan & not_inf_path & ~res_zero
+    # finite-path magnitude sign: eff_sub ? (ge?sp:sc) : sp.
+    add_gate(tensors, f"{prefix}.fin_sign.sub.and_ge", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.fin_sign.sub.and_lt", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.fin_sign.sub", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.fin_sign.and_sub", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.fin_sign.and_add", [1.0, 1.0], [-2.0])
+    add_gate(tensors, f"{prefix}.fin_sign", [1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.p_zero", [1.0, 1.0], [-1.0])           # a_zero | b_zero
+    add_gate(tensors, f"{prefix}.bothzero", [1.0, 1.0], [-2.0])         # p_zero & c_zero
+    add_gate(tensors, f"{prefix}.negzero", [1.0, 1.0, 1.0], [-3.0])     # bothzero & sp & sc
+    add_gate(tensors, f"{prefix}.sign_z.fin", [1.0, 1.0], [-2.0])       # fin_sign & ~res_zero
+    add_gate(tensors, f"{prefix}.sign_z", [1.0, 1.0], [-1.0])           # sign_z.fin | negzero
+    add_gate(tensors, f"{prefix}.sign.term_p", [1.0, 1.0], [-2.0])      # p_inf & sp
+    add_gate(tensors, f"{prefix}.sign.term_c", [1.0, 1.0, 1.0], [-3.0]) # ~p_inf & c_inf & sc
+    add_gate(tensors, f"{prefix}.sign.term_z", [1.0, 1.0], [-2.0])      # ~any_inf & sign_z
+    add_gate(tensors, f"{prefix}.sign_pre", [1.0, 1.0, 1.0], [-1.0])
+    add_gate(tensors, f"{prefix}.sign_out", [1.0, 1.0], [-2.0])         # sign_pre & not_nan
+    for k in range(E):
+        add_gate(tensors, f"{prefix}.exp_out.bit{k}.norm_and", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.exp_out.bit{k}", [1.0, 1.0, 1.0], [-1.0])
+    for k in range(F):
+        add_gate(tensors, f"{prefix}.frac_out.bit{k}.norm_and", [1.0, 1.0], [-2.0])
+        add_gate(tensors, f"{prefix}.frac_out.bit{k}", [1.0, 1.0], [-1.0])
+
+
 def add_float_cmp(tensors: Dict[str, torch.Tensor], family: str,
                   exp_bits: int, frac_bits: int) -> None:
     """Add a complete IEEE 754 comparison network (EQ, LT, LE, GT, GE).
@@ -3672,6 +3968,585 @@ def infer_float_div_inputs(gate: str, reg: SignalRegistry, family: str,
     return None
 
 
+def infer_float_fma_inputs(gate: str, reg: SignalRegistry, family: str,
+                           exp_bits: int, frac_bits: int) -> Optional[List[int]]:
+    """Complete wiring for the self-contained fused-multiply-add pipeline."""
+    E, F = exp_bits, frac_bits
+    W = 1 + E + F
+    p = F + 1
+    PW = 2 * p
+    WF = 3 * p + 4
+    MG = WF + 1
+    prefix = f"{family}.fma"
+    if gate != prefix and not gate.startswith(prefix + "."):
+        return None
+    bias = (1 << (E - 1)) - 1
+    for i in range(W):
+        reg.register(f"$a[{i}]")
+        reg.register(f"$b[{i}]")
+        reg.register(f"$c[{i}]")
+
+    def a(i: int) -> int:
+        return reg.get_id(f"$a[{i}]")
+
+    def b(i: int) -> int:
+        return reg.get_id(f"$b[{i}]")
+
+    def c(i: int) -> int:
+        return reg.get_id(f"$c[{i}]")
+
+    def R(name: str) -> int:
+        return reg.register(f"{prefix}.{name}")
+
+    zero = reg.get_id("#0")
+    one = reg.get_id("#1")
+    WOP = {"a": a, "b": b, "c": c}
+    ML = F + 1
+    mlzb = 0
+    while (1 << mlzb) <= ML:
+        mlzb += 1
+    SB = 0
+    while (1 << SB) <= WF:
+        SB += 1
+    NB = 0
+    while (1 << NB) <= WF:
+        NB += 1
+    RBd = 0
+    while (1 << RBd) < (F + 2):
+        RBd += 1
+
+    def m_raw(op: str, k: int) -> int:
+        return R(f"{op}.exp_nzero") if k == F else WOP[op](W - 1 - k)
+
+    def Mn(op: str, k: int) -> int:
+        return R(f"{op}.pn.s{mlzb - 1}.bit{k}.or")
+
+    def eexp(op: str, k: int) -> int:
+        w = WOP[op]
+        return R(f"{op}.eexp_lsb") if k == 0 else (w(E - k) if k < E else zero)
+
+    def na(op: str, k: int) -> int:                 # signed, sign-extended from bit E+1
+        return R(f"{op}.neff.fa{min(k, E + 1)}.ha2.sum.layer2")
+
+    def Pbit(k: int) -> int:
+        return R(f"acc.s{F - 1}.fa{k}.ha2.sum.layer2")
+
+    def Pt(m: int) -> int:                           # top-aligned product field bit
+        k = m - (WF - PW)
+        return Pbit(k) if 0 <= k < PW else zero
+
+    def Ct(m: int) -> int:                           # top-aligned addend field bit
+        k = m - (WF - p)
+        return Mn("c", k) if 0 <= k < p else zero
+
+    sp = R("sign_p.layer2")
+    sc = c(0)
+    q1c = (1 - bias) & ((1 << (E + 3)) - 1)          # constant nab + (1-bias)
+    suffix = gate[len(prefix) + 1:] if gate != prefix else ""
+
+    table = {
+        "sign_p.layer1.or": [a(0), b(0)],
+        "sign_p.layer1.nand": [a(0), b(0)],
+        "sign_p.layer2": [R("sign_p.layer1.or"), R("sign_p.layer1.nand")],
+    }
+    for op in ("a", "b", "c"):
+        w = WOP[op]
+        expf = [w(1 + i) for i in range(E)]
+        fracf = [w(1 + E + i) for i in range(F)]
+        table[f"{op}.exp_zero"] = expf
+        table[f"{op}.exp_nzero"] = expf
+        table[f"{op}.exp_max"] = expf
+        table[f"{op}.frac_nz"] = fracf
+        table[f"{op}.frac_zero"] = fracf
+        table[f"{op}.is_nan"] = [R(f"{op}.exp_max"), R(f"{op}.frac_nz")]
+        table[f"{op}.is_inf"] = [R(f"{op}.exp_max"), R(f"{op}.frac_zero")]
+        table[f"{op}.is_zero"] = [R(f"{op}.exp_zero"), R(f"{op}.frac_zero")]
+        table[f"{op}.nonzero"] = [R(f"{op}.is_zero")]
+        table[f"{op}.eexp_lsb"] = [w(E), R(f"{op}.exp_zero")]
+    if suffix in table:
+        return table[suffix]
+
+    # --- pre-normalizers (a, b, c) ---
+    m = re.match(r"^([abc])\.pn\.any_higher(\d+)$", suffix)
+    if m:
+        op, pos = m.group(1), int(m.group(2))
+        return [m_raw(op, ML - 1 - t) for t in range(pos)]
+    m = re.match(r"^([abc])\.pn\.is_highest(\d+)\.(not_higher|and)$", suffix)
+    if m:
+        op, pos = m.group(1), int(m.group(2))
+        if m.group(3) == "not_higher":
+            return [R(f"{op}.pn.any_higher{pos}")]
+        return [m_raw(op, ML - 1 - pos), R(f"{op}.pn.is_highest{pos}.not_higher")]
+    m = re.match(r"^([abc])\.pn\.lz\.bit(\d+)$", suffix)
+    if m:
+        op, bbit = m.group(1), int(m.group(2))
+        srcs = [R(f"{op}.pn.is_highest{pos}.and") for pos in range(1, ML) if (pos >> bbit) & 1]
+        return srcs if srcs else [zero]
+    m = re.match(r"^([abc])\.pn\.s(\d+)\.bit(\d+)\.(not_sel|and_a|and_b|or)$", suffix)
+    if m:
+        op, bbit, k, kind = m.group(1), int(m.group(2)), int(m.group(3)), m.group(4)
+        sel = R(f"{op}.pn.lz.bit{bbit}")
+
+        def lin(kk: int) -> int:
+            if kk < 0 or kk >= ML:
+                return zero
+            return m_raw(op, kk) if bbit == 0 else R(f"{op}.pn.s{bbit - 1}.bit{kk}.or")
+
+        if kind == "not_sel":
+            return [sel]
+        if kind == "and_a":
+            return [lin(k), R(f"{op}.pn.s{bbit}.bit{k}.not_sel")]
+        if kind == "and_b":
+            return [lin(k - (1 << bbit)), sel]
+        return [R(f"{op}.pn.s{bbit}.bit{k}.and_a"), R(f"{op}.pn.s{bbit}.bit{k}.and_b")]
+    m = re.match(r"^([abc])\.nlz\.bit(\d+)$", suffix)
+    if m:
+        return [R(f"{m.group(1)}.pn.lz.bit{int(m.group(2))}")]
+    m = re.match(r"^([abc])\.neff\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        op, k = m.group(1), int(m.group(2))
+        b_sig = R(f"{op}.nlz.bit{k}") if k < mlzb else one
+        cin = one if k == 0 else R(f"{op}.neff.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(3), f"{prefix}.{op}.neff.fa{k}", eexp(op, k), b_sig, cin, reg)
+
+    # --- multiplier ---
+    m = re.match(r"^pp\.a(\d+)b(\d+)$", suffix)
+    if m:
+        return [Mn("a", int(m.group(1))), Mn("b", int(m.group(2)))]
+    m = re.match(r"^acc\.s(\d+)\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        t, k = int(m.group(1)), int(m.group(2))
+        row = t + 1
+        if t == 0:
+            a_sig = R(f"pp.a{k}b0") if k <= F else zero
+        else:
+            a_sig = R(f"acc.s{t - 1}.fa{k}.ha2.sum.layer2")
+        b_sig = R(f"pp.a{k - row}b{row}") if row <= k <= row + F else zero
+        cin = zero if k == 0 else R(f"acc.s{t}.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(3), f"{prefix}.acc.s{t}.fa{k}", a_sig, b_sig, cin, reg)
+
+    # --- exponent alignment ---
+    m = re.match(r"^nab\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        cin = zero if k == 0 else R(f"nab.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.nab.fa{k}", na("a", k), na("b", k), cin, reg)
+    m = re.match(r"^q1\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        a_sig = R(f"nab.fa{k}.ha2.sum.layer2")
+        b_sig = one if (q1c >> k) & 1 else zero
+        cin = zero if k == 0 else R(f"q1.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.q1.fa{k}", a_sig, b_sig, cin, reg)
+    if suffix == "prod_zero":
+        return [R("a.is_zero"), R("b.is_zero")]
+    if suffix == "not_prod_zero":
+        return [R("prod_zero")]
+    if suffix == "not_c_zero":
+        return [R("c.is_zero")]
+    m = re.match(r"^q1e\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        q1b = R(f"q1.fa{k}.ha2.sum.layer2")
+        return [R("prod_zero"), q1b] if k in (E + 1, E + 2) else [R("not_prod_zero"), q1b]
+    m = re.match(r"^q2e\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        return [R("c.is_zero"), na("c", k)] if k in (E + 1, E + 2) else [R("not_c_zero"), na("c", k)]
+    m = re.match(r"^ncnot\.bit(\d+)$", suffix)
+    if m:
+        return [R(f"q2e.bit{int(m.group(1))}")]
+    m = re.match(r"^d\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        a_sig = R(f"q1e.bit{k}")
+        cin = one if k == 0 else R(f"d.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.d.fa{k}", a_sig, R(f"ncnot.bit{k}"), cin, reg)
+
+    neg_d = R(f"d.fa{E + 2}.ha2.sum.layer2")
+    if suffix == "not_neg_d":
+        return [neg_d]
+    m = re.match(r"^dxor\.bit(\d+)\.(a|b)$", suffix)
+    if m:
+        return [R(f"d.fa{int(m.group(1))}.ha2.sum.layer2"), neg_d]
+    m = re.match(r"^dxor\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        return [R(f"dxor.bit{k}.a"), R(f"dxor.bit{k}.b")]
+    m = re.match(r"^dabs\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        cin = neg_d if k == 0 else R(f"dabs.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.dabs.fa{k}", R(f"dxor.bit{k}"), zero, cin, reg)
+    m = re.match(r"^sbig\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        a_sig = R(f"dabs.fa{k}.ha2.sum.layer2")
+        cin = one if k == 0 else R(f"sbig.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.sbig.fa{k}", a_sig, zero, cin, reg)
+    if suffix == "sbig.high":
+        return [R(f"sbig.fa{k}.ha2.sum.layer2") for k in range(SB, E + 3)]
+    if suffix == "rp.deep":
+        return [neg_d, R("sbig.high")]
+    if suffix == "rc.deep":
+        return [R("not_neg_d"), R("sbig.high")]
+    m = re.match(r"^r([pc])\.bit(\d+)\.(and_big|and_one|or)$", suffix)
+    if m:
+        which, k, kind = m.group(1), int(m.group(2)), m.group(3)
+        big = R(f"sbig.fa{k}.ha2.sum.layer2")
+        one_bit = one if k == 0 else zero
+        sel_big = neg_d if which == "p" else R("not_neg_d")     # rp big when neg_d; rc big when ~neg_d
+        sel_one = R("not_neg_d") if which == "p" else neg_d
+        if kind == "and_big":
+            return [big, sel_big]
+        if kind == "and_one":
+            return [one_bit, sel_one]
+        return [R(f"r{which}.bit{k}.and_big"), R(f"r{which}.bit{k}.and_one")]
+    m = re.match(r"^q1p\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        b_sig = one if k == 1 else zero                      # + 2
+        cin = zero if k == 0 else R(f"q1p.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.q1p.fa{k}", R(f"q1e.bit{k}"), b_sig, cin, reg)
+    m = re.match(r"^q2p\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        b_sig = one if k == 1 else zero                      # + 2
+        cin = zero if k == 0 else R(f"q2p.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.q2p.fa{k}", R(f"q2e.bit{k}"), b_sig, cin, reg)
+    m = re.match(r"^atop\.bit(\d+)\.(and_p|and_c|or)$", suffix)
+    if m:
+        k, kind = int(m.group(1)), m.group(2)
+        if kind == "and_p":
+            return [R(f"q1p.fa{k}.ha2.sum.layer2"), R("not_neg_d")]
+        if kind == "and_c":
+            return [R(f"q2p.fa{k}.ha2.sum.layer2"), neg_d]
+        return [R(f"atop.bit{k}.and_p"), R(f"atop.bit{k}.and_c")]
+
+    # --- align shifters (pf: product, cf: addend) ---
+    m = re.match(r"^(pf|cf)\.s(\d+)\.(.+)$", suffix)
+    if m:
+        tag, j, rest = m.group(1), int(m.group(2)), m.group(3)
+        rsel = R(f"r{'p' if tag == 'pf' else 'c'}.bit{j}.or")
+        topfn = Pt if tag == "pf" else Ct
+
+        def sin(k: int) -> int:
+            if k < 0 or k >= WF:
+                return zero
+            return topfn(k) if j == 0 else R(f"{tag}.s{j - 1}.bit{k}.or")
+
+        if rest == "drop":
+            return [sin(k) for k in range(1 << j)]
+        if rest == "st_and":
+            return [rsel, R(f"{tag}.s{j}.drop")]
+        if rest == "sticky":
+            prev = zero if j == 0 else R(f"{tag}.s{j - 1}.sticky")
+            return [prev, R(f"{tag}.s{j}.st_and")]
+        mm = re.match(r"^bit(\d+)\.(not_sel|and_a|and_b|or)$", rest)
+        if mm:
+            k, kind = int(mm.group(1)), mm.group(2)
+            if kind == "not_sel":
+                return [rsel]
+            if kind == "and_a":
+                return [sin(k), R(f"{tag}.s{j}.bit{k}.not_sel")]
+            if kind == "and_b":
+                return [sin(k + (1 << j)), rsel]
+            return [R(f"{tag}.s{j}.bit{k}.and_a"), R(f"{tag}.s{j}.bit{k}.and_b")]
+    m = re.match(r"^(pf|cf)\.not_deep$", suffix)
+    if m:
+        tag = m.group(1)
+        return [R(f"r{'p' if tag == 'pf' else 'c'}.deep")]
+    m = re.match(r"^(pf|cf)\.field\.bit(\d+)$", suffix)
+    if m:
+        tag, k = m.group(1), int(m.group(2))
+        return [R(f"{tag}.s{SB - 1}.bit{k}.or"), R(f"{tag}.not_deep")]
+    m = re.match(r"^(pf|cf)\.nz$", suffix)
+    if m:
+        tag = m.group(1)
+        topfn = Pt if tag == "pf" else Ct
+        return [topfn(k) for k in range(WF)]
+    m = re.match(r"^(pf|cf)\.deep_nz$", suffix)
+    if m:
+        tag = m.group(1)
+        return [R(f"r{'p' if tag == 'pf' else 'c'}.deep"), R(f"{tag}.nz")]
+    m = re.match(r"^(pf|cf)\.sticky$", suffix)
+    if m:
+        tag = m.group(1)
+        return [R(f"{tag}.s{SB - 1}.sticky"), R(f"{tag}.deep_nz")]
+
+    # --- signed magnitude combine ---
+    def PF(k: int) -> int:
+        return R(f"pf.field.bit{k}") if k < WF else zero
+
+    def CF(k: int) -> int:
+        return R(f"cf.field.bit{k}") if k < WF else zero
+
+    def Dbit(k: int) -> int:
+        return R(f"dsum.fa{k}.ha2.sum.layer2")
+
+    sign_D = Dbit(WF)
+    combine = {
+        "eff_sub.layer1.or": [sp, sc],
+        "eff_sub.layer1.nand": [sp, sc],
+        "eff_sub": [R("eff_sub.layer1.or"), R("eff_sub.layer1.nand")],
+        "eff_add": [R("eff_sub")],
+        "s_tail": [R("pf.sticky"), R("cf.sticky")],
+        "not_s_tail": [R("s_tail")],
+        "borrow_in": [R("eff_sub"), R("not_s_tail")],
+        "ge": [sign_D],
+        "not_ge": [R("ge")],
+        "mag.nz": [R(f"mag.bit{k}.or") for k in range(MG)],
+        "er.zero": [R(f"er.fa{k}.ha2.sum.layer2") for k in range(E + 3)],
+        "er.underflow": [R(f"er.fa{E + 2}.ha2.sum.layer2"), R("er.zero")],
+        "er.not_underflow": [R("er.underflow")],
+    }
+    if suffix in combine:
+        return combine[suffix]
+
+    m = re.match(r"^cfnot\.bit(\d+)$", suffix)
+    if m:
+        return [CF(int(m.group(1)))]
+    m = re.match(r"^dsum\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        a_sig = PF(k)
+        b_sig = R(f"cfnot.bit{k}") if k < WF else one
+        cin = R("borrow_in") if k == 0 else R(f"dsum.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.dsum.fa{k}", a_sig, b_sig, cin, reg)
+    m = re.match(r"^dmagx\.bit(\d+)\.(a|b)$", suffix)
+    if m:
+        return [Dbit(int(m.group(1))), sign_D]
+    m = re.match(r"^dmagx\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        return [R(f"dmagx.bit{k}.a"), R(f"dmagx.bit{k}.b")]
+    m = re.match(r"^dmag\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        cin = sign_D if k == 0 else R(f"dmag.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.dmag.fa{k}", R(f"dmagx.bit{k}"), zero, cin, reg)
+    m = re.match(r"^asum\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        cin = zero if k == 0 else R(f"asum.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.asum.fa{k}", PF(k), CF(k), cin, reg)
+    m = re.match(r"^mag\.bit(\d+)\.(and_sub|and_add|or)$", suffix)
+    if m:
+        k, kind = int(m.group(1)), m.group(2)
+        if kind == "and_sub":
+            return [R(f"dmag.fa{k}.ha2.sum.layer2"), R("eff_sub")]
+        if kind == "and_add":
+            return [R(f"asum.fa{k}.ha2.sum.layer2"), R("eff_add")]
+        return [R(f"mag.bit{k}.and_sub"), R(f"mag.bit{k}.and_add")]
+
+    # --- leading-zero count + normalize (MG bits, MSB at MG-1) ---
+    def magbit(k: int) -> int:
+        return R(f"mag.bit{k}.or")
+
+    m = re.match(r"^lz\.any_higher(\d+)$", suffix)
+    if m:
+        pos = int(m.group(1))
+        return [magbit(MG - 1 - t) for t in range(pos)]
+    m = re.match(r"^lz\.is_highest(\d+)\.(not_higher|and)$", suffix)
+    if m:
+        pos = int(m.group(1))
+        if m.group(2) == "not_higher":
+            return [R(f"lz.any_higher{pos}")]
+        return [magbit(MG - 1 - pos), R(f"lz.is_highest{pos}.not_higher")]
+    m = re.match(r"^lz\.bit(\d+)$", suffix)
+    if m:
+        bbit = int(m.group(1))
+        srcs = [R(f"lz.is_highest{pos}.and") for pos in range(1, MG) if (pos >> bbit) & 1]
+        return srcs if srcs else [zero]
+    m = re.match(r"^nrm\.s(\d+)\.bit(\d+)\.(not_sel|and_a|and_b|or)$", suffix)
+    if m:
+        j, k, kind = int(m.group(1)), int(m.group(2)), m.group(3)
+        sel = R(f"lz.bit{j}")
+
+        def nin(kk: int) -> int:
+            if kk < 0 or kk >= MG:
+                return zero
+            return magbit(kk) if j == 0 else R(f"nrm.s{j - 1}.bit{kk}.or")
+
+        if kind == "not_sel":
+            return [sel]
+        if kind == "and_a":
+            return [nin(k), R(f"nrm.s{j}.bit{k}.not_sel")]
+        if kind == "and_b":
+            return [nin(k - (1 << j)), sel]
+        return [R(f"nrm.s{j}.bit{k}.and_a"), R(f"nrm.s{j}.bit{k}.and_b")]
+
+    # --- er = atop - lz ---
+    def atopbit(k: int) -> int:
+        return R(f"atop.bit{k}.or")
+
+    m = re.match(r"^nlzf\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        return [R(f"lz.bit{k}")] if k < NB else [zero]
+    m = re.match(r"^er\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        cin = one if k == 0 else R(f"er.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.er.fa{k}", atopbit(k), R(f"nlzf.bit{k}"), cin, reg)
+    m = re.match(r"^exprc\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        return [R(f"er.fa{k}.ha2.sum.layer2"), R("er.not_underflow")]
+
+    # --- subnormal-aware round on the normalized significand ---
+    def nrmbit(k: int) -> int:
+        return R(f"nrm.s{NB - 1}.bit{k}.or")
+
+    def MF(k: int) -> int:                           # mantissa frame
+        if k == 0:
+            return nrmbit(MG - 2 - F)                 # guard
+        if k <= F:
+            return nrmbit(MG - 2 - F + k)             # frac[k-1]
+        return nrmbit(MG - 1)                         # implicit
+
+    def shifted(k: int) -> int:
+        return R(f"dsh.s{RBd - 1}.bit{k}.or")
+
+    rnd_round = {
+        "round.sticky_lo": [nrmbit(k) for k in range(MG - F - 2)],
+        "round.sticky_pre": [R("round.sticky_lo"), R("s_tail")],
+        "too_deep": [R(f"rsh.bit{k}") for k in range(RBd, E + 3)],
+        "not_deep": [R("too_deep")],
+        "round.guard": [shifted(0), R("not_deep")],
+        "round.sticky": [R("round.sticky_pre"), R(f"dsh.s{RBd - 1}.sticky"), R("too_deep")],
+        "round.rsl": [R("round.sticky"), R("sig.bit0")],
+        "round.up": [R("round.guard"), R("round.rsl")],
+    }
+    if suffix in rnd_round:
+        return rnd_round[suffix]
+
+    m = re.match(r"^ernot\.bit(\d+)$", suffix)
+    if m:
+        return [R(f"er.fa{int(m.group(1))}.ha2.sum.layer2")]
+    m = re.match(r"^subv\.fa(\d+)\.(.+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        a_sig = one if k == 0 else zero
+        cin = one if k == 0 else R(f"subv.fa{k - 1}.carry_or")
+        return _fa_member_inputs(m.group(2), f"{prefix}.subv.fa{k}", a_sig, R(f"ernot.bit{k}"), cin, reg)
+    m = re.match(r"^rsh\.bit(\d+)$", suffix)
+    if m:
+        k = int(m.group(1))
+        return [R(f"subv.fa{k}.ha2.sum.layer2"), R("er.underflow")]
+    m = re.match(r"^dsh\.s(\d+)\.(.+)$", suffix)
+    if m:
+        j, rest = int(m.group(1)), m.group(2)
+        sel = R(f"rsh.bit{j}")
+
+        def din(k: int) -> int:
+            if k < 0 or k > F + 1:
+                return zero
+            return MF(k) if j == 0 else R(f"dsh.s{j - 1}.bit{k}.or")
+
+        if rest == "drop":
+            return [din(k) for k in range(1 << j)]
+        if rest == "st_and":
+            return [sel, R(f"dsh.s{j}.drop")]
+        if rest == "sticky":
+            prev = zero if j == 0 else R(f"dsh.s{j - 1}.sticky")
+            return [prev, R(f"dsh.s{j}.st_and")]
+        mm = re.match(r"^bit(\d+)\.(not_sel|and_a|and_b|or)$", rest)
+        if mm:
+            k, kind = int(mm.group(1)), mm.group(2)
+            if kind == "not_sel":
+                return [sel]
+            if kind == "and_a":
+                return [din(k), R(f"dsh.s{j}.bit{k}.not_sel")]
+            if kind == "and_b":
+                return [din(k + (1 << j)), sel]
+            return [R(f"dsh.s{j}.bit{k}.and_a"), R(f"dsh.s{j}.bit{k}.and_b")]
+    m = re.match(r"^sig\.bit(\d+)$", suffix)
+    if m:
+        return [shifted(int(m.group(1)) + 1), R("not_deep")]
+    m = re.match(r"^rnd\.bit(\d+)\.(.+)$", suffix)
+    if m:
+        k, rest = int(m.group(1)), m.group(2)
+        cin = R("round.up") if k == 0 else R(f"rnd.bit{k - 1}.carry")
+        f_bit = R(f"sig.bit{k}")
+        if rest in ("xor.layer1.or", "xor.layer1.nand", "carry"):
+            return [f_bit, cin]
+        if rest == "xor.layer2":
+            return [R(f"rnd.bit{k}.xor.layer1.or"), R(f"rnd.bit{k}.xor.layer1.nand")]
+    m = re.match(r"^exp_round\.bit(\d+)\.(.+)$", suffix)
+    if m:
+        k, rest = int(m.group(1)), m.group(2)
+        cin = R(f"rnd.bit{F - 1}.carry") if k == 0 else R(f"exp_round.bit{k - 1}.carry")
+        e_bit = R(f"exprc.bit{k}")
+        if rest in ("xor.layer1.or", "xor.layer1.nand", "carry"):
+            return [e_bit, cin]
+        if rest == "xor.layer2":
+            return [R(f"exp_round.bit{k}.xor.layer1.or"), R(f"exp_round.bit{k}.xor.layer1.nand")]
+
+    # --- specials, sign selection, output pack ---
+    specials = {
+        "p_inf": [R("a.is_inf"), R("b.is_inf")],
+        "not_p_inf": [R("p_inf")],
+        "inf0a": [R("a.is_inf"), R("b.is_zero")],
+        "inf0b": [R("b.is_inf"), R("a.is_zero")],
+        "inf0": [R("inf0a"), R("inf0b")],
+        "pc_sdiff.or": [sp, sc],
+        "pc_sdiff.nand": [sp, sc],
+        "pc_sdiff": [R("pc_sdiff.or"), R("pc_sdiff.nand")],
+        "infinf_nan": [R("p_inf"), R("c.is_inf"), R("pc_sdiff")],
+        "in_nan": [R("a.is_nan"), R("b.is_nan"), R("c.is_nan")],
+        "nan": [R("in_nan"), R("inf0"), R("infinf_nan")],
+        "not_nan": [R("nan")],
+        "any_inf": [R("p_inf"), R("c.is_inf")],
+        "not_any_inf": [R("any_inf")],
+        "er.and_low": [R(f"exp_round.bit{k}.xor.layer2") for k in range(E)],
+        "er.hi": [R(f"exp_round.bit{E}.xor.layer2"), R(f"exp_round.bit{E + 1}.xor.layer2"),
+                  R(f"exp_round.bit{E + 2}.xor.layer2")],
+        "er.ge_emax": [R("er.and_low"), R("er.hi")],
+        "overflow": [R("er.ge_emax"), R("er.not_underflow")],
+        "inf_or_ovf": [R("any_inf"), R("overflow")],
+        "not_inf_path": [R("inf_or_ovf")],
+        "inf": [R("not_nan"), R("inf_or_ovf")],
+        "res_zero": [R(f"mag.bit{k}.or") for k in range(MG)],
+        "not_res_zero": [R("res_zero")],
+        "zero": [R("not_nan"), R("not_inf_path"), R("res_zero")],
+        "norm": [R("not_nan"), R("not_inf_path"), R("not_res_zero")],
+        "fin_sign.sub.and_ge": [R("ge"), sp],
+        "fin_sign.sub.and_lt": [R("not_ge"), sc],
+        "fin_sign.sub": [R("fin_sign.sub.and_ge"), R("fin_sign.sub.and_lt")],
+        "fin_sign.and_sub": [R("fin_sign.sub"), R("eff_sub")],
+        "fin_sign.and_add": [sp, R("eff_add")],
+        "fin_sign": [R("fin_sign.and_sub"), R("fin_sign.and_add")],
+        "p_zero": [R("a.is_zero"), R("b.is_zero")],
+        "bothzero": [R("p_zero"), R("c.is_zero")],
+        "negzero": [R("bothzero"), sp, sc],
+        "sign_z.fin": [R("fin_sign"), R("not_res_zero")],
+        "sign_z": [R("sign_z.fin"), R("negzero")],
+        "sign.term_p": [R("p_inf"), sp],
+        "sign.term_c": [R("not_p_inf"), R("c.is_inf"), sc],
+        "sign.term_z": [R("not_any_inf"), R("sign_z")],
+        "sign_pre": [R("sign.term_p"), R("sign.term_c"), R("sign.term_z")],
+        "sign_out": [R("sign_pre"), R("not_nan")],
+    }
+    if suffix in specials:
+        return specials[suffix]
+    m = re.match(r"^exp_out\.bit(\d+)(\.norm_and)?$", suffix)
+    if m:
+        k = int(m.group(1))
+        if m.group(2):
+            return [R("norm"), R(f"exp_round.bit{k}.xor.layer2")]
+        return [R("nan"), R("inf"), R(f"exp_out.bit{k}.norm_and")]
+    m = re.match(r"^frac_out\.bit(\d+)(\.norm_and)?$", suffix)
+    if m:
+        k = int(m.group(1))
+        if m.group(2):
+            return [R("norm"), R(f"rnd.bit{k}.xor.layer2")]
+        nan_sig = R("nan") if k == F - 1 else zero
+        return [nan_sig, R(f"frac_out.bit{k}.norm_and")]
+
+    return None
+
+
 def infer_float_add_inputs(gate: str, reg: SignalRegistry, family: str,
                            exp_bits: int, frac_bits: int) -> Optional[List[int]]:
     """Complete wiring for the self-contained float addition pipeline."""
@@ -4488,14 +5363,15 @@ def infer_inputs_for_gate(gate: str, reg: SignalRegistry, tensors: Dict[str, tor
         if rv is not None:
             return rv
     # Self-contained float networks (complete wiring, raw-word inputs).
-    m = re.match(r"^(float16|float32)\.(cmp|mul|div|add)(\.|$)", gate)
+    m = re.match(r"^(float16|float32)\.(cmp|mul|div|add|fma)(\.|$)", gate)
     if m:
         family = m.group(1)
         e_bits, f_bits = (5, 10) if family == "float16" else (8, 23)
         infer_fn = {"cmp": infer_float_cmp_inputs,
                     "mul": infer_float_mul_inputs,
                     "div": infer_float_div_inputs,
-                    "add": infer_float_add_inputs}[m.group(2)]
+                    "add": infer_float_add_inputs,
+                    "fma": infer_float_fma_inputs}[m.group(2)]
         fc = infer_fn(gate, reg, family, e_bits, f_bits)
         if fc is not None:
             return fc
@@ -5040,6 +5916,13 @@ def cmd_alu(args) -> None:
     except ValueError as e:
         print(f"  float16 DIV already exists: {e}")
 
+    print("\nGenerating float16 FMA circuit...")
+    try:
+        add_float_fma(tensors, "float16", 5, 10)
+        print("  Added float16 fused multiply-add (single rounding)")
+    except ValueError as e:
+        print(f"  float16 FMA already exists: {e}")
+
     print("\nGenerating float16 CMP circuits...")
     try:
         add_float16_cmp(tensors)
@@ -5075,6 +5958,13 @@ def cmd_alu(args) -> None:
     except ValueError as e:
         print(f"  float32 DIV already exists: {e}")
 
+    print("\nGenerating float32 FMA circuit...")
+    try:
+        add_float_fma(tensors, "float32", 8, 23)
+        print("  Added float32 fused multiply-add (single rounding)")
+    except ValueError as e:
+        print(f"  float32 FMA already exists: {e}")
+
     print("\nGenerating float32 CMP circuits...")
     try:
         add_float32_cmp(tensors)
@@ -5190,6 +6080,7 @@ def cmd_rv32(args) -> None:
     add_float32_add(tensors)
     add_float32_mul(tensors)
     add_float32_div(tensors)
+    add_float_fma(tensors, "float32", 8, 23)
     add_float32_cmp(tensors)
     add_rv32_extras(tensors)
     tensors["manifest.data_bits"] = torch.tensor([32.0], dtype=torch.float32)

src/eval.py

@@ -816,6 +816,99 @@ def float_div_oracle(aw: int, bw: int, exp_bits: int, frac_bits: int) -> int:
     return (s << (E + F)) | sig
 
 
+def float_fma_oracle(aw: int, bw: int, cw: int, exp_bits: int, frac_bits: int) -> int:
+    """Expected word for round(a*b + c) with a SINGLE rounding: exact IEEE
+    specials (NaN, infinities, inf*0 and inf-inf -> NaN, signed zeros, exact
+    cancellation -> +0), subnormal operands and gradual-underflow results,
+    round-to-nearest-even. Pure integer arithmetic, so exact."""
+    E, F = exp_bits, frac_bits
+    emax = (1 << E) - 1
+    fmask = (1 << F) - 1
+    bias = (1 << (E - 1)) - 1
+    qnan = (emax << F) | (1 << (F - 1))
+
+    def dec(w):
+        return (w >> (E + F)) & 1, (w >> F) & emax, w & fmask
+    sa, ea, fa = dec(aw)
+    sb, eb, fb = dec(bw)
+    sc, ec, fc = dec(cw)
+    sp = sa ^ sb
+    a_nan = ea == emax and fa != 0
+    b_nan = eb == emax and fb != 0
+    c_nan = ec == emax and fc != 0
+    a_inf = ea == emax and fa == 0
+    b_inf = eb == emax and fb == 0
+    c_inf = ec == emax and fc == 0
+    a_zero = ea == 0 and fa == 0
+    b_zero = eb == 0 and fb == 0
+    c_zero = ec == 0 and fc == 0
+    if a_nan or b_nan or c_nan:
+        return qnan
+    if (a_inf and b_zero) or (b_inf and a_zero):
+        return qnan
+    if a_inf or b_inf:
+        if c_inf and sc != sp:
+            return qnan
+        return (sp << (E + F)) | (emax << F)
+    if c_inf:
+        return (sc << (E + F)) | (emax << F)
+
+    Ma = ((1 << F) if ea else 0) | fa
+    Mb = ((1 << F) if eb else 0) | fb
+    Mc = ((1 << F) if ec else 0) | fc
+    eea = ea if ea else 1
+    eeb = eb if eb else 1
+    eec = ec if ec else 1
+    P = Ma * Mb
+    pe = eea + eeb - 2 * bias - 2 * F
+    ce = eec - bias - F
+    if P == 0 and c_zero:
+        return ((1 if (sp and sc) else 0) << (E + F))
+    g = min(pe, ce)
+    Pi = P << (pe - g)
+    Ci = Mc << (ce - g)
+    S = (-Pi if sp else Pi) + (-Ci if sc else Ci)
+    if S == 0:
+        return 0
+    s_out = 1 if S < 0 else 0
+    mag = -S if S < 0 else S
+    t = mag.bit_length() - 1
+    er = t + g + bias
+    if er >= 1:
+        drop = t - F
+        if drop <= 0:
+            m = mag << (-drop)
+            guard = sticky = 0
+        else:
+            m = mag >> drop
+            guard = (mag >> (drop - 1)) & 1
+            sticky = 1 if (mag & ((1 << (drop - 1)) - 1)) else 0
+        frac = m & fmask
+        if guard and ((frac & 1) or sticky):
+            frac += 1
+            if frac > fmask:
+                frac = 0
+                er += 1
+        if er >= emax:
+            return (s_out << (E + F)) | (emax << F)
+        return (s_out << (E + F)) | (er << F) | frac
+    sh = (1 - bias - F) - g
+    if sh <= 0:
+        sig = mag << (-sh)
+        guard = sticky = 0
+    else:
+        sig = mag >> sh
+        guard = (mag >> (sh - 1)) & 1
+        sticky = 1 if (mag & ((1 << (sh - 1)) - 1)) else 0
+    if guard and ((sig & 1) or sticky):
+        sig += 1
+    if sig == 0:
+        return s_out << (E + F)
+    if sig >= (1 << F):
+        return (s_out << (E + F)) | (1 << F)
+    return (s_out << (E + F)) | sig
+
+
 def float_add_oracle(aw: int, bw: int, exp_bits: int, frac_bits: int) -> int:
     """Expected sum word under the documented contract: exact IEEE specials
     (NaN, infinities, opposite-sign infinities -> NaN, signed zeros, exact
@@ -4192,6 +4285,71 @@ class BatchedFitnessEvaluator:
 
         return scores, total
 
+    def _test_float_fma_composed(self, pop: Dict, family: str, exp_bits: int,
+                                 frac_bits: int, debug: bool) -> Tuple[torch.Tensor, int]:
+        """Composed fused-multiply-add test: rebuild the netlist from .inputs,
+        evaluate round(a*b+c) end to end over edge and random triples, compare
+        to the single-rounding oracle."""
+        pop_size = next(iter(pop.values())).shape[0]
+        scores = torch.zeros(pop_size, device=self.device)
+        prefix = f"{family}.fma"
+        try:
+            ne = NetlistEvaluator(pop, self.signal_registry, prefix, pop_size=pop_size)
+        except (KeyError, ValueError) as e:
+            if debug:
+                print(f"  {prefix} composed: SKIP ({e})")
+            return scores, 0
+        if f"{prefix}.norm" not in ne.gates:
+            if debug:
+                print(f"  {prefix} composed: SKIP (pre-composition wiring)")
+            return scores, 0
+
+        E, F = exp_bits, frac_bits
+        W = 1 + E + F
+        directed, randoms = float_test_words(E, F)
+        base = directed + randoms[:24]
+        triples = [(base[i], base[(i * 7 + 3) % len(base)], base[(i * 13 + 5) % len(base)])
+                   for i in range(len(base))]
+        triples += list(zip(randoms, randoms[1:], randoms[2:]))
+        a_words = torch.tensor([t[0] for t in triples], dtype=torch.long)
+        b_words = torch.tensor([t[1] for t in triples], dtype=torch.long)
+        c_words = torch.tensor([t[2] for t in triples], dtype=torch.long)
+        ext = {}
+        for i in range(W):
+            ext[f"$a[{i}]"] = ((a_words >> (W - 1 - i)) & 1).float()
+            ext[f"$b[{i}]"] = ((b_words >> (W - 1 - i)) & 1).float()
+            ext[f"$c[{i}]"] = ((c_words >> (W - 1 - i)) & 1).float()
+        try:
+            out = ne.run(ext)
+        except KeyError as e:
+            if debug:
+                print(f"  {prefix} composed: SKIP (unbound signal {e})")
+            return scores, 0
+
+        got = out[f"{prefix}.sign_out"].double() * float(1 << (E + F))
+        for k in range(E):
+            got = got + out[f"{prefix}.exp_out.bit{k}"].double() * float(1 << (F + k))
+        for k in range(F):
+            got = got + out[f"{prefix}.frac_out.bit{k}"].double() * float(1 << k)
+        expected = torch.tensor(
+            [float(float_fma_oracle(t[0], t[1], t[2], E, F)) for t in triples],
+            dtype=torch.float64).unsqueeze(1)
+        correct = (got == expected).float().sum(0)
+        scores += correct
+        failures = []
+        if pop_size == 1:
+            for i in range(len(triples)):
+                if got[i, 0].item() != expected[i, 0].item():
+                    failures.append((list(triples[i]), int(expected[i, 0].item()),
+                                     int(got[i, 0].item())))
+        self._record(f"{prefix}.composed", int(correct[0].item()), len(triples), failures[:10])
+        if debug:
+            r = self.results[-1]
+            print(f"  {r.name}: {r.passed}/{r.total} {'PASS' if r.success else 'FAIL'}")
+            for inp, exp_v, got_v in (failures or [])[:4]:
+                print(f"    FAIL: a={inp[0]:#x} b={inp[1]:#x} c={inp[2]:#x} expected {exp_v:#x}, got {got_v:#x}")
+        return scores, len(triples)
+
     # =========================================================================
     # FLOAT16 STRUCTURE CHECKS
     # =========================================================================
@@ -5105,6 +5263,12 @@ class BatchedFitnessEvaluator:
             total_tests += t
             self.category_scores['float16_add_composed'] = (s[0].item() if pop_size == 1 else s.mean().item(), t)
 
+            if 'float16.fma.norm.weight' in population:
+                s, t = self._test_float_fma_composed(population, 'float16', 5, 10, debug)
+                scores += s
+                total_tests += t
+                self.category_scores['float16_fma_composed'] = (s[0].item() if pop_size == 1 else s.mean().item(), t)
+
             s, t = self._test_float16_core(population, debug)
             scores += s
             total_tests += t
@@ -5174,6 +5338,12 @@ class BatchedFitnessEvaluator:
             total_tests += t
             self.category_scores['float32_add_composed'] = (s[0].item() if pop_size == 1 else s.mean().item(), t)
 
+            if 'float32.fma.norm.weight' in population:
+                s, t = self._test_float_fma_composed(population, 'float32', 8, 23, debug)
+                scores += s
+                total_tests += t
+                self.category_scores['float32_fma_composed'] = (s[0].item() if pop_size == 1 else s.mean().item(), t)
+
             s, t = self._test_float32_core(population, debug)
             scores += s
             total_tests += t

src/machines.py

@@ -361,6 +361,9 @@ class Asm:
         if mn in ("fadd.s", "fsub.s", "fmul.s", "fdiv.s"):
             f7 = {"fadd.s": 0, "fsub.s": 4, "fmul.s": 8, "fdiv.s": 12}[mn]
             return (f7 << 25) | (a[2] << 20) | (a[1] << 15) | (a[0] << 7) | 0x53
+        if mn in ("fmadd.s", "fmsub.s", "fnmsub.s", "fnmadd.s"):   # R4-type: rd,rs1,rs2,rs3
+            op = {"fmadd.s": 0x43, "fmsub.s": 0x47, "fnmsub.s": 0x4b, "fnmadd.s": 0x4f}[mn]
+            return (a[3] << 27) | (a[2] << 20) | (a[1] << 15) | (a[0] << 7) | op
         if mn in ("fle.s", "flt.s", "feq.s"):
             f3 = {"fle.s": 0, "flt.s": 1, "feq.s": 2}[mn]
             return (0x50 << 25) | (a[2] << 20) | (a[1] << 15) | (f3 << 12) | (a[0] << 7) | 0x53
@@ -529,6 +532,13 @@ class RefRV32:
             elif f7 == 0x68: FR[rd] = fcvt_s_w_ref(R[rs1]) # FCVT.S.W
             elif f7 == 0x78: FR[rd] = a
             elif f7 == 0x70: wr(FR[rs1])
+        elif op in (0x43, 0x47, 0x4b, 0x4f):              # FMADD/FMSUB/FNMSUB/FNMADD.S
+            from eval import float_fma_oracle
+            rs3 = (w >> 27) & 0x1F
+            fa, fb, fc = FR[rs1], FR[rs2], FR[rs3]
+            if op in (0x4b, 0x4f): fa ^= 0x80000000       # negate product
+            if op in (0x47, 0x4f): fc ^= 0x80000000       # negate addend
+            FR[rd] = float_fma_oracle(fa, fb, fc, 8, 23)
         elif op == 0x0B:                                  # NEUR (custom-0)
             x = a & 0xFF
             pos, neg = b & 0xFF, (b >> 8) & 0xFF
@@ -574,7 +584,7 @@ class Rv32ThresholdCPU:
         self.registry = load_metadata(path)["signal_registry"]
         self.alu = GenericThresholdALU(self.T, 32)
         self.fpu = {op: NetlistEvaluator(self.T, self.registry, f"float32.{op}")
-                    for op in ("add", "mul", "div", "cmp")}
+                    for op in ("add", "mul", "div", "cmp", "fma")}
         self.pairs_issued = 0
 
     # ---- gate helpers -------------------------------------------------
@@ -1080,6 +1090,14 @@ class Rv32ThresholdCPU:
                 FR[rd] = a
             elif f7 == 0x70:
                 wr(FR[rs1])
+        elif op in (0x43, 0x47, 0x4b, 0x4f):     # FMADD/FMSUB/FNMSUB/FNMADD.S
+            rs3 = (w >> 27) & 0x1F
+            fa, fb, fc = FR[rs1], FR[rs2], FR[rs3]
+            if op in (0x4b, 0x4f):               # negate the product
+                fa ^= 0x80000000
+            if op in (0x47, 0x4f):               # negate the addend
+                fc ^= 0x80000000
+            FR[rd] = self._fpu_word3(fa, fb, fc)
         elif op == 0x0B:
             wr(self.neur(a, b))
         elif op == 0x73:
@@ -1108,6 +1126,24 @@ class Rv32ThresholdCPU:
             v |= int(out[f"{p}.frac_out.bit{k}"][0, 0].item()) << k
         return v
 
+    def _fpu_ext3(self, fa, fb, fc):
+        ext = {}
+        for i in range(32):
+            ext[f"$a[{i}]"] = (fa >> (31 - i)) & 1
+            ext[f"$b[{i}]"] = (fb >> (31 - i)) & 1
+            ext[f"$c[{i}]"] = (fc >> (31 - i)) & 1
+        return ext
+
+    def _fpu_word3(self, fa, fb, fc):
+        out = self.fpu["fma"].run(self._fpu_ext3(fa, fb, fc))
+        p = "float32.fma"
+        v = int(out[f"{p}.sign_out"][0, 0].item()) << 31
+        for k in range(8):
+            v |= int(out[f"{p}.exp_out.bit{k}"][0, 0].item()) << (23 + k)
+        for k in range(23):
+            v |= int(out[f"{p}.frac_out.bit{k}"][0, 0].item()) << k
+        return v
+
     def run(self, state, max_cycles=400):
         s = dict(state)
         s["_mem_bits"] = torch.tensor(
@@ -1527,6 +1563,32 @@ def prog_float():
                                and s["regs"][12] == 1 and s["regs"][13] == f4)
 
 
+def prog_fma():
+    a = Asm()
+    a.lui(1, 0x1)
+    a.flw(1, 1, 0)              # f1 = 1.5
+    a.flw(2, 1, 4)             # f2 = 2.5
+    a.flw(3, 1, 8)             # f3 = 3.0
+    a.fmadd_s(4, 1, 2, 3)       # 1.5*2.5 + 3.0 = 6.75
+    a.fmsub_s(5, 1, 2, 3)       # 1.5*2.5 - 3.0 = 0.75
+    a.fnmadd_s(6, 1, 2, 3)      # -(1.5*2.5) - 3.0 = -6.75
+    a.fnmsub_s(7, 1, 2, 3)      # -(1.5*2.5) + 3.0 = -0.75
+    a.fmv_x_w(10, 4)
+    a.fmv_x_w(11, 5)
+    a.fmv_x_w(12, 6)
+    a.fmv_x_w(13, 7)
+    a.ecall()
+    mem = a.assemble()
+    f3_0 = struct.unpack("<I", struct.pack("<f", 3.0))[0]
+    for i, wv in ((0, F1_0), (4, F2_5), (8, f3_0)):
+        for b in range(4):
+            mem[0x1000 + i + b] = (wv >> (8 * b)) & 0xFF
+    def word(x):
+        return struct.unpack("<I", struct.pack("<f", x))[0]
+    return mem, 30, lambda s: (s["regs"][10] == word(6.75) and s["regs"][11] == word(0.75)
+                               and s["regs"][12] == word(-6.75) and s["regs"][13] == word(-0.75))
+
+
 def prog_neur():
     # XOR of two bits computed by a two-layer network of NEUR instructions:
     # h1 = OR(a,b) = H(a + b - 1); h2 = NAND(a,b) = H(-a - b + 1);
@@ -1756,6 +1818,7 @@ def rv32_test() -> int:
         ("mem_call", prog_mem_call),
         ("muldiv", prog_muldiv),
         ("float_subset", prog_float),
+        ("fma", prog_fma),
         ("fcvt_roundtrip", prog_fcvt),
         ("fcvt_rounding_modes", prog_fcvt_rm),
         ("neur_xor_net", prog_neur),

todo.md

@@ -2,6 +2,5 @@
 
 Unfinished work.
 
-- The F extension includes a fused multiply-add instruction that rounds once.
-- Program-counter sequencing and instruction decode are computed by threshold gates rather than by fixed wiring in the runtimes.
-- A machine-checked correctness proof relates the shipped weights to the ISA.
+1. Program-counter sequencing and instruction decode are computed by threshold gates rather than by fixed wiring in the runtimes.
+2. A machine-checked correctness proof relates the shipped weights to the ISA.

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