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<div><div class="t">NWO ASM</div><div class="s">Neural Wave Operator</div></div>
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v4.0 · static substrate<br>
MIT — free to build on<br>
USDC settlement on Base
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<h1>Compiler &amp; ISA</h1>
<span class="badge">v4.0 · pipeline</span>
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<p class="page-lead">The NWO-ASM compiler lowers a single source program into the <b>Process-Matrix IR</b>, then routes each block through the MetaState optimizer to its best substrate target. Multi-stage by design: parse, lower, optimize, schedule, emit. Targets are pluggable — and writing the language itself is <b>free, MIT-licensed</b>, with no platform lock-in.</p>
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<b>HONEST STATUS</b> · The CPU / GPU / QPU emission paths are live. The EVM-target backend (so EVM chains can invoke NWO-ASM computations and receive verified results back) is <b>design-complete, integration in progress</b>; the cross-chain quantum-secured bridge is <b>roadmap</b>. Nothing here is claimed before it is shipped.
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<h2 class="s">Compilation as a <b>routed pipeline</b></h2>
<p class="p">Each stage produces a typed artifact handed to the next. The optimizer chooses substrate placement after IR lowering, using free-energy minimisation across substrate cost models.</p>
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<!-- 01 source -->
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<text x="30" y="170" fill="#4a4a4a" font-size="8" letter-spacing="1.4">01 · SOURCE</text>
<text x="30" y="192" fill="#fff" font-size="12.5" font-weight="500">.nwo file</text>
<text x="30" y="208" fill="#9a9a9a" font-size="10">process matrices</text>
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<!-- 02 parse -->
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<text x="214" y="170" fill="#4a4a4a" font-size="8" letter-spacing="1.4">02 · PARSE</text>
<text x="214" y="192" fill="#fff" font-size="12.5" font-weight="500">AST</text>
<text x="214" y="208" fill="#9a9a9a" font-size="10">typed syntax tree</text>
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<!-- 03 lower to IR -->
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<text x="398" y="170" fill="#4a4a4a" font-size="8" letter-spacing="1.4">03 · LOWER</text>
<text x="398" y="192" fill="#fff" font-size="12.5" font-weight="500">Process-Matrix IR</text>
<text x="398" y="208" fill="#9a9a9a" font-size="10">.pmx</text>
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<!-- 04 optimize -->
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<text x="592" y="170" fill="#4a4a4a" font-size="8" letter-spacing="1.4">04 · OPTIMIZE</text>
<text x="592" y="192" fill="#fff" font-size="12.5" font-weight="500">MetaState route</text>
<text x="592" y="208" fill="#9a9a9a" font-size="10">free-energy choice</text>
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<text x="836" y="43" fill="#fff" font-size="11.5">LLVM → CPU</text>
<text x="945" y="43" fill="#fff" font-size="8" text-anchor="end">LIVE</text>
<rect x="822" y="80" width="140" height="34" rx="8" fill="#000" stroke="rgba(255,255,255,.35)" stroke-width="1"/>
<text x="836" y="101" fill="#fff" font-size="11.5">PTX/HIP → GPU</text>
<text x="945" y="101" fill="#fff" font-size="8" text-anchor="end">LIVE</text>
<rect x="822" y="138" width="140" height="34" rx="8" fill="#000" stroke="rgba(255,255,255,.35)" stroke-width="1"/>
<text x="836" y="159" fill="#fff" font-size="11.5">QASM3 → QPU</text>
<text x="945" y="159" fill="#fff" font-size="8" text-anchor="end">LIVE</text>
<rect x="822" y="196" width="140" height="34" rx="8" fill="#000" stroke="rgba(255,255,255,.35)" stroke-width="1"/>
<text x="836" y="217" fill="#fff" font-size="11.5">ECG-hive · BCI</text>
<text x="945" y="217" fill="#9a9a9a" font-size="8" text-anchor="end">BETA</text>
<rect x="822" y="254" width="140" height="34" rx="8" fill="#000" stroke="rgba(255,255,255,.15)" stroke-width="1" stroke-dasharray="4 3"/>
<text x="836" y="275" fill="#9a9a9a" font-size="11.5">EVM bytecode</text>
<text x="945" y="275" fill="#5a5a5a" font-size="8" text-anchor="end">DESIGN</text>
<rect x="822" y="306" width="140" height="34" rx="8" fill="#000" stroke="rgba(255,255,255,.15)" stroke-width="1" stroke-dasharray="4 3"/>
<text x="836" y="327" fill="#9a9a9a" font-size="11.5">Photonic · Neuro</text>
<text x="945" y="327" fill="#5a5a5a" font-size="8" text-anchor="end">ROADMAP</text>
<text x="14" y="350" fill="#4a4a4a" font-size="8" letter-spacing="1.4">SOLID = LIVE TARGET · DASHED = NOT YET SHIPPED · MIT-LICENSED COMPILER · NO PLATFORM LOCK-IN</text>
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</div>
<!-- FEATURE GRID -->
<div class="sec-tag">Features</div>
<h2 class="s">Six pieces of the <b>compiler</b></h2>
<div class="gcards cols3">
<div class="gcard"><div class="gcard-in">
<div class="ic"><svg viewBox="0 0 24 24"><path d="M3 6h18M3 12h12M3 18h18"/></svg></div>
<h3>Multi-stage</h3>
<p>Parse → AST → Process-Matrix IR → optimized IR → target emission. Each stage is inspectable and replaceable.</p>
<span class="st live">Live</span>
</div></div>
<div class="gcard"><div class="gcard-in">
<div class="ic"><svg viewBox="0 0 24 24"><circle cx="12" cy="12" r="3"/><circle cx="12" cy="12" r="9"/><path d="M12 3v3m0 12v3M3 12h3m12 0h3"/></svg></div>
<h3>MetaState routing</h3>
<p>The optimizer evaluates a free-energy bound across substrate cost models to choose per-block placement.</p>
<span class="st live">Live</span>
</div></div>
<div class="gcard"><div class="gcard-in">
<div class="ic"><svg viewBox="0 0 24 24"><path d="M13 2L3 14h7l-1 8 10-12h-7z"/></svg></div>
<h3>Optimization passes</h3>
<p>Dead-code elimination, causal-coherence scheduling, kernel fusion, and substrate-aware tiling on the IR.</p>
<span class="st live">Live</span>
</div></div>
<div class="gcard"><div class="gcard-in">
<div class="ic"><svg viewBox="0 0 24 24"><rect x="5" y="11" width="14" height="10" rx="2"/><path d="M8 11V7a4 4 0 0 1 8 0v4"/></svg></div>
<h3>Post-quantum signing</h3>
<p>Compiled artifacts can be signed with CRYSTALS-Dilithium so the binary's provenance is verifiable on-chain.</p>
<span class="st live">Live</span>
</div></div>
<div class="gcard"><div class="gcard-in">
<div class="ic"><svg viewBox="0 0 24 24"><rect x="3" y="3" width="7" height="7"/><rect x="14" y="3" width="7" height="7"/><rect x="3" y="14" width="7" height="7"/><rect x="14" y="14" width="7" height="7"/></svg></div>
<h3>Multi-backend</h3>
<p>One source emits to LLVM (CPU), PTX/HIP (GPU), or QASM3 (QPU). ECG-hive backend is BETA. EVM-target is design-complete.</p>
<span class="st live">Live</span>
</div></div>
<div class="gcard"><div class="gcard-in">
<div class="ic"><svg viewBox="0 0 24 24"><circle cx="12" cy="12" r="2"/><path d="M12 2v6M12 16v6M2 12h6M16 12h6M5 5l4 4M15 15l4 4M5 19l4-4M15 9l4-4"/></svg></div>
<h3>Agent-native</h3>
<p>Compile, sign, and dispatch from an autonomous agent loop. The terminal exposes the full pipeline as commands.</p>
<span class="st live">Live</span>
</div></div>
</div>
<!-- WORKED EXAMPLE -->
<div class="sec-tag">Worked example</div>
<h2 class="s">From <b>source</b> to <b>QASM3</b> + USDC settlement</h2>
<p class="p">A minimal NWO-ASM program that scores an anomaly signal with the symbolic regressor, then lifts the residual to a 2-qubit process matrix the optimizer can route to a QPU when present, with a classical fallback. Per-call settlement is automatic.</p>
<span class="label">signal.nwo · source</span>
<pre class="code"><span class="c"># anomaly score on a 1-D signal, fit symbolic residual, route best path</span>
<span class="k">module</span> signal {
<span class="k">input</span> s : f32[8192]
<span class="k">output</span> r : pmx[2] <span class="c"># 2-qubit process matrix</span>
<span class="k">let</span> v = anomaly.score(s) <span class="c"># free-energy bound</span>
<span class="k">let</span> e = eml.regress(s, v) <span class="c"># closed-form residual</span>
r = pmx.lift(e) <span class="c"># causal-coherence channel</span>
<span class="k">route</span> r <span class="o">via</span> metastate {
<span class="o">prefer</span>: qpu <span class="c"># IBM or Origin Wukong if available</span>
<span class="o">fallback</span>: gpu <span class="c"># otherwise nwo-agi distributed GPU</span>
<span class="o">settle</span>: usdc(base) <span class="c"># per-call, via splitter — no new contract</span>
}
}</pre>
<span class="label">terminal · compile and emit</span>
<pre class="code"><span class="c"># compile and inspect IR</span>
nwo-asm build signal.nwo --emit pmx,qasm3
<span class="c">→ signal.pmx</span>
<span class="c">→ signal.qasm3</span>
<span class="c"># sign and dispatch (settles in USDC on Base)</span>
nwo-asm dispatch signal.qasm3 --backend qpu --wallet $WALLET
<span class="c">→ dispatched to backend = qpu(origin_wukong) · proof = 0xPOI…</span>
<span class="c">→ settled $0.0008 USDC · split 35/35/30 · affiliate (if set) +15%</span></pre>
<!-- ISA REFERENCE -->
<div class="sec-tag">ISA reference</div>
<h2 class="s">Core instruction set <b>(stable)</b></h2>
<table class="tech">
<tr><th>Op</th><th>Signature</th><th>Notes</th></tr>
<tr><td><b>anomaly.score</b></td><td><code>f32[N] → f32</code></td><td>Free-energy anomaly metric on a signal.</td></tr>
<tr><td><b>eml.regress</b></td><td><code>(f32[N], f32) → expr</code></td><td>Closed-form symbolic regression.</td></tr>
<tr><td><b>pmx.lift</b></td><td><code>expr → pmx[k]</code></td><td>Lift a symbolic expression into a k-qubit process matrix.</td></tr>
<tr><td><b>route</b></td><td><code>pmx, policy → handle</code></td><td>Defer placement to the MetaState optimizer.</td></tr>
<tr><td><b>poi.verify</b></td><td><code>handle → proof</code></td><td>Proof of Inference; signed (PQC) and optionally zk.</td></tr>
<tr><td><b>anchor</b></td><td><code>proof → tx</code></td><td>Prepare keccak256 calldata to settle on Base.</td></tr>
</table>
<!-- TECH STACK -->
<div class="sec-tag">Tech stack</div>
<h2 class="s">What it's <b>built on</b></h2>
<table class="tech">
<tr><th>Layer</th><th>Tech</th><th>Status</th></tr>
<tr><td><b>Parser / IR</b></td><td><code>Rust</code> · tree-sitter grammar · custom Process-Matrix IR</td><td>Live</td></tr>
<tr><td><b>Optimizer</b></td><td>MetaState kernel · free-energy bound across substrate cost models</td><td>Live</td></tr>
<tr><td><b>CPU target</b></td><td>LLVM 17 lowering · x86 / ARM / RISC-V</td><td>Live</td></tr>
<tr><td><b>GPU target</b></td><td>PTX (CUDA) · HIP (ROCm) · Metal · nwo-agi distributed mesh</td><td>Live</td></tr>
<tr><td><b>QPU target</b></td><td>OpenQASM 3.0 emission · Qiskit Runtime · Origin QPanda</td><td>Live</td></tr>
<tr><td><b>Signing</b></td><td>CRYSTALS-Dilithium (PQC) · proof-of-inference attestation</td><td>Live</td></tr>
<tr><td><b>Settlement</b></td><td>Existing MetaStateSplitter on Base · 35/35/30 + 15% affiliate</td><td>Live · no new contract</td></tr>
<tr><td><b>EVM target</b></td><td>EVM bytecode emission for on-chain hooks · Solidity ABI surface</td><td>Design-complete</td></tr>
<tr><td><b>Cross-chain bridge</b></td><td>Quantum-secured message relay between chains and NWO-ASM</td><td>Roadmap</td></tr>
<tr><td><b>Photonic / neuromorphic / DNA / crystalline</b></td><td>Backend interfaces specified; pending hardware integration</td><td>Roadmap</td></tr>
</table>
<div class="callout">
<b>Licensing.</b> The compiler, ISA, and reference toolchain are <b>MIT</b>. Build on it, fork it, embed it, ship it — no royalty, no lock-in. Only the connectors that touch live external compute carry per-call USDC settlement.
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