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+ ════════════════════════════════════════════════════════════════════
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+ PROMPT TEMPLATE FOR GRADIO UI - Copy and Paste This
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+ ════════════════════════════════════════════════════════════════════
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+
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+ πŸ“‹ COPY THIS ENTIRE TEXT BLOCK BELOW:
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+ ────────────────────────────────────────────────────────────────────
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+
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+ You are Elinnos RTL Code Generator v1.0, a specialized Verilog/SystemVerilog code generation agent. Your role: Generate clean, synthesizable RTL code for hardware design tasks. Output ONLY functional RTL code with no $display, assertions, comments, or debug statements.
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+
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+ User:
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+ Generate a synchronous FIFO with 8-bit data width, depth 4, write_enable, read_enable, full flag, empty flag.
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+
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+ ────────────────────────────────────────────────────────────────────
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+
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+
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+ πŸ“ HOW TO USE IN GRADIO UI:
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+ ════════════════════════════════════════════════════════════════════
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+
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+ 1. Open: https://3833be2ce50507322f.gradio.live
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+
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+ 2. Navigate to: "πŸ§ͺ Test Inference" tab
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+
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+ 3. Model Selection:
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+ - Model Source: Local Model
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+ - Model: /workspace/ftt/semicon-finetuning-scripts/mistral-finetuned-fifo1
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+
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+ 4. Paste the prompt above into the "Prompt" textbox
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+
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+ 5. Settings:
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+ - Max Length: 1024
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+ - Temperature: 0.7
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+
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+ 6. Click: "πŸ”„ Run Inference"
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+
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+ 7. Wait ~5-10 seconds
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+
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+ 8. View your generated Verilog code!
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+
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+
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+ 🎯 OTHER EXAMPLES YOU CAN TRY:
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+ ════════════════════════════════════════════════════════════════════
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+
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+ Replace the "User:" line with any of these:
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+
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+ Example 1 (16-bit FIFO):
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+ ────────────────────────────────────────────────────────────────────
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+ You are Elinnos RTL Code Generator v1.0, a specialized Verilog/SystemVerilog code generation agent. Your role: Generate clean, synthesizable RTL code for hardware design tasks. Output ONLY functional RTL code with no $display, assertions, comments, or debug statements.
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+
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+ User:
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+ Generate a synchronous FIFO with 16-bit data width, depth 16, write_enable, read_enable, full flag, empty flag.
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+ ────────────────────────────────────────────────────────────────────
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+
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+
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+ Example 2 (32-bit FIFO):
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+ ────────────────────────────────────────────────────────────────────
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+ You are Elinnos RTL Code Generator v1.0, a specialized Verilog/SystemVerilog code generation agent. Your role: Generate clean, synthesizable RTL code for hardware design tasks. Output ONLY functional RTL code with no $display, assertions, comments, or debug statements.
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+
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+ User:
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+ Generate a synchronous FIFO with 32-bit data width, depth 32, write_enable, read_enable, full flag, empty flag.
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+ ────────────────────────────────────────────────────────────────────
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+
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+
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+ Example 3 (Custom FIFO):
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+ ────────────────────────────────────────────────────────────────────
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+ You are Elinnos RTL Code Generator v1.0, a specialized Verilog/SystemVerilog code generation agent. Your role: Generate clean, synthesizable RTL code for hardware design tasks. Output ONLY functional RTL code with no $display, assertions, comments, or debug statements.
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+
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+ User:
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+ Generate a synchronous FIFO with 64-bit data width, depth 8, write_enable, read_enable, full flag, empty flag, almost_full flag, almost_empty flag.
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+ ────────────────────────────────────────────────────────────────────
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+
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+
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+ πŸ’‘ QUICK TIPS:
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+ ════════════════════════════════════════════════════════════════════
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+
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+ βœ“ ALWAYS include the full system instruction (the "You are Elinnos..." part)
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+ βœ“ Keep the format: System instruction β†’ "User:" β†’ Your request
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+ βœ“ For best results, use temperature 0.3-0.7
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+ βœ“ Set max_length to 1024 for complete code generation
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+ βœ“ The model was trained on this exact format, so stick to it!
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+
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+
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+ βš™οΈ PARAMETER GUIDE:
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+ ════════════════════════════════════════════════════════════════════
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+
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+ Temperature Settings:
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+ 0.1 - 0.3 = Very deterministic, consistent output
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+ 0.4 - 0.6 = Balanced between consistency and variety
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+ 0.7 - 0.9 = More creative, varied outputs
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+
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+ Max Length:
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+ 512 = Quick tests, short modules
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+ 1024 = Standard FIFO modules (RECOMMENDED)
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+ 2048 = Complex modules with multiple features
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+ 4096 = Very large designs
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+
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+ πŸŽ‰ YOU'RE READY TO GO!
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+ ════════════════════════════════════════════════════════════════════
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+
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+ Your fine-tuned model is loaded and ready. Just copy the prompt
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+ above, paste it into the Gradio UI, and click "Run Inference"!
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+
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+ Access: https://3833be2ce50507322f.gradio.live
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+