// Verilated -*- C++ -*- // DESCRIPTION: Verilator output: Model implementation (design independent parts) #include "Vsim__pch.h" #include "verilated_vcd_c.h" //============================================================ // Constructors Vsim::Vsim(VerilatedContext* _vcontextp__, const char* _vcname__) : VerilatedModel{*_vcontextp__} , vlSymsp{new Vsim__Syms(contextp(), _vcname__, this)} , rootp{&(vlSymsp->TOP)} { // Register model with the context contextp()->addModel(this); contextp()->traceBaseModelCbAdd( [this](VerilatedTraceBaseC* tfp, int levels, int options) { traceBaseModel(tfp, levels, options); }); } Vsim::Vsim(const char* _vcname__) : Vsim(Verilated::threadContextp(), _vcname__) { } //============================================================ // Destructor Vsim::~Vsim() { delete vlSymsp; } //============================================================ // Evaluation function #ifdef VL_DEBUG void Vsim___024root___eval_debug_assertions(Vsim___024root* vlSelf); #endif // VL_DEBUG void Vsim___024root___eval_static(Vsim___024root* vlSelf); void Vsim___024root___eval_initial(Vsim___024root* vlSelf); void Vsim___024root___eval_settle(Vsim___024root* vlSelf); void Vsim___024root___eval(Vsim___024root* vlSelf); void Vsim::eval_step() { VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vsim::eval_step\n"); ); #ifdef VL_DEBUG // Debug assertions Vsim___024root___eval_debug_assertions(&(vlSymsp->TOP)); #endif // VL_DEBUG vlSymsp->__Vm_activity = true; vlSymsp->__Vm_deleter.deleteAll(); if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) { VL_DEBUG_IF(VL_DBG_MSGF("+ Initial\n");); Vsim___024root___eval_static(&(vlSymsp->TOP)); Vsim___024root___eval_initial(&(vlSymsp->TOP)); Vsim___024root___eval_settle(&(vlSymsp->TOP)); vlSymsp->__Vm_didInit = true; } VL_DEBUG_IF(VL_DBG_MSGF("+ Eval\n");); Vsim___024root___eval(&(vlSymsp->TOP)); // Evaluate cleanup Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp); } //============================================================ // Events and timing bool Vsim::eventsPending() { return !vlSymsp->TOP.__VdlySched.empty() && !contextp()->gotFinish(); } uint64_t Vsim::nextTimeSlot() { return vlSymsp->TOP.__VdlySched.nextTimeSlot(); } //============================================================ // Utilities const char* Vsim::name() const { return vlSymsp->name(); } //============================================================ // Invoke final blocks void Vsim___024root___eval_final(Vsim___024root* vlSelf); VL_ATTR_COLD void Vsim::final() { contextp()->executingFinal(true); Vsim___024root___eval_final(&(vlSymsp->TOP)); contextp()->executingFinal(false); } //============================================================ // Implementations of abstract methods from VerilatedModel const char* Vsim::hierName() const { return vlSymsp->name(); } const char* Vsim::modelName() const { return "Vsim"; } unsigned Vsim::threads() const { return 1; } void Vsim::prepareClone() const { contextp()->prepareClone(); } void Vsim::atClone() const { contextp()->threadPoolpOnClone(); } std::unique_ptr Vsim::traceConfig() const { return std::unique_ptr{new VerilatedTraceConfig{false, false, false}}; }; //============================================================ // Trace configuration void Vsim___024root__trace_decl_types(VerilatedVcd* tracep); void Vsim___024root__trace_init_top(Vsim___024root* vlSelf, VerilatedVcd* tracep); VL_ATTR_COLD static void trace_init(void* voidSelf, VerilatedVcd* tracep, uint32_t code) { // Callback from tracep->open() Vsim___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; if (!vlSymsp->_vm_contextp__->calcUnusedSigs()) { VL_FATAL_MT(__FILE__, __LINE__, __FILE__, "Turning on wave traces requires Verilated::traceEverOn(true) call before time 0."); } vlSymsp->__Vm_baseCode = code; tracep->pushPrefix(vlSymsp->name(), VerilatedTracePrefixType::SCOPE_MODULE); Vsim___024root__trace_decl_types(tracep); Vsim___024root__trace_init_top(vlSelf, tracep); tracep->popPrefix(); } VL_ATTR_COLD void Vsim___024root__trace_register(Vsim___024root* vlSelf, VerilatedVcd* tracep); VL_ATTR_COLD void Vsim::traceBaseModel(VerilatedTraceBaseC* tfp, int levels, int options) { (void)levels; (void)options; VerilatedVcdC* const stfp = dynamic_cast(tfp); if (VL_UNLIKELY(!stfp)) { vl_fatal(__FILE__, __LINE__, __FILE__,"'Vsim::trace()' called on non-VerilatedVcdC object;" " use --trace-fst with VerilatedFst object, and --trace-vcd with VerilatedVcd object"); } stfp->spTrace()->addModel(this); stfp->spTrace()->addInitCb(&trace_init, &(vlSymsp->TOP), name(), false, 6); Vsim___024root__trace_register(&(vlSymsp->TOP), stfp->spTrace()); }