// Verilated -*- C++ -*- // DESCRIPTION: Verilator output: Tracing implementation internals #include "verilated_vcd_c.h" #include "Vsim__Syms.h" VL_ATTR_COLD void Vsim___024root__trace_init_sub__TOP__0(Vsim___024root* vlSelf, VerilatedVcd* tracep) { VL_DEBUG_IF(VL_DBG_MSGF("+ Vsim___024root__trace_init_sub__TOP__0\n"); ); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; auto& vlSelfRef = std::ref(*vlSelf).get(); // Body const int c = vlSymsp->__Vm_baseCode; VL_TRACE_PUSH_PREFIX(tracep, "tb_full_adder", VerilatedTracePrefixType::SCOPE_MODULE, 0, 0); VL_TRACE_DECL_BIT(tracep,c+0,0,"a",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::VAR, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+1,0,"b",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::VAR, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+2,0,"cin",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::VAR, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+3,0,"sum",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+4,0,"cout",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_PUSH_PREFIX(tracep, "uut", VerilatedTracePrefixType::SCOPE_MODULE, 0, 0); VL_TRACE_DECL_BIT(tracep,c+0,0,"a",-1, VerilatedTraceSigDirection::INPUT, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+1,0,"b",-1, VerilatedTraceSigDirection::INPUT, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+2,0,"cin",-1, VerilatedTraceSigDirection::INPUT, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+3,0,"sum",-1, VerilatedTraceSigDirection::OUTPUT, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+4,0,"cout",-1, VerilatedTraceSigDirection::OUTPUT, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+5,0,"x1",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+5,0,"x2",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+3,0,"x3",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+4,0,"x4",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_DECL_BIT(tracep,c+3,0,"temp",-1, VerilatedTraceSigDirection::NONE, VerilatedTraceSigKind::WIRE, VerilatedTraceSigType::LOGIC); VL_TRACE_POP_PREFIX(tracep); VL_TRACE_POP_PREFIX(tracep); } VL_ATTR_COLD void Vsim___024root__trace_init_top(Vsim___024root* vlSelf, VerilatedVcd* tracep) { VL_DEBUG_IF(VL_DBG_MSGF("+ Vsim___024root__trace_init_top\n"); ); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; auto& vlSelfRef = std::ref(*vlSelf).get(); // Body Vsim___024root__trace_init_sub__TOP__0(vlSelf, tracep); } VL_ATTR_COLD void Vsim___024root__trace_const_0(void* voidSelf, VerilatedVcd::Buffer* bufp); VL_ATTR_COLD void Vsim___024root__trace_full_0(void* voidSelf, VerilatedVcd::Buffer* bufp); void Vsim___024root__trace_chg_0(void* voidSelf, VerilatedVcd::Buffer* bufp); void Vsim___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/); VL_ATTR_COLD void Vsim___024root__trace_register(Vsim___024root* vlSelf, VerilatedVcd* tracep) { VL_DEBUG_IF(VL_DBG_MSGF("+ Vsim___024root__trace_register\n"); ); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; auto& vlSelfRef = std::ref(*vlSelf).get(); // Body tracep->addConstCb(&Vsim___024root__trace_const_0, 0, vlSelf); tracep->addFullCb(&Vsim___024root__trace_full_0, 0, vlSelf); tracep->addChgCb(&Vsim___024root__trace_chg_0, 0, vlSelf); tracep->addCleanupCb(&Vsim___024root__trace_cleanup, vlSelf); } VL_ATTR_COLD void Vsim___024root__trace_const_0(void* voidSelf, VerilatedVcd::Buffer* bufp) { VL_DEBUG_IF(VL_DBG_MSGF("+ Vsim___024root__trace_const_0\n"); ); // Body Vsim___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; } VL_ATTR_COLD void Vsim___024root__trace_full_0_sub_0(Vsim___024root* vlSelf, VerilatedVcd::Buffer* bufp); VL_ATTR_COLD void Vsim___024root__trace_full_0(void* voidSelf, VerilatedVcd::Buffer* bufp) { VL_DEBUG_IF(VL_DBG_MSGF("+ Vsim___024root__trace_full_0\n"); ); // Body Vsim___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; Vsim___024root__trace_full_0_sub_0((&vlSymsp->TOP), bufp); } VL_ATTR_COLD void Vsim___024root__trace_full_0_sub_0(Vsim___024root* vlSelf, VerilatedVcd::Buffer* bufp) { VL_DEBUG_IF(VL_DBG_MSGF("+ Vsim___024root__trace_full_0_sub_0\n"); ); Vsim__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; auto& vlSelfRef = std::ref(*vlSelf).get(); // Body uint32_t* const oldp VL_ATTR_UNUSED = bufp->oldp(vlSymsp->__Vm_baseCode); bufp->fullBit(oldp+0,(vlSelfRef.tb_full_adder__DOT__a)); bufp->fullBit(oldp+1,(vlSelfRef.tb_full_adder__DOT__b)); bufp->fullBit(oldp+2,(vlSelfRef.tb_full_adder__DOT__cin)); bufp->fullBit(oldp+3,(((IData)(vlSelfRef.tb_full_adder__DOT__cin) ^ ((IData)(vlSelfRef.tb_full_adder__DOT__a) ^ (IData)(vlSelfRef.tb_full_adder__DOT__b))))); bufp->fullBit(oldp+4,((((IData)(vlSelfRef.tb_full_adder__DOT__a) & (IData)(vlSelfRef.tb_full_adder__DOT__b)) | ((IData)(vlSelfRef.tb_full_adder__DOT__cin) & ((IData)(vlSelfRef.tb_full_adder__DOT__a) | (IData)(vlSelfRef.tb_full_adder__DOT__b)))))); bufp->fullBit(oldp+5,(((IData)(vlSelfRef.tb_full_adder__DOT__a) ^ (IData)(vlSelfRef.tb_full_adder__DOT__b)))); }