vram/dram_cache.py

class DRAMCache:
    def __init__(self, size_mb=512):
        self.size_mb = size_mb
        self.cache = {}
        self.access_order = []

    def read(self, key):
        if key in self.cache:
            self.access_order.remove(key)
            self.access_order.append(key)
            return self.cache[key]
        return None

    def write(self, key, value):
        if key in self.cache:
            self.access_order.remove(key)
        elif len(self.cache) >= self.size_mb * 256:  # Assume 4KB per entry
            oldest = self.access_order.pop(0)
            del self.cache[oldest]
        self.cache[key] = value
        self.access_order.append(key)

class Buffer:
    def __init__(self, size_mb=64):
        self.size_mb = size_mb
        self.buffer = []

    def add(self, data):
        self.buffer.append(data)
        if len(self.buffer) > self.size_mb * 256:
            self.buffer.pop(0)

    def flush(self):
        flushed = self.buffer[:]
        self.buffer = []
        return flushed