computer-science-processes-database/processes/systems/systems-virtual-memory-paging.json

{
  "id": "systems-virtual-memory-paging",
  "name": "Virtual Memory Paging",
  "category": "computer_science",
  "subcategory": "systems",
  "subcategory_name": "Systems & Architecture",
  "description": "Virtual Memory Paging process visualization. This process flowchart outlines key steps, checks, and outputs.",
  "complexity": {
    "nodes": 11,
    "edges": 12,
    "conditionals": 1,
    "logicGates": {
      "orGates": 2,
      "andGates": 1,
      "notGates": 0,
      "total": 3
    },
    "level": "high",
    "detailLevel": "source_grounded_rebuild",
    "loops": 1
  },
  "colorScheme": {
    "red": {
      "hex": "#ff6b6b",
      "category": "Triggers & Inputs"
    },
    "yellow": {
      "hex": "#ffd43b",
      "category": "Structures & Objects"
    },
    "green": {
      "hex": "#51cf66",
      "category": "Processing & Operations"
    },
    "blue": {
      "hex": "#74c0fc",
      "category": "Intermediates & States"
    },
    "violet": {
      "hex": "#b197fc",
      "category": "Products & Outputs"
    }
  },
  "mermaid": "graph TD\n    N1[\"Virtual Memory Paging research...\"]\n    N2[\"Virtual Address\"]\n    N3[\"Access Request\"]\n    N4[\"Page Table\"]\n    N5[\"Physical Frames\"]\n    N6[\"Translate\"]\n    N7[\"Handle Page Fault\"]\n    N8[\"Working Set\"]\n    N9[\"Mapped Address\"]\n    N10{\"Source-grounded check...\"}\n    N11[\"Virtual Memory Paging...\"]\n\n    N1 --> N2\n    N2 --> N3\n    N3 --> N4\n    N4 --> N5\n    N5 --> N6\n    N6 --> N7\n    N7 --> N8\n    N8 --> N9\n    N9 --> N10\n    N10 -->|yes| N11\n    N8 -->|iterate| N3\n    N4 -->|skip/opt| N7\n\n    style N1 fill:#ff6b6b,color:#fff\n    style N2 fill:#ff6b6b,color:#fff\n    style N3 fill:#ff6b6b,color:#fff\n    style N4 fill:#ffd43b,color:#000\n    style N5 fill:#ffd43b,color:#000\n    style N6 fill:#51cf66,color:#fff\n    style N7 fill:#51cf66,color:#fff\n    style N8 fill:#74c0fc,color:#fff\n    style N9 fill:#b197fc,color:#fff\n    style N10 fill:#ffd43b,color:#000\n    style N11 fill:#b197fc,color:#fff",
  "sources": [
    {
      "title": "Measurement criteria for virtual memory paging rules",
      "authors": "McCredie, John W.",
      "journal": "Proceedings of the 1969 24th national conference on   -",
      "year": "1969",
      "pubmed": null,
      "doi": "10.1145/800195.805932",
      "url": "https://doi.org/10.1145/800195.805932"
    },
    {
      "title": "Segmentation, paging and optimal page sizes in virtual memory",
      "authors": "Alanko, Timo O.; Verkamo, A.Inkeri",
      "journal": "Computer Compacts",
      "year": "1983",
      "pubmed": null,
      "doi": "10.1016/0167-7136(83)90150-6",
      "url": "https://doi.org/10.1016/0167-7136(83)90150-6"
    },
    {
      "title": "Segmentation, paging and optimal page sizes in virtual memory",
      "authors": "Alanko, Timo O; Inkeri Verkamo, A",
      "journal": "Performance Evaluation",
      "year": "1983",
      "pubmed": null,
      "doi": "10.1016/0166-5316(83)90030-5",
      "url": "https://doi.org/10.1016/0166-5316(83)90030-5"
    }
  ],
  "keywords": [
    "virtual",
    "memory",
    "paging"
  ],
  "relatedProcesses": [],
  "created": "2026-01-15",
  "lastUpdated": "2026-04-30",
  "verified": false,
  "notes": "Corrective rebuild: replaces the generic scaffold with a process-specific step structure and records topology for duplicate detection.",
  "namedCollections": [],
  "graphMetrics": {
    "nodes": 11,
    "edges": 12,
    "conditionals": 1,
    "andGates": 1,
    "orGates": 2,
    "notGates": 0,
    "loops": 1
  },
  "nodeDetails": [
    {
      "id": "N1",
      "label": "Virtual Memory Paging research...",
      "detail": "Virtual Memory Paging research question",
      "type": "process",
      "role": "Triggers & Inputs"
    },
    {
      "id": "N2",
      "label": "Virtual Address",
      "detail": "Virtual Address",
      "type": "process",
      "role": "Triggers & Inputs"
    },
    {
      "id": "N3",
      "label": "Access Request",
      "detail": "Access Request",
      "type": "process",
      "role": "Triggers & Inputs"
    },
    {
      "id": "N4",
      "label": "Page Table",
      "detail": "Page Table",
      "type": "process",
      "role": "Structures & Objects"
    },
    {
      "id": "N5",
      "label": "Physical Frames",
      "detail": "Physical Frames",
      "type": "process",
      "role": "Structures & Objects"
    },
    {
      "id": "N6",
      "label": "Translate",
      "detail": "Translate",
      "type": "process",
      "role": "Processing & Operations"
    },
    {
      "id": "N7",
      "label": "Handle Page Fault",
      "detail": "Handle Page Fault",
      "type": "process",
      "role": "Processing & Operations"
    },
    {
      "id": "N8",
      "label": "Working Set",
      "detail": "Working Set",
      "type": "process",
      "role": "Intermediates & States"
    },
    {
      "id": "N9",
      "label": "Mapped Address",
      "detail": "Mapped Address",
      "type": "process",
      "role": "Products & Outputs"
    },
    {
      "id": "N10",
      "label": "Source-grounded check...",
      "detail": "Source-grounded check: Measurement criteria for virtual memory paging rules",
      "type": "decision",
      "role": "Structures & Objects"
    },
    {
      "id": "N11",
      "label": "Virtual Memory Paging...",
      "detail": "Virtual Memory Paging prediction/readout",
      "type": "process",
      "role": "Products & Outputs"
    }
  ],
  "flowchartStandard": {
    "name": "source_grounded_rebuild_v1",
    "applied": "2026-04-30",
    "curationStatus": "source_grounded_draft",
    "basis": "cs_exact_template",
    "topologySignature": "276faf007b4a1352",
    "sourceGrounding": "Graph steps are derived from the process title, existing source metadata, and curated process/subfield templates; citations support the process topic and should be reviewed for node-level claims before marking verified."
  }
}