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	import Note from "../../components/Note.astro";

	## Appendix

	### Methodology for tracking training hardware disclosure on the Hugging Face platform

	The system tracks chip providers like Nvidia, AMD, Intel, Apple, Amazon and Google TPU, as well as Chinese providers like Huawei, Cambricon and Baidu. Some known but untracked providers include Cerebras with their Cerebras-GPT family trained on their own chips, and Sambanova, which chips were used for training [BLOOMChat](https://sambanova.ai/blog/introducing-bloomchat-176b-the-multilingual-chat-based-llm).

	The pipeline is a multi stage classifier ingesting metadata from three independent sources: the HF model card, the linked arXiv paper if it exists, and the GitHub repository associated with the model again if it exists. Then each is run through a dedicated classifier that extracts chip-related signals; strong evidence like using CUDA can short-circuit the pipeline and weaker signals trigger a fallback call to an LLM which makes a committal judgment. The specific chip providers we track are in the tables below. The first graphic shows the abundance of NVIDIA compared to other chips providers, as well as the large share of models for which the hardware it was trained on was not disclosed or we couldn’t capture.

	Table A-1: Tracked (Western)

	<div class="nowrap-first-col">

	\| Provider \| Key signals (strong) \| Hardware SKUs (medium) \|
	\|:---\|:---\|:---\|
	\| nvidia \| cuda, nvidia-smi, nvidia/cuda, nvidia-apex, EC2 p3/p4d/p5 families \| A100, H100, H200, V100, P100, T4, RTX \|
	\| amd \| rocm, hipify, rccl, amd-gpu, EC2 g4ad \| MI250, MI300X, MI325 (`MI\d{3}X?`) \|
	\| intel \| intel-extension-for-pytorch, gaudi, habana, openvino, neural-compressor \| — \|
	\| google_tpu \| TPU, libtpu, cloud-tpu, TPUStrategy, jax.distributed, xm.xla_device \| tpu-v2..v5 \|
	\| apple \| MLX, coreml/coremltools, apple-silicon, anekit, qualified Metal/MPS \| M1–M4 Pro/Max/Ultra \|
	\| aws \| trainium, inferentia, neuron-sdk, torch-neuronx, neuronx-cc \| trn1/trn1n, inf1/inf2 instance SKUs \|
	\| qualcomm \| QNN, SNPE, snapdragon, Qualcomm Hexagon, Hexagon DSP/NN/SDK \| — \|

	</div>

	Table A-2: Tracked (Chinese)

	<div class="nowrap-first-col">

	\| Provider \| Key signals (strong) \| Hardware SKUs (medium) \|
	\|:---\|:---\|:---\|
	\| huawei_ascend \| ascend, mindspore, cann, hccl, npu-smi, 昇腾, ASCEND_RT_VISIBLE_DEVICES, /dev/davinci \| Ascend 910A/B/C/D, Atlas 200/800/900 \|
	\| cambricon \| cambricon, cnml, cnnl, cndrv, bangpy, MLUDevice, torch-mlu \| MLU370, MLU590 \|
	\| baidu_kunlun \| kunlunxin, 昆仑(芯/核), xpurt, paddle-xpu, XPU_VISIBLE_DEVICES, baidu-xpu \| P800 (training), R200/R300 (inference) \|
	\| moore_threads \| MUSA, mthreads, moore-threads, torch-musa, musart, mccl, MUSA_VISIBLE_DEVICES \| MTT S80/S3000/S4000 \|
	\| iluvatar \| iluvatar, 天数智芯, ixrt, corex, ixsmi \| BI-V100/V150, MR-V100 \|
	\| hygon \| hygon, 海光, hy-smi, hygon-dcu, hygon-dtk, DCU_VISIBLE_DEVICES \| K100/Z100 DCU/AI \|
	\| metax \| metax, muxi, 沐曦, mxmaca, mx-smi, METAX_VISIBLE_DEVICES \| C500/C600 series \|

	</div>

	To support reproducibility and scrutiny, both the code and the data behind this analysis are openly available. The full classification pipeline, including the source code and prompts used to extract hardware signals, lives in the [project repository](https://github.com/Franri3008/ai-chip-resolution), and the captured dataset of model–chip associations underlying these figures is published as a [Hugging Face dataset](https://huggingface.co/datasets/Franri/model-chips-data). An explorer tool to follow classifications for individual models can be accessed [here](https://viz.aiworld.eu/huggingface/chips/dashboardv5.html?file=1).

	### Sources for the curated lab–chip map

	The lab–chip links shown in [Figure 4](#fig-curated-lab-chip-map) are drawn from the public sources below.

	Table A-3: Hyperlinked source names

	\| Model Provider \| Training sources \|
	\|:---\|:---\|
	\| Alibaba \| [Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/chinas-top-ai-firms-shift-model-training-overseas-to-access-nvidia-gpus), [36Kr](https://eu.36kr.com/en/p/3650412256731265), [SCMP](https://www.scmp.com/tech/big-tech/article/3341703/alibabas-t-head-unit-unveils-details-ai-chip-designed-rival-nvidias-gpus) \|
	\| Baidu \| [Epoch AI](https://epoch.ai/data/ai-models?view=graph&tab=notable), [GitHub](https://github.com/baidubce/Qianfan-VL), [Yicai](https://www.yicai.com/news/102910111.html) \|
	\| DeepSeek \| [arXiv](https://arxiv.org/pdf/2412.19437), [Tom's Hardware](https://www.tomshardware.com/tech-industry/artificial-intelligence/deepseek-launches-1-6-trillion-parameter-v4-on-huawei-chips-as-us-escalates-ai-theft-accusations), [Tmtpost](https://www.tmtpost.com/7966601.html) \|
	\| MiniMax \| [MiniMax blog](https://www.minimax.io/news/minimax-m1-now-available-on-together-ai), [Jiqizhixin](https://www.jiqizhixin.com/articles/2025-01-15-9) \|
	\| Moonshot \| [arXiv](https://arxiv.org/pdf/2507.20534), [QbitAI](https://www.qbitai.com/2025/07/311541.html), [SCMP](https://www.scmp.com/tech/tech-trends/article/3332364/chinas-moonshot-claims-build-models-fewer-high-end-ai-chips-us-rivals-use) \|
	\| Tencent \| [Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/tencent-goes-public-with-pivot-to-chinese-chips) \|
	\| Xiaomi MiMo \| [TechNode](https://technode.com/2024/12/26/xiaomi-builds-gpu-cluster-intensifies-investment-in-ai-models/), [arXiv](https://arxiv.org/abs/2601.02780) \|
	\| Z.ai \| [HF blog](https://huggingface.co/blog/mlabonne/glm-5), [The Register](https://www.theregister.com/2026/01/15/zhipu_glm_image_huawei_hardware/) \|
	\| Google \| [Epoch AI](https://epoch.ai/data/ai-models?view=graph&tab=notable) \|
	\| Meta \| [GitHub](https://github.com/meta-llama/llama-models/blob/main/models/llama4/MODEL_CARD.md), [Meta engineering](https://engineering.fb.com/2024/10/15/data-infrastructure/metas-open-ai-hardware-vision/), [Meta](https://about.fb.com/news/2026/02/meta-amd-partner-longterm-ai-infrastructure-agreement/), [Reuters](https://www.reuters.com/business/google-signs-multibillion-dollar-ai-chip-deal-with-meta-information-reports-2026-02-26/) \|
	\| Microsoft \| [Epoch AI](https://epoch.ai/data/ai-models?view=graph&tab=notable) \|
	\| Nemotron (Nvidia) \| [NVIDIA ADLR](https://research.nvidia.com/labs/adlr/nemotronh/) \|
	\| Poolside Laguna \| [Laguna blog](https://poolside.ai/blog/laguna-a-deeper-dive) \|
	\| Mistral \| [CoreWeave](https://www.coreweave.com/resources/case-studies/mistral-ai) \|

	import Note from "../../components/Note.astro";

	## Appendix

	### Methodology for tracking training hardware disclosure on the Hugging Face platform

	The system tracks chip providers like Nvidia, AMD, Intel, Apple, Amazon and Google TPU, as well as Chinese providers like Huawei, Cambricon and Baidu. Some known but untracked providers include Cerebras with their Cerebras-GPT family trained on their own chips, and Sambanova, which chips were used for training [BLOOMChat](https://sambanova.ai/blog/introducing-bloomchat-176b-the-multilingual-chat-based-llm).

	The pipeline is a multi stage classifier ingesting metadata from three independent sources: the HF model card, the linked arXiv paper if it exists, and the GitHub repository associated with the model again if it exists. Then each is run through a dedicated classifier that extracts chip-related signals; strong evidence like using CUDA can short-circuit the pipeline and weaker signals trigger a fallback call to an LLM which makes a committal judgment. The specific chip providers we track are in the tables below. The first graphic shows the abundance of NVIDIA compared to other chips providers, as well as the large share of models for which the hardware it was trained on was not disclosed or we couldn’t capture.

	Table A-1: Tracked (Western)

	<div class="nowrap-first-col">

	\| Provider \| Key signals (strong) \| Hardware SKUs (medium) \|
	\|:---\|:---\|:---\|
	\| nvidia \| cuda, nvidia-smi, nvidia/cuda, nvidia-apex, EC2 p3/p4d/p5 families \| A100, H100, H200, V100, P100, T4, RTX \|
	\| amd \| rocm, hipify, rccl, amd-gpu, EC2 g4ad \| MI250, MI300X, MI325 (`MI\d{3}X?`) \|
	\| intel \| intel-extension-for-pytorch, gaudi, habana, openvino, neural-compressor \| — \|
	\| google_tpu \| TPU, libtpu, cloud-tpu, TPUStrategy, jax.distributed, xm.xla_device \| tpu-v2..v5 \|
	\| apple \| MLX, coreml/coremltools, apple-silicon, anekit, qualified Metal/MPS \| M1–M4 Pro/Max/Ultra \|
	\| aws \| trainium, inferentia, neuron-sdk, torch-neuronx, neuronx-cc \| trn1/trn1n, inf1/inf2 instance SKUs \|
	\| qualcomm \| QNN, SNPE, snapdragon, Qualcomm Hexagon, Hexagon DSP/NN/SDK \| — \|

	</div>

	Table A-2: Tracked (Chinese)

	<div class="nowrap-first-col">

	\| Provider \| Key signals (strong) \| Hardware SKUs (medium) \|
	\|:---\|:---\|:---\|
	\| huawei_ascend \| ascend, mindspore, cann, hccl, npu-smi, 昇腾, ASCEND_RT_VISIBLE_DEVICES, /dev/davinci \| Ascend 910A/B/C/D, Atlas 200/800/900 \|
	\| cambricon \| cambricon, cnml, cnnl, cndrv, bangpy, MLUDevice, torch-mlu \| MLU370, MLU590 \|
	\| baidu_kunlun \| kunlunxin, 昆仑(芯/核), xpurt, paddle-xpu, XPU_VISIBLE_DEVICES, baidu-xpu \| P800 (training), R200/R300 (inference) \|
	\| moore_threads \| MUSA, mthreads, moore-threads, torch-musa, musart, mccl, MUSA_VISIBLE_DEVICES \| MTT S80/S3000/S4000 \|
	\| iluvatar \| iluvatar, 天数智芯, ixrt, corex, ixsmi \| BI-V100/V150, MR-V100 \|
	\| hygon \| hygon, 海光, hy-smi, hygon-dcu, hygon-dtk, DCU_VISIBLE_DEVICES \| K100/Z100 DCU/AI \|
	\| metax \| metax, muxi, 沐曦, mxmaca, mx-smi, METAX_VISIBLE_DEVICES \| C500/C600 series \|

	</div>

	To support reproducibility and scrutiny, both the code and the data behind this analysis are openly available. The full classification pipeline, including the source code and prompts used to extract hardware signals, lives in the [project repository](https://github.com/Franri3008/ai-chip-resolution), and the captured dataset of model–chip associations underlying these figures is published as a [Hugging Face dataset](https://huggingface.co/datasets/Franri/model-chips-data). An explorer tool to follow classifications for individual models can be accessed [here](https://viz.aiworld.eu/huggingface/chips/dashboardv5.html?file=1).

	### Sources for the curated lab–chip map

	The lab–chip links shown in [Figure 4](#fig-curated-lab-chip-map) are drawn from the public sources below.

	Table A-3: Hyperlinked source names

	\| Model Provider \| Training sources \|
	\|:---\|:---\|
	\| Alibaba \| [Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/chinas-top-ai-firms-shift-model-training-overseas-to-access-nvidia-gpus), [36Kr](https://eu.36kr.com/en/p/3650412256731265), [SCMP](https://www.scmp.com/tech/big-tech/article/3341703/alibabas-t-head-unit-unveils-details-ai-chip-designed-rival-nvidias-gpus) \|
	\| Baidu \| [Epoch AI](https://epoch.ai/data/ai-models?view=graph&tab=notable), [GitHub](https://github.com/baidubce/Qianfan-VL), [Yicai](https://www.yicai.com/news/102910111.html) \|
	\| DeepSeek \| [arXiv](https://arxiv.org/pdf/2412.19437), [Tom's Hardware](https://www.tomshardware.com/tech-industry/artificial-intelligence/deepseek-launches-1-6-trillion-parameter-v4-on-huawei-chips-as-us-escalates-ai-theft-accusations), [Tmtpost](https://www.tmtpost.com/7966601.html) \|
	\| MiniMax \| [MiniMax blog](https://www.minimax.io/news/minimax-m1-now-available-on-together-ai), [Jiqizhixin](https://www.jiqizhixin.com/articles/2025-01-15-9) \|
	\| Moonshot \| [arXiv](https://arxiv.org/pdf/2507.20534), [QbitAI](https://www.qbitai.com/2025/07/311541.html), [SCMP](https://www.scmp.com/tech/tech-trends/article/3332364/chinas-moonshot-claims-build-models-fewer-high-end-ai-chips-us-rivals-use) \|
	\| Tencent \| [Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/tencent-goes-public-with-pivot-to-chinese-chips) \|
	\| Xiaomi MiMo \| [TechNode](https://technode.com/2024/12/26/xiaomi-builds-gpu-cluster-intensifies-investment-in-ai-models/), [arXiv](https://arxiv.org/abs/2601.02780) \|
	\| Z.ai \| [HF blog](https://huggingface.co/blog/mlabonne/glm-5), [The Register](https://www.theregister.com/2026/01/15/zhipu_glm_image_huawei_hardware/) \|
	\| Google \| [Epoch AI](https://epoch.ai/data/ai-models?view=graph&tab=notable) \|
	\| Meta \| [GitHub](https://github.com/meta-llama/llama-models/blob/main/models/llama4/MODEL_CARD.md), [Meta engineering](https://engineering.fb.com/2024/10/15/data-infrastructure/metas-open-ai-hardware-vision/), [Meta](https://about.fb.com/news/2026/02/meta-amd-partner-longterm-ai-infrastructure-agreement/), [Reuters](https://www.reuters.com/business/google-signs-multibillion-dollar-ai-chip-deal-with-meta-information-reports-2026-02-26/) \|
	\| Microsoft \| [Epoch AI](https://epoch.ai/data/ai-models?view=graph&tab=notable) \|
	\| Nemotron (Nvidia) \| [NVIDIA ADLR](https://research.nvidia.com/labs/adlr/nemotronh/) \|
	\| Poolside Laguna \| [Laguna blog](https://poolside.ai/blog/laguna-a-deeper-dive) \|
	\| Mistral \| [CoreWeave](https://www.coreweave.com/resources/case-studies/mistral-ai) \|