release: add docs/MASTER_ARCHITECTURE_PLAN.md

docs/MASTER_ARCHITECTURE_PLAN.md

@@ -13,7 +13,7 @@
 > - Its **implementation-order phases** (0–19) and stop/go gates describe the plan, not the record of
 >   what was executed. For actual status see [`CHANGELOG.md`](CHANGELOG.md),
 >   [`LIMITATIONS.md`](LIMITATIONS.md) and the architecture reference in
->   [`ARCHITECTURE.md`](ARCHITECTURE.md).
+>   [`ARCHITECTURE.md`](architecture/README.md).
 > - Several sections describe capabilities that were later **rejected or measured differently** — for
 >   example the grounding resolution (the plan allows 448; the shipped value is 224, after 448 lost a
 >   pre-registered paired test) and the VLM adapter (trained, then **acceptance-rejected**).