InternVL3_5-1B_GPTQ_INT4

InternVL3.5-1B (InternViT + Qwen3-0.6B) converted to run on the Axera NPU with w4a16 quantization, packaged in ax-llm model-directory format.

  • Compatible with Pulsar2 5.1-patch1
  • Context length: 2k, max prefill: 1k, image input: 448Γ—448

This repository provides two self-contained ax-llm model directories, one per target chip:

Directory Target chip Image encoder
InternVL3_5-1B_GPTQ_INT4-AX650/ AX650N (host & AXCL M.2 accelerator) internvl_vit_model_1x448x448x3.axmodel (NHWC)
InternVL3_5-1B_GPTQ_INT4-AX620E/ AX620E internvl_vit_model_1x448x448x3_ax620e.axmodel

Each directory is a complete ax-llm model dir:

InternVL3_5-1B_GPTQ_INT4-AX650/
β”œβ”€β”€ config.json                    # ax-llm runtime config (vlm_type=InternVL3, tokenizer_type=InternVL3_5)
β”œβ”€β”€ internvl3-5-1b_tokenizer.txt   # tokenizer
β”œβ”€β”€ post_config.json               # sampling config
β”œβ”€β”€ internvl3-5_axmodel/           # LLM: qwen3_p128_l0..l27 (28) + qwen3_post + embed
└── vit-models/                    # InternViT image encoder

Support Platform

Chip image encoder 448 ttft w4a16
AX650 364.412 ms 883.458 ms 28.09 tokens/sec
AX620E 2358.956 ms 3136.54 ms 7.33 tokens/sec

How to use

Build/obtain the ax-llm runtime: AXera NPU LLM Runtime (ax-llm)

AX650N host or AXCL M.2 accelerator card β€” pick the -AX650 directory:

# interactive chat
./axllm run   InternVL3_5-1B_GPTQ_INT4-AX650

# OpenAI-compatible HTTP server (default port 8000)
./axllm serve InternVL3_5-1B_GPTQ_INT4-AX650

On AXCL, choose the card via AXLLM_DEVICES=<id> or the "devices" field in config.json.

AX620E board β€” pick the -AX620E directory:

./axllm run InternVL3_5-1B_GPTQ_INT4-AX620E

Source & conversion

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