ResNet50 (ONNX) β Renesas X5H
Introduction
This repository hosts ResNet50 V1 in ONNX FP32 format, targeting the Renesas R-Car X5H platform for image classification inference on the NPX6 NPU.
- Model Architecture: ResNet50 β a 50-layer residual convolutional network for 1000-class image classification.
- Source Model: onnx/resnet50 (ONNX Model Zoo v1.12)
- Task: Image Classification (ImageNet ILSVRC2012, 1000 classes)
- Parameters: 25.6 M
Deployment Flow
The repository provides the model in FP32 ONNX format. Both supported runtimes automatically cast the FP32 model to INT8 at load time for optimised NPU execution β no separate quantization step is required.
resnet50_v1_12.onnx (FP32)
β
βββΆ ONNX Runtime (Custom NPU EP) βββΆ INT8 auto-cast βββΆ NPX6 NPU
β
βββΆ MWMX Runtime βββΆ INT8 auto-cast βββΆ NPX6 NPU
Provided Artifacts
| Artifact | Status | Notes |
|---|---|---|
| FP32 (ONNX) | β Provided | Reference baseline from ONNX Model Zoo v1.12 |
INT8 execution is handled automatically by the NPU runtime β no additional quantized model file is needed.
Performance
All HIL results were measured on Renesas R-Car X5H physical hardware.
The FP32 ONNX model is auto-cast to INT8 by the runtime before NPU execution.
PPA Estimator results are software estimates based on model characteristics and hardware configuration.
Benchmark configuration: Single NPU Β· Single AI Core Β· Input: 3 Γ 224 Γ 224 Β· Batch size: 1
Inference Latency & Throughput
| Runtime | Precision | Device | Latency (ms) | Throughput (fps) | Type |
|---|---|---|---|---|---|
| ORT Custom NPU EP | INT8 (auto) | X5H Β· 1Γ NPU Β· 1 Core Β· 850 MHz | 4.54 | 243.9 | Measured |
| MWMX Runtime | INT8 (auto) | X5H Β· 1Γ NPU Β· 1 Core Β· 850 MHz | 3.23 | 303.0 | Measured |
| PPA Estimator | INT8 | X5H Β· 1Γ NPU Β· 1 Core Β· 1066 MHz | 5.9 | β | Estimated |
Accuracy (ImageNet ILSVRC2012 Validation Set β 50 000 images)
| Runtime / Precision | Top-1 Accuracy | Top-5 Accuracy | Notes |
|---|---|---|---|
| FP32 reference | 81.3 % | 93.9 % | ORT, FP32 native execution |
| ORT Custom NPU EP (INT8) | 73.0 % | 94.0 % | INT8 auto-cast, NPU execution |
| MWMX Runtime (INT8) | β | β | Not yet measured |
Runtime Details
ONNX Runtime β Custom NPU Execution Provider
- Engine: ONNX Runtime with Renesas Custom NPU Execution Provider
- Input format: FP32 ONNX (
.onnx) - NPU execution precision: INT8 (auto-cast at load time)
- Execution target: NPX6-48K NPU on R-Car X5H
MWMX Runtime
- Engine: Renesas MWMX (Middleware MX) native inference runtime
- Input format: FP32 ONNX (ingested and compiled by the MWMX toolchain)
- NPU execution precision: INT8 (auto-cast by MWMX toolchain)
- Execution target: NPX6-48K NPU on R-Car X5H
PPA Estimator
- Engine: Renesas PPA Estimator
- Input format: FP32 ONNX
- NPU execution precision: INT8
- Type: Software performance estimate β not measured on physical silicon
Prerequisites
To run inference on Renesas R-Car X5H, you need:
- Renesas R-Car X5H board with NPX6 NPU
- ONNX Runtime with Renesas NPU Custom Execution Provider, or the Renesas MWMX Runtime package
- Hugging Face CLI to download the model
Download
huggingface-cli download Renesas/Resnet50-ONNX fp32/resnet50_v1_12.onnx
Inference
ONNX Runtime (Custom NPU Execution Provider)
import onnxruntime as ort
import numpy as np
# Runtime auto-casts FP32 model to INT8 for NPU execution
providers = [("ReneasNPUExecutionProvider", {}), "CPUExecutionProvider"]
sess = ort.InferenceSession("fp32/resnet50_v1_12.onnx", providers=providers)
# Input: ImageNet-normalized image, shape (1, 3, 224, 224), dtype float32
input_data = np.random.randn(1, 3, 224, 224).astype(np.float32)
outputs = sess.run(None, {"data": input_data})
class_scores = outputs[0] # shape (1, 1000)
MWMX Runtime
Refer to the Renesas MWMX Runtime documentation for compilation and inference scripts targeting the NPX6 NPU on R-Car X5H. The MWMX toolchain ingests the FP32 ONNX model and automatically compiles it for INT8 NPU execution.
Benchmark Methodology
- HIL runs: Hardware-in-the-loop β measured on physical R-Car X5H silicon; single NPU, single AI core, 850 MHz NPU clock
- Estimation: PPA Estimator software estimate; single NPU, single AI core, 1066 MHz NPU clock
- Precision: FP32 ONNX input; INT8 execution (auto-cast by runtime)
- Latency: Median over 1000 consecutive inference runs with warm cache
- Throughput: Computed as
1000 / latency_ms - Accuracy: Evaluated on the ImageNet ILSVRC2012 validation set (50 000 images); softmax Top-1 and Top-5