id
int64 0
755k
| file_name
stringlengths 3
109
| file_path
stringlengths 13
185
| content
stringlengths 31
9.38M
| size
int64 31
9.38M
| language
stringclasses 1
value | extension
stringclasses 11
values | total_lines
int64 1
340k
| avg_line_length
float64 2.18
149k
| max_line_length
int64 7
2.22M
| alphanum_fraction
float64 0
1
| repo_name
stringlengths 6
65
| repo_stars
int64 100
47.3k
| repo_forks
int64 0
12k
| repo_open_issues
int64 0
3.4k
| repo_license
stringclasses 9
values | repo_extraction_date
stringclasses 92
values | exact_duplicates_redpajama
bool 2
classes | near_duplicates_redpajama
bool 2
classes | exact_duplicates_githubcode
bool 2
classes | exact_duplicates_stackv2
bool 1
class | exact_duplicates_stackv1
bool 2
classes | near_duplicates_githubcode
bool 2
classes | near_duplicates_stackv1
bool 2
classes | near_duplicates_stackv2
bool 1
class |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
24,384
|
Device.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/Device/_Template_Vendor/Vendor/Device/Include/Device.h
|
/**************************************************************************//**
* @file <Device>.h
* @brief CMSIS Cortex-M# Core Peripheral Access Layer Header File
* for the Device Series ...
* @version V2.10
* @date 20. July 2011
*
* @note
* Copyright (C) 2010-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef <Device>_H /* ToDo: replace '<Device>' with your device name */
#define <Device>_H
#ifdef __cplusplus
extern "C" {
#endif
/* ToDo: replace '<Device>' with your device name; add your doxyGen comment */
/** @addtogroup <Device>_Definitions <Device> Definitions
This file defines all structures and symbols for <Device>:
- registers and bitfields
- peripheral base address
- peripheral ID
- Peripheral definitions
@{
*/
/******************************************************************************/
/* Processor and Core Peripherals */
/******************************************************************************/
/** @addtogroup <Device>_CMSIS Device CMSIS Definitions
Configuration of the Cortex-M# Processor and Core Peripherals
@{
*/
/*
* ==========================================================================
* ---------- Interrupt Number Definition -----------------------------------
* ==========================================================================
*/
typedef enum IRQn
{
/****** Cortex-M# Processor Exceptions Numbers ***************************************************/
/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M0 device */
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 System Tick Interrupt */
/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M3 / Cortex-M4 device */
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 System Tick Interrupt */
/****** Device Specific Interrupt Numbers ********************************************************/
/* ToDo: add here your device specific external interrupt numbers
according the interrupt handlers defined in startup_Device.s
eg.: Interrupt for Timer#1 TIM1_IRQHandler -> TIM1_IRQn */
<DeviceInterrupt>_IRQn = 0, /*!< Device Interrupt */
} IRQn_Type;
/*
* ==========================================================================
* ----------- Processor and Core Peripheral Section ------------------------
* ==========================================================================
*/
/* Configuration of the Cortex-M# Processor and Core Peripherals */
/* ToDo: set the defines according your Device */
/* ToDo: define the correct core revision
__CM0_REV if your device is a CORTEX-M0 device
__CM3_REV if your device is a CORTEX-M3 device
__CM4_REV if your device is a CORTEX-M4 device */
#define __CM#_REV 0x0201 /*!< Core Revision r2p1 */
#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
#define __MPU_PRESENT 1 /*!< MPU present or not */
/* ToDo: define __FPU_PRESENT if your devise is a CORTEX-M4 */
#define __FPU_PRESENT /*!< FPU present or not */
/*@}*/ /* end of group <Device>_CMSIS */
/* ToDo: include the correct core_cm#.h file
core_cm0.h if your device is a CORTEX-M0 device
core_cm3.h if your device is a CORTEX-M3 device
core_cm4.h if your device is a CORTEX-M4 device */
#include <core_cm#.h> /* Cortex-M# processor and core peripherals */
/* ToDo: include your system_<Device>.h file
replace '<Device>' with your device name */
#include "system_<Device>.h" /* <Device> System include file */
/******************************************************************************/
/* Device Specific Peripheral registers structures */
/******************************************************************************/
/** @addtogroup <Device>_Peripherals <Device> Peripherals
<Device> Device Specific Peripheral registers structures
@{
*/
#if defined ( __CC_ARM )
#pragma anon_unions
#endif
/* ToDo: add here your device specific peripheral access structure typedefs
following is an example for a timer */
/*------------- 16-bit Timer/Event Counter (TMR) -----------------------------*/
/** @addtogroup <Device>_TMR <Device> 16-bit Timer/Event Counter (TMR)
@{
*/
typedef struct
{
__IO uint32_t EN; /*!< Offset: 0x0000 Timer Enable Register */
__IO uint32_t RUN; /*!< Offset: 0x0004 Timer RUN Register */
__IO uint32_t CR; /*!< Offset: 0x0008 Timer Control Register */
__IO uint32_t MOD; /*!< Offset: 0x000C Timer Mode Register */
uint32_t RESERVED0[1];
__IO uint32_t ST; /*!< Offset: 0x0014 Timer Status Register */
__IO uint32_t IM; /*!< Offset: 0x0018 Interrupt Mask Register */
__IO uint32_t UC; /*!< Offset: 0x001C Timer Up Counter Register */
__IO uint32_t RG0 /*!< Offset: 0x0020 Timer Register */
uint32_t RESERVED1[2];
__IO uint32_t CP; /*!< Offset: 0x002C Capture register */
} <DeviceAbbreviation>_TMR_TypeDef;
/*@}*/ /* end of group <Device>_TMR */
#if defined ( __CC_ARM )
#pragma no_anon_unions
#endif
/*@}*/ /* end of group <Device>_Peripherals */
/******************************************************************************/
/* Peripheral memory map */
/******************************************************************************/
/* ToDo: add here your device peripherals base addresses
following is an example for timer */
/** @addtogroup <Device>_MemoryMap <Device> Memory Mapping
@{
*/
/* Peripheral and SRAM base address */
#define <DeviceAbbreviation>_FLASH_BASE (0x00000000UL) /*!< (FLASH ) Base Address */
#define <DeviceAbbreviation>_SRAM_BASE (0x20000000UL) /*!< (SRAM ) Base Address */
#define <DeviceAbbreviation>_PERIPH_BASE (0x40000000UL) /*!< (Peripheral) Base Address */
/* Peripheral memory map */
#define <DeviceAbbreviation>TIM0_BASE (<DeviceAbbreviation>_PERIPH_BASE) /*!< (Timer0 ) Base Address */
#define <DeviceAbbreviation>TIM1_BASE (<DeviceAbbreviation>_PERIPH_BASE + 0x0800) /*!< (Timer1 ) Base Address */
#define <DeviceAbbreviation>TIM2_BASE (<DeviceAbbreviation>_PERIPH_BASE + 0x1000) /*!< (Timer2 ) Base Address */
/*@}*/ /* end of group <Device>_MemoryMap */
/******************************************************************************/
/* Peripheral declaration */
/******************************************************************************/
/* ToDo: add here your device peripherals pointer definitions
following is an example for timer */
/** @addtogroup <Device>_PeripheralDecl <Device> Peripheral Declaration
@{
*/
#define <DeviceAbbreviation>_TIM0 ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE)
#define <DeviceAbbreviation>_TIM1 ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE)
#define <DeviceAbbreviation>_TIM2 ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE)
/*@}*/ /* end of group <Device>_PeripheralDecl */
/*@}*/ /* end of group <Device>_Definitions */
#ifdef __cplusplus
}
#endif
#endif /* <Device>_H */
| 10,332
|
C++
|
.h
| 168
| 58.589286
| 123
| 0.468404
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,385
|
system_Device.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/Device/_Template_Vendor/Vendor/Device/Include/system_Device.h
|
/**************************************************************************//**
* @file system_<Device>.h
* @brief CMSIS Cortex-M# Device Peripheral Access Layer Header File
* for the Device Series ...
* @version V2.10
* @date 20. July 2011
*
* @note
* Copyright (C) 2010-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef SYSTEM_<Device>_H /* ToDo: replace '<Device>' with your device name */
#define SYSTEM_<Device>_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_<Device>_H */
| 1,795
|
C++
|
.h
| 54
| 31.277778
| 81
| 0.656846
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,386
|
conf_board.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/Examples/cmsis_example/conf_board.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef CONF_BOARD_H_INCLUDED
#define CONF_BOARD_H_INCLUDED
#define SAM3S_EK (1)
#define SAM3S_EK2 (2)
#define SAM3N_EK (3)
#define SAM3U_EK (4)
#define SAM3X_EK (5)
#define SAM4S_EK (6)
#ifndef BOARD
# error "BOARD is not defined"
#endif
#if BOARD == SAM3S_EK
# define LED0_PIO PIOA
# define LED0_MASK (0x01UL << 19)
#endif /* SAM3S_EK */
#if BOARD == SAM3S_EK2
# define LED0_PIO PIOA
# define LED0_MASK (0x01UL << 19)
#endif /* SAM3S_EK2 */
#if BOARD == SAM3N_EK
# define LED0_PIO PIOA
# define LED0_MASK (0x01UL << 23)
#endif /* SAM3N_EK */
#if BOARD == SAM3U_EK
# define LED0_PIO PIOB
# define LED0_MASK (0x01UL << 0)
#endif /* SAM3U_EK */
#if BOARD == SAM3X_EK
# define LED0_PIO PIOB
# define LED0_MASK (0x01UL << 12)
#endif /* SAM3X_EK */
#if BOARD == SAM4S_EK
# define LED0_PIO PIOA
# define LED0_MASK (0x01UL << 19)
#endif /* SAM4S_EK */
#endif /* CONF_BOARD_H_INCLUDED */
| 2,575
|
C++
|
.h
| 64
| 38.65625
| 79
| 0.62615
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,387
|
math_helper.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/DSP_Lib/Examples/Common/Include/math_helper.h
|
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 29. November 2010
* $Revision: V1.0.3
*
* Project: CMSIS DSP Library
*
* Title: math_helper.h
*
*
* Description: Prototypes of all helper functions required.
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
#ifndef MATH_HELPER_H
#define MATH_HELPER_H
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
void arm_provide_guard_bits_q7 (q7_t * input_buf, uint32_t blockSize, uint32_t guard_bits);
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
void arm_clip_f32(float *pIn, uint32_t numSamples);
uint32_t arm_calc_guard_bits(uint32_t num_adds);
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
uint32_t arm_calc_2pow(uint32_t guard_bits);
#endif
| 2,018
|
C++
|
.h
| 49
| 39.081633
| 91
| 0.665988
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,388
|
arm_math.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/arm_math.h
|
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_math.h
*
* Description: Public header file for CMSIS DSP Library
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
/**
\mainpage CMSIS DSP Software Library
*
* <b>Introduction</b>
*
* This user manual describes the CMSIS DSP software library,
* a suite of common signal processing functions for use on Cortex-M processor based devices.
*
* The library is divided into a number of modules each covering a specific category:
* - Basic math functions
* - Fast math functions
* - Complex math functions
* - Filters
* - Matrix functions
* - Transforms
* - Motor control functions
* - Statistical functions
* - Support functions
* - Interpolation functions
*
* The library has separate functions for operating on 8-bit integers, 16-bit integers,
* 32-bit integer and 32-bit floating-point values.
*
* <b>Processor Support</b>
*
* The library is completely written in C and is fully CMSIS compliant.
* High performance is achieved through maximum use of Cortex-M4 intrinsics.
*
* The supplied library source code also builds and runs on the Cortex-M3 and Cortex-M0 processor,
* with the DSP intrinsics being emulated through software.
*
*
* <b>Toolchain Support</b>
*
* The library has been developed and tested with MDK-ARM version 4.21.
* The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
*
* <b>Using the Library</b>
*
* The library installer contains prebuilt versions of the libraries in the <code>Lib</code> folder.
* - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
* - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
* - arm_cortexM4l_math.lib (Little endian on Cortex-M4)
* - arm_cortexM4b_math.lib (Big endian on Cortex-M4)
* - arm_cortexM3l_math.lib (Little endian on Cortex-M3)
* - arm_cortexM3b_math.lib (Big endian on Cortex-M3)
* - arm_cortexM0l_math.lib (Little endian on Cortex-M0)
* - arm_cortexM0b_math.lib (Big endian on Cortex-M3)
*
* The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
* Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
* public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
* Define the appropriate pre processor MACRO ARM_MATH_CM4 or ARM_MATH_CM3 or
* ARM_MATH_CM0 depending on the target processor in the application.
*
* <b>Examples</b>
*
* The library ships with a number of examples which demonstrate how to use the library functions.
*
* <b>Building the Library</b>
*
* The library installer contains project files to re build libraries on MDK Tool chain in the <code>CMSIS\DSP_Lib\Source\ARM</code> folder.
* - arm_cortexM0b_math.uvproj
* - arm_cortexM0l_math.uvproj
* - arm_cortexM3b_math.uvproj
* - arm_cortexM3l_math.uvproj
* - arm_cortexM4b_math.uvproj
* - arm_cortexM4l_math.uvproj
* - arm_cortexM4bf_math.uvproj
* - arm_cortexM4lf_math.uvproj
*
* Each library project have differant pre-processor macros.
*
* <b>ARM_MATH_CMx:</b>
* Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
* and ARM_MATH_CM0 for building library on cortex-M0 target.
*
* <b>ARM_MATH_BIG_ENDIAN:</b>
* Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
*
* <b>ARM_MATH_MATRIX_CHECK:</b>
* Define macro for checking on the input and output sizes of matrices
*
* <b>ARM_MATH_ROUNDING:</b>
* Define macro for rounding on support functions
*
* <b>__FPU_PRESENT:</b>
* Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
*
*
* The project can be built by opening the appropriate project in MDK-ARM 4.21 chain and defining the optional pre processor MACROs detailed above.
*
* <b>Copyright Notice</b>
*
* Copyright (C) 2010 ARM Limited. All rights reserved.
*/
/**
* @defgroup groupMath Basic Math Functions
*/
/**
* @defgroup groupFastMath Fast Math Functions
* This set of functions provides a fast approximation to sine, cosine, and square root.
* As compared to most of the other functions in the CMSIS math library, the fast math functions
* operate on individual values and not arrays.
* There are separate functions for Q15, Q31, and floating-point data.
*
*/
/**
* @defgroup groupCmplxMath Complex Math Functions
* This set of functions operates on complex data vectors.
* The data in the complex arrays is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* In the API functions, the number of samples in a complex array refers
* to the number of complex values; the array contains twice this number of
* real values.
*/
/**
* @defgroup groupFilters Filtering Functions
*/
/**
* @defgroup groupMatrix Matrix Functions
*
* This set of functions provides basic matrix math operations.
* The functions operate on matrix data structures. For example,
* the type
* definition for the floating-point matrix structure is shown
* below:
* <pre>
* typedef struct
* {
* uint16_t numRows; // number of rows of the matrix.
* uint16_t numCols; // number of columns of the matrix.
* float32_t *pData; // points to the data of the matrix.
* } arm_matrix_instance_f32;
* </pre>
* There are similar definitions for Q15 and Q31 data types.
*
* The structure specifies the size of the matrix and then points to
* an array of data. The array is of size <code>numRows X numCols</code>
* and the values are arranged in row order. That is, the
* matrix element (i, j) is stored at:
* <pre>
* pData[i*numCols + j]
* </pre>
*
* \par Init Functions
* There is an associated initialization function for each type of matrix
* data structure.
* The initialization function sets the values of the internal structure fields.
* Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
* and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types, respectively.
*
* \par
* Use of the initialization function is optional. However, if initialization function is used
* then the instance structure cannot be placed into a const data section.
* To place the instance structure in a const data
* section, manually initialize the data structure. For example:
* <pre>
* <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
* <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
* <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
* </pre>
* where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
* specifies the number of columns, and <code>pData</code> points to the
* data array.
*
* \par Size Checking
* By default all of the matrix functions perform size checking on the input and
* output matrices. For example, the matrix addition function verifies that the
* two input matrices and the output matrix all have the same number of rows and
* columns. If the size check fails the functions return:
* <pre>
* ARM_MATH_SIZE_MISMATCH
* </pre>
* Otherwise the functions return
* <pre>
* ARM_MATH_SUCCESS
* </pre>
* There is some overhead associated with this matrix size checking.
* The matrix size checking is enabled via the #define
* <pre>
* ARM_MATH_MATRIX_CHECK
* </pre>
* within the library project settings. By default this macro is defined
* and size checking is enabled. By changing the project settings and
* undefining this macro size checking is eliminated and the functions
* run a bit faster. With size checking disabled the functions always
* return <code>ARM_MATH_SUCCESS</code>.
*/
/**
* @defgroup groupTransforms Transform Functions
*/
/**
* @defgroup groupController Controller Functions
*/
/**
* @defgroup groupStats Statistics Functions
*/
/**
* @defgroup groupSupport Support Functions
*/
/**
* @defgroup groupInterpolation Interpolation Functions
* These functions perform 1- and 2-dimensional interpolation of data.
* Linear interpolation is used for 1-dimensional data and
* bilinear interpolation is used for 2-dimensional data.
*/
/**
* @defgroup groupExamples Examples
*/
#ifndef _ARM_MATH_H
#define _ARM_MATH_H
#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
#if defined (ARM_MATH_CM4)
#include "core_cm4.h"
#elif defined (ARM_MATH_CM3)
#include "core_cm3.h"
#elif defined (ARM_MATH_CM0)
#include "core_cm0.h"
#else
#include "ARMCM4.h"
#warning "Define either ARM_MATH_CM4 OR ARM_MATH_CM3...By Default building on ARM_MATH_CM4....."
#endif
#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
#include "string.h"
#include "math.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
* @brief Macros required for reciprocal calculation in Normalized LMS
*/
#define DELTA_Q31 (0x100)
#define DELTA_Q15 0x5
#define INDEX_MASK 0x0000003F
#define PI 3.14159265358979f
/**
* @brief Macros required for SINE and COSINE Fast math approximations
*/
#define TABLE_SIZE 256
#define TABLE_SPACING_Q31 0x800000
#define TABLE_SPACING_Q15 0x80
/**
* @brief Macros required for SINE and COSINE Controller functions
*/
/* 1.31(q31) Fixed value of 2/360 */
/* -1 to +1 is divided into 360 values so total spacing is (2/360) */
#define INPUT_SPACING 0xB60B61
/**
* @brief Error status returned by some functions in the library.
*/
typedef enum
{
ARM_MATH_SUCCESS = 0, /**< No error */
ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */
ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
} arm_status;
/**
* @brief 8-bit fractional data type in 1.7 format.
*/
typedef int8_t q7_t;
/**
* @brief 16-bit fractional data type in 1.15 format.
*/
typedef int16_t q15_t;
/**
* @brief 32-bit fractional data type in 1.31 format.
*/
typedef int32_t q31_t;
/**
* @brief 64-bit fractional data type in 1.63 format.
*/
typedef int64_t q63_t;
/**
* @brief 32-bit floating-point type definition.
*/
typedef float float32_t;
/**
* @brief 64-bit floating-point type definition.
*/
typedef double float64_t;
/**
* @brief definition to read/write two 16 bit values.
*/
#define __SIMD32(addr) (*(int32_t **) & (addr))
#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
/**
* @brief definition to pack two 16 bit values.
*/
#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
(((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
#endif
/**
* @brief definition to pack four 8 bit values.
*/
#ifndef ARM_MATH_BIG_ENDIAN
#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
(((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
(((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
(((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
#else
#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
(((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
(((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
(((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
#endif
/**
* @brief Clips Q63 to Q31 values.
*/
static __INLINE q31_t clip_q63_to_q31(
q63_t x)
{
return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
}
/**
* @brief Clips Q63 to Q15 values.
*/
static __INLINE q15_t clip_q63_to_q15(
q63_t x)
{
return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
}
/**
* @brief Clips Q31 to Q7 values.
*/
static __INLINE q7_t clip_q31_to_q7(
q31_t x)
{
return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
}
/**
* @brief Clips Q31 to Q15 values.
*/
static __INLINE q15_t clip_q31_to_q15(
q31_t x)
{
return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
}
/**
* @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
*/
static __INLINE q63_t mult32x64(
q63_t x,
q31_t y)
{
return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
(((q63_t) (x >> 32) * y)));
}
#if defined (ARM_MATH_CM0) && defined ( __CC_ARM )
#define __CLZ __clz
#endif
#if defined (ARM_MATH_CM0) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) || defined (__TASKING__) )
static __INLINE uint32_t __CLZ(q31_t data);
static __INLINE uint32_t __CLZ(q31_t data)
{
uint32_t count = 0;
uint32_t mask = 0x80000000;
while((data & mask) == 0)
{
count += 1u;
mask = mask >> 1u;
}
return(count);
}
#endif
/**
* @brief Function to Calculates 1/in(reciprocal) value of Q31 Data type.
*/
static __INLINE uint32_t arm_recip_q31(
q31_t in,
q31_t * dst,
q31_t * pRecipTable)
{
uint32_t out, tempVal;
uint32_t index, i;
uint32_t signBits;
if(in > 0)
{
signBits = __CLZ(in) - 1;
}
else
{
signBits = __CLZ(-in) - 1;
}
/* Convert input sample to 1.31 format */
in = in << signBits;
/* calculation of index for initial approximated Val */
index = (uint32_t) (in >> 24u);
index = (index & INDEX_MASK);
/* 1.31 with exp 1 */
out = pRecipTable[index];
/* calculation of reciprocal value */
/* running approximation for two iterations */
for (i = 0u; i < 2u; i++)
{
tempVal = (q31_t) (((q63_t) in * out) >> 31u);
tempVal = 0x7FFFFFFF - tempVal;
/* 1.31 with exp 1 */
//out = (q31_t) (((q63_t) out * tempVal) >> 30u);
out = (q31_t) clip_q63_to_q31(((q63_t) out * tempVal) >> 30u);
}
/* write output */
*dst = out;
/* return num of signbits of out = 1/in value */
return (signBits + 1u);
}
/**
* @brief Function to Calculates 1/in(reciprocal) value of Q15 Data type.
*/
static __INLINE uint32_t arm_recip_q15(
q15_t in,
q15_t * dst,
q15_t * pRecipTable)
{
uint32_t out = 0, tempVal = 0;
uint32_t index = 0, i = 0;
uint32_t signBits = 0;
if(in > 0)
{
signBits = __CLZ(in) - 17;
}
else
{
signBits = __CLZ(-in) - 17;
}
/* Convert input sample to 1.15 format */
in = in << signBits;
/* calculation of index for initial approximated Val */
index = in >> 8;
index = (index & INDEX_MASK);
/* 1.15 with exp 1 */
out = pRecipTable[index];
/* calculation of reciprocal value */
/* running approximation for two iterations */
for (i = 0; i < 2; i++)
{
tempVal = (q15_t) (((q31_t) in * out) >> 15);
tempVal = 0x7FFF - tempVal;
/* 1.15 with exp 1 */
out = (q15_t) (((q31_t) out * tempVal) >> 14);
}
/* write output */
*dst = out;
/* return num of signbits of out = 1/in value */
return (signBits + 1);
}
/*
* @brief C custom defined intrinisic function for only M0 processors
*/
#if defined(ARM_MATH_CM0)
static __INLINE q31_t __SSAT(
q31_t x,
uint32_t y)
{
int32_t posMax, negMin;
uint32_t i;
posMax = 1;
for (i = 0; i < (y - 1); i++)
{
posMax = posMax * 2;
}
if(x > 0)
{
posMax = (posMax - 1);
if(x > posMax)
{
x = posMax;
}
}
else
{
negMin = -posMax;
if(x < negMin)
{
x = negMin;
}
}
return (x);
}
#endif /* end of ARM_MATH_CM0 */
/*
* @brief C custom defined intrinsic function for M3 and M0 processors
*/
#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
/*
* @brief C custom defined QADD8 for M3 and M0 processors
*/
static __INLINE q31_t __QADD8(
q31_t x,
q31_t y)
{
q31_t sum;
q7_t r, s, t, u;
r = (char) x;
s = (char) y;
r = __SSAT((q31_t) (r + s), 8);
s = __SSAT(((q31_t) (((x << 16) >> 24) + ((y << 16) >> 24))), 8);
t = __SSAT(((q31_t) (((x << 8) >> 24) + ((y << 8) >> 24))), 8);
u = __SSAT(((q31_t) ((x >> 24) + (y >> 24))), 8);
sum = (((q31_t) u << 24) & 0xFF000000) | (((q31_t) t << 16) & 0x00FF0000) |
(((q31_t) s << 8) & 0x0000FF00) | (r & 0x000000FF);
return sum;
}
/*
* @brief C custom defined QSUB8 for M3 and M0 processors
*/
static __INLINE q31_t __QSUB8(
q31_t x,
q31_t y)
{
q31_t sum;
q31_t r, s, t, u;
r = (char) x;
s = (char) y;
r = __SSAT((r - s), 8);
s = __SSAT(((q31_t) (((x << 16) >> 24) - ((y << 16) >> 24))), 8) << 8;
t = __SSAT(((q31_t) (((x << 8) >> 24) - ((y << 8) >> 24))), 8) << 16;
u = __SSAT(((q31_t) ((x >> 24) - (y >> 24))), 8) << 24;
sum =
(u & 0xFF000000) | (t & 0x00FF0000) | (s & 0x0000FF00) | (r & 0x000000FF);
return sum;
}
/*
* @brief C custom defined QADD16 for M3 and M0 processors
*/
/*
* @brief C custom defined QADD16 for M3 and M0 processors
*/
static __INLINE q31_t __QADD16(
q31_t x,
q31_t y)
{
q31_t sum;
q31_t r, s;
r = (short) x;
s = (short) y;
r = __SSAT(r + s, 16);
s = __SSAT(((q31_t) ((x >> 16) + (y >> 16))), 16) << 16;
sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
return sum;
}
/*
* @brief C custom defined SHADD16 for M3 and M0 processors
*/
static __INLINE q31_t __SHADD16(
q31_t x,
q31_t y)
{
q31_t sum;
q31_t r, s;
r = (short) x;
s = (short) y;
r = ((r >> 1) + (s >> 1));
s = ((q31_t) ((x >> 17) + (y >> 17))) << 16;
sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
return sum;
}
/*
* @brief C custom defined QSUB16 for M3 and M0 processors
*/
static __INLINE q31_t __QSUB16(
q31_t x,
q31_t y)
{
q31_t sum;
q31_t r, s;
r = (short) x;
s = (short) y;
r = __SSAT(r - s, 16);
s = __SSAT(((q31_t) ((x >> 16) - (y >> 16))), 16) << 16;
sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
return sum;
}
/*
* @brief C custom defined SHSUB16 for M3 and M0 processors
*/
static __INLINE q31_t __SHSUB16(
q31_t x,
q31_t y)
{
q31_t diff;
q31_t r, s;
r = (short) x;
s = (short) y;
r = ((r >> 1) - (s >> 1));
s = (((x >> 17) - (y >> 17)) << 16);
diff = (s & 0xFFFF0000) | (r & 0x0000FFFF);
return diff;
}
/*
* @brief C custom defined QASX for M3 and M0 processors
*/
static __INLINE q31_t __QASX(
q31_t x,
q31_t y)
{
q31_t sum = 0;
sum = ((sum + clip_q31_to_q15((q31_t) ((short) (x >> 16) + (short) y))) << 16) +
clip_q31_to_q15((q31_t) ((short) x - (short) (y >> 16)));
return sum;
}
/*
* @brief C custom defined SHASX for M3 and M0 processors
*/
static __INLINE q31_t __SHASX(
q31_t x,
q31_t y)
{
q31_t sum;
q31_t r, s;
r = (short) x;
s = (short) y;
r = ((r >> 1) - (y >> 17));
s = (((x >> 17) + (s >> 1)) << 16);
sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
return sum;
}
/*
* @brief C custom defined QSAX for M3 and M0 processors
*/
static __INLINE q31_t __QSAX(
q31_t x,
q31_t y)
{
q31_t sum = 0;
sum = ((sum + clip_q31_to_q15((q31_t) ((short) (x >> 16) - (short) y))) << 16) +
clip_q31_to_q15((q31_t) ((short) x + (short) (y >> 16)));
return sum;
}
/*
* @brief C custom defined SHSAX for M3 and M0 processors
*/
static __INLINE q31_t __SHSAX(
q31_t x,
q31_t y)
{
q31_t sum;
q31_t r, s;
r = (short) x;
s = (short) y;
r = ((r >> 1) + (y >> 17));
s = (((x >> 17) - (s >> 1)) << 16);
sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
return sum;
}
/*
* @brief C custom defined SMUSDX for M3 and M0 processors
*/
static __INLINE q31_t __SMUSDX(
q31_t x,
q31_t y)
{
return ((q31_t)(((short) x * (short) (y >> 16)) -
((short) (x >> 16) * (short) y)));
}
/*
* @brief C custom defined SMUADX for M3 and M0 processors
*/
static __INLINE q31_t __SMUADX(
q31_t x,
q31_t y)
{
return ((q31_t)(((short) x * (short) (y >> 16)) +
((short) (x >> 16) * (short) y)));
}
/*
* @brief C custom defined QADD for M3 and M0 processors
*/
static __INLINE q31_t __QADD(
q31_t x,
q31_t y)
{
return clip_q63_to_q31((q63_t) x + y);
}
/*
* @brief C custom defined QSUB for M3 and M0 processors
*/
static __INLINE q31_t __QSUB(
q31_t x,
q31_t y)
{
return clip_q63_to_q31((q63_t) x - y);
}
/*
* @brief C custom defined SMLAD for M3 and M0 processors
*/
static __INLINE q31_t __SMLAD(
q31_t x,
q31_t y,
q31_t sum)
{
return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
((short) x * (short) y));
}
/*
* @brief C custom defined SMLADX for M3 and M0 processors
*/
static __INLINE q31_t __SMLADX(
q31_t x,
q31_t y,
q31_t sum)
{
return (sum + ((short) (x >> 16) * (short) (y)) +
((short) x * (short) (y >> 16)));
}
/*
* @brief C custom defined SMLSDX for M3 and M0 processors
*/
static __INLINE q31_t __SMLSDX(
q31_t x,
q31_t y,
q31_t sum)
{
return (sum - ((short) (x >> 16) * (short) (y)) +
((short) x * (short) (y >> 16)));
}
/*
* @brief C custom defined SMLALD for M3 and M0 processors
*/
static __INLINE q63_t __SMLALD(
q31_t x,
q31_t y,
q63_t sum)
{
return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
((short) x * (short) y));
}
/*
* @brief C custom defined SMLALDX for M3 and M0 processors
*/
static __INLINE q63_t __SMLALDX(
q31_t x,
q31_t y,
q63_t sum)
{
return (sum + ((short) (x >> 16) * (short) y)) +
((short) x * (short) (y >> 16));
}
/*
* @brief C custom defined SMUAD for M3 and M0 processors
*/
static __INLINE q31_t __SMUAD(
q31_t x,
q31_t y)
{
return (((x >> 16) * (y >> 16)) +
(((x << 16) >> 16) * ((y << 16) >> 16)));
}
/*
* @brief C custom defined SMUSD for M3 and M0 processors
*/
static __INLINE q31_t __SMUSD(
q31_t x,
q31_t y)
{
return (-((x >> 16) * (y >> 16)) +
(((x << 16) >> 16) * ((y << 16) >> 16)));
}
#endif /* (ARM_MATH_CM3) || defined (ARM_MATH_CM0) */
/**
* @brief Instance structure for the Q7 FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of filter coefficients in the filter. */
q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
} arm_fir_instance_q7;
/**
* @brief Instance structure for the Q15 FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of filter coefficients in the filter. */
q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
} arm_fir_instance_q15;
/**
* @brief Instance structure for the Q31 FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of filter coefficients in the filter. */
q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
} arm_fir_instance_q31;
/**
* @brief Instance structure for the floating-point FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of filter coefficients in the filter. */
float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
} arm_fir_instance_f32;
/**
* @brief Processing function for the Q7 FIR filter.
* @param[in] *S points to an instance of the Q7 FIR filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_q7(
const arm_fir_instance_q7 * S,
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q7 FIR filter.
* @param[in,out] *S points to an instance of the Q7 FIR structure.
* @param[in] numTaps Number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of samples that are processed.
* @return none
*/
void arm_fir_init_q7(
arm_fir_instance_q7 * S,
uint16_t numTaps,
q7_t * pCoeffs,
q7_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q15 FIR filter.
* @param[in] *S points to an instance of the Q15 FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_q15(
const arm_fir_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
* @param[in] *S points to an instance of the Q15 FIR filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_fast_q15(
const arm_fir_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q15 FIR filter.
* @param[in,out] *S points to an instance of the Q15 FIR filter structure.
* @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of samples that are processed at a time.
* @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
* <code>numTaps</code> is not a supported value.
*/
arm_status arm_fir_init_q15(
arm_fir_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 FIR filter.
* @param[in] *S points to an instance of the Q31 FIR filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_q31(
const arm_fir_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
* @param[in] *S points to an instance of the Q31 FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_fast_q31(
const arm_fir_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 FIR filter.
* @param[in,out] *S points to an instance of the Q31 FIR structure.
* @param[in] numTaps Number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of samples that are processed at a time.
* @return none.
*/
void arm_fir_init_q31(
arm_fir_instance_q31 * S,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the floating-point FIR filter.
* @param[in] *S points to an instance of the floating-point FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_f32(
const arm_fir_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point FIR filter.
* @param[in,out] *S points to an instance of the floating-point FIR filter structure.
* @param[in] numTaps Number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of samples that are processed at a time.
* @return none.
*/
void arm_fir_init_f32(
arm_fir_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
uint32_t blockSize);
/**
* @brief Instance structure for the Q15 Biquad cascade filter.
*/
typedef struct
{
int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
} arm_biquad_casd_df1_inst_q15;
/**
* @brief Instance structure for the Q31 Biquad cascade filter.
*/
typedef struct
{
uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
} arm_biquad_casd_df1_inst_q31;
/**
* @brief Instance structure for the floating-point Biquad cascade filter.
*/
typedef struct
{
uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
} arm_biquad_casd_df1_inst_f32;
/**
* @brief Processing function for the Q15 Biquad cascade filter.
* @param[in] *S points to an instance of the Q15 Biquad cascade structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cascade_df1_q15(
const arm_biquad_casd_df1_inst_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q15 Biquad cascade filter.
* @param[in,out] *S points to an instance of the Q15 Biquad cascade structure.
* @param[in] numStages number of 2nd order stages in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
* @return none
*/
void arm_biquad_cascade_df1_init_q15(
arm_biquad_casd_df1_inst_q15 * S,
uint8_t numStages,
q15_t * pCoeffs,
q15_t * pState,
int8_t postShift);
/**
* @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
* @param[in] *S points to an instance of the Q15 Biquad cascade structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cascade_df1_fast_q15(
const arm_biquad_casd_df1_inst_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 Biquad cascade filter
* @param[in] *S points to an instance of the Q31 Biquad cascade structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cascade_df1_q31(
const arm_biquad_casd_df1_inst_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
* @param[in] *S points to an instance of the Q31 Biquad cascade structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cascade_df1_fast_q31(
const arm_biquad_casd_df1_inst_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 Biquad cascade filter.
* @param[in,out] *S points to an instance of the Q31 Biquad cascade structure.
* @param[in] numStages number of 2nd order stages in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
* @return none
*/
void arm_biquad_cascade_df1_init_q31(
arm_biquad_casd_df1_inst_q31 * S,
uint8_t numStages,
q31_t * pCoeffs,
q31_t * pState,
int8_t postShift);
/**
* @brief Processing function for the floating-point Biquad cascade filter.
* @param[in] *S points to an instance of the floating-point Biquad cascade structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cascade_df1_f32(
const arm_biquad_casd_df1_inst_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point Biquad cascade filter.
* @param[in,out] *S points to an instance of the floating-point Biquad cascade structure.
* @param[in] numStages number of 2nd order stages in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @return none
*/
void arm_biquad_cascade_df1_init_f32(
arm_biquad_casd_df1_inst_f32 * S,
uint8_t numStages,
float32_t * pCoeffs,
float32_t * pState);
/**
* @brief Instance structure for the floating-point matrix structure.
*/
typedef struct
{
uint16_t numRows; /**< number of rows of the matrix. */
uint16_t numCols; /**< number of columns of the matrix. */
float32_t *pData; /**< points to the data of the matrix. */
} arm_matrix_instance_f32;
/**
* @brief Instance structure for the Q15 matrix structure.
*/
typedef struct
{
uint16_t numRows; /**< number of rows of the matrix. */
uint16_t numCols; /**< number of columns of the matrix. */
q15_t *pData; /**< points to the data of the matrix. */
} arm_matrix_instance_q15;
/**
* @brief Instance structure for the Q31 matrix structure.
*/
typedef struct
{
uint16_t numRows; /**< number of rows of the matrix. */
uint16_t numCols; /**< number of columns of the matrix. */
q31_t *pData; /**< points to the data of the matrix. */
} arm_matrix_instance_q31;
/**
* @brief Floating-point matrix addition.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_add_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix addition.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_add_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix addition.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_add_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix transpose.
* @param[in] *pSrc points to the input matrix
* @param[out] *pDst points to the output matrix
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_trans_f32(
const arm_matrix_instance_f32 * pSrc,
arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix transpose.
* @param[in] *pSrc points to the input matrix
* @param[out] *pDst points to the output matrix
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_trans_q15(
const arm_matrix_instance_q15 * pSrc,
arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix transpose.
* @param[in] *pSrc points to the input matrix
* @param[out] *pDst points to the output matrix
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_trans_q31(
const arm_matrix_instance_q31 * pSrc,
arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix multiplication
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix multiplication
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst,
q15_t * pState);
/**
* @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @param[in] *pState points to the array for storing intermediate results
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_mult_fast_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst,
q15_t * pState);
/**
* @brief Q31 matrix multiplication
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst);
/**
* @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_mult_fast_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix subtraction
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_sub_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix subtraction
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_sub_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix subtraction
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_sub_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst);
/**
* @brief Floating-point matrix scaling.
* @param[in] *pSrc points to the input matrix
* @param[in] scale scale factor
* @param[out] *pDst points to the output matrix
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_scale_f32(
const arm_matrix_instance_f32 * pSrc,
float32_t scale,
arm_matrix_instance_f32 * pDst);
/**
* @brief Q15 matrix scaling.
* @param[in] *pSrc points to input matrix
* @param[in] scaleFract fractional portion of the scale factor
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to output matrix
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_scale_q15(
const arm_matrix_instance_q15 * pSrc,
q15_t scaleFract,
int32_t shift,
arm_matrix_instance_q15 * pDst);
/**
* @brief Q31 matrix scaling.
* @param[in] *pSrc points to input matrix
* @param[in] scaleFract fractional portion of the scale factor
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_scale_q31(
const arm_matrix_instance_q31 * pSrc,
q31_t scaleFract,
int32_t shift,
arm_matrix_instance_q31 * pDst);
/**
* @brief Q31 matrix initialization.
* @param[in,out] *S points to an instance of the floating-point matrix structure.
* @param[in] nRows number of rows in the matrix.
* @param[in] nColumns number of columns in the matrix.
* @param[in] *pData points to the matrix data array.
* @return none
*/
void arm_mat_init_q31(
arm_matrix_instance_q31 * S,
uint16_t nRows,
uint16_t nColumns,
q31_t *pData);
/**
* @brief Q15 matrix initialization.
* @param[in,out] *S points to an instance of the floating-point matrix structure.
* @param[in] nRows number of rows in the matrix.
* @param[in] nColumns number of columns in the matrix.
* @param[in] *pData points to the matrix data array.
* @return none
*/
void arm_mat_init_q15(
arm_matrix_instance_q15 * S,
uint16_t nRows,
uint16_t nColumns,
q15_t *pData);
/**
* @brief Floating-point matrix initialization.
* @param[in,out] *S points to an instance of the floating-point matrix structure.
* @param[in] nRows number of rows in the matrix.
* @param[in] nColumns number of columns in the matrix.
* @param[in] *pData points to the matrix data array.
* @return none
*/
void arm_mat_init_f32(
arm_matrix_instance_f32 * S,
uint16_t nRows,
uint16_t nColumns,
float32_t *pData);
/**
* @brief Instance structure for the Q15 PID Control.
*/
typedef struct
{
q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
#ifdef ARM_MATH_CM0
q15_t A1;
q15_t A2;
#else
q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
#endif
q15_t state[3]; /**< The state array of length 3. */
q15_t Kp; /**< The proportional gain. */
q15_t Ki; /**< The integral gain. */
q15_t Kd; /**< The derivative gain. */
} arm_pid_instance_q15;
/**
* @brief Instance structure for the Q31 PID Control.
*/
typedef struct
{
q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
q31_t A2; /**< The derived gain, A2 = Kd . */
q31_t state[3]; /**< The state array of length 3. */
q31_t Kp; /**< The proportional gain. */
q31_t Ki; /**< The integral gain. */
q31_t Kd; /**< The derivative gain. */
} arm_pid_instance_q31;
/**
* @brief Instance structure for the floating-point PID Control.
*/
typedef struct
{
float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
float32_t A2; /**< The derived gain, A2 = Kd . */
float32_t state[3]; /**< The state array of length 3. */
float32_t Kp; /**< The proportional gain. */
float32_t Ki; /**< The integral gain. */
float32_t Kd; /**< The derivative gain. */
} arm_pid_instance_f32;
/**
* @brief Initialization function for the floating-point PID Control.
* @param[in,out] *S points to an instance of the PID structure.
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
* @return none.
*/
void arm_pid_init_f32(
arm_pid_instance_f32 * S,
int32_t resetStateFlag);
/**
* @brief Reset function for the floating-point PID Control.
* @param[in,out] *S is an instance of the floating-point PID Control structure
* @return none
*/
void arm_pid_reset_f32(
arm_pid_instance_f32 * S);
/**
* @brief Initialization function for the Q31 PID Control.
* @param[in,out] *S points to an instance of the Q15 PID structure.
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
* @return none.
*/
void arm_pid_init_q31(
arm_pid_instance_q31 * S,
int32_t resetStateFlag);
/**
* @brief Reset function for the Q31 PID Control.
* @param[in,out] *S points to an instance of the Q31 PID Control structure
* @return none
*/
void arm_pid_reset_q31(
arm_pid_instance_q31 * S);
/**
* @brief Initialization function for the Q15 PID Control.
* @param[in,out] *S points to an instance of the Q15 PID structure.
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
* @return none.
*/
void arm_pid_init_q15(
arm_pid_instance_q15 * S,
int32_t resetStateFlag);
/**
* @brief Reset function for the Q15 PID Control.
* @param[in,out] *S points to an instance of the q15 PID Control structure
* @return none
*/
void arm_pid_reset_q15(
arm_pid_instance_q15 * S);
/**
* @brief Instance structure for the floating-point Linear Interpolate function.
*/
typedef struct
{
uint32_t nValues;
float32_t x1;
float32_t xSpacing;
float32_t *pYData; /**< pointer to the table of Y values */
} arm_linear_interp_instance_f32;
/**
* @brief Instance structure for the floating-point bilinear interpolation function.
*/
typedef struct
{
uint16_t numRows; /**< number of rows in the data table. */
uint16_t numCols; /**< number of columns in the data table. */
float32_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_f32;
/**
* @brief Instance structure for the Q31 bilinear interpolation function.
*/
typedef struct
{
uint16_t numRows; /**< number of rows in the data table. */
uint16_t numCols; /**< number of columns in the data table. */
q31_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_q31;
/**
* @brief Instance structure for the Q15 bilinear interpolation function.
*/
typedef struct
{
uint16_t numRows; /**< number of rows in the data table. */
uint16_t numCols; /**< number of columns in the data table. */
q15_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_q15;
/**
* @brief Instance structure for the Q15 bilinear interpolation function.
*/
typedef struct
{
uint16_t numRows; /**< number of rows in the data table. */
uint16_t numCols; /**< number of columns in the data table. */
q7_t *pData; /**< points to the data table. */
} arm_bilinear_interp_instance_q7;
/**
* @brief Q7 vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_mult_q7(
q7_t * pSrcA,
q7_t * pSrcB,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Q15 vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_mult_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Q31 vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_mult_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Floating-point vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_mult_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Instance structure for the Q15 CFFT/CIFFT function.
*/
typedef struct
{
uint16_t fftLen; /**< length of the FFT. */
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
q15_t *pTwiddle; /**< points to the twiddle factor table. */
uint16_t *pBitRevTable; /**< points to the bit reversal table. */
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
} arm_cfft_radix4_instance_q15;
/**
* @brief Instance structure for the Q31 CFFT/CIFFT function.
*/
typedef struct
{
uint16_t fftLen; /**< length of the FFT. */
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
q31_t *pTwiddle; /**< points to the twiddle factor table. */
uint16_t *pBitRevTable; /**< points to the bit reversal table. */
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
} arm_cfft_radix4_instance_q31;
/**
* @brief Instance structure for the floating-point CFFT/CIFFT function.
*/
typedef struct
{
uint16_t fftLen; /**< length of the FFT. */
uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
float32_t *pTwiddle; /**< points to the twiddle factor table. */
uint16_t *pBitRevTable; /**< points to the bit reversal table. */
uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
float32_t onebyfftLen; /**< value of 1/fftLen. */
} arm_cfft_radix4_instance_f32;
/**
* @brief Processing function for the Q15 CFFT/CIFFT.
* @param[in] *S points to an instance of the Q15 CFFT/CIFFT structure.
* @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
* @return none.
*/
void arm_cfft_radix4_q15(
const arm_cfft_radix4_instance_q15 * S,
q15_t * pSrc);
/**
* @brief Initialization function for the Q15 CFFT/CIFFT.
* @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure.
* @param[in] fftLen length of the FFT.
* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
*/
arm_status arm_cfft_radix4_init_q15(
arm_cfft_radix4_instance_q15 * S,
uint16_t fftLen,
uint8_t ifftFlag,
uint8_t bitReverseFlag);
/**
* @brief Processing function for the Q31 CFFT/CIFFT.
* @param[in] *S points to an instance of the Q31 CFFT/CIFFT structure.
* @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
* @return none.
*/
void arm_cfft_radix4_q31(
const arm_cfft_radix4_instance_q31 * S,
q31_t * pSrc);
/**
* @brief Initialization function for the Q31 CFFT/CIFFT.
* @param[in,out] *S points to an instance of the Q31 CFFT/CIFFT structure.
* @param[in] fftLen length of the FFT.
* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
*/
arm_status arm_cfft_radix4_init_q31(
arm_cfft_radix4_instance_q31 * S,
uint16_t fftLen,
uint8_t ifftFlag,
uint8_t bitReverseFlag);
/**
* @brief Processing function for the floating-point CFFT/CIFFT.
* @param[in] *S points to an instance of the floating-point CFFT/CIFFT structure.
* @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
* @return none.
*/
void arm_cfft_radix4_f32(
const arm_cfft_radix4_instance_f32 * S,
float32_t * pSrc);
/**
* @brief Initialization function for the floating-point CFFT/CIFFT.
* @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure.
* @param[in] fftLen length of the FFT.
* @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
*/
arm_status arm_cfft_radix4_init_f32(
arm_cfft_radix4_instance_f32 * S,
uint16_t fftLen,
uint8_t ifftFlag,
uint8_t bitReverseFlag);
/*----------------------------------------------------------------------
* Internal functions prototypes FFT function
----------------------------------------------------------------------*/
/**
* @brief Core function for the floating-point CFFT butterfly process.
* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
* @param[in] fftLen length of the FFT.
* @param[in] *pCoef points to the twiddle coefficient buffer.
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
* @return none.
*/
void arm_radix4_butterfly_f32(
float32_t * pSrc,
uint16_t fftLen,
float32_t * pCoef,
uint16_t twidCoefModifier);
/**
* @brief Core function for the floating-point CIFFT butterfly process.
* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
* @param[in] fftLen length of the FFT.
* @param[in] *pCoef points to twiddle coefficient buffer.
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
* @param[in] onebyfftLen value of 1/fftLen.
* @return none.
*/
void arm_radix4_butterfly_inverse_f32(
float32_t * pSrc,
uint16_t fftLen,
float32_t * pCoef,
uint16_t twidCoefModifier,
float32_t onebyfftLen);
/**
* @brief In-place bit reversal function.
* @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
* @param[in] fftSize length of the FFT.
* @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
* @param[in] *pBitRevTab points to the bit reversal table.
* @return none.
*/
void arm_bitreversal_f32(
float32_t *pSrc,
uint16_t fftSize,
uint16_t bitRevFactor,
uint16_t *pBitRevTab);
/**
* @brief Core function for the Q31 CFFT butterfly process.
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
* @param[in] fftLen length of the FFT.
* @param[in] *pCoef points to twiddle coefficient buffer.
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
* @return none.
*/
void arm_radix4_butterfly_q31(
q31_t *pSrc,
uint32_t fftLen,
q31_t *pCoef,
uint32_t twidCoefModifier);
/**
* @brief Core function for the Q31 CIFFT butterfly process.
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
* @param[in] fftLen length of the FFT.
* @param[in] *pCoef points to twiddle coefficient buffer.
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
* @return none.
*/
void arm_radix4_butterfly_inverse_q31(
q31_t * pSrc,
uint32_t fftLen,
q31_t * pCoef,
uint32_t twidCoefModifier);
/**
* @brief In-place bit reversal function.
* @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
* @param[in] fftLen length of the FFT.
* @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
* @param[in] *pBitRevTab points to bit reversal table.
* @return none.
*/
void arm_bitreversal_q31(
q31_t * pSrc,
uint32_t fftLen,
uint16_t bitRevFactor,
uint16_t *pBitRevTab);
/**
* @brief Core function for the Q15 CFFT butterfly process.
* @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type.
* @param[in] fftLen length of the FFT.
* @param[in] *pCoef16 points to twiddle coefficient buffer.
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
* @return none.
*/
void arm_radix4_butterfly_q15(
q15_t *pSrc16,
uint32_t fftLen,
q15_t *pCoef16,
uint32_t twidCoefModifier);
/**
* @brief Core function for the Q15 CIFFT butterfly process.
* @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type.
* @param[in] fftLen length of the FFT.
* @param[in] *pCoef16 points to twiddle coefficient buffer.
* @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
* @return none.
*/
void arm_radix4_butterfly_inverse_q15(
q15_t *pSrc16,
uint32_t fftLen,
q15_t *pCoef16,
uint32_t twidCoefModifier);
/**
* @brief In-place bit reversal function.
* @param[in, out] *pSrc points to the in-place buffer of Q15 data type.
* @param[in] fftLen length of the FFT.
* @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
* @param[in] *pBitRevTab points to bit reversal table.
* @return none.
*/
void arm_bitreversal_q15(
q15_t * pSrc,
uint32_t fftLen,
uint16_t bitRevFactor,
uint16_t *pBitRevTab);
/**
* @brief Instance structure for the Q15 RFFT/RIFFT function.
*/
typedef struct
{
uint32_t fftLenReal; /**< length of the real FFT. */
uint32_t fftLenBy2; /**< length of the complex FFT. */
uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
} arm_rfft_instance_q15;
/**
* @brief Instance structure for the Q31 RFFT/RIFFT function.
*/
typedef struct
{
uint32_t fftLenReal; /**< length of the real FFT. */
uint32_t fftLenBy2; /**< length of the complex FFT. */
uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
} arm_rfft_instance_q31;
/**
* @brief Instance structure for the floating-point RFFT/RIFFT function.
*/
typedef struct
{
uint32_t fftLenReal; /**< length of the real FFT. */
uint16_t fftLenBy2; /**< length of the complex FFT. */
uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
} arm_rfft_instance_f32;
/**
* @brief Processing function for the Q15 RFFT/RIFFT.
* @param[in] *S points to an instance of the Q15 RFFT/RIFFT structure.
* @param[in] *pSrc points to the input buffer.
* @param[out] *pDst points to the output buffer.
* @return none.
*/
void arm_rfft_q15(
const arm_rfft_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst);
/**
* @brief Initialization function for the Q15 RFFT/RIFFT.
* @param[in, out] *S points to an instance of the Q15 RFFT/RIFFT structure.
* @param[in] *S_CFFT points to an instance of the Q15 CFFT/CIFFT structure.
* @param[in] fftLenReal length of the FFT.
* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
*/
arm_status arm_rfft_init_q15(
arm_rfft_instance_q15 * S,
arm_cfft_radix4_instance_q15 * S_CFFT,
uint32_t fftLenReal,
uint32_t ifftFlagR,
uint32_t bitReverseFlag);
/**
* @brief Processing function for the Q31 RFFT/RIFFT.
* @param[in] *S points to an instance of the Q31 RFFT/RIFFT structure.
* @param[in] *pSrc points to the input buffer.
* @param[out] *pDst points to the output buffer.
* @return none.
*/
void arm_rfft_q31(
const arm_rfft_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst);
/**
* @brief Initialization function for the Q31 RFFT/RIFFT.
* @param[in, out] *S points to an instance of the Q31 RFFT/RIFFT structure.
* @param[in, out] *S_CFFT points to an instance of the Q31 CFFT/CIFFT structure.
* @param[in] fftLenReal length of the FFT.
* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
*/
arm_status arm_rfft_init_q31(
arm_rfft_instance_q31 * S,
arm_cfft_radix4_instance_q31 * S_CFFT,
uint32_t fftLenReal,
uint32_t ifftFlagR,
uint32_t bitReverseFlag);
/**
* @brief Initialization function for the floating-point RFFT/RIFFT.
* @param[in,out] *S points to an instance of the floating-point RFFT/RIFFT structure.
* @param[in,out] *S_CFFT points to an instance of the floating-point CFFT/CIFFT structure.
* @param[in] fftLenReal length of the FFT.
* @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
* @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
*/
arm_status arm_rfft_init_f32(
arm_rfft_instance_f32 * S,
arm_cfft_radix4_instance_f32 * S_CFFT,
uint32_t fftLenReal,
uint32_t ifftFlagR,
uint32_t bitReverseFlag);
/**
* @brief Processing function for the floating-point RFFT/RIFFT.
* @param[in] *S points to an instance of the floating-point RFFT/RIFFT structure.
* @param[in] *pSrc points to the input buffer.
* @param[out] *pDst points to the output buffer.
* @return none.
*/
void arm_rfft_f32(
const arm_rfft_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst);
/**
* @brief Instance structure for the floating-point DCT4/IDCT4 function.
*/
typedef struct
{
uint16_t N; /**< length of the DCT4. */
uint16_t Nby2; /**< half of the length of the DCT4. */
float32_t normalize; /**< normalizing factor. */
float32_t *pTwiddle; /**< points to the twiddle factor table. */
float32_t *pCosFactor; /**< points to the cosFactor table. */
arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
} arm_dct4_instance_f32;
/**
* @brief Initialization function for the floating-point DCT4/IDCT4.
* @param[in,out] *S points to an instance of floating-point DCT4/IDCT4 structure.
* @param[in] *S_RFFT points to an instance of floating-point RFFT/RIFFT structure.
* @param[in] *S_CFFT points to an instance of floating-point CFFT/CIFFT structure.
* @param[in] N length of the DCT4.
* @param[in] Nby2 half of the length of the DCT4.
* @param[in] normalize normalizing factor.
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
*/
arm_status arm_dct4_init_f32(
arm_dct4_instance_f32 * S,
arm_rfft_instance_f32 * S_RFFT,
arm_cfft_radix4_instance_f32 * S_CFFT,
uint16_t N,
uint16_t Nby2,
float32_t normalize);
/**
* @brief Processing function for the floating-point DCT4/IDCT4.
* @param[in] *S points to an instance of the floating-point DCT4/IDCT4 structure.
* @param[in] *pState points to state buffer.
* @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
* @return none.
*/
void arm_dct4_f32(
const arm_dct4_instance_f32 * S,
float32_t * pState,
float32_t * pInlineBuffer);
/**
* @brief Instance structure for the Q31 DCT4/IDCT4 function.
*/
typedef struct
{
uint16_t N; /**< length of the DCT4. */
uint16_t Nby2; /**< half of the length of the DCT4. */
q31_t normalize; /**< normalizing factor. */
q31_t *pTwiddle; /**< points to the twiddle factor table. */
q31_t *pCosFactor; /**< points to the cosFactor table. */
arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
} arm_dct4_instance_q31;
/**
* @brief Initialization function for the Q31 DCT4/IDCT4.
* @param[in,out] *S points to an instance of Q31 DCT4/IDCT4 structure.
* @param[in] *S_RFFT points to an instance of Q31 RFFT/RIFFT structure
* @param[in] *S_CFFT points to an instance of Q31 CFFT/CIFFT structure
* @param[in] N length of the DCT4.
* @param[in] Nby2 half of the length of the DCT4.
* @param[in] normalize normalizing factor.
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
*/
arm_status arm_dct4_init_q31(
arm_dct4_instance_q31 * S,
arm_rfft_instance_q31 * S_RFFT,
arm_cfft_radix4_instance_q31 * S_CFFT,
uint16_t N,
uint16_t Nby2,
q31_t normalize);
/**
* @brief Processing function for the Q31 DCT4/IDCT4.
* @param[in] *S points to an instance of the Q31 DCT4 structure.
* @param[in] *pState points to state buffer.
* @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
* @return none.
*/
void arm_dct4_q31(
const arm_dct4_instance_q31 * S,
q31_t * pState,
q31_t * pInlineBuffer);
/**
* @brief Instance structure for the Q15 DCT4/IDCT4 function.
*/
typedef struct
{
uint16_t N; /**< length of the DCT4. */
uint16_t Nby2; /**< half of the length of the DCT4. */
q15_t normalize; /**< normalizing factor. */
q15_t *pTwiddle; /**< points to the twiddle factor table. */
q15_t *pCosFactor; /**< points to the cosFactor table. */
arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
} arm_dct4_instance_q15;
/**
* @brief Initialization function for the Q15 DCT4/IDCT4.
* @param[in,out] *S points to an instance of Q15 DCT4/IDCT4 structure.
* @param[in] *S_RFFT points to an instance of Q15 RFFT/RIFFT structure.
* @param[in] *S_CFFT points to an instance of Q15 CFFT/CIFFT structure.
* @param[in] N length of the DCT4.
* @param[in] Nby2 half of the length of the DCT4.
* @param[in] normalize normalizing factor.
* @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
*/
arm_status arm_dct4_init_q15(
arm_dct4_instance_q15 * S,
arm_rfft_instance_q15 * S_RFFT,
arm_cfft_radix4_instance_q15 * S_CFFT,
uint16_t N,
uint16_t Nby2,
q15_t normalize);
/**
* @brief Processing function for the Q15 DCT4/IDCT4.
* @param[in] *S points to an instance of the Q15 DCT4 structure.
* @param[in] *pState points to state buffer.
* @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
* @return none.
*/
void arm_dct4_q15(
const arm_dct4_instance_q15 * S,
q15_t * pState,
q15_t * pInlineBuffer);
/**
* @brief Floating-point vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_add_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Q7 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_add_q7(
q7_t * pSrcA,
q7_t * pSrcB,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Q15 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_add_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Q31 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_add_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Floating-point vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_sub_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Q7 vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_sub_q7(
q7_t * pSrcA,
q7_t * pSrcB,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Q15 vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_sub_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Q31 vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_sub_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Multiplies a floating-point vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scale scale factor to be applied
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_scale_f32(
float32_t * pSrc,
float32_t scale,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Multiplies a Q7 vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scaleFract fractional portion of the scale value
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_scale_q7(
q7_t * pSrc,
q7_t scaleFract,
int8_t shift,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Multiplies a Q15 vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scaleFract fractional portion of the scale value
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_scale_q15(
q15_t * pSrc,
q15_t scaleFract,
int8_t shift,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Multiplies a Q31 vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scaleFract fractional portion of the scale value
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_scale_q31(
q31_t * pSrc,
q31_t scaleFract,
int8_t shift,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Q7 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_abs_q7(
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Floating-point vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_abs_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Q15 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_abs_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Q31 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_abs_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Dot product of floating-point vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*/
void arm_dot_prod_f32(
float32_t * pSrcA,
float32_t * pSrcB,
uint32_t blockSize,
float32_t * result);
/**
* @brief Dot product of Q7 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*/
void arm_dot_prod_q7(
q7_t * pSrcA,
q7_t * pSrcB,
uint32_t blockSize,
q31_t * result);
/**
* @brief Dot product of Q15 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*/
void arm_dot_prod_q15(
q15_t * pSrcA,
q15_t * pSrcB,
uint32_t blockSize,
q63_t * result);
/**
* @brief Dot product of Q31 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*/
void arm_dot_prod_q31(
q31_t * pSrcA,
q31_t * pSrcB,
uint32_t blockSize,
q63_t * result);
/**
* @brief Shifts the elements of a Q7 vector a specified number of bits.
* @param[in] *pSrc points to the input vector
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_shift_q7(
q7_t * pSrc,
int8_t shiftBits,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Shifts the elements of a Q15 vector a specified number of bits.
* @param[in] *pSrc points to the input vector
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_shift_q15(
q15_t * pSrc,
int8_t shiftBits,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Shifts the elements of a Q31 vector a specified number of bits.
* @param[in] *pSrc points to the input vector
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_shift_q31(
q31_t * pSrc,
int8_t shiftBits,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Adds a constant offset to a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_offset_f32(
float32_t * pSrc,
float32_t offset,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Adds a constant offset to a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_offset_q7(
q7_t * pSrc,
q7_t offset,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Adds a constant offset to a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_offset_q15(
q15_t * pSrc,
q15_t offset,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Adds a constant offset to a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_offset_q31(
q31_t * pSrc,
q31_t offset,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Negates the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_negate_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Negates the elements of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_negate_q7(
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Negates the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_negate_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Negates the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_negate_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Copies the elements of a floating-point vector.
* @param[in] *pSrc input pointer
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_copy_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Copies the elements of a Q7 vector.
* @param[in] *pSrc input pointer
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_copy_q7(
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Copies the elements of a Q15 vector.
* @param[in] *pSrc input pointer
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_copy_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Copies the elements of a Q31 vector.
* @param[in] *pSrc input pointer
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_copy_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Fills a constant value into a floating-point vector.
* @param[in] value input value to be filled
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_fill_f32(
float32_t value,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Fills a constant value into a Q7 vector.
* @param[in] value input value to be filled
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_fill_q7(
q7_t value,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Fills a constant value into a Q15 vector.
* @param[in] value input value to be filled
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_fill_q15(
q15_t value,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Fills a constant value into a Q31 vector.
* @param[in] value input value to be filled
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_fill_q31(
q31_t value,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Convolution of floating-point sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
* @return none.
*/
void arm_conv_f32(
float32_t * pSrcA,
uint32_t srcALen,
float32_t * pSrcB,
uint32_t srcBLen,
float32_t * pDst);
/**
* @brief Convolution of Q15 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
* @return none.
*/
void arm_conv_q15(
q15_t * pSrcA,
uint32_t srcALen,
q15_t * pSrcB,
uint32_t srcBLen,
q15_t * pDst);
/**
* @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
* @return none.
*/
void arm_conv_fast_q15(
q15_t * pSrcA,
uint32_t srcALen,
q15_t * pSrcB,
uint32_t srcBLen,
q15_t * pDst);
/**
* @brief Convolution of Q31 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
* @return none.
*/
void arm_conv_q31(
q31_t * pSrcA,
uint32_t srcALen,
q31_t * pSrcB,
uint32_t srcBLen,
q31_t * pDst);
/**
* @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
* @return none.
*/
void arm_conv_fast_q31(
q31_t * pSrcA,
uint32_t srcALen,
q31_t * pSrcB,
uint32_t srcBLen,
q31_t * pDst);
/**
* @brief Convolution of Q7 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
* @return none.
*/
void arm_conv_q7(
q7_t * pSrcA,
uint32_t srcALen,
q7_t * pSrcB,
uint32_t srcBLen,
q7_t * pDst);
/**
* @brief Partial convolution of floating-point sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data
* @param[in] firstIndex is the first output sample to start with.
* @param[in] numPoints is the number of output points to be computed.
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_f32(
float32_t * pSrcA,
uint32_t srcALen,
float32_t * pSrcB,
uint32_t srcBLen,
float32_t * pDst,
uint32_t firstIndex,
uint32_t numPoints);
/**
* @brief Partial convolution of Q15 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data
* @param[in] firstIndex is the first output sample to start with.
* @param[in] numPoints is the number of output points to be computed.
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_q15(
q15_t * pSrcA,
uint32_t srcALen,
q15_t * pSrcB,
uint32_t srcBLen,
q15_t * pDst,
uint32_t firstIndex,
uint32_t numPoints);
/**
* @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data
* @param[in] firstIndex is the first output sample to start with.
* @param[in] numPoints is the number of output points to be computed.
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_fast_q15(
q15_t * pSrcA,
uint32_t srcALen,
q15_t * pSrcB,
uint32_t srcBLen,
q15_t * pDst,
uint32_t firstIndex,
uint32_t numPoints);
/**
* @brief Partial convolution of Q31 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data
* @param[in] firstIndex is the first output sample to start with.
* @param[in] numPoints is the number of output points to be computed.
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_q31(
q31_t * pSrcA,
uint32_t srcALen,
q31_t * pSrcB,
uint32_t srcBLen,
q31_t * pDst,
uint32_t firstIndex,
uint32_t numPoints);
/**
* @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data
* @param[in] firstIndex is the first output sample to start with.
* @param[in] numPoints is the number of output points to be computed.
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_fast_q31(
q31_t * pSrcA,
uint32_t srcALen,
q31_t * pSrcB,
uint32_t srcBLen,
q31_t * pDst,
uint32_t firstIndex,
uint32_t numPoints);
/**
* @brief Partial convolution of Q7 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data
* @param[in] firstIndex is the first output sample to start with.
* @param[in] numPoints is the number of output points to be computed.
* @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
*/
arm_status arm_conv_partial_q7(
q7_t * pSrcA,
uint32_t srcALen,
q7_t * pSrcB,
uint32_t srcBLen,
q7_t * pDst,
uint32_t firstIndex,
uint32_t numPoints);
/**
* @brief Instance structure for the Q15 FIR decimator.
*/
typedef struct
{
uint8_t M; /**< decimation factor. */
uint16_t numTaps; /**< number of coefficients in the filter. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
} arm_fir_decimate_instance_q15;
/**
* @brief Instance structure for the Q31 FIR decimator.
*/
typedef struct
{
uint8_t M; /**< decimation factor. */
uint16_t numTaps; /**< number of coefficients in the filter. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
} arm_fir_decimate_instance_q31;
/**
* @brief Instance structure for the floating-point FIR decimator.
*/
typedef struct
{
uint8_t M; /**< decimation factor. */
uint16_t numTaps; /**< number of coefficients in the filter. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
} arm_fir_decimate_instance_f32;
/**
* @brief Processing function for the floating-point FIR decimator.
* @param[in] *S points to an instance of the floating-point FIR decimator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of input samples to process per call.
* @return none
*/
void arm_fir_decimate_f32(
const arm_fir_decimate_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point FIR decimator.
* @param[in,out] *S points to an instance of the floating-point FIR decimator structure.
* @param[in] numTaps number of coefficients in the filter.
* @param[in] M decimation factor.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
* <code>blockSize</code> is not a multiple of <code>M</code>.
*/
arm_status arm_fir_decimate_init_f32(
arm_fir_decimate_instance_f32 * S,
uint16_t numTaps,
uint8_t M,
float32_t * pCoeffs,
float32_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q15 FIR decimator.
* @param[in] *S points to an instance of the Q15 FIR decimator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of input samples to process per call.
* @return none
*/
void arm_fir_decimate_q15(
const arm_fir_decimate_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
* @param[in] *S points to an instance of the Q15 FIR decimator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of input samples to process per call.
* @return none
*/
void arm_fir_decimate_fast_q15(
const arm_fir_decimate_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q15 FIR decimator.
* @param[in,out] *S points to an instance of the Q15 FIR decimator structure.
* @param[in] numTaps number of coefficients in the filter.
* @param[in] M decimation factor.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
* <code>blockSize</code> is not a multiple of <code>M</code>.
*/
arm_status arm_fir_decimate_init_q15(
arm_fir_decimate_instance_q15 * S,
uint16_t numTaps,
uint8_t M,
q15_t * pCoeffs,
q15_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 FIR decimator.
* @param[in] *S points to an instance of the Q31 FIR decimator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of input samples to process per call.
* @return none
*/
void arm_fir_decimate_q31(
const arm_fir_decimate_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
* @param[in] *S points to an instance of the Q31 FIR decimator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of input samples to process per call.
* @return none
*/
void arm_fir_decimate_fast_q31(
arm_fir_decimate_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 FIR decimator.
* @param[in,out] *S points to an instance of the Q31 FIR decimator structure.
* @param[in] numTaps number of coefficients in the filter.
* @param[in] M decimation factor.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
* <code>blockSize</code> is not a multiple of <code>M</code>.
*/
arm_status arm_fir_decimate_init_q31(
arm_fir_decimate_instance_q31 * S,
uint16_t numTaps,
uint8_t M,
q31_t * pCoeffs,
q31_t * pState,
uint32_t blockSize);
/**
* @brief Instance structure for the Q15 FIR interpolator.
*/
typedef struct
{
uint8_t L; /**< upsample factor. */
uint16_t phaseLength; /**< length of each polyphase filter component. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
} arm_fir_interpolate_instance_q15;
/**
* @brief Instance structure for the Q31 FIR interpolator.
*/
typedef struct
{
uint8_t L; /**< upsample factor. */
uint16_t phaseLength; /**< length of each polyphase filter component. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
} arm_fir_interpolate_instance_q31;
/**
* @brief Instance structure for the floating-point FIR interpolator.
*/
typedef struct
{
uint8_t L; /**< upsample factor. */
uint16_t phaseLength; /**< length of each polyphase filter component. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
} arm_fir_interpolate_instance_f32;
/**
* @brief Processing function for the Q15 FIR interpolator.
* @param[in] *S points to an instance of the Q15 FIR interpolator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_interpolate_q15(
const arm_fir_interpolate_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q15 FIR interpolator.
* @param[in,out] *S points to an instance of the Q15 FIR interpolator structure.
* @param[in] L upsample factor.
* @param[in] numTaps number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*/
arm_status arm_fir_interpolate_init_q15(
arm_fir_interpolate_instance_q15 * S,
uint8_t L,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 FIR interpolator.
* @param[in] *S points to an instance of the Q15 FIR interpolator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_interpolate_q31(
const arm_fir_interpolate_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 FIR interpolator.
* @param[in,out] *S points to an instance of the Q31 FIR interpolator structure.
* @param[in] L upsample factor.
* @param[in] numTaps number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*/
arm_status arm_fir_interpolate_init_q31(
arm_fir_interpolate_instance_q31 * S,
uint8_t L,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
uint32_t blockSize);
/**
* @brief Processing function for the floating-point FIR interpolator.
* @param[in] *S points to an instance of the floating-point FIR interpolator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_interpolate_f32(
const arm_fir_interpolate_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point FIR interpolator.
* @param[in,out] *S points to an instance of the floating-point FIR interpolator structure.
* @param[in] L upsample factor.
* @param[in] numTaps number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*/
arm_status arm_fir_interpolate_init_f32(
arm_fir_interpolate_instance_f32 * S,
uint8_t L,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
uint32_t blockSize);
/**
* @brief Instance structure for the high precision Q31 Biquad cascade filter.
*/
typedef struct
{
uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
} arm_biquad_cas_df1_32x64_ins_q31;
/**
* @param[in] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cas_df1_32x64_q31(
const arm_biquad_cas_df1_32x64_ins_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @param[in,out] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
* @param[in] numStages number of 2nd order stages in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] postShift shift to be applied to the output. Varies according to the coefficients format
* @return none
*/
void arm_biquad_cas_df1_32x64_init_q31(
arm_biquad_cas_df1_32x64_ins_q31 * S,
uint8_t numStages,
q31_t * pCoeffs,
q63_t * pState,
uint8_t postShift);
/**
* @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
*/
typedef struct
{
uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
} arm_biquad_cascade_df2T_instance_f32;
/**
* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
* @param[in] *S points to an instance of the filter data structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_biquad_cascade_df2T_f32(
const arm_biquad_cascade_df2T_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
* @param[in,out] *S points to an instance of the filter data structure.
* @param[in] numStages number of 2nd order stages in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @return none
*/
void arm_biquad_cascade_df2T_init_f32(
arm_biquad_cascade_df2T_instance_f32 * S,
uint8_t numStages,
float32_t * pCoeffs,
float32_t * pState);
/**
* @brief Instance structure for the Q15 FIR lattice filter.
*/
typedef struct
{
uint16_t numStages; /**< number of filter stages. */
q15_t *pState; /**< points to the state variable array. The array is of length numStages. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
} arm_fir_lattice_instance_q15;
/**
* @brief Instance structure for the Q31 FIR lattice filter.
*/
typedef struct
{
uint16_t numStages; /**< number of filter stages. */
q31_t *pState; /**< points to the state variable array. The array is of length numStages. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
} arm_fir_lattice_instance_q31;
/**
* @brief Instance structure for the floating-point FIR lattice filter.
*/
typedef struct
{
uint16_t numStages; /**< number of filter stages. */
float32_t *pState; /**< points to the state variable array. The array is of length numStages. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
} arm_fir_lattice_instance_f32;
/**
* @brief Initialization function for the Q15 FIR lattice filter.
* @param[in] *S points to an instance of the Q15 FIR lattice structure.
* @param[in] numStages number of filter stages.
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
* @param[in] *pState points to the state buffer. The array is of length numStages.
* @return none.
*/
void arm_fir_lattice_init_q15(
arm_fir_lattice_instance_q15 * S,
uint16_t numStages,
q15_t * pCoeffs,
q15_t * pState);
/**
* @brief Processing function for the Q15 FIR lattice filter.
* @param[in] *S points to an instance of the Q15 FIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_lattice_q15(
const arm_fir_lattice_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 FIR lattice filter.
* @param[in] *S points to an instance of the Q31 FIR lattice structure.
* @param[in] numStages number of filter stages.
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
* @param[in] *pState points to the state buffer. The array is of length numStages.
* @return none.
*/
void arm_fir_lattice_init_q31(
arm_fir_lattice_instance_q31 * S,
uint16_t numStages,
q31_t * pCoeffs,
q31_t * pState);
/**
* @brief Processing function for the Q31 FIR lattice filter.
* @param[in] *S points to an instance of the Q31 FIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_lattice_q31(
const arm_fir_lattice_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point FIR lattice filter.
* @param[in] *S points to an instance of the floating-point FIR lattice structure.
* @param[in] numStages number of filter stages.
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
* @param[in] *pState points to the state buffer. The array is of length numStages.
* @return none.
*/
void arm_fir_lattice_init_f32(
arm_fir_lattice_instance_f32 * S,
uint16_t numStages,
float32_t * pCoeffs,
float32_t * pState);
/**
* @brief Processing function for the floating-point FIR lattice filter.
* @param[in] *S points to an instance of the floating-point FIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_lattice_f32(
const arm_fir_lattice_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Instance structure for the Q15 IIR lattice filter.
*/
typedef struct
{
uint16_t numStages; /**< number of stages in the filter. */
q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
} arm_iir_lattice_instance_q15;
/**
* @brief Instance structure for the Q31 IIR lattice filter.
*/
typedef struct
{
uint16_t numStages; /**< number of stages in the filter. */
q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
} arm_iir_lattice_instance_q31;
/**
* @brief Instance structure for the floating-point IIR lattice filter.
*/
typedef struct
{
uint16_t numStages; /**< number of stages in the filter. */
float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
} arm_iir_lattice_instance_f32;
/**
* @brief Processing function for the floating-point IIR lattice filter.
* @param[in] *S points to an instance of the floating-point IIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_f32(
const arm_iir_lattice_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point IIR lattice filter.
* @param[in] *S points to an instance of the floating-point IIR lattice structure.
* @param[in] numStages number of stages in the filter.
* @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
* @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
* @param[in] *pState points to the state buffer. The array is of length numStages+blockSize-1.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_init_f32(
arm_iir_lattice_instance_f32 * S,
uint16_t numStages,
float32_t *pkCoeffs,
float32_t *pvCoeffs,
float32_t *pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 IIR lattice filter.
* @param[in] *S points to an instance of the Q31 IIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_q31(
const arm_iir_lattice_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 IIR lattice filter.
* @param[in] *S points to an instance of the Q31 IIR lattice structure.
* @param[in] numStages number of stages in the filter.
* @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
* @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
* @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_init_q31(
arm_iir_lattice_instance_q31 * S,
uint16_t numStages,
q31_t *pkCoeffs,
q31_t *pvCoeffs,
q31_t *pState,
uint32_t blockSize);
/**
* @brief Processing function for the Q15 IIR lattice filter.
* @param[in] *S points to an instance of the Q15 IIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_q15(
const arm_iir_lattice_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Initialization function for the Q15 IIR lattice filter.
* @param[in] *S points to an instance of the fixed-point Q15 IIR lattice structure.
* @param[in] numStages number of stages in the filter.
* @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
* @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
* @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
* @param[in] blockSize number of samples to process per call.
* @return none.
*/
void arm_iir_lattice_init_q15(
arm_iir_lattice_instance_q15 * S,
uint16_t numStages,
q15_t *pkCoeffs,
q15_t *pvCoeffs,
q15_t *pState,
uint32_t blockSize);
/**
* @brief Instance structure for the floating-point LMS filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
float32_t mu; /**< step size that controls filter coefficient updates. */
} arm_lms_instance_f32;
/**
* @brief Processing function for floating-point LMS filter.
* @param[in] *S points to an instance of the floating-point LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_f32(
const arm_lms_instance_f32 * S,
float32_t * pSrc,
float32_t * pRef,
float32_t * pOut,
float32_t * pErr,
uint32_t blockSize);
/**
* @brief Initialization function for floating-point LMS filter.
* @param[in] *S points to an instance of the floating-point LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to the coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_init_f32(
arm_lms_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
float32_t mu,
uint32_t blockSize);
/**
* @brief Instance structure for the Q15 LMS filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
q15_t mu; /**< step size that controls filter coefficient updates. */
uint32_t postShift; /**< bit shift applied to coefficients. */
} arm_lms_instance_q15;
/**
* @brief Initialization function for the Q15 LMS filter.
* @param[in] *S points to an instance of the Q15 LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to the coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*/
void arm_lms_init_q15(
arm_lms_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
q15_t mu,
uint32_t blockSize,
uint32_t postShift);
/**
* @brief Processing function for Q15 LMS filter.
* @param[in] *S points to an instance of the Q15 LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_q15(
const arm_lms_instance_q15 * S,
q15_t * pSrc,
q15_t * pRef,
q15_t * pOut,
q15_t * pErr,
uint32_t blockSize);
/**
* @brief Instance structure for the Q31 LMS filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
q31_t mu; /**< step size that controls filter coefficient updates. */
uint32_t postShift; /**< bit shift applied to coefficients. */
} arm_lms_instance_q31;
/**
* @brief Processing function for Q31 LMS filter.
* @param[in] *S points to an instance of the Q15 LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_q31(
const arm_lms_instance_q31 * S,
q31_t * pSrc,
q31_t * pRef,
q31_t * pOut,
q31_t * pErr,
uint32_t blockSize);
/**
* @brief Initialization function for Q31 LMS filter.
* @param[in] *S points to an instance of the Q31 LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*/
void arm_lms_init_q31(
arm_lms_instance_q31 * S,
uint16_t numTaps,
q31_t *pCoeffs,
q31_t *pState,
q31_t mu,
uint32_t blockSize,
uint32_t postShift);
/**
* @brief Instance structure for the floating-point normalized LMS filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
float32_t mu; /**< step size that control filter coefficient updates. */
float32_t energy; /**< saves previous frame energy. */
float32_t x0; /**< saves previous input sample. */
} arm_lms_norm_instance_f32;
/**
* @brief Processing function for floating-point normalized LMS filter.
* @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_norm_f32(
arm_lms_norm_instance_f32 * S,
float32_t * pSrc,
float32_t * pRef,
float32_t * pOut,
float32_t * pErr,
uint32_t blockSize);
/**
* @brief Initialization function for floating-point normalized LMS filter.
* @param[in] *S points to an instance of the floating-point LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_norm_init_f32(
arm_lms_norm_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
float32_t mu,
uint32_t blockSize);
/**
* @brief Instance structure for the Q31 normalized LMS filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
q31_t mu; /**< step size that controls filter coefficient updates. */
uint8_t postShift; /**< bit shift applied to coefficients. */
q31_t *recipTable; /**< points to the reciprocal initial value table. */
q31_t energy; /**< saves previous frame energy. */
q31_t x0; /**< saves previous input sample. */
} arm_lms_norm_instance_q31;
/**
* @brief Processing function for Q31 normalized LMS filter.
* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_norm_q31(
arm_lms_norm_instance_q31 * S,
q31_t * pSrc,
q31_t * pRef,
q31_t * pOut,
q31_t * pErr,
uint32_t blockSize);
/**
* @brief Initialization function for Q31 normalized LMS filter.
* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*/
void arm_lms_norm_init_q31(
arm_lms_norm_instance_q31 * S,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
q31_t mu,
uint32_t blockSize,
uint8_t postShift);
/**
* @brief Instance structure for the Q15 normalized LMS filter.
*/
typedef struct
{
uint16_t numTaps; /**< Number of coefficients in the filter. */
q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
q15_t mu; /**< step size that controls filter coefficient updates. */
uint8_t postShift; /**< bit shift applied to coefficients. */
q15_t *recipTable; /**< Points to the reciprocal initial value table. */
q15_t energy; /**< saves previous frame energy. */
q15_t x0; /**< saves previous input sample. */
} arm_lms_norm_instance_q15;
/**
* @brief Processing function for Q15 normalized LMS filter.
* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_norm_q15(
arm_lms_norm_instance_q15 * S,
q15_t * pSrc,
q15_t * pRef,
q15_t * pOut,
q15_t * pErr,
uint32_t blockSize);
/**
* @brief Initialization function for Q15 normalized LMS filter.
* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*/
void arm_lms_norm_init_q15(
arm_lms_norm_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
q15_t mu,
uint32_t blockSize,
uint8_t postShift);
/**
* @brief Correlation of floating-point sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
* @return none.
*/
void arm_correlate_f32(
float32_t * pSrcA,
uint32_t srcALen,
float32_t * pSrcB,
uint32_t srcBLen,
float32_t * pDst);
/**
* @brief Correlation of Q15 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
* @return none.
*/
void arm_correlate_q15(
q15_t * pSrcA,
uint32_t srcALen,
q15_t * pSrcB,
uint32_t srcBLen,
q15_t * pDst);
/**
* @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
* @return none.
*/
void arm_correlate_fast_q15(
q15_t * pSrcA,
uint32_t srcALen,
q15_t * pSrcB,
uint32_t srcBLen,
q15_t * pDst);
/**
* @brief Correlation of Q31 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
* @return none.
*/
void arm_correlate_q31(
q31_t * pSrcA,
uint32_t srcALen,
q31_t * pSrcB,
uint32_t srcBLen,
q31_t * pDst);
/**
* @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
* @return none.
*/
void arm_correlate_fast_q31(
q31_t * pSrcA,
uint32_t srcALen,
q31_t * pSrcB,
uint32_t srcBLen,
q31_t * pDst);
/**
* @brief Correlation of Q7 sequences.
* @param[in] *pSrcA points to the first input sequence.
* @param[in] srcALen length of the first input sequence.
* @param[in] *pSrcB points to the second input sequence.
* @param[in] srcBLen length of the second input sequence.
* @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
* @return none.
*/
void arm_correlate_q7(
q7_t * pSrcA,
uint32_t srcALen,
q7_t * pSrcB,
uint32_t srcBLen,
q7_t * pDst);
/**
* @brief Instance structure for the floating-point sparse FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_f32;
/**
* @brief Instance structure for the Q31 sparse FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_q31;
/**
* @brief Instance structure for the Q15 sparse FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_q15;
/**
* @brief Instance structure for the Q7 sparse FIR filter.
*/
typedef struct
{
uint16_t numTaps; /**< number of coefficients in the filter. */
uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
} arm_fir_sparse_instance_q7;
/**
* @brief Processing function for the floating-point sparse FIR filter.
* @param[in] *S points to an instance of the floating-point sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_sparse_f32(
arm_fir_sparse_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
float32_t * pScratchIn,
uint32_t blockSize);
/**
* @brief Initialization function for the floating-point sparse FIR filter.
* @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*/
void arm_fir_sparse_init_f32(
arm_fir_sparse_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize);
/**
* @brief Processing function for the Q31 sparse FIR filter.
* @param[in] *S points to an instance of the Q31 sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_sparse_q31(
arm_fir_sparse_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
q31_t * pScratchIn,
uint32_t blockSize);
/**
* @brief Initialization function for the Q31 sparse FIR filter.
* @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*/
void arm_fir_sparse_init_q31(
arm_fir_sparse_instance_q31 * S,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize);
/**
* @brief Processing function for the Q15 sparse FIR filter.
* @param[in] *S points to an instance of the Q15 sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] *pScratchOut points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_sparse_q15(
arm_fir_sparse_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
q15_t * pScratchIn,
q31_t * pScratchOut,
uint32_t blockSize);
/**
* @brief Initialization function for the Q15 sparse FIR filter.
* @param[in,out] *S points to an instance of the Q15 sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*/
void arm_fir_sparse_init_q15(
arm_fir_sparse_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize);
/**
* @brief Processing function for the Q7 sparse FIR filter.
* @param[in] *S points to an instance of the Q7 sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] *pScratchOut points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_sparse_q7(
arm_fir_sparse_instance_q7 * S,
q7_t * pSrc,
q7_t * pDst,
q7_t * pScratchIn,
q31_t * pScratchOut,
uint32_t blockSize);
/**
* @brief Initialization function for the Q7 sparse FIR filter.
* @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*/
void arm_fir_sparse_init_q7(
arm_fir_sparse_instance_q7 * S,
uint16_t numTaps,
q7_t * pCoeffs,
q7_t * pState,
int32_t *pTapDelay,
uint16_t maxDelay,
uint32_t blockSize);
/*
* @brief Floating-point sin_cos function.
* @param[in] theta input value in degrees
* @param[out] *pSinVal points to the processed sine output.
* @param[out] *pCosVal points to the processed cos output.
* @return none.
*/
void arm_sin_cos_f32(
float32_t theta,
float32_t *pSinVal,
float32_t *pCcosVal);
/*
* @brief Q31 sin_cos function.
* @param[in] theta scaled input value in degrees
* @param[out] *pSinVal points to the processed sine output.
* @param[out] *pCosVal points to the processed cosine output.
* @return none.
*/
void arm_sin_cos_q31(
q31_t theta,
q31_t *pSinVal,
q31_t *pCosVal);
/**
* @brief Floating-point complex conjugate.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_conj_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t numSamples);
/**
* @brief Q31 complex conjugate.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_conj_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t numSamples);
/**
* @brief Q15 complex conjugate.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_conj_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t numSamples);
/**
* @brief Floating-point complex magnitude squared
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_squared_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t numSamples);
/**
* @brief Q31 complex magnitude squared
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_squared_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t numSamples);
/**
* @brief Q15 complex magnitude squared
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_squared_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t numSamples);
/**
* @ingroup groupController
*/
/**
* @defgroup PID PID Motor Control
*
* A Proportional Integral Derivative (PID) controller is a generic feedback control
* loop mechanism widely used in industrial control systems.
* A PID controller is the most commonly used type of feedback controller.
*
* This set of functions implements (PID) controllers
* for Q15, Q31, and floating-point data types. The functions operate on a single sample
* of data and each call to the function returns a single processed value.
* <code>S</code> points to an instance of the PID control data structure. <code>in</code>
* is the input sample value. The functions return the output value.
*
* \par Algorithm:
* <pre>
* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
* A0 = Kp + Ki + Kd
* A1 = (-Kp ) - (2 * Kd )
* A2 = Kd </pre>
*
* \par
* where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
*
* \par
* \image html PID.gif "Proportional Integral Derivative Controller"
*
* \par
* The PID controller calculates an "error" value as the difference between
* the measured output and the reference input.
* The controller attempts to minimize the error by adjusting the process control inputs.
* The proportional value determines the reaction to the current error,
* the integral value determines the reaction based on the sum of recent errors,
* and the derivative value determines the reaction based on the rate at which the error has been changing.
*
* \par Instance Structure
* The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
* A separate instance structure must be defined for each PID Controller.
* There are separate instance structure declarations for each of the 3 supported data types.
*
* \par Reset Functions
* There is also an associated reset function for each data type which clears the state array.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
* - Zeros out the values in the state buffer.
*
* \par
* Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
*
* \par Fixed-Point Behavior
* Care must be taken when using the fixed-point versions of the PID Controller functions.
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup PID
* @{
*/
/**
* @brief Process function for the floating-point PID Control.
* @param[in,out] *S is an instance of the floating-point PID Control structure
* @param[in] in input sample to process
* @return out processed output sample.
*/
static __INLINE float32_t arm_pid_f32(
arm_pid_instance_f32 * S,
float32_t in)
{
float32_t out;
/* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */
out = (S->A0 * in) +
(S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
/* Update state */
S->state[1] = S->state[0];
S->state[0] = in;
S->state[2] = out;
/* return to application */
return (out);
}
/**
* @brief Process function for the Q31 PID Control.
* @param[in,out] *S points to an instance of the Q31 PID Control structure
* @param[in] in input sample to process
* @return out processed output sample.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clip.
* In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
* After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
*/
static __INLINE q31_t arm_pid_q31(
arm_pid_instance_q31 * S,
q31_t in)
{
q63_t acc;
q31_t out;
/* acc = A0 * x[n] */
acc = (q63_t) S->A0 * in;
/* acc += A1 * x[n-1] */
acc += (q63_t) S->A1 * S->state[0];
/* acc += A2 * x[n-2] */
acc += (q63_t) S->A2 * S->state[1];
/* convert output to 1.31 format to add y[n-1] */
out = (q31_t) (acc >> 31u);
/* out += y[n-1] */
out += S->state[2];
/* Update state */
S->state[1] = S->state[0];
S->state[0] = in;
S->state[2] = out;
/* return to application */
return (out);
}
/**
* @brief Process function for the Q15 PID Control.
* @param[in,out] *S points to an instance of the Q15 PID Control structure
* @param[in] in input sample to process
* @return out processed output sample.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 64-bit internal accumulator.
* Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
* Lastly, the accumulator is saturated to yield a result in 1.15 format.
*/
static __INLINE q15_t arm_pid_q15(
arm_pid_instance_q15 * S,
q15_t in)
{
q63_t acc;
q15_t out;
/* Implementation of PID controller */
#ifdef ARM_MATH_CM0
/* acc = A0 * x[n] */
acc = ((q31_t) S->A0 )* in ;
#else
/* acc = A0 * x[n] */
acc = (q31_t) __SMUAD(S->A0, in);
#endif
#ifdef ARM_MATH_CM0
/* acc += A1 * x[n-1] + A2 * x[n-2] */
acc += (q31_t) S->A1 * S->state[0] ;
acc += (q31_t) S->A2 * S->state[1] ;
#else
/* acc += A1 * x[n-1] + A2 * x[n-2] */
acc = __SMLALD(S->A1, (q31_t)__SIMD32(S->state), acc);
#endif
/* acc += y[n-1] */
acc += (q31_t) S->state[2] << 15;
/* saturate the output */
out = (q15_t) (__SSAT((acc >> 15), 16));
/* Update state */
S->state[1] = S->state[0];
S->state[0] = in;
S->state[2] = out;
/* return to application */
return (out);
}
/**
* @} end of PID group
*/
/**
* @brief Floating-point matrix inverse.
* @param[in] *src points to the instance of the input floating-point matrix structure.
* @param[out] *dst points to the instance of the output floating-point matrix structure.
* @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
* If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
*/
arm_status arm_mat_inverse_f32(
const arm_matrix_instance_f32 * src,
arm_matrix_instance_f32 * dst);
/**
* @ingroup groupController
*/
/**
* @defgroup clarke Vector Clarke Transform
* Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
* Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
* in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
* When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
* \image html clarke.gif Stator current space vector and its components in (a,b).
* and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
* can be calculated using only <code>Ia</code> and <code>Ib</code>.
*
* The function operates on a single sample of data and each call to the function returns the processed output.
* The library provides separate functions for Q31 and floating-point data types.
* \par Algorithm
* \image html clarkeFormula.gif
* where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
* <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
* \par Fixed-Point Behavior
* Care must be taken when using the Q31 version of the Clarke transform.
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup clarke
* @{
*/
/**
*
* @brief Floating-point Clarke transform
* @param[in] Ia input three-phase coordinate <code>a</code>
* @param[in] Ib input three-phase coordinate <code>b</code>
* @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
* @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
* @return none.
*/
static __INLINE void arm_clarke_f32(
float32_t Ia,
float32_t Ib,
float32_t * pIalpha,
float32_t * pIbeta)
{
/* Calculate pIalpha using the equation, pIalpha = Ia */
*pIalpha = Ia;
/* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
*pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
}
/**
* @brief Clarke transform for Q31 version
* @param[in] Ia input three-phase coordinate <code>a</code>
* @param[in] Ib input three-phase coordinate <code>b</code>
* @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
* @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 32-bit accumulator.
* The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
* There is saturation on the addition, hence there is no risk of overflow.
*/
static __INLINE void arm_clarke_q31(
q31_t Ia,
q31_t Ib,
q31_t * pIalpha,
q31_t * pIbeta)
{
q31_t product1, product2; /* Temporary variables used to store intermediate results */
/* Calculating pIalpha from Ia by equation pIalpha = Ia */
*pIalpha = Ia;
/* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
/* Intermediate product is calculated by (2/sqrt(3) * Ib) */
product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
/* pIbeta is calculated by adding the intermediate products */
*pIbeta = __QADD(product1, product2);
}
/**
* @} end of clarke group
*/
/**
* @brief Converts the elements of the Q7 vector to Q31 vector.
* @param[in] *pSrc input pointer
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_q7_to_q31(
q7_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @ingroup groupController
*/
/**
* @defgroup inv_clarke Vector Inverse Clarke Transform
* Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
*
* The function operates on a single sample of data and each call to the function returns the processed output.
* The library provides separate functions for Q31 and floating-point data types.
* \par Algorithm
* \image html clarkeInvFormula.gif
* where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
* <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
* \par Fixed-Point Behavior
* Care must be taken when using the Q31 version of the Clarke transform.
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup inv_clarke
* @{
*/
/**
* @brief Floating-point Inverse Clarke transform
* @param[in] Ialpha input two-phase orthogonal vector axis alpha
* @param[in] Ibeta input two-phase orthogonal vector axis beta
* @param[out] *pIa points to output three-phase coordinate <code>a</code>
* @param[out] *pIb points to output three-phase coordinate <code>b</code>
* @return none.
*/
static __INLINE void arm_inv_clarke_f32(
float32_t Ialpha,
float32_t Ibeta,
float32_t * pIa,
float32_t * pIb)
{
/* Calculating pIa from Ialpha by equation pIa = Ialpha */
*pIa = Ialpha;
/* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
*pIb = -0.5 * Ialpha + (float32_t) 0.8660254039 *Ibeta;
}
/**
* @brief Inverse Clarke transform for Q31 version
* @param[in] Ialpha input two-phase orthogonal vector axis alpha
* @param[in] Ibeta input two-phase orthogonal vector axis beta
* @param[out] *pIa points to output three-phase coordinate <code>a</code>
* @param[out] *pIb points to output three-phase coordinate <code>b</code>
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 32-bit accumulator.
* The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
* There is saturation on the subtraction, hence there is no risk of overflow.
*/
static __INLINE void arm_inv_clarke_q31(
q31_t Ialpha,
q31_t Ibeta,
q31_t * pIa,
q31_t * pIb)
{
q31_t product1, product2; /* Temporary variables used to store intermediate results */
/* Calculating pIa from Ialpha by equation pIa = Ialpha */
*pIa = Ialpha;
/* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
/* Intermediate product is calculated by (1/sqrt(3) * pIb) */
product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
/* pIb is calculated by subtracting the products */
*pIb = __QSUB(product2, product1);
}
/**
* @} end of inv_clarke group
*/
/**
* @brief Converts the elements of the Q7 vector to Q15 vector.
* @param[in] *pSrc input pointer
* @param[out] *pDst output pointer
* @param[in] blockSize number of samples to process
* @return none.
*/
void arm_q7_to_q15(
q7_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @ingroup groupController
*/
/**
* @defgroup park Vector Park Transform
*
* Forward Park transform converts the input two-coordinate vector to flux and torque components.
* The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
* from the stationary to the moving reference frame and control the spatial relationship between
* the stator vector current and rotor flux vector.
* If we consider the d axis aligned with the rotor flux, the diagram below shows the
* current vector and the relationship from the two reference frames:
* \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
*
* The function operates on a single sample of data and each call to the function returns the processed output.
* The library provides separate functions for Q31 and floating-point data types.
* \par Algorithm
* \image html parkFormula.gif
* where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
* <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
* cosine and sine values of theta (rotor flux position).
* \par Fixed-Point Behavior
* Care must be taken when using the Q31 version of the Park transform.
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup park
* @{
*/
/**
* @brief Floating-point Park transform
* @param[in] Ialpha input two-phase vector coordinate alpha
* @param[in] Ibeta input two-phase vector coordinate beta
* @param[out] *pId points to output rotor reference frame d
* @param[out] *pIq points to output rotor reference frame q
* @param[in] sinVal sine value of rotation angle theta
* @param[in] cosVal cosine value of rotation angle theta
* @return none.
*
* The function implements the forward Park transform.
*
*/
static __INLINE void arm_park_f32(
float32_t Ialpha,
float32_t Ibeta,
float32_t * pId,
float32_t * pIq,
float32_t sinVal,
float32_t cosVal)
{
/* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
*pId = Ialpha * cosVal + Ibeta * sinVal;
/* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
*pIq = -Ialpha * sinVal + Ibeta * cosVal;
}
/**
* @brief Park transform for Q31 version
* @param[in] Ialpha input two-phase vector coordinate alpha
* @param[in] Ibeta input two-phase vector coordinate beta
* @param[out] *pId points to output rotor reference frame d
* @param[out] *pIq points to output rotor reference frame q
* @param[in] sinVal sine value of rotation angle theta
* @param[in] cosVal cosine value of rotation angle theta
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 32-bit accumulator.
* The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
* There is saturation on the addition and subtraction, hence there is no risk of overflow.
*/
static __INLINE void arm_park_q31(
q31_t Ialpha,
q31_t Ibeta,
q31_t * pId,
q31_t * pIq,
q31_t sinVal,
q31_t cosVal)
{
q31_t product1, product2; /* Temporary variables used to store intermediate results */
q31_t product3, product4; /* Temporary variables used to store intermediate results */
/* Intermediate product is calculated by (Ialpha * cosVal) */
product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
/* Intermediate product is calculated by (Ibeta * sinVal) */
product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
/* Intermediate product is calculated by (Ialpha * sinVal) */
product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
/* Intermediate product is calculated by (Ibeta * cosVal) */
product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
/* Calculate pId by adding the two intermediate products 1 and 2 */
*pId = __QADD(product1, product2);
/* Calculate pIq by subtracting the two intermediate products 3 from 4 */
*pIq = __QSUB(product4, product3);
}
/**
* @} end of park group
*/
/**
* @brief Converts the elements of the Q7 vector to floating-point vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q7_to_float(
q7_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @ingroup groupController
*/
/**
* @defgroup inv_park Vector Inverse Park transform
* Inverse Park transform converts the input flux and torque components to two-coordinate vector.
*
* The function operates on a single sample of data and each call to the function returns the processed output.
* The library provides separate functions for Q31 and floating-point data types.
* \par Algorithm
* \image html parkInvFormula.gif
* where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
* <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
* cosine and sine values of theta (rotor flux position).
* \par Fixed-Point Behavior
* Care must be taken when using the Q31 version of the Park transform.
* In particular, the overflow and saturation behavior of the accumulator used must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup inv_park
* @{
*/
/**
* @brief Floating-point Inverse Park transform
* @param[in] Id input coordinate of rotor reference frame d
* @param[in] Iq input coordinate of rotor reference frame q
* @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
* @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
* @param[in] sinVal sine value of rotation angle theta
* @param[in] cosVal cosine value of rotation angle theta
* @return none.
*/
static __INLINE void arm_inv_park_f32(
float32_t Id,
float32_t Iq,
float32_t * pIalpha,
float32_t * pIbeta,
float32_t sinVal,
float32_t cosVal)
{
/* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
*pIalpha = Id * cosVal - Iq * sinVal;
/* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
*pIbeta = Id * sinVal + Iq * cosVal;
}
/**
* @brief Inverse Park transform for Q31 version
* @param[in] Id input coordinate of rotor reference frame d
* @param[in] Iq input coordinate of rotor reference frame q
* @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
* @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
* @param[in] sinVal sine value of rotation angle theta
* @param[in] cosVal cosine value of rotation angle theta
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 32-bit accumulator.
* The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
* There is saturation on the addition, hence there is no risk of overflow.
*/
static __INLINE void arm_inv_park_q31(
q31_t Id,
q31_t Iq,
q31_t * pIalpha,
q31_t * pIbeta,
q31_t sinVal,
q31_t cosVal)
{
q31_t product1, product2; /* Temporary variables used to store intermediate results */
q31_t product3, product4; /* Temporary variables used to store intermediate results */
/* Intermediate product is calculated by (Id * cosVal) */
product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
/* Intermediate product is calculated by (Iq * sinVal) */
product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
/* Intermediate product is calculated by (Id * sinVal) */
product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
/* Intermediate product is calculated by (Iq * cosVal) */
product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
/* Calculate pIalpha by using the two intermediate products 1 and 2 */
*pIalpha = __QSUB(product1, product2);
/* Calculate pIbeta by using the two intermediate products 3 and 4 */
*pIbeta = __QADD(product4, product3);
}
/**
* @} end of Inverse park group
*/
/**
* @brief Converts the elements of the Q31 vector to floating-point vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q31_to_float(
q31_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @ingroup groupInterpolation
*/
/**
* @defgroup LinearInterpolate Linear Interpolation
*
* Linear interpolation is a method of curve fitting using linear polynomials.
* Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
*
* \par
* \image html LinearInterp.gif "Linear interpolation"
*
* \par
* A Linear Interpolate function calculates an output value(y), for the input(x)
* using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
*
* \par Algorithm:
* <pre>
* y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
* where x0, x1 are nearest values of input x
* y0, y1 are nearest values to output y
* </pre>
*
* \par
* This set of functions implements Linear interpolation process
* for Q7, Q15, Q31, and floating-point data types. The functions operate on a single
* sample of data and each call to the function returns a single processed value.
* <code>S</code> points to an instance of the Linear Interpolate function data structure.
* <code>x</code> is the input sample value. The functions returns the output value.
*
* \par
* if x is outside of the table boundary, Linear interpolation returns first value of the table
* if x is below input range and returns last value of table if x is above range.
*/
/**
* @addtogroup LinearInterpolate
* @{
*/
/**
* @brief Process function for the floating-point Linear Interpolation Function.
* @param[in,out] *S is an instance of the floating-point Linear Interpolation structure
* @param[in] x input sample to process
* @return y processed output sample.
*
*/
static __INLINE float32_t arm_linear_interp_f32(
arm_linear_interp_instance_f32 * S,
float32_t x)
{
float32_t y;
float32_t x0, x1; /* Nearest input values */
float32_t y0, y1; /* Nearest output values */
float32_t xSpacing = S->xSpacing; /* spacing between input values */
int32_t i; /* Index variable */
float32_t *pYData = S->pYData; /* pointer to output table */
/* Calculation of index */
i = (x - S->x1) / xSpacing;
if(i < 0)
{
/* Iniatilize output for below specified range as least output value of table */
y = pYData[0];
}
else if(i >= S->nValues)
{
/* Iniatilize output for above specified range as last output value of table */
y = pYData[S->nValues-1];
}
else
{
/* Calculation of nearest input values */
x0 = S->x1 + i * xSpacing;
x1 = S->x1 + (i +1) * xSpacing;
/* Read of nearest output values */
y0 = pYData[i];
y1 = pYData[i + 1];
/* Calculation of output */
y = y0 + (x - x0) * ((y1 - y0)/(x1-x0));
}
/* returns output value */
return (y);
}
/**
*
* @brief Process function for the Q31 Linear Interpolation Function.
* @param[in] *pYData pointer to Q31 Linear Interpolation table
* @param[in] x input sample to process
* @param[in] nValues number of table values
* @return y processed output sample.
*
* \par
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
* This function can support maximum of table size 2^12.
*
*/
static __INLINE q31_t arm_linear_interp_q31(q31_t *pYData,
q31_t x, uint32_t nValues)
{
q31_t y; /* output */
q31_t y0, y1; /* Nearest output values */
q31_t fract; /* fractional part */
int32_t index; /* Index to read nearest output values */
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
index = ((x & 0xFFF00000) >> 20);
if(index >= (nValues - 1))
{
return(pYData[nValues - 1]);
}
else if(index < 0)
{
return(pYData[0]);
}
else
{
/* 20 bits for the fractional part */
/* shift left by 11 to keep fract in 1.31 format */
fract = (x & 0x000FFFFF) << 11;
/* Read two nearest output values from the index in 1.31(q31) format */
y0 = pYData[index];
y1 = pYData[index + 1u];
/* Calculation of y0 * (1-fract) and y is in 2.30 format */
y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
/* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
y += ((q31_t) (((q63_t) y1 * fract) >> 32));
/* Convert y to 1.31 format */
return (y << 1u);
}
}
/**
*
* @brief Process function for the Q15 Linear Interpolation Function.
* @param[in] *pYData pointer to Q15 Linear Interpolation table
* @param[in] x input sample to process
* @param[in] nValues number of table values
* @return y processed output sample.
*
* \par
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
* This function can support maximum of table size 2^12.
*
*/
static __INLINE q15_t arm_linear_interp_q15(q15_t *pYData, q31_t x, uint32_t nValues)
{
q63_t y; /* output */
q15_t y0, y1; /* Nearest output values */
q31_t fract; /* fractional part */
int32_t index; /* Index to read nearest output values */
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
index = ((x & 0xFFF00000) >> 20u);
if(index >= (nValues - 1))
{
return(pYData[nValues - 1]);
}
else if(index < 0)
{
return(pYData[0]);
}
else
{
/* 20 bits for the fractional part */
/* fract is in 12.20 format */
fract = (x & 0x000FFFFF);
/* Read two nearest output values from the index */
y0 = pYData[index];
y1 = pYData[index + 1u];
/* Calculation of y0 * (1-fract) and y is in 13.35 format */
y = ((q63_t) y0 * (0xFFFFF - fract));
/* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
y += ((q63_t) y1 * (fract));
/* convert y to 1.15 format */
return (y >> 20);
}
}
/**
*
* @brief Process function for the Q7 Linear Interpolation Function.
* @param[in] *pYData pointer to Q7 Linear Interpolation table
* @param[in] x input sample to process
* @param[in] nValues number of table values
* @return y processed output sample.
*
* \par
* Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
* This function can support maximum of table size 2^12.
*/
static __INLINE q7_t arm_linear_interp_q7(q7_t *pYData, q31_t x, uint32_t nValues)
{
q31_t y; /* output */
q7_t y0, y1; /* Nearest output values */
q31_t fract; /* fractional part */
int32_t index; /* Index to read nearest output values */
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
index = ((x & 0xFFF00000) >> 20u);
if(index >= (nValues - 1))
{
return(pYData[nValues - 1]);
}
else if(index < 0)
{
return(pYData[0]);
}
else
{
/* 20 bits for the fractional part */
/* fract is in 12.20 format */
fract = (x & 0x000FFFFF);
/* Read two nearest output values from the index and are in 1.7(q7) format */
y0 = pYData[index];
y1 = pYData[index + 1u];
/* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
y = ((y0 * (0xFFFFF - fract)));
/* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
y += (y1 * fract);
/* convert y to 1.7(q7) format */
return (y >> 20u);
}
}
/**
* @} end of LinearInterpolate group
*/
/**
* @brief Fast approximation to the trigonometric sine function for floating-point data.
* @param[in] x input value in radians.
* @return sin(x).
*/
float32_t arm_sin_f32(
float32_t x);
/**
* @brief Fast approximation to the trigonometric sine function for Q31 data.
* @param[in] x Scaled input value in radians.
* @return sin(x).
*/
q31_t arm_sin_q31(
q31_t x);
/**
* @brief Fast approximation to the trigonometric sine function for Q15 data.
* @param[in] x Scaled input value in radians.
* @return sin(x).
*/
q15_t arm_sin_q15(
q15_t x);
/**
* @brief Fast approximation to the trigonometric cosine function for floating-point data.
* @param[in] x input value in radians.
* @return cos(x).
*/
float32_t arm_cos_f32(
float32_t x);
/**
* @brief Fast approximation to the trigonometric cosine function for Q31 data.
* @param[in] x Scaled input value in radians.
* @return cos(x).
*/
q31_t arm_cos_q31(
q31_t x);
/**
* @brief Fast approximation to the trigonometric cosine function for Q15 data.
* @param[in] x Scaled input value in radians.
* @return cos(x).
*/
q15_t arm_cos_q15(
q15_t x);
/**
* @ingroup groupFastMath
*/
/**
* @defgroup SQRT Square Root
*
* Computes the square root of a number.
* There are separate functions for Q15, Q31, and floating-point data types.
* The square root function is computed using the Newton-Raphson algorithm.
* This is an iterative algorithm of the form:
* <pre>
* x1 = x0 - f(x0)/f'(x0)
* </pre>
* where <code>x1</code> is the current estimate,
* <code>x0</code> is the previous estimate and
* <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
* For the square root function, the algorithm reduces to:
* <pre>
* x0 = in/2 [initial guess]
* x1 = 1/2 * ( x0 + in / x0) [each iteration]
* </pre>
*/
/**
* @addtogroup SQRT
* @{
*/
/**
* @brief Floating-point square root function.
* @param[in] in input value.
* @param[out] *pOut square root of input value.
* @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
* <code>in</code> is negative value and returns zero output for negative values.
*/
static __INLINE arm_status arm_sqrt_f32(
float32_t in, float32_t *pOut)
{
if(in > 0)
{
// #if __FPU_USED
#if (__FPU_USED == 1) && defined ( __CC_ARM )
*pOut = __sqrtf(in);
#else
*pOut = sqrtf(in);
#endif
return (ARM_MATH_SUCCESS);
}
else
{
*pOut = 0.0f;
return (ARM_MATH_ARGUMENT_ERROR);
}
}
/**
* @brief Q31 square root function.
* @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
* @param[out] *pOut square root of input value.
* @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
* <code>in</code> is negative value and returns zero output for negative values.
*/
arm_status arm_sqrt_q31(
q31_t in, q31_t *pOut);
/**
* @brief Q15 square root function.
* @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
* @param[out] *pOut square root of input value.
* @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
* <code>in</code> is negative value and returns zero output for negative values.
*/
arm_status arm_sqrt_q15(
q15_t in, q15_t *pOut);
/**
* @} end of SQRT group
*/
/**
* @brief floating-point Circular write function.
*/
static __INLINE void arm_circularWrite_f32(
int32_t * circBuffer,
int32_t L,
uint16_t * writeOffset,
int32_t bufferInc,
const int32_t * src,
int32_t srcInc,
uint32_t blockSize)
{
uint32_t i = 0u;
int32_t wOffset;
/* Copy the value of Index pointer that points
* to the current location where the input samples to be copied */
wOffset = *writeOffset;
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
{
/* copy the input sample to the circular buffer */
circBuffer[wOffset] = *src;
/* Update the input pointer */
src += srcInc;
/* Circularly update wOffset. Watch out for positive and negative value */
wOffset += bufferInc;
if(wOffset >= L)
wOffset -= L;
/* Decrement the loop counter */
i--;
}
/* Update the index pointer */
*writeOffset = wOffset;
}
/**
* @brief floating-point Circular Read function.
*/
static __INLINE void arm_circularRead_f32(
int32_t * circBuffer,
int32_t L,
int32_t * readOffset,
int32_t bufferInc,
int32_t * dst,
int32_t * dst_base,
int32_t dst_length,
int32_t dstInc,
uint32_t blockSize)
{
uint32_t i = 0u;
int32_t rOffset, dst_end;
/* Copy the value of Index pointer that points
* to the current location from where the input samples to be read */
rOffset = *readOffset;
dst_end = (int32_t) (dst_base + dst_length);
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
{
/* copy the sample from the circular buffer to the destination buffer */
*dst = circBuffer[rOffset];
/* Update the input pointer */
dst += dstInc;
if(dst == (int32_t *) dst_end)
{
dst = dst_base;
}
/* Circularly update rOffset. Watch out for positive and negative value */
rOffset += bufferInc;
if(rOffset >= L)
{
rOffset -= L;
}
/* Decrement the loop counter */
i--;
}
/* Update the index pointer */
*readOffset = rOffset;
}
/**
* @brief Q15 Circular write function.
*/
static __INLINE void arm_circularWrite_q15(
q15_t * circBuffer,
int32_t L,
uint16_t * writeOffset,
int32_t bufferInc,
const q15_t * src,
int32_t srcInc,
uint32_t blockSize)
{
uint32_t i = 0u;
int32_t wOffset;
/* Copy the value of Index pointer that points
* to the current location where the input samples to be copied */
wOffset = *writeOffset;
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
{
/* copy the input sample to the circular buffer */
circBuffer[wOffset] = *src;
/* Update the input pointer */
src += srcInc;
/* Circularly update wOffset. Watch out for positive and negative value */
wOffset += bufferInc;
if(wOffset >= L)
wOffset -= L;
/* Decrement the loop counter */
i--;
}
/* Update the index pointer */
*writeOffset = wOffset;
}
/**
* @brief Q15 Circular Read function.
*/
static __INLINE void arm_circularRead_q15(
q15_t * circBuffer,
int32_t L,
int32_t * readOffset,
int32_t bufferInc,
q15_t * dst,
q15_t * dst_base,
int32_t dst_length,
int32_t dstInc,
uint32_t blockSize)
{
uint32_t i = 0;
int32_t rOffset, dst_end;
/* Copy the value of Index pointer that points
* to the current location from where the input samples to be read */
rOffset = *readOffset;
dst_end = (int32_t) (dst_base + dst_length);
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
{
/* copy the sample from the circular buffer to the destination buffer */
*dst = circBuffer[rOffset];
/* Update the input pointer */
dst += dstInc;
if(dst == (q15_t *) dst_end)
{
dst = dst_base;
}
/* Circularly update wOffset. Watch out for positive and negative value */
rOffset += bufferInc;
if(rOffset >= L)
{
rOffset -= L;
}
/* Decrement the loop counter */
i--;
}
/* Update the index pointer */
*readOffset = rOffset;
}
/**
* @brief Q7 Circular write function.
*/
static __INLINE void arm_circularWrite_q7(
q7_t * circBuffer,
int32_t L,
uint16_t * writeOffset,
int32_t bufferInc,
const q7_t * src,
int32_t srcInc,
uint32_t blockSize)
{
uint32_t i = 0u;
int32_t wOffset;
/* Copy the value of Index pointer that points
* to the current location where the input samples to be copied */
wOffset = *writeOffset;
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
{
/* copy the input sample to the circular buffer */
circBuffer[wOffset] = *src;
/* Update the input pointer */
src += srcInc;
/* Circularly update wOffset. Watch out for positive and negative value */
wOffset += bufferInc;
if(wOffset >= L)
wOffset -= L;
/* Decrement the loop counter */
i--;
}
/* Update the index pointer */
*writeOffset = wOffset;
}
/**
* @brief Q7 Circular Read function.
*/
static __INLINE void arm_circularRead_q7(
q7_t * circBuffer,
int32_t L,
int32_t * readOffset,
int32_t bufferInc,
q7_t * dst,
q7_t * dst_base,
int32_t dst_length,
int32_t dstInc,
uint32_t blockSize)
{
uint32_t i = 0;
int32_t rOffset, dst_end;
/* Copy the value of Index pointer that points
* to the current location from where the input samples to be read */
rOffset = *readOffset;
dst_end = (int32_t) (dst_base + dst_length);
/* Loop over the blockSize */
i = blockSize;
while(i > 0u)
{
/* copy the sample from the circular buffer to the destination buffer */
*dst = circBuffer[rOffset];
/* Update the input pointer */
dst += dstInc;
if(dst == (q7_t *) dst_end)
{
dst = dst_base;
}
/* Circularly update rOffset. Watch out for positive and negative value */
rOffset += bufferInc;
if(rOffset >= L)
{
rOffset -= L;
}
/* Decrement the loop counter */
i--;
}
/* Update the index pointer */
*readOffset = rOffset;
}
/**
* @brief Sum of the squares of the elements of a Q31 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_power_q31(
q31_t * pSrc,
uint32_t blockSize,
q63_t * pResult);
/**
* @brief Sum of the squares of the elements of a floating-point vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_power_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult);
/**
* @brief Sum of the squares of the elements of a Q15 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_power_q15(
q15_t * pSrc,
uint32_t blockSize,
q63_t * pResult);
/**
* @brief Sum of the squares of the elements of a Q7 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_power_q7(
q7_t * pSrc,
uint32_t blockSize,
q31_t * pResult);
/**
* @brief Mean value of a Q7 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_mean_q7(
q7_t * pSrc,
uint32_t blockSize,
q7_t * pResult);
/**
* @brief Mean value of a Q15 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_mean_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult);
/**
* @brief Mean value of a Q31 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_mean_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult);
/**
* @brief Mean value of a floating-point vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_mean_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult);
/**
* @brief Variance of the elements of a floating-point vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_var_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult);
/**
* @brief Variance of the elements of a Q31 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_var_q31(
q31_t * pSrc,
uint32_t blockSize,
q63_t * pResult);
/**
* @brief Variance of the elements of a Q15 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_var_q15(
q15_t * pSrc,
uint32_t blockSize,
q31_t * pResult);
/**
* @brief Root Mean Square of the elements of a floating-point vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_rms_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult);
/**
* @brief Root Mean Square of the elements of a Q31 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_rms_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult);
/**
* @brief Root Mean Square of the elements of a Q15 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_rms_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult);
/**
* @brief Standard deviation of the elements of a floating-point vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_std_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult);
/**
* @brief Standard deviation of the elements of a Q31 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_std_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult);
/**
* @brief Standard deviation of the elements of a Q15 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output value.
* @return none.
*/
void arm_std_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult);
/**
* @brief Floating-point complex magnitude
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t numSamples);
/**
* @brief Q31 complex magnitude
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t numSamples);
/**
* @brief Q15 complex magnitude
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t numSamples);
/**
* @brief Q15 complex dot product
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] numSamples number of complex samples in each vector
* @param[out] *realResult real part of the result returned here
* @param[out] *imagResult imaginary part of the result returned here
* @return none.
*/
void arm_cmplx_dot_prod_q15(
q15_t * pSrcA,
q15_t * pSrcB,
uint32_t numSamples,
q31_t * realResult,
q31_t * imagResult);
/**
* @brief Q31 complex dot product
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] numSamples number of complex samples in each vector
* @param[out] *realResult real part of the result returned here
* @param[out] *imagResult imaginary part of the result returned here
* @return none.
*/
void arm_cmplx_dot_prod_q31(
q31_t * pSrcA,
q31_t * pSrcB,
uint32_t numSamples,
q63_t * realResult,
q63_t * imagResult);
/**
* @brief Floating-point complex dot product
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] numSamples number of complex samples in each vector
* @param[out] *realResult real part of the result returned here
* @param[out] *imagResult imaginary part of the result returned here
* @return none.
*/
void arm_cmplx_dot_prod_f32(
float32_t * pSrcA,
float32_t * pSrcB,
uint32_t numSamples,
float32_t * realResult,
float32_t * imagResult);
/**
* @brief Q15 complex-by-real multiplication
* @param[in] *pSrcCmplx points to the complex input vector
* @param[in] *pSrcReal points to the real input vector
* @param[out] *pCmplxDst points to the complex output vector
* @param[in] numSamples number of samples in each vector
* @return none.
*/
void arm_cmplx_mult_real_q15(
q15_t * pSrcCmplx,
q15_t * pSrcReal,
q15_t * pCmplxDst,
uint32_t numSamples);
/**
* @brief Q31 complex-by-real multiplication
* @param[in] *pSrcCmplx points to the complex input vector
* @param[in] *pSrcReal points to the real input vector
* @param[out] *pCmplxDst points to the complex output vector
* @param[in] numSamples number of samples in each vector
* @return none.
*/
void arm_cmplx_mult_real_q31(
q31_t * pSrcCmplx,
q31_t * pSrcReal,
q31_t * pCmplxDst,
uint32_t numSamples);
/**
* @brief Floating-point complex-by-real multiplication
* @param[in] *pSrcCmplx points to the complex input vector
* @param[in] *pSrcReal points to the real input vector
* @param[out] *pCmplxDst points to the complex output vector
* @param[in] numSamples number of samples in each vector
* @return none.
*/
void arm_cmplx_mult_real_f32(
float32_t * pSrcCmplx,
float32_t * pSrcReal,
float32_t * pCmplxDst,
uint32_t numSamples);
/**
* @brief Minimum value of a Q7 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *result is output pointer
* @param[in] index is the array index of the minimum value in the input buffer.
* @return none.
*/
void arm_min_q7(
q7_t * pSrc,
uint32_t blockSize,
q7_t * result,
uint32_t * index);
/**
* @brief Minimum value of a Q15 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output pointer
* @param[in] *pIndex is the array index of the minimum value in the input buffer.
* @return none.
*/
void arm_min_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult,
uint32_t * pIndex);
/**
* @brief Minimum value of a Q31 vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output pointer
* @param[out] *pIndex is the array index of the minimum value in the input buffer.
* @return none.
*/
void arm_min_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult,
uint32_t * pIndex);
/**
* @brief Minimum value of a floating-point vector.
* @param[in] *pSrc is input pointer
* @param[in] blockSize is the number of samples to process
* @param[out] *pResult is output pointer
* @param[out] *pIndex is the array index of the minimum value in the input buffer.
* @return none.
*/
void arm_min_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult,
uint32_t * pIndex);
/**
* @brief Maximum value of a Q7 vector.
* @param[in] *pSrc points to the input buffer
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_q7(
q7_t * pSrc,
uint32_t blockSize,
q7_t * pResult,
uint32_t * pIndex);
/**
* @brief Maximum value of a Q15 vector.
* @param[in] *pSrc points to the input buffer
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult,
uint32_t * pIndex);
/**
* @brief Maximum value of a Q31 vector.
* @param[in] *pSrc points to the input buffer
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult,
uint32_t * pIndex);
/**
* @brief Maximum value of a floating-point vector.
* @param[in] *pSrc points to the input buffer
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult,
uint32_t * pIndex);
/**
* @brief Q15 complex-by-complex multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_mult_cmplx_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t numSamples);
/**
* @brief Q31 complex-by-complex multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_mult_cmplx_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t numSamples);
/**
* @brief Floating-point complex-by-complex multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_mult_cmplx_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t numSamples);
/**
* @brief Converts the elements of the floating-point vector to Q31 vector.
* @param[in] *pSrc points to the floating-point input vector
* @param[out] *pDst points to the Q31 output vector
* @param[in] blockSize length of the input vector
* @return none.
*/
void arm_float_to_q31(
float32_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the floating-point vector to Q15 vector.
* @param[in] *pSrc points to the floating-point input vector
* @param[out] *pDst points to the Q15 output vector
* @param[in] blockSize length of the input vector
* @return none
*/
void arm_float_to_q15(
float32_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the floating-point vector to Q7 vector.
* @param[in] *pSrc points to the floating-point input vector
* @param[out] *pDst points to the Q7 output vector
* @param[in] blockSize length of the input vector
* @return none
*/
void arm_float_to_q7(
float32_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the Q31 vector to Q15 vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q31_to_q15(
q31_t * pSrc,
q15_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the Q31 vector to Q7 vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q31_to_q7(
q31_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the Q15 vector to floating-point vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q15_to_float(
q15_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the Q15 vector to Q31 vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q15_to_q31(
q15_t * pSrc,
q31_t * pDst,
uint32_t blockSize);
/**
* @brief Converts the elements of the Q15 vector to Q7 vector.
* @param[in] *pSrc is input pointer
* @param[out] *pDst is output pointer
* @param[in] blockSize is the number of samples to process
* @return none.
*/
void arm_q15_to_q7(
q15_t * pSrc,
q7_t * pDst,
uint32_t blockSize);
/**
* @ingroup groupInterpolation
*/
/**
* @defgroup BilinearInterpolate Bilinear Interpolation
*
* Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
* The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
* determines values between the grid points.
* Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
* Bilinear interpolation is often used in image processing to rescale images.
* The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
*
* <b>Algorithm</b>
* \par
* The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
* For floating-point, the instance structure is defined as:
* <pre>
* typedef struct
* {
* uint16_t numRows;
* uint16_t numCols;
* float32_t *pData;
* } arm_bilinear_interp_instance_f32;
* </pre>
*
* \par
* where <code>numRows</code> specifies the number of rows in the table;
* <code>numCols</code> specifies the number of columns in the table;
* and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
* The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
* That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
*
* \par
* Let <code>(x, y)</code> specify the desired interpolation point. Then define:
* <pre>
* XF = floor(x)
* YF = floor(y)
* </pre>
* \par
* The interpolated output point is computed as:
* <pre>
* f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
* + f(XF+1, YF) * (x-XF)*(1-(y-YF))
* + f(XF, YF+1) * (1-(x-XF))*(y-YF)
* + f(XF+1, YF+1) * (x-XF)*(y-YF)
* </pre>
* Note that the coordinates (x, y) contain integer and fractional components.
* The integer components specify which portion of the table to use while the
* fractional components control the interpolation processor.
*
* \par
* if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
*/
/**
* @addtogroup BilinearInterpolate
* @{
*/
/**
*
* @brief Floating-point bilinear interpolation.
* @param[in,out] *S points to an instance of the interpolation structure.
* @param[in] X interpolation coordinate.
* @param[in] Y interpolation coordinate.
* @return out interpolated value.
*/
static __INLINE float32_t arm_bilinear_interp_f32(
const arm_bilinear_interp_instance_f32 * S,
float32_t X,
float32_t Y)
{
float32_t out;
float32_t f00, f01, f10, f11;
float32_t *pData = S->pData;
int32_t xIndex, yIndex, index;
float32_t xdiff, ydiff;
float32_t b1, b2, b3, b4;
xIndex = (int32_t) X;
yIndex = (int32_t) Y;
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(xIndex < 0 || xIndex > (S->numRows-1) || yIndex < 0 || yIndex > ( S->numCols-1))
{
return(0);
}
/* Calculation of index for two nearest points in X-direction */
index = (xIndex - 1) + (yIndex-1) * S->numCols ;
/* Read two nearest points in X-direction */
f00 = pData[index];
f01 = pData[index + 1];
/* Calculation of index for two nearest points in Y-direction */
index = (xIndex-1) + (yIndex) * S->numCols;
/* Read two nearest points in Y-direction */
f10 = pData[index];
f11 = pData[index + 1];
/* Calculation of intermediate values */
b1 = f00;
b2 = f01 - f00;
b3 = f10 - f00;
b4 = f00 - f01 - f10 + f11;
/* Calculation of fractional part in X */
xdiff = X - xIndex;
/* Calculation of fractional part in Y */
ydiff = Y - yIndex;
/* Calculation of bi-linear interpolated output */
out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
/* return to application */
return (out);
}
/**
*
* @brief Q31 bilinear interpolation.
* @param[in,out] *S points to an instance of the interpolation structure.
* @param[in] X interpolation coordinate in 12.20 format.
* @param[in] Y interpolation coordinate in 12.20 format.
* @return out interpolated value.
*/
static __INLINE q31_t arm_bilinear_interp_q31(
arm_bilinear_interp_instance_q31 * S,
q31_t X,
q31_t Y)
{
q31_t out; /* Temporary output */
q31_t acc = 0; /* output */
q31_t xfract, yfract; /* X, Y fractional parts */
q31_t x1, x2, y1, y2; /* Nearest output values */
int32_t rI, cI; /* Row and column indices */
q31_t *pYData = S->pData; /* pointer to output table values */
uint32_t nCols = S->numCols; /* num of rows */
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
rI = ((X & 0xFFF00000) >> 20u);
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
cI = ((Y & 0xFFF00000) >> 20u);
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(rI < 0 || rI > (S->numRows-1) || cI < 0 || cI > ( S->numCols-1))
{
return(0);
}
/* 20 bits for the fractional part */
/* shift left xfract by 11 to keep 1.31 format */
xfract = (X & 0x000FFFFF) << 11u;
/* Read two nearest output values from the index */
x1 = pYData[(rI) + nCols * (cI)];
x2 = pYData[(rI) + nCols * (cI) + 1u];
/* 20 bits for the fractional part */
/* shift left yfract by 11 to keep 1.31 format */
yfract = (Y & 0x000FFFFF) << 11u;
/* Read two nearest output values from the index */
y1 = pYData[(rI) + nCols * (cI + 1)];
y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
/* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
/* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */
out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
/* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */
out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
/* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */
out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
/* Convert acc to 1.31(q31) format */
return (acc << 2u);
}
/**
* @brief Q15 bilinear interpolation.
* @param[in,out] *S points to an instance of the interpolation structure.
* @param[in] X interpolation coordinate in 12.20 format.
* @param[in] Y interpolation coordinate in 12.20 format.
* @return out interpolated value.
*/
static __INLINE q15_t arm_bilinear_interp_q15(
arm_bilinear_interp_instance_q15 * S,
q31_t X,
q31_t Y)
{
q63_t acc = 0; /* output */
q31_t out; /* Temporary output */
q15_t x1, x2, y1, y2; /* Nearest output values */
q31_t xfract, yfract; /* X, Y fractional parts */
int32_t rI, cI; /* Row and column indices */
q15_t *pYData = S->pData; /* pointer to output table values */
uint32_t nCols = S->numCols; /* num of rows */
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
rI = ((X & 0xFFF00000) >> 20);
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
cI = ((Y & 0xFFF00000) >> 20);
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(rI < 0 || rI > (S->numRows-1) || cI < 0 || cI > ( S->numCols-1))
{
return(0);
}
/* 20 bits for the fractional part */
/* xfract should be in 12.20 format */
xfract = (X & 0x000FFFFF);
/* Read two nearest output values from the index */
x1 = pYData[(rI) + nCols * (cI)];
x2 = pYData[(rI) + nCols * (cI) + 1u];
/* 20 bits for the fractional part */
/* yfract should be in 12.20 format */
yfract = (Y & 0x000FFFFF);
/* Read two nearest output values from the index */
y1 = pYData[(rI) + nCols * (cI + 1)];
y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
/* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
/* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
/* convert 13.35 to 13.31 by right shifting and out is in 1.31 */
out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
acc = ((q63_t) out * (0xFFFFF - yfract));
/* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */
out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
acc += ((q63_t) out * (xfract));
/* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */
out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
acc += ((q63_t) out * (yfract));
/* y2 * (xfract) * (yfract) in 1.51 and adding to acc */
out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
acc += ((q63_t) out * (yfract));
/* acc is in 13.51 format and down shift acc by 36 times */
/* Convert out to 1.15 format */
return (acc >> 36);
}
/**
* @brief Q7 bilinear interpolation.
* @param[in,out] *S points to an instance of the interpolation structure.
* @param[in] X interpolation coordinate in 12.20 format.
* @param[in] Y interpolation coordinate in 12.20 format.
* @return out interpolated value.
*/
static __INLINE q7_t arm_bilinear_interp_q7(
arm_bilinear_interp_instance_q7 * S,
q31_t X,
q31_t Y)
{
q63_t acc = 0; /* output */
q31_t out; /* Temporary output */
q31_t xfract, yfract; /* X, Y fractional parts */
q7_t x1, x2, y1, y2; /* Nearest output values */
int32_t rI, cI; /* Row and column indices */
q7_t *pYData = S->pData; /* pointer to output table values */
uint32_t nCols = S->numCols; /* num of rows */
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
rI = ((X & 0xFFF00000) >> 20);
/* Input is in 12.20 format */
/* 12 bits for the table index */
/* Index value calculation */
cI = ((Y & 0xFFF00000) >> 20);
/* Care taken for table outside boundary */
/* Returns zero output when values are outside table boundary */
if(rI < 0 || rI > (S->numRows-1) || cI < 0 || cI > ( S->numCols-1))
{
return(0);
}
/* 20 bits for the fractional part */
/* xfract should be in 12.20 format */
xfract = (X & 0x000FFFFF);
/* Read two nearest output values from the index */
x1 = pYData[(rI) + nCols * (cI)];
x2 = pYData[(rI) + nCols * (cI) + 1u];
/* 20 bits for the fractional part */
/* yfract should be in 12.20 format */
yfract = (Y & 0x000FFFFF);
/* Read two nearest output values from the index */
y1 = pYData[(rI) + nCols * (cI + 1)];
y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
/* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
out = ((x1 * (0xFFFFF - xfract)));
acc = (((q63_t) out * (0xFFFFF - yfract)));
/* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */
out = ((x2 * (0xFFFFF - yfract)));
acc += (((q63_t) out * (xfract)));
/* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */
out = ((y1 * (0xFFFFF - xfract)));
acc += (((q63_t) out * (yfract)));
/* y2 * (xfract) * (yfract) in 2.22 and adding to acc */
out = ((y2 * (yfract)));
acc += (((q63_t) out * (xfract)));
/* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
return (acc >> 40);
}
/**
* @} end of BilinearInterpolate group
*/
#ifdef __cplusplus
}
#endif
#endif /* _ARM_MATH_H */
/**
*
* End of file.
*/
| 233,275
|
C++
|
.h
| 5,925
| 34.503629
| 181
| 0.633677
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,389
|
core_cm4_simd.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/core_cm4_simd.h
|
/**************************************************************************//**
* @file core_cm4_simd.h
* @brief CMSIS Cortex-M4 SIMD Header File
* @version V2.10
* @date 19. July 2011
*
* @note
* Copyright (C) 2010-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __CORE_CM4_SIMD_H
#define __CORE_CM4_SIMD_H
/*******************************************************************************
* Hardware Abstraction Layer
******************************************************************************/
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
/*------ CM4 SOMD Intrinsics -----------------------------------------------------*/
#define __SADD8 __sadd8
#define __QADD8 __qadd8
#define __SHADD8 __shadd8
#define __UADD8 __uadd8
#define __UQADD8 __uqadd8
#define __UHADD8 __uhadd8
#define __SSUB8 __ssub8
#define __QSUB8 __qsub8
#define __SHSUB8 __shsub8
#define __USUB8 __usub8
#define __UQSUB8 __uqsub8
#define __UHSUB8 __uhsub8
#define __SADD16 __sadd16
#define __QADD16 __qadd16
#define __SHADD16 __shadd16
#define __UADD16 __uadd16
#define __UQADD16 __uqadd16
#define __UHADD16 __uhadd16
#define __SSUB16 __ssub16
#define __QSUB16 __qsub16
#define __SHSUB16 __shsub16
#define __USUB16 __usub16
#define __UQSUB16 __uqsub16
#define __UHSUB16 __uhsub16
#define __SASX __sasx
#define __QASX __qasx
#define __SHASX __shasx
#define __UASX __uasx
#define __UQASX __uqasx
#define __UHASX __uhasx
#define __SSAX __ssax
#define __QSAX __qsax
#define __SHSAX __shsax
#define __USAX __usax
#define __UQSAX __uqsax
#define __UHSAX __uhsax
#define __USAD8 __usad8
#define __USADA8 __usada8
#define __SSAT16 __ssat16
#define __USAT16 __usat16
#define __UXTB16 __uxtb16
#define __UXTAB16 __uxtab16
#define __SXTB16 __sxtb16
#define __SXTAB16 __sxtab16
#define __SMUAD __smuad
#define __SMUADX __smuadx
#define __SMLAD __smlad
#define __SMLADX __smladx
#define __SMLALD __smlald
#define __SMLALDX __smlaldx
#define __SMUSD __smusd
#define __SMUSDX __smusdx
#define __SMLSD __smlsd
#define __SMLSDX __smlsdx
#define __SMLSLD __smlsld
#define __SMLSLDX __smlsldx
#define __SEL __sel
#define __QADD __qadd
#define __QSUB __qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#include <cmsis_iar.h>
/*------ CM4 SIMDDSP Intrinsics -----------------------------------------------------*/
/* intrinsic __SADD8 see intrinsics.h */
/* intrinsic __QADD8 see intrinsics.h */
/* intrinsic __SHADD8 see intrinsics.h */
/* intrinsic __UADD8 see intrinsics.h */
/* intrinsic __UQADD8 see intrinsics.h */
/* intrinsic __UHADD8 see intrinsics.h */
/* intrinsic __SSUB8 see intrinsics.h */
/* intrinsic __QSUB8 see intrinsics.h */
/* intrinsic __SHSUB8 see intrinsics.h */
/* intrinsic __USUB8 see intrinsics.h */
/* intrinsic __UQSUB8 see intrinsics.h */
/* intrinsic __UHSUB8 see intrinsics.h */
/* intrinsic __SADD16 see intrinsics.h */
/* intrinsic __QADD16 see intrinsics.h */
/* intrinsic __SHADD16 see intrinsics.h */
/* intrinsic __UADD16 see intrinsics.h */
/* intrinsic __UQADD16 see intrinsics.h */
/* intrinsic __UHADD16 see intrinsics.h */
/* intrinsic __SSUB16 see intrinsics.h */
/* intrinsic __QSUB16 see intrinsics.h */
/* intrinsic __SHSUB16 see intrinsics.h */
/* intrinsic __USUB16 see intrinsics.h */
/* intrinsic __UQSUB16 see intrinsics.h */
/* intrinsic __UHSUB16 see intrinsics.h */
/* intrinsic __SASX see intrinsics.h */
/* intrinsic __QASX see intrinsics.h */
/* intrinsic __SHASX see intrinsics.h */
/* intrinsic __UASX see intrinsics.h */
/* intrinsic __UQASX see intrinsics.h */
/* intrinsic __UHASX see intrinsics.h */
/* intrinsic __SSAX see intrinsics.h */
/* intrinsic __QSAX see intrinsics.h */
/* intrinsic __SHSAX see intrinsics.h */
/* intrinsic __USAX see intrinsics.h */
/* intrinsic __UQSAX see intrinsics.h */
/* intrinsic __UHSAX see intrinsics.h */
/* intrinsic __USAD8 see intrinsics.h */
/* intrinsic __USADA8 see intrinsics.h */
/* intrinsic __SSAT16 see intrinsics.h */
/* intrinsic __USAT16 see intrinsics.h */
/* intrinsic __UXTB16 see intrinsics.h */
/* intrinsic __SXTB16 see intrinsics.h */
/* intrinsic __UXTAB16 see intrinsics.h */
/* intrinsic __SXTAB16 see intrinsics.h */
/* intrinsic __SMUAD see intrinsics.h */
/* intrinsic __SMUADX see intrinsics.h */
/* intrinsic __SMLAD see intrinsics.h */
/* intrinsic __SMLADX see intrinsics.h */
/* intrinsic __SMLALD see intrinsics.h */
/* intrinsic __SMLALDX see intrinsics.h */
/* intrinsic __SMUSD see intrinsics.h */
/* intrinsic __SMUSDX see intrinsics.h */
/* intrinsic __SMLSD see intrinsics.h */
/* intrinsic __SMLSDX see intrinsics.h */
/* intrinsic __SMLSLD see intrinsics.h */
/* intrinsic __SMLSLDX see intrinsics.h */
/* intrinsic __SEL see intrinsics.h */
/* intrinsic __QADD see intrinsics.h */
/* intrinsic __QSUB see intrinsics.h */
/* intrinsic __PKHBT see intrinsics.h */
/* intrinsic __PKHTB see intrinsics.h */
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
#define __SSAT16(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
#define __USAT16(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UXTB16(uint32_t op1)
{
uint32_t result;
__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SXTB16(uint32_t op1)
{
uint32_t result;
__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
#define __SMLALD(ARG1,ARG2,ARG3) \
({ \
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
})
#define __SMLALDX(ARG1,ARG2,ARG3) \
({ \
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
})
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
return(result);
}
#define __SMLSLD(ARG1,ARG2,ARG3) \
({ \
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
})
#define __SMLSLDX(ARG1,ARG2,ARG3) \
({ \
uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
(uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
})
__attribute__( ( always_inline ) ) static __INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
__attribute__( ( always_inline ) ) static __INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
{
uint32_t result;
__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
return(result);
}
#define __PKHBT(ARG1,ARG2,ARG3) \
({ \
uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
__ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
__RES; \
})
#define __PKHTB(ARG1,ARG2,ARG3) \
({ \
uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
if (ARG3 == 0) \
__ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
else \
__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
__RES; \
})
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
/* TASKING carm specific functions */
/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
/* not yet supported */
/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
#endif
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CORE_CM4_SIMD_H */
#ifdef __cplusplus
}
#endif
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.h
| 552
| 39.798913
| 149
| 0.528548
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
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| false
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24,390
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core_cm3.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/core_cm3.h
|
/**************************************************************************//**
* @file core_cm3.h
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File
* @version V2.11
* @date 08. September 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#endif
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __CORE_CM3_H_GENERIC
#define __CORE_CM3_H_GENERIC
/** \mainpage CMSIS Cortex-M3
This documentation describes the CMSIS Cortex-M Core Peripheral Access Layer.
It consists of:
- Cortex-M Core Register Definitions
- Cortex-M functions
- Cortex-M instructions
The CMSIS Cortex-M3 Core Peripheral Access Layer contains C and assembly functions that ease
access to the Cortex-M Core
*/
/** \defgroup CMSIS_MISRA_Exceptions CMSIS MISRA-C:2004 Compliance Exceptions
CMSIS violates following MISRA-C2004 Rules:
- Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.<br>
Function definitions in header files are used to allow 'inlining'.
- Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Unions are used for effective representation of core registers.
- Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.<br>
Function-like macros are used to allow more efficient code.
*/
/*******************************************************************************
* CMSIS definitions
******************************************************************************/
/** \defgroup CMSIS_core_definitions CMSIS Core Definitions
This file defines all structures and symbols for CMSIS core:
- CMSIS version number
- Cortex-M core
- Cortex-M core Revision Number
@{
*/
/* CMSIS CM3 definitions */
#define __CM3_CMSIS_VERSION_MAIN (0x02) /*!< [31:16] CMSIS HAL main version */
#define __CM3_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
#define __CORTEX_M (0x03) /*!< Cortex core */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
#define __FPU_USED 0 /*!< __FPU_USED to be checked prior to making use of FPU specific registers and functions */
#if defined ( __CC_ARM )
#if defined __TARGET_FPU_VFP
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __GNUC__ )
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __TASKING__ )
/* add preprocessor checks */
#endif
#include <stdint.h> /*!< standard types definitions */
#include "core_cmInstr.h" /*!< Core Instruction Access */
#include "core_cmFunc.h" /*!< Core Function Access */
#endif /* __CORE_CM3_H_GENERIC */
#ifndef __CMSIS_GENERIC
#ifndef __CORE_CM3_H_DEPENDANT
#define __CORE_CM3_H_DEPENDANT
/* check device defines and use defaults */
#if defined __CHECK_DEVICE_DEFINES
#ifndef __CM3_REV
#define __CM3_REV 0x0200
#warning "__CM3_REV not defined in device header file; using default!"
#endif
#ifndef __MPU_PRESENT
#define __MPU_PRESENT 0
#warning "__MPU_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 4
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
#ifndef __Vendor_SysTickConfig
#define __Vendor_SysTickConfig 0
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
#endif
#endif
/* IO definitions (access restrictions to peripheral registers) */
#ifdef __cplusplus
#define __I volatile /*!< defines 'read only' permissions */
#else
#define __I volatile const /*!< defines 'read only' permissions */
#endif
#define __O volatile /*!< defines 'write only' permissions */
#define __IO volatile /*!< defines 'read / write' permissions */
/*@} end of group CMSIS_core_definitions */
/*******************************************************************************
* Register Abstraction
******************************************************************************/
/** \defgroup CMSIS_core_register CMSIS Core Register
Core Register contain:
- Core Register
- Core NVIC Register
- Core SCB Register
- Core SysTick Register
- Core Debug Register
- Core MPU Register
*/
/** \ingroup CMSIS_core_register
\defgroup CMSIS_CORE CMSIS Core
Type definitions for the Cortex-M Core Registers
@{
*/
/** \brief Union type to access the Application Program Status Register (APSR).
*/
typedef union
{
struct
{
#if (__CORTEX_M != 0x04)
uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
#else
uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
#endif
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} APSR_Type;
/** \brief Union type to access the Interrupt Program Status Register (IPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} IPSR_Type;
/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
#if (__CORTEX_M != 0x04)
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
#else
uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
#endif
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} xPSR_Type;
/** \brief Union type to access the Control Registers (CONTROL).
*/
typedef union
{
struct
{
uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} CONTROL_Type;
/*@} end of group CMSIS_CORE */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_NVIC CMSIS NVIC
Type definitions for the Cortex-M NVIC Registers
@{
*/
/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
*/
typedef struct
{
__IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[24];
__IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
uint32_t RSERVED1[24];
__IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[24];
__IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
uint32_t RESERVED3[24];
__IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
uint32_t RESERVED4[56];
__IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
uint32_t RESERVED5[644];
__O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
} NVIC_Type;
/* Software Triggered Interrupt Register Definitions */
#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */
/*@} end of group CMSIS_NVIC */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SCB CMSIS SCB
Type definitions for the Cortex-M System Control Block Registers
@{
*/
/** \brief Structure type to access the System Control Block (SCB).
*/
typedef struct
{
__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
__IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
__IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
__IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
__IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
__IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
__IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
__IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
__IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
__IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
__IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
__I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
__I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
__I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
__I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
__I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
uint32_t RESERVED0[5];
__IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
} SCB_Type;
/* SCB CPUID Register Definitions */
#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
/* SCB Interrupt Control State Register Definitions */
#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
/* SCB Vector Table Offset Register Definitions */
#if (__CM3_REV < 0x0201) /* core r2p1 */
#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */
#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
#else
#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
#endif
/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */
/* SCB System Control Register Definitions */
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
/* SCB Configuration Control Register Definitions */
#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */
/* SCB System Handler Control and State Register Definitions */
#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */
/* SCB Configurable Fault Status Registers Definitions */
#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
/* SCB Hard Fault Status Registers Definitions */
#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
/* SCB Debug Fault Status Register Definitions */
#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */
/*@} end of group CMSIS_SCB */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SCnSCB CMSIS System Control and ID Register not in the SCB
Type definitions for the Cortex-M System Control and ID Register not in the SCB
@{
*/
/** \brief Structure type to access the System Control and ID Register not in the SCB.
*/
typedef struct
{
uint32_t RESERVED0[1];
__I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
__IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
#else
uint32_t RESERVED1[1];
#endif
} SCnSCB_Type;
/* Interrupt Controller Type Register Definitions */
#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos) /*!< ICTR: INTLINESNUM Mask */
/* Auxiliary Control Register Definitions */
#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1 /*!< ACTLR: DISDEFWBUF Position */
#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos) /*!< ACTLR: DISMCYCINT Mask */
/*@} end of group CMSIS_SCnotSCB */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SysTick CMSIS SysTick
Type definitions for the Cortex-M System Timer Registers
@{
*/
/** \brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_ITM CMSIS ITM
Type definitions for the Cortex-M Instrumentation Trace Macrocell (ITM)
@{
*/
/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
*/
typedef struct
{
__O union
{
__O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
__O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
__O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
} PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
uint32_t RESERVED0[864];
__IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
uint32_t RESERVED1[15];
__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
uint32_t RESERVED2[15];
__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
} ITM_Type;
/* ITM Trace Privilege Register Definitions */
#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */
/* ITM Trace Control Register Definitions */
#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
#define ITM_TCR_TXENA_Pos 3 /*!< ITM TCR: TXENA Position */
#define ITM_TCR_TXENA_Msk (1UL << ITM_TCR_TXENA_Pos) /*!< ITM TCR: TXENA Mask */
#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */
/*@}*/ /* end of group CMSIS_ITM */
#if (__MPU_PRESENT == 1)
/** \ingroup CMSIS_core_register
\defgroup CMSIS_MPU CMSIS MPU
Type definitions for the Cortex-M Memory Protection Unit (MPU)
@{
*/
/** \brief Structure type to access the Memory Protection Unit (MPU).
*/
typedef struct
{
__I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
__IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
__IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
__IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
__IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
__IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
__IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
__IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
__IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
__IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
} MPU_Type;
/* MPU Type Register */
#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
/* MPU Control Register */
#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
/* MPU Region Number Register */
#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
/* MPU Region Base Address Register */
#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
/* MPU Region Attribute and Size Register */
#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
/*@} end of group CMSIS_MPU */
#endif
/** \ingroup CMSIS_core_register
\defgroup CMSIS_CoreDebug CMSIS Core Debug
Type definitions for the Cortex-M Core Debug Registers
@{
*/
/** \brief Structure type to access the Core Debug Register (CoreDebug).
*/
typedef struct
{
__IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
__O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
__IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
__IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
} CoreDebug_Type;
/* Debug Halting Control and Status Register */
#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
/* Debug Core Register Selector Register */
#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */
/* Debug Exception and Monitor Control Register */
#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
/*@} end of group CMSIS_CoreDebug */
/** \ingroup CMSIS_core_register
@{
*/
/* Memory mapping of Cortex-M3 Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
#if (__MPU_PRESENT == 1)
#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
#endif
/*@} */
/*******************************************************************************
* Hardware Abstraction Layer
******************************************************************************/
/** \defgroup CMSIS_Core_FunctionInterface CMSIS Core Function Interface
Core Function Interface contains:
- Core NVIC Functions
- Core SysTick Functions
- Core Debug Functions
- Core Register Access Functions
*/
/* ########################## NVIC functions #################################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_NVICFunctions CMSIS Core NVIC Functions
@{
*/
/** \brief Set Priority Grouping
This function sets the priority grouping field using the required unlock sequence.
The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
Only values from 0..7 are used.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field
*/
static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
reg_value = SCB->AIRCR; /* read old register configuration */
reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
reg_value = (reg_value |
((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << 8)); /* Insert write key and priorty group */
SCB->AIRCR = reg_value;
}
/** \brief Get Priority Grouping
This function gets the priority grouping from NVIC Interrupt Controller.
Priority grouping is SCB->AIRCR [10:8] PRIGROUP field.
\return Priority grouping field
*/
static __INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */
}
/** \brief Enable External Interrupt
This function enables a device specific interrupt in the NVIC interrupt controller.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the external interrupt to enable
*/
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
}
/** \brief Disable External Interrupt
This function disables a device specific interrupt in the NVIC interrupt controller.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the external interrupt to disable
*/
static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
}
/** \brief Get Pending Interrupt
This function reads the pending register in the NVIC and returns the pending bit
for the specified interrupt.
\param [in] IRQn Number of the interrupt for get pending
\return 0 Interrupt status is not pending
\return 1 Interrupt status is pending
*/
static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
}
/** \brief Set Pending Interrupt
This function sets the pending bit for the specified interrupt.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the interrupt for set pending
*/
static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
}
/** \brief Clear Pending Interrupt
This function clears the pending bit for the specified interrupt.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the interrupt for clear pending
*/
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
}
/** \brief Get Active Interrupt
This function reads the active register in NVIC and returns the active bit.
\param [in] IRQn Number of the interrupt for get active
\return 0 Interrupt status is not active
\return 1 Interrupt status is active
*/
static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
{
return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
}
/** \brief Set Interrupt Priority
This function sets the priority for the specified interrupt. The interrupt
number can be positive to specify an external (device specific)
interrupt, or negative to specify an internal (core) interrupt.
Note: The priority cannot be set for every core interrupt.
\param [in] IRQn Number of the interrupt for set priority
\param [in] priority Priority to set
*/
static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if(IRQn < 0) {
SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */
else {
NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
}
/** \brief Get Interrupt Priority
This function reads the priority for the specified interrupt. The interrupt
number can be positive to specify an external (device specific)
interrupt, or negative to specify an internal (core) interrupt.
The returned priority value is automatically aligned to the implemented
priority bits of the microcontroller.
\param [in] IRQn Number of the interrupt for get priority
\return Interrupt Priority
*/
static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
{
if(IRQn < 0) {
return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M system interrupts */
else {
return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
}
/** \brief Encode Priority
This function encodes the priority for an interrupt with the given priority group,
preemptive priority value and sub priority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
The returned priority value can be used for NVIC_SetPriority(...) function
\param [in] PriorityGroup Used priority group
\param [in] PreemptPriority Preemptive priority value (starting from 0)
\param [in] SubPriority Sub priority value (starting from 0)
\return Encoded priority for the interrupt
*/
static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
return (
((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
((SubPriority & ((1 << (SubPriorityBits )) - 1)))
);
}
/** \brief Decode Priority
This function decodes an interrupt priority value with the given priority group to
preemptive priority value and sub priority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
The priority value can be retrieved with NVIC_GetPriority(...) function
\param [in] Priority Priority value
\param [in] PriorityGroup Used priority group
\param [out] pPreemptPriority Preemptive priority value (starting from 0)
\param [out] pSubPriority Sub priority value (starting from 0)
*/
static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
*pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
*pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
}
/** \brief System Reset
This function initiate a system reset request to reset the MCU.
*/
static __INLINE void NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
__DSB(); /* Ensure completion of memory access */
while(1); /* wait until reset */
}
/*@} end of CMSIS_Core_NVICFunctions */
/* ################################## SysTick function ############################################ */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_SysTickFunctions CMSIS Core SysTick Functions
@{
*/
#if (__Vendor_SysTickConfig == 0)
/** \brief System Tick Configuration
This function initialises the system tick timer and its interrupt and start the system tick timer.
Counter is in free running mode to generate periodical interrupts.
\param [in] ticks Number of ticks between two interrupts
\return 0 Function succeeded
\return 1 Function failed
*/
static __INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */
SysTick->VAL = 0; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0); /* Function successful */
}
#endif
/*@} end of CMSIS_Core_SysTickFunctions */
/* ##################################### Debug In/Output function ########################################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_core_DebugFunctions CMSIS Core Debug Functions
@{
*/
extern volatile int32_t ITM_RxBuffer; /*!< external variable to receive characters */
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */
/** \brief ITM Send Character
This function transmits a character via the ITM channel 0.
It just returns when no debugger is connected that has booked the output.
It is blocking when a debugger is connected, but the previous character send is not transmitted.
\param [in] ch Character to transmit
\return Character to transmit
*/
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */
(ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */
(ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */
{
while (ITM->PORT[0].u32 == 0);
ITM->PORT[0].u8 = (uint8_t) ch;
}
return (ch);
}
/** \brief ITM Receive Character
This function inputs a character via external variable ITM_RxBuffer.
It just returns when no debugger is connected that has booked the output.
It is blocking when a debugger is connected, but the previous character send is not transmitted.
\return Received character
\return -1 No character received
*/
static __INLINE int32_t ITM_ReceiveChar (void) {
int32_t ch = -1; /* no character available */
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
ch = ITM_RxBuffer;
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
}
return (ch);
}
/** \brief ITM Check Character
This function checks external variable ITM_RxBuffer whether a character is available or not.
It returns '1' if a character is available and '0' if no character is available.
\return 0 No character available
\return 1 Character available
*/
static __INLINE int32_t ITM_CheckChar (void) {
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
return (0); /* no character available */
} else {
return (1); /* character available */
}
}
/*@} end of CMSIS_core_DebugFunctions */
#endif /* __CORE_CM3_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */
#ifdef __cplusplus
}
#endif
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.h
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| 0.536221
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relativty/Relativty
| 6,445
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9/20/2024, 9:26:25 PM (Europe/Amsterdam)
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24,391
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core_cmInstr.h
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relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/core_cmInstr.h
|
/**************************************************************************//**
* @file core_cmInstr.h
* @brief CMSIS Cortex-M Core Instruction Access Header File
* @version V2.10
* @date 19. July 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
#if (__ARMCC_VERSION < 400677)
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
#endif
/** \brief No Operation
No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/** \brief Wait For Interrupt
Wait For Interrupt is a hint instruction that suspends execution
until one of a number of events occurs.
*/
#define __WFI __wfi
/** \brief Wait For Event
Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/** \brief Send Event
Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/** \brief Instruction Synchronization Barrier
Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or
memory, after the instruction has been completed.
*/
#define __ISB() __isb(0xF)
/** \brief Data Synchronization Barrier
This function acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() __dsb(0xF)
/** \brief Data Memory Barrier
This function ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() __dmb(0xF)
/** \brief Reverse byte order (32 bit)
This function reverses the byte order in integer value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/** \brief Reverse byte order (16 bit)
This function reverses the byte order in two unsigned short values.
\param [in] value Value to reverse
\return Reversed value
*/
static __INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
/** \brief Reverse byte order in signed short value
This function reverses the byte order in a signed short value with sign extension to integer.
\param [in] value Value to reverse
\return Reversed value
*/
static __INLINE __ASM int32_t __REVSH(int32_t value)
{
revsh r0, r0
bx lr
}
#if (__CORTEX_M >= 0x03)
/** \brief Reverse bit order of value
This function reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __RBIT __rbit
/** \brief LDR Exclusive (8 bit)
This function performs a exclusive LDR command for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
/** \brief LDR Exclusive (16 bit)
This function performs a exclusive LDR command for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
/** \brief LDR Exclusive (32 bit)
This function performs a exclusive LDR command for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
/** \brief STR Exclusive (8 bit)
This function performs a exclusive STR command for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXB(value, ptr) __strex(value, ptr)
/** \brief STR Exclusive (16 bit)
This function performs a exclusive STR command for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXH(value, ptr) __strex(value, ptr)
/** \brief STR Exclusive (32 bit)
This function performs a exclusive STR command for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXW(value, ptr) __strex(value, ptr)
/** \brief Remove the exclusive lock
This function removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/** \brief Signed Saturate
This function saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/** \brief Unsigned Saturate
This function saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/** \brief Count leading zeros
This function counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#endif /* (__CORTEX_M >= 0x03) */
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#include <cmsis_iar.h>
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/** \brief No Operation
No Operation does nothing. This instruction can be used for code alignment purposes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
{
__ASM volatile ("nop");
}
/** \brief Wait For Interrupt
Wait For Interrupt is a hint instruction that suspends execution
until one of a number of events occurs.
*/
__attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
{
__ASM volatile ("wfi");
}
/** \brief Wait For Event
Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
__attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
{
__ASM volatile ("wfe");
}
/** \brief Send Event
Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
__attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
{
__ASM volatile ("sev");
}
/** \brief Instruction Synchronization Barrier
Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or
memory, after the instruction has been completed.
*/
__attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
{
__ASM volatile ("isb");
}
/** \brief Data Synchronization Barrier
This function acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
{
__ASM volatile ("dsb");
}
/** \brief Data Memory Barrier
This function ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
__attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
{
__ASM volatile ("dmb");
}
/** \brief Reverse byte order (32 bit)
This function reverses the byte order in integer value.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
{
uint32_t result;
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/** \brief Reverse byte order (16 bit)
This function reverses the byte order in two unsigned short values.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
{
uint32_t result;
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/** \brief Reverse byte order in signed short value
This function reverses the byte order in a signed short value with sign extension to integer.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
{
uint32_t result;
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
#if (__CORTEX_M >= 0x03)
/** \brief Reverse bit order of value
This function reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/** \brief LDR Exclusive (8 bit)
This function performs a exclusive LDR command for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
{
uint8_t result;
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/** \brief LDR Exclusive (16 bit)
This function performs a exclusive LDR command for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
{
uint16_t result;
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/** \brief LDR Exclusive (32 bit)
This function performs a exclusive LDR command for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/** \brief STR Exclusive (8 bit)
This function performs a exclusive STR command for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
{
uint32_t result;
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/** \brief STR Exclusive (16 bit)
This function performs a exclusive STR command for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
{
uint32_t result;
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/** \brief STR Exclusive (32 bit)
This function performs a exclusive STR command for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/** \brief Remove the exclusive lock
This function removes the exclusive lock which is created by LDREX.
*/
__attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
{
__ASM volatile ("clrex");
}
/** \brief Signed Saturate
This function saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
/** \brief Unsigned Saturate
This function saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
/** \brief Count leading zeros
This function counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
__attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
{
uint8_t result;
__ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
#endif /* (__CORTEX_M >= 0x03) */
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
/* TASKING carm specific functions */
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#endif
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
#endif /* __CORE_CMINSTR_H */
| 15,523
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C++
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.h
| 398
| 35.718593
| 109
| 0.624631
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,392
|
core_cmFunc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/core_cmFunc.h
|
/**************************************************************************//**
* @file core_cmFunc.h
* @brief CMSIS Cortex-M Core Function Access Header File
* @version V2.10
* @date 26. July 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
#if (__ARMCC_VERSION < 400677)
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
#endif
/* intrinsic void __enable_irq(); */
/* intrinsic void __disable_irq(); */
/** \brief Get Control Register
This function returns the content of the Control Register.
\return Control Register value
*/
static __INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return(__regControl);
}
/** \brief Set Control Register
This function writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
static __INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/** \brief Get ISPR Register
This function returns the content of the ISPR Register.
\return ISPR Register value
*/
static __INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return(__regIPSR);
}
/** \brief Get APSR Register
This function returns the content of the APSR Register.
\return APSR Register value
*/
static __INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return(__regAPSR);
}
/** \brief Get xPSR Register
This function returns the content of the xPSR Register.
\return xPSR Register value
*/
static __INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return(__regXPSR);
}
/** \brief Get Process Stack Pointer
This function returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
static __INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return(__regProcessStackPointer);
}
/** \brief Set Process Stack Pointer
This function assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
static __INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/** \brief Get Main Stack Pointer
This function returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
static __INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return(__regMainStackPointer);
}
/** \brief Set Main Stack Pointer
This function assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
static __INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/** \brief Get Priority Mask
This function returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
static __INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return(__regPriMask);
}
/** \brief Set Priority Mask
This function assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
static __INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if (__CORTEX_M >= 0x03)
/** \brief Enable FIQ
This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/** \brief Disable FIQ
This function disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/** \brief Get Base Priority
This function returns the current value of the Base Priority register.
\return Base Priority register value
*/
static __INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return(__regBasePri);
}
/** \brief Set Base Priority
This function assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
static __INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xff);
}
/** \brief Get Fault Mask
This function returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
static __INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return(__regFaultMask);
}
/** \brief Set Fault Mask
This function assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
static __INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1);
}
#endif /* (__CORTEX_M >= 0x03) */
#if (__CORTEX_M == 0x04)
/** \brief Get FPSCR
This function returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
static __INLINE uint32_t __get_FPSCR(void)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
register uint32_t __regfpscr __ASM("fpscr");
return(__regfpscr);
#else
return(0);
#endif
}
/** \brief Set FPSCR
This function assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
static __INLINE void __set_FPSCR(uint32_t fpscr)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#endif
}
#endif /* (__CORTEX_M == 0x04) */
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#include <cmsis_iar.h>
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/** \brief Enable IRQ Interrupts
This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
{
__ASM volatile ("cpsie i");
}
/** \brief Disable IRQ Interrupts
This function disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i");
}
/** \brief Get Control Register
This function returns the content of the Control Register.
\return Control Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
/** \brief Set Control Register
This function writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) );
}
/** \brief Get ISPR Register
This function returns the content of the ISPR Register.
\return ISPR Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
/** \brief Get APSR Register
This function returns the content of the APSR Register.
\return APSR Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return(result);
}
/** \brief Get xPSR Register
This function returns the content of the xPSR Register.
\return xPSR Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return(result);
}
/** \brief Get Process Stack Pointer
This function returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
{
register uint32_t result;
__ASM volatile ("MRS %0, psp\n" : "=r" (result) );
return(result);
}
/** \brief Set Process Stack Pointer
This function assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
}
/** \brief Get Main Stack Pointer
This function returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
{
register uint32_t result;
__ASM volatile ("MRS %0, msp\n" : "=r" (result) );
return(result);
}
/** \brief Set Main Stack Pointer
This function assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
}
/** \brief Get Priority Mask
This function returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
/** \brief Set Priority Mask
This function assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
}
#if (__CORTEX_M >= 0x03)
/** \brief Enable FIQ
This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
{
__ASM volatile ("cpsie f");
}
/** \brief Disable FIQ
This function disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
{
__ASM volatile ("cpsid f");
}
/** \brief Get Base Priority
This function returns the current value of the Base Priority register.
\return Base Priority register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
return(result);
}
/** \brief Set Base Priority
This function assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
{
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
}
/** \brief Get Fault Mask
This function returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
/** \brief Set Fault Mask
This function assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
}
#endif /* (__CORTEX_M >= 0x03) */
#if (__CORTEX_M == 0x04)
/** \brief Get FPSCR
This function returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
uint32_t result;
__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
return(result);
#else
return(0);
#endif
}
/** \brief Set FPSCR
This function assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
#endif
}
#endif /* (__CORTEX_M == 0x04) */
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
/* TASKING carm specific functions */
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all instrinsics,
* Including the CMSIS ones.
*/
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CORE_CMFUNC_H */
| 15,082
|
C++
|
.h
| 422
| 32.976303
| 101
| 0.658324
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,393
|
core_cm0.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/core_cm0.h
|
/**************************************************************************//**
* @file core_cm0.h
* @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
* @version V2.10
* @date 19. July 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#endif
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __CORE_CM0_H_GENERIC
#define __CORE_CM0_H_GENERIC
/** \mainpage CMSIS Cortex-M0
This documentation describes the CMSIS Cortex-M Core Peripheral Access Layer.
It consists of:
- Cortex-M Core Register Definitions
- Cortex-M functions
- Cortex-M instructions
The CMSIS Cortex-M0 Core Peripheral Access Layer contains C and assembly functions that ease
access to the Cortex-M Core
*/
/** \defgroup CMSIS_MISRA_Exceptions CMSIS MISRA-C:2004 Compliance Exceptions
CMSIS violates following MISRA-C2004 Rules:
- Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.<br>
Function definitions in header files are used to allow 'inlining'.
- Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Unions are used for effective representation of core registers.
- Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.<br>
Function-like macros are used to allow more efficient code.
*/
/*******************************************************************************
* CMSIS definitions
******************************************************************************/
/** \defgroup CMSIS_core_definitions CMSIS Core Definitions
This file defines all structures and symbols for CMSIS core:
- CMSIS version number
- Cortex-M core
- Cortex-M core Revision Number
@{
*/
/* CMSIS CM0 definitions */
#define __CM0_CMSIS_VERSION_MAIN (0x02) /*!< [31:16] CMSIS HAL main version */
#define __CM0_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16) | __CM0_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
#define __CORTEX_M (0x00) /*!< Cortex core */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/*!< __FPU_USED to be checked prior to making use of FPU specific registers and functions */
#define __FPU_USED 0
#if defined ( __CC_ARM )
#if defined __TARGET_FPU_VFP
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __GNUC__ )
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __TASKING__ )
/* add preprocessor checks */
#endif
#include <stdint.h> /*!< standard types definitions */
#include "core_cmInstr.h" /*!< Core Instruction Access */
#include "core_cmFunc.h" /*!< Core Function Access */
#endif /* __CORE_CM0_H_GENERIC */
#ifndef __CMSIS_GENERIC
#ifndef __CORE_CM0_H_DEPENDANT
#define __CORE_CM0_H_DEPENDANT
/* check device defines and use defaults */
#if defined __CHECK_DEVICE_DEFINES
#ifndef __CM0_REV
#define __CM0_REV 0x0000
#warning "__CM0_REV not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 2
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
#ifndef __Vendor_SysTickConfig
#define __Vendor_SysTickConfig 0
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
#endif
#endif
/* IO definitions (access restrictions to peripheral registers) */
#ifdef __cplusplus
#define __I volatile /*!< defines 'read only' permissions */
#else
#define __I volatile const /*!< defines 'read only' permissions */
#endif
#define __O volatile /*!< defines 'write only' permissions */
#define __IO volatile /*!< defines 'read / write' permissions */
/*@} end of group CMSIS_core_definitions */
/*******************************************************************************
* Register Abstraction
******************************************************************************/
/** \defgroup CMSIS_core_register CMSIS Core Register
Core Register contain:
- Core Register
- Core NVIC Register
- Core SCB Register
- Core SysTick Register
*/
/** \ingroup CMSIS_core_register
\defgroup CMSIS_CORE CMSIS Core
Type definitions for the Cortex-M Core Registers
@{
*/
/** \brief Union type to access the Application Program Status Register (APSR).
*/
typedef union
{
struct
{
#if (__CORTEX_M != 0x04)
uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
#else
uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
#endif
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} APSR_Type;
/** \brief Union type to access the Interrupt Program Status Register (IPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} IPSR_Type;
/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
#if (__CORTEX_M != 0x04)
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
#else
uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
#endif
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} xPSR_Type;
/** \brief Union type to access the Control Registers (CONTROL).
*/
typedef union
{
struct
{
uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} CONTROL_Type;
/*@} end of group CMSIS_CORE */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_NVIC CMSIS NVIC
Type definitions for the Cortex-M NVIC Registers
@{
*/
/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
*/
typedef struct
{
__IO uint32_t ISER[1]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[31];
__IO uint32_t ICER[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
uint32_t RSERVED1[31];
__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[31];
__IO uint32_t ICPR[1]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
uint32_t RESERVED3[31];
uint32_t RESERVED4[64];
__IO uint32_t IP[8]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
} NVIC_Type;
/*@} end of group CMSIS_NVIC */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SCB CMSIS SCB
Type definitions for the Cortex-M System Control Block Registers
@{
*/
/** \brief Structure type to access the System Control Block (SCB).
*/
typedef struct
{
__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
uint32_t RESERVED0;
__IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
uint32_t RESERVED1;
__IO uint32_t SHP[2]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
__IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
} SCB_Type;
/* SCB CPUID Register Definitions */
#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
/* SCB Interrupt Control State Register Definitions */
#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
/* SCB System Control Register Definitions */
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
/* SCB Configuration Control Register Definitions */
#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
/* SCB System Handler Control and State Register Definitions */
#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
/*@} end of group CMSIS_SCB */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SysTick CMSIS SysTick
Type definitions for the Cortex-M System Timer Registers
@{
*/
/** \brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_CoreDebug CMSIS Core Debug
Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP
and not via processor. Therefore they are not covered by the Cortex-M0 header file.
@{
*/
/*@} end of group CMSIS_CoreDebug */
/** \ingroup CMSIS_core_register
@{
*/
/* Memory mapping of Cortex-M0 Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
/*@} */
/*******************************************************************************
* Hardware Abstraction Layer
******************************************************************************/
/** \defgroup CMSIS_Core_FunctionInterface CMSIS Core Function Interface
Core Function Interface contains:
- Core NVIC Functions
- Core SysTick Functions
- Core Register Access Functions
*/
/* ########################## NVIC functions #################################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_NVICFunctions CMSIS Core NVIC Functions
@{
*/
/* Interrupt Priorities are WORD accessible only under ARMv6M */
/* The following MACROS handle generation of the register offset and byte masks */
#define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 )
#define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )
#define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) )
/** \brief Enable External Interrupt
This function enables a device specific interrupt in the NVIC interrupt controller.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the external interrupt to enable
*/
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/** \brief Disable External Interrupt
This function disables a device specific interrupt in the NVIC interrupt controller.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the external interrupt to disable
*/
static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/** \brief Get Pending Interrupt
This function reads the pending register in the NVIC and returns the pending bit
for the specified interrupt.
\param [in] IRQn Number of the interrupt for get pending
\return 0 Interrupt status is not pending
\return 1 Interrupt status is pending
*/
static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
/** \brief Set Pending Interrupt
This function sets the pending bit for the specified interrupt.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the interrupt for set pending
*/
static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
/** \brief Clear Pending Interrupt
This function clears the pending bit for the specified interrupt.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the interrupt for clear pending
*/
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
}
/** \brief Set Interrupt Priority
This function sets the priority for the specified interrupt. The interrupt
number can be positive to specify an external (device specific)
interrupt, or negative to specify an internal (core) interrupt.
Note: The priority cannot be set for every core interrupt.
\param [in] IRQn Number of the interrupt for set priority
\param [in] priority Priority to set
*/
static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if(IRQn < 0) {
SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
(((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
else {
NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
(((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
}
/** \brief Get Interrupt Priority
This function reads the priority for the specified interrupt. The interrupt
number can be positive to specify an external (device specific)
interrupt, or negative to specify an internal (core) interrupt.
The returned priority value is automatically aligned to the implemented
priority bits of the microcontroller.
\param [in] IRQn Number of the interrupt for get priority
\return Interrupt Priority
*/
static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
{
if(IRQn < 0) {
return((uint32_t)((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M0 system interrupts */
else {
return((uint32_t)((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
}
/** \brief System Reset
This function initiate a system reset request to reset the MCU.
*/
static __INLINE void NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
SCB_AIRCR_SYSRESETREQ_Msk);
__DSB(); /* Ensure completion of memory access */
while(1); /* wait until reset */
}
/*@} end of CMSIS_Core_NVICFunctions */
/* ################################## SysTick function ############################################ */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_SysTickFunctions CMSIS Core SysTick Functions
@{
*/
#if (__Vendor_SysTickConfig == 0)
/** \brief System Tick Configuration
This function initialises the system tick timer and its interrupt and start the system tick timer.
Counter is in free running mode to generate periodical interrupts.
\param [in] ticks Number of ticks between two interrupts
\return 0 Function succeeded
\return 1 Function failed
*/
static __INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */
SysTick->VAL = 0; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0); /* Function successful */
}
#endif
/*@} end of CMSIS_Core_SysTickFunctions */
#endif /* __CORE_CM0_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */
#ifdef __cplusplus
}
#endif
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24,394
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arm_common_tables.h
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relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/arm_common_tables.h
|
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 11. November 2010
* $Revision: V1.0.2
*
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
*
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#ifndef _ARM_COMMON_TABLES_H
#define _ARM_COMMON_TABLES_H
#include "arm_math.h"
extern uint16_t armBitRevTable[256];
extern q15_t armRecipTableQ15[64];
extern q31_t armRecipTableQ31[64];
extern const q31_t realCoefAQ31[1024];
extern const q31_t realCoefBQ31[1024];
#endif /* ARM_COMMON_TABLES_H */
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core_cm4.h
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relativty_Relativty/Relativty_Firmware/Relativty_board/system/CMSIS/CMSIS/Include/core_cm4.h
|
/**************************************************************************//**
* @file core_cm4.h
* @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
* @version V2.10
* @date 19. July 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#endif
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __CORE_CM4_H_GENERIC
#define __CORE_CM4_H_GENERIC
/** \mainpage CMSIS Cortex-M4
This documentation describes the CMSIS Cortex-M Core Peripheral Access Layer.
It consists of:
- Cortex-M Core Register Definitions
- Cortex-M functions
- Cortex-M instructions
- Cortex-M SIMD instructions
The CMSIS Cortex-M4 Core Peripheral Access Layer contains C and assembly functions that ease
access to the Cortex-M Core
*/
/** \defgroup CMSIS_MISRA_Exceptions CMSIS MISRA-C:2004 Compliance Exceptions
CMSIS violates following MISRA-C2004 Rules:
- Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.<br>
Function definitions in header files are used to allow 'inlining'.
- Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Unions are used for effective representation of core registers.
- Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.<br>
Function-like macros are used to allow more efficient code.
*/
/*******************************************************************************
* CMSIS definitions
******************************************************************************/
/** \defgroup CMSIS_core_definitions CMSIS Core Definitions
This file defines all structures and symbols for CMSIS core:
- CMSIS version number
- Cortex-M core
- Cortex-M core Revision Number
@{
*/
/* CMSIS CM4 definitions */
#define __CM4_CMSIS_VERSION_MAIN (0x02) /*!< [31:16] CMSIS HAL main version */
#define __CM4_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16) | __CM4_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
#define __CORTEX_M (0x04) /*!< Cortex core */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/*!< __FPU_USED to be checked prior to making use of FPU specific registers and functions */
#if defined ( __CC_ARM )
#if defined __TARGET_FPU_VFP
#if (__FPU_PRESENT == 1)
#define __FPU_USED 1
#else
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#define __FPU_USED 0
#endif
#else
#define __FPU_USED 0
#endif
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
#if (__FPU_PRESENT == 1)
#define __FPU_USED 1
#else
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#define __FPU_USED 0
#endif
#else
#define __FPU_USED 0
#endif
#elif defined ( __GNUC__ )
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
#if (__FPU_PRESENT == 1)
#define __FPU_USED 1
#else
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#define __FPU_USED 0
#endif
#else
#define __FPU_USED 0
#endif
#elif defined ( __TASKING__ )
/* add preprocessor checks to define __FPU_USED */
#define __FPU_USED 0
#endif
#include <stdint.h> /*!< standard types definitions */
#include <core_cmInstr.h> /*!< Core Instruction Access */
#include <core_cmFunc.h> /*!< Core Function Access */
#include <core_cm4_simd.h> /*!< Compiler specific SIMD Intrinsics */
#endif /* __CORE_CM4_H_GENERIC */
#ifndef __CMSIS_GENERIC
#ifndef __CORE_CM4_H_DEPENDANT
#define __CORE_CM4_H_DEPENDANT
/* check device defines and use defaults */
#if defined __CHECK_DEVICE_DEFINES
#ifndef __CM4_REV
#define __CM4_REV 0x0000
#warning "__CM4_REV not defined in device header file; using default!"
#endif
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 0
#warning "__FPU_PRESENT not defined in device header file; using default!"
#endif
#ifndef __MPU_PRESENT
#define __MPU_PRESENT 0
#warning "__MPU_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 4
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
#ifndef __Vendor_SysTickConfig
#define __Vendor_SysTickConfig 0
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
#endif
#endif
/* IO definitions (access restrictions to peripheral registers) */
#ifdef __cplusplus
#define __I volatile /*!< defines 'read only' permissions */
#else
#define __I volatile const /*!< defines 'read only' permissions */
#endif
#define __O volatile /*!< defines 'write only' permissions */
#define __IO volatile /*!< defines 'read / write' permissions */
/*@} end of group CMSIS_core_definitions */
/*******************************************************************************
* Register Abstraction
******************************************************************************/
/** \defgroup CMSIS_core_register CMSIS Core Register
Core Register contain:
- Core Register
- Core NVIC Register
- Core SCB Register
- Core SysTick Register
- Core Debug Register
- Core MPU Register
- Core FPU Register
*/
/** \ingroup CMSIS_core_register
\defgroup CMSIS_CORE CMSIS Core
Type definitions for the Cortex-M Core Registers
@{
*/
/** \brief Union type to access the Application Program Status Register (APSR).
*/
typedef union
{
struct
{
#if (__CORTEX_M != 0x04)
uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
#else
uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
#endif
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} APSR_Type;
/** \brief Union type to access the Interrupt Program Status Register (IPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} IPSR_Type;
/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
#if (__CORTEX_M != 0x04)
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
#else
uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
#endif
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} xPSR_Type;
/** \brief Union type to access the Control Registers (CONTROL).
*/
typedef union
{
struct
{
uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} CONTROL_Type;
/*@} end of group CMSIS_CORE */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_NVIC CMSIS NVIC
Type definitions for the Cortex-M NVIC Registers
@{
*/
/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
*/
typedef struct
{
__IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[24];
__IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
uint32_t RSERVED1[24];
__IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[24];
__IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
uint32_t RESERVED3[24];
__IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
uint32_t RESERVED4[56];
__IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
uint32_t RESERVED5[644];
__O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
} NVIC_Type;
/* Software Triggered Interrupt Register Definitions */
#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */
/*@} end of group CMSIS_NVIC */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SCB CMSIS SCB
Type definitions for the Cortex-M System Control Block Registers
@{
*/
/** \brief Structure type to access the System Control Block (SCB).
*/
typedef struct
{
__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
__IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
__IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
__IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
__IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
__IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
__IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
__IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
__IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
__IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
__IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
__I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
__I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
__I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
__I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
__I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
uint32_t RESERVED0[5];
__IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
} SCB_Type;
/* SCB CPUID Register Definitions */
#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
/* SCB Interrupt Control State Register Definitions */
#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
/* SCB Vector Table Offset Register Definitions */
#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */
/* SCB System Control Register Definitions */
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
/* SCB Configuration Control Register Definitions */
#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */
/* SCB System Handler Control and State Register Definitions */
#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */
/* SCB Configurable Fault Status Registers Definitions */
#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
/* SCB Hard Fault Status Registers Definitions */
#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
/* SCB Debug Fault Status Register Definitions */
#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */
/*@} end of group CMSIS_SCB */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SCnSCB CMSIS System Control and ID Register not in the SCB
Type definitions for the Cortex-M System Control and ID Register not in the SCB
@{
*/
/** \brief Structure type to access the System Control and ID Register not in the SCB.
*/
typedef struct
{
uint32_t RESERVED0[1];
__I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
__IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
} SCnSCB_Type;
/* Interrupt Controller Type Register Definitions */
#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos) /*!< ICTR: INTLINESNUM Mask */
/* Auxiliary Control Register Definitions */
#define SCnSCB_ACTLR_DISOOFP_Pos 9 /*!< ACTLR: DISOOFP Position */
#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
#define SCnSCB_ACTLR_DISFPCA_Pos 8 /*!< ACTLR: DISFPCA Position */
#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1 /*!< ACTLR: DISDEFWBUF Position */
#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos) /*!< ACTLR: DISMCYCINT Mask */
/*@} end of group CMSIS_SCnotSCB */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_SysTick CMSIS SysTick
Type definitions for the Cortex-M System Timer Registers
@{
*/
/** \brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */
/** \ingroup CMSIS_core_register
\defgroup CMSIS_ITM CMSIS ITM
Type definitions for the Cortex-M Instrumentation Trace Macrocell (ITM)
@{
*/
/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
*/
typedef struct
{
__O union
{
__O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
__O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
__O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
} PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
uint32_t RESERVED0[864];
__IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
uint32_t RESERVED1[15];
__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
uint32_t RESERVED2[15];
__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
} ITM_Type;
/* ITM Trace Privilege Register Definitions */
#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */
/* ITM Trace Control Register Definitions */
#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
#define ITM_TCR_TXENA_Pos 3 /*!< ITM TCR: TXENA Position */
#define ITM_TCR_TXENA_Msk (1UL << ITM_TCR_TXENA_Pos) /*!< ITM TCR: TXENA Mask */
#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */
/*@}*/ /* end of group CMSIS_ITM */
#if (__MPU_PRESENT == 1)
/** \ingroup CMSIS_core_register
\defgroup CMSIS_MPU CMSIS MPU
Type definitions for the Cortex-M Memory Protection Unit (MPU)
@{
*/
/** \brief Structure type to access the Memory Protection Unit (MPU).
*/
typedef struct
{
__I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
__IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
__IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
__IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
__IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
__IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
__IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
__IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
__IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
__IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
} MPU_Type;
/* MPU Type Register */
#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
/* MPU Control Register */
#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
/* MPU Region Number Register */
#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
/* MPU Region Base Address Register */
#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
/* MPU Region Attribute and Size Register */
#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
/*@} end of group CMSIS_MPU */
#endif
#if (__FPU_PRESENT == 1)
/** \ingroup CMSIS_core_register
\defgroup CMSIS_FPU CMSIS FPU
Type definitions for the Cortex-M Floating Point Unit (FPU)
@{
*/
/** \brief Structure type to access the Floating Point Unit (FPU).
*/
typedef struct
{
uint32_t RESERVED0[1];
__IO uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
__IO uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
__IO uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
__I uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
__I uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
} FPU_Type;
/* Floating-Point Context Control Register */
#define FPU_FPCCR_ASPEN_Pos 31 /*!< FPCCR: ASPEN bit Position */
#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
#define FPU_FPCCR_LSPEN_Pos 30 /*!< FPCCR: LSPEN Position */
#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
#define FPU_FPCCR_MONRDY_Pos 8 /*!< FPCCR: MONRDY Position */
#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
#define FPU_FPCCR_BFRDY_Pos 6 /*!< FPCCR: BFRDY Position */
#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
#define FPU_FPCCR_MMRDY_Pos 5 /*!< FPCCR: MMRDY Position */
#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
#define FPU_FPCCR_HFRDY_Pos 4 /*!< FPCCR: HFRDY Position */
#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
#define FPU_FPCCR_THREAD_Pos 3 /*!< FPCCR: processor mode bit Position */
#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
#define FPU_FPCCR_USER_Pos 1 /*!< FPCCR: privilege level bit Position */
#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
#define FPU_FPCCR_LSPACT_Pos 0 /*!< FPCCR: Lazy state preservation active bit Position */
#define FPU_FPCCR_LSPACT_Msk (1UL << FPU_FPCCR_LSPACT_Pos) /*!< FPCCR: Lazy state preservation active bit Mask */
/* Floating-Point Context Address Register */
#define FPU_FPCAR_ADDRESS_Pos 3 /*!< FPCAR: ADDRESS bit Position */
#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
/* Floating-Point Default Status Control Register */
#define FPU_FPDSCR_AHP_Pos 26 /*!< FPDSCR: AHP bit Position */
#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
#define FPU_FPDSCR_DN_Pos 25 /*!< FPDSCR: DN bit Position */
#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
#define FPU_FPDSCR_FZ_Pos 24 /*!< FPDSCR: FZ bit Position */
#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
#define FPU_FPDSCR_RMode_Pos 22 /*!< FPDSCR: RMode bit Position */
#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
/* Media and FP Feature Register 0 */
#define FPU_MVFR0_FP_rounding_modes_Pos 28 /*!< MVFR0: FP rounding modes bits Position */
#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
#define FPU_MVFR0_Short_vectors_Pos 24 /*!< MVFR0: Short vectors bits Position */
#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
#define FPU_MVFR0_Square_root_Pos 20 /*!< MVFR0: Square root bits Position */
#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
#define FPU_MVFR0_Divide_Pos 16 /*!< MVFR0: Divide bits Position */
#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
#define FPU_MVFR0_FP_excep_trapping_Pos 12 /*!< MVFR0: FP exception trapping bits Position */
#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
#define FPU_MVFR0_Double_precision_Pos 8 /*!< MVFR0: Double-precision bits Position */
#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
#define FPU_MVFR0_Single_precision_Pos 4 /*!< MVFR0: Single-precision bits Position */
#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
#define FPU_MVFR0_A_SIMD_registers_Pos 0 /*!< MVFR0: A_SIMD registers bits Position */
#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL << FPU_MVFR0_A_SIMD_registers_Pos) /*!< MVFR0: A_SIMD registers bits Mask */
/* Media and FP Feature Register 1 */
#define FPU_MVFR1_FP_fused_MAC_Pos 28 /*!< MVFR1: FP fused MAC bits Position */
#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
#define FPU_MVFR1_FP_HPFP_Pos 24 /*!< MVFR1: FP HPFP bits Position */
#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
#define FPU_MVFR1_D_NaN_mode_Pos 4 /*!< MVFR1: D_NaN mode bits Position */
#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
#define FPU_MVFR1_FtZ_mode_Pos 0 /*!< MVFR1: FtZ mode bits Position */
#define FPU_MVFR1_FtZ_mode_Msk (0xFUL << FPU_MVFR1_FtZ_mode_Pos) /*!< MVFR1: FtZ mode bits Mask */
/*@} end of group CMSIS_FPU */
#endif
/** \ingroup CMSIS_core_register
\defgroup CMSIS_CoreDebug CMSIS Core Debug
Type definitions for the Cortex-M Core Debug Registers
@{
*/
/** \brief Structure type to access the Core Debug Register (CoreDebug).
*/
typedef struct
{
__IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
__O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
__IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
__IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
} CoreDebug_Type;
/* Debug Halting Control and Status Register */
#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
/* Debug Core Register Selector Register */
#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */
/* Debug Exception and Monitor Control Register */
#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
/*@} end of group CMSIS_CoreDebug */
/** \ingroup CMSIS_core_register
@{
*/
/* Memory mapping of Cortex-M4 Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
#if (__MPU_PRESENT == 1)
#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
#endif
#if (__FPU_PRESENT == 1)
#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
#endif
/*@} */
/*******************************************************************************
* Hardware Abstraction Layer
******************************************************************************/
/** \defgroup CMSIS_Core_FunctionInterface CMSIS Core Function Interface
Core Function Interface contains:
- Core NVIC Functions
- Core SysTick Functions
- Core Debug Functions
- Core Register Access Functions
*/
/* ########################## NVIC functions #################################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_NVICFunctions CMSIS Core NVIC Functions
@{
*/
/** \brief Set Priority Grouping
This function sets the priority grouping field using the required unlock sequence.
The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
Only values from 0..7 are used.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field
*/
static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
reg_value = SCB->AIRCR; /* read old register configuration */
reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
reg_value = (reg_value |
((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << 8)); /* Insert write key and priorty group */
SCB->AIRCR = reg_value;
}
/** \brief Get Priority Grouping
This function gets the priority grouping from NVIC Interrupt Controller.
Priority grouping is SCB->AIRCR [10:8] PRIGROUP field.
\return Priority grouping field
*/
static __INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */
}
/** \brief Enable External Interrupt
This function enables a device specific interrupt in the NVIC interrupt controller.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the external interrupt to enable
*/
static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
/* NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); enable interrupt */
NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); /* enable interrupt */
}
/** \brief Disable External Interrupt
This function disables a device specific interrupt in the NVIC interrupt controller.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the external interrupt to disable
*/
static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
{
NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
}
/** \brief Get Pending Interrupt
This function reads the pending register in the NVIC and returns the pending bit
for the specified interrupt.
\param [in] IRQn Number of the interrupt for get pending
\return 0 Interrupt status is not pending
\return 1 Interrupt status is pending
*/
static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
}
/** \brief Set Pending Interrupt
This function sets the pending bit for the specified interrupt.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the interrupt for set pending
*/
static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
}
/** \brief Clear Pending Interrupt
This function clears the pending bit for the specified interrupt.
The interrupt number cannot be a negative value.
\param [in] IRQn Number of the interrupt for clear pending
*/
static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
}
/** \brief Get Active Interrupt
This function reads the active register in NVIC and returns the active bit.
\param [in] IRQn Number of the interrupt for get active
\return 0 Interrupt status is not active
\return 1 Interrupt status is active
*/
static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
{
return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
}
/** \brief Set Interrupt Priority
This function sets the priority for the specified interrupt. The interrupt
number can be positive to specify an external (device specific)
interrupt, or negative to specify an internal (core) interrupt.
Note: The priority cannot be set for every core interrupt.
\param [in] IRQn Number of the interrupt for set priority
\param [in] priority Priority to set
*/
static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if(IRQn < 0) {
SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */
else {
NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
}
/** \brief Get Interrupt Priority
This function reads the priority for the specified interrupt. The interrupt
number can be positive to specify an external (device specific)
interrupt, or negative to specify an internal (core) interrupt.
The returned priority value is automatically aligned to the implemented
priority bits of the microcontroller.
\param [in] IRQn Number of the interrupt for get priority
\return Interrupt Priority
*/
static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
{
if(IRQn < 0) {
return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M system interrupts */
else {
return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
}
/** \brief Encode Priority
This function encodes the priority for an interrupt with the given priority group,
preemptive priority value and sub priority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
The returned priority value can be used for NVIC_SetPriority(...) function
\param [in] PriorityGroup Used priority group
\param [in] PreemptPriority Preemptive priority value (starting from 0)
\param [in] SubPriority Sub priority value (starting from 0)
\return Encoded priority for the interrupt
*/
static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
return (
((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
((SubPriority & ((1 << (SubPriorityBits )) - 1)))
);
}
/** \brief Decode Priority
This function decodes an interrupt priority value with the given priority group to
preemptive priority value and sub priority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
The priority value can be retrieved with NVIC_GetPriority(...) function
\param [in] Priority Priority value
\param [in] PriorityGroup Used priority group
\param [out] pPreemptPriority Preemptive priority value (starting from 0)
\param [out] pSubPriority Sub priority value (starting from 0)
*/
static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
*pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
*pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
}
/** \brief System Reset
This function initiate a system reset request to reset the MCU.
*/
static __INLINE void NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
__DSB(); /* Ensure completion of memory access */
while(1); /* wait until reset */
}
/*@} end of CMSIS_Core_NVICFunctions */
/* ################################## SysTick function ############################################ */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_SysTickFunctions CMSIS Core SysTick Functions
@{
*/
#if (__Vendor_SysTickConfig == 0)
/** \brief System Tick Configuration
This function initialises the system tick timer and its interrupt and start the system tick timer.
Counter is in free running mode to generate periodical interrupts.
\param [in] ticks Number of ticks between two interrupts
\return 0 Function succeeded
\return 1 Function failed
*/
static __INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */
SysTick->VAL = 0; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0); /* Function successful */
}
#endif
/*@} end of CMSIS_Core_SysTickFunctions */
/* ##################################### Debug In/Output function ########################################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_core_DebugFunctions CMSIS Core Debug Functions
@{
*/
extern volatile int32_t ITM_RxBuffer; /*!< external variable to receive characters */
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */
/** \brief ITM Send Character
This function transmits a character via the ITM channel 0.
It just returns when no debugger is connected that has booked the output.
It is blocking when a debugger is connected, but the previous character send is not transmitted.
\param [in] ch Character to transmit
\return Character to transmit
*/
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */
(ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */
(ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */
{
while (ITM->PORT[0].u32 == 0);
ITM->PORT[0].u8 = (uint8_t) ch;
}
return (ch);
}
/** \brief ITM Receive Character
This function inputs a character via external variable ITM_RxBuffer.
It just returns when no debugger is connected that has booked the output.
It is blocking when a debugger is connected, but the previous character send is not transmitted.
\return Received character
\return -1 No character received
*/
static __INLINE int32_t ITM_ReceiveChar (void) {
int32_t ch = -1; /* no character available */
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
ch = ITM_RxBuffer;
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
}
return (ch);
}
/** \brief ITM Check Character
This function checks external variable ITM_RxBuffer whether a character is available or not.
It returns '1' if a character is available and '0' if no character is available.
\return 0 No character available
\return 1 Character available
*/
static __INLINE int32_t ITM_CheckChar (void) {
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
return (0); /* no character available */
} else {
return (1); /* character available */
}
}
/*@} end of CMSIS_core_DebugFunctions */
#endif /* __CORE_CM4_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */
#ifdef __cplusplus
}
#endif
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.h
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9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
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| false
| true
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| false
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24,396
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chip.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/chip.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _LIB_SAM_
#define _LIB_SAM_
/*
* Core and peripherals registers definitions
*/
#include "sam.h"
/* Define attribute */
#if defined ( __GNUC__ ) /* GCC CS3 */
#define WEAK __attribute__ ((weak))
#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */
#define WEAK __weak
#endif
/* Define NO_INIT attribute */
#if defined ( __GNUC__ )
#define NO_INIT
#elif defined ( __ICCARM__ )
#define NO_INIT __no_init
#endif
/*
* Peripherals
*/
#include "include/adc.h"
#if (SAM3XA_SERIES) || (SAM3N_SERIES) || (SAM3S_SERIES)
#include "include/dacc.h"
#endif // (SAM3XA_SERIES) || (SAM3N_SERIES) || (SAM3S_SERIES)
#include "include/interrupt_sam_nvic.h"
#include "include/efc.h"
#include "include/gpbr.h"
#include "include/pio.h"
#include "include/pmc.h"
#include "include/pwmc.h"
#include "include/rstc.h"
#include "include/rtc.h"
#include "include/rtt.h"
#include "include/spi.h"
#include "include/ssc.h"
#include "include/tc.h"
#include "include/twi.h"
#include "include/usart.h"
#include "include/wdt.h"
#include "include/timetick.h"
#include "include/USB_device.h"
#include "include/USB_host.h"
#if (SAM3XA_SERIES)
#include "include/can.h"
#include "include/emac.h"
#include "include/trng.h"
#include "include/uotghs_device.h"
#include "include/uotghs_host.h"
#endif /* (SAM3XA_SERIES) */
#endif /* _LIB_SAM_ */
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.h
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| 76
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| 6,445
| 342
| 29
|
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|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,397
|
gpbr.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/gpbr.h
|
/**
* \file
*
* \brief General Purpose Backup Registers (GPBR) driver for SAM.
*
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef GPBR_H_INCLUDED
#define GPBR_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/** GPBR register number type */
typedef enum gpbr_num_type {
GPBR0 = 0,
GPBR1,
GPBR2,
GPBR3,
GPBR4,
GPBR5,
GPBR6,
GPBR7
} gpbr_num_t;
uint32_t gpbr_read(gpbr_num_t ul_reg_num);
void gpbr_write(gpbr_num_t ul_reg_num, uint32_t ul_value);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* GPBR_H_INCLUDED */
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|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
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| false
| false
| false
| false
| false
| false
|
24,398
|
udphs.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/udphs.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef UDPHS_H_INCLUDED
#define UDPHS_H_INCLUDED
#define NUM_IT_MAX 3
#define EP_SINGLE_64 0x32 // EP0
#define EP_DOUBLE_64 0x36 // Other endpoints
// Endpoint 0:
#define EP_TYPE_CONTROL UDPHS_EPTCFG_EPT_SIZE_64 \
| UDPHS_EPTCFG_EPT_TYPE_CTRL8 \
| UDPHS_EPTCFG_BK_NUMBER_1
#ifdef CDC_ENABLED
#define EP_TYPE_BULK_IN UDPHS_EPTCFG_EPT_SIZE_512 \
| UDPHS_EPTCFG_EPT_DIR \
| UDPHS_EPTCFG_EPT_TYPE_BULK \
| UDPHS_EPTCFG_BK_NUMBER_2
#define EP_TYPE_BULK_OUT UDPHS_EPTCFG_EPT_SIZE_512 \
| UDPHS_EPTCFG_EPT_TYPE_BULK \
| UDPHS_EPTCFG_BK_NUMBER_2
#define EP_TYPE_INTERRUPT_IN UDPHS_EPTCFG_EPT_SIZE_64 \
| UDPHS_EPTCFG_EPT_DIR \
| UDPHS_EPTCFG_EPT_TYPE_INT \
| UDPHS_EPTCFG_BK_NUMBER_2
#endif
#ifdef HID_ENABLED
#define EP_TYPE_INTERRUPT_IN_HID UDPHS_EPTCFG_EPT_SIZE_64 \
| UDPHS_EPTCFG_EPT_DIR \
| UDPHS_EPTCFG_EPT_TYPE_INT \
| UDPHS_EPTCFG_BK_NUMBER_2
#endif
#define EP_TYPE_INTERRUPT_OUT UDPHS_EPTCFG_EPT_SIZE_64 \
| UDPHS_EPTCFG_EPT_TYPE_INT \
| UDPHS_EPTCFG_EPT_TYPE_INT \
| UDPHS_EPTCFG_BK_NUMBER_1
#define EP_TYPE_ISOCHRONOUS_IN UDPHS_EPTCFG_EPT_SIZE_1024 \
| UDPHS_EPTCFG_EPT_DIR \
| UDPHS_EPTCFG_EPT_TYPE_ISO \
| UDPHS_EPTCFG_BK_NUMBER_3
#define EP_TYPE_ISOCHRONOUS_OUT UDPHS_EPTCFG_EPT_SIZE_1024 \
| UDPHS_EPTCFG_EPT_TYPE_ISO \
| UDPHS_EPTCFG_BK_NUMBER_3
#ifndef TXLED1
#define TXLED0
#define RXLED0
#define TXLED1
#define RXLED1
#endif
#define UDFNUML ((UDPHS->UDPHS_FNUM & UDPHS_FNUM_FRAME_NUMBER_Msk)>>3)
#define USB_RECV_TIMEOUT
#define UDPHS_EPTFIFO (0x20180000) // (UDPHS_EPTFIFO) Base Address
#endif /* UDPHS_H_INCLUDED */
| 3,804
|
C++
|
.h
| 77
| 38.597403
| 79
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|
relativty/Relativty
| 6,445
| 342
| 29
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|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,399
|
rtt.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/rtt.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Interface for Real Time Timer (RTT) controller.
*
* \par Usage
*
* -# Changes the prescaler value of the given RTT and restarts it
* using \ref RTT_SetPrescaler().
* -# Get current value of the RTT using \ref RTT_GetTime().
* -# Enables the specified RTT interrupt using \ref RTT_EnableIT().
* -# Get the status register value of the given RTT using \ref RTT_GetStatus().
* -# Configures the RTT to generate an alarm at the given time
* using \ref RTT_SetAlarm().
*/
#ifndef _RTT_
#define _RTT_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "../chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void RTT_SetPrescaler( Rtt* pRtt, uint16_t wPrescaler ) ;
extern uint32_t RTT_GetTime( Rtt* pRtt ) ;
extern void RTT_EnableIT( Rtt* pRtt, uint32_t dwSources ) ;
extern uint32_t RTT_GetStatus( Rtt *pRtt ) ;
extern void RTT_SetAlarm( Rtt *pRtt, uint32_t dwTime ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef RTT_H */
| 2,871
|
C++
|
.h
| 67
| 40.910448
| 80
| 0.59412
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,400
|
spi.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/spi.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for Serial Peripheral Interface (SPI) controller.
*
*/
#ifndef _SPI_
#define _SPI_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "../chip.h"
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
/**
*
* Here are several macros which should be used when configuring a SPI
* peripheral.
*
* \section spi_configuration_macros SPI Configuration Macros
* - \ref SPI_PCS
* - \ref SPI_SCBR
* - \ref SPI_DLYBS
* - \ref SPI_DLYBCT
*/
/** Calculate the PCS field value given the chip select NPCS value */
#define SPI_PCS(npcs) ((~(1 << (npcs)) & 0xF) << 16)
/** Calculates the value of the CSR SCBR field given the baudrate and MCK. */
#define SPI_SCBR(baudrate, masterClock) ((uint32_t) ((masterClock) / (baudrate)) << 8)
/** Calculates the value of the CSR DLYBS field given the desired delay (in ns) */
#define SPI_DLYBS(delay, masterClock) ((uint32_t) ((((masterClock) / 1000000) * (delay)) / 1000) << 16)
/** Calculates the value of the CSR DLYBCT field given the desired delay (in ns) */
#define SPI_DLYBCT(delay, masterClock) ((uint32_t) ((((masterClock) / 1000000) * (delay)) / 32000) << 24)
/*------------------------------------------------------------------------------ */
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void SPI_Enable( Spi* spi ) ;
extern void SPI_Disable( Spi* spi ) ;
extern void SPI_EnableIt( Spi* spi, uint32_t dwSources ) ;
extern void SPI_DisableIt( Spi* spi, uint32_t dwSources ) ;
extern void SPI_Configure( Spi* spi, uint32_t dwId, uint32_t dwConfiguration ) ;
extern void SPI_ConfigureNPCS( Spi* spi, uint32_t dwNpcs, uint32_t dwConfiguration ) ;
extern uint32_t SPI_Read( Spi* spi ) ;
extern void SPI_Write( Spi* spi, uint32_t dwNpcs, uint16_t wData ) ;
extern uint32_t SPI_GetStatus( Spi* spi ) ;
extern uint32_t SPI_IsFinished( Spi* pSpi ) ;
#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
extern void SPI_PdcEnableTx( Spi* spi ) ;
extern void SPI_PdcDisableTx( Spi* spi ) ;
extern void SPI_PdcEnableRx( Spi* spi ) ;
extern void SPI_PdcDisableRx( Spi* spi ) ;
extern void SPI_PdcSetTx( Spi* spi, void* pvTxBuf, uint32_t dwTxCount, void* pvTxNextBuf, uint32_t dwTxNextCount ) ;
extern void SPI_PdcSetRx( Spi* spi, void* pvRxBuf, uint32_t dwRxCount, void* pvRxNextBuf, uint32_t dwRxNextCount ) ;
extern uint32_t SPI_WriteBuffer( Spi* spi, void* pvBuffer, uint32_t dwLength ) ;
extern uint32_t SPI_ReadBuffer( Spi* spi, void* pvBuffer, uint32_t dwLength ) ;
#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _SPI_ */
| 4,590
|
C++
|
.h
| 93
| 47.569892
| 116
| 0.597138
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,401
|
USB_device.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/USB_device.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef USB_DEVICE_H_INCLUDED
#define USB_DEVICE_H_INCLUDED
#include <stdint.h>
extern void UDD_WaitIN(void);
extern void UDD_WaitOUT(void);
extern void UDD_ClearIN(void);
extern void UDD_ClearOUT(void);
extern uint32_t UDD_WaitForINOrOUT(void);
extern void UDD_ClearRxFlag(unsigned char bEndpoint);
extern uint32_t UDD_ReceivedSetupInt(void);
extern void UDD_ClearSetupInt(void);
extern uint32_t UDD_ReadWriteAllowed(uint32_t ep);
extern uint32_t UDD_FifoByteCount(uint32_t ep);
extern uint8_t UDD_FifoFree(void);
extern void UDD_ReleaseRX(uint32_t ep);
extern void UDD_ReleaseTX(uint32_t ep);
extern uint8_t UDD_FrameNumber(void);
extern uint8_t UDD_GetConfiguration(void);
extern uint32_t UDD_Send(uint32_t ep, const void* data, uint32_t len);
extern void UDD_Send8(uint32_t ep, uint8_t data );
extern uint8_t UDD_Recv8(uint32_t ep);
extern void UDD_Recv(uint32_t ep, uint8_t* data, uint32_t len);
extern void UDD_InitEndpoints(const uint32_t* eps_table, const uint32_t ul_eps_table_size);
extern void UDD_InitControl(int end);
extern uint32_t UDD_Init(void);
extern void UDD_InitEP( uint32_t ul_ep, uint32_t ul_ep_cfg );
extern void UDD_Attach(void);
extern void UDD_Detach(void);
extern void UDD_SetStack(void (*pf_isr)(void));
extern void UDD_SetAddress(uint32_t addr);
extern void UDD_Stall(void);
extern uint32_t UDD_GetFrameNumber(void);
/*! \name Usual Types
*/
//! @{
typedef unsigned char Bool; //!< Boolean.
#ifndef __cplusplus
#if !defined(__bool_true_false_are_defined)
typedef unsigned char bool; //!< Boolean.
#endif
#endif
typedef int8_t S8; //!< 8-bit signed integer.
typedef uint8_t U8; //!< 8-bit unsigned integer.
typedef int16_t S16; //!< 16-bit signed integer.
typedef uint16_t U16; //!< 16-bit unsigned integer.
typedef uint16_t le16_t;
typedef uint16_t be16_t;
typedef int32_t S32; //!< 32-bit signed integer.
typedef uint32_t U32; //!< 32-bit unsigned integer.
typedef uint32_t le32_t;
typedef uint32_t be32_t;
typedef int64_t S64; //!< 64-bit signed integer.
typedef uint64_t U64; //!< 64-bit unsigned integer.
typedef float F32; //!< 32-bit floating-point number.
typedef double F64; //!< 64-bit floating-point number.
typedef uint32_t iram_size_t;
//! @}
/*! \name Bit-Field Handling
*/
//! @{
/*! \brief Reads the bits of a value specified by a given bit-mask.
*
* \param value Value to read bits from.
* \param mask Bit-mask indicating bits to read.
*
* \return Read bits.
*/
#define Rd_bits( value, mask) ((value) & (mask))
/*! \brief Writes the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue to write bits to.
* \param mask Bit-mask indicating bits to write.
* \param bits Bits to write.
*
* \return Resulting value with written bits.
*/
#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\
((bits ) & (mask)))
/*! \brief Tests the bits of a value specified by a given bit-mask.
*
* \param value Value of which to test bits.
* \param mask Bit-mask indicating bits to test.
*
* \return \c 1 if at least one of the tested bits is set, else \c 0.
*/
#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0)
/*! \brief Clears the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue of which to clear bits.
* \param mask Bit-mask indicating bits to clear.
*
* \return Resulting value with cleared bits.
*/
#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask))
/*! \brief Sets the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue of which to set bits.
* \param mask Bit-mask indicating bits to set.
*
* \return Resulting value with set bits.
*/
#define Set_bits(lvalue, mask) ((lvalue) |= (mask))
/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue of which to toggle bits.
* \param mask Bit-mask indicating bits to toggle.
*
* \return Resulting value with toggled bits.
*/
#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask))
/*! \brief Reads the bit-field of a value specified by a given bit-mask.
*
* \param value Value to read a bit-field from.
* \param mask Bit-mask indicating the bit-field to read.
*
* \return Read bit-field.
*/
#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask))
/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask.
*
* \param lvalue C lvalue to write a bit-field to.
* \param mask Bit-mask indicating the bit-field to write.
* \param bitfield Bit-field to write.
*
* \return Resulting value with written bit-field.
*/
#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask)))
//! @}
/*! \name Token Paste
*
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
* May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
*
* For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
* UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
* equivalent to writing U32.
*/
//! @{
#define TPASTE2( a, b) a##b
#define TPASTE3( a, b, c) a##b##c
#define TPASTE4( a, b, c, d) a##b##c##d
#define TPASTE5( a, b, c, d, e) a##b##c##d##e
#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f
#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g
#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h
#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i
#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j
//! @}
/*! \name Absolute Token Paste
*
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
*
* No restriction of use if the tokens are \#defined.
*
* For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
* as 32 is equivalent to writing U32.
*/
//! @{
#define ATPASTE2( a, b) TPASTE2( a, b)
#define ATPASTE3( a, b, c) TPASTE3( a, b, c)
#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d)
#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e)
#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f)
#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g)
#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h)
#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i)
#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j)
//! @}
/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer.
*
* \param u Value of which to count the trailing zero bits.
*
* \return The count of trailing zero bits in \a u.
*/
#if (defined __GNUC__) || (defined __CC_ARM)
# define ctz(u) __builtin_ctz(u)
#else
# define ctz(u) ((u) & (1ul << 0) ? 0 : \
(u) & (1ul << 1) ? 1 : \
(u) & (1ul << 2) ? 2 : \
(u) & (1ul << 3) ? 3 : \
(u) & (1ul << 4) ? 4 : \
(u) & (1ul << 5) ? 5 : \
(u) & (1ul << 6) ? 6 : \
(u) & (1ul << 7) ? 7 : \
(u) & (1ul << 8) ? 8 : \
(u) & (1ul << 9) ? 9 : \
(u) & (1ul << 10) ? 10 : \
(u) & (1ul << 11) ? 11 : \
(u) & (1ul << 12) ? 12 : \
(u) & (1ul << 13) ? 13 : \
(u) & (1ul << 14) ? 14 : \
(u) & (1ul << 15) ? 15 : \
(u) & (1ul << 16) ? 16 : \
(u) & (1ul << 17) ? 17 : \
(u) & (1ul << 18) ? 18 : \
(u) & (1ul << 19) ? 19 : \
(u) & (1ul << 20) ? 20 : \
(u) & (1ul << 21) ? 21 : \
(u) & (1ul << 22) ? 22 : \
(u) & (1ul << 23) ? 23 : \
(u) & (1ul << 24) ? 24 : \
(u) & (1ul << 25) ? 25 : \
(u) & (1ul << 26) ? 26 : \
(u) & (1ul << 27) ? 27 : \
(u) & (1ul << 28) ? 28 : \
(u) & (1ul << 29) ? 29 : \
(u) & (1ul << 30) ? 30 : \
(u) & (1ul << 31) ? 31 : \
32)
#endif
/*! \name Zero-Bit Counting
*
* Under GCC, __builtin_clz and __builtin_ctz behave like macros when
* applied to constant expressions (values known at compile time), so they are
* more optimized than the use of the corresponding assembly instructions and
* they can be used as constant expressions e.g. to initialize objects having
* static storage duration, and like the corresponding assembly instructions
* when applied to non-constant expressions (values unknown at compile time), so
* they are more optimized than an assembly periphrasis. Hence, clz and ctz
* ensure a possible and optimized behavior for both constant and non-constant
* expressions.
*/
//! @{
/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer.
*
* \param u Value of which to count the leading zero bits.
*
* \return The count of leading zero bits in \a u.
*/
#if (defined __GNUC__) || (defined __CC_ARM)
# define clz(u) __builtin_clz(u)
#elif (defined __ICCARM__)
# define clz(u) __CLZ(u)
#else
# define clz(u) (((u) == 0) ? 32 : \
((u) & (1ul << 31)) ? 0 : \
((u) & (1ul << 30)) ? 1 : \
((u) & (1ul << 29)) ? 2 : \
((u) & (1ul << 28)) ? 3 : \
((u) & (1ul << 27)) ? 4 : \
((u) & (1ul << 26)) ? 5 : \
((u) & (1ul << 25)) ? 6 : \
((u) & (1ul << 24)) ? 7 : \
((u) & (1ul << 23)) ? 8 : \
((u) & (1ul << 22)) ? 9 : \
((u) & (1ul << 21)) ? 10 : \
((u) & (1ul << 20)) ? 11 : \
((u) & (1ul << 19)) ? 12 : \
((u) & (1ul << 18)) ? 13 : \
((u) & (1ul << 17)) ? 14 : \
((u) & (1ul << 16)) ? 15 : \
((u) & (1ul << 15)) ? 16 : \
((u) & (1ul << 14)) ? 17 : \
((u) & (1ul << 13)) ? 18 : \
((u) & (1ul << 12)) ? 19 : \
((u) & (1ul << 11)) ? 20 : \
((u) & (1ul << 10)) ? 21 : \
((u) & (1ul << 9)) ? 22 : \
((u) & (1ul << 8)) ? 23 : \
((u) & (1ul << 7)) ? 24 : \
((u) & (1ul << 6)) ? 25 : \
((u) & (1ul << 5)) ? 26 : \
((u) & (1ul << 4)) ? 27 : \
((u) & (1ul << 3)) ? 28 : \
((u) & (1ul << 2)) ? 29 : \
((u) & (1ul << 1)) ? 30 : \
31)
#endif
/*! \name Mathematics
*
* The same considerations as for clz and ctz apply here but GCC does not
* provide built-in functions to access the assembly instructions abs, min and
* max and it does not produce them by itself in most cases, so two sets of
* macros are defined here:
* - Abs, Min and Max to apply to constant expressions (values known at
* compile time);
* - abs, min and max to apply to non-constant expressions (values unknown at
* compile time), abs is found in stdlib.h.
*/
//! @{
/*! \brief Takes the absolute value of \a a.
*
* \param a Input value.
*
* \return Absolute value of \a a.
*
* \note More optimized if only used with values known at compile time.
*/
#define Abs(a) (((a) < 0 ) ? -(a) : (a))
/*! \brief Takes the minimal value of \a a and \a b.
*
* \param a Input value.
* \param b Input value.
*
* \return Minimal value of \a a and \a b.
*
* \note More optimized if only used with values known at compile time.
*/
#define Min(a, b) (((a) < (b)) ? (a) : (b))
/*! \brief Takes the maximal value of \a a and \a b.
*
* \param a Input value.
* \param b Input value.
*
* \return Maximal value of \a a and \a b.
*
* \note More optimized if only used with values known at compile time.
*/
#define Max(a, b) (((a) > (b)) ? (a) : (b))
// abs() is already defined by stdlib.h
/*! \brief Takes the minimal value of \a a and \a b.
*
* \param a Input value.
* \param b Input value.
*
* \return Minimal value of \a a and \a b.
*
* \note More optimized if only used with values unknown at compile time.
*/
#define min(a, b) Min(a, b)
/*! \brief Takes the maximal value of \a a and \a b.
*
* \param a Input value.
* \param b Input value.
*
* \return Maximal value of \a a and \a b.
*
* \note More optimized if only used with values unknown at compile time.
*/
#define max(a, b) Max(a, b)
//! @}
#endif /* USB_DEVICE_H_INCLUDED */
| 15,830
|
C++
|
.h
| 362
| 36.364641
| 98
| 0.514682
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,402
|
pio_it.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/pio_it.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Configuration and handling of interrupts on PIO status changes. The API
* provided here have several advantages over the traditional PIO interrupt
* configuration approach:
* - It is highly portable
* - It automatically demultiplexes interrupts when multiples pins have been
* configured on a single PIO controller
* - It allows a group of pins to share the same interrupt
*
* However, it also has several minor drawbacks that may prevent from using it
* in particular applications:
* - It enables the clocks of all PIO controllers
* - PIO controllers all share the same interrupt handler, which does the
* demultiplexing and can be slower than direct configuration
* - It reserves space for a fixed number of interrupts, which can be
* increased by modifying the appropriate constant in pio_it.c.
*
* \par Usage
*
* -# Initialize the PIO interrupt mechanism using PIO_InitializeInterrupts()
* with the desired priority (0 ... 7).
* -# Configure a status change interrupt on one or more pin(s) with
* PIO_ConfigureIt().
* -# Enable & disable interrupts on pins using PIO_EnableIt() and
* PIO_DisableIt().
*/
#ifndef _PIO_IT_
#define _PIO_IT_
/*
* Headers
*/
#include "pio.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* Global functions
*/
extern void PIO_InitializeInterrupts( uint32_t dwPriority ) ;
extern void PIO_ConfigureIt( const Pin *pPin, void (*handler)( const Pin* ) ) ;
extern void PIO_EnableIt( const Pio* pPio, const uint32_t dwMask ) ;
extern void PIO_DisableIt( const Pio* pPio, const uint32_t dwMask ) ;
extern void PIO_IT_InterruptHandler( void ) ;
extern void PioInterruptHandler( uint32_t id, Pio *pPio ) ;
extern void PIO_CaptureHandler( void ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PIO_IT_ */
| 3,421
|
C++
|
.h
| 81
| 40.296296
| 80
| 0.687218
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,403
|
adc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/adc.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef ADC_H_INCLUDED
#define ADC_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/* The max adc sample freq definition*/
#define ADC_FREQ_MAX 20000000
/* The min adc sample freq definition*/
#define ADC_FREQ_MIN 1000000
/* The normal adc startup time*/
#define ADC_STARTUP_NORM 40
/* The fast adc startup time*/
#define ADC_STARTUP_FAST 12
/* Definitions for ADC resolution */
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
enum adc_resolution_t {
ADC_10_BITS = ADC_MR_LOWRES_BITS_10, /* ADC 10-bit resolution */
ADC_12_BITS = ADC_MR_LOWRES_BITS_12 /* ADC 12-bit resolution */
};
#elif SAM3N_SERIES
enum adc_resolution_t {
ADC_8_BITS = ADC_MR_LOWRES_BITS_8, /* ADC 8-bit resolution */
ADC_10_BITS = ADC_MR_LOWRES_BITS_10 /* ADC 10-bit resolution */
} ;
#elif SAM3U_SERIES
enum adc_resolution_t {
ADC_8_BITS = ADC_MR_LOWRES_BITS_8, /* ADC 8-bit resolution */
ADC_10_BITS = ADC12B_MR_LOWRES_BITS_10, /* ADC 10-bit resolution */
ADC_12_BITS = ADC12B_MR_LOWRES_BITS_12 /* ADC 12-bit resolution */
} ;
#endif
/* Definitions for ADC trigger */
enum adc_trigger_t {
ADC_TRIG_SW = ADC_MR_TRGEN_DIS, /* Starting a conversion is only possible by software. */
ADC_TRIG_EXT = ((ADC_MR_TRGSEL_ADC_TRIG0 << ADC_MR_TRGSEL_Pos) &
ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* External trigger */
ADC_TRIG_TIO_CH_0 = (ADC_MR_TRGSEL_ADC_TRIG1 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 0 */
ADC_TRIG_TIO_CH_1 = (ADC_MR_TRGSEL_ADC_TRIG2 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 1 */
ADC_TRIG_TIO_CH_2 = (ADC_MR_TRGSEL_ADC_TRIG3 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 2 */
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES || SAM3U_SERIES
ADC_TRIG_PWM_EVENT_LINE_0 = (ADC_MR_TRGSEL_ADC_TRIG4 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* PWM Event Line 0 */
ADC_TRIG_PWM_EVENT_LINE_1 = (ADC_MR_TRGSEL_ADC_TRIG5 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN /* PWM Event Line 1 */
#endif
} ;
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/* Definitions for ADC channel number */
enum adc_channel_num_t {
ADC_CHANNEL_0 = 0,
ADC_CHANNEL_1 = 1,
ADC_CHANNEL_2 = 2,
ADC_CHANNEL_3 = 3,
ADC_CHANNEL_4 = 4,
ADC_CHANNEL_5 = 5,
ADC_CHANNEL_6 = 6,
ADC_CHANNEL_7 = 7,
ADC_CHANNEL_8 = 8,
ADC_CHANNEL_9 = 9,
ADC_CHANNEL_10 = 10,
ADC_CHANNEL_11 = 11,
ADC_CHANNEL_12 = 12,
ADC_CHANNEL_13 = 13,
ADC_CHANNEL_14 = 14,
ADC_TEMPERATURE_SENSOR = 15,
} ;
#elif SAM3U_SERIES
/* Definitions for ADC channel number */
enum adc_channel_num_t {
ADC_CHANNEL_0 = 0,
ADC_CHANNEL_1 = 1,
ADC_CHANNEL_2 = 2,
ADC_CHANNEL_3 = 3,
ADC_CHANNEL_4 = 4,
ADC_CHANNEL_5 = 5,
ADC_CHANNEL_6 = 6,
ADC_CHANNEL_7 = 7,
} ;
#endif
/* Definitions for ADC gain value */
enum adc_gainvalue_t{
ADC_GAINVALUE_0 = 0,
ADC_GAINVALUE_1 = 1,
ADC_GAINVALUE_2 = 2,
ADC_GAINVALUE_3 = 3
};
/* Definitions for ADC analog settling time */
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
enum adc_settling_time_t{
ADC_SETTLING_TIME_0 = ADC_MR_SETTLING_AST3,
ADC_SETTLING_TIME_1 = ADC_MR_SETTLING_AST5,
ADC_SETTLING_TIME_2 = ADC_MR_SETTLING_AST9,
ADC_SETTLING_TIME_3 = ADC_MR_SETTLING_AST17
};
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
uint32_t adc_init(Adc *p_adc, const uint32_t ul_mck,
const uint32_t ul_adc_clock, const uint8_t uc_startup);
void adc_configure_trigger(Adc *p_adc, const enum adc_trigger_t trigger,
const uint8_t uc_freerun);
void adc_configure_power_save(Adc *p_adc, const uint8_t uc_sleep, const uint8_t uc_fwup);
void adc_configure_sequence(Adc *p_adc, const enum adc_channel_num_t ch_list[],
const uint8_t uc_num);
void adc_enable_tag(Adc *p_adc);
void adc_disable_tag(Adc *p_adc);
enum adc_channel_num_t adc_get_tag(const Adc *p_adc);
void adc_start_sequencer(Adc *p_adc);
void adc_stop_sequencer(Adc *p_adc);
void adc_set_comparison_mode(Adc *p_adc, const uint8_t uc_mode);
uint32_t adc_get_comparison_mode(const Adc *p_adc);
void adc_set_comparison_window(Adc *p_adc, const uint16_t us_low_threshold,
const uint16_t us_high_threshold);
void adc_set_comparison_channel(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_set_writeprotect(Adc *p_adc, const uint32_t ul_enable);
uint32_t adc_get_writeprotect_status(const Adc *p_adc);
void adc_check(Adc* p_adc, const uint32_t ul_mck);
uint32_t adc_get_overrun_status(const Adc *p_adc);
#elif SAM3U_SERIES
uint32_t adc_init(Adc * p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
const uint32_t ul_startuptime);
void adc_configure_trigger(Adc *p_adc, const enum adc_trigger_t trigger);
void adc_configure_power_save(Adc *p_adc, const uint8_t uc_sleep);
#endif
void adc_set_resolution(Adc *p_adc, const enum adc_resolution_t resolution);
void adc_start(Adc *p_adc);
void adc_stop(Adc *p_adc);
void adc_enable_channel(Adc *p_adc, const enum adc_channel_num_t adc_ch);
void adc_disable_channel(Adc *p_adc, const enum adc_channel_num_t adc_ch);
void adc_enable_all_channel(Adc *p_adc);
void adc_disable_all_channel(Adc *p_adc);
uint32_t adc_get_channel_status(const Adc *p_adc, const enum adc_channel_num_t adc_ch);
uint32_t adc_get_channel_value(const Adc *p_adc,const enum adc_channel_num_t adc_ch);
uint32_t adc_get_latest_value(const Adc *p_adc);
uint32_t adc_get_actual_adc_clock(const Adc *p_adc, const uint32_t ul_mck);
void adc_enable_interrupt(Adc *p_adc, const uint32_t ul_source);
void adc_disable_interrupt(Adc *p_adc, const uint32_t ul_source);
uint32_t adc_get_status(const Adc *p_adc);
uint32_t adc_get_interrupt_mask(const Adc *p_adc);
Pdc *adc_get_pdc_base(const Adc *p_adc);
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
void adc_configure_timing(Adc *p_adc, const uint8_t uc_tracking,
const enum adc_settling_time_t settling, const uint8_t uc_transfer);
void adc_enable_anch( Adc *p_adc );
void adc_disable_anch( Adc *p_adc );
void adc_enable_channel_differential_input(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_disable_channel_differential_input(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_enable_channel_input_offset(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_disable_channel_input_offset(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_set_channel_input_gain(Adc *p_adc, const enum adc_channel_num_t channel,
const enum adc_gainvalue_t uc_gain);
void adc_set_bias_current(Adc *p_adc, const uint8_t uc_ibctl);
void adc_enable_ts(Adc *p_adc);
void adc_disable_ts(Adc *p_adc);
#elif SAM3N_SERIES
void adc_configure_timing(Adc *p_adc, const uint8_t uc_tracking);
#elif SAM3U_SERIES
void adc_configure_timing(Adc *p_adc, const uint32_t ul_sh);
#endif
#if SAM3SD8_SERIES || SAM4S_SERIES
void adc_set_calibmode(Adc *p_adc);
#endif
#if SAM3U_SERIES
uint32_t adc12b_init(Adc12b *p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
const uint32_t ul_startuptime, const uint32_t ul_offmode_startuptime);
void adc12b_set_resolution(Adc12b *p_adc, const enum adc_resolution_t resolution);
void adc12b_configure_trigger(Adc12b *p_adc, const enum adc_trigger_t trigger);
void adc12b_configure_power_save(Adc12b *p_adc, const uint8_t uc_sleep, const uint8_t uc_offmode);
void adc12b_configure_timing(Adc12b *p_adc, const uint32_t ul_sh);
void adc12b_start(Adc12b *p_adc);
void adc12b_stop(Adc12b *p_adc);
void adc12b_enable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch);
void adc12b_disable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch);
void adc12b_enable_all_channel(Adc12b *p_adc);
void adc12b_disable_all_channel(Adc12b *p_adc);
uint32_t adc12b_get_channel_status(const Adc12b *p_adc,const enum adc_channel_num_t adc_ch);
uint32_t adc12b_get_channel_value(const Adc12b *p_adc, const enum adc_channel_num_t adc_ch);
uint32_t adc12b_get_latest_value(const Adc12b *p_adc);
void adc12b_enable_differential_input(Adc12b *p_adc);
void adc12b_disable_differential_input(Adc12b *p_adc);
void adc12b_enable_input_offset(Adc12b *p_adc);
void adc12b_disable_input_offset(Adc12b *p_adc);
void adc12b_set_input_gain(Adc12b *p_adc, const enum adc_gainvalue_t uc_gain);
uint32_t adc12b_get_actual_adc_clock(const Adc12b *p_adc, const uint32_t ul_mck);
void adc12b_enable_interrupt(Adc12b *p_adc, const uint32_t ul_source);
void adc12b_disable_interrupt(Adc12b *p_adc, const uint32_t ul_source);
uint32_t adc12b_get_interrupt_mask(const Adc12b *p_adc);
uint32_t adc12b_get_status(const Adc12b *p_adc);
void adc12b_set_bias_current(Adc12b *p_adc, const uint8_t uc_ibctl);
Pdc *adc12b_get_pdc_base(const Adc12b *p_adc);
#endif
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* ADC_H_INCLUDED */
| 10,695
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C++
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.h
| 234
| 42.739316
| 109
| 0.697712
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,404
|
trng.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/trng.h
|
/**
* \file
*
* \brief API for SAM TRNG.
*
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef TRNG_H_INCLUDED
#define TRNG_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
void trng_enable(Trng *p_trng);
void trng_disable(Trng *p_trng);
void trng_enable_interrupt(Trng *p_trng);
void trng_disable_interrupt(Trng *p_trng);
uint32_t trng_get_interrupt_mask(Trng *p_trng);
uint32_t trng_get_interrupt_status(Trng *p_trng);
uint32_t trng_read_output_data(Trng *p_trng);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* TRNG_H_INCLUDED */
| 2,327
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C++
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.h
| 67
| 33.029851
| 79
| 0.753771
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,405
|
uotghs_host.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/uotghs_host.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef UOTGHS_HOST_H_INCLUDED
#define UOTGHS_HOST_H_INCLUDED
//! \ingroup usb_host_group
//! \defgroup uhd_group USB Host Driver (UHD)
//! UOTGHS low-level driver for USB host mode
//!
//! @{
//! @name UOTGHS Host IP properties
//!
//! @{
//! Get maximal number of endpoints
#define uhd_get_pipe_max_nbr() (9)
#define UOTGHS_EPT_NUM (uhd_get_pipe_max_nbr()+1)
//! @}
//! @name Host Vbus line control
//!
//! VBOF is an optional output pin which allows to enable or disable
//! the external VBus generator.
//!
//! @{
//! Enables hardware control of USB_VBOF output pin when a Vbus error occur
#define uhd_enable_vbus_error_hw_control() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSHWC))
//! Disables hardware control of USB_VBOF output pin when a Vbus error occur
#define uhd_disable_vbus_error_hw_control() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSHWC))
//! Pin and function for USB_VBOF according to configuration from USB_VBOF
#define USB_VBOF_PIN USB_VBOF_GPIO
#define USB_VBOF_FUNCTION USB_VBOF_FLAGS
//! Output USB_VBOF onto its pin
#define uhd_output_vbof_pin() do {\
pio_configure_pin(USB_VBOF_PIN, USB_VBOF_FUNCTION); \
} while (0)
//! Set USB_VBOF output pin polarity
#define uhd_set_vbof_active_high() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSPO))
#define uhd_set_vbof_active_low() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSPO))
//! Requests VBus activation
#define uhd_enable_vbus() (Set_bits(UOTGHS->UOTGHS_SFR, UOTGHS_SR_VBUSRQ))
//! Requests VBus deactivation
#define uhd_disable_vbus() (Set_bits(UOTGHS->UOTGHS_SCR, UOTGHS_SR_VBUSRQ))
//! Tests if VBus activation has been requested
#define Is_uhd_vbus_enabled() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSRQ))
//! @}
//! @name Host Vbus line monitoring
//!
//! The VBus level is always checked by USBC hardware.
//!
//! @{
#define uhd_enable_vbus_error_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE))
#define uhd_disable_vbus_error_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE))
#define Is_uhd_vbus_error_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE))
#define uhd_ack_vbus_error_interrupt() (Set_bits(UOTGHS->UOTGHS_SCR, UOTGHS_SCR_VBERRIC))
#define Is_uhd_vbus_error_interrupt() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBERRI))
//! @}
#define uhd_ack_errors_interrupt() (UOTGHS->UOTGHS_SCR = (UOTGHS_SCR_VBERRIC|UOTGHS_SCR_BCERRIC|UOTGHS_SCR_HNPERRIC|UOTGHS_SCR_STOIC))
#define Is_uhd_errors_interrupt() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBERRE|UOTGHS_CTRL_BCERRE|UOTGHS_CTRL_HNPERRE|UOTGHS_CTRL_STOE))
#define uhd_enable_suspend_error_interrupt()
#define uhd_enable_hnp_error_interrupt()
#define uhd_enable_bconn_error_interrupt()
//! @name USB device connection/disconnection monitoring
//! @{
#define uhd_enable_connection_int() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_DCONNIES)
#define uhd_disable_connection_int() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_DCONNIEC)
#define Is_uhd_connection_int_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_DCONNIE))
#define uhd_ack_connection() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_DCONNIC)
#define Is_uhd_connection() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_DCONNI))
#define uhd_enable_disconnection_int() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_DDISCIES)
#define uhd_disable_disconnection_int() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_DDISCIEC)
#define Is_uhd_disconnection_int_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_DDISCIE))
#define uhd_ack_disconnection() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_DDISCIC)
#define Is_uhd_disconnection() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_DDISCI))
//! @}
//! @name USB device speed control
//! @{
#define uhd_get_speed_mode() (Rd_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_SPEED_Msk))
#define Is_uhd_low_speed_mode() (uhd_get_speed_mode() == UOTGHS_SR_SPEED_LOW_SPEED)
#define Is_uhd_full_speed_mode() (uhd_get_speed_mode() == UOTGHS_SR_SPEED_FULL_SPEED)
#define Is_uhd_high_speed_mode() (uhd_get_speed_mode() == UOTGHS_SR_SPEED_HIGH_SPEED)
//! Enable high speed mode
# define uhd_enable_high_speed_mode() (Wr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SPDCONF_Msk, UOTGHS_HSTCTRL_SPDCONF_HIGH_SPEED))
//! Disable high speed mode
# define uhd_disable_high_speed_mode() (Wr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SPDCONF_Msk, UOTGHS_HSTCTRL_SPDCONF_FORCED_FS))
//! @}
//! @name Bus events control
//! These macros manage the bus events: reset, SOF, resume, wakeup.
//! @{
//! Initiates a reset event
//! @{
#define uhd_start_reset() (Set_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESET))
#define Is_uhd_starting_reset() (Tst_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESET))
#define uhd_stop_reset() (Clr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESET))
#define uhd_enable_reset_sent_interrupt() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_RSTIES)
#define uhd_disable_reset_sent_interrupt() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_RSTIEC)
#define Is_uhd_reset_sent_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_RSTIE))
#define uhd_ack_reset_sent() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_RSTIC)
#define Is_uhd_reset_sent() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_RSTI))
//! @}
//! Initiates a SOF events
//! @{
#define uhd_enable_sof() (Set_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SOFE))
#define uhd_disable_sof() (Clr_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SOFE))
#define Is_uhd_sof_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_SOFE))
#define uhd_get_sof_number() ((UOTGHS->UOTGHS_HSTFNUM&UOTGHS_HSTFNUM_FNUM_Msk)>>UOTGHS_HSTFNUM_FNUM_Pos)
#define uhd_get_microsof_number() ((UOTGHS->UOTGHS_HSTFNUM&UOTGHS_HSTFNUM_MFNUM_Msk)>>UOTGHS_HSTFNUM_MFNUM_Pos)
#define uhd_get_frame_position() (Rd_bits(UOTGHS->UOTGHS_HSTFNUM, UOTGHS_HSTFNUM_FLENHIGH_Msk))
#define uhd_enable_sof_interrupt() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_HSOFIES)
#define uhd_disable_sof_interrupt() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_HSOFIEC)
#define Is_uhd_sof_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_HSOFIE))
#define uhd_ack_sof() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_HSOFIC)
#define Is_uhd_sof() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_HSOFI))
//! @}
//! Initiates a resume event
//! It is called downstream resume event.
//! @{
#define uhd_send_resume() (Set_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESUME))
#define Is_uhd_sending_resume() (Tst_bits(UOTGHS->UOTGHS_HSTCTRL, UOTGHS_HSTCTRL_RESUME))
#define uhd_enable_downstream_resume_interrupt() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_RSMEDIES)
#define uhd_disable_downstream_resume_interrupt() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_RSMEDIEC)
#define Is_uhd_downstream_resume_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_RSMEDIE))
#define uhd_ack_downstream_resume() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_RSMEDIC)
#define Is_uhd_downstream_resume() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_RSMEDI))
//! @}
//! Detection of a wake-up event
//! A wake-up event is received when the host controller is in the suspend mode:
//! - and an upstream resume from the peripheral is detected.
//! - and a peripheral disconnection is detected.
//! @{
#define uhd_enable_wakeup_interrupt() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_HWUPIES)
#define uhd_disable_wakeup_interrupt() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_HWUPIEC)
#define Is_uhd_wakeup_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_HWUPIE))
#define uhd_ack_wakeup() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_HWUPIC)
#define Is_uhd_wakeup() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_HWUPI))
#define uhd_enable_upstream_resume_interrupt() (UOTGHS->UOTGHS_HSTIER = UOTGHS_HSTIER_RXRSMIES)
#define uhd_disable_upstream_resume_interrupt() (UOTGHS->UOTGHS_HSTIDR = UOTGHS_HSTIDR_RXRSMIEC)
#define Is_uhd_upstream_resume_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_RXRSMIE))
#define uhd_ack_upstream_resume() (UOTGHS->UOTGHS_HSTICR = UOTGHS_HSTICR_RXRSMIC)
#define Is_uhd_upstream_resume() (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_RXRSMI))
//! @}
//! @}
//! @name Pipes management
//! @{
//! USB address of pipes
//! @{
#define uhd_configure_address(p, addr) \
(Wr_bitfield((&UOTGHS->UOTGHS_HSTADDR1)[(p)>>2], \
UOTGHS_HSTADDR1_HSTADDRP0_Msk << (((p)&0x03)<<3), addr))
#define uhd_get_configured_address(p) \
(Rd_bitfield((&UOTGHS->UOTGHS_HSTADDR1)[(p)>>2], \
UOTGHS_HSTADDR1_HSTADDRP0_Msk << (((p)&0x03)<<3)))
//! @}
//! Pipe enable
//! Enable, disable, reset, freeze
//! @{
#define uhd_enable_pipe(p) \
(Set_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
#define uhd_disable_pipe(p) \
(Clr_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
#define Is_uhd_pipe_enabled(p) \
(Tst_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
#define uhd_reset_pipe(p) \
(Set_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p))); \
(Clr_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
#define Is_uhd_resetting_pipe(p) \
(Tst_bits(UOTGHS->UOTGHS_HSTPIP, UOTGHS_HSTPIP_PEN0 << (p)))
#define uhd_freeze_pipe(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_PFREEZES)
#define uhd_unfreeze_pipe(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_PFREEZEC)
#define Is_uhd_pipe_frozen(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_PFREEZE))
#define uhd_reset_data_toggle(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_RSTDTS)
#define Is_uhd_data_toggle_reset(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_RSTDT))
//! @}
//! Pipe configuration
//! @{
#define uhd_configure_pipe_int_req_freq(p,freq) (Wr_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_INTFRQ_Msk, (freq)))
#define uhd_get_pipe_int_req_freq(p) (Rd_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_INTFRQ_Msk))
#define uhd_configure_pipe_endpoint_number(p,ep) (Wr_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PEPNUM_Msk, (ep)))
#define uhd_get_pipe_endpoint_address(p) \
(uhd_is_pipe_in(p) ?\
(uhd_get_pipe_endpoint_number(p) | USB_EP_DIR_IN) :\
(uhd_get_pipe_endpoint_number(p) | USB_EP_DIR_OUT))
#define uhd_get_pipe_endpoint_number(p) (Rd_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], (UOTGHS_HSTPIPCFG_PEPNUM_Msk)))
#define uhd_configure_pipe_type(p, type) (Wr_bitfield(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTYPE_Msk, type))
#define uhd_get_pipe_type(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTYPE_Msk))
#define uhd_enable_pipe_bank_autoswitch(p) (Set_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_AUTOSW))
#define uhd_disable_pipe_bank_autoswitch(p) (Clr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_AUTOSW))
#define Is_uhd_pipe_bank_autoswitch_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_AUTOSW))
#define uhd_configure_pipe_token(p, token) (Wr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTOKEN_Msk, token))
#define uhd_get_pipe_token(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PTOKEN_Msk))
#define uhd_is_pipe_in(p) (UOTGHS_HSTPIPCFG_PTOKEN_IN==uhd_get_pipe_token(p))
#define uhd_is_pipe_out(p) (UOTGHS_HSTPIPCFG_PTOKEN_OUT==uhd_get_pipe_token(p))
//! Bounds given integer size to allowed range and rounds it up to the nearest
//! available greater size, then applies register format of UOTGHS controller
//! for pipe size bit-field.
#define uhd_format_pipe_size(size) \
(32 - clz(((uint32_t)min(max(size, 8), 1024) << 1) - 1) - 1 - 3)
#define uhd_configure_pipe_size(p,size) \
(Wr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PSIZE_Msk, uhd_format_pipe_size(size)))
#define uhd_get_pipe_size(p) (8<<((Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], (UOTGHS_HSTPIPCFG_PSIZE_Msk)))>> UOTGHS_HSTPIPCFG_PSIZE_Pos))
#define uhd_configure_pipe_bank(p,bank) (Wr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PBK_Msk, (bank)))
#define uhd_get_pipe_bank(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PBK_Msk))
#define uhd_allocate_memory(p) (Set_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_ALLOC))
#define uhd_unallocate_memory(p) (Clr_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_ALLOC))
#define Is_uhd_memory_allocated(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_ALLOC))
//! Enable PING management only available in HS mode
# define uhd_enable_ping(p) (Set_bits(UOTGHS->UOTGHS_HSTPIPCFG[p], UOTGHS_HSTPIPCFG_PINGEN))
//#endif
#define uhd_configure_pipe(p, freq, ep_num, type, token, size, bank, bank_switch) \
(UOTGHS->UOTGHS_HSTPIPCFG[p] = \
(bank)|\
((uhd_format_pipe_size(size)<<UOTGHS_HSTPIPCFG_PSIZE_Pos)&UOTGHS_HSTPIPCFG_PSIZE_Msk)|\
((token)&UOTGHS_HSTPIPCFG_PTOKEN_Msk)|\
((type)&UOTGHS_HSTPIPCFG_PTYPE_Msk)|\
(((ep_num)<<UOTGHS_HSTPIPCFG_PEPNUM_Pos)&UOTGHS_HSTPIPCFG_PEPNUM_Msk)|\
bank_switch |\
(((freq)<<UOTGHS_HSTPIPCFG_INTFRQ_Pos)&UOTGHS_HSTPIPCFG_INTFRQ_Msk))
#define Is_uhd_pipe_configured(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_CFGOK))
//! @}
//! Pipe main interrupts management
//! @{
#define uhd_enable_pipe_interrupt(p) (UOTGHS->UOTGHS_HSTIER = (UOTGHS_HSTIER_PEP_0 << (p)))
#define uhd_disable_pipe_interrupt(p) (UOTGHS->UOTGHS_HSTIDR = (UOTGHS_HSTIDR_PEP_0 << (p)))
#define Is_uhd_pipe_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTIMR, UOTGHS_HSTIMR_PEP_0 << (p)))
#define Is_uhd_pipe_interrupt(p) (Tst_bits(UOTGHS->UOTGHS_HSTISR, UOTGHS_HSTISR_PEP_0 << (p)))
//! returns the lowest pipe number generating a pipe interrupt or UOTGHS_EPT_NUM if none
#define uhd_get_interrupt_pipe_number() \
(ctz(((UOTGHS->UOTGHS_HSTISR >> 8) & (UOTGHS->UOTGHS_HSTIMR >> 8)) | (1 << UOTGHS_EPT_NUM)))
//! @}
//! Pipe overflow and underflow for isochronous and interrupt endpoints
//! @{
#define uhd_enable_overflow_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_OVERFIES)
#define uhd_disable_overflow_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_OVERFIEC)
#define Is_uhd_overflow_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_OVERFIE))
#define uhd_ack_overflow_interrupt(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_OVERFIC)
#define Is_uhd_overflow(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_OVERFI))
#define uhd_enable_underflow_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_UNDERFIES)
#define uhd_disable_underflow_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_UNDERFIEC)
#define Is_uhd_underflow_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_UNDERFIE))
#define uhd_ack_underflow_interrupt(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_UNDERFIC)
#define Is_uhd_underflow(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_UNDERFI))
//! @}
//! USB packet errors management
//! @{
#define uhd_enable_stall_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_RXSTALLDES)
#define uhd_disable_stall_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_RXSTALLDEC)
#define Is_uhd_stall_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_RXSTALLDE))
#define uhd_ack_stall(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_RXSTALLDIC)
#define Is_uhd_stall(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RXSTALLDI))
#define uhd_enable_pipe_error_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_PERRES)
#define uhd_disable_pipe_error_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_PERREC)
#define Is_uhd_pipe_error_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_PERRE))
#define uhd_ack_all_errors(p) (UOTGHS->UOTGHS_HSTPIPERR[p] = 0UL)
#define Is_uhd_pipe_error(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_PERRI))
#define uhd_error_status(p) (UOTGHS->UOTGHS_HSTPIPERR[p])
#define Is_uhd_bad_data_toggle(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_DATATGL))
#define Is_uhd_data_pid_error(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_DATAPID))
#define Is_uhd_pid_error(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_PID))
#define Is_uhd_timeout_error(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_TIMEOUT))
#define Is_uhd_crc16_error(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_CRC16))
#define uhd_get_error_counter(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPERR[p], UOTGHS_HSTPIPERR_COUNTER))
//! @}
//! Pipe data management
//! @{
#define uhd_data_toggle(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_DTSEQ))
#define uhd_enable_bank_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_NBUSYBKES)
#define uhd_disable_bank_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_NBUSYBKEC)
#define Is_uhd_bank_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_NBUSYBKE))
#define uhd_nb_busy_bank(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_NBUSYBK_Msk))
#define uhd_current_bank(p) (Rd_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_CURRBK_Msk ))
#define uhd_enable_short_packet_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_SHORTPACKETES)
#define uhd_disable_short_packet_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_SHORTPACKETIEC)
#define Is_uhd_short_packet_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_SHORTPACKETIE)) )
#define uhd_ack_short_packet(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_SHORTPACKETIC)
#define Is_uhd_short_packet(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_SHORTPACKETI))
#define uhd_byte_count(p) (Rd_bitfield(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_PBYCT_Msk))
#define Is_uhd_fifocon(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_FIFOCON))
#define uhd_ack_fifocon(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_FIFOCONC)
#define uhd_enable_setup_ready_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_TXSTPES)
#define uhd_disable_setup_ready_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_TXSTPEC)
#define Is_uhd_setup_ready_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_TXSTPE))
#define uhd_ack_setup_ready(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_TXSTPIC)
#define Is_uhd_setup_ready(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_TXSTPI))
#define uhd_enable_in_received_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_RXINES)
#define uhd_disable_in_received_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_RXINEC)
#define Is_uhd_in_received_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_RXINE))
#define uhd_ack_in_received(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_RXINIC)
#define Is_uhd_in_received(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RXINI))
#define uhd_enable_out_ready_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_TXOUTES)
#define uhd_disable_out_ready_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_TXOUTEC)
#define Is_uhd_out_ready_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_TXOUTE))
#define uhd_ack_out_ready(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_TXOUTIC)
#define Is_uhd_out_ready(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_TXOUTI))
#define uhd_raise_out_ready(p) (UOTGHS->UOTGHS_HSTPIPIFR[p] = UOTGHS_HSTPIPIFR_TXOUTIS)
#define uhd_enable_nak_received_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIER[p] = UOTGHS_HSTPIPIER_NAKEDES)
#define uhd_disable_nak_received_interrupt(p) (UOTGHS->UOTGHS_HSTPIPIDR[p] = UOTGHS_HSTPIPIDR_NAKEDEC)
#define Is_uhd_nak_received_interrupt_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPIMR[p], UOTGHS_HSTPIPIMR_NAKEDE))
#define uhd_ack_nak_received(p) (UOTGHS->UOTGHS_HSTPIPICR[p] = UOTGHS_HSTPIPICR_NAKEDIC)
#define Is_uhd_nak_received(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_NAKEDI))
#define Is_uhd_read_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RWALL))
#define Is_uhd_write_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPISR[p], UOTGHS_HSTPIPISR_RWALL ))
#define uhd_enable_continuous_in_mode(p) (Set_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INMODE))
#define uhd_disable_continuous_in_mode(p) (Clr_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INMODE))
#define Is_uhd_continuous_in_mode_enabled(p) (Tst_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INMODE))
#define uhd_in_request_number(p, in_num) (Set_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], (in_num)-1))
#define uhd_get_in_request_number(p) (((Rd_bits(UOTGHS->UOTGHS_HSTPIPINRQ[p], UOTGHS_HSTPIPINRQ_INRQ_Msk))>>UOTGHS_HSTPIPINRQ_INRQ_Pos)+1)
//! @}
//! Maximum transfer size on USB DMA
#define UHD_PIPE_MAX_TRANS 0x8000
//! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected pipe.
//! @param p Target Pipe number
//! @param scale Data scale in bits: 64, 32, 16 or 8
//! @return Volatile 64-, 32-, 16- or 8-bit data pointer to FIFO data register
//! @warning It is up to the user of this macro to make sure that all accesses
//! are aligned with their natural boundaries except 64-bit accesses which
//! require only 32-bit alignment.
//! @warning It is up to the user of this macro to make sure that used HSB
//! addresses are identical to the DPRAM internal pointer modulo 32 bits.
#define uhd_get_pipe_fifo_access(p, scale) \
(((volatile TPASTE2(U, scale) (*)[UHD_PIPE_MAX_TRANS / ((scale) / 8)])UOTGHS_RAM_ADDR)[(p)])
#endif /* UOTGHS_HOST_H_INCLUDED */
| 25,167
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C++
|
.h
| 344
| 71.805233
| 153
| 0.679514
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,406
|
rtc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/rtc.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for Real Time Clock (RTC) controller.
*
*/
#ifndef _RTC_
#define _RTC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "../chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define RTC_HOUR_BIT_LEN_MASK 0x3F
#define RTC_MIN_BIT_LEN_MASK 0x7F
#define RTC_SEC_BIT_LEN_MASK 0x7F
#define RTC_CENT_BIT_LEN_MASK 0x7F
#define RTC_YEAR_BIT_LEN_MASK 0xFF
#define RTC_MONTH_BIT_LEN_MASK 0x1F
#define RTC_DATE_BIT_LEN_MASK 0x3F
#define RTC_WEEK_BIT_LEN_MASK 0x07
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void RTC_SetHourMode( Rtc* pRtc, uint32_t dwMode ) ;
extern uint32_t RTC_GetHourMode( Rtc* pRtc ) ;
extern void RTC_EnableIt( Rtc* pRtc, uint32_t dwSources ) ;
extern void RTC_DisableIt( Rtc* pRtc, uint32_t dwSources ) ;
extern int RTC_SetTime( Rtc* pRtc, uint8_t ucHour, uint8_t ucMinute, uint8_t ucSecond ) ;
extern void RTC_GetTime( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ;
extern int RTC_SetTimeAlarm( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ;
extern void RTC_GetDate( Rtc* pRtc, uint16_t *pwYear, uint8_t *pucMonth, uint8_t *pucDay, uint8_t *pucWeek ) ;
extern int RTC_SetDate( Rtc* pRtc, uint16_t wYear, uint8_t ucMonth, uint8_t ucDay, uint8_t ucWeek ) ;
extern int RTC_SetDateAlarm( Rtc* pRtc, uint8_t *pucMonth, uint8_t *pucDay ) ;
extern void RTC_ClearSCCR( Rtc* pRtc, uint32_t dwMask ) ;
extern uint32_t RTC_GetSR( Rtc* pRtc, uint32_t dwMask ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _RTC_ */
| 3,563
|
C++
|
.h
| 74
| 46.310811
| 110
| 0.59146
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,407
|
pmc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/pmc.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef PMC_H_INCLUDED
#define PMC_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/** Bit mask for peripheral clocks (PCER0) */
#define PMC_MASK_STATUS0 (0xFFFFFFFC)
/** Bit mask for peripheral clocks (PCER1) */
#define PMC_MASK_STATUS1 (0xFFFFFFFF)
/** Loop counter timeout value */
#define PMC_TIMEOUT (2048)
/** Key to unlock CKGR_MOR register */
#define PMC_CKGR_MOR_KEY_VALUE CKGR_MOR_KEY(0x37)
/** Key used to write SUPC registers */
#define SUPC_KEY_VALUE ((uint32_t) 0xA5)
/** PMC xtal statup time */
#define PMC_XTAL_STARTUP_TIME (0x3F)
/** Mask to access fast startup input */
#define PMC_FAST_STARTUP_Msk (0xFFFFu)
/** PMC_WPMR Write Protect KEY, unlock it */
#define PMC_WPMR_WPKEY_VALUE PMC_WPMR_WPKEY((uint32_t) 0x504D43)
/** Using external oscillator */
#define PMC_OSC_XTAL 0
/** Oscillator in bypass mode */
#define PMC_OSC_BYPASS 1
#define PMC_PCK_0 0 /* PCK0 ID */
#define PMC_PCK_1 1 /* PCK1 ID */
#define PMC_PCK_2 2 /* PCK2 ID */
/**
* \name Master clock (MCK) Source and Prescaler configuration
*
* The following functions may be used to select the clock source and
* prescaler for the master clock.
*/
//@{
void pmc_mck_set_prescaler(uint32_t ul_pres);
void pmc_mck_set_source(uint32_t ul_source);
uint32_t pmc_switch_mck_to_sclk(uint32_t ul_pres);
uint32_t pmc_switch_mck_to_mainck(uint32_t ul_pres);
uint32_t pmc_switch_mck_to_pllack(uint32_t ul_pres);
#if (SAM3S_SERIES || SAM4S_SERIES)
uint32_t pmc_switch_mck_to_pllbck(uint32_t ul_pres);
#endif
#if (SAM3XA_SERIES || SAM3U_SERIES)
uint32_t pmc_switch_mck_to_upllck(uint32_t ul_pres);
#endif
//@}
/**
* \name Slow clock (SLCK) oscillator and configuration
*
*/
//@{
void pmc_switch_sclk_to_32kxtal(uint32_t ul_bypass);
uint32_t pmc_osc_is_ready_32kxtal(void);
//@}
/**
* \name Main Clock (MAINCK) oscillator and configuration
*
*/
//@{
void pmc_switch_mainck_to_fastrc(uint32_t ul_moscrcf);
void pmc_osc_enable_fastrc(uint32_t ul_rc);
void pmc_osc_disable_fastrc(void);
void pmc_switch_mainck_to_xtal(uint32_t ul_bypass);
void pmc_osc_disable_xtal(uint32_t ul_bypass);
uint32_t pmc_osc_is_ready_mainck(void);
//@}
/**
* \name PLL oscillator and configuration
*
*/
//@{
void pmc_enable_pllack(uint32_t mula, uint32_t pllacount, uint32_t diva);
void pmc_disable_pllack(void);
uint32_t pmc_is_locked_pllack(void);
#if (SAM3S_SERIES || SAM4S_SERIES)
void pmc_enable_pllbck(uint32_t mulb, uint32_t pllbcount, uint32_t divb);
void pmc_disable_pllbck(void);
uint32_t pmc_is_locked_pllbck(void);
#endif
#if (SAM3XA_SERIES || SAM3U_SERIES)
void pmc_enable_upll_clock(void);
void pmc_disable_upll_clock(void);
uint32_t pmc_is_locked_upll(void);
#endif
//@}
/**
* \name Peripherals clock configuration
*
*/
//@{
uint32_t pmc_enable_periph_clk(uint32_t ul_id);
uint32_t pmc_disable_periph_clk(uint32_t ul_id);
void pmc_enable_all_periph_clk(void);
void pmc_disable_all_periph_clk(void);
uint32_t pmc_is_periph_clk_enabled(uint32_t ul_id);
//@}
/**
* \name Programmable clock Source and Prescaler configuration
*
* The following functions may be used to select the clock source and
* prescaler for the specified programmable clock.
*/
//@{
void pmc_pck_set_prescaler(uint32_t ul_id, uint32_t ul_pres);
void pmc_pck_set_source(uint32_t ul_id, uint32_t ul_source);
uint32_t pmc_switch_pck_to_sclk(uint32_t ul_id, uint32_t ul_pres);
uint32_t pmc_switch_pck_to_mainck(uint32_t ul_id, uint32_t ul_pres);
uint32_t pmc_switch_pck_to_pllack(uint32_t ul_id, uint32_t ul_pres);
#if (SAM3S_SERIES || SAM4S_SERIES)
uint32_t pmc_switch_pck_to_pllbck(uint32_t ul_id, uint32_t ul_pres);
#endif
#if (SAM3XA_SERIES || SAM3U_SERIES)
uint32_t pmc_switch_pck_to_upllck(uint32_t ul_id, uint32_t ul_pres);
#endif
void pmc_enable_pck(uint32_t ul_id);
void pmc_disable_pck(uint32_t ul_id);
void pmc_enable_all_pck(void);
void pmc_disable_all_pck(void);
uint32_t pmc_is_pck_enabled(uint32_t ul_id);
//@}
/**
* \name USB clock configuration
*
*/
//@{
#if (SAM3S_SERIES || SAM3XA_SERIES || SAM4S_SERIES)
void pmc_switch_udpck_to_pllack(uint32_t ul_usbdiv);
#endif
#if (SAM3S_SERIES || SAM4S_SERIES)
void pmc_switch_udpck_to_pllbck(uint32_t ul_usbdiv);
#endif
#if (SAM3XA_SERIES)
void pmc_switch_udpck_to_upllck(uint32_t ul_usbdiv);
#endif
#if (SAM3S_SERIES || SAM3XA_SERIES || SAM4S_SERIES)
void pmc_enable_udpck(void);
void pmc_disable_udpck(void);
#endif
//@}
/**
* \name Interrupt and status management
*
*/
//@{
void pmc_enable_interrupt(uint32_t ul_sources);
void pmc_disable_interrupt(uint32_t ul_sources);
uint32_t pmc_get_interrupt_mask(void);
uint32_t pmc_get_status(void);
//@}
/**
* \name Power management
*
* The following functions are used to configure sleep mode and additionnal
* wake up inputs.
*/
//@{
void pmc_set_fast_startup_input(uint32_t ul_inputs);
void pmc_clr_fast_startup_input(uint32_t ul_inputs);
void pmc_enable_sleepmode(uint8_t uc_type);
void pmc_enable_waitmode(void);
void pmc_enable_backupmode(void);
//@}
/**
* \name Write protection
*
*/
//@{
void pmc_set_writeprotect(uint32_t ul_enable);
uint32_t pmc_get_writeprotect_status(void);
//@}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
//! @}
/**
* \page sam_pmc_quickstart Quick start guide for the SAM PMC module
*
* This is the quick start guide for the \ref pmc_group "PMC module", with
* step-by-step instructions on how to configure and use the driver in a
* selection of use cases.
*
* The use cases contain several code fragments. The code fragments in the
* steps for setup can be copied into a custom initialization function, while
* the steps for usage can be copied into, e.g., the main application function.
*
* \section pmc_use_cases PMC use cases
* - \ref pmc_basic_use_case Basic use case - Switch Main Clock sources
* - \ref pmc_use_case_2 Advanced use case - Configure Programmable Clocks
*
* \section pmc_basic_use_case Basic use case - Switch Main Clock sources
* In this use case, the PMC module is configured for a variety of system clock
* sources and speeds. A LED is used to visually indicate the current clock
* speed as the source is switched.
*
* \section pmc_basic_use_case_setup Setup
*
* \subsection pmc_basic_use_case_setup_prereq Prerequisites
* -# \ref gpio_group "General Purpose I/O Management (gpio)"
*
* \subsection pmc_basic_use_case_setup_code Code
* The following function needs to be added to the user application, to flash a
* board LED a variable number of times at a rate given in CPU ticks.
*
* \code
* #define FLASH_TICK_COUNT 0x00012345
*
* void flash_led(uint32_t tick_count, uint8_t flash_count)
* {
* SysTick->CTRL = SysTick_CTRL_ENABLE_Msk;
* SysTick->LOAD = tick_count;
*
* while (flash_count--)
* {
* gpio_toggle_pin(LED0_GPIO);
* while (!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk));
* gpio_toggle_pin(LED0_GPIO);
* while (!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk));
* }
* }
* \endcode
*
* \section pmc_basic_use_case_usage Use case
*
* \subsection pmc_basic_use_case_usage_code Example code
* Add to application C-file:
* \code
* for (;;)
* {
* pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
* flash_led(FLASH_TICK_COUNT, 5);
* pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
* flash_led(FLASH_TICK_COUNT, 5);
* pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
* flash_led(FLASH_TICK_COUNT, 5);
* pmc_switch_mainck_to_xtal(0);
* flash_led(FLASH_TICK_COUNT, 5);
* }
* \endcode
*
* \subsection pmc_basic_use_case_usage_flow Workflow
* -# Wrap the code in an infinite loop:
* \code
* for (;;)
* \endcode
* -# Switch the Master CPU frequency to the internal 12MHz RC oscillator, flash
* a LED on the board several times:
* \code
* pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
* flash_led(FLASH_TICK_COUNT, 5);
* \endcode
* -# Switch the Master CPU frequency to the internal 8MHz RC oscillator, flash
* a LED on the board several times:
* \code
* pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
* flash_led(FLASH_TICK_COUNT, 5);
* \endcode
* -# Switch the Master CPU frequency to the internal 4MHz RC oscillator, flash
* a LED on the board several times:
* \code
* pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
* flash_led(FLASH_TICK_COUNT, 5);
* \endcode
* -# Switch the Master CPU frequency to the external crystal oscillator, flash
* a LED on the board several times:
* \code
* pmc_switch_mainck_to_xtal(0);
* flash_led(FLASH_TICK_COUNT, 5);
* \endcode
*/
/**
* \page pmc_use_case_2 Use case #2 - Configure Programmable Clocks
* In this use case, the PMC module is configured to start the Slow Clock from
* an attached 32KHz crystal, and start one of the Programmable Clock modules
* sourced from the Slow Clock divided down with a prescale factor of 64.
*
* \section pmc_use_case_2_setup Setup
*
* \subsection pmc_use_case_2_setup_prereq Prerequisites
* -# \ref pio_group "Parallel Input/Output Controller (pio)"
*
* \subsection pmc_use_case_2_setup_code Code
* The following code must be added to the user application:
* \code
* pio_set_peripheral(PIOA, PIO_PERIPH_B, PIO_PA17);
* \endcode
*
* \subsection pmc_use_case_2_setup_code_workflow Workflow
* -# Configure the PCK1 pin to output on a specific port pin (in this case,
* PIOA pin 17) of the microcontroller.
* \code
* pio_set_peripheral(PIOA, PIO_PERIPH_B, PIO_PA17);
* \endcode
* \note The peripheral selection and pin will vary according to your selected
* SAM device model. Refer to the "Peripheral Signal Multiplexing on I/O
* Lines" of your device's datasheet.
*
* \section pmc_use_case_2_usage Use case
* The generated PCK1 clock output can be viewed on an oscilloscope attached to
* the correct pin of the microcontroller.
*
* \subsection pmc_use_case_2_usage_code Example code
* Add to application C-file:
* \code
* pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
* pmc_switch_pck_to_sclk(PMC_PCK_1, PMC_PCK_PRES_CLK_64);
* pmc_enable_pck(PMC_PCK_1);
*
* for (;;)
* {
* // Do Nothing
* }
* \endcode
*
* \subsection pmc_use_case_2_usage_flow Workflow
* -# Switch the Slow Clock source input to an external 32KHz crystal:
* \code
* pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
* \endcode
* -# Switch the Programmable Clock module PCK1 source clock to the Slow Clock,
* with a prescaler of 64:
* \code
* pmc_switch_pck_to_sclk(PMC_PCK_1, PMC_PCK_PRES_CLK_64);
* \endcode
* -# Enable Programmable Clock module PCK1:
* \code
* pmc_enable_pck(PMC_PCK_1);
* \endcode
* -# Enter an infinite loop:
* \code
* for (;;)
* {
* // Do Nothing
* }
* \endcode
*/
#endif /* PMC_H_INCLUDED */
| 12,598
|
C++
|
.h
| 374
| 31.957219
| 80
| 0.697141
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,408
|
can.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/can.h
|
/**
* \file
*
* \brief Controller Area Network (CAN) driver module for SAM.
*
* Copyright (c) 2011 - 2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef CAN_H_INCLUDED
#define CAN_H_INCLUDED
#include "../chip.h"
/** @cond 0 */
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/** @endcond */
/** Define the Mailbox mask for eight mailboxes. */
#define GLOBAL_MAILBOX_MASK 0x000000ff
/** Disable all interrupt mask */
#define CAN_DISABLE_ALL_INTERRUPT_MASK 0xffffffff
/** Define the typical baudrate for CAN communication in KHz. */
#define CAN_BPS_1000K 1000
#define CAN_BPS_800K 800
#define CAN_BPS_500K 500
#define CAN_BPS_250K 250
#define CAN_BPS_125K 125
#define CAN_BPS_50K 50
#define CAN_BPS_25K 25
#define CAN_BPS_10K 10
#define CAN_BPS_5K 5
/** Define the mailbox mode. */
#define CAN_MB_DISABLE_MODE 0
#define CAN_MB_RX_MODE 1
#define CAN_MB_RX_OVER_WR_MODE 2
#define CAN_MB_TX_MODE 3
#define CAN_MB_CONSUMER_MODE 4
#define CAN_MB_PRODUCER_MODE 5
/** Define CAN mailbox transfer status code. */
#define CAN_MAILBOX_TRANSFER_OK 0 //! Read from or write into mailbox successfully.
#define CAN_MAILBOX_NOT_READY 0x01 //! Receiver is empty or transmitter is busy.
#define CAN_MAILBOX_RX_OVER 0x02 //! Message overwriting happens or there're messages lost in different receive modes.
#define CAN_MAILBOX_RX_NEED_RD_AGAIN 0x04 //! Application needs to re-read the data register in Receive with Overwrite mode.
/** Define the struct for CAN message mailbox. */
typedef struct {
uint32_t ul_mb_idx;
uint8_t uc_obj_type; //! Mailbox object type, one of the six different objects.
uint8_t uc_id_ver; //! 0 stands for standard frame, 1 stands for extended frame.
uint8_t uc_length; //! Received data length or transmitted data length.
uint8_t uc_tx_prio; //! Mailbox priority, no effect in receive mode.
uint32_t ul_status; //! Mailbox status register value.
uint32_t ul_id_msk; //! No effect in transmit mode.
uint32_t ul_id; //! Received frame ID or the frame ID to be transmitted.
uint32_t ul_fid; //! Family ID.
uint32_t ul_datal;
uint32_t ul_datah;
} can_mb_conf_t;
/**
* \defgroup sam_driver_can_group Controller Area Network (CAN) Driver
*
* See \ref sam_can_quickstart.
*
* \par Purpose
*
* The CAN controller provides all the features required to implement
* the serial communication protocol CAN defined by Robert Bosch GmbH,
* the CAN specification. This is a driver for configuration, enabling,
* disabling and use of the CAN peripheral.
*
* @{
*/
uint32_t can_init(Can *p_can, uint32_t ul_mck, uint32_t ul_baudrate);
void can_enable(Can *p_can);
void can_disable(Can *p_can);
void can_disable_low_power_mode(Can *p_can);
void can_enable_low_power_mode(Can *p_can);
void can_disable_autobaud_listen_mode(Can *p_can);
void can_enable_autobaud_listen_mode(Can *p_can);
void can_disable_overload_frame(Can *p_can);
void can_enable_overload_frame(Can *p_can);
void can_set_timestamp_capture_point(Can *p_can, uint32_t ul_flag);
void can_disable_time_triggered_mode(Can *p_can);
void can_enable_time_triggered_mode(Can *p_can);
void can_disable_timer_freeze(Can *p_can);
void can_enable_timer_freeze(Can *p_can);
void can_disable_tx_repeat(Can *p_can);
void can_enable_tx_repeat(Can *p_can);
void can_set_rx_sync_stage(Can *p_can, uint32_t ul_stage);
void can_enable_interrupt(Can *p_can, uint32_t dw_mask);
void can_disable_interrupt(Can *p_can, uint32_t dw_mask);
uint32_t can_get_interrupt_mask(Can *p_can);
uint32_t can_get_status(Can *p_can);
uint32_t can_get_internal_timer_value(Can *p_can);
uint32_t can_get_timestamp_value(Can *p_can);
uint8_t can_get_tx_error_cnt(Can *p_can);
uint8_t can_get_rx_error_cnt(Can *p_can);
void can_reset_internal_timer(Can *p_can);
void can_global_send_transfer_cmd(Can *p_can, uint8_t uc_mask);
void can_global_send_abort_cmd(Can *p_can, uint8_t uc_mask);
/*
* Mailbox functions
*/
void can_mailbox_set_timemark(Can *p_can, uint8_t uc_index, uint16_t us_cnt);
uint32_t can_mailbox_get_status(Can *p_can, uint8_t uc_index);
void can_mailbox_send_transfer_cmd(Can *p_can, uint8_t uc_index);
void can_mailbox_send_abort_cmd(Can *p_can, uint8_t uc_index);
void can_mailbox_init(Can *p_can, can_mb_conf_t *p_mailbox);
uint32_t can_mailbox_read(Can *p_can, can_mb_conf_t *p_mailbox);
uint32_t can_mailbox_write(Can *p_can, can_mb_conf_t *p_mailbox);
uint32_t can_mailbox_tx_remote_frame(Can *p_can, can_mb_conf_t *p_mailbox);
void can_reset_all_mailbox(Can *p_can);
// from wilfredo
uint32_t can_reset_mailbox_data(can_mb_conf_t *p_mailbox);
/** @} */
/** @cond 0 */
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/** @endcond */
/**
* \page sam_can_quickstart Quickstart guide for SAM CAN module.
*
* This is the quickstart guide for the \ref sam_drivers_can_group "SAM CAN module",
* with step-by-step instructions on how to configure and use the drivers in a
* selection of use cases.
*
* The use cases contain several code fragments. The code fragments in the
* steps for setup can be copied into a custom initialization function, while
* the steps for usage can be copied into, e.g., the main application function.
*
* \section can_basic_use_case Basic use case
* In this basic use case, as CAN module needs to work in network, two CAN modules
* need to be configured. CAN0 mailbox 0 is configured as transmitter, and CAN1 mailbox 0
* is configured as receiver. The communication baudrate is 1Mbit/s.
*
* \section can_basic_use_case_setup Setup steps
*
* \subsection can_basic_use_case_setup_prereq Prerequisites
* - \ref group_pmc "Power Management Controller driver"
* - \ref group_sn65hvd234_transceiver "CAN transceiver driver"
*
* \subsection can_basic_use_case_setup_code Example code
* Add to application initialization:
* \code
* can_mb_conf_t can0_mailbox;
* can_mb_conf_t can1_mailbox;
*
* pmc_enable_periph_clk(ID_CAN0);
* pmc_enable_periph_clk(ID_CAN1);
*
* can_init(CAN0, ul_sysclk, CAN_BPS_1000K);
* can_init(CAN1, ul_sysclk, CAN_BPS_1000K);
*
* can_reset_all_mailbox(CAN0);
* can_reset_all_mailbox(CAN1);
*
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.uc_obj_type = CAN_MB_RX_MODE;
* can1_mailbox.ul_id_msk = CAN_MAM_MIDvA_Msk | CAN_MAM_MIDvB_Msk;
* can1_mailbox.ul_id = CAN_MID_MIDvA(0x07);
* can_mailbox_init(CAN1, &can1_mailbox);
*
* can0_mailbox.ul_mb_idx = 0;
* can0_mailbox.uc_obj_type = CAN_MB_TX_MODE;
* can0_mailbox.uc_tx_prio = 15;
* can0_mailbox.uc_id_ver = 0;
* can0_mailbox.ul_id_msk = 0;
* can_mailbox_init(CAN0, &can0_mailbox);
*
* can0_mailbox.ul_id = CAN_MID_MIDvA(0x07);
* can0_mailbox.ul_datal = 0x12345678;
* can0_mailbox.ul_datah = 0x87654321;
* can0_mailbox.uc_length = 8;
* can_mailbox_write(CAN0, &can0_mailbox);
* \endcode
*
* \subsection can_basic_use_case_setup_flow Workflow
* -# Define the CAN0 and CAN1 Transfer mailbox structure:
* - \code
* can_mb_conf_t can0_mailbox;
* can_mb_conf_t can1_mailbox;
* \endcode
* -# Enable the module clock for CAN0 and CAN1:
* - \code
* pmc_enable_periph_clk(ID_CAN0);
* pmc_enable_periph_clk(ID_CAN1);
* \endcode
* -# Initialize CAN0 and CAN1, baudrate is 1Mb/s:
* - \code
* can_init(CAN0, ul_sysclk, CAN_BPS_1000K);
* can_init(CAN1, ul_sysclk, CAN_BPS_1000K);
* \endcode
* - \note The CAN transceiver should be configured before initializing the CAN module.
* -# Reset all CAN0 and CAN1 mailboxes:
* - \code
* can_reset_all_mailbox(CAN0);
* can_reset_all_mailbox(CAN1);
* \endcode
* -# Initialize CAN1 mailbox 0 as receiver, frame ID is 0x07:
* - \code
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.uc_obj_type = CAN_MB_RX_MODE;
* can1_mailbox.ul_id_msk = CAN_MAM_MIDvA_Msk | CAN_MAM_MIDvB_Msk;
* can1_mailbox.ul_id = CAN_MID_MIDvA(0x07);
* can_mailbox_init(CAN1, &can1_mailbox);
* \endcode
* -# Initialize CAN0 mailbox 0 as transmitter, transmit priority is 15:
* - \code
* can0_mailbox.ul_mb_idx = 0;
* can0_mailbox.uc_obj_type = CAN_MB_TX_MODE;
* can0_mailbox.uc_tx_prio = 15;
* can0_mailbox.uc_id_ver = 0;
* can0_mailbox.ul_id_msk = 0;
* can_mailbox_init(CAN0, &can0_mailbox);
* \endcode
* -# Prepare transmit ID, data and data length in CAN0 mailbox 0:
* - \code
* can0_mailbox.ul_id = CAN_MID_MIDvA(0x07);
* can0_mailbox.ul_datal = 0x12345678;
* can0_mailbox.ul_datah = 0x87654321;
* can0_mailbox.uc_length = 8;
* can_mailbox_write(CAN0, &can0_mailbox);
* \endcode
*
* \section can_basic_use_case_usage Usage steps
*
* \subsection can_basic_use_case_usage_code Example code
* Add to, e.g., main loop in application C-file:
* \code
* can_global_send_transfer_cmd(CAN0, CAN_TCR_MB0);
*
* while (!(can_mailbox_get_status(CAN1, 0) & CAN_MSR_MRDY)) {
* }
*
* can_mailbox_read(CAN1, &can1_mailbox);
* \endcode
*
* \subsection can_basic_use_case_usage_flow Workflow
* -# Send out data in CAN0 mailbox 0:
* - \code can_global_send_transfer_cmd(CAN0, CAN_TCR_MB0); \endcode
* -# Wait for CAN1 mailbox 0 to receive the data:
* - \code
* while (!(can_mailbox_get_status(CAN1, 0) & CAN_MSR_MRDY)) {
* }
* \endcode
* -# Read the received data from CAN1 mailbox 0:
* - \code can_mailbox_read(CAN1, &can1_mailbox); \endcode
*
* \section can_use_cases Advanced use cases
* For more advanced use of the CAN driver, see the following use cases:
* - \subpage can_use_case_1 : Two CAN modules work in PRODUCER and CONSUMER mode
* respectively, use CAN interrupt handler to check whether the communication has been
* completed.
*/
/**
* \page can_use_case_1 Use case #1
*
* In this use case, CAN0 mailbox 0 works in PRODUCER mode, and CAN1 mailbox 0
* works in CONSUMER mode. While CAN1 mailbox 0 receives a data frame from the bus,
* an interrupt is triggered.
*
* \section can_use_case_1_setup Setup steps
*
* \subsection can_basic_use_case_setup_prereq Prerequisites
* - \ref group_pmc "Power Management Controller driver"
* - \ref group_sn65hvd234_transceiver "CAN transceiver driver"
*
* \subsection can_use_case_1_setup_code Example code
* Add to application C-file:
* \code
* can_mb_conf_t can0_mailbox;
* can_mb_conf_t can1_mailbox;
* volatile uint32_t g_ul_recv_status = 0;
* \endcode
*
* \code
* void CAN1_Handler(void)
* {
* uint32_t ul_status;
*
* ul_status = can_mailbox_get_status(CAN1, 0);
* if ((ul_status & CAN_MSR_MRDY) == CAN_MSR_MRDY) {
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.ul_status = ul_status;
* can_mailbox_read(CAN1, &can1_mailbox);
* g_ul_recv_status = 1;
* }
* }
* \endcode
*
* \code
* pmc_enable_periph_clk(ID_CAN0);
* pmc_enable_periph_clk(ID_CAN1);
*
* can_init(CAN0, ul_sysclk, CAN_BPS_1000K);
* can_init(CAN1, ul_sysclk, CAN_BPS_1000K);
*
* can_reset_all_mailbox(CAN0);
* can_reset_all_mailbox(CAN1);
*
* can0_mailbox.ul_mb_idx = 0;
* can0_mailbox.uc_obj_type = CAN_MB_PRODUCER_MODE;
* can0_mailbox.ul_id_msk = 0;
* can0_mailbox.ul_id = CAN_MID_MIDvA(0x0b);
* can_mailbox_init(CAN0, &can0_mailbox);
*
* can0_mailbox.ul_datal = 0x11223344;
* can0_mailbox.ul_datah = 0x44332211;
* can0_mailbox.uc_length = 8;
* can_mailbox_write(CAN0, &can0_mailbox);
*
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.uc_obj_type = CAN_MB_CONSUMER_MODE;
* can1_mailbox.uc_tx_prio = 15;
* can1_mailbox.ul_id_msk = CAN_MID_MIDvA_Msk | CAN_MID_MIDvB_Msk;
* can1_mailbox.ul_id = CAN_MID_MIDvA(0x0b);
* can_mailbox_init(CAN1, &can1_mailbox);
*
* can_enable_interrupt(CAN1, CAN_IER_MB0);
* NVIC_EnableIRQ(CAN1_IRQn);
* \endcode
*
* \subsection can_use_case_1_setup_flow Workflow
* -# Define the CAN0 and CAN1 Transfer mailbox structure:
* - \code
* can_mb_conf_t can0_mailbox;
* can_mb_conf_t can1_mailbox;
* \endcode
* -# Define the receive flag that is changed in CAN1 ISR handler:
* - \code volatile uint32_t g_ul_recv_status = 0; \endcode
* -# Define the CAN1 ISR handler in the application:
* - \code void CAN1_Handler(void); \endcode
* -# In CAN1_Handler(), get CAN1 mailbox 0 status:
* - \code ul_status = can_mailbox_get_status(CAN1, 0); \endcode
* -# In CAN1_Handler(), check whether the mailbox 0 has received a data frame:
* - \code
* if ((ul_status & CAN_MSR_MRDY) == CAN_MSR_MRDY) {
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.ul_status = ul_status;
* can_mailbox_read(CAN1, &can1_mailbox);
* g_ul_recv_status = 1;
* }
* \endcode
* -# In CAN1_Handler(), if mailbox 0 is ready, read the received data from CAN1 mailbox 0:
* - \code
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.ul_status = ul_status;
* can_mailbox_read(CAN1, &can1_mailbox);
* \endcode
* -# In CAN1_Handler(), if mailbox 0 is ready, set up the receive flag:
* - \code g_ul_recv_status = 1; \endcode
* -# Enable the module clock for CAN0 and CAN1:
* - \code
* pmc_enable_periph_clk(ID_CAN0);
* pmc_enable_periph_clk(ID_CAN1);
* \endcode
* -# Initialize CAN0 and CAN1, baudrate is 1Mb/s:
* - \code
* can_init(CAN0, ul_sysclk, CAN_BPS_1000K);
* can_init(CAN1, ul_sysclk, CAN_BPS_1000K);
* \endcode
* - \note The CAN transceiver should be configured before initializing the CAN module.
* -# Reset all CAN0 and CAN1 mailboxes:
* - \code
* can_reset_all_mailbox(CAN0);
* can_reset_all_mailbox(CAN1);
* \endcode
* -# Initialize CAN0 mailbox 0 as PRODUCER:
* - \code
* can0_mailbox.ul_mb_idx = 0;
* can0_mailbox.uc_obj_type = CAN_MB_PRODUCER_MODE;
* can0_mailbox.ul_id_msk = 0;
* can0_mailbox.ul_id = CAN_MID_MIDvA(0x0b);
* can_mailbox_init(CAN0, &can0_mailbox);
* \endcode
* -# Prepare the response information when it receives a remote frame:
* - \code
* can0_mailbox.ul_datal = 0x11223344;
* can0_mailbox.ul_datah = 0x44332211;
* can0_mailbox.uc_length = 8;
* can_mailbox_write(CAN0, &can0_mailbox);
* \endcode
* -# Initialize CAN1 mailbox 0 as CONSUMER:
* - \code
* can1_mailbox.ul_mb_idx = 0;
* can1_mailbox.uc_obj_type = CAN_MB_CONSUMER_MODE;
* can1_mailbox.uc_tx_prio = 15;
* can1_mailbox.ul_id_msk = CAN_MID_MIDvA_Msk | CAN_MID_MIDvB_Msk;
* can1_mailbox.ul_id = CAN_MID_MIDvA(0x0b);
* can_mailbox_init(CAN1, &can1_mailbox);
* \endcode
* -# Enable the CAN1 mailbox 0 interrupt:
* - \code
* can_enable_interrupt(CAN1, CAN_IER_MB0);
* NVIC_EnableIRQ(CAN1_IRQn);
* \endcode
*
* \section can_use_case_1_usage Usage steps
*
* \subsection can_use_case_1_usage_code Example code
* \code
* can_global_send_transfer_cmd(CAN0, CAN_TCR_MB0);
* can_global_send_transfer_cmd(CAN1, CAN_TCR_MB0);
*
* while (!g_ul_recv_status) {
* }
* \endcode
*
* \subsection can_use_case_1_usage_flow Workflow
* -# Enable CAN0 mailbox 0 to receive remote frame and respond it:
* - \code can_global_send_transfer_cmd(CAN0, CAN_TCR_MB0); \endcode
* -# Enable CAN1 mailbox 0 to send out a remote frame and then receive data frame from bus:
* - \code can_global_send_transfer_cmd(CAN1, CAN_TCR_MB0); \endcode
* -# Wait for the communication to be completed.
* - \code
* while (!g_ul_recv_status) {
* }
* \endcode
*/
#endif /* CAN_H_INCLUDED */
| 17,390
|
C++
|
.h
| 457
| 36.177243
| 129
| 0.681797
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,409
|
dacc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/dacc.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef DACC_H_INCLUDED
#define DACC_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
//! DACC return codes
typedef enum dacc_rc {
DACC_RC_OK = 0, //!< Operation OK
DACC_RC_INVALID_PARAM //!< Invalid parameter
} dacc_rc_t;
#if SAM3N_SERIES
//! DACC resolution in number of data bits
# define DACC_RESOLUTION 10
#else
//! DACC resolution in number of data bits
# define DACC_RESOLUTION 12
#endif
//! DACC max data value
#define DACC_MAX_DATA ((1 << DACC_RESOLUTION) - 1)
void dacc_reset(Dacc *p_dacc);
uint32_t dacc_set_trigger(Dacc *p_dacc, uint32_t ul_trigger);
void dacc_disable_trigger(Dacc *p_dacc);
uint32_t dacc_set_transfer_mode(Dacc *p_dacc, uint32_t ul_mode);
void dacc_enable_interrupt(Dacc *p_dacc, uint32_t ul_interrupt_mask);
void dacc_disable_interrupt(Dacc *p_dacc, uint32_t ul_interrupt_mask);
uint32_t dacc_get_interrupt_mask(Dacc *p_dacc);
uint32_t dacc_get_interrupt_status(Dacc *p_dacc);
void dacc_write_conversion_data(Dacc *p_dacc, uint32_t ul_data);
void dacc_set_writeprotect(Dacc *p_dacc, uint32_t ul_enable);
uint32_t dacc_get_writeprotect_status(Dacc *p_dacc);
Pdc *dacc_get_pdc_base(Dacc *p_dacc);
#if (SAM3N_SERIES) || defined(__DOXYGEN__)
void dacc_enable(Dacc *p_dacc);
void dacc_disable(Dacc *p_dacc);
uint32_t dacc_set_timing(Dacc *p_dacc, uint32_t ul_startup,
uint32_t ul_clock_divider);
#endif /* (SAM3N_SERIES) */
#if (SAM3S_SERIES) || (SAM3XA_SERIES) || (SAM4S_SERIES) || defined(__DOXYGEN__)
uint32_t dacc_set_channel_selection(Dacc *p_dacc, uint32_t ul_channel);
void dacc_enable_flexible_selection(Dacc *p_dacc);
uint32_t dacc_set_power_save(Dacc *p_dacc, uint32_t ul_sleep_mode,
uint32_t ul_fast_wakeup_mode);
uint32_t dacc_set_timing(Dacc *p_dacc, uint32_t ul_refresh, uint32_t ul_maxs,
uint32_t ul_startup);
uint32_t dacc_enable_channel(Dacc *p_dacc, uint32_t ul_channel);
uint32_t dacc_disable_channel(Dacc *p_dacc, uint32_t ul_channel);
uint32_t dacc_get_channel_status(Dacc *p_dacc);
uint32_t dacc_set_analog_control(Dacc *p_dacc, uint32_t ul_analog_control);
uint32_t dacc_get_analog_control(Dacc *p_dacc);
#endif /* (SAM3S_SERIES) || (SAM3XA_SERIES) */
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* DACC_H_INCLUDED */
| 3,870
|
C++
|
.h
| 91
| 41.021978
| 79
| 0.696921
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,410
|
emac.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/emac.h
|
/**
* \file
*
* \brief EMAC (Ethernet MAC) driver for SAM.
*
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef EMAC_H_INCLUDED
#define EMAC_H_INCLUDED
#include "../chip.h"
//#include "conf_eth.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/** The buffer addresses written into the descriptors must be aligned, so the
last few bits are zero. These bits have special meaning for the EMAC
peripheral and cannot be used as part of the address. */
#define EMAC_RXD_ADDR_MASK 0xFFFFFFFC
#define EMAC_RXD_WRAP (1ul << 1) /**< Wrap bit */
#define EMAC_RXD_OWNERSHIP (1ul << 0) /**< Ownership bit */
#define EMAC_RXD_BROADCAST (1ul << 31) /**< Broadcast detected */
#define EMAC_RXD_MULTIHASH (1ul << 30) /**< Multicast hash match */
#define EMAC_RXD_UNIHASH (1ul << 29) /**< Unicast hash match */
#define EMAC_RXD_EXTADDR (1ul << 28) /**< External address match */
#define EMAC_RXD_ADDR1 (1ul << 26) /**< Address 1 match */
#define EMAC_RXD_ADDR2 (1ul << 25) /**< Address 2 match */
#define EMAC_RXD_ADDR3 (1ul << 24) /**< Address 3 match */
#define EMAC_RXD_ADDR4 (1ul << 23) /**< Address 4 match */
#define EMAC_RXD_TYPE (1ul << 22) /**< Type ID match */
#define EMAC_RXD_VLAN (1ul << 21) /**< VLAN tag detected */
#define EMAC_RXD_PRIORITY (1ul << 20) /**< Priority tag detected */
#define EMAC_RXD_PRIORITY_MASK (3ul << 17) /**< VLAN priority */
#define EMAC_RXD_CFI (1ul << 16) /**< Concatenation Format Indicator only if bit 21 is set */
#define EMAC_RXD_EOF (1ul << 15) /**< End of frame */
#define EMAC_RXD_SOF (1ul << 14) /**< Start of frame */
#define EMAC_RXD_OFFSET_MASK /**< Receive buffer offset */
#define EMAC_RXD_LEN_MASK (0xFFF) /**< Length of frame including FCS (if selected) */
#define EMAC_RXD_LENJUMBO_MASK (0x3FFF) /**< Jumbo frame length */
#define EMAC_TXD_USED (1ul << 31) /**< Frame is transmitted */
#define EMAC_TXD_WRAP (1ul << 30) /**< Last descriptor */
#define EMAC_TXD_ERROR (1ul << 29) /**< Retry limit exceeded, error */
#define EMAC_TXD_UNDERRUN (1ul << 28) /**< Transmit underrun */
#define EMAC_TXD_EXHAUSTED (1ul << 27) /**< Buffer exhausted */
#define EMAC_TXD_NOCRC (1ul << 16) /**< No CRC */
#define EMAC_TXD_LAST (1ul << 15) /**< Last buffer in frame */
#define EMAC_TXD_LEN_MASK (0x7FF) /**< Length of buffer */
/** The MAC can support frame lengths up to 1536 bytes */
#define EMAC_FRAME_LENTGH_MAX 1536
#define EMAC_RX_UNITSIZE 128 /**< Fixed size for RX buffer */
#define EMAC_TX_UNITSIZE 1518 /**< Size for ETH frame length */
/** EMAC clock speed */
#define EMAC_CLOCK_SPEED_160MHZ (160*1000*1000)
#define EMAC_CLOCK_SPEED_80MHZ (80*1000*1000)
#define EMAC_CLOCK_SPEED_40MHZ (40*1000*1000)
#define EMAC_CLOCK_SPEED_20MHZ (20*1000*1000)
/** EMAC maintain code default value*/
#define EMAC_MAN_CODE_VALUE (10)
/** EMAC maintain start of frame default value*/
#define EMAC_MAN_SOF_VALUE (1)
/** EMAC maintain read/write*/
#define EMAC_MAN_RW_TYPE (2)
/** EMAC maintain read only*/
#define EMAC_MAN_READ_ONLY (1)
/** EMAC address length */
#define EMAC_ADDR_LENGTH (6)
/**
* \brief Return codes for EMAC APIs.
*/
typedef enum {
EMAC_OK = 0, /** Operation OK */
EMAC_TIMEOUT = 1, /** EMAC operation timeout */
EMAC_TX_BUSY, /** TX in progress */
EMAC_RX_NULL, /** No data received */
EMAC_SIZE_TOO_SMALL, /** Buffer size not enough */
EMAC_PARAM, /** Parameter error, TX packet invalid or RX size too small */
EMAC_INVALID = 0xFF, /* Invalid */
} emac_status_t;
#if defined __ICCARM__
#pragma pack(4) /* IAR */
#define __attribute__(...) /* IAR */
#endif /* IAR */
/** Receive buffer descriptor struct */
typedef struct emac_rx_descriptor {
union emac_rx_addr {
uint32_t val;
struct emac_rx_addr_bm {
uint32_t b_ownership:1, /**< User clear, EMAC sets this to 1 once it has successfully written a frame to memory */
b_wrap:1, /**< Marks last descriptor in receive buffer */
addr_dw:30; /**< Address in number of DW */
} bm;
} addr; /**< Address, Wrap & Ownership */
union emac_rx_status {
uint32_t val;
struct emac_rx_status_bm {
uint32_t len:12, /** Length of frame including FCS */
offset:2, /** Receive buffer offset, bits 13:12 of frame length for jumbo frame */
b_sof:1, /** Start of frame */
b_eof:1, /** End of frame */
b_cfi:1, /** Concatenation Format Indicator */
vlan_priority:3, /** VLAN priority (if VLAN detected) */
b_priority_detected:1, /** Priority tag detected */
b_vlan_detected:1, /**< VLAN tag detected */
b_type_id_match:1, /**< Type ID match */
b_addr4match:1, /**< Address register 4 match */
b_addr3match:1, /**< Address register 3 match */
b_addr2match:1, /**< Address register 2 match */
b_addr1match:1, /**< Address register 1 match */
reserved:1,
b_ext_addr_match:1, /**< External address match */
b_uni_hash_match:1, /**< Unicast hash match */
b_multi_hash_match:1, /**< Multicast hash match */
b_boardcast_detect:1; /**< Global broadcast address detected */
} bm;
} status;
} __attribute__ ((packed, aligned(8))) emac_rx_descriptor_t; /* GCC */
/** Transmit buffer descriptor struct */
typedef struct emac_tx_descriptor {
uint32_t addr;
union emac_tx_status {
uint32_t val;
struct emac_tx_status_bm {
uint32_t len:11, /**< Length of buffer */
reserved:4,
b_last_buffer:1, /**< Last buffer (in the current frame) */
b_no_crc:1, /**< No CRC */
reserved1:10,
b_exhausted:1, /**< Buffer exhausted in mid frame */
b_underrun:1, /**< Transmit underrun */
b_error:1, /**< Retry limit exceeded, error detected */
b_wrap:1, /**< Marks last descriptor in TD list */
b_used:1; /**< User clear, EMAC sets this to 1 once a frame has been successfully transmitted */
} bm;
} status;
} __attribute__ ((packed, aligned(8))) emac_tx_descriptor_t; /* GCC */
#ifdef __ICCARM__ /* IAR */
#pragma pack()
#endif
/**
* \brief Input parameters when initializing the emac module mode.
*/
typedef struct emac_options {
/* Enable/Disable CopyAllFrame */
uint8_t uc_copy_all_frame;
/* Enable/Disable NoBroadCast */
uint8_t uc_no_boardcast;
/* MAC address */
uint8_t uc_mac_addr[EMAC_ADDR_LENGTH];
} emac_options_t;
/** RX callback */
typedef void (*emac_dev_tx_cb_t) (uint32_t ul_status);
/** Wakeup callback */
typedef void (*emac_dev_wakeup_cb_t) (void);
/**
* EMAC driver structure.
*/
typedef struct emac_device {
/** Pointer to HW register base */
Emac *p_hw;
/**
* Pointer to allocated TX buffer.
* Section 3.6 of AMBA 2.0 spec states that burst should not cross
* 1K Boundaries.
* Receive buffer manager writes are burst of 2 words => 3 lsb bits
* of the address shall be set to 0.
*/
uint8_t *p_tx_buffer;
/** Pointer to allocated RX buffer */
uint8_t *p_rx_buffer;
/** Pointer to Rx TDs (must be 8-byte aligned) */
emac_rx_descriptor_t *p_rx_dscr;
/** Pointer to Tx TDs (must be 8-byte aligned) */
emac_tx_descriptor_t *p_tx_dscr;
/** Optional callback to be invoked once a frame has been received */
emac_dev_tx_cb_t func_rx_cb;
/** Optional callback to be invoked once several TDs have been released */
emac_dev_wakeup_cb_t func_wakeup_cb;
/** Optional callback list to be invoked once TD has been processed */
emac_dev_tx_cb_t *func_tx_cb_list;
/** RX TD list size */
uint16_t us_rx_list_size;
/** RX index for current processing TD */
uint16_t us_rx_idx;
/** TX TD list size */
uint16_t us_tx_list_size;
/** Circular buffer head pointer by upper layer (buffer to be sent) */
uint16_t us_tx_head;
/** Circular buffer tail pointer incremented by handlers (buffer sent) */
uint16_t us_tx_tail;
/** Number of free TD before wakeup callback is invoked */
uint8_t uc_wakeup_threshold;
} emac_device_t;
/**
* \brief Write network control value.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_ncr Network control value.
*/
static inline void emac_network_control(Emac* p_emac, uint32_t ul_ncr)
{
p_emac->EMAC_NCR = ul_ncr;
}
/**
* \brief Get network control value.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline uint32_t emac_get_network_control(Emac* p_emac)
{
return p_emac->EMAC_NCR;
}
/**
* \brief Enable/Disable EMAC receive.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable EMAC receiver, else to enable it.
*/
static inline void emac_enable_receive(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCR |= EMAC_NCR_RE;
} else {
p_emac->EMAC_NCR &= ~EMAC_NCR_RE;
}
}
/**
* \brief Enable/Disable EMAC transmit.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable EMAC transmit, else to enable it.
*/
static inline void emac_enable_transmit(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCR |= EMAC_NCR_TE;
} else {
p_emac->EMAC_NCR &= ~EMAC_NCR_TE;
}
}
/**
* \brief Enable/Disable EMAC management.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable EMAC management, else to enable it.
*/
static inline void emac_enable_management(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCR |= EMAC_NCR_MPE;
} else {
p_emac->EMAC_NCR &= ~EMAC_NCR_MPE;
}
}
/**
* \brief Clear all statistics registers.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline void emac_clear_statistics(Emac* p_emac)
{
p_emac->EMAC_NCR |= EMAC_NCR_CLRSTAT;
}
/**
* \brief Increase all statistics registers.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline void emac_increase_statistics(Emac* p_emac)
{
p_emac->EMAC_NCR |= EMAC_NCR_INCSTAT;
}
/**
* \brief Enable/Disable statistics registers writing.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the statistics registers writing, else to enable it.
*/
static inline void emac_enable_statistics_write(Emac* p_emac,
uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCR |= EMAC_NCR_WESTAT;
} else {
p_emac->EMAC_NCR &= ~EMAC_NCR_WESTAT;
}
}
/**
* \brief In half-duplex mode, forces collisions on all received frames.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the back pressure, else to enable it.
*/
static inline void emac_enable_back_pressure(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCR |= EMAC_NCR_BP;
} else {
p_emac->EMAC_NCR &= ~EMAC_NCR_BP;
}
}
/**
* \brief Start transmission.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline void emac_start_transmission(Emac* p_emac)
{
p_emac->EMAC_NCR |= EMAC_NCR_TSTART;
}
/**
* \brief Halt transmission.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline void emac_halt_transmission(Emac* p_emac)
{
p_emac->EMAC_NCR |= EMAC_NCR_THALT;
}
/**
* \brief Set up network configuration register.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_cfg Network configuration value.
*/
static inline void emac_set_configure(Emac* p_emac, uint32_t ul_cfg)
{
p_emac->EMAC_NCFGR = ul_cfg;
}
/**
* \brief Get network configuration.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Network configuration.
*/
static inline uint32_t emac_get_configure(Emac* p_emac)
{
return p_emac->EMAC_NCFGR;
}
/**
* \brief Set speed.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_speed 1 to indicate 100Mbps, 0 to 10Mbps.
*/
static inline void emac_set_speed(Emac* p_emac, uint8_t uc_speed)
{
if (uc_speed) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_SPD;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_SPD;
}
}
/**
* \brief Enable/Disable Full-Duplex mode.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the Full-Duplex mode, else to enable it.
*/
static inline void emac_enable_full_duplex(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_FD;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_FD;
}
}
/**
* \brief Enable/Disable Copy(Receive) All Valid Frames.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable copying all valid frames, else to enable it.
*/
static inline void emac_enable_copy_all(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_CAF;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_CAF;
}
}
/**
* \brief Enable/Disable jumbo frames (up to 10240 bytes).
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the jumbo frames, else to enable it.
*/
static inline void emac_enable_jumbo_frames(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_JFRAME;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_JFRAME;
}
}
/**
* \brief Disable/Enable broadcast receiving.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 1 to disable the broadcast, else to enable it.
*/
static inline void emac_disable_broadcast(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_NBC;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_NBC;
}
}
/**
* \brief Enable/Disable multicast hash.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the multicast hash, else to enable it.
*/
static inline void emac_enable_multicast_hash(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_UNI;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_UNI;
}
}
/**
* \brief Enable/Disable big frames (over 1518, up to 1536).
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable big frames else to enable it.
*/
static inline void emac_enable_big_frame(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_BIG;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_BIG;
}
}
/**
* \brief Set MDC clock divider.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_mck EMAC MCK.
*
* \return EMAC_OK if successfully.
*/
static inline uint8_t emac_set_clock(Emac* p_emac, uint32_t ul_mck)
{
uint32_t ul_clk;
if (ul_mck > EMAC_CLOCK_SPEED_160MHZ) {
return EMAC_INVALID;
} else if (ul_mck > EMAC_CLOCK_SPEED_80MHZ) {
ul_clk = EMAC_NCFGR_CLK_MCK_64;
} else if (ul_mck > EMAC_CLOCK_SPEED_40MHZ) {
ul_clk = EMAC_NCFGR_CLK_MCK_32;
} else if (ul_mck > EMAC_CLOCK_SPEED_20MHZ) {
ul_clk = EMAC_NCFGR_CLK_MCK_16;
} else {
ul_clk = EMAC_NCFGR_CLK_MCK_8;
}
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_CLK_Msk;
p_emac->EMAC_NCFGR |= ul_clk;
return EMAC_OK;
}
/**
* \brief Enable/Disable retry test.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the EMAC receiver, else to enable it.
*/
static inline void emac_enable_retry_test(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_RTY;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_RTY;
}
}
/**
* \brief Enable/Disable pause (when a valid pause frame is received).
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable pause frame, else to enable it.
*/
static inline void emac_enable_pause_frame(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_PAE;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_PAE;
}
}
/**
* \brief Set receive buffer offset to 0 ~ 3.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline void emac_set_rx_buffer_offset(Emac* p_emac, uint8_t uc_offset)
{
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_RBOF_Msk;
p_emac->EMAC_NCFGR |=
(EMAC_NCFGR_RBOF_Msk & ((uc_offset) << EMAC_NCFGR_RBOF_Pos));
}
/**
* \brief Enable/Disable receive length field checking.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable receive length field checking, else to enable it.
*/
static inline void emac_enable_rx_length_check(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_RLCE;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_RLCE;
}
}
/**
* \brief Enable/Disable discarding FCS field of received frames.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable discarding FCS field of received frames, else to enable it.
*/
static inline void emac_enable_discard_fcs(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_DRFCS;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_DRFCS;
}
}
/**
* \brief Enable/Disable frames to be received in half-duplex mode
* while transmitting.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the received in half-duplex mode, else to enable it.
*/
static inline void emac_enable_efrhd(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_EFRHD;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_EFRHD;
}
}
/**
* \brief Enable/Disable ignore RX FCS.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable ignore RX FCS, else to enable it.
*/
static inline void emac_enable_ignore_rx_fcs(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_NCFGR |= EMAC_NCFGR_IRXFCS;
} else {
p_emac->EMAC_NCFGR &= ~EMAC_NCFGR_IRXFCS;
}
}
/**
* \brief Get Network Status.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Network status.
*/
static inline uint32_t emac_get_status(Emac* p_emac)
{
return p_emac->EMAC_NSR;
}
/**
* \brief Get MDIO IN pin status.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return MDIO IN pin status.
*/
static inline uint8_t emac_get_MDIO(Emac* p_emac)
{
return ((p_emac->EMAC_NSR & EMAC_NSR_MDIO) > 0);
}
/**
* \brief Check if PHY is idle.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return 1 if PHY is idle.
*/
static inline uint8_t emac_is_phy_idle(Emac* p_emac)
{
return ((p_emac->EMAC_NSR & EMAC_NSR_IDLE) > 0);
}
/**
* \brief Return transmit status.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Transmit status.
*/
static inline uint32_t emac_get_tx_status(Emac* p_emac)
{
return p_emac->EMAC_TSR;
}
/**
* \brief Clear transmit status.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_status Transmit status.
*/
static inline void emac_clear_tx_status(Emac* p_emac, uint32_t ul_status)
{
p_emac->EMAC_TSR = ul_status;
}
/**
* \brief Return receive status.
*
* \param p_emac Pointer to the EMAC instance.
*/
static inline uint32_t emac_get_rx_status(Emac* p_emac)
{
return p_emac->EMAC_RSR;
}
/**
* \brief Clear receive status.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_status Receive status.
*/
static inline void emac_clear_rx_status(Emac* p_emac, uint32_t ul_status)
{
p_emac->EMAC_RSR = ul_status;
}
/**
* \brief Set Rx Queue.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_addr Rx queue address.
*/
static inline void emac_set_rx_queue(Emac* p_emac, uint32_t ul_addr)
{
p_emac->EMAC_RBQP = EMAC_RBQP_ADDR_Msk & ul_addr;
}
/**
* \brief Get Rx Queue Address.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Rx queue address.
*/
static inline uint32_t emac_get_rx_queue(Emac* p_emac)
{
return p_emac->EMAC_RBQP;
}
/**
* \brief Set Tx Queue.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_addr Tx queue address.
*/
static inline void emac_set_tx_queue(Emac* p_emac, uint32_t ul_addr)
{
p_emac->EMAC_TBQP = EMAC_TBQP_ADDR_Msk & ul_addr;
}
/**
* \brief Get Tx Queue.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Rx queue address.
*/
static inline uint32_t emac_get_tx_queue(Emac* p_emac)
{
return p_emac->EMAC_TBQP;
}
/**
* \brief Enable interrupt(s).
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_source Interrupt source(s) to be enabled.
*/
static inline void emac_enable_interrupt(Emac* p_emac, uint32_t ul_source)
{
p_emac->EMAC_IER = ul_source;
}
/**
* \brief Disable interrupt(s).
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_source Interrupt source(s) to be disabled.
*/
static inline void emac_disable_interrupt(Emac* p_emac, uint32_t ul_source)
{
p_emac->EMAC_IDR = ul_source;
}
/**
* \brief Return interrupt status.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Interrupt status.
*/
static inline uint32_t emac_get_interrupt_status(Emac* p_emac)
{
return p_emac->EMAC_ISR;
}
/**
* \brief Return interrupt mask.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Interrupt mask.
*/
static inline uint32_t emac_get_interrupt_mask(Emac* p_emac)
{
return p_emac->EMAC_IMR;
}
/**
* \brief Execute PHY maintenance command.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_phy_addr PHY address.
* \param uc_reg_addr Register address.
* \param uc_rw 1 to Read, 0 to write.
* \param us_data Data to be performed, write only.
*/
static inline void emac_maintain_phy(Emac* p_emac,
uint8_t uc_phy_addr, uint8_t uc_reg_addr, uint8_t uc_rw,
uint16_t us_data)
{
/* Wait until bus idle */
while ((p_emac->EMAC_NSR & EMAC_NSR_IDLE) == 0);
/* Write maintain register */
p_emac->EMAC_MAN = EMAC_MAN_CODE(EMAC_MAN_CODE_VALUE)
| EMAC_MAN_SOF(EMAC_MAN_SOF_VALUE)
| EMAC_MAN_PHYA(uc_phy_addr)
| EMAC_MAN_REGA(uc_reg_addr)
| EMAC_MAN_RW((uc_rw ? EMAC_MAN_RW_TYPE : EMAC_MAN_READ_ONLY))
| EMAC_MAN_DATA(us_data);
}
/**
* \brief Get PHY maintenance data returned.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Get PHY data.
*/
static inline uint16_t emac_get_phy_data(Emac* p_emac)
{
/* Wait until bus idle */
while ((p_emac->EMAC_NSR & EMAC_NSR_IDLE) == 0);
/* Return data */
return (uint16_t) (p_emac->EMAC_MAN & EMAC_MAN_DATA_Msk);
}
/**
* \brief Set pause time.
*
* \param p_emac Pointer to the EMAC instance.
* \param us_pause_time Pause time.
*/
static inline void emac_set_pause_time(Emac* p_emac, uint16_t us_pause_time)
{
p_emac->EMAC_PTR = us_pause_time;
}
/**
* \brief Set Hash.
*
* \param p_emac Pointer to the EMAC instance.
* \param ul_hash_top Hash top.
* \param ul_hash_bottom Hash bottom.
*/
static inline void emac_set_hash(Emac* p_emac, uint32_t ul_hash_top,
uint32_t ul_hash_bottom)
{
p_emac->EMAC_HRB = ul_hash_bottom;
p_emac->EMAC_HRT = ul_hash_top;
}
/**
* \brief Set 64 bits Hash.
*
* \param p_emac Pointer to the EMAC instance.
* \param ull_hash 64 bits hash value.
*/
static inline void emac_set_hash64(Emac* p_emac, uint64_t ull_hash)
{
p_emac->EMAC_HRB = (uint32_t) ull_hash;
p_emac->EMAC_HRT = (uint32_t) (ull_hash >> 32);
}
/**
* \brief Set MAC Address.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_index EMAC specific address register index.
* \param p_mac_addr EMAC address.
*/
static inline void emac_set_address(Emac* p_emac, uint8_t uc_index,
uint8_t* p_mac_addr)
{
p_emac->EMAC_SA[uc_index].EMAC_SAxB = (p_mac_addr[3] << 24)
| (p_mac_addr[2] << 16)
| (p_mac_addr[1] << 8)
| (p_mac_addr[0]);
p_emac->EMAC_SA[uc_index].EMAC_SAxT = (p_mac_addr[5] << 8)
| (p_mac_addr[4]);
}
/**
* \brief Set MAC Address via 2 dword.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_index EMAC specific address register index.
* \param ul_mac_top EMAC top address.
* \param ul_mac_bottom EMAC bottom address.
*/
static inline void emac_set_address32(Emac* p_emac, uint8_t uc_index,
uint32_t ul_mac_top, uint32_t ul_mac_bottom)
{
p_emac->EMAC_SA[uc_index].EMAC_SAxB = ul_mac_bottom;
p_emac->EMAC_SA[uc_index].EMAC_SAxT = ul_mac_top;
}
/**
* \brief Set MAC Address via int64.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_index EMAC specific address register index.
* \param ull_mac 64-bit EMAC address.
*/
static inline void emac_set_address64(Emac* p_emac, uint8_t uc_index,
uint64_t ull_mac)
{
p_emac->EMAC_SA[uc_index].EMAC_SAxB = (uint32_t) ull_mac;
p_emac->EMAC_SA[uc_index].EMAC_SAxT = (uint32_t) (ull_mac >> 32);
}
/**
* \brief Set type ID.
*
* \param p_emac Pointer to the EMAC instance.
* \param us_type_id Type to be set.
*/
static inline void emac_set_type_id(Emac* p_emac, uint16_t us_type_id)
{
p_emac->EMAC_TID = EMAC_TID_TID(us_type_id);
}
/**
* \brief Get type ID.
*
* \param p_emac Pointer to the EMAC instance.
*
* \return Type ID.
*/
static inline uint16_t emac_get_type_id(Emac* p_emac)
{
return (p_emac->EMAC_TID & EMAC_TID_TID_Msk);
}
/**
* \brief Enable/Disable RMII.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable the RMII mode, else to enable it.
*/
static inline void emac_enable_rmii(Emac* p_emac, uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_USRIO |= EMAC_USRIO_RMII;
} else {
p_emac->EMAC_USRIO &= ~EMAC_USRIO_RMII;
}
}
/**
* \brief Enable/Disable transceiver input clock.
*
* \param p_emac Pointer to the EMAC instance.
* \param uc_enable 0 to disable transceiver input clock, else to enable it.
*/
static inline void emac_enable_transceiver_clock(Emac* p_emac,
uint8_t uc_enable)
{
if (uc_enable) {
p_emac->EMAC_USRIO |= EMAC_USRIO_CLKEN;
} else {
p_emac->EMAC_USRIO &= ~EMAC_USRIO_CLKEN;
}
}
uint8_t emac_phy_read(Emac* p_emac, uint8_t uc_phy_address, uint8_t uc_address,
uint32_t* p_value);
uint8_t emac_phy_write(Emac* p_emac, uint8_t uc_phy_address,
uint8_t uc_address, uint32_t ul_value);
void emac_dev_init(Emac* p_emac, emac_device_t* p_emac_dev,
emac_options_t* p_opt);
uint32_t emac_dev_read(emac_device_t* p_emac_dev, uint8_t* p_frame,
uint32_t ul_frame_size, uint32_t* p_rcv_size);
uint32_t emac_dev_write(emac_device_t* p_emac_dev, void *p_buffer,
uint32_t ul_size, emac_dev_tx_cb_t func_tx_cb);
uint32_t emac_dev_get_tx_load(emac_device_t* p_emac_dev);
void emac_dev_set_rx_callback(emac_device_t* p_emac_dev,
emac_dev_tx_cb_t func_rx_cb);
uint8_t emac_dev_set_tx_wakeup_callback(emac_device_t* p_emac_dev,
emac_dev_wakeup_cb_t func_wakeup, uint8_t uc_threshold);
void emac_dev_reset(emac_device_t* p_emac_dev);
void emac_handler(emac_device_t* p_emac_dev);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
/**
* \page emac_quickstart Quickstart guide for EMAC driver.
*
* This is the quickstart guide for the \ref emac_group "Ethernet MAC",
* with step-by-step instructions on how to configure and use the driver in a
* selection of use cases.
*
* The use cases contain several code fragments. The code fragments in the
* steps for setup can be copied into a custom initialization function, while
* the steps for usage can be copied into, e.g., the main application function.
*
* \section emac_basic_use_case Basic use case
* In the basic use case, the EMAC driver are configured for:
* - PHY component DM9161A is used
* - EMAC uses RMII mode
* - The number of receive buffer is 16
* - The number of transfer buffer is 8
* - MAC address is set to 00-04-25-1c-a0-02
* - IP address is set to 192.168.0.2
* - IP address is set to 192.168.0.2
* - Gateway is set to 192.168.0.1
* - Network mask is 255.255.255.0
* - PHY operation max retry count is 1000000
* - EMAC is configured to not support copy all frame and support broadcast
* - The reset PIN of DM9161A is connected to the NRST of SAM3X
* - The data will be read from the ethernet
*
* \section emac_basic_use_case_setup Setup steps
*
* \subsection emac_basic_use_case_setup_prereq Prerequisites
* -# \ref sysclk_group "System Clock Management (sysclock)"
* -# \ref pio_group "Parallel Input/Output Controller (pio)"
* -# \ref pmc_group "Power Management Controller (pmc)"
* -# \ref sam_drivers_rstc_group "Reset Controller (RSTC)"
* -# \ref dm9161a_ethernet_phy_group "PHY component (DM9161A)"
*
* \subsection emac_basic_use_case_setup_code Example code
* Content of conf_eth.h
* \code
* #define EMAC_RX_BUFFERS 16
* #define EMAC_TX_BUFFERS 8
* #define MAC_PHY_RETRY_MAX 1000000
* #define ETHERNET_CONF_ETHADDR0 0x00
* #define ETHERNET_CONF_ETHADDR0 0x00
* #define ETHERNET_CONF_ETHADDR1 0x04
* #define ETHERNET_CONF_ETHADDR2 0x25
* #define ETHERNET_CONF_ETHADDR3 0x1C
* #define ETHERNET_CONF_ETHADDR4 0xA0
* #define ETHERNET_CONF_ETHADDR5 0x02
* #define ETHERNET_CONF_IPADDR0 192
* #define ETHERNET_CONF_IPADDR1 168
* #define ETHERNET_CONF_IPADDR2 0
* #define ETHERNET_CONF_IPADDR3 2
* #define ETHERNET_CONF_GATEWAY_ADDR0 192
* #define ETHERNET_CONF_GATEWAY_ADDR1 168
* #define ETHERNET_CONF_GATEWAY_ADDR2 0
* #define ETHERNET_CONF_GATEWAY_ADDR3 1
* #define ETHERNET_CONF_NET_MASK0 255
* #define ETHERNET_CONF_NET_MASK1 255
* #define ETHERNET_CONF_NET_MASK2 255
* #define ETHERNET_CONF_NET_MASK3 0
* #define ETH_PHY_MODE BOARD_EMAC_MODE_RMII
* \endcode
*
* A specific emac device and the receive data buffer must be defined; another ul_frm_size should be defined
* to trace the actual size of the data received.
* \code
* static emac_device_t gs_emac_dev;
* static volatile uint8_t gs_uc_eth_buffer[EMAC_FRAME_LENTGH_MAX];
*
* uint32_t ul_frm_size;
* \endcode
*
* Add to application C-file:
* \code
* void emac_init(void)
* {
* sysclk_init();
*
* board_init();
*
* rstc_set_external_reset(RSTC, 13);
* rstc_reset_extern(RSTC);
* while (rstc_get_status(RSTC) & RSTC_SR_NRSTL) {
* };
*
* ul_delay = sysclk_get_cpu_hz() / 1000 / 3 * 400;
* while (ul_delay--);
*
* pmc_enable_periph_clk(ID_EMAC);
*
* emac_option.uc_copy_all_frame = 0;
* emac_option.uc_no_boardcast = 0;
* memcpy(emac_option.uc_mac_addr, gs_uc_mac_address, sizeof(gs_uc_mac_address));
* gs_emac_dev.p_hw = EMAC;
*
* emac_dev_init(EMAC, &gs_emac_dev, &emac_option);
*
* NVIC_EnableIRQ(EMAC_IRQn);
*
* ethernet_phy_init(EMAC, BOARD_EMAC_PHY_ADDR, sysclk_get_cpu_hz()
*
* ethernet_phy_auto_negotiate(EMAC, BOARD_EMAC_PHY_ADDR
*
* ethernet_phy_set_link(EMAC, BOARD_EMAC_PHY_ADDR, 1)
* \endcode
*
* \subsection emac_basic_use_case_setup_flow Workflow
* -# Ensure that conf_emac.h is present and contains the
* following configuration symbol. This configuration file is used
* by the driver and should not be included by the user.
* - \code
* #define EMAC_RX_BUFFERS 16
* #define EMAC_TX_BUFFERS 8
* #define MAC_PHY_RETRY_MAX 1000000
* #define ETHERNET_CONF_ETHADDR0 0x00
* #define ETHERNET_CONF_ETHADDR0 0x00
* #define ETHERNET_CONF_ETHADDR1 0x04
* #define ETHERNET_CONF_ETHADDR2 0x25
* #define ETHERNET_CONF_ETHADDR3 0x1C
* #define ETHERNET_CONF_ETHADDR4 0xA0
* #define ETHERNET_CONF_ETHADDR5 0x02
* #define ETHERNET_CONF_IPADDR0 192
* #define ETHERNET_CONF_IPADDR1 168
* #define ETHERNET_CONF_IPADDR2 0
* #define ETHERNET_CONF_IPADDR3 2
* #define ETHERNET_CONF_GATEWAY_ADDR0 192
* #define ETHERNET_CONF_GATEWAY_ADDR1 168
* #define ETHERNET_CONF_GATEWAY_ADDR2 0
* #define ETHERNET_CONF_GATEWAY_ADDR3 1
* #define ETHERNET_CONF_NET_MASK0 255
* #define ETHERNET_CONF_NET_MASK1 255
* #define ETHERNET_CONF_NET_MASK2 255
* #define ETHERNET_CONF_NET_MASK3 0
* #define ETH_PHY_MODE BOARD_EMAC_MODE_RMII
* \endcode
* -# Enable the system clock:
* - \code sysclk_init(); \endcode
* -# Enable PIO configurations for EMAC:
* - \code board_init(); \endcode
* -# Reset PHY; this is required by the DM9161A component:
* - \code
* rstc_set_external_reset(RSTC, 13);
* rstc_reset_extern(RSTC);
* while (rstc_get_status(RSTC) & RSTC_SR_NRSTL) {
* };
* \endcode
* -# Wait for PHY ready:
* - \code
* ul_delay = sysclk_get_cpu_hz() / 1000 / 3 * 400;
* while (ul_delay--);
* \endcode
* -# Enable PMC clock for EMAC:
* - \code pmc_enable_periph_clk(ID_EMAC); \endcode
* -# Set the EMAC options; it's set to copy all frame and support broadcast:
* - \code
* emac_option.uc_copy_all_frame = 0;
* emac_option.uc_no_boardcast = 0;
* memcpy(emac_option.uc_mac_addr, gs_uc_mac_address, sizeof(gs_uc_mac_address));
* gs_emac_dev.p_hw = EMAC;
* \endcode
* -# Initialize EMAC device with the filled option:
* - \code
* emac_dev_init(EMAC, &gs_emac_dev, &emac_option);
* \endcode
* -# Enable the interrupt service for EMAC:
* - \code
* NVIC_EnableIRQ(EMAC_IRQn);
* \endcode
* -# Initialize the PHY component:
* - \code
* ethernet_phy_init(EMAC, BOARD_EMAC_PHY_ADDR, sysclk_get_cpu_hz());
* \endcode
* -# The link will be established based on auto negotiation.
* - \code
* ethernet_phy_auto_negotiate(EMAC, BOARD_EMAC_PHY_ADDR);
* \endcode
* -# Establish the ethernet link; the network can be worked from now on:
* - \code
* ethernet_phy_set_link(EMAC, BOARD_EMAC_PHY_ADDR, 1);
* \endcode
*
* \section emac_basic_use_case_usage Usage steps
* \subsection emac_basic_use_case_usage_code Example code
* Add to, e.g., main loop in application C-file:
* \code
* emac_dev_read(&gs_emac_dev, (uint8_t *) gs_uc_eth_buffer, sizeof(gs_uc_eth_buffer), &ul_frm_size));
* \endcode
*
* \subsection emac_basic_use_case_usage_flow Workflow
* -# Start reading the data from the ethernet:
* - \code emac_dev_read(&gs_emac_dev, (uint8_t *) gs_uc_eth_buffer, sizeof(gs_uc_eth_buffer), &ul_frm_size)); \endcode
*/
#endif /* EMAC_H_INCLUDED */
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.h
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| 30.351803
| 121
| 0.657152
|
relativty/Relativty
| 6,445
| 342
| 29
|
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|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,411
|
wdt.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/wdt.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
* Interface for Watchdog Timer (WDT) controller.
*
* \section Usage
* -# Enable watchdog with given mode using \ref WDT_Enable().
* -# Disable watchdog using \ref WDT_Disable()
* -# Restart the watchdog using \ref WDT_Restart().
* -# Get watchdog status using \ref WDT_GetStatus().
* -# Caculate watchdog period value using \ref WDT_GetPeriod().
*/
#ifndef _WDT_
#define _WDT_
#include "../chip.h"
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void WDT_Enable( Wdt* pWDT, uint32_t dwMode ) ;
extern void WDT_Disable( Wdt* pWDT ) ;
extern void WDT_Restart( Wdt* pWDT ) ;
extern uint32_t WDT_GetStatus( Wdt* pWDT ) ;
extern uint32_t WDT_GetPeriod( uint32_t dwMs ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _WDT_ */
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.h
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relativty/Relativty
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|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,412
|
interrupt_sam_nvic.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/interrupt_sam_nvic.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef UTILS_INTERRUPT_INTERRUPT_H
#define UTILS_INTERRUPT_INTERRUPT_H
#include "../chip.h"
/**
* \weakgroup interrupt_group
*
* @{
*/
/**
* \name Interrupt Service Routine definition
*
* @{
*/
/**
* \brief Define service routine
*
* \note For NVIC devices the interrupt service routines are predefined to
* add to vector table in binary generation, so there is no service
* register at run time. The routine collections are in exceptions.h.
*
* Usage:
* \code
* ISR(foo_irq_handler)
* {
* // Function definition
* ...
* }
* \endcode
*
* \param func Name for the function.
*/
# define ISR(func) \
void func (void)
/**
* \brief Initialize interrupt vectors
*
* For NVIC the interrupt vectors are put in vector table. So nothing
* to do to initialize them, except defined the vector function with
* right name.
*
* This must be called prior to \ref irq_register_handler.
*/
# define irq_initialize_vectors() \
do { \
} while(0)
/**
* \brief Register handler for interrupt
*
* For NVIC the interrupt vectors are put in vector table. So nothing
* to do to register them, except defined the vector function with
* right name.
*
* Usage:
* \code
* irq_initialize_vectors();
* irq_register_handler(foo_irq_handler);
* \endcode
*
* \note The function \a func must be defined with the \ref ISR macro.
* \note The functions prototypes can be found in the device exception header
* files (exceptions.h).
*/
# define irq_register_handler(...) \
do { \
} while(0)
//@}
# define cpu_irq_enable() \
do { \
g_interrupt_enabled = 1; \
__DMB(); \
__enable_irq(); \
} while (0)
# define cpu_irq_disable() \
do { \
__disable_irq(); \
__DMB(); \
g_interrupt_enabled = 0; \
} while (0)
typedef uint32_t irqflags_t;
extern int g_interrupt_enabled;
static inline irqflags_t cpu_irq_save(void)
{
irqflags_t flags = g_interrupt_enabled;
cpu_irq_disable();
return flags;
}
static inline int cpu_irq_is_enabled_flags(irqflags_t flags)
{
return (flags);
}
static inline void cpu_irq_restore(irqflags_t flags)
{
if (cpu_irq_is_enabled_flags(flags))
cpu_irq_enable();
}
#define cpu_irq_is_enabled() g_interrupt_enabled
/**
* \weakgroup interrupt_deprecated_group
* @{
*/
#define Enable_global_interrupt() cpu_irq_enable()
#define Disable_global_interrupt() cpu_irq_disable()
#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
//@}
//@}
#endif /* UTILS_INTERRUPT_INTERRUPT_H */
| 4,442
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C++
|
.h
| 134
| 31.208955
| 79
| 0.61343
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,413
|
tc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/tc.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Interface for configuring and using Timer Counter (TC) peripherals.
*
* \section Usage
* -# Optionally, use TC_FindMckDivisor() to let the program find the best
* TCCLKS field value automatically.
* -# Configure a Timer Counter in the desired mode using TC_Configure().
* -# Start or stop the timer clock using TC_Start() and TC_Stop().
*/
#ifndef _TC_
#define _TC_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "../chip.h"
#include <stdint.h>
/*------------------------------------------------------------------------------
* Global functions
*------------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void TC_Configure( Tc *pTc, uint32_t dwChannel, uint32_t dwMode ) ;
extern void TC_Start( Tc *pTc, uint32_t dwChannel ) ;
extern void TC_Stop( Tc *pTc, uint32_t dwChannel ) ;
extern uint32_t TC_FindMckDivisor( uint32_t dwFreq, uint32_t dwMCk, uint32_t *dwDiv, uint32_t *dwTcClks, uint32_t dwBoardMCK ) ;
extern uint32_t TC_ReadCV(Tc *p_tc, uint32_t ul_channel);
extern uint32_t TC_GetStatus(Tc *p_tc, uint32_t ul_channel);
extern void TC_SetRA(Tc *tc, uint32_t chan, uint32_t v) ;
extern void TC_SetRB(Tc *tc, uint32_t chan, uint32_t v) ;
extern void TC_SetRC(Tc *tc, uint32_t chan, uint32_t v) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _TC_ */
| 3,092
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C++
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.h
| 67
| 44.208955
| 128
| 0.602462
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,414
|
rstc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/rstc.h
|
/**
* \file
*
* \brief Reset Controller (RSTC) driver for SAM.
*
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef RSTC_H_INCLUDED
#define RSTC_H_INCLUDED
#include "../chip.h"
#ifdef __cplusplus
extern "C" {
#endif
/** Definitions of Reset Controller Status */
/** Reset cause */
#define RSTC_GENERAL_RESET (0 << RSTC_SR_RSTTYP_Pos)
#define RSTC_BACKUP_RESET (1 << RSTC_SR_RSTTYP_Pos)
#define RSTC_WATCHDOG_RESET (2 << RSTC_SR_RSTTYP_Pos)
#define RSTC_SOFTWARE_RESET (3 << RSTC_SR_RSTTYP_Pos)
#define RSTC_USER_RESET (4 << RSTC_SR_RSTTYP_Pos)
/** NRST Pin Level */
#define RSTC_NRST_LOW (LOW << 16)
#define RSTC_NRST_HIGH (HIGH << 16)
void rstc_set_external_reset(Rstc* p_rstc, const uint32_t ul_length);
void rstc_enable_user_reset(Rstc* p_rstc);
void rstc_disable_user_reset(Rstc* p_rstc);
void rstc_enable_user_reset_interrupt(Rstc* p_rstc);
void rstc_disable_user_reset_interrupt(Rstc* p_rstc);
void rstc_start_software_reset(Rstc* p_rstc);
void rstc_reset_extern(Rstc *p_rstc);
uint32_t rstc_get_status(Rstc* p_rstc);
uint32_t rstc_get_reset_cause(Rstc* p_rstc);
#ifdef __cplusplus
}
#endif
#endif /* RSTC_H_INCLUDED */
| 2,808
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C++
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.h
| 71
| 37.873239
| 79
| 0.752747
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,415
|
usart.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/usart.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* This module provides several definitions and methods for using an USART
* peripheral.
*
* \par Usage
*
* -# Enable the USART peripheral clock in the PMC.
* -# Enable the required USART PIOs (see pio.h).
* -# Configure the UART by calling USART_Configure.
* -# Enable the transmitter and/or the receiver of the USART using
* USART_SetTransmitterEnabled and USART_SetReceiverEnabled.
* -# Send data through the USART using the USART_Write and
* USART_WriteBuffer methods.
* -# Receive data from the USART using the USART_Read and
* USART_ReadBuffer functions; the availability of data can be polled
* with USART_IsDataAvailable.
* -# Disable the transmitter and/or the receiver of the USART with
* USART_SetTransmitterEnabled and USART_SetReceiverEnabled.
*/
#ifndef _USART_
#define _USART_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "../chip.h"
#include <stdint.h>
/*------------------------------------------------------------------------------
* Definitions
*------------------------------------------------------------------------------*/
/** \section USART_mode USART modes
* This section lists several common operating modes for an USART peripheral.
*
* \b Modes
* - USART_MODE_ASYNCHRONOUS
* - USART_MODE_IRDA
*/
/** Basic asynchronous mode, i.e. 8 bits no parity.*/
#define USART_MODE_ASYNCHRONOUS (US_MR_CHRL_8_BIT | US_MR_PAR_NO)
/** IRDA mode*/
#define USART_MODE_IRDA (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER)
/** SPI mode*/
#define AT91C_US_USMODE_SPIM 0xE
#define US_SPI_CPOL_0 (0x0<<16)
#define US_SPI_CPHA_0 (0x0<<8)
#define US_SPI_CPOL_1 (0x1<<16)
#define US_SPI_CPHA_1 (0x1<<8)
#define US_SPI_BPMODE_0 (US_SPI_CPOL_0|US_SPI_CPHA_1)
#define US_SPI_BPMODE_1 (US_SPI_CPOL_0|US_SPI_CPHA_0)
#define US_SPI_BPMODE_2 (US_SPI_CPOL_1|US_SPI_CPHA_1)
#define US_SPI_BPMODE_3 (US_SPI_CPOL_1|US_SPI_CPHA_0)
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Exported functions */
/*------------------------------------------------------------------------------*/
extern void USART_Configure( Usart *usart, uint32_t mode, uint32_t baudrate, uint32_t masterClock ) ;
extern uint32_t USART_GetStatus( Usart *usart ) ;
extern void USART_EnableIt( Usart *usart,uint32_t mode ) ;
extern void USART_DisableIt( Usart *usart,uint32_t mode ) ;
extern void USART_SetTransmitterEnabled( Usart *usart, uint8_t enabled ) ;
extern void USART_SetReceiverEnabled( Usart *usart, uint8_t enabled ) ;
extern void USART_Write( Usart *usart, uint16_t data, volatile uint32_t timeOut ) ;
extern uint8_t USART_WriteBuffer( Usart *usart, void *buffer, uint32_t size ) ;
extern uint16_t USART_Read( Usart *usart, volatile uint32_t timeOut ) ;
extern uint8_t USART_ReadBuffer( Usart *usart, void *buffer, uint32_t size ) ;
extern uint8_t USART_IsDataAvailable( Usart *usart ) ;
extern void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter);
extern void USART_PutChar( Usart *usart, uint8_t c ) ;
extern uint32_t USART_IsRxReady( Usart *usart ) ;
extern uint8_t USART_GetChar( Usart *usart ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _USART_ */
| 5,077
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C++
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.h
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| 45.64486
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| 0.616909
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,416
|
udp.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/udp.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef UDPHS_H_INCLUDED
#define UDPHS_H_INCLUDED
#endif /* UDPHS_H_INCLUDED */
| 1,615
|
C++
|
.h
| 31
| 50.16129
| 79
| 0.659924
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,417
|
ssc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/ssc.h
|
/**
* \file
*
* \brief Synchronous Serial Controller (SSC) driver for SAM.
*
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef SSC_H_INCLUDED
#define SSC_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
//! Receive stop selection.
#define SSC_RX_STOP_COMPARE_0 0
#define SSC_RX_STOP_COMPARE_0_1 1
//! Compare register ID.
#define COMPARE_ID0 0
#define COMPARE_ID1 1
//! SSC module default timeout. */
#define SSC_DEFAULT_TIMEOUT 10000
//! \brief SSC driver return codes.
enum ssc_return_code {
SSC_RC_OK = 0, //!< OK
SSC_RC_YES = 0, //!< Yes
SSC_RC_NO = 1, //!< No
SSC_RC_ERROR = 1, //!< General error
SSC_RC_INVALID = 0xFFFFFFFF //!< Parameter invalid
};
//! Data frame structure.
typedef struct {
//! Data bits length per transfer, should be 0 to 31.
uint32_t ul_datlen;
//! Bit sequence LSBF or MSBF.
//! For receiver configuration, SSC_RFMR_MSBF or 0.
//! For transmitter configuration, SSC_TFMR_MSBF or 0.
uint32_t ul_msbf;
//! Data number per frame, should be 0 to 15.
uint32_t ul_datnb;
//! Frame Sync. length should be 0 to 15.
uint32_t ul_fslen;
//! Frame Sync. length extension field, should be 0 to 15.
uint32_t ul_fslen_ext;
//! Frame Sync. output selection.
//! For receiver configuration, one of SSC_RFMR_FSOS_NONE, SSC_RFMR_FSOS_NEGATIVE, SSC_RFMR_FSOS_POSITIVE,
//! SSC_RFMR_FSOS_LOW, SSC_RFMR_FSOS_HIGH or SSC_RFMR_FSOS_TOGGLING.
//! For transmitter configuration, one of SSC_TFMR_FSOS_NONE, SSC_TFMR_FSOS_NEGATIVE, SSC_TFMR_FSOS_POSITIVE
//! SSC_TFMR_FSOS_LOW, SSC_TFMR_FSOS_HIGH, SSC_TFMR_FSOS_TOGGLING,
uint32_t ul_fsos;
//! Frame Sync. edge detection.
//! For receiver configuration, SSC_RFMR_FSEDGE_POSITIVE or SSC_RFMR_FSEDGE_NEGATIVE.
//! For transmitter configuration, SSC_TFMR_FSEDGE_POSITIVE or SSC_TFMR_FSEDGE_NEGATIVE.
uint32_t ul_fsedge;
} data_frame_opt_t;
//! Clock mode structure.
typedef struct {
//! Communication clock selection.
//! For receiver configuration, one of SSC_RCMR_CKS_MCK, SSC_RCMR_CKS_TK or SSC_RCMR_CKS_RK.
//! For transmitter configuration, one of SSC_TCMR_CKS_MCK, SSC_TCMR_CKS_TK or SSC_TCMR_CKS_RK.
uint32_t ul_cks;
//! Communication clock output mode selection.
//! For receiver configuration, one of SSC_RCMR_CKO_NONE, SSC_RCMR_CKO_CONTINUOUS or SSC_RCMR_CKO_TRANSFER.
//! For transmitter configuration, one of SSC_TCMR_CKO_NONE, SSC_TCMR_CKO_CONTINUOUS or SSC_TCMR_CKO_TRANSFER.
uint32_t ul_cko;
//! Communication clock inversion.
//! For receiver configuration, SSC_RCMR_CKI or 0.
//! For transmitter configuration, SSC_TCMR_CKI or 0.
uint32_t ul_cki;
//! Communication clock gating selection.
//! For receiver configuration, one of SSC_RCMR_CKG_NONE, SSC_RCMR_CKG_CONTINUOUS and SSC_RCMR_CKG_TRANSFER.
//! For transmitter configuration, one of SSC_TCMR_CKG_NONE, SSC_TCMR_CKG_CONTINUOUS and SSC_TCMR_CKG_TRANSFER.
uint32_t ul_ckg;
//! Period divider selection, should be 0 to 255.
uint32_t ul_period;
//! Communication start delay, should be 0 to 255.
uint32_t ul_sttdly;
//! Communication start selection.
//! For receiver configuration, one of SSC_RCMR_START_CONTINUOUS, SSC_RCMR_START_TRANSMIT, SSC_RCMR_START_RF_LOW,
//! SSC_RCMR_START_RF_HIGH, SSC_RCMR_START_RF_FALLING, SSC_RCMR_START_RF_RISING, SSC_RCMR_START_RF_LEVEL,
//! SSC_RCMR_START_RF_EDGE or SSC_RCMR_START_CMP_0.
//! For transmitter configuration, one of SSC_TCMR_START_CONTINUOUS, SSC_TCMR_START_TRANSMIT, SSC_TCMR_START_RF_LOW,
//! SSC_TCMR_START_RF_HIGH, SSC_TCMR_START_RF_FALLING, SSC_TCMR_START_RF_RISING, SSC_TCMR_START_RF_LEVEL,
//! SSC_TCMR_START_RF_EDGE or SSC_TCMR_START_CMP_0.
uint32_t ul_start_sel;
} clock_opt_t;
//! SSC working role in I2S mode.
#define SSC_I2S_MASTER_OUT (1 << 0) //! Working mode for transmitter as master.
#define SSC_I2S_MASTER_IN (1 << 1) //! Working mode for receiver as master.
#define SSC_I2S_SLAVE_OUT (1 << 2) //! Working mode for transmitter as slave.
#define SSC_I2S_SLAVE_IN (1 << 3) //! Working mode for receiver as slave.
//! Bit for SSC Audio channel left.
#define SSC_AUDIO_CH_LEFT (1 << 0)
//! Bit for SSC Audio channel right.
#define SSC_AUDIO_CH_RIGHT (1 << 1)
//! SSC Audio Channel modes.
enum {
//! Mono, left channel enabled.
SSC_AUDIO_MONO_LEFT = (SSC_AUDIO_CH_LEFT),
//! Mono, right channel enabled.
SSC_AUDIO_MONO_RIGHT = (SSC_AUDIO_CH_RIGHT),
//! Stereo, two channels.
SSC_AUDIO_STERO = (SSC_AUDIO_CH_LEFT | SSC_AUDIO_CH_RIGHT)
};
uint32_t ssc_set_clock_divider(Ssc *p_ssc, uint32_t ul_bitclock, uint32_t ul_mck);
void ssc_i2s_set_transmitter(Ssc *p_ssc, uint32_t ul_mode,
uint32_t ul_cks, uint32_t ul_ch_mode, uint32_t ul_datlen);
void ssc_i2s_set_receiver(Ssc *p_ssc, uint32_t ul_mode,
uint32_t ul_cks, uint32_t ul_ch_mode, uint32_t ul_datlen);
void ssc_reset(Ssc *p_ssc);
void ssc_enable_rx(Ssc *p_ssc);
void ssc_disable_rx(Ssc *p_ssc);
void ssc_enable_tx(Ssc *p_ssc);
void ssc_disable_tx(Ssc *p_ssc);
void ssc_set_normal_mode(Ssc *p_ssc);
void ssc_set_loop_mode(Ssc *p_ssc);
void ssc_set_rx_stop_selection(Ssc *p_ssc, uint32_t ul_sel);
void ssc_set_td_default_level(Ssc *p_ssc, uint32_t ul_level);
void ssc_enable_tx_frame_sync_data(Ssc *p_ssc);
void ssc_disable_tx_frame_sync_data(Ssc *p_ssc);
void ssc_set_receiver(Ssc *p_ssc, clock_opt_t *p_rx_clk_opt, data_frame_opt_t *p_rx_data_frame);
void ssc_set_transmitter(Ssc *p_ssc, clock_opt_t *p_tx_clk_opt, data_frame_opt_t *p_tx_data_frame);
void ssc_set_rx_compare(Ssc *p_ssc, uint32_t ul_id, uint32_t ul_value);
uint32_t ssc_get_rx_compare(Ssc *p_ssc, uint32_t ul_id);
void ssc_enable_interrupt(Ssc *p_ssc, uint32_t ul_sources);
void ssc_disable_interrupt(Ssc *p_ssc, uint32_t ul_sources);
uint32_t ssc_get_interrupt_mask(Ssc *p_ssc);
uint32_t ssc_get_status(Ssc *p_ssc);
uint32_t ssc_is_tx_ready(Ssc *p_ssc);
uint32_t ssc_is_tx_empty(Ssc *p_ssc);
uint32_t ssc_is_rx_ready(Ssc *p_ssc);
uint32_t ssc_is_tx_enabled(Ssc *p_ssc);
uint32_t ssc_is_rx_enabled(Ssc *p_ssc);
#if (defined _SAM3S_) || (defined _SAM4S_)
uint32_t ssc_is_rx_buf_end(Ssc *p_ssc);
uint32_t ssc_is_tx_buf_end(Ssc *p_ssc);
uint32_t ssc_is_rx_buf_full(Ssc *p_ssc);
uint32_t ssc_is_tx_buf_empty(Ssc *p_ssc);
Pdc *ssc_get_pdc_base(Ssc *p_ssc);
#endif
uint32_t ssc_write(Ssc *p_ssc, uint32_t ul_frame);
uint32_t ssc_read(Ssc *p_ssc, uint32_t *ul_data);
void ssc_write_sync_data(Ssc *p_ssc, uint32_t ul_frame);
uint32_t ssc_read_sync_data(Ssc *p_ssc);
#if ((defined _SAM3XA_) || (defined _SAM3U_))
void *ssc_get_tx_access(Ssc *p_ssc);
void *ssc_get_rx_access(Ssc *p_ssc);
#endif
void ssc_set_writeprotect(Ssc *p_ssc, uint32_t ul_enable);
uint32_t ssc_get_writeprotect_status(Ssc *p_ssc);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* SSC_H_INCLUDED */
| 8,550
|
C++
|
.h
| 196
| 42.010204
| 117
| 0.722062
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,418
|
pwmc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/pwmc.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Interface for configuration the Pulse Width Modulation Controller (PWM) peripheral.
*
* \par Usage
*
* -# Configures PWM clocks A & B to run at the given frequencies using
* \ref PWMC_ConfigureClocks().
* -# Configure PWMC channel using \ref PWMC_ConfigureChannel(), \ref PWMC_ConfigureChannelExt()
* \ref PWMC_SetPeriod(), \ref PWMC_SetDutyCycle() and \ref PWMC_SetDeadTime().
* -# Enable & disable channel using \ref PWMC_EnableChannel() and
* \ref PWMC_DisableChannel().
* -# Enable & disable the period interrupt for the given PWM channel using
* \ref PWMC_EnableChannelIt() and \ref PWMC_DisableChannelIt().
* -# Enable & disable the selected interrupts sources on a PWMC peripheral
* using \ref PWMC_EnableIt() and \ref PWMC_DisableIt().
* -# Control syncronous channel using \ref PWMC_ConfigureSyncChannel(),
* \ref PWMC_SetSyncChannelUpdatePeriod() and \ref PWMC_SetSyncChannelUpdateUnlock().
* -# Control PWM override output using \ref PWMC_SetOverrideValue(),
* \ref PWMC_EnableOverrideOutput() and \ref PWMC_DisableOverrideOutput().
* -# Send data through the transmitter using \ref PWMC_WriteBuffer().
*
*/
#ifndef _PWMC_
#define _PWMC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "../chip.h"
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void PWMC_ConfigureChannel( Pwm* pPwm, uint32_t ul_channel, uint32_t prescaler, uint32_t alignment, uint32_t polarity ) ;
extern void PWMC_ConfigureChannelExt( Pwm* pPwm, uint32_t ul_channel, uint32_t prescaler, uint32_t alignment, uint32_t polarity,
uint32_t countEventSelect, uint32_t DTEnable, uint32_t DTHInverte, uint32_t DTLInverte ) ;
extern void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck ) ;
extern void PWMC_SetPeriod( Pwm* pPwm, uint32_t ul_channel, uint16_t period ) ;
extern void PWMC_SetDutyCycle( Pwm* pPwm, uint32_t ul_channel, uint16_t duty ) ;
extern void PWMC_SetDeadTime( Pwm* pPwm, uint32_t ul_channel, uint16_t timeH, uint16_t timeL ) ;
extern void PWMC_ConfigureSyncChannel( Pwm* pPwm, uint32_t ul_channels, uint32_t updateMode, uint32_t requestMode, uint32_t requestComparisonSelect ) ;
extern void PWMC_SetSyncChannelUpdatePeriod( Pwm* pPwm, uint8_t period ) ;
extern void PWMC_SetSyncChannelUpdateUnlock( Pwm* pPwm ) ;
extern void PWMC_EnableChannel( Pwm* pPwm, uint32_t ul_channel ) ;
extern void PWMC_DisableChannel( Pwm* pPwm, uint32_t ul_channel ) ;
extern void PWMC_EnableChannelIt( Pwm* pPwm, uint32_t ul_channel ) ;
extern void PWMC_DisableChannelIt( Pwm* pPwm, uint32_t ul_channel ) ;
extern void PWMC_EnableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2 ) ;
extern void PWMC_DisableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2 ) ;
extern uint8_t PWMC_WriteBuffer(Pwm *pwmc, void *buffer, uint32_t length ) ;
extern void PWMC_SetOverrideValue( Pwm* pPwm, uint32_t value ) ;
extern void PWMC_EnableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync ) ;
extern void PWMC_DisableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync ) ;
extern void PWMC_SetFaultMode( Pwm* pPwm, uint32_t mode ) ;
extern void PWMC_FaultClear( Pwm* pPwm, uint32_t fault ) ;
extern void PWMC_SetFaultProtectionValue( Pwm* pPwm, uint32_t value ) ;
extern void PWMC_EnableFaultProtection( Pwm* pPwm, uint32_t ul_channel, uint32_t value ) ;
extern void PWMC_ConfigureComparisonUnit( Pwm* pPwm, uint32_t x, uint32_t value, uint32_t mode ) ;
extern void PWMC_ConfigureEventLineMode( Pwm* pPwm, uint32_t x, uint32_t mode ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PWMC_ */
| 5,541
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.h
| 97
| 55.020619
| 151
| 0.669367
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,419
|
USB_host.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/USB_host.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef USB_HOST_H_INCLUDED
#define USB_HOST_H_INCLUDED
#include <stdint.h>
#define tokSETUP UOTGHS_HSTPIPCFG_PTOKEN_SETUP
#define tokIN UOTGHS_HSTPIPCFG_PTOKEN_IN
#define tokOUT UOTGHS_HSTPIPCFG_PTOKEN_OUT
#define tokINHS UOTGHS_HSTPIPCFG_PTOKEN_IN
#define tokOUTHS UOTGHS_HSTPIPCFG_PTOKEN_OUT
//! \brief Device speed
/*typedef enum {
UHD_SPEED_LOW = 0,
UHD_SPEED_FULL = 1,
UHD_SPEED_HIGH = 2,
} uhd_speed_t;*/
//! States of USBB interface
typedef enum {
UHD_STATE_NO_VBUS = 0,
UHD_STATE_DISCONNECTED = 1,
UHD_STATE_CONNECTED = 2,
UHD_STATE_ERROR = 3,
} uhd_vbus_state_t;
//extern uhd_speed_t uhd_get_speed(void);
extern void UHD_SetStack(void (*pf_isr)(void));
extern void UHD_Init(void);
extern void UHD_BusReset(void);
extern uhd_vbus_state_t UHD_GetVBUSState(void);
extern uint32_t UHD_Pipe0_Alloc(uint32_t ul_add, uint32_t ul_ep_size);
extern uint32_t UHD_Pipe_Alloc(uint32_t ul_dev_addr, uint32_t ul_dev_ep, uint32_t ul_type, uint32_t ul_dir, uint32_t ul_maxsize, uint32_t ul_interval, uint32_t ul_nb_bank);
extern void UHD_Pipe_Free(uint32_t ul_pipe);
extern uint32_t UHD_Pipe_Read(uint32_t ul_pipe, uint32_t ul_size, uint8_t* data);
extern void UHD_Pipe_Write(uint32_t ul_pipe, uint32_t ul_size, uint8_t* data);
extern void UHD_Pipe_Send(uint32_t ul_pipe, uint32_t ul_token_type);
extern uint32_t UHD_Pipe_Is_Transfer_Complete(uint32_t ul_pipe, uint32_t ul_token_type);
#endif /* USB_HOST_H_INCLUDED */
| 2,969
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C++
|
.h
| 62
| 46.209677
| 172
| 0.702656
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,420
|
pio.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/pio.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _PIO_
#define _PIO_
/*
* Headers
*/
#include "../chip.h"
#include <stdint.h>
/*
* Global Definitions
*/
typedef enum _EPioType
{
PIO_NOT_A_PIN, /* Not under control of a peripheral. */
PIO_PERIPH_A, /* The pin is controlled by the associated signal of peripheral A. */
PIO_PERIPH_B, /* The pin is controlled by the associated signal of peripheral B. */
#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
PIO_PERIPH_C, /* The pin is controlled by the associated signal of peripheral C. */
PIO_PERIPH_D, /* The pin is controlled by the associated signal of peripheral D. */
#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
PIO_INPUT, /* The pin is an input. */
PIO_OUTPUT_0, /* The pin is an output and has a default level of 0. */
PIO_OUTPUT_1 /* The pin is an output and has a default level of 1. */
} EPioType ;
/* Default pin configuration (no attribute). */
#define PIO_DEFAULT (0u << 0)
/* The internal pin pull-up is active. */
#define PIO_PULLUP (1u << 0)
/* The internal glitch filter is active. */
#define PIO_DEGLITCH (1u << 1)
/* The pin is open-drain. */
#define PIO_OPENDRAIN (1u << 2)
/* The internal debouncing filter is active. */
#define PIO_DEBOUNCE (1u << 3)
/* Enable additional interrupt modes. */
#define PIO_IT_AIME (1u << 4)
/* Interrupt High Level/Rising Edge detection is active. */
#define PIO_IT_RE_OR_HL (1u << 5)
/* Interrupt Edge detection is active. */
#define PIO_IT_EDGE (1u << 6)
/* Low level interrupt is active */
#define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME)
/* High level interrupt is active */
#define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME)
/* Falling edge interrupt is active */
#define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME)
/* Rising edge interrupt is active */
#define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME)
#ifdef __cplusplus
extern "C" {
#endif
/*
* The #attribute# field is a bitmask that can either be set to PIO_DEFAULt,
* or combine (using bitwise OR '|') any number of the following constants:
* - PIO_PULLUP
* - PIO_DEGLITCH
* - PIO_DEBOUNCE
* - PIO_OPENDRAIN
* - PIO_IT_LOW_LEVEL
* - PIO_IT_HIGH_LEVEL
* - PIO_IT_FALL_EDGE
* - PIO_IT_RISE_EDGE
*/
/*
* Global Functions
*/
extern void PIO_DisableInterrupt( Pio* pPio, const uint32_t dwMask ) ;
extern void PIO_PullUp( Pio* pPio, const uint32_t dwMask, const uint32_t dwPullUpEnable ) ;
extern void PIO_SetDebounceFilter( Pio* pPio, const uint32_t dwMask, const uint32_t dwCuttOff ) ;
extern void PIO_Set( Pio* pPio, const uint32_t dwMask ) ;
extern void PIO_Clear( Pio* pPio, const uint32_t dwMask ) ;
extern uint32_t PIO_Get( Pio* pPio, const EPioType dwType, const uint32_t dwMask ) ;
extern void PIO_SetPeripheral( Pio* pPio, const EPioType dwType, const uint32_t dwMask ) ;
extern void PIO_SetInput( Pio* pPio, uint32_t dwMask, uint32_t dwAttribute ) ;
extern void PIO_SetOutput( Pio* pPio, uint32_t dwMask, uint32_t dwDefaultValue,
uint32_t dwMultiDriveEnable, uint32_t dwPullUpEnable ) ;
extern uint32_t PIO_Configure( Pio* pPio, const EPioType dwType, const uint32_t dwMask, const uint32_t dwAttribute ) ;
extern uint32_t PIO_GetOutputDataStatus( const Pio* pPio, const uint32_t dwMask ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PIO_ */
| 5,140
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C++
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.h
| 109
| 45.036697
| 118
| 0.650359
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,421
|
timetick.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/timetick.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Methods and definitions for Global time tick and wait functions.
*
* Defines a common and simpliest use of Time Tick, to increase tickCount
* every 1ms, the application can get this value through GetTickCount().
*
* \par Usage
*
* -# Configure the System Tick with TimeTick_Configure() when MCK changed
* \note
* Must be done before any invoke of GetTickCount(), Wait() or Sleep().
* -# Uses GetTickCount to get current tick value.
* -# Uses Wait to wait several ms.
* -# Uses Sleep to enter wait for interrupt mode to wait several ms.
*
*/
#ifndef _TIMETICK_
#define _TIMETICK_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
extern uint32_t TimeTick_Configure( uint32_t dwNew_MCK ) ;
extern void TimeTick_Increment( void ) ;
extern uint32_t GetTickCount( void ) ;
extern void Wait( volatile uint32_t dwMs ) ;
extern void Sleep( volatile uint32_t dwMs ) ;
#endif /* _TIMETICK_ */
| 3,018
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C++
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.h
| 66
| 43.757576
| 80
| 0.563605
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,422
|
efc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/efc.h
|
/**
* \file
*
* \brief Embedded Flash Controller (EFC) driver for SAM.
*
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef EFC_H_INCLUDED
#define EFC_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/*! \name EFC return codes */
//! @{
typedef enum efc_rc {
EFC_RC_OK = 0, //!< Operation OK
EFC_RC_YES = 0, //!< Yes
EFC_RC_NO = 1, //!< No
EFC_RC_ERROR = 1, //!< General error
EFC_RC_INVALID, //!< Invalid argument input
EFC_RC_NOT_SUPPORT = 0xFFFFFFFF //!< Operation is not supported
} efc_rc_t;
//! @}
/*! \name EFC command */
//! @{
#define EFC_FCMD_GETD 0x00 //!< Get Flash Descriptor
#define EFC_FCMD_WP 0x01 //!< Write page
#define EFC_FCMD_WPL 0x02 //!< Write page and lock
#define EFC_FCMD_EWP 0x03 //!< Erase page and write page
#define EFC_FCMD_EWPL 0x04 //!< Erase page and write page then lock
#define EFC_FCMD_EA 0x05 //!< Erase all
#if (SAM3SD8_SERIES)
#define EFC_FCMD_EPL 0x06 //!< Erase plane
#endif
#if (SAM4S_SERIES)
#define EFC_FCMD_EPA 0x07 //!< Erase pages
#endif
#define EFC_FCMD_SLB 0x08 //!< Set Lock Bit
#define EFC_FCMD_CLB 0x09 //!< Clear Lock Bit
#define EFC_FCMD_GLB 0x0A //!< Get Lock Bit
#define EFC_FCMD_SGPB 0x0B //!< Set GPNVM Bit
#define EFC_FCMD_CGPB 0x0C //!< Clear GPNVM Bit
#define EFC_FCMD_GGPB 0x0D //!< Get GPNVM Bit
#define EFC_FCMD_STUI 0x0E //!< Start unique ID
#define EFC_FCMD_SPUI 0x0F //!< Stop unique ID
#if (SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES || SAM4S_SERIES)
#define EFC_FCMD_GCALB 0x10 //!< Get CALIB Bit
#endif
#if (SAM4S_SERIES)
#define EFC_FCMD_ES 0x11 //!< Erase sector
#define EFC_FCMD_WUS 0x12 //!< Write user signature
#define EFC_FCMD_EUS 0x13 //!< Erase user signature
#define EFC_FCMD_STUS 0x14 //!< Start read user signature
#define EFC_FCMD_SPUS 0x15 //!< Stop read user signature
#endif
//! @}
/*! The IAP function entry address */
#define CHIP_FLASH_IAP_ADDRESS (IROM_ADDR + 8)
/*! \name EFC access mode */
//! @{
#define EFC_ACCESS_MODE_128 0
#define EFC_ACCESS_MODE_64 EEFC_FMR_FAM
//! @}
uint32_t efc_init(Efc *p_efc, uint32_t ul_access_mode, uint32_t ul_fws);
void efc_enable_frdy_interrupt(Efc *p_efc);
void efc_disable_frdy_interrupt(Efc *p_efc);
void efc_set_flash_access_mode(Efc *p_efc, uint32_t ul_mode);
uint32_t efc_get_flash_access_mode(Efc *p_efc);
void efc_set_wait_state(Efc *p_efc, uint32_t ul_fws);
uint32_t efc_get_wait_state(Efc *p_efc);
uint32_t efc_perform_command(Efc *p_efc, uint32_t ul_command, uint32_t ul_argument);
uint32_t efc_get_status(Efc *p_efc);
uint32_t efc_get_result(Efc *p_efc);
uint32_t efc_perform_read_sequence(Efc *p_efc, uint32_t ul_cmd_st, uint32_t ul_cmd_sp, uint32_t *p_ul_buf, uint32_t ul_size);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* EFC_H_INCLUDED */
| 4,590
|
C++
|
.h
| 122
| 36.155738
| 125
| 0.71153
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,423
|
twi.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/twi.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for configuration the Two Wire Interface (TWI) peripheral.
*
*/
#ifndef _TWI_
#define _TWI_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "../chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
/* Returns 1 if the TXRDY bit (ready to transmit data) is set in the given status register value.*/
#define TWI_STATUS_TXRDY(status) (((status) & TWI_SR_TXRDY) == TWI_SR_TXRDY)
/* Returns 1 if the RXRDY bit (ready to receive data) is set in the given status register value.*/
#define TWI_STATUS_RXRDY(status) (((status) & TWI_SR_RXRDY) == TWI_SR_RXRDY)
/* Returns 1 if the TXCOMP bit (transfer complete) is set in the given status register value.*/
#define TWI_STATUS_TXCOMP(status) (((status) & TWI_SR_TXCOMP) == TWI_SR_TXCOMP)
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* External function
*----------------------------------------------------------------------------*/
extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck);
extern void TWI_SetClock( Twi *pTwi, uint32_t dwTwCk, uint32_t dwMCk );
extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress);
extern void TWI_Disable(Twi *pTwi);
extern void TWI_Stop(Twi *pTwi);
extern void TWI_StartRead(
Twi *pTwi,
uint8_t address,
uint32_t iaddress,
uint8_t isize);
extern uint8_t TWI_ReadByte(Twi *pTwi);
extern void TWI_WriteByte(Twi *pTwi, uint8_t byte);
extern void TWI_StartWrite(
Twi *pTwi,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t byte);
extern uint8_t TWI_ByteReceived(Twi *pTwi);
extern uint8_t TWI_ByteSent(Twi *pTwi);
extern uint8_t TWI_TransferComplete(Twi *pTwi);
extern void TWI_EnableIt(Twi *pTwi, uint32_t sources);
extern void TWI_DisableIt(Twi *pTwi, uint32_t sources);
extern uint32_t TWI_GetStatus(Twi *pTwi);
extern uint32_t TWI_GetMaskedStatus(Twi *pTwi);
extern void TWI_SendSTOPCondition(Twi *pTwi);
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _TWI_ */
| 3,879
|
C++
|
.h
| 86
| 42.895349
| 99
| 0.605207
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,424
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uotghs_device.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/system/libsam/include/uotghs_device.h
|
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011-2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef UOTGHS_DEVICE_H_INCLUDED
#define UOTGHS_DEVICE_H_INCLUDED
#define MAX_ENDPOINTS 10
#define EP0 0
#define EP0_SIZE 64
#define EPX_SIZE 512
#define EP_SINGLE_64 (0x32UL) // EP0
#define EP_DOUBLE_64 (0x36UL) // Other endpoints
// Control Endpoint
#define EP_TYPE_CONTROL (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | \
UOTGHS_DEVEPTCFG_EPTYPE_CTRL | \
UOTGHS_DEVEPTCFG_EPBK_1_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
// CDC Endpoints
#define EP_TYPE_BULK_IN (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | \
UOTGHS_DEVEPTCFG_EPDIR_IN | \
UOTGHS_DEVEPTCFG_EPTYPE_BLK | \
UOTGHS_DEVEPTCFG_EPBK_2_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
#define EP_TYPE_BULK_OUT (UOTGHS_DEVEPTCFG_EPSIZE_512_BYTE | \
UOTGHS_DEVEPTCFG_EPTYPE_BLK | \
UOTGHS_DEVEPTCFG_EPBK_2_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
#define EP_TYPE_INTERRUPT_IN (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | \
UOTGHS_DEVEPTCFG_EPDIR_IN | \
UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | \
UOTGHS_DEVEPTCFG_EPBK_2_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
// HID Endpoints
#define EP_TYPE_INTERRUPT_IN_HID (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | \
UOTGHS_DEVEPTCFG_EPDIR_IN | \
UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | \
UOTGHS_DEVEPTCFG_EPBK_2_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
// Various definitions
#define EP_TYPE_INTERRUPT_OUT (UOTGHS_DEVEPTCFG_EPSIZE_64_BYTE | \
UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | \
UOTGHS_DEVEPTCFG_EPTYPE_INTRPT | \
UOTGHS_DEVEPTCFG_EPBK_1_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_1_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
#define EP_TYPE_ISOCHRONOUS_IN (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | \
UOTGHS_DEVEPTCFG_EPDIR_IN | \
UOTGHS_DEVEPTCFG_EPTYPE_ISO | \
UOTGHS_DEVEPTCFG_EPBK_3_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_3_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
#define EP_TYPE_ISOCHRONOUS_OUT (UOTGHS_DEVEPTCFG_EPSIZE_1024_BYTE | \
UOTGHS_DEVEPTCFG_EPTYPE_ISO | \
UOTGHS_DEVEPTCFG_EPBK_3_BANK | \
UOTGHS_DEVEPTCFG_NBTRANS_3_TRANS | \
UOTGHS_DEVEPTCFG_ALLOC)
//! \ingroup usb_device_group
//! \defgroup udd_group USB Device Driver (UDD)
//! UOTGHS low-level driver for USB device mode
//!
//! @{
#ifndef UOTGHS_DEVEPTCFG_EPDIR_Pos
// Bit pos is not defined in SAM header file but we need it.
# define UOTGHS_DEVEPTCFG_EPDIR_Pos 8
#endif
//! @name UOTGHS Device IP properties
//! These macros give access to IP properties
//! @{
//! Get maximal number of endpoints
#define udd_get_endpoint_max_nbr() (9)
#define UDD_MAX_PEP_NB (udd_get_endpoint_max_nbr() + 1)
//! Get maximal number of banks of endpoints
#define udd_get_endpoint_bank_max_nbr(ep) ((ep == 0) ? 1 : (( ep <= 2) ? 3 : 2))
//! Get maximal size of endpoint (3X, 1024/64)
#define udd_get_endpoint_size_max(ep) (((ep) == 0) ? 64 : 512) // for bulk
//! Get DMA support of endpoints
#define Is_udd_endpoint_dma_supported(ep) ((((ep) >= 1) && ((ep) <= 6)) ? true : false)
//! Get High Band Width support of endpoints
#define Is_udd_endpoint_high_bw_supported(ep) (((ep) >= 2) ? true : false)
//! @}
//! @name UOTGHS Device speeds management
//! @{
//! Enable/disable device low-speed mode
#define udd_low_speed_enable() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_LS))
#define udd_low_speed_disable() (Clr_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_LS))
//! Test if device low-speed mode is forced
#define Is_udd_low_speed_enable() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_LS))
//! Enable high speed mode
#define udd_high_speed_enable() (Wr_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_SPDCONF_Msk, 0))
//! Disable high speed mode
#define udd_high_speed_disable() (Wr_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_SPDCONF_Msk, 3))
//! Test if controller is in full speed mode
#define Is_udd_full_speed_mode() (Rd_bitfield(UOTGHS->UOTGHS_SR, UOTGHS_SR_SPEED_Msk) == UOTGHS_SR_SPEED_FULL_SPEED)
//! @}
//! @name UOTGHS Device HS test mode management
//! @{
#ifdef UOTGHS_DEVCTRL_SPDCONF_HIGH_SPEED
//! Enable high speed test mode
# define udd_enable_hs_test_mode() (Wr_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_SPDCONF_Msk, 2))
# define udd_enable_hs_test_mode_j() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_TSTJ))
# define udd_enable_hs_test_mode_k() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_TSTK))
# define udd_enable_hs_test_mode_packet() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_TSTPCKT))
#endif
//! @}
//! @name UOTGHS Device vbus management
//! @{
#define udd_enable_vbus_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSTE))
#define udd_disable_vbus_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSTE))
#define Is_udd_vbus_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSTE))
#define Is_udd_vbus_high() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUS))
#define Is_udd_vbus_low() (!Is_udd_vbus_high())
#define udd_ack_vbus_transition() (UOTGHS->UOTGHS_SCR = UOTGHS_SCR_VBUSTIC)
#define udd_raise_vbus_transition() (UOTGHS->UOTGHS_SFR = UOTGHS_SFR_VBUSTIS)
#define Is_udd_vbus_transition() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSTI))
//! @}
//! @name UOTGHS device attach control
//! These macros manage the UOTGHS Device attach.
//! @{
//! Detaches from USB bus
#define udd_detach_device() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_DETACH))
//! Attaches to USB bus
#define udd_attach_device() (Clr_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_DETACH))
//! Test if the device is detached
#define Is_udd_detached() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_DETACH))
//! @}
//! @name UOTGHS device bus events control
//! These macros manage the UOTGHS Device bus events.
//! @{
//! Initiates a remote wake-up event
//! @{
#define udd_initiate_remote_wake_up() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_RMWKUP))
#define Is_udd_pending_remote_wake_up() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_RMWKUP))
//! @}
//! Manage upstream resume event (=remote wakeup)
//! The USB driver sends a resume signal called "Upstream Resume"
//! @{
#define udd_enable_remote_wake_up_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_UPRSMES)
#define udd_disable_remote_wake_up_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_UPRSMEC)
#define Is_udd_remote_wake_up_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_UPRSME))
#define udd_ack_remote_wake_up_start() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_UPRSMC)
#define udd_raise_remote_wake_up_start() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_UPRSMS)
#define Is_udd_remote_wake_up_start() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_UPRSM))
//! @}
//! Manage downstream resume event (=remote wakeup from host)
//! The USB controller detects a valid "End of Resume" signal initiated by the host
//! @{
#define udd_enable_resume_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_EORSMES)
#define udd_disable_resume_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_EORSMEC)
#define Is_udd_resume_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_EORSME))
#define udd_ack_resume() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_EORSMC)
#define udd_raise_resume() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_EORSMS)
#define Is_udd_resume() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_EORSM))
//! @}
//! Manage wake-up event (=usb line activity)
//! The USB controller is reactivated by a filtered non-idle signal from the lines
//! @{
#define udd_enable_wake_up_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_WAKEUPES)
#define udd_disable_wake_up_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_WAKEUPEC)
#define Is_udd_wake_up_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_WAKEUPE))
#define udd_ack_wake_up() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_WAKEUPC)
#define udd_raise_wake_up() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_WAKEUPS)
#define Is_udd_wake_up() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_WAKEUP))
//! @}
//! Manage reset event
//! Set when a USB "End of Reset" has been detected
//! @{
#define udd_enable_reset_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_EORSTES)
#define udd_disable_reset_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_EORSTEC)
#define Is_udd_reset_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_EORSTE))
#define udd_ack_reset() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_EORSTC)
#define udd_raise_reset() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_EORSTS)
#define Is_udd_reset() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_EORST))
//! @}
//! Manage start of frame event
//! @{
#define udd_enable_sof_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_SOFES)
#define udd_disable_sof_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_SOFEC)
#define Is_udd_sof_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_SOFE))
#define udd_ack_sof() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_SOFC)
#define udd_raise_sof() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_SOFS)
#define Is_udd_sof() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_SOF))
#define udd_frame_number() (Rd_bitfield(UOTGHS->UOTGHS_DEVFNUM, UOTGHS_DEVFNUM_FNUM_Msk))
#define Is_udd_frame_number_crc_error() (Tst_bits(UOTGHS->UOTGHS_DEVFNUM, UOTGHS_DEVFNUM_FNCERR))
//! @}
//! Manage Micro start of frame event (High Speed Only)
//! @{
#define udd_enable_msof_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_MSOFES)
#define udd_disable_msof_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_MSOFEC)
#define Is_udd_msof_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_MSOFE))
#define udd_ack_msof() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVIMR_MSOFE)
#define udd_raise_msof() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_MSOFS)
#define Is_udd_msof() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_MSOF))
#define udd_micro_frame_number() \
(Rd_bitfield(UOTGHS->UOTGHS_DEVFNUM, (UOTGHS_DEVFNUM_FNUM_Msk|UOTGHS_DEVFNUM_MFNUM_Msk)))
//! @}
//! Manage suspend event
//! @{
#define udd_enable_suspend_interrupt() (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_SUSPES)
#define udd_disable_suspend_interrupt() (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_SUSPEC)
#define Is_udd_suspend_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_SUSPE))
#define udd_ack_suspend() (UOTGHS->UOTGHS_DEVICR = UOTGHS_DEVICR_SUSPC)
#define udd_raise_suspend() (UOTGHS->UOTGHS_DEVIFR = UOTGHS_DEVIFR_SUSPS)
#define Is_udd_suspend() (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_SUSP))
//! @}
//! @}
//! @name UOTGHS device address control
//! These macros manage the UOTGHS Device address.
//! @{
//! enables USB device address
#define udd_enable_address() (Set_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_ADDEN))
//! disables USB device address
#define udd_disable_address() (Clr_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_ADDEN))
#define Is_udd_address_enabled() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_ADDEN))
//! configures the USB device address
#define udd_configure_address(addr) (Wr_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_UADD_Msk, addr))
//! gets the currently configured USB device address
#define udd_get_configured_address() (Rd_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_UADD_Msk))
//! @}
//! @name UOTGHS Device endpoint drivers
//! These macros manage the common features of the endpoints.
//! @{
//! Generic macro for UOTGHS registers that can be arrayed
//! @{
#define UOTGHS_ARRAY(reg,index) ((&(UOTGHS->reg))[(index)])
//! @}
//! @name UOTGHS Device endpoint configuration
//! @{
//! enables the selected endpoint
#define udd_enable_endpoint(ep) (Set_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPEN0 << (ep)))
//! disables the selected endpoint
#define udd_disable_endpoint(ep) (Clr_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPEN0 << (ep)))
//! tests if the selected endpoint is enabled
#define Is_udd_endpoint_enabled(ep) (Tst_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPEN0 << (ep)))
//! resets the selected endpoint
#define udd_reset_endpoint(ep) \
do { \
Set_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)); \
Clr_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)); \
} while (0)
//! Tests if the selected endpoint is being reset
#define Is_udd_resetting_endpoint(ep) (Tst_bits(UOTGHS->UOTGHS_DEVEPT, UOTGHS_DEVEPT_EPRST0 << (ep)))
//! Configures the selected endpoint type
#define udd_configure_endpoint_type(ep, type) (Wr_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPTYPE_Msk, type))
//! Gets the configured selected endpoint type
#define udd_get_endpoint_type(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPTYPE_Msk))
//! Enables the bank autoswitch for the selected endpoint
#define udd_enable_endpoint_bank_autoswitch(ep) (Set_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_AUTOSW))
//! Disables the bank autoswitch for the selected endpoint
#define udd_disable_endpoint_bank_autoswitch(ep) (Clr_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_AUTOSW))
#define Is_udd_endpoint_bank_autoswitch_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_AUTOSW))
//! Configures the selected endpoint direction
#define udd_configure_endpoint_direction(ep, dir) (Wr_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPDIR, dir))
//! Gets the configured selected endpoint direction
#define udd_get_endpoint_direction(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPDIR))
#define Is_udd_endpoint_in(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPDIR))
//! Bounds given integer size to allowed range and rounds it up to the nearest
//! available greater size, then applies register format of UOTGHS controller
//! for endpoint size bit-field.
#define udd_format_endpoint_size(size) (32 - clz(((uint32_t)min(max(size, 8), 1024) << 1) - 1) - 1 - 3)
//! Configures the selected endpoint size
#define udd_configure_endpoint_size(ep, size) (Wr_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPSIZE_Msk, udd_format_endpoint_size(size)))
//! Gets the configured selected endpoint size
#define udd_get_endpoint_size(ep) (8 << Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPSIZE_Msk))
//! Configures the selected endpoint number of banks
#define udd_configure_endpoint_bank(ep, bank) (Wr_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPBK_Msk, bank))
//! Gets the configured selected endpoint number of banks
#define udd_get_endpoint_bank(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPBK_Msk)+1)
//! Allocates the configuration selected endpoint in DPRAM memory
#define udd_allocate_memory(ep) (Set_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_ALLOC))
//! un-allocates the configuration selected endpoint in DPRAM memory
#define udd_unallocate_memory(ep) (Clr_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_ALLOC))
#define Is_udd_memory_allocated(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_ALLOC))
//! Configures selected endpoint in one step
#define udd_configure_endpoint(ep, type, dir, size, bank) (\
Wr_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTCFG[0], ep), UOTGHS_DEVEPTCFG_EPTYPE_Msk |\
UOTGHS_DEVEPTCFG_EPDIR |\
UOTGHS_DEVEPTCFG_EPSIZE_Msk |\
UOTGHS_DEVEPTCFG_EPBK_Msk , \
(((uint32_t)(type) << UOTGHS_DEVEPTCFG_EPTYPE_Pos) & UOTGHS_DEVEPTCFG_EPTYPE_Msk) |\
(((uint32_t)(dir ) << UOTGHS_DEVEPTCFG_EPDIR_Pos ) & UOTGHS_DEVEPTCFG_EPDIR) |\
( (uint32_t)udd_format_endpoint_size(size) << UOTGHS_DEVEPTCFG_EPSIZE_Pos) |\
(((uint32_t)(bank) << UOTGHS_DEVEPTCFG_EPBK_Pos) & UOTGHS_DEVEPTCFG_EPBK_Msk))\
)
//! Tests if current endpoint is configured
#define Is_udd_endpoint_configured(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_CFGOK))
//! Returns the control direction
#define udd_control_direction() (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], EP_CONTROL), UOTGHS_DEVEPTISR_CTRLDIR))
//! Resets the data toggle sequence
#define udd_reset_data_toggle(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_RSTDTS)
//! Tests if the data toggle sequence is being reset
#define Is_udd_data_toggle_reset(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_RSTDT))
//! Returns data toggle
#define udd_data_toggle(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_DTSEQ_Msk))
//! @}
//! @name UOTGHS Device control endpoint
//! These macros control the endpoints.
//! @{
//! @name UOTGHS Device control endpoint interrupts
//! These macros control the endpoints interrupts.
//! @{
//! Enables the selected endpoint interrupt
#define udd_enable_endpoint_interrupt(ep) (UOTGHS->UOTGHS_DEVIER = UOTGHS_DEVIER_PEP_0 << (ep))
//! Disables the selected endpoint interrupt
#define udd_disable_endpoint_interrupt(ep) (UOTGHS->UOTGHS_DEVIDR = UOTGHS_DEVIDR_PEP_0 << (ep))
//! Tests if the selected endpoint interrupt is enabled
#define Is_udd_endpoint_interrupt_enabled(ep) (Tst_bits(UOTGHS->UOTGHS_DEVIMR, UOTGHS_DEVIMR_PEP_0 << (ep)))
//! Tests if an interrupt is triggered by the selected endpoint
#define Is_udd_endpoint_interrupt(ep) (Tst_bits(UOTGHS->UOTGHS_DEVISR, UOTGHS_DEVISR_PEP_0 << (ep)))
//! Returns the lowest endpoint number generating an endpoint interrupt or MAX_PEP_NB if none
#define udd_get_interrupt_endpoint_number() (ctz(((UOTGHS->UOTGHS_DEVISR >> UOTGHS_DEVISR_PEP_Pos) & \
(UOTGHS->UOTGHS_DEVIMR >> UOTGHS_DEVIMR_PEP_Pos)) | \
(1 << MAX_PEP_NB)))
#define UOTGHS_DEVISR_PEP_Pos 12
#define UOTGHS_DEVIMR_PEP_Pos 12
//! @}
//! @name UOTGHS Device control endpoint errors
//! These macros control the endpoint errors.
//! @{
//! Enables the STALL handshake
#define udd_enable_stall_handshake(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_STALLRQS)
//! Disables the STALL handshake
#define udd_disable_stall_handshake(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_STALLRQC)
//! Tests if STALL handshake request is running
#define Is_udd_endpoint_stall_requested(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_STALLRQ))
//! Tests if STALL sent
#define Is_udd_stall(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_STALLEDI))
//! ACKs STALL sent
#define udd_ack_stall(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_STALLEDIC)
//! Raises STALL sent
#define udd_raise_stall(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_STALLEDIS)
//! Enables STALL sent interrupt
#define udd_enable_stall_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_STALLEDES)
//! Disables STALL sent interrupt
#define udd_disable_stall_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_STALLEDEC)
//! Tests if STALL sent interrupt is enabled
#define Is_udd_stall_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_STALLEDE))
//! Tests if NAK OUT received
#define Is_udd_nak_out(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_NAKOUTI))
//! ACKs NAK OUT received
#define udd_ack_nak_out(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_NAKOUTIC)
//! Raises NAK OUT received
#define udd_raise_nak_out(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_NAKOUTIS)
//! Enables NAK OUT interrupt
#define udd_enable_nak_out_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_NAKOUTES)
//! Disables NAK OUT interrupt
#define udd_disable_nak_out_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_NAKOUTEC)
//! Tests if NAK OUT interrupt is enabled
#define Is_udd_nak_out_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_NAKOUTE))
//! Tests if NAK IN received
#define Is_udd_nak_in(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_NAKINI))
//! ACKs NAK IN received
#define udd_ack_nak_in(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_NAKINIC)
//! Raises NAK IN received
#define udd_raise_nak_in(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_NAKINIS)
//! Enables NAK IN interrupt
#define udd_enable_nak_in_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_NAKINES)
//! Disables NAK IN interrupt
#define udd_disable_nak_in_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_NAKINEC)
//! Tests if NAK IN interrupt is enabled
#define Is_udd_nak_in_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_NAKINE))
//! ACKs endpoint isochronous overflow interrupt
#define udd_ack_overflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_OVERFIC)
//! Raises endpoint isochronous overflow interrupt
#define udd_raise_overflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_OVERFIS)
//! Tests if an overflow occurs
#define Is_udd_overflow(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_OVERFI))
//! Enables overflow interrupt
#define udd_enable_overflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_OVERFES)
//! Disables overflow interrupt
#define udd_disable_overflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_OVERFEC)
//! Tests if overflow interrupt is enabled
#define Is_udd_overflow_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_OVERFE))
//! ACKs endpoint isochronous underflow interrupt
#define udd_ack_underflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_UNDERFIC)
//! Raises endpoint isochronous underflow interrupt
#define udd_raise_underflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_UNDERFIS)
//! Tests if an underflow occurs
#define Is_udd_underflow(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_UNDERFI))
//! Enables underflow interrupt
#define udd_enable_underflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_UNDERFES)
//! Disables underflow interrupt
#define udd_disable_underflow_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_UNDERFEC)
//! Tests if underflow interrupt is enabled
#define Is_udd_underflow_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_UNDERFE))
//! Tests if CRC ERROR ISO OUT detected
#define Is_udd_crc_error(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_CRCERRI))
//! ACKs CRC ERROR ISO OUT detected
#define udd_ack_crc_error(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_CRCERRIC)
//! Raises CRC ERROR ISO OUT detected
#define udd_raise_crc_error(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_CRCERRIS)
//! Enables CRC ERROR ISO OUT detected interrupt
#define udd_enable_crc_error_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_CRCERRES)
//! Disables CRC ERROR ISO OUT detected interrupt
#define udd_disable_crc_error_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_CRCERREC)
//! Tests if CRC ERROR ISO OUT detected interrupt is enabled
#define Is_udd_crc_error_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_CRCERRE))
//! @}
//! @name UOTGHS Device control endpoint transfer
//! These macros control the endpoint transfer.
//! @{
//! Tests if endpoint read allowed
#define Is_udd_read_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_RWALL))
//! Tests if endpoint write allowed
#define Is_udd_write_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_RWALL))
//! Returns the byte count
#define udd_byte_count(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_BYCT_Msk))
//! Clears FIFOCON bit
#define udd_ack_fifocon(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_FIFOCONC)
//! Tests if FIFOCON bit set
#define Is_udd_fifocon(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_FIFOCON))
//! Returns the number of busy banks
#define udd_nb_busy_bank(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_NBUSYBK_Msk))
//! Returns the number of the current bank
#define udd_current_bank(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_CURRBK_Msk))
//! Kills last bank
#define udd_kill_last_in_bank(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_KILLBKS)
#define Is_udd_kill_last(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_KILLBK))
//! Tests if last bank killed
#define Is_udd_last_in_bank_killed(ep) (!Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_KILLBK))
//! Forces all banks full (OUT) or free (IN) interrupt
#define udd_force_bank_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_NBUSYBKS)
//! Unforces all banks full (OUT) or free (IN) interrupt
#define udd_unforce_bank_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_NBUSYBKS)
//! Enables all banks full (OUT) or free (IN) interrupt
#define udd_enable_bank_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_NBUSYBKES)
//! Disables all banks full (OUT) or free (IN) interrupt
#define udd_disable_bank_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_NBUSYBKEC)
//! Tests if all banks full (OUT) or free (IN) interrupt enabled
#define Is_udd_bank_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_NBUSYBKE))
//! Tests if SHORT PACKET received
#define Is_udd_short_packet(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_SHORTPACKET))
//! ACKs SHORT PACKET received
#define udd_ack_short_packet(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_SHORTPACKETC)
//! Raises SHORT PACKET received
#define udd_raise_short_packet(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_SHORTPACKETS)
//! Enables SHORT PACKET received interrupt
#define udd_enable_short_packet_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_SHORTPACKETES)
//! Disables SHORT PACKET received interrupt
#define udd_disable_short_packet_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_SHORTPACKETEC)
//! Tests if SHORT PACKET received interrupt is enabled
#define Is_udd_short_packet_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_SHORTPACKETE))
//! Tests if SETUP received
#define Is_udd_setup_received(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_RXSTPI))
//! ACKs SETUP received
#define udd_ack_setup_received(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_RXSTPIC)
//! Raises SETUP received
#define udd_raise_setup_received(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_RXSTPIS)
//! Enables SETUP received interrupt
#define udd_enable_setup_received_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_RXSTPES)
//! Disables SETUP received interrupt
#define udd_disable_setup_received_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_RXSTPEC)
//! Tests if SETUP received interrupt is enabled
#define Is_udd_setup_received_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_RXSTPE))
//! Tests if OUT received
#define Is_udd_out_received(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_RXOUTI))
//! ACKs OUT received
#define udd_ack_out_received(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_RXOUTIC)
//! Raises OUT received
#define udd_raise_out_received(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_RXOUTIS)
//! Enables OUT received interrupt
#define udd_enable_out_received_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_RXOUTES)
//! Disables OUT received interrupt
#define udd_disable_out_received_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_RXOUTEC)
//! Tests if OUT received interrupt is enabled
#define Is_udd_out_received_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_RXOUTE))
//! Tests if IN sending
#define Is_udd_in_send(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_TXINI))
//! ACKs IN sending
#define udd_ack_in_send(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTICR[0], ep) = UOTGHS_DEVEPTICR_TXINIC)
//! Raises IN sending
#define udd_raise_in_send(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIFR[0], ep) = UOTGHS_DEVEPTIFR_TXINIS)
//! Enables IN sending interrupt
#define udd_enable_in_send_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIER[0], ep) = UOTGHS_DEVEPTIER_TXINES)
//! Disables IN sending interrupt
#define udd_disable_in_send_interrupt(ep) (UOTGHS_ARRAY(UOTGHS_DEVEPTIDR[0], ep) = UOTGHS_DEVEPTIDR_TXINEC)
//! Tests if IN sending interrupt is enabled
#define Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_TXINE))
//! 8-bit access to FIFO data register of selected endpoint.
//! @param ep Endpoint of which to access FIFO data register
//! @return Volatile 8-bit data pointer to FIFO data register
//! @warning It is up to the user of this macro to make sure that all accesses
//! are aligned with their natural boundaries
//! @warning It is up to the user of this macro to make sure that used HSB
//! addresses are identical to the DPRAM internal pointer modulo 32 bits.
#define udd_get_endpoint_fifo_access8(ep) \
(((volatile uint8_t (*)[0x8000])UOTGHS_RAM_ADDR)[(ep)])
//! @}
/*********************************************************************************************************************/
//! @name UOTGHS IP properties
//! These macros give access to IP properties (not defined in 3X)
//! @{
//! Get IP name part 1 or 2
#define otg_get_ip_name()
#define otg_data_memory_barrier()
//! Get IP version
#define otg_get_ip_version()
//! Get DPRAM size (FIFO maximal size) in bytes
#define otg_get_dpram_size()
//! Get size of USBB PB address space
#define otg_get_ip_paddress_size()
//! @}
//! @name UOTGHS OTG ID pin management
//! The ID pin come from the USB OTG connector (A and B receptable) and
//! allows to select the USB mode host or device.
//! The USBB hardware can manage it automaticaly. This feature is optional.
//! When otg_ID_PIN equals true in conf_usb_host.h, the USB_ID must be defined in board.h.
//!
//! @{
//! PIO, PIO ID and MASK for USB_ID according to configuration from OTG_ID
#define OTG_ID_PIN USB_ID_GPIO
#define OTG_ID_FUNCTION USB_ID_FLAGS
//! Input USB_ID from its pin
#define otg_input_id_pin() do { \
pio_configure_pin(OTG_ID_PIN, OTG_ID_FUNCTION); \
} while (0)
//! Enable external OTG_ID pin (listened to by USB)
#define otg_enable_id_pin() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIDE))
//! Disable external OTG_ID pin (ignored by USB)
#define otg_disable_id_pin() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIDE))
//! Test if external OTG_ID pin enabled (listened to by USB)
#define Is_otg_id_pin_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIDE))
//! Disable external OTG_ID pin and force device mode
#define otg_force_device_mode() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIMOD), otg_disable_id_pin())
//! Test if device mode is forced
#define Is_otg_device_mode_forced() (!Is_otg_id_pin_enabled() && Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIMOD))
//! Disable external OTG_ID pin and force host mode
#define otg_force_host_mode() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIMOD), otg_disable_id_pin())
//! Test if host mode is forced
#define Is_otg_host_mode_forced() (!Is_otg_id_pin_enabled() && !Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UIMOD))
//! @name UOTGHS OTG ID pin interrupt management
//! These macros manage the ID pin interrupt
//! @{
#define otg_enable_id_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_IDTE))
#define otg_disable_id_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_IDTE))
#define Is_otg_id_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_IDTE))
#define Is_otg_id_device() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_ID))
#define Is_otg_id_host() (!Is_otg_id_device())
#define otg_ack_id_transition() (UOTGHS->UOTGHS_SCR = UOTGHS_SCR_IDTIC)
#define otg_raise_id_transition() (UOTGHS->UOTGHS_SFR = UOTGHS_SFR_IDTIS)
#define Is_otg_id_transition() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_IDTI))
//! @}
//! @name USBB OTG Vbus management
//! @{
#define otg_enable_vbus_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSTE))
#define otg_disable_vbus_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSTE))
#define Is_otg_vbus_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_VBUSTE))
#define Is_otg_vbus_high() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUS))
#define Is_otg_vbus_low() (!Is_otg_vbus_high())
#define otg_ack_vbus_transition() (UOTGHS->UOTGHS_SCR = UOTGHS_SCR_VBUSTIC)
#define otg_raise_vbus_transition() (UOTGHS->UOTGHS_SFR = UOTGHS_SFR_VBUSTIS)
#define Is_otg_vbus_transition() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSTI))
//! @}
//! @name UOTGHS OTG main management
//! These macros allows to enable/disable pad and UOTGHS hardware
//! @{
//! Enable USB macro
#define otg_enable() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_USBE))
//! Disable USB macro
#define otg_disable() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_USBE))
#define Is_otg_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_USBE))
//! Enable OTG pad
#define otg_enable_pad() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_OTGPADE))
//! Disable OTG pad
#define otg_disable_pad() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_OTGPADE))
#define Is_otg_pad_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_OTGPADE))
//! Check Clock Usable
//! For parts with HS feature, this one corresponding at UTMI clock
#define Is_otg_clock_usable() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_CLKUSABLE))
//! Stop (freeze) internal USB clock
#define otg_freeze_clock() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_FRZCLK))
#define otg_unfreeze_clock() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_FRZCLK))
#define Is_otg_clock_frozen() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_FRZCLK))
//! Configure time-out of specified OTG timer
#define otg_configure_timeout(timer, timeout) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk, timeout),\
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK))
//! Get configured time-out of specified OTG timer
#define otg_get_timeout(timer) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
Rd_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk))
//! Get the dual-role device state of the internal USB finite state machine of the UOTGHS controller
#define otg_get_fsm_drd_state() (Rd_bitfield(UOTGHS->UOTGHS_FSM, UOTGHS_FSM_DRDSTATE_Msk))
//! @}
//! @name UOTGHS OTG hardware protocol
//! These macros manages the hardware OTG protocol
//! @{
//! Initiates a Host Negociation Protocol
#define otg_device_initiate_hnp() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPREQ))
//! Accepts a Host Negociation Protocol
#define otg_host_accept_hnp() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPREQ))
//! Rejects a Host Negociation Protocol
#define otg_host_reject_hnp() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPREQ))
//! initiates a Session Request Protocol
#define otg_device_initiate_srp() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPREQ))
//! Selects VBus as SRP method
#define otg_select_vbus_srp_method() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPSEL))
#define Is_otg_vbus_srp_method_selected() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPSEL))
//! Selects data line as SRP method
#define otg_select_data_srp_method() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPSEL))
#define Is_otg_data_srp_method_selected() (!Is_otg_vbus_srp_method_selected())
//! Tests if a HNP occurs
#define Is_otg_hnp() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPREQ))
//! Tests if a SRP from device occurs
#define Is_otg_device_srp() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPREQ))
//! Enables HNP error interrupt
#define otg_enable_hnp_error_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPERRE))
//! Disables HNP error interrupt
#define otg_disable_hnp_error_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPERRE))
#define Is_otg_hnp_error_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_HNPERRE))
//! ACKs HNP error interrupt
#define otg_ack_hnp_error_interrupt() (UOTGHS->UOTGHS_SCR = UOTGHS_SCR_HNPERRIC)
//! Raises HNP error interrupt
#define otg_raise_hnp_error_interrupt() (UOTGHS->UOTGHS_SFR = UOTGHS_SFR_HNPERRIS)
//! Tests if a HNP error occurs
#define Is_otg_hnp_error_interrupt() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_HNPERRI))
//! Enables role exchange interrupt
#define otg_enable_role_exchange_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_ROLEEXE))
//! Disables role exchange interrupt
#define otg_disable_role_exchange_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_ROLEEXE))
#define Is_otg_role_exchange_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_ROLEEXE))
//! ACKs role exchange interrupt
#define otg_ack_role_exchange_interrupt() (UOTGHS->UOTGHS_SCR = UOTGHS_SCR_ROLEEXIC)
//! Raises role exchange interrupt
#define otg_raise_role_exchange_interrupt() (UOTGHS->UOTGHS_SFR = UOTGHS_SFR_ROLEEXIS)
//! Tests if a role exchange occurs
#define Is_otg_role_exchange_interrupt() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_ROLEEXI))
//! Eenables SRP interrupt
#define otg_enable_srp_interrupt() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPE))
//! Disables SRP interrupt
#define otg_disable_srp_interrupt() (Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPE))
#define Is_otg_srp_interrupt_enabled() (Tst_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_SRPE))
//! ACKs SRP interrupt
#define otg_ack_srp_interrupt() (UOTGHS->UOTGHS_SCR = UOTGHS_SCR_SRPIC)
//! Raises SRP interrupt
#define otg_raise_srp_interrupt() (UOTGHS->UOTGHS_SFR = UOTGHS_SFR_SRPIS)
//! Tests if a SRP occurs
#define Is_otg_srp_interrupt() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_SRPI))
//! @}
//! @}
#endif /* UOTGHS_DEVICE_H_INCLUDED */
| 44,415
|
C++
|
.h
| 671
| 63.377049
| 163
| 0.672018
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,425
|
wiring_private.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/wiring_private.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef WiringPrivate_h
#define WiringPrivate_h
#include <stdint.h>
#include <stdio.h>
#include <stdarg.h>
#ifdef __cplusplus
extern "C"{
#endif
// Includes Atmel CMSIS
#include <chip.h>
#include "wiring_constants.h"
#ifdef __cplusplus
} // extern "C"
#include "HardwareSerial.h"
#endif
#endif
| 1,083
|
C++
|
.h
| 30
| 33.866667
| 76
| 0.776177
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,427
|
wiring_analog.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/wiring_analog.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_ANALOG_
#define _WIRING_ANALOG_
#ifdef __cplusplus
extern "C" {
#endif
/*
* \brief SAM3 products have only one reference for ADC
*/
typedef enum _eAnalogReference
{
AR_DEFAULT,
} eAnalogReference ;
/*
* \brief Configures the reference voltage used for analog input (i.e. the value used as the top of the input range).
* This function is kept only for compatibility with existing AVR based API.
*
* \param ulMmode Should be set to AR_DEFAULT.
*/
extern void analogReference( eAnalogReference ulMode ) ;
/*
* \brief Writes an analog value (PWM wave) to a pin.
*
* \param ulPin
* \param ulValue
*/
extern void analogWrite( uint32_t ulPin, uint32_t ulValue ) ;
/*
* \brief Reads the value from the specified analog pin.
*
* \param ulPin
*
* \return Read value from selected pin, if no error.
*/
extern uint32_t analogRead( uint32_t ulPin ) ;
/*
* \brief Set the resolution of analogRead return values. Default is 10 bits (range from 0 to 1023).
*
* \param res
*/
extern void analogReadResolution(int res);
/*
* \brief Set the resolution of analogWrite parameters. Default is 8 bits (range from 0 to 255).
*
* \param res
*/
extern void analogWriteResolution(int res);
extern void analogOutputInit( void ) ;
#ifdef __cplusplus
}
#endif
#endif /* _WIRING_ANALOG_ */
| 2,094
|
C++
|
.h
| 65
| 30.184615
| 117
| 0.754342
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,429
|
wiring.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/wiring.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
Copyright (c) 2013 by Paul Stoffregen <paul@pjrc.com> (delayMicroseconds)
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_
#define _WIRING_
#ifdef __cplusplus
extern "C" {
#endif
/**
*
*/
extern void initVariant( void ) ;
extern void init( void ) ;
/**
* \brief Returns the number of milliseconds since the Arduino board began running the current program.
*
* This number will overflow (go back to zero), after approximately 50 days.
*
* \return Number of milliseconds since the program started (uint32_t)
*/
extern uint32_t millis( void ) ;
/**
* \brief Returns the number of microseconds since the Arduino board began running the current program.
*
* This number will overflow (go back to zero), after approximately 70 minutes. On 16 MHz Arduino boards
* (e.g. Duemilanove and Nano), this function has a resolution of four microseconds (i.e. the value returned is
* always a multiple of four). On 8 MHz Arduino boards (e.g. the LilyPad), this function has a resolution
* of eight microseconds.
*
* \note There are 1,000 microseconds in a millisecond and 1,000,000 microseconds in a second.
*/
extern uint32_t micros( void ) ;
/**
* \brief Pauses the program for the amount of time (in miliseconds) specified as parameter.
* (There are 1000 milliseconds in a second.)
*
* \param dwMs the number of milliseconds to pause (uint32_t)
*/
extern void delay( uint32_t dwMs ) ;
/**
* \brief Pauses the program for the amount of time (in microseconds) specified as parameter.
*
* \param dwUs the number of microseconds to pause (uint32_t)
*/
static inline void delayMicroseconds(uint32_t) __attribute__((always_inline, unused));
static inline void delayMicroseconds(uint32_t usec){
/*
* Based on Paul Stoffregen's implementation
* for Teensy 3.0 (http://www.pjrc.com/)
*/
if (usec == 0) return;
uint32_t n = usec * (VARIANT_MCK / 3000000);
asm volatile(
"L_%=_delayMicroseconds:" "\n\t"
"subs %0, #1" "\n\t"
"bne L_%=_delayMicroseconds" "\n"
: "+r" (n) :
);
}
#ifdef __cplusplus
}
#endif
#endif /* _WIRING_ */
| 2,882
|
C++
|
.h
| 75
| 35.666667
| 111
| 0.719499
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,430
|
WInterrupts.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/WInterrupts.h
|
/*
Copyright (c) 2011-2012 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_INTERRUPTS_
#define _WIRING_INTERRUPTS_
#include "Arduino.h"
#ifdef __cplusplus
extern "C" {
#endif
void attachInterrupt(uint32_t pin, void (*callback)(void), uint32_t mode);
void detachInterrupt(uint32_t pin);
#ifdef __cplusplus
}
#endif
#endif /* _WIRING_INTERRUPTS_ */
| 1,080
|
C++
|
.h
| 26
| 39.192308
| 76
| 0.774904
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,432
|
watchdog.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/watchdog.h
|
/*
Copyright (c) 2014 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WATCHDOG_
#define _WATCHDOG_
#include <stdint.h>
// Watchdog functions
/*
* \brief Enable the watchdog with the specified timeout. Should only be called once.
*
* \param timeount in milliseconds.
*/
void watchdogEnable (uint32_t timeout);
/*
* \brief Disable the watchdog timer. Should only be called once.
*
*/
void watchdogDisable (void);
/*
* \brief Reset the watchdog counter.
*
*/
void watchdogReset (void);
/*
* \brief Watchdog initialize hook. This function is called from init(). If the user does not provide
* this function, then the default action is to disable watchdog.
*/
void watchdogSetup (void);
#endif /* _WATCHDOG_ */
| 1,446
|
C++
|
.h
| 40
| 33.925
| 101
| 0.763989
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,435
|
Reset.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/Reset.h
|
/*
Copyright (c) 2012 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef RESET_H
#define RESET_H
#ifdef __cplusplus
extern "C" {
#endif
void initiateReset(int ms);
void tickReset();
void cancelReset();
#ifdef __cplusplus
}
#endif
#endif
| 956
|
C++
|
.h
| 26
| 34.538462
| 76
| 0.779826
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,438
|
Arduino.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/Arduino.h
|
/*
Arduino.h - Main include file for the Arduino SDK
Copyright (c) 2005-2013 Arduino Team. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef Arduino_h
#define Arduino_h
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
// some libraries and sketches depend on this
// AVR stuff, assuming Arduino.h or WProgram.h
// automatically includes it...
#include <avr/pgmspace.h>
#include <avr/interrupt.h>
#include "binary.h"
#include "itoa.h"
#ifdef __cplusplus
extern "C"{
#endif // __cplusplus
// Includes Atmel CMSIS
#include <chip.h>
#include "wiring_constants.h"
#define clockCyclesPerMicrosecond() ( SystemCoreClock / 1000000L )
#define clockCyclesToMicroseconds(a) ( ((a) * 1000L) / (SystemCoreClock / 1000L) )
#define microsecondsToClockCycles(a) ( (a) * (SystemCoreClock / 1000000L) )
void yield(void);
/* sketch */
extern void setup( void ) ;
extern void loop( void ) ;
//#define NOT_A_PIN 0 // defined in pio.h/EPioType
#define NOT_A_PORT 0
#define NOT_AN_INTERRUPT -1
typedef enum _EExt_Interrupts
{
EXTERNAL_INT_0=0,
EXTERNAL_INT_1=1,
EXTERNAL_INT_2=2,
EXTERNAL_INT_3=3,
EXTERNAL_INT_4=4,
EXTERNAL_INT_5=5,
EXTERNAL_INT_6=6,
EXTERNAL_INT_7=7,
EXTERNAL_NUM_INTERRUPTS
} EExt_Interrupts ;
typedef void (*voidFuncPtr)( void ) ;
/* Define attribute */
#if defined ( __CC_ARM ) /* Keil uVision 4 */
#define WEAK (__attribute__ ((weak)))
#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */
#define WEAK __weak
#elif defined ( __GNUC__ ) /* GCC CS */
#define WEAK __attribute__ ((weak))
#endif
/* Definitions and types for pins */
typedef enum _EAnalogChannel
{
NO_ADC=-1,
ADC0=0,
ADC1,
ADC2,
ADC3,
ADC4,
ADC5,
ADC6,
ADC7,
ADC8,
ADC9,
ADC10,
ADC11,
ADC12,
ADC13,
ADC14,
ADC15,
DA0,
DA1
} EAnalogChannel ;
#define ADC_CHANNEL_NUMBER_NONE 0xffffffff
// Definitions for PWM channels
typedef enum _EPWMChannel
{
NOT_ON_PWM=-1,
PWM_CH0=0,
PWM_CH1,
PWM_CH2,
PWM_CH3,
PWM_CH4,
PWM_CH5,
PWM_CH6,
PWM_CH7
} EPWMChannel ;
// Definitions for TC channels
typedef enum _ETCChannel
{
NOT_ON_TIMER=-1,
TC0_CHA0=0,
TC0_CHB0,
TC0_CHA1,
TC0_CHB1,
TC0_CHA2,
TC0_CHB2,
TC1_CHA3,
TC1_CHB3,
TC1_CHA4,
TC1_CHB4,
TC1_CHA5,
TC1_CHB5,
TC2_CHA6,
TC2_CHB6,
TC2_CHA7,
TC2_CHB7,
TC2_CHA8,
TC2_CHB8
} ETCChannel ;
/**
* Pin Attributes to be OR-ed
*/
#define PIN_ATTR_COMBO (1UL<<0)
#define PIN_ATTR_ANALOG (1UL<<1)
#define PIN_ATTR_DIGITAL (1UL<<2)
#define PIN_ATTR_PWM (1UL<<3)
#define PIN_ATTR_TIMER (1UL<<4)
#define PIN_STATUS_DIGITAL_INPUT_PULLUP (0x01)
#define PIN_STATUS_DIGITAL_INPUT (0x02)
#define PIN_STATUS_DIGITAL_OUTPUT (0x03)
#define PIN_STATUS_ANALOG (0x04)
#define PIN_STATUS_PWM (0x05)
#define PIN_STATUS_TIMER (0x06)
#define PIN_STATUS_SERIAL (0x07)
#define PIN_STATUS_DW_LOW (0x10)
#define PIN_STATUS_DW_HIGH (0x11)
/* Types used for the tables below */
typedef struct _PinDescription
{
Pio* pPort ;
uint32_t ulPin ;
uint32_t ulPeripheralId ;
EPioType ulPinType ;
uint32_t ulPinConfiguration ;
uint32_t ulPinAttribute ;
EAnalogChannel ulAnalogChannel ; /* Analog pin in the Arduino context (label on the board) */
EAnalogChannel ulADCChannelNumber ; /* ADC Channel number in the SAM device */
EPWMChannel ulPWMChannel ;
ETCChannel ulTCChannel ;
} PinDescription ;
extern uint8_t g_pinStatus[];
/* Pins table to be instanciated into variant.cpp */
extern const PinDescription g_APinDescription[] ;
#ifdef __cplusplus
} // extern "C"
#include "WCharacter.h"
#include "WString.h"
#include "Tone.h"
#include "WMath.h"
#include "HardwareSerial.h"
#include "wiring_pulse.h"
#endif // __cplusplus
// Include board variant
#include "variant.h"
#include "wiring.h"
#include "wiring_digital.h"
#include "wiring_analog.h"
#include "wiring_shift.h"
#include "WInterrupts.h"
#include "watchdog.h"
// USB Device
#ifndef USB_VID
#define USB_VID 0x2341 // arduino LLC vid
#endif
#ifndef USB_PID
#define USB_PID 0x003E // arduino Due pid
#endif
#include "USB/USBDesc.h"
#include "USB/USBCore.h"
#include "USB/USBAPI.h"
#endif // Arduino_h
| 4,988
|
C++
|
.h
| 187
| 24.55615
| 95
| 0.709278
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,439
|
Tone.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/Tone.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_TONE_
#define _WIRING_TONE_
#endif /* _WIRING_TONE_ */
| 854
|
C++
|
.h
| 17
| 47.411765
| 76
| 0.772563
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,440
|
wiring_shift.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/wiring_shift.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_SHIFT_
#define _WIRING_SHIFT_
#ifdef __cplusplus
extern "C" {
#endif
/*
* \brief
*/
extern uint32_t shiftIn( uint32_t ulDataPin, uint32_t ulClockPin, uint32_t ulBitOrder ) ;
/*
* \brief
*/
extern void shiftOut( uint32_t ulDataPin, uint32_t ulClockPin, uint32_t ulBitOrder, uint32_t ulVal ) ;
#ifdef __cplusplus
}
#endif
#endif /* _WIRING_SHIFT_ */
| 1,157
|
C++
|
.h
| 31
| 35
| 102
| 0.762332
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,444
|
WCharacter.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/WCharacter.h
|
/*
WCharacter.h - Character utility functions for Wiring & Arduino
Copyright (c) 2010 Hernando Barragan. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef Character_h
#define Character_h
#include <ctype.h>
#ifdef __cplusplus
extern "C" {
#endif
// WCharacter.h prototypes
#if defined ( __GNUC__ )
inline boolean isAlphaNumeric(int c) __attribute__((always_inline));
inline boolean isAlpha(int c) __attribute__((always_inline));
inline boolean isAscii(int c) __attribute__((always_inline));
inline boolean isWhitespace(int c) __attribute__((always_inline));
inline boolean isControl(int c) __attribute__((always_inline));
inline boolean isDigit(int c) __attribute__((always_inline));
inline boolean isGraph(int c) __attribute__((always_inline));
inline boolean isLowerCase(int c) __attribute__((always_inline));
inline boolean isPrintable(int c) __attribute__((always_inline));
inline boolean isPunct(int c) __attribute__((always_inline));
inline boolean isSpace(int c) __attribute__((always_inline));
inline boolean isUpperCase(int c) __attribute__((always_inline));
inline boolean isHexadecimalDigit(int c) __attribute__((always_inline));
inline int toAscii(int c) __attribute__((always_inline));
inline int toLowerCase(int c) __attribute__((always_inline));
inline int toUpperCase(int c)__attribute__((always_inline));
#elif defined ( __ICCARM__ )
#endif
// Checks for an alphanumeric character.
// It is equivalent to (isalpha(c) || isdigit(c)).
inline boolean isAlphaNumeric(int c)
{
return ( isalnum(c) == 0 ? false : true);
}
// Checks for an alphabetic character.
// It is equivalent to (isupper(c) || islower(c)).
inline boolean isAlpha(int c)
{
return ( isalpha(c) == 0 ? false : true);
}
// Checks whether c is a 7-bit unsigned char value
// that fits into the ASCII character set.
inline boolean isAscii(int c)
{
/* return ( isascii(c) == 0 ? false : true); */
return ( (c & ~0x7f) != 0 ? false : true);
}
// Checks for a blank character, that is, a space or a tab.
inline boolean isWhitespace(int c)
{
return ( isblank (c) == 0 ? false : true);
}
// Checks for a control character.
inline boolean isControl(int c)
{
return ( iscntrl (c) == 0 ? false : true);
}
// Checks for a digit (0 through 9).
inline boolean isDigit(int c)
{
return ( isdigit (c) == 0 ? false : true);
}
// Checks for any printable character except space.
inline boolean isGraph(int c)
{
return ( isgraph (c) == 0 ? false : true);
}
// Checks for a lower-case character.
inline boolean isLowerCase(int c)
{
return (islower (c) == 0 ? false : true);
}
// Checks for any printable character including space.
inline boolean isPrintable(int c)
{
return ( isprint (c) == 0 ? false : true);
}
// Checks for any printable character which is not a space
// or an alphanumeric character.
inline boolean isPunct(int c)
{
return ( ispunct (c) == 0 ? false : true);
}
// Checks for white-space characters. For the avr-libc library,
// these are: space, formfeed ('\f'), newline ('\n'), carriage
// return ('\r'), horizontal tab ('\t'), and vertical tab ('\v').
inline boolean isSpace(int c)
{
return ( isspace (c) == 0 ? false : true);
}
// Checks for an uppercase letter.
inline boolean isUpperCase(int c)
{
return ( isupper (c) == 0 ? false : true);
}
// Checks for a hexadecimal digits, i.e. one of 0 1 2 3 4 5 6 7
// 8 9 a b c d e f A B C D E F.
inline boolean isHexadecimalDigit(int c)
{
return ( isxdigit (c) == 0 ? false : true);
}
// Converts c to a 7-bit unsigned char value that fits into the
// ASCII character set, by clearing the high-order bits.
inline int toAscii(int c)
{
/* return toascii (c); */
return (c & 0x7f);
}
// Warning:
// Many people will be unhappy if you use this function.
// This function will convert accented letters into random
// characters.
// Converts the letter c to lower case, if possible.
inline int toLowerCase(int c)
{
return tolower (c);
}
// Converts the letter c to upper case, if possible.
inline int toUpperCase(int c)
{
return toupper (c);
}
#ifdef __cplusplus
}
#endif
#endif
| 4,769
|
C++
|
.h
| 139
| 32.683453
| 75
| 0.723033
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,447
|
wiring_digital.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/wiring_digital.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_DIGITAL_
#define _WIRING_DIGITAL_
#ifdef __cplusplus
extern "C" {
#endif
/**
* \brief Configures the specified pin to behave either as an input or an output. See the description of digital pins for details.
*
* \param ulPin The number of the pin whose mode you wish to set
* \param ulMode Either INPUT or OUTPUT
*/
extern void pinMode( uint32_t dwPin, uint32_t dwMode ) ;
/**
* \brief Write a HIGH or a LOW value to a digital pin.
*
* If the pin has been configured as an OUTPUT with pinMode(), its voltage will be set to the
* corresponding value: 5V (or 3.3V on 3.3V boards) for HIGH, 0V (ground) for LOW.
*
* If the pin is configured as an INPUT, writing a HIGH value with digitalWrite() will enable an internal
* 20K pullup resistor (see the tutorial on digital pins). Writing LOW will disable the pullup. The pullup
* resistor is enough to light an LED dimly, so if LEDs appear to work, but very dimly, this is a likely
* cause. The remedy is to set the pin to an output with the pinMode() function.
*
* \note Digital pin PIN_LED is harder to use as a digital input than the other digital pins because it has an LED
* and resistor attached to it that's soldered to the board on most boards. If you enable its internal 20k pull-up
* resistor, it will hang at around 1.7 V instead of the expected 5V because the onboard LED and series resistor
* pull the voltage level down, meaning it always returns LOW. If you must use pin PIN_LED as a digital input, use an
* external pull down resistor.
*
* \param dwPin the pin number
* \param dwVal HIGH or LOW
*/
extern void digitalWrite( uint32_t dwPin, uint32_t dwVal ) ;
/**
* \brief Reads the value from a specified digital pin, either HIGH or LOW.
*
* \param ulPin The number of the digital pin you want to read (int)
*
* \return HIGH or LOW
*/
extern int digitalRead( uint32_t ulPin ) ;
#ifdef __cplusplus
}
#endif
#endif /* _WIRING_DIGITAL_ */
| 2,729
|
C++
|
.h
| 59
| 44.135593
| 130
| 0.754135
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,449
|
syscalls.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/syscalls.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/**
* \file syscalls.h
*
* Implementation of newlib syscall.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdio.h>
#include <stdarg.h>
#include <sys/types.h>
#include <sys/stat.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern caddr_t _sbrk( int incr ) ;
extern int link( char *cOld, char *cNew ) ;
extern int _close( int file ) ;
extern int _fstat( int file, struct stat *st ) ;
extern int _isatty( int file ) ;
extern int _lseek( int file, int ptr, int dir ) ;
extern int _read(int file, char *ptr, int len) ;
extern int _write( int file, char *ptr, int len ) ;
#ifdef __cplusplus
}
#endif
| 1,731
|
C++
|
.h
| 44
| 37.090909
| 80
| 0.593656
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,451
|
WMath.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/WMath.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_MATH_
#define _WIRING_MATH_
extern long random( long ) ;
extern long random( long, long ) ;
extern void randomSeed( uint32_t dwSeed ) ;
extern long map( long, long, long, long, long ) ;
extern uint16_t makeWord( uint16_t w ) ;
extern uint16_t makeWord( uint8_t h, uint8_t l ) ;
#define word(...) makeWord(__VA_ARGS__)
#endif /* _WIRING_MATH_ */
| 1,147
|
C++
|
.h
| 24
| 45.375
| 76
| 0.754039
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,452
|
wiring_pulse.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/wiring_pulse.h
|
/*
Copyright (c) 2011 Arduino. All right reserved.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _WIRING_PULSE_
#define _WIRING_PULSE_
#ifdef __cplusplus
extern "C" {
#endif
unsigned long countPulseASM(const volatile uint32_t *port, uint32_t bit, uint32_t stateMask, unsigned long maxloops);
/*
* \brief Measures the length (in microseconds) of a pulse on the pin; state is HIGH
* or LOW, the type of pulse to measure. Works on pulses from 2-3 microseconds
* to 3 minutes in length, but must be called at least a few dozen microseconds
* before the start of the pulse.
*/
extern uint32_t pulseIn( uint32_t ulPin, uint32_t ulState, uint32_t ulTimeout = 1000000L ) ;
extern uint32_t pulseInLong( uint8_t pin, uint8_t state, unsigned long timeout = 1000000L ) ;
#ifdef __cplusplus
}
#endif
#endif /* _WIRING_PULSE_ */
| 1,518
|
C++
|
.h
| 32
| 45.21875
| 117
| 0.766576
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,456
|
USBDesc.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/USB/USBDesc.h
|
// Copyright (c) 2010, Peter Barrett
/*
** Permission to use, copy, modify, and/or distribute this software for
** any purpose with or without fee is hereby granted, provided that the
** above copyright notice and this permission notice appear in all copies.
**
** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR
** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES
** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
** SOFTWARE.
*/
#ifndef __USBDESC_H__
#define __USBDESC_H__
#define CDC_ENABLED
#define PLUGGABLE_USB_ENABLED
#ifdef CDC_ENABLED
#define CDC_INTERFACE_COUNT 2
#define CDC_ENPOINT_COUNT 3
#else
#define CDC_INTERFACE_COUNT 0
#define CDC_ENPOINT_COUNT 0
#endif
#define CDC_ACM_INTERFACE 0 // CDC ACM
#define CDC_DATA_INTERFACE 1 // CDC Data
#define CDC_FIRST_ENDPOINT 1
#define CDC_ENDPOINT_ACM (CDC_FIRST_ENDPOINT) // CDC First
#define CDC_ENDPOINT_OUT (CDC_FIRST_ENDPOINT+1)
#define CDC_ENDPOINT_IN (CDC_FIRST_ENDPOINT+2)
#define INTERFACE_COUNT (MSC_INTERFACE + MSC_INTERFACE_COUNT)
#ifdef CDC_ENABLED
#define CDC_RX CDC_ENDPOINT_OUT
#define CDC_TX CDC_ENDPOINT_IN
#endif
#define ISERIAL_MAX_LEN 20
#define IMANUFACTURER 1
#define IPRODUCT 2
#define ISERIAL 3
#endif /* __USBDESC_H__ */
| 1,565
|
C++
|
.h
| 42
| 36.047619
| 74
| 0.778071
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,458
|
pgmspace.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/avr/pgmspace.h
|
/*
pgmspace.h - Definitions for compatibility with AVR pgmspace macros
Copyright (c) 2015 Arduino LLC
Based on work of Paul Stoffregen on Teensy 3 (http://pjrc.com)
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE
*/
#ifndef __PGMSPACE_H_
#define __PGMSPACE_H_ 1
#include <inttypes.h>
#define PROGMEM
#define PGM_P const char *
#define PSTR(str) (str)
#define _SFR_BYTE(n) (n)
typedef void prog_void;
typedef char prog_char;
typedef unsigned char prog_uchar;
typedef int8_t prog_int8_t;
typedef uint8_t prog_uint8_t;
typedef int16_t prog_int16_t;
typedef uint16_t prog_uint16_t;
typedef int32_t prog_int32_t;
typedef uint32_t prog_uint32_t;
typedef int64_t prog_int64_t;
typedef uint64_t prog_uint64_t;
typedef const void* int_farptr_t;
typedef const void* uint_farptr_t;
#define memchr_P(s, c, n) memchr((s), (c), (n))
#define memcmp_P(s1, s2, n) memcmp((s1), (s2), (n))
#define memccpy_P(dest, src, c, n) memccpy((dest), (src), (c), (n))
#define memcpy_P(dest, src, n) memcpy((dest), (src), (n))
#define memmem_P(haystack, haystacklen, needle, needlelen) memmem((haystack), (haystacklen), (needle), (needlelen))
#define memrchr_P(s, c, n) memrchr((s), (c), (n))
#define strcat_P(dest, src) strcat((dest), (src))
#define strchr_P(s, c) strchr((s), (c))
#define strchrnul_P(s, c) strchrnul((s), (c))
#define strcmp_P(a, b) strcmp((a), (b))
#define strcpy_P(dest, src) strcpy((dest), (src))
#define strcasecmp_P(s1, s2) strcasecmp((s1), (s2))
#define strcasestr_P(haystack, needle) strcasestr((haystack), (needle))
#define strcspn_P(s, accept) strcspn((s), (accept))
#define strlcat_P(s1, s2, n) strlcat((s1), (s2), (n))
#define strlcpy_P(s1, s2, n) strlcpy((s1), (s2), (n))
#define strlen_P(a) strlen((a))
#define strnlen_P(s, n) strnlen((s), (n))
#define strncmp_P(s1, s2, n) strncmp((s1), (s2), (n))
#define strncasecmp_P(s1, s2, n) strncasecmp((s1), (s2), (n))
#define strncat_P(s1, s2, n) strncat((s1), (s2), (n))
#define strncpy_P(s1, s2, n) strncpy((s1), (s2), (n))
#define strpbrk_P(s, accept) strpbrk((s), (accept))
#define strrchr_P(s, c) strrchr((s), (c))
#define strsep_P(sp, delim) strsep((sp), (delim))
#define strspn_P(s, accept) strspn((s), (accept))
#define strstr_P(a, b) strstr((a), (b))
#define strtok_P(s, delim) strtok((s), (delim))
#define strtok_rP(s, delim, last) strtok((s), (delim), (last))
#define strlen_PF(a) strlen((a))
#define strnlen_PF(src, len) strnlen((src), (len))
#define memcpy_PF(dest, src, len) memcpy((dest), (src), (len))
#define strcpy_PF(dest, src) strcpy((dest), (src))
#define strncpy_PF(dest, src, len) strncpy((dest), (src), (len))
#define strcat_PF(dest, src) strcat((dest), (src))
#define strlcat_PF(dest, src, len) strlcat((dest), (src), (len))
#define strncat_PF(dest, src, len) strncat((dest), (src), (len))
#define strcmp_PF(s1, s2) strcmp((s1), (s2))
#define strncmp_PF(s1, s2, n) strncmp((s1), (s2), (n))
#define strcasecmp_PF(s1, s2) strcasecmp((s1), (s2))
#define strncasecmp_PF(s1, s2, n) strncasecmp((s1), (s2), (n))
#define strstr_PF(s1, s2) strstr((s1), (s2))
#define strlcpy_PF(dest, src, n) strlcpy((dest), (src), (n))
#define memcmp_PF(s1, s2, n) memcmp((s1), (s2), (n))
#define sprintf_P(s, f, ...) sprintf((s), (f), __VA_ARGS__)
#define snprintf_P(s, f, ...) snprintf((s), (f), __VA_ARGS__)
#define pgm_read_byte(addr) (*(const unsigned char *)(addr))
#define pgm_read_word(addr) (*(const unsigned short *)(addr))
#define pgm_read_dword(addr) (*(const unsigned long *)(addr))
#define pgm_read_float(addr) (*(const float *)(addr))
#define pgm_read_ptr(addr) (*(const void **)(addr))
#define pgm_read_byte_near(addr) pgm_read_byte(addr)
#define pgm_read_word_near(addr) pgm_read_word(addr)
#define pgm_read_dword_near(addr) pgm_read_dword(addr)
#define pgm_read_float_near(addr) pgm_read_float(addr)
#define pgm_read_ptr_near(addr) pgm_read_ptr(addr)
#define pgm_read_byte_far(addr) pgm_read_byte(addr)
#define pgm_read_word_far(addr) pgm_read_word(addr)
#define pgm_read_dword_far(addr) pgm_read_dword(addr)
#define pgm_read_float_far(addr) pgm_read_float(addr)
#define pgm_read_ptr_far(addr) pgm_read_ptr(addr)
#define pgm_get_far_address(addr) (&(addr))
#endif
| 5,156
|
C++
|
.h
| 103
| 48.524272
| 115
| 0.706397
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,459
|
dtostrf.h
|
relativty_Relativty/Relativty_Firmware/Relativty_board/cores/arduino/avr/dtostrf.h
|
/*
dtostrf - Emulation for dtostrf function from avr-libc
Copyright (c) 2013 Arduino. All rights reserved.
Written by Cristian Maglie <c.maglie@arduino.cc>
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifdef __cplusplus
extern "C" {
#endif
char *dtostrf (double val, signed char width, unsigned char prec, char *sout);
#ifdef __cplusplus
}
#endif
| 1,038
|
C++
|
.h
| 23
| 42.652174
| 78
| 0.777007
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,460
|
Relativty_components.h
|
relativty_Relativty/Relativty_Driver/include/Relativty_components.h
|
#pragma once
#ifndef RELATIVTY_COMPONENTS_H
#define RELATIVTY_COMPONENTS_H
namespace Relativty {
static const char *const k_pch_ExtDisplay_Section = "Relativty_extendedDisplay";
static const char *const k_pch_ExtDisplay_WindowX_Int32 = "windowX";
static const char *const k_pch_ExtDisplay_WindowY_Int32 = "windowY";
static const char *const k_pch_ExtDisplay_WindowWidth_Int32 = "windowWidth";
static const char *const k_pch_ExtDisplay_WindowHeight_Int32 = "windowHeight";
static const char *const k_pch_ExtDisplay_RenderWidth_Int32 = "renderWidth";
static const char *const k_pch_ExtDisplay_RenderHeight_Int32 = "renderHeight";
static const char *const k_pch_ExtDisplay_DistortionK1_Float = "DistortionK1";
static const char *const k_pch_ExtDisplay_DistortionK2_Float = "DistortionK2";
static const char *const k_pch_ExtDisplay_ZoomWidth_Float = "ZoomWidth";
static const char *const k_pch_ExtDisplay_ZoomHeight_Float = "ZoomHeight";
static const char *const k_pch_ExtDisplay_EyeGapOffset_Int = "EyeGapOffsetPx";
static const char* const k_pch_ExtDisplay_FovX_Float = "FovX";
static const char* const k_pch_ExtDisplay_FovY_Float = "FovY";
static const char *const k_pch_ExtDisplay_IsDisplayReal_Bool = "IsDisplayRealDisplay";
static const char *const k_pch_ExtDisplay_IsDisplayOnDesktop_bool = "IsDisplayOnDesktop";
static const bool g_bRelativtyExtDisplayComp_doLensStuff = true;
class RelativtyExtendedDisplayComponent: public vr::IVRDisplayComponent {
public:
RelativtyExtendedDisplayComponent(){
m_nWindowX = vr::VRSettings()->GetInt32(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_WindowX_Int32);
m_nWindowY = vr::VRSettings()->GetInt32(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_WindowY_Int32);
m_nWindowWidth = vr::VRSettings()->GetInt32(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_WindowWidth_Int32);
m_nWindowHeight = vr::VRSettings()->GetInt32(
k_pch_ExtDisplay_Section, k_pch_ExtDisplay_WindowHeight_Int32);
m_nRenderWidth = vr::VRSettings()->GetInt32(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_RenderWidth_Int32);
m_nRenderHeight = vr::VRSettings()->GetInt32(
k_pch_ExtDisplay_Section, k_pch_ExtDisplay_RenderHeight_Int32);
m_fDistortionK1 = vr::VRSettings()->GetFloat(
k_pch_ExtDisplay_Section, k_pch_ExtDisplay_DistortionK1_Float);
m_fDistortionK2 = vr::VRSettings()->GetFloat(
k_pch_ExtDisplay_Section, k_pch_ExtDisplay_DistortionK2_Float);
m_fZoomWidth = vr::VRSettings()->GetFloat(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_ZoomWidth_Float);
m_fZoomHeight = vr::VRSettings()->GetFloat(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_ZoomHeight_Float);
m_iEyeGapOff = vr::VRSettings()->GetFloat(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_EyeGapOffset_Int);
m_bIsDisplayReal = vr::VRSettings()->GetBool(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_IsDisplayReal_Bool);
m_bIsDisplayOnDesktop = vr::VRSettings()->GetBool(k_pch_ExtDisplay_Section,
k_pch_ExtDisplay_IsDisplayOnDesktop_bool);
m_fov_x = vr::VRSettings()->GetFloat(k_pch_ExtDisplay_Section, k_pch_ExtDisplay_FovX_Float);
m_fov_y = vr::VRSettings()->GetFloat(k_pch_ExtDisplay_Section, k_pch_ExtDisplay_FovY_Float);
#ifdef DRIVERLOG_H
DriverLog("Extended display component created\n");
DriverLog("distortion koeffs: k1=%f, k2=%f\n", m_fDistortionK1, m_fDistortionK2);
DriverLog("render target: %dx%d\n", m_nRenderWidth, m_nRenderHeight);
DriverLog("window target: %dx%d\n", m_nWindowWidth, m_nWindowHeight);
DriverLog("eye gap offset: %d", m_iEyeGapOff);
DriverLog("is display real: %d", (int)m_bIsDisplayReal);
DriverLog("is display on desktop: %d", (int)m_bIsDisplayOnDesktop);
#else
vr::VRDriverLog()->Log("Extended display component created\n");
#endif
}
virtual void GetWindowBounds(int32_t *pnX, int32_t *pnY, uint32_t *pnWidth,
uint32_t *pnHeight) {
*pnX = m_nWindowX;
*pnY = m_nWindowY;
*pnWidth = m_nWindowWidth;
*pnHeight = m_nWindowHeight;
}
virtual bool IsDisplayOnDesktop() { return m_bIsDisplayOnDesktop; }
virtual bool IsDisplayRealDisplay() { return m_bIsDisplayReal; }
virtual void GetRecommendedRenderTargetSize(uint32_t *pnWidth,
uint32_t *pnHeight) {
*pnWidth = m_nRenderWidth;
*pnHeight = m_nRenderHeight;
}
virtual void GetEyeOutputViewport(vr::EVREye eEye, uint32_t *pnX, uint32_t *pnY,
uint32_t *pnWidth, uint32_t *pnHeight) {
*pnY = 0;
*pnWidth = m_nWindowWidth / 2;
*pnHeight = m_nWindowHeight;
if (eEye == vr::Eye_Left) {
*pnX = 0;
} else {
*pnX = m_nWindowWidth / 2 + m_iEyeGapOff;
}
}
virtual void GetProjectionRaw(vr::EVREye eEye, float *pfLeft, float *pfRight,
float *pfTop, float *pfBottom) {
float tan_x = tanf(m_fov_x / 2 / 180 * 3.14159f);
float tan_y = tanf(m_fov_y / 2 / 180 * 3.14159f);
*pfLeft = -tan_x;
*pfRight = tan_x;
*pfTop = -tan_y;
*pfBottom = tan_y;
}
virtual vr::DistortionCoordinates_t ComputeDistortion(vr::EVREye eEye, float fU,
float fV) {
vr::DistortionCoordinates_t coordinates;
if constexpr(g_bRelativtyExtDisplayComp_doLensStuff) {
// Distortion for lens implementation from
// https://github.com/HelenXR/openvr_survivor/blob/master/src/head_mount_display_device.cc
float hX;
float hY;
double rr;
double r2;
double theta;
rr = sqrt((fU - 0.5f) * (fU - 0.5f) + (fV - 0.5f) * (fV - 0.5f));
r2 = rr * (1 + m_fDistortionK1 * (rr * rr) +
m_fDistortionK2 * (rr * rr * rr * rr));
theta = atan2(fU - 0.5f, fV - 0.5f);
hX = float(sin(theta) * r2) * m_fZoomWidth;
hY = float(cos(theta) * r2) * m_fZoomHeight;
coordinates.rfBlue[0] = hX + 0.5f;
coordinates.rfBlue[1] = hY + 0.5f;
coordinates.rfGreen[0] = hX + 0.5f;
coordinates.rfGreen[1] = hY + 0.5f;
coordinates.rfRed[0] = hX + 0.5f;
coordinates.rfRed[1] = hY + 0.5f;
} else {
coordinates.rfBlue[0] = fU;
coordinates.rfBlue[1] = fV;
coordinates.rfGreen[0] = fU;
coordinates.rfGreen[1] = fV;
coordinates.rfRed[0] = fU;
coordinates.rfRed[1] = fV;
}
return coordinates;
}
const char* GetComponentNameAndVersion() {return vr::IVRDisplayComponent_Version;}
private:
int32_t m_nWindowX;
int32_t m_nWindowY;
int32_t m_nWindowWidth;
int32_t m_nWindowHeight;
int32_t m_nRenderWidth;
int32_t m_nRenderHeight;
int32_t m_iEyeGapOff;
bool m_bIsDisplayReal;
bool m_bIsDisplayOnDesktop;
float m_fDistortionK1;
float m_fDistortionK2;
float m_fZoomWidth;
float m_fZoomHeight;
float m_fov_x;
float m_fov_y;
};
}
#endif // RELATIVTY_COMPONENTS_H
| 7,590
|
C++
|
.h
| 151
| 39.966887
| 98
| 0.628969
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,464
|
Relativty_HMDDriver.hpp
|
relativty_Relativty/Relativty_Driver/include/Relativty_HMDDriver.hpp
|
// Copyright (C) 2020 Max Coutte, Gabriel Combe
// Copyright (C) 2020 Relativty.com
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <https://www.gnu.org/licenses/>.
#pragma once
#include <thread>
#include <atomic>
#include <WinSock2.h>
#include "hidapi/hidapi.h"
#include "openvr_driver.h"
#include "Relativty_components.h"
#include "Relativty_base_device.h"
namespace Relativty {
class HMDDriver : public RelativtyDevice<false>
{
public:
HMDDriver(std::string myserial);
~HMDDriver() = default;
void frameUpdate();
inline void setProperties();
// Inherited from RelativtyDevice, to be overridden
virtual vr::EVRInitError Activate(uint32_t unObjectId);
virtual void Deactivate();
private:
int32_t m_iPid;
int32_t m_iVid;
bool m_bIMUpktIsDMP;
float SecondsFromVsyncToPhotons;
float DisplayFrequency;
float IPD;
float HeadToEyeDepth;
vr::DriverPose_t lastPose = {0};
hid_device* handle;
std::atomic<float> quat[4];
std::atomic<bool> retrieve_quaternion_isOn = false;
std::atomic<bool> new_quaternion_avaiable = false;
std::atomic<float> qconj[4] = {1, 0, 0, 0};
void calibrate_quaternion();
std::thread retrieve_quaternion_thread_worker;
void retrieve_device_quaternion_packet_threaded();
std::atomic<float> vector_xyz[3];
std::atomic<bool> retrieve_vector_isOn = false;
std::atomic<bool> new_vector_avaiable = false;
bool start_tracking_server = false;
SOCKET sock, sock_receive;
float upperBound;
float lowerBound;
float normalizeMinX;
float normalizeMinY;
float normalizeMinZ;
float normalizeMaxX;
float normalizeMaxY;
float normalizeMaxZ;
float scalesCoordinateMeterX;
float scalesCoordinateMeterY;
float scalesCoordinateMeterZ;
float offsetCoordinateX;
float offsetCoordinateY;
float offsetCoordinateZ;
std::atomic<bool> serverNotReady = true;
std::thread retrieve_vector_thread_worker;
void retrieve_client_vector_packet_threaded();
std::thread update_pose_thread_worker;
void update_pose_threaded();
std::string PyPath;
std::thread startPythonTrackingClient_worker;
};
}
| 2,666
|
C++
|
.h
| 78
| 31.615385
| 73
| 0.768482
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,465
|
Relativty_EmbeddedPython.h
|
relativty_Relativty/Relativty_Driver/include/Relativty_EmbeddedPython.h
|
// Copyright (C) 2020 Max Coutte, Gabriel Combe
// Copyright (C) 2020 Relativty.com
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <https://www.gnu.org/licenses/>.
#pragma once
#pragma warning(disable:4996)
void startPythonTrackingClient_threaded(std::string PyPath);
| 839
|
C++
|
.h
| 17
| 48.235294
| 73
| 0.772229
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,466
|
Relativty_ServerDriver.hpp
|
relativty_Relativty/Relativty_Driver/include/Relativty_ServerDriver.hpp
|
// Copyright (C) 2020 Max Coutte, Gabriel Combe
// Copyright (C) 2020 Relativty.com
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <https://www.gnu.org/licenses/>.
#pragma once
#ifndef RELATIVTY_SERVERDRIVER_H
#define RELATIVTY_SERVERDRIVER_H
#include "openvr_driver.h"
#include "Relativty_HMDDriver.hpp"
namespace Relativty {
class ServerDriver : public vr::IServerTrackedDeviceProvider
{
public:
virtual vr::EVRInitError Init(vr::IVRDriverContext* DriverContext) override;
virtual void Cleanup() override;
virtual const char* const* GetInterfaceVersions() override;
virtual void RunFrame() override;
virtual bool ShouldBlockStandbyMode() override;
virtual void EnterStandby() override;
virtual void LeaveStandby() override;
static void Log(std::string log);
private:
HMDDriver* HMDDriver = nullptr;
};
}
#endif // RELATIVTY_SERVERDRIVER_H
| 1,438
|
C++
|
.h
| 36
| 38.166667
| 78
| 0.781116
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,467
|
pydebug.h
|
relativty_Relativty/Relativty_Driver/include/Python/pydebug.h
|
#ifndef Py_LIMITED_API
#ifndef Py_PYDEBUG_H
#define Py_PYDEBUG_H
#ifdef __cplusplus
extern "C" {
#endif
/* These global variable are defined in pylifecycle.c */
/* XXX (ncoghlan): move these declarations to pylifecycle.h? */
PyAPI_DATA(int) Py_DebugFlag;
PyAPI_DATA(int) Py_VerboseFlag;
PyAPI_DATA(int) Py_QuietFlag;
PyAPI_DATA(int) Py_InteractiveFlag;
PyAPI_DATA(int) Py_InspectFlag;
PyAPI_DATA(int) Py_OptimizeFlag;
PyAPI_DATA(int) Py_NoSiteFlag;
PyAPI_DATA(int) Py_BytesWarningFlag;
PyAPI_DATA(int) Py_FrozenFlag;
PyAPI_DATA(int) Py_IgnoreEnvironmentFlag;
PyAPI_DATA(int) Py_DontWriteBytecodeFlag;
PyAPI_DATA(int) Py_NoUserSiteDirectory;
PyAPI_DATA(int) Py_UnbufferedStdioFlag;
PyAPI_DATA(int) Py_HashRandomizationFlag;
PyAPI_DATA(int) Py_IsolatedFlag;
#ifdef MS_WINDOWS
PyAPI_DATA(int) Py_LegacyWindowsFSEncodingFlag;
PyAPI_DATA(int) Py_LegacyWindowsStdioFlag;
#endif
/* this is a wrapper around getenv() that pays attention to
Py_IgnoreEnvironmentFlag. It should be used for getting variables like
PYTHONPATH and PYTHONHOME from the environment */
#define Py_GETENV(s) (Py_IgnoreEnvironmentFlag ? NULL : getenv(s))
#ifdef __cplusplus
}
#endif
#endif /* !Py_PYDEBUG_H */
#endif /* Py_LIMITED_API */
| 1,214
|
C++
|
.h
| 36
| 32.444444
| 74
| 0.794719
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,468
|
bltinmodule.h
|
relativty_Relativty/Relativty_Driver/include/Python/bltinmodule.h
|
#ifndef Py_BLTINMODULE_H
#define Py_BLTINMODULE_H
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_DATA(PyTypeObject) PyFilter_Type;
PyAPI_DATA(PyTypeObject) PyMap_Type;
PyAPI_DATA(PyTypeObject) PyZip_Type;
#ifdef __cplusplus
}
#endif
#endif /* !Py_BLTINMODULE_H */
| 264
|
C++
|
.h
| 12
| 20.833333
| 39
| 0.788
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,469
|
dtoa.h
|
relativty_Relativty/Relativty_Driver/include/Python/dtoa.h
|
#ifndef Py_LIMITED_API
#ifndef PY_NO_SHORT_FLOAT_REPR
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_FUNC(double) _Py_dg_strtod(const char *str, char **ptr);
PyAPI_FUNC(char *) _Py_dg_dtoa(double d, int mode, int ndigits,
int *decpt, int *sign, char **rve);
PyAPI_FUNC(void) _Py_dg_freedtoa(char *s);
PyAPI_FUNC(double) _Py_dg_stdnan(int sign);
PyAPI_FUNC(double) _Py_dg_infinity(int sign);
#ifdef __cplusplus
}
#endif
#endif
#endif
| 458
|
C++
|
.h
| 16
| 25.9375
| 63
| 0.692483
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,470
|
code.h
|
relativty_Relativty/Relativty_Driver/include/Python/code.h
|
/* Definitions for bytecode */
#ifndef Py_LIMITED_API
#ifndef Py_CODE_H
#define Py_CODE_H
#ifdef __cplusplus
extern "C" {
#endif
typedef uint16_t _Py_CODEUNIT;
#ifdef WORDS_BIGENDIAN
# define _Py_OPCODE(word) ((word) >> 8)
# define _Py_OPARG(word) ((word) & 255)
#else
# define _Py_OPCODE(word) ((word) & 255)
# define _Py_OPARG(word) ((word) >> 8)
#endif
typedef struct _PyOpcache _PyOpcache;
/* Bytecode object */
typedef struct {
PyObject_HEAD
int co_argcount; /* #arguments, except *args */
int co_posonlyargcount; /* #positional only arguments */
int co_kwonlyargcount; /* #keyword only arguments */
int co_nlocals; /* #local variables */
int co_stacksize; /* #entries needed for evaluation stack */
int co_flags; /* CO_..., see below */
int co_firstlineno; /* first source line number */
PyObject *co_code; /* instruction opcodes */
PyObject *co_consts; /* list (constants used) */
PyObject *co_names; /* list of strings (names used) */
PyObject *co_varnames; /* tuple of strings (local variable names) */
PyObject *co_freevars; /* tuple of strings (free variable names) */
PyObject *co_cellvars; /* tuple of strings (cell variable names) */
/* The rest aren't used in either hash or comparisons, except for co_name,
used in both. This is done to preserve the name and line number
for tracebacks and debuggers; otherwise, constant de-duplication
would collapse identical functions/lambdas defined on different lines.
*/
Py_ssize_t *co_cell2arg; /* Maps cell vars which are arguments. */
PyObject *co_filename; /* unicode (where it was loaded from) */
PyObject *co_name; /* unicode (name, for reference) */
PyObject *co_lnotab; /* string (encoding addr<->lineno mapping) See
Objects/lnotab_notes.txt for details. */
void *co_zombieframe; /* for optimization only (see frameobject.c) */
PyObject *co_weakreflist; /* to support weakrefs to code objects */
/* Scratch space for extra data relating to the code object.
Type is a void* to keep the format private in codeobject.c to force
people to go through the proper APIs. */
void *co_extra;
/* Per opcodes just-in-time cache
*
* To reduce cache size, we use indirect mapping from opcode index to
* cache object:
* cache = co_opcache[co_opcache_map[next_instr - first_instr] - 1]
*/
// co_opcache_map is indexed by (next_instr - first_instr).
// * 0 means there is no cache for this opcode.
// * n > 0 means there is cache in co_opcache[n-1].
unsigned char *co_opcache_map;
_PyOpcache *co_opcache;
int co_opcache_flag; // used to determine when create a cache.
unsigned char co_opcache_size; // length of co_opcache.
} PyCodeObject;
/* Masks for co_flags above */
#define CO_OPTIMIZED 0x0001
#define CO_NEWLOCALS 0x0002
#define CO_VARARGS 0x0004
#define CO_VARKEYWORDS 0x0008
#define CO_NESTED 0x0010
#define CO_GENERATOR 0x0020
/* The CO_NOFREE flag is set if there are no free or cell variables.
This information is redundant, but it allows a single flag test
to determine whether there is any extra work to be done when the
call frame it setup.
*/
#define CO_NOFREE 0x0040
/* The CO_COROUTINE flag is set for coroutine functions (defined with
``async def`` keywords) */
#define CO_COROUTINE 0x0080
#define CO_ITERABLE_COROUTINE 0x0100
#define CO_ASYNC_GENERATOR 0x0200
/* bpo-39562: These constant values are changed in Python 3.9
to prevent collision with compiler flags. CO_FUTURE_ and PyCF_
constants must be kept unique. PyCF_ constants can use bits from
0x0100 to 0x10000. CO_FUTURE_ constants use bits starting at 0x20000. */
#define CO_FUTURE_DIVISION 0x20000
#define CO_FUTURE_ABSOLUTE_IMPORT 0x40000 /* do absolute imports by default */
#define CO_FUTURE_WITH_STATEMENT 0x80000
#define CO_FUTURE_PRINT_FUNCTION 0x100000
#define CO_FUTURE_UNICODE_LITERALS 0x200000
#define CO_FUTURE_BARRY_AS_BDFL 0x400000
#define CO_FUTURE_GENERATOR_STOP 0x800000
#define CO_FUTURE_ANNOTATIONS 0x1000000
/* This value is found in the co_cell2arg array when the associated cell
variable does not correspond to an argument. */
#define CO_CELL_NOT_AN_ARG (-1)
/* This should be defined if a future statement modifies the syntax.
For example, when a keyword is added.
*/
#define PY_PARSER_REQUIRES_FUTURE_KEYWORD
#define CO_MAXBLOCKS 20 /* Max static block nesting within a function */
PyAPI_DATA(PyTypeObject) PyCode_Type;
#define PyCode_Check(op) (Py_TYPE(op) == &PyCode_Type)
#define PyCode_GetNumFree(op) (PyTuple_GET_SIZE((op)->co_freevars))
/* Public interface */
PyAPI_FUNC(PyCodeObject *) PyCode_New(
int, int, int, int, int, PyObject *, PyObject *,
PyObject *, PyObject *, PyObject *, PyObject *,
PyObject *, PyObject *, int, PyObject *);
PyAPI_FUNC(PyCodeObject *) PyCode_NewWithPosOnlyArgs(
int, int, int, int, int, int, PyObject *, PyObject *,
PyObject *, PyObject *, PyObject *, PyObject *,
PyObject *, PyObject *, int, PyObject *);
/* same as struct above */
/* Creates a new empty code object with the specified source location. */
PyAPI_FUNC(PyCodeObject *)
PyCode_NewEmpty(const char *filename, const char *funcname, int firstlineno);
/* Return the line number associated with the specified bytecode index
in this code object. If you just need the line number of a frame,
use PyFrame_GetLineNumber() instead. */
PyAPI_FUNC(int) PyCode_Addr2Line(PyCodeObject *, int);
/* for internal use only */
typedef struct _addr_pair {
int ap_lower;
int ap_upper;
} PyAddrPair;
#ifndef Py_LIMITED_API
/* Update *bounds to describe the first and one-past-the-last instructions in the
same line as lasti. Return the number of that line.
*/
PyAPI_FUNC(int) _PyCode_CheckLineNumber(PyCodeObject* co,
int lasti, PyAddrPair *bounds);
/* Create a comparable key used to compare constants taking in account the
* object type. It is used to make sure types are not coerced (e.g., float and
* complex) _and_ to distinguish 0.0 from -0.0 e.g. on IEEE platforms
*
* Return (type(obj), obj, ...): a tuple with variable size (at least 2 items)
* depending on the type and the value. The type is the first item to not
* compare bytes and str which can raise a BytesWarning exception. */
PyAPI_FUNC(PyObject*) _PyCode_ConstantKey(PyObject *obj);
#endif
PyAPI_FUNC(PyObject*) PyCode_Optimize(PyObject *code, PyObject* consts,
PyObject *names, PyObject *lnotab);
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) _PyCode_GetExtra(PyObject *code, Py_ssize_t index,
void **extra);
PyAPI_FUNC(int) _PyCode_SetExtra(PyObject *code, Py_ssize_t index,
void *extra);
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_CODE_H */
#endif /* Py_LIMITED_API */
| 7,178
|
C++
|
.h
| 153
| 42.594771
| 81
| 0.684195
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,471
|
pycapsule.h
|
relativty_Relativty/Relativty_Driver/include/Python/pycapsule.h
|
/* Capsule objects let you wrap a C "void *" pointer in a Python
object. They're a way of passing data through the Python interpreter
without creating your own custom type.
Capsules are used for communication between extension modules.
They provide a way for an extension module to export a C interface
to other extension modules, so that extension modules can use the
Python import mechanism to link to one another.
For more information, please see "c-api/capsule.html" in the
documentation.
*/
#ifndef Py_CAPSULE_H
#define Py_CAPSULE_H
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_DATA(PyTypeObject) PyCapsule_Type;
typedef void (*PyCapsule_Destructor)(PyObject *);
#define PyCapsule_CheckExact(op) (Py_TYPE(op) == &PyCapsule_Type)
PyAPI_FUNC(PyObject *) PyCapsule_New(
void *pointer,
const char *name,
PyCapsule_Destructor destructor);
PyAPI_FUNC(void *) PyCapsule_GetPointer(PyObject *capsule, const char *name);
PyAPI_FUNC(PyCapsule_Destructor) PyCapsule_GetDestructor(PyObject *capsule);
PyAPI_FUNC(const char *) PyCapsule_GetName(PyObject *capsule);
PyAPI_FUNC(void *) PyCapsule_GetContext(PyObject *capsule);
PyAPI_FUNC(int) PyCapsule_IsValid(PyObject *capsule, const char *name);
PyAPI_FUNC(int) PyCapsule_SetPointer(PyObject *capsule, void *pointer);
PyAPI_FUNC(int) PyCapsule_SetDestructor(PyObject *capsule, PyCapsule_Destructor destructor);
PyAPI_FUNC(int) PyCapsule_SetName(PyObject *capsule, const char *name);
PyAPI_FUNC(int) PyCapsule_SetContext(PyObject *capsule, void *context);
PyAPI_FUNC(void *) PyCapsule_Import(
const char *name, /* UTF-8 encoded string */
int no_block);
#ifdef __cplusplus
}
#endif
#endif /* !Py_CAPSULE_H */
| 1,726
|
C++
|
.h
| 38
| 42.710526
| 92
| 0.769046
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,472
|
token.h
|
relativty_Relativty/Relativty_Driver/include/Python/token.h
|
/* Auto-generated by Tools/scripts/generate_token.py */
/* Token types */
#ifndef Py_LIMITED_API
#ifndef Py_TOKEN_H
#define Py_TOKEN_H
#ifdef __cplusplus
extern "C" {
#endif
#undef TILDE /* Prevent clash of our definition with system macro. Ex AIX, ioctl.h */
#define ENDMARKER 0
#define NAME 1
#define NUMBER 2
#define STRING 3
#define NEWLINE 4
#define INDENT 5
#define DEDENT 6
#define LPAR 7
#define RPAR 8
#define LSQB 9
#define RSQB 10
#define COLON 11
#define COMMA 12
#define SEMI 13
#define PLUS 14
#define MINUS 15
#define STAR 16
#define SLASH 17
#define VBAR 18
#define AMPER 19
#define LESS 20
#define GREATER 21
#define EQUAL 22
#define DOT 23
#define PERCENT 24
#define LBRACE 25
#define RBRACE 26
#define EQEQUAL 27
#define NOTEQUAL 28
#define LESSEQUAL 29
#define GREATEREQUAL 30
#define TILDE 31
#define CIRCUMFLEX 32
#define LEFTSHIFT 33
#define RIGHTSHIFT 34
#define DOUBLESTAR 35
#define PLUSEQUAL 36
#define MINEQUAL 37
#define STAREQUAL 38
#define SLASHEQUAL 39
#define PERCENTEQUAL 40
#define AMPEREQUAL 41
#define VBAREQUAL 42
#define CIRCUMFLEXEQUAL 43
#define LEFTSHIFTEQUAL 44
#define RIGHTSHIFTEQUAL 45
#define DOUBLESTAREQUAL 46
#define DOUBLESLASH 47
#define DOUBLESLASHEQUAL 48
#define AT 49
#define ATEQUAL 50
#define RARROW 51
#define ELLIPSIS 52
#define COLONEQUAL 53
#define OP 54
#define AWAIT 55
#define ASYNC 56
#define TYPE_IGNORE 57
#define TYPE_COMMENT 58
#define ERRORTOKEN 59
#define N_TOKENS 63
#define NT_OFFSET 256
/* Special definitions for cooperation with parser */
#define ISTERMINAL(x) ((x) < NT_OFFSET)
#define ISNONTERMINAL(x) ((x) >= NT_OFFSET)
#define ISEOF(x) ((x) == ENDMARKER)
PyAPI_DATA(const char * const) _PyParser_TokenNames[]; /* Token names */
PyAPI_FUNC(int) PyToken_OneChar(int);
PyAPI_FUNC(int) PyToken_TwoChars(int, int);
PyAPI_FUNC(int) PyToken_ThreeChars(int, int, int);
#ifdef __cplusplus
}
#endif
#endif /* !Py_TOKEN_H */
#endif /* Py_LIMITED_API */
| 2,429
|
C++
|
.h
| 84
| 27.821429
| 87
| 0.623021
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,473
|
pyconfig.h
|
relativty_Relativty/Relativty_Driver/include/Python/pyconfig.h
|
#ifndef Py_CONFIG_H
#define Py_CONFIG_H
/* pyconfig.h. NOT Generated automatically by configure.
This is a manually maintained version used for the Watcom,
Borland and Microsoft Visual C++ compilers. It is a
standard part of the Python distribution.
WINDOWS DEFINES:
The code specific to Windows should be wrapped around one of
the following #defines
MS_WIN64 - Code specific to the MS Win64 API
MS_WIN32 - Code specific to the MS Win32 (and Win64) API (obsolete, this covers all supported APIs)
MS_WINDOWS - Code specific to Windows, but all versions.
Py_ENABLE_SHARED - Code if the Python core is built as a DLL.
Also note that neither "_M_IX86" or "_MSC_VER" should be used for
any purpose other than "Windows Intel x86 specific" and "Microsoft
compiler specific". Therefore, these should be very rare.
NOTE: The following symbols are deprecated:
NT, USE_DL_EXPORT, USE_DL_IMPORT, DL_EXPORT, DL_IMPORT
MS_CORE_DLL.
WIN32 is still required for the locale module.
*/
/* Deprecated USE_DL_EXPORT macro - please use Py_BUILD_CORE */
#ifdef USE_DL_EXPORT
# define Py_BUILD_CORE
#endif /* USE_DL_EXPORT */
/* Visual Studio 2005 introduces deprecation warnings for
"insecure" and POSIX functions. The insecure functions should
be replaced by *_s versions (according to Microsoft); the
POSIX functions by _* versions (which, according to Microsoft,
would be ISO C conforming). Neither renaming is feasible, so
we just silence the warnings. */
#ifndef _CRT_SECURE_NO_DEPRECATE
#define _CRT_SECURE_NO_DEPRECATE 1
#endif
#ifndef _CRT_NONSTDC_NO_DEPRECATE
#define _CRT_NONSTDC_NO_DEPRECATE 1
#endif
#define HAVE_IO_H
#define HAVE_SYS_UTIME_H
#define HAVE_TEMPNAM
#define HAVE_TMPFILE
#define HAVE_TMPNAM
#define HAVE_CLOCK
#define HAVE_STRERROR
#include <io.h>
#define HAVE_HYPOT
#define HAVE_STRFTIME
#define DONT_HAVE_SIG_ALARM
#define DONT_HAVE_SIG_PAUSE
#define LONG_BIT 32
#define WORD_BIT 32
#define MS_WIN32 /* only support win32 and greater. */
#define MS_WINDOWS
#ifndef PYTHONPATH
# define PYTHONPATH L".\\DLLs;.\\lib"
#endif
#define NT_THREADS
#define WITH_THREAD
#ifndef NETSCAPE_PI
#define USE_SOCKET
#endif
/* Compiler specific defines */
/* ------------------------------------------------------------------------*/
/* Microsoft C defines _MSC_VER */
#ifdef _MSC_VER
/* We want COMPILER to expand to a string containing _MSC_VER's *value*.
* This is horridly tricky, because the stringization operator only works
* on macro arguments, and doesn't evaluate macros passed *as* arguments.
* Attempts simpler than the following appear doomed to produce "_MSC_VER"
* literally in the string.
*/
#define _Py_PASTE_VERSION(SUFFIX) \
("[MSC v." _Py_STRINGIZE(_MSC_VER) " " SUFFIX "]")
/* e.g., this produces, after compile-time string catenation,
* ("[MSC v.1200 32 bit (Intel)]")
*
* _Py_STRINGIZE(_MSC_VER) expands to
* _Py_STRINGIZE1((_MSC_VER)) expands to
* _Py_STRINGIZE2(_MSC_VER) but as this call is the result of token-pasting
* it's scanned again for macros and so further expands to (under MSVC 6)
* _Py_STRINGIZE2(1200) which then expands to
* "1200"
*/
#define _Py_STRINGIZE(X) _Py_STRINGIZE1((X))
#define _Py_STRINGIZE1(X) _Py_STRINGIZE2 ## X
#define _Py_STRINGIZE2(X) #X
/* MSVC defines _WINxx to differentiate the windows platform types
Note that for compatibility reasons _WIN32 is defined on Win32
*and* on Win64. For the same reasons, in Python, MS_WIN32 is
defined on Win32 *and* Win64. Win32 only code must therefore be
guarded as follows:
#if defined(MS_WIN32) && !defined(MS_WIN64)
*/
#ifdef _WIN64
#define MS_WIN64
#endif
/* set the COMPILER */
#ifdef MS_WIN64
#if defined(_M_X64) || defined(_M_AMD64)
#if defined(__INTEL_COMPILER)
#define COMPILER ("[ICC v." _Py_STRINGIZE(__INTEL_COMPILER) " 64 bit (amd64) with MSC v." _Py_STRINGIZE(_MSC_VER) " CRT]")
#else
#define COMPILER _Py_PASTE_VERSION("64 bit (AMD64)")
#endif /* __INTEL_COMPILER */
#define PYD_PLATFORM_TAG "win_amd64"
#elif defined(_M_ARM64)
#define COMPILER _Py_PASTE_VERSION("64 bit (ARM64)")
#define PYD_PLATFORM_TAG "win_arm64"
#else
#define COMPILER _Py_PASTE_VERSION("64 bit (Unknown)")
#endif
#endif /* MS_WIN64 */
/* set the version macros for the windows headers */
/* Python 3.5+ requires Windows Vista or greater */
#define Py_WINVER 0x0600 /* _WIN32_WINNT_VISTA */
#define Py_NTDDI NTDDI_VISTA
/* We only set these values when building Python - we don't want to force
these values on extensions, as that will affect the prototypes and
structures exposed in the Windows headers. Even when building Python, we
allow a single source file to override this - they may need access to
structures etc so it can optionally use new Windows features if it
determines at runtime they are available.
*/
#if defined(Py_BUILD_CORE) || defined(Py_BUILD_CORE_BUILTIN) || defined(Py_BUILD_CORE_MODULE)
#ifndef NTDDI_VERSION
#define NTDDI_VERSION Py_NTDDI
#endif
#ifndef WINVER
#define WINVER Py_WINVER
#endif
#ifndef _WIN32_WINNT
#define _WIN32_WINNT Py_WINVER
#endif
#endif
/* _W64 is not defined for VC6 or eVC4 */
#ifndef _W64
#define _W64
#endif
/* Define like size_t, omitting the "unsigned" */
#ifdef MS_WIN64
typedef __int64 ssize_t;
#else
typedef _W64 int ssize_t;
#endif
#define HAVE_SSIZE_T 1
#if defined(MS_WIN32) && !defined(MS_WIN64)
#if defined(_M_IX86)
#if defined(__INTEL_COMPILER)
#define COMPILER ("[ICC v." _Py_STRINGIZE(__INTEL_COMPILER) " 32 bit (Intel) with MSC v." _Py_STRINGIZE(_MSC_VER) " CRT]")
#else
#define COMPILER _Py_PASTE_VERSION("32 bit (Intel)")
#endif /* __INTEL_COMPILER */
#define PYD_PLATFORM_TAG "win32"
#elif defined(_M_ARM)
#define COMPILER _Py_PASTE_VERSION("32 bit (ARM)")
#define PYD_PLATFORM_TAG "win_arm32"
#else
#define COMPILER _Py_PASTE_VERSION("32 bit (Unknown)")
#endif
#endif /* MS_WIN32 && !MS_WIN64 */
typedef int pid_t;
#include <float.h>
#define Py_IS_NAN _isnan
#define Py_IS_INFINITY(X) (!_finite(X) && !_isnan(X))
#define Py_IS_FINITE(X) _finite(X)
#define copysign _copysign
/* Side by Side assemblies supported in VS 2005 and VS 2008 but not 2010*/
#if _MSC_VER >= 1400 && _MSC_VER < 1600
#define HAVE_SXS 1
#endif
/* define some ANSI types that are not defined in earlier Win headers */
#if _MSC_VER >= 1200
/* This file only exists in VC 6.0 or higher */
#include <basetsd.h>
#endif
#endif /* _MSC_VER */
/* ------------------------------------------------------------------------*/
/* egcs/gnu-win32 defines __GNUC__ and _WIN32 */
#if defined(__GNUC__) && defined(_WIN32)
/* XXX These defines are likely incomplete, but should be easy to fix.
They should be complete enough to build extension modules. */
/* Suggested by Rene Liebscher <R.Liebscher@gmx.de> to avoid a GCC 2.91.*
bug that requires structure imports. More recent versions of the
compiler don't exhibit this bug.
*/
#if (__GNUC__==2) && (__GNUC_MINOR__<=91)
#warning "Please use an up-to-date version of gcc! (>2.91 recommended)"
#endif
#define COMPILER "[gcc]"
#define PY_LONG_LONG long long
#define PY_LLONG_MIN LLONG_MIN
#define PY_LLONG_MAX LLONG_MAX
#define PY_ULLONG_MAX ULLONG_MAX
#endif /* GNUC */
/* ------------------------------------------------------------------------*/
/* lcc-win32 defines __LCC__ */
#if defined(__LCC__)
/* XXX These defines are likely incomplete, but should be easy to fix.
They should be complete enough to build extension modules. */
#define COMPILER "[lcc-win32]"
typedef int pid_t;
/* __declspec() is supported here too - do nothing to get the defaults */
#endif /* LCC */
/* ------------------------------------------------------------------------*/
/* End of compilers - finish up */
#ifndef NO_STDIO_H
# include <stdio.h>
#endif
/* 64 bit ints are usually spelt __int64 unless compiler has overridden */
#ifndef PY_LONG_LONG
# define PY_LONG_LONG __int64
# define PY_LLONG_MAX _I64_MAX
# define PY_LLONG_MIN _I64_MIN
# define PY_ULLONG_MAX _UI64_MAX
#endif
/* For Windows the Python core is in a DLL by default. Test
Py_NO_ENABLE_SHARED to find out. Also support MS_NO_COREDLL for b/w compat */
#if !defined(MS_NO_COREDLL) && !defined(Py_NO_ENABLE_SHARED)
# define Py_ENABLE_SHARED 1 /* standard symbol for shared library */
# define MS_COREDLL /* deprecated old symbol */
#endif /* !MS_NO_COREDLL && ... */
/* All windows compilers that use this header support __declspec */
#define HAVE_DECLSPEC_DLL
/* For an MSVC DLL, we can nominate the .lib files used by extensions */
#ifdef MS_COREDLL
# if !defined(Py_BUILD_CORE) && !defined(Py_BUILD_CORE_BUILTIN)
/* not building the core - must be an ext */
# if defined(_MSC_VER)
/* So MSVC users need not specify the .lib
file in their Makefile (other compilers are
generally taken care of by distutils.) */
# if defined(_DEBUG)
# pragma comment(lib,"python38_d.lib")
# elif defined(Py_LIMITED_API)
# pragma comment(lib,"python3.lib")
# else
# pragma comment(lib,"python38.lib")
# endif /* _DEBUG */
# endif /* _MSC_VER */
# endif /* Py_BUILD_CORE */
#endif /* MS_COREDLL */
#if defined(MS_WIN64)
/* maintain "win32" sys.platform for backward compatibility of Python code,
the Win64 API should be close enough to the Win32 API to make this
preferable */
# define PLATFORM "win32"
# define SIZEOF_VOID_P 8
# define SIZEOF_TIME_T 8
# define SIZEOF_OFF_T 4
# define SIZEOF_FPOS_T 8
# define SIZEOF_HKEY 8
# define SIZEOF_SIZE_T 8
/* configure.ac defines HAVE_LARGEFILE_SUPPORT iff
sizeof(off_t) > sizeof(long), and sizeof(PY_LONG_LONG) >= sizeof(off_t).
On Win64 the second condition is not true, but if fpos_t replaces off_t
then this is true. The uses of HAVE_LARGEFILE_SUPPORT imply that Win64
should define this. */
# define HAVE_LARGEFILE_SUPPORT
#elif defined(MS_WIN32)
# define PLATFORM "win32"
# define HAVE_LARGEFILE_SUPPORT
# define SIZEOF_VOID_P 4
# define SIZEOF_OFF_T 4
# define SIZEOF_FPOS_T 8
# define SIZEOF_HKEY 4
# define SIZEOF_SIZE_T 4
/* MS VS2005 changes time_t to a 64-bit type on all platforms */
# if defined(_MSC_VER) && _MSC_VER >= 1400
# define SIZEOF_TIME_T 8
# else
# define SIZEOF_TIME_T 4
# endif
#endif
#ifdef _DEBUG
# define Py_DEBUG
#endif
#ifdef MS_WIN32
#define SIZEOF_SHORT 2
#define SIZEOF_INT 4
#define SIZEOF_LONG 4
#define SIZEOF_LONG_LONG 8
#define SIZEOF_DOUBLE 8
#define SIZEOF_FLOAT 4
/* VC 7.1 has them and VC 6.0 does not. VC 6.0 has a version number of 1200.
Microsoft eMbedded Visual C++ 4.0 has a version number of 1201 and doesn't
define these.
If some compiler does not provide them, modify the #if appropriately. */
#if defined(_MSC_VER)
#if _MSC_VER > 1300
#define HAVE_UINTPTR_T 1
#define HAVE_INTPTR_T 1
#else
/* VC6, VS 2002 and eVC4 don't support the C99 LL suffix for 64-bit integer literals */
#define Py_LL(x) x##I64
#endif /* _MSC_VER > 1300 */
#endif /* _MSC_VER */
#endif
/* define signed and unsigned exact-width 32-bit and 64-bit types, used in the
implementation of Python integers. */
#define PY_UINT32_T uint32_t
#define PY_UINT64_T uint64_t
#define PY_INT32_T int32_t
#define PY_INT64_T int64_t
/* Fairly standard from here! */
/* Define to 1 if you have the `copysign' function. */
#define HAVE_COPYSIGN 1
/* Define to 1 if you have the `round' function. */
#if _MSC_VER >= 1800
#define HAVE_ROUND 1
#endif
/* Define to 1 if you have the `isinf' macro. */
#define HAVE_DECL_ISINF 1
/* Define to 1 if you have the `isnan' function. */
#define HAVE_DECL_ISNAN 1
/* Define if on AIX 3.
System headers sometimes define this.
We just want to avoid a redefinition error message. */
#ifndef _ALL_SOURCE
/* #undef _ALL_SOURCE */
#endif
/* Define to empty if the keyword does not work. */
/* #define const */
/* Define to 1 if you have the <conio.h> header file. */
#define HAVE_CONIO_H 1
/* Define to 1 if you have the <direct.h> header file. */
#define HAVE_DIRECT_H 1
/* Define to 1 if you have the declaration of `tzname', and to 0 if you don't.
*/
#define HAVE_DECL_TZNAME 1
/* Define if you have dirent.h. */
/* #define DIRENT 1 */
/* Define to the type of elements in the array set by `getgroups'.
Usually this is either `int' or `gid_t'. */
/* #undef GETGROUPS_T */
/* Define to `int' if <sys/types.h> doesn't define. */
/* #undef gid_t */
/* Define if your struct tm has tm_zone. */
/* #undef HAVE_TM_ZONE */
/* Define if you don't have tm_zone but do have the external array
tzname. */
#define HAVE_TZNAME
/* Define to `int' if <sys/types.h> doesn't define. */
/* #undef mode_t */
/* Define if you don't have dirent.h, but have ndir.h. */
/* #undef NDIR */
/* Define to `long' if <sys/types.h> doesn't define. */
/* #undef off_t */
/* Define to `int' if <sys/types.h> doesn't define. */
/* #undef pid_t */
/* Define if the system does not provide POSIX.1 features except
with this defined. */
/* #undef _POSIX_1_SOURCE */
/* Define if you need to in order for stat and other things to work. */
/* #undef _POSIX_SOURCE */
/* Define as the return type of signal handlers (int or void). */
#define RETSIGTYPE void
/* Define to `unsigned' if <sys/types.h> doesn't define. */
/* #undef size_t */
/* Define if you have the ANSI C header files. */
#define STDC_HEADERS 1
/* Define if you don't have dirent.h, but have sys/dir.h. */
/* #undef SYSDIR */
/* Define if you don't have dirent.h, but have sys/ndir.h. */
/* #undef SYSNDIR */
/* Define if you can safely include both <sys/time.h> and <time.h>. */
/* #undef TIME_WITH_SYS_TIME */
/* Define if your <sys/time.h> declares struct tm. */
/* #define TM_IN_SYS_TIME 1 */
/* Define to `int' if <sys/types.h> doesn't define. */
/* #undef uid_t */
/* Define if the closedir function returns void instead of int. */
/* #undef VOID_CLOSEDIR */
/* Define if getpgrp() must be called as getpgrp(0)
and (consequently) setpgrp() as setpgrp(0, 0). */
/* #undef GETPGRP_HAVE_ARGS */
/* Define this if your time.h defines altzone */
/* #define HAVE_ALTZONE */
/* Define if you have the putenv function. */
#define HAVE_PUTENV
/* Define if your compiler supports function prototypes */
#define HAVE_PROTOTYPES
/* Define if you can safely include both <sys/select.h> and <sys/time.h>
(which you can't on SCO ODT 3.0). */
/* #undef SYS_SELECT_WITH_SYS_TIME */
/* Define if you want build the _decimal module using a coroutine-local rather
than a thread-local context */
#define WITH_DECIMAL_CONTEXTVAR 1
/* Define if you want documentation strings in extension modules */
#define WITH_DOC_STRINGS 1
/* Define if you want to compile in rudimentary thread support */
/* #undef WITH_THREAD */
/* Define if you want to use the GNU readline library */
/* #define WITH_READLINE 1 */
/* Use Python's own small-block memory-allocator. */
#define WITH_PYMALLOC 1
/* Define if you have clock. */
/* #define HAVE_CLOCK */
/* Define when any dynamic module loading is enabled */
#define HAVE_DYNAMIC_LOADING
/* Define if you have ftime. */
#define HAVE_FTIME
/* Define if you have getpeername. */
#define HAVE_GETPEERNAME
/* Define if you have getpgrp. */
/* #undef HAVE_GETPGRP */
/* Define if you have getpid. */
#define HAVE_GETPID
/* Define if you have gettimeofday. */
/* #undef HAVE_GETTIMEOFDAY */
/* Define if you have getwd. */
/* #undef HAVE_GETWD */
/* Define if you have lstat. */
/* #undef HAVE_LSTAT */
/* Define if you have the mktime function. */
#define HAVE_MKTIME
/* Define if you have nice. */
/* #undef HAVE_NICE */
/* Define if you have readlink. */
/* #undef HAVE_READLINK */
/* Define if you have setpgid. */
/* #undef HAVE_SETPGID */
/* Define if you have setpgrp. */
/* #undef HAVE_SETPGRP */
/* Define if you have setsid. */
/* #undef HAVE_SETSID */
/* Define if you have setvbuf. */
#define HAVE_SETVBUF
/* Define if you have siginterrupt. */
/* #undef HAVE_SIGINTERRUPT */
/* Define if you have symlink. */
/* #undef HAVE_SYMLINK */
/* Define if you have tcgetpgrp. */
/* #undef HAVE_TCGETPGRP */
/* Define if you have tcsetpgrp. */
/* #undef HAVE_TCSETPGRP */
/* Define if you have times. */
/* #undef HAVE_TIMES */
/* Define if you have uname. */
/* #undef HAVE_UNAME */
/* Define if you have waitpid. */
/* #undef HAVE_WAITPID */
/* Define to 1 if you have the `wcsftime' function. */
#if defined(_MSC_VER) && _MSC_VER >= 1310
#define HAVE_WCSFTIME 1
#endif
/* Define to 1 if you have the `wcscoll' function. */
#define HAVE_WCSCOLL 1
/* Define to 1 if you have the `wcsxfrm' function. */
#define HAVE_WCSXFRM 1
/* Define if the zlib library has inflateCopy */
#define HAVE_ZLIB_COPY 1
/* Define if you have the <dlfcn.h> header file. */
/* #undef HAVE_DLFCN_H */
/* Define to 1 if you have the <errno.h> header file. */
#define HAVE_ERRNO_H 1
/* Define if you have the <fcntl.h> header file. */
#define HAVE_FCNTL_H 1
/* Define to 1 if you have the <process.h> header file. */
#define HAVE_PROCESS_H 1
/* Define to 1 if you have the <signal.h> header file. */
#define HAVE_SIGNAL_H 1
/* Define if you have the <stdarg.h> prototypes. */
#define HAVE_STDARG_PROTOTYPES
/* Define if you have the <stddef.h> header file. */
#define HAVE_STDDEF_H 1
/* Define if you have the <sys/audioio.h> header file. */
/* #undef HAVE_SYS_AUDIOIO_H */
/* Define if you have the <sys/param.h> header file. */
/* #define HAVE_SYS_PARAM_H 1 */
/* Define if you have the <sys/select.h> header file. */
/* #define HAVE_SYS_SELECT_H 1 */
/* Define to 1 if you have the <sys/stat.h> header file. */
#define HAVE_SYS_STAT_H 1
/* Define if you have the <sys/time.h> header file. */
/* #define HAVE_SYS_TIME_H 1 */
/* Define if you have the <sys/times.h> header file. */
/* #define HAVE_SYS_TIMES_H 1 */
/* Define to 1 if you have the <sys/types.h> header file. */
#define HAVE_SYS_TYPES_H 1
/* Define if you have the <sys/un.h> header file. */
/* #define HAVE_SYS_UN_H 1 */
/* Define if you have the <sys/utime.h> header file. */
/* #define HAVE_SYS_UTIME_H 1 */
/* Define if you have the <sys/utsname.h> header file. */
/* #define HAVE_SYS_UTSNAME_H 1 */
/* Define if you have the <unistd.h> header file. */
/* #define HAVE_UNISTD_H 1 */
/* Define if you have the <utime.h> header file. */
/* #define HAVE_UTIME_H 1 */
/* Define if the compiler provides a wchar.h header file. */
#define HAVE_WCHAR_H 1
/* The size of `wchar_t', as computed by sizeof. */
#define SIZEOF_WCHAR_T 2
/* The size of `_Bool', as computed by sizeof. */
#define SIZEOF__BOOL 1
/* The size of `pid_t', as computed by sizeof. */
#define SIZEOF_PID_T SIZEOF_INT
/* Define if you have the dl library (-ldl). */
/* #undef HAVE_LIBDL */
/* Define if you have the mpc library (-lmpc). */
/* #undef HAVE_LIBMPC */
/* Define if you have the nsl library (-lnsl). */
#define HAVE_LIBNSL 1
/* Define if you have the seq library (-lseq). */
/* #undef HAVE_LIBSEQ */
/* Define if you have the socket library (-lsocket). */
#define HAVE_LIBSOCKET 1
/* Define if you have the sun library (-lsun). */
/* #undef HAVE_LIBSUN */
/* Define if you have the termcap library (-ltermcap). */
/* #undef HAVE_LIBTERMCAP */
/* Define if you have the termlib library (-ltermlib). */
/* #undef HAVE_LIBTERMLIB */
/* Define if you have the thread library (-lthread). */
/* #undef HAVE_LIBTHREAD */
/* WinSock does not use a bitmask in select, and uses
socket handles greater than FD_SETSIZE */
#define Py_SOCKET_FD_CAN_BE_GE_FD_SETSIZE
/* Define if C doubles are 64-bit IEEE 754 binary format, stored with the
least significant byte first */
#define DOUBLE_IS_LITTLE_ENDIAN_IEEE754 1
/* Define to 1 if you have the `erf' function. */
#define HAVE_ERF 1
/* Define to 1 if you have the `erfc' function. */
#define HAVE_ERFC 1
/* Define if you have the 'inet_pton' function. */
#define HAVE_INET_PTON 1
/* framework name */
#define _PYTHONFRAMEWORK ""
/* Define if libssl has X509_VERIFY_PARAM_set1_host and related function */
#define HAVE_X509_VERIFY_PARAM_SET1_HOST 1
#endif /* !Py_CONFIG_H */
| 20,433
|
C++
|
.h
| 532
| 36.652256
| 122
| 0.685797
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,474
|
longobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/longobject.h
|
#ifndef Py_LONGOBJECT_H
#define Py_LONGOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Long (arbitrary precision) integer object interface */
typedef struct _longobject PyLongObject; /* Revealed in longintrepr.h */
PyAPI_DATA(PyTypeObject) PyLong_Type;
#define PyLong_Check(op) \
PyType_FastSubclass(Py_TYPE(op), Py_TPFLAGS_LONG_SUBCLASS)
#define PyLong_CheckExact(op) (Py_TYPE(op) == &PyLong_Type)
PyAPI_FUNC(PyObject *) PyLong_FromLong(long);
PyAPI_FUNC(PyObject *) PyLong_FromUnsignedLong(unsigned long);
PyAPI_FUNC(PyObject *) PyLong_FromSize_t(size_t);
PyAPI_FUNC(PyObject *) PyLong_FromSsize_t(Py_ssize_t);
PyAPI_FUNC(PyObject *) PyLong_FromDouble(double);
PyAPI_FUNC(long) PyLong_AsLong(PyObject *);
PyAPI_FUNC(long) PyLong_AsLongAndOverflow(PyObject *, int *);
PyAPI_FUNC(Py_ssize_t) PyLong_AsSsize_t(PyObject *);
PyAPI_FUNC(size_t) PyLong_AsSize_t(PyObject *);
PyAPI_FUNC(unsigned long) PyLong_AsUnsignedLong(PyObject *);
PyAPI_FUNC(unsigned long) PyLong_AsUnsignedLongMask(PyObject *);
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) _PyLong_AsInt(PyObject *);
#endif
PyAPI_FUNC(PyObject *) PyLong_GetInfo(void);
/* It may be useful in the future. I've added it in the PyInt -> PyLong
cleanup to keep the extra information. [CH] */
#define PyLong_AS_LONG(op) PyLong_AsLong(op)
/* Issue #1983: pid_t can be longer than a C long on some systems */
#if !defined(SIZEOF_PID_T) || SIZEOF_PID_T == SIZEOF_INT
#define _Py_PARSE_PID "i"
#define PyLong_FromPid PyLong_FromLong
#define PyLong_AsPid PyLong_AsLong
#elif SIZEOF_PID_T == SIZEOF_LONG
#define _Py_PARSE_PID "l"
#define PyLong_FromPid PyLong_FromLong
#define PyLong_AsPid PyLong_AsLong
#elif defined(SIZEOF_LONG_LONG) && SIZEOF_PID_T == SIZEOF_LONG_LONG
#define _Py_PARSE_PID "L"
#define PyLong_FromPid PyLong_FromLongLong
#define PyLong_AsPid PyLong_AsLongLong
#else
#error "sizeof(pid_t) is neither sizeof(int), sizeof(long) or sizeof(long long)"
#endif /* SIZEOF_PID_T */
#if SIZEOF_VOID_P == SIZEOF_INT
# define _Py_PARSE_INTPTR "i"
# define _Py_PARSE_UINTPTR "I"
#elif SIZEOF_VOID_P == SIZEOF_LONG
# define _Py_PARSE_INTPTR "l"
# define _Py_PARSE_UINTPTR "k"
#elif defined(SIZEOF_LONG_LONG) && SIZEOF_VOID_P == SIZEOF_LONG_LONG
# define _Py_PARSE_INTPTR "L"
# define _Py_PARSE_UINTPTR "K"
#else
# error "void* different in size from int, long and long long"
#endif /* SIZEOF_VOID_P */
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) _PyLong_UnsignedShort_Converter(PyObject *, void *);
PyAPI_FUNC(int) _PyLong_UnsignedInt_Converter(PyObject *, void *);
PyAPI_FUNC(int) _PyLong_UnsignedLong_Converter(PyObject *, void *);
PyAPI_FUNC(int) _PyLong_UnsignedLongLong_Converter(PyObject *, void *);
PyAPI_FUNC(int) _PyLong_Size_t_Converter(PyObject *, void *);
#endif
/* Used by Python/mystrtoul.c, _PyBytes_FromHex(),
_PyBytes_DecodeEscapeRecode(), etc. */
#ifndef Py_LIMITED_API
PyAPI_DATA(unsigned char) _PyLong_DigitValue[256];
#endif
/* _PyLong_Frexp returns a double x and an exponent e such that the
true value is approximately equal to x * 2**e. e is >= 0. x is
0.0 if and only if the input is 0 (in which case, e and x are both
zeroes); otherwise, 0.5 <= abs(x) < 1.0. On overflow, which is
possible if the number of bits doesn't fit into a Py_ssize_t, sets
OverflowError and returns -1.0 for x, 0 for e. */
#ifndef Py_LIMITED_API
PyAPI_FUNC(double) _PyLong_Frexp(PyLongObject *a, Py_ssize_t *e);
#endif
PyAPI_FUNC(double) PyLong_AsDouble(PyObject *);
PyAPI_FUNC(PyObject *) PyLong_FromVoidPtr(void *);
PyAPI_FUNC(void *) PyLong_AsVoidPtr(PyObject *);
PyAPI_FUNC(PyObject *) PyLong_FromLongLong(long long);
PyAPI_FUNC(PyObject *) PyLong_FromUnsignedLongLong(unsigned long long);
PyAPI_FUNC(long long) PyLong_AsLongLong(PyObject *);
PyAPI_FUNC(unsigned long long) PyLong_AsUnsignedLongLong(PyObject *);
PyAPI_FUNC(unsigned long long) PyLong_AsUnsignedLongLongMask(PyObject *);
PyAPI_FUNC(long long) PyLong_AsLongLongAndOverflow(PyObject *, int *);
PyAPI_FUNC(PyObject *) PyLong_FromString(const char *, char **, int);
#ifndef Py_LIMITED_API
Py_DEPRECATED(3.3)
PyAPI_FUNC(PyObject *) PyLong_FromUnicode(Py_UNICODE*, Py_ssize_t, int);
PyAPI_FUNC(PyObject *) PyLong_FromUnicodeObject(PyObject *u, int base);
PyAPI_FUNC(PyObject *) _PyLong_FromBytes(const char *, Py_ssize_t, int);
#endif
#ifndef Py_LIMITED_API
/* _PyLong_Sign. Return 0 if v is 0, -1 if v < 0, +1 if v > 0.
v must not be NULL, and must be a normalized long.
There are no error cases.
*/
PyAPI_FUNC(int) _PyLong_Sign(PyObject *v);
/* _PyLong_NumBits. Return the number of bits needed to represent the
absolute value of a long. For example, this returns 1 for 1 and -1, 2
for 2 and -2, and 2 for 3 and -3. It returns 0 for 0.
v must not be NULL, and must be a normalized long.
(size_t)-1 is returned and OverflowError set if the true result doesn't
fit in a size_t.
*/
PyAPI_FUNC(size_t) _PyLong_NumBits(PyObject *v);
/* _PyLong_DivmodNear. Given integers a and b, compute the nearest
integer q to the exact quotient a / b, rounding to the nearest even integer
in the case of a tie. Return (q, r), where r = a - q*b. The remainder r
will satisfy abs(r) <= abs(b)/2, with equality possible only if q is
even.
*/
PyAPI_FUNC(PyObject *) _PyLong_DivmodNear(PyObject *, PyObject *);
/* _PyLong_FromByteArray: View the n unsigned bytes as a binary integer in
base 256, and return a Python int with the same numeric value.
If n is 0, the integer is 0. Else:
If little_endian is 1/true, bytes[n-1] is the MSB and bytes[0] the LSB;
else (little_endian is 0/false) bytes[0] is the MSB and bytes[n-1] the
LSB.
If is_signed is 0/false, view the bytes as a non-negative integer.
If is_signed is 1/true, view the bytes as a 2's-complement integer,
non-negative if bit 0x80 of the MSB is clear, negative if set.
Error returns:
+ Return NULL with the appropriate exception set if there's not
enough memory to create the Python int.
*/
PyAPI_FUNC(PyObject *) _PyLong_FromByteArray(
const unsigned char* bytes, size_t n,
int little_endian, int is_signed);
/* _PyLong_AsByteArray: Convert the least-significant 8*n bits of long
v to a base-256 integer, stored in array bytes. Normally return 0,
return -1 on error.
If little_endian is 1/true, store the MSB at bytes[n-1] and the LSB at
bytes[0]; else (little_endian is 0/false) store the MSB at bytes[0] and
the LSB at bytes[n-1].
If is_signed is 0/false, it's an error if v < 0; else (v >= 0) n bytes
are filled and there's nothing special about bit 0x80 of the MSB.
If is_signed is 1/true, bytes is filled with the 2's-complement
representation of v's value. Bit 0x80 of the MSB is the sign bit.
Error returns (-1):
+ is_signed is 0 and v < 0. TypeError is set in this case, and bytes
isn't altered.
+ n isn't big enough to hold the full mathematical value of v. For
example, if is_signed is 0 and there are more digits in the v than
fit in n; or if is_signed is 1, v < 0, and n is just 1 bit shy of
being large enough to hold a sign bit. OverflowError is set in this
case, but bytes holds the least-significant n bytes of the true value.
*/
PyAPI_FUNC(int) _PyLong_AsByteArray(PyLongObject* v,
unsigned char* bytes, size_t n,
int little_endian, int is_signed);
/* _PyLong_FromNbInt: Convert the given object to a PyLongObject
using the nb_int slot, if available. Raise TypeError if either the
nb_int slot is not available or the result of the call to nb_int
returns something not of type int.
*/
PyAPI_FUNC(PyObject *) _PyLong_FromNbInt(PyObject *);
/* Convert the given object to a PyLongObject using the nb_index or
nb_int slots, if available (the latter is deprecated).
Raise TypeError if either nb_index and nb_int slots are not
available or the result of the call to nb_index or nb_int
returns something not of type int.
Should be replaced with PyNumber_Index after the end of the
deprecation period.
*/
PyAPI_FUNC(PyObject *) _PyLong_FromNbIndexOrNbInt(PyObject *);
/* _PyLong_Format: Convert the long to a string object with given base,
appending a base prefix of 0[box] if base is 2, 8 or 16. */
PyAPI_FUNC(PyObject *) _PyLong_Format(PyObject *obj, int base);
PyAPI_FUNC(int) _PyLong_FormatWriter(
_PyUnicodeWriter *writer,
PyObject *obj,
int base,
int alternate);
PyAPI_FUNC(char*) _PyLong_FormatBytesWriter(
_PyBytesWriter *writer,
char *str,
PyObject *obj,
int base,
int alternate);
/* Format the object based on the format_spec, as defined in PEP 3101
(Advanced String Formatting). */
PyAPI_FUNC(int) _PyLong_FormatAdvancedWriter(
_PyUnicodeWriter *writer,
PyObject *obj,
PyObject *format_spec,
Py_ssize_t start,
Py_ssize_t end);
#endif /* Py_LIMITED_API */
/* These aren't really part of the int object, but they're handy. The
functions are in Python/mystrtoul.c.
*/
PyAPI_FUNC(unsigned long) PyOS_strtoul(const char *, char **, int);
PyAPI_FUNC(long) PyOS_strtol(const char *, char **, int);
#ifndef Py_LIMITED_API
/* For use by the gcd function in mathmodule.c */
PyAPI_FUNC(PyObject *) _PyLong_GCD(PyObject *, PyObject *);
#endif /* !Py_LIMITED_API */
#ifndef Py_LIMITED_API
PyAPI_DATA(PyObject *) _PyLong_Zero;
PyAPI_DATA(PyObject *) _PyLong_One;
PyAPI_FUNC(PyObject *) _PyLong_Rshift(PyObject *, size_t);
PyAPI_FUNC(PyObject *) _PyLong_Lshift(PyObject *, size_t);
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_LONGOBJECT_H */
| 9,520
|
C++
|
.h
| 210
| 42.909524
| 80
| 0.732378
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,475
|
ceval.h
|
relativty_Relativty/Relativty_Driver/include/Python/ceval.h
|
#ifndef Py_CEVAL_H
#define Py_CEVAL_H
#ifdef __cplusplus
extern "C" {
#endif
/* Interface to random parts in ceval.c */
/* PyEval_CallObjectWithKeywords(), PyEval_CallObject(), PyEval_CallFunction
* and PyEval_CallMethod are kept for backward compatibility: PyObject_Call(),
* PyObject_CallFunction() and PyObject_CallMethod() are recommended to call
* a callable object.
*/
PyAPI_FUNC(PyObject *) PyEval_CallObjectWithKeywords(
PyObject *callable,
PyObject *args,
PyObject *kwargs);
/* Inline this */
#define PyEval_CallObject(callable, arg) \
PyEval_CallObjectWithKeywords(callable, arg, (PyObject *)NULL)
PyAPI_FUNC(PyObject *) PyEval_CallFunction(PyObject *callable,
const char *format, ...);
PyAPI_FUNC(PyObject *) PyEval_CallMethod(PyObject *obj,
const char *name,
const char *format, ...);
#ifndef Py_LIMITED_API
PyAPI_FUNC(void) PyEval_SetProfile(Py_tracefunc, PyObject *);
PyAPI_FUNC(void) PyEval_SetTrace(Py_tracefunc, PyObject *);
PyAPI_FUNC(void) _PyEval_SetCoroutineOriginTrackingDepth(int new_depth);
PyAPI_FUNC(int) _PyEval_GetCoroutineOriginTrackingDepth(void);
PyAPI_FUNC(void) _PyEval_SetAsyncGenFirstiter(PyObject *);
PyAPI_FUNC(PyObject *) _PyEval_GetAsyncGenFirstiter(void);
PyAPI_FUNC(void) _PyEval_SetAsyncGenFinalizer(PyObject *);
PyAPI_FUNC(PyObject *) _PyEval_GetAsyncGenFinalizer(void);
#endif
struct _frame; /* Avoid including frameobject.h */
PyAPI_FUNC(PyObject *) PyEval_GetBuiltins(void);
PyAPI_FUNC(PyObject *) PyEval_GetGlobals(void);
PyAPI_FUNC(PyObject *) PyEval_GetLocals(void);
PyAPI_FUNC(struct _frame *) PyEval_GetFrame(void);
#ifndef Py_LIMITED_API
/* Helper to look up a builtin object */
PyAPI_FUNC(PyObject *) _PyEval_GetBuiltinId(_Py_Identifier *);
/* Look at the current frame's (if any) code's co_flags, and turn on
the corresponding compiler flags in cf->cf_flags. Return 1 if any
flag was set, else return 0. */
PyAPI_FUNC(int) PyEval_MergeCompilerFlags(PyCompilerFlags *cf);
#endif
PyAPI_FUNC(int) Py_AddPendingCall(int (*func)(void *), void *arg);
PyAPI_FUNC(int) Py_MakePendingCalls(void);
/* Protection against deeply nested recursive calls
In Python 3.0, this protection has two levels:
* normal anti-recursion protection is triggered when the recursion level
exceeds the current recursion limit. It raises a RecursionError, and sets
the "overflowed" flag in the thread state structure. This flag
temporarily *disables* the normal protection; this allows cleanup code
to potentially outgrow the recursion limit while processing the
RecursionError.
* "last chance" anti-recursion protection is triggered when the recursion
level exceeds "current recursion limit + 50". By construction, this
protection can only be triggered when the "overflowed" flag is set. It
means the cleanup code has itself gone into an infinite loop, or the
RecursionError has been mistakingly ignored. When this protection is
triggered, the interpreter aborts with a Fatal Error.
In addition, the "overflowed" flag is automatically reset when the
recursion level drops below "current recursion limit - 50". This heuristic
is meant to ensure that the normal anti-recursion protection doesn't get
disabled too long.
Please note: this scheme has its own limitations. See:
http://mail.python.org/pipermail/python-dev/2008-August/082106.html
for some observations.
*/
PyAPI_FUNC(void) Py_SetRecursionLimit(int);
PyAPI_FUNC(int) Py_GetRecursionLimit(void);
#define Py_EnterRecursiveCall(where) \
(_Py_MakeRecCheck(PyThreadState_GET()->recursion_depth) && \
_Py_CheckRecursiveCall(where))
#define Py_LeaveRecursiveCall() \
do{ if(_Py_MakeEndRecCheck(PyThreadState_GET()->recursion_depth)) \
PyThreadState_GET()->overflowed = 0; \
} while(0)
PyAPI_FUNC(int) _Py_CheckRecursiveCall(const char *where);
/* Due to the macros in which it's used, _Py_CheckRecursionLimit is in
the stable ABI. It should be removed therefrom when possible.
*/
PyAPI_DATA(int) _Py_CheckRecursionLimit;
#ifdef USE_STACKCHECK
/* With USE_STACKCHECK, trigger stack checks in _Py_CheckRecursiveCall()
on every 64th call to Py_EnterRecursiveCall.
*/
# define _Py_MakeRecCheck(x) \
(++(x) > _Py_CheckRecursionLimit || \
++(PyThreadState_GET()->stackcheck_counter) > 64)
#else
# define _Py_MakeRecCheck(x) (++(x) > _Py_CheckRecursionLimit)
#endif
/* Compute the "lower-water mark" for a recursion limit. When
* Py_LeaveRecursiveCall() is called with a recursion depth below this mark,
* the overflowed flag is reset to 0. */
#define _Py_RecursionLimitLowerWaterMark(limit) \
(((limit) > 200) \
? ((limit) - 50) \
: (3 * ((limit) >> 2)))
#define _Py_MakeEndRecCheck(x) \
(--(x) < _Py_RecursionLimitLowerWaterMark(_Py_CheckRecursionLimit))
#define Py_ALLOW_RECURSION \
do { unsigned char _old = PyThreadState_GET()->recursion_critical;\
PyThreadState_GET()->recursion_critical = 1;
#define Py_END_ALLOW_RECURSION \
PyThreadState_GET()->recursion_critical = _old; \
} while(0);
PyAPI_FUNC(const char *) PyEval_GetFuncName(PyObject *);
PyAPI_FUNC(const char *) PyEval_GetFuncDesc(PyObject *);
PyAPI_FUNC(PyObject *) PyEval_EvalFrame(struct _frame *);
PyAPI_FUNC(PyObject *) PyEval_EvalFrameEx(struct _frame *f, int exc);
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) _PyEval_EvalFrameDefault(struct _frame *f, int exc);
#endif
/* Interface for threads.
A module that plans to do a blocking system call (or something else
that lasts a long time and doesn't touch Python data) can allow other
threads to run as follows:
...preparations here...
Py_BEGIN_ALLOW_THREADS
...blocking system call here...
Py_END_ALLOW_THREADS
...interpret result here...
The Py_BEGIN_ALLOW_THREADS/Py_END_ALLOW_THREADS pair expands to a
{}-surrounded block.
To leave the block in the middle (e.g., with return), you must insert
a line containing Py_BLOCK_THREADS before the return, e.g.
if (...premature_exit...) {
Py_BLOCK_THREADS
PyErr_SetFromErrno(PyExc_OSError);
return NULL;
}
An alternative is:
Py_BLOCK_THREADS
if (...premature_exit...) {
PyErr_SetFromErrno(PyExc_OSError);
return NULL;
}
Py_UNBLOCK_THREADS
For convenience, that the value of 'errno' is restored across
Py_END_ALLOW_THREADS and Py_BLOCK_THREADS.
WARNING: NEVER NEST CALLS TO Py_BEGIN_ALLOW_THREADS AND
Py_END_ALLOW_THREADS!!!
The function PyEval_InitThreads() should be called only from
init_thread() in "_threadmodule.c".
Note that not yet all candidates have been converted to use this
mechanism!
*/
PyAPI_FUNC(PyThreadState *) PyEval_SaveThread(void);
PyAPI_FUNC(void) PyEval_RestoreThread(PyThreadState *);
PyAPI_FUNC(int) PyEval_ThreadsInitialized(void);
PyAPI_FUNC(void) PyEval_InitThreads(void);
Py_DEPRECATED(3.2) PyAPI_FUNC(void) PyEval_AcquireLock(void);
/* Py_DEPRECATED(3.2) */ PyAPI_FUNC(void) PyEval_ReleaseLock(void);
PyAPI_FUNC(void) PyEval_AcquireThread(PyThreadState *tstate);
PyAPI_FUNC(void) PyEval_ReleaseThread(PyThreadState *tstate);
#ifndef Py_LIMITED_API
PyAPI_FUNC(void) _PyEval_SetSwitchInterval(unsigned long microseconds);
PyAPI_FUNC(unsigned long) _PyEval_GetSwitchInterval(void);
#endif
#ifndef Py_LIMITED_API
PyAPI_FUNC(Py_ssize_t) _PyEval_RequestCodeExtraIndex(freefunc);
#endif
#define Py_BEGIN_ALLOW_THREADS { \
PyThreadState *_save; \
_save = PyEval_SaveThread();
#define Py_BLOCK_THREADS PyEval_RestoreThread(_save);
#define Py_UNBLOCK_THREADS _save = PyEval_SaveThread();
#define Py_END_ALLOW_THREADS PyEval_RestoreThread(_save); \
}
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) _PyEval_SliceIndex(PyObject *, Py_ssize_t *);
PyAPI_FUNC(int) _PyEval_SliceIndexNotNone(PyObject *, Py_ssize_t *);
#endif
/* Masks and values used by FORMAT_VALUE opcode. */
#define FVC_MASK 0x3
#define FVC_NONE 0x0
#define FVC_STR 0x1
#define FVC_REPR 0x2
#define FVC_ASCII 0x3
#define FVS_MASK 0x4
#define FVS_HAVE_SPEC 0x4
#ifdef __cplusplus
}
#endif
#endif /* !Py_CEVAL_H */
| 8,366
|
C++
|
.h
| 188
| 40.505319
| 78
| 0.725138
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,476
|
namespaceobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/namespaceobject.h
|
/* simple namespace object interface */
#ifndef NAMESPACEOBJECT_H
#define NAMESPACEOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
#ifndef Py_LIMITED_API
PyAPI_DATA(PyTypeObject) _PyNamespace_Type;
PyAPI_FUNC(PyObject *) _PyNamespace_New(PyObject *kwds);
#endif /* !Py_LIMITED_API */
#ifdef __cplusplus
}
#endif
#endif /* !NAMESPACEOBJECT_H */
| 349
|
C++
|
.h
| 14
| 23.571429
| 56
| 0.769697
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,477
|
iterobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/iterobject.h
|
#ifndef Py_ITEROBJECT_H
#define Py_ITEROBJECT_H
/* Iterators (the basic kind, over a sequence) */
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_DATA(PyTypeObject) PySeqIter_Type;
PyAPI_DATA(PyTypeObject) PyCallIter_Type;
PyAPI_DATA(PyTypeObject) PyCmpWrapper_Type;
#define PySeqIter_Check(op) (Py_TYPE(op) == &PySeqIter_Type)
PyAPI_FUNC(PyObject *) PySeqIter_New(PyObject *);
#define PyCallIter_Check(op) (Py_TYPE(op) == &PyCallIter_Type)
PyAPI_FUNC(PyObject *) PyCallIter_New(PyObject *, PyObject *);
#ifdef __cplusplus
}
#endif
#endif /* !Py_ITEROBJECT_H */
| 567
|
C++
|
.h
| 17
| 31.882353
| 62
| 0.760148
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,478
|
memoryobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/memoryobject.h
|
/* Memory view object. In Python this is available as "memoryview". */
#ifndef Py_MEMORYOBJECT_H
#define Py_MEMORYOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
#ifndef Py_LIMITED_API
PyAPI_DATA(PyTypeObject) _PyManagedBuffer_Type;
#endif
PyAPI_DATA(PyTypeObject) PyMemoryView_Type;
#define PyMemoryView_Check(op) (Py_TYPE(op) == &PyMemoryView_Type)
#ifndef Py_LIMITED_API
/* Get a pointer to the memoryview's private copy of the exporter's buffer. */
#define PyMemoryView_GET_BUFFER(op) (&((PyMemoryViewObject *)(op))->view)
/* Get a pointer to the exporting object (this may be NULL!). */
#define PyMemoryView_GET_BASE(op) (((PyMemoryViewObject *)(op))->view.obj)
#endif
PyAPI_FUNC(PyObject *) PyMemoryView_FromObject(PyObject *base);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
PyAPI_FUNC(PyObject *) PyMemoryView_FromMemory(char *mem, Py_ssize_t size,
int flags);
#endif
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) PyMemoryView_FromBuffer(Py_buffer *info);
#endif
PyAPI_FUNC(PyObject *) PyMemoryView_GetContiguous(PyObject *base,
int buffertype,
char order);
/* The structs are declared here so that macros can work, but they shouldn't
be considered public. Don't access their fields directly, use the macros
and functions instead! */
#ifndef Py_LIMITED_API
#define _Py_MANAGED_BUFFER_RELEASED 0x001 /* access to exporter blocked */
#define _Py_MANAGED_BUFFER_FREE_FORMAT 0x002 /* free format */
typedef struct {
PyObject_HEAD
int flags; /* state flags */
Py_ssize_t exports; /* number of direct memoryview exports */
Py_buffer master; /* snapshot buffer obtained from the original exporter */
} _PyManagedBufferObject;
/* memoryview state flags */
#define _Py_MEMORYVIEW_RELEASED 0x001 /* access to master buffer blocked */
#define _Py_MEMORYVIEW_C 0x002 /* C-contiguous layout */
#define _Py_MEMORYVIEW_FORTRAN 0x004 /* Fortran contiguous layout */
#define _Py_MEMORYVIEW_SCALAR 0x008 /* scalar: ndim = 0 */
#define _Py_MEMORYVIEW_PIL 0x010 /* PIL-style layout */
typedef struct {
PyObject_VAR_HEAD
_PyManagedBufferObject *mbuf; /* managed buffer */
Py_hash_t hash; /* hash value for read-only views */
int flags; /* state flags */
Py_ssize_t exports; /* number of buffer re-exports */
Py_buffer view; /* private copy of the exporter's view */
PyObject *weakreflist;
Py_ssize_t ob_array[1]; /* shape, strides, suboffsets */
} PyMemoryViewObject;
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_MEMORYOBJECT_H */
| 2,765
|
C++
|
.h
| 61
| 40.852459
| 79
| 0.673227
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,479
|
bytearrayobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/bytearrayobject.h
|
/* ByteArray object interface */
#ifndef Py_BYTEARRAYOBJECT_H
#define Py_BYTEARRAYOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdarg.h>
/* Type PyByteArrayObject represents a mutable array of bytes.
* The Python API is that of a sequence;
* the bytes are mapped to ints in [0, 256).
* Bytes are not characters; they may be used to encode characters.
* The only way to go between bytes and str/unicode is via encoding
* and decoding.
* For the convenience of C programmers, the bytes type is considered
* to contain a char pointer, not an unsigned char pointer.
*/
/* Object layout */
#ifndef Py_LIMITED_API
typedef struct {
PyObject_VAR_HEAD
Py_ssize_t ob_alloc; /* How many bytes allocated in ob_bytes */
char *ob_bytes; /* Physical backing buffer */
char *ob_start; /* Logical start inside ob_bytes */
/* XXX(nnorwitz): should ob_exports be Py_ssize_t? */
int ob_exports; /* How many buffer exports */
} PyByteArrayObject;
#endif
/* Type object */
PyAPI_DATA(PyTypeObject) PyByteArray_Type;
PyAPI_DATA(PyTypeObject) PyByteArrayIter_Type;
/* Type check macros */
#define PyByteArray_Check(self) PyObject_TypeCheck(self, &PyByteArray_Type)
#define PyByteArray_CheckExact(self) (Py_TYPE(self) == &PyByteArray_Type)
/* Direct API functions */
PyAPI_FUNC(PyObject *) PyByteArray_FromObject(PyObject *);
PyAPI_FUNC(PyObject *) PyByteArray_Concat(PyObject *, PyObject *);
PyAPI_FUNC(PyObject *) PyByteArray_FromStringAndSize(const char *, Py_ssize_t);
PyAPI_FUNC(Py_ssize_t) PyByteArray_Size(PyObject *);
PyAPI_FUNC(char *) PyByteArray_AsString(PyObject *);
PyAPI_FUNC(int) PyByteArray_Resize(PyObject *, Py_ssize_t);
/* Macros, trading safety for speed */
#ifndef Py_LIMITED_API
#define PyByteArray_AS_STRING(self) \
(assert(PyByteArray_Check(self)), \
Py_SIZE(self) ? ((PyByteArrayObject *)(self))->ob_start : _PyByteArray_empty_string)
#define PyByteArray_GET_SIZE(self) (assert(PyByteArray_Check(self)), Py_SIZE(self))
PyAPI_DATA(char) _PyByteArray_empty_string[];
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_BYTEARRAYOBJECT_H */
| 2,114
|
C++
|
.h
| 52
| 38.673077
| 89
| 0.742203
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,480
|
patchlevel.h
|
relativty_Relativty/Relativty_Driver/include/Python/patchlevel.h
|
/* Python version identification scheme.
When the major or minor version changes, the VERSION variable in
configure.ac must also be changed.
There is also (independent) API version information in modsupport.h.
*/
/* Values for PY_RELEASE_LEVEL */
#define PY_RELEASE_LEVEL_ALPHA 0xA
#define PY_RELEASE_LEVEL_BETA 0xB
#define PY_RELEASE_LEVEL_GAMMA 0xC /* For release candidates */
#define PY_RELEASE_LEVEL_FINAL 0xF /* Serial should be 0 here */
/* Higher for patch releases */
/* Version parsed out into numeric values */
/*--start constants--*/
#define PY_MAJOR_VERSION 3
#define PY_MINOR_VERSION 8
#define PY_MICRO_VERSION 4
#define PY_RELEASE_LEVEL PY_RELEASE_LEVEL_FINAL
#define PY_RELEASE_SERIAL 0
/* Version as a string */
#define PY_VERSION "3.8.4"
/*--end constants--*/
/* Version as a single 4-byte hex number, e.g. 0x010502B2 == 1.5.2b2.
Use this for numeric comparisons, e.g. #if PY_VERSION_HEX >= ... */
#define PY_VERSION_HEX ((PY_MAJOR_VERSION << 24) | \
(PY_MINOR_VERSION << 16) | \
(PY_MICRO_VERSION << 8) | \
(PY_RELEASE_LEVEL << 4) | \
(PY_RELEASE_SERIAL << 0))
| 1,297
|
C++
|
.h
| 28
| 39.785714
| 71
| 0.60935
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,481
|
pylifecycle.h
|
relativty_Relativty/Relativty_Driver/include/Python/pylifecycle.h
|
/* Interfaces to configure, query, create & destroy the Python runtime */
#ifndef Py_PYLIFECYCLE_H
#define Py_PYLIFECYCLE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Initialization and finalization */
PyAPI_FUNC(void) Py_Initialize(void);
PyAPI_FUNC(void) Py_InitializeEx(int);
PyAPI_FUNC(void) Py_Finalize(void);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03060000
PyAPI_FUNC(int) Py_FinalizeEx(void);
#endif
PyAPI_FUNC(int) Py_IsInitialized(void);
/* Subinterpreter support */
PyAPI_FUNC(PyThreadState *) Py_NewInterpreter(void);
PyAPI_FUNC(void) Py_EndInterpreter(PyThreadState *);
/* Py_PyAtExit is for the atexit module, Py_AtExit is for low-level
* exit functions.
*/
PyAPI_FUNC(int) Py_AtExit(void (*func)(void));
PyAPI_FUNC(void) _Py_NO_RETURN Py_Exit(int);
/* Bootstrap __main__ (defined in Modules/main.c) */
PyAPI_FUNC(int) Py_Main(int argc, wchar_t **argv);
PyAPI_FUNC(int) Py_BytesMain(int argc, char **argv);
/* In pathconfig.c */
PyAPI_FUNC(void) Py_SetProgramName(const wchar_t *);
PyAPI_FUNC(wchar_t *) Py_GetProgramName(void);
PyAPI_FUNC(void) Py_SetPythonHome(const wchar_t *);
PyAPI_FUNC(wchar_t *) Py_GetPythonHome(void);
PyAPI_FUNC(wchar_t *) Py_GetProgramFullPath(void);
PyAPI_FUNC(wchar_t *) Py_GetPrefix(void);
PyAPI_FUNC(wchar_t *) Py_GetExecPrefix(void);
PyAPI_FUNC(wchar_t *) Py_GetPath(void);
PyAPI_FUNC(void) Py_SetPath(const wchar_t *);
#ifdef MS_WINDOWS
int _Py_CheckPython3(void);
#endif
/* In their own files */
PyAPI_FUNC(const char *) Py_GetVersion(void);
PyAPI_FUNC(const char *) Py_GetPlatform(void);
PyAPI_FUNC(const char *) Py_GetCopyright(void);
PyAPI_FUNC(const char *) Py_GetCompiler(void);
PyAPI_FUNC(const char *) Py_GetBuildInfo(void);
/* Signals */
typedef void (*PyOS_sighandler_t)(int);
PyAPI_FUNC(PyOS_sighandler_t) PyOS_getsig(int);
PyAPI_FUNC(PyOS_sighandler_t) PyOS_setsig(int, PyOS_sighandler_t);
#ifndef Py_LIMITED_API
# define Py_CPYTHON_PYLIFECYCLE_H
# include "cpython/pylifecycle.h"
# undef Py_CPYTHON_PYLIFECYCLE_H
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_PYLIFECYCLE_H */
| 2,081
|
C++
|
.h
| 57
| 35.157895
| 73
| 0.750249
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,482
|
bytesobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/bytesobject.h
|
/* Bytes (String) object interface */
#ifndef Py_BYTESOBJECT_H
#define Py_BYTESOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdarg.h>
/*
Type PyBytesObject represents a character string. An extra zero byte is
reserved at the end to ensure it is zero-terminated, but a size is
present so strings with null bytes in them can be represented. This
is an immutable object type.
There are functions to create new string objects, to test
an object for string-ness, and to get the
string value. The latter function returns a null pointer
if the object is not of the proper type.
There is a variant that takes an explicit size as well as a
variant that assumes a zero-terminated string. Note that none of the
functions should be applied to nil objects.
*/
/* Caching the hash (ob_shash) saves recalculation of a string's hash value.
This significantly speeds up dict lookups. */
#ifndef Py_LIMITED_API
typedef struct {
PyObject_VAR_HEAD
Py_hash_t ob_shash;
char ob_sval[1];
/* Invariants:
* ob_sval contains space for 'ob_size+1' elements.
* ob_sval[ob_size] == 0.
* ob_shash is the hash of the string or -1 if not computed yet.
*/
} PyBytesObject;
#endif
PyAPI_DATA(PyTypeObject) PyBytes_Type;
PyAPI_DATA(PyTypeObject) PyBytesIter_Type;
#define PyBytes_Check(op) \
PyType_FastSubclass(Py_TYPE(op), Py_TPFLAGS_BYTES_SUBCLASS)
#define PyBytes_CheckExact(op) (Py_TYPE(op) == &PyBytes_Type)
PyAPI_FUNC(PyObject *) PyBytes_FromStringAndSize(const char *, Py_ssize_t);
PyAPI_FUNC(PyObject *) PyBytes_FromString(const char *);
PyAPI_FUNC(PyObject *) PyBytes_FromObject(PyObject *);
PyAPI_FUNC(PyObject *) PyBytes_FromFormatV(const char*, va_list)
Py_GCC_ATTRIBUTE((format(printf, 1, 0)));
PyAPI_FUNC(PyObject *) PyBytes_FromFormat(const char*, ...)
Py_GCC_ATTRIBUTE((format(printf, 1, 2)));
PyAPI_FUNC(Py_ssize_t) PyBytes_Size(PyObject *);
PyAPI_FUNC(char *) PyBytes_AsString(PyObject *);
PyAPI_FUNC(PyObject *) PyBytes_Repr(PyObject *, int);
PyAPI_FUNC(void) PyBytes_Concat(PyObject **, PyObject *);
PyAPI_FUNC(void) PyBytes_ConcatAndDel(PyObject **, PyObject *);
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) _PyBytes_Resize(PyObject **, Py_ssize_t);
PyAPI_FUNC(PyObject*) _PyBytes_FormatEx(
const char *format,
Py_ssize_t format_len,
PyObject *args,
int use_bytearray);
PyAPI_FUNC(PyObject*) _PyBytes_FromHex(
PyObject *string,
int use_bytearray);
#endif
PyAPI_FUNC(PyObject *) PyBytes_DecodeEscape(const char *, Py_ssize_t,
const char *, Py_ssize_t,
const char *);
#ifndef Py_LIMITED_API
/* Helper for PyBytes_DecodeEscape that detects invalid escape chars. */
PyAPI_FUNC(PyObject *) _PyBytes_DecodeEscape(const char *, Py_ssize_t,
const char *, Py_ssize_t,
const char *,
const char **);
#endif
/* Macro, trading safety for speed */
#ifndef Py_LIMITED_API
#define PyBytes_AS_STRING(op) (assert(PyBytes_Check(op)), \
(((PyBytesObject *)(op))->ob_sval))
#define PyBytes_GET_SIZE(op) (assert(PyBytes_Check(op)),Py_SIZE(op))
#endif
/* _PyBytes_Join(sep, x) is like sep.join(x). sep must be PyBytesObject*,
x must be an iterable object. */
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) _PyBytes_Join(PyObject *sep, PyObject *x);
#endif
/* Provides access to the internal data buffer and size of a string
object or the default encoded version of a Unicode object. Passing
NULL as *len parameter will force the string buffer to be
0-terminated (passing a string with embedded NULL characters will
cause an exception). */
PyAPI_FUNC(int) PyBytes_AsStringAndSize(
PyObject *obj, /* string or Unicode object */
char **s, /* pointer to buffer variable */
Py_ssize_t *len /* pointer to length variable or NULL
(only possible for 0-terminated
strings) */
);
/* Using the current locale, insert the thousands grouping
into the string pointed to by buffer. For the argument descriptions,
see Objects/stringlib/localeutil.h */
#ifndef Py_LIMITED_API
PyAPI_FUNC(Py_ssize_t) _PyBytes_InsertThousandsGroupingLocale(char *buffer,
Py_ssize_t n_buffer,
char *digits,
Py_ssize_t n_digits,
Py_ssize_t min_width);
/* Using explicit passed-in values, insert the thousands grouping
into the string pointed to by buffer. For the argument descriptions,
see Objects/stringlib/localeutil.h */
PyAPI_FUNC(Py_ssize_t) _PyBytes_InsertThousandsGrouping(char *buffer,
Py_ssize_t n_buffer,
char *digits,
Py_ssize_t n_digits,
Py_ssize_t min_width,
const char *grouping,
const char *thousands_sep);
#endif
/* Flags used by string formatting */
#define F_LJUST (1<<0)
#define F_SIGN (1<<1)
#define F_BLANK (1<<2)
#define F_ALT (1<<3)
#define F_ZERO (1<<4)
#ifndef Py_LIMITED_API
/* The _PyBytesWriter structure is big: it contains an embedded "stack buffer".
A _PyBytesWriter variable must be declared at the end of variables in a
function to optimize the memory allocation on the stack. */
typedef struct {
/* bytes, bytearray or NULL (when the small buffer is used) */
PyObject *buffer;
/* Number of allocated size. */
Py_ssize_t allocated;
/* Minimum number of allocated bytes,
incremented by _PyBytesWriter_Prepare() */
Py_ssize_t min_size;
/* If non-zero, use a bytearray instead of a bytes object for buffer. */
int use_bytearray;
/* If non-zero, overallocate the buffer (default: 0).
This flag must be zero if use_bytearray is non-zero. */
int overallocate;
/* Stack buffer */
int use_small_buffer;
char small_buffer[512];
} _PyBytesWriter;
/* Initialize a bytes writer
By default, the overallocation is disabled. Set the overallocate attribute
to control the allocation of the buffer. */
PyAPI_FUNC(void) _PyBytesWriter_Init(_PyBytesWriter *writer);
/* Get the buffer content and reset the writer.
Return a bytes object, or a bytearray object if use_bytearray is non-zero.
Raise an exception and return NULL on error. */
PyAPI_FUNC(PyObject *) _PyBytesWriter_Finish(_PyBytesWriter *writer,
void *str);
/* Deallocate memory of a writer (clear its internal buffer). */
PyAPI_FUNC(void) _PyBytesWriter_Dealloc(_PyBytesWriter *writer);
/* Allocate the buffer to write size bytes.
Return the pointer to the beginning of buffer data.
Raise an exception and return NULL on error. */
PyAPI_FUNC(void*) _PyBytesWriter_Alloc(_PyBytesWriter *writer,
Py_ssize_t size);
/* Ensure that the buffer is large enough to write *size* bytes.
Add size to the writer minimum size (min_size attribute).
str is the current pointer inside the buffer.
Return the updated current pointer inside the buffer.
Raise an exception and return NULL on error. */
PyAPI_FUNC(void*) _PyBytesWriter_Prepare(_PyBytesWriter *writer,
void *str,
Py_ssize_t size);
/* Resize the buffer to make it larger.
The new buffer may be larger than size bytes because of overallocation.
Return the updated current pointer inside the buffer.
Raise an exception and return NULL on error.
Note: size must be greater than the number of allocated bytes in the writer.
This function doesn't use the writer minimum size (min_size attribute).
See also _PyBytesWriter_Prepare().
*/
PyAPI_FUNC(void*) _PyBytesWriter_Resize(_PyBytesWriter *writer,
void *str,
Py_ssize_t size);
/* Write bytes.
Raise an exception and return NULL on error. */
PyAPI_FUNC(void*) _PyBytesWriter_WriteBytes(_PyBytesWriter *writer,
void *str,
const void *bytes,
Py_ssize_t size);
#endif /* Py_LIMITED_API */
#ifdef __cplusplus
}
#endif
#endif /* !Py_BYTESOBJECT_H */
| 8,493
|
C++
|
.h
| 188
| 37.771277
| 79
| 0.659209
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,483
|
pystrtod.h
|
relativty_Relativty/Relativty_Driver/include/Python/pystrtod.h
|
#ifndef Py_STRTOD_H
#define Py_STRTOD_H
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_FUNC(double) PyOS_string_to_double(const char *str,
char **endptr,
PyObject *overflow_exception);
/* The caller is responsible for calling PyMem_Free to free the buffer
that's is returned. */
PyAPI_FUNC(char *) PyOS_double_to_string(double val,
char format_code,
int precision,
int flags,
int *type);
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) _Py_string_to_number_with_underscores(
const char *str, Py_ssize_t len, const char *what, PyObject *obj, void *arg,
PyObject *(*innerfunc)(const char *, Py_ssize_t, void *));
PyAPI_FUNC(double) _Py_parse_inf_or_nan(const char *p, char **endptr);
#endif
/* PyOS_double_to_string's "flags" parameter can be set to 0 or more of: */
#define Py_DTSF_SIGN 0x01 /* always add the sign */
#define Py_DTSF_ADD_DOT_0 0x02 /* if the result is an integer add ".0" */
#define Py_DTSF_ALT 0x04 /* "alternate" formatting. it's format_code
specific */
/* PyOS_double_to_string's "type", if non-NULL, will be set to one of: */
#define Py_DTST_FINITE 0
#define Py_DTST_INFINITE 1
#define Py_DTST_NAN 2
#ifdef __cplusplus
}
#endif
#endif /* !Py_STRTOD_H */
| 1,483
|
C++
|
.h
| 34
| 33.735294
| 80
| 0.579972
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,484
|
longintrepr.h
|
relativty_Relativty/Relativty_Driver/include/Python/longintrepr.h
|
#ifndef Py_LIMITED_API
#ifndef Py_LONGINTREPR_H
#define Py_LONGINTREPR_H
#ifdef __cplusplus
extern "C" {
#endif
/* This is published for the benefit of "friends" marshal.c and _decimal.c. */
/* Parameters of the integer representation. There are two different
sets of parameters: one set for 30-bit digits, stored in an unsigned 32-bit
integer type, and one set for 15-bit digits with each digit stored in an
unsigned short. The value of PYLONG_BITS_IN_DIGIT, defined either at
configure time or in pyport.h, is used to decide which digit size to use.
Type 'digit' should be able to hold 2*PyLong_BASE-1, and type 'twodigits'
should be an unsigned integer type able to hold all integers up to
PyLong_BASE*PyLong_BASE-1. x_sub assumes that 'digit' is an unsigned type,
and that overflow is handled by taking the result modulo 2**N for some N >
PyLong_SHIFT. The majority of the code doesn't care about the precise
value of PyLong_SHIFT, but there are some notable exceptions:
- long_pow() requires that PyLong_SHIFT be divisible by 5
- PyLong_{As,From}ByteArray require that PyLong_SHIFT be at least 8
- long_hash() requires that PyLong_SHIFT is *strictly* less than the number
of bits in an unsigned long, as do the PyLong <-> long (or unsigned long)
conversion functions
- the Python int <-> size_t/Py_ssize_t conversion functions expect that
PyLong_SHIFT is strictly less than the number of bits in a size_t
- the marshal code currently expects that PyLong_SHIFT is a multiple of 15
- NSMALLNEGINTS and NSMALLPOSINTS should be small enough to fit in a single
digit; with the current values this forces PyLong_SHIFT >= 9
The values 15 and 30 should fit all of the above requirements, on any
platform.
*/
#if PYLONG_BITS_IN_DIGIT == 30
typedef uint32_t digit;
typedef int32_t sdigit; /* signed variant of digit */
typedef uint64_t twodigits;
typedef int64_t stwodigits; /* signed variant of twodigits */
#define PyLong_SHIFT 30
#define _PyLong_DECIMAL_SHIFT 9 /* max(e such that 10**e fits in a digit) */
#define _PyLong_DECIMAL_BASE ((digit)1000000000) /* 10 ** DECIMAL_SHIFT */
#elif PYLONG_BITS_IN_DIGIT == 15
typedef unsigned short digit;
typedef short sdigit; /* signed variant of digit */
typedef unsigned long twodigits;
typedef long stwodigits; /* signed variant of twodigits */
#define PyLong_SHIFT 15
#define _PyLong_DECIMAL_SHIFT 4 /* max(e such that 10**e fits in a digit) */
#define _PyLong_DECIMAL_BASE ((digit)10000) /* 10 ** DECIMAL_SHIFT */
#else
#error "PYLONG_BITS_IN_DIGIT should be 15 or 30"
#endif
#define PyLong_BASE ((digit)1 << PyLong_SHIFT)
#define PyLong_MASK ((digit)(PyLong_BASE - 1))
#if PyLong_SHIFT % 5 != 0
#error "longobject.c requires that PyLong_SHIFT be divisible by 5"
#endif
/* Long integer representation.
The absolute value of a number is equal to
SUM(for i=0 through abs(ob_size)-1) ob_digit[i] * 2**(SHIFT*i)
Negative numbers are represented with ob_size < 0;
zero is represented by ob_size == 0.
In a normalized number, ob_digit[abs(ob_size)-1] (the most significant
digit) is never zero. Also, in all cases, for all valid i,
0 <= ob_digit[i] <= MASK.
The allocation function takes care of allocating extra memory
so that ob_digit[0] ... ob_digit[abs(ob_size)-1] are actually available.
CAUTION: Generic code manipulating subtypes of PyVarObject has to
aware that ints abuse ob_size's sign bit.
*/
struct _longobject {
PyObject_VAR_HEAD
digit ob_digit[1];
};
PyAPI_FUNC(PyLongObject *) _PyLong_New(Py_ssize_t);
/* Return a copy of src. */
PyAPI_FUNC(PyObject *) _PyLong_Copy(PyLongObject *src);
#ifdef __cplusplus
}
#endif
#endif /* !Py_LONGINTREPR_H */
#endif /* Py_LIMITED_API */
| 3,799
|
C++
|
.h
| 80
| 44.7125
| 78
| 0.732703
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,485
|
bytes_methods.h
|
relativty_Relativty/Relativty_Driver/include/Python/bytes_methods.h
|
#ifndef Py_LIMITED_API
#ifndef Py_BYTES_CTYPE_H
#define Py_BYTES_CTYPE_H
/*
* The internal implementation behind PyBytes (bytes) and PyByteArray (bytearray)
* methods of the given names, they operate on ASCII byte strings.
*/
extern PyObject* _Py_bytes_isspace(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_isalpha(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_isalnum(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_isascii(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_isdigit(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_islower(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_isupper(const char *cptr, Py_ssize_t len);
extern PyObject* _Py_bytes_istitle(const char *cptr, Py_ssize_t len);
/* These store their len sized answer in the given preallocated *result arg. */
extern void _Py_bytes_lower(char *result, const char *cptr, Py_ssize_t len);
extern void _Py_bytes_upper(char *result, const char *cptr, Py_ssize_t len);
extern void _Py_bytes_title(char *result, const char *s, Py_ssize_t len);
extern void _Py_bytes_capitalize(char *result, const char *s, Py_ssize_t len);
extern void _Py_bytes_swapcase(char *result, const char *s, Py_ssize_t len);
extern PyObject *_Py_bytes_find(const char *str, Py_ssize_t len, PyObject *args);
extern PyObject *_Py_bytes_index(const char *str, Py_ssize_t len, PyObject *args);
extern PyObject *_Py_bytes_rfind(const char *str, Py_ssize_t len, PyObject *args);
extern PyObject *_Py_bytes_rindex(const char *str, Py_ssize_t len, PyObject *args);
extern PyObject *_Py_bytes_count(const char *str, Py_ssize_t len, PyObject *args);
extern int _Py_bytes_contains(const char *str, Py_ssize_t len, PyObject *arg);
extern PyObject *_Py_bytes_startswith(const char *str, Py_ssize_t len, PyObject *args);
extern PyObject *_Py_bytes_endswith(const char *str, Py_ssize_t len, PyObject *args);
/* The maketrans() static method. */
extern PyObject* _Py_bytes_maketrans(Py_buffer *frm, Py_buffer *to);
/* Shared __doc__ strings. */
extern const char _Py_isspace__doc__[];
extern const char _Py_isalpha__doc__[];
extern const char _Py_isalnum__doc__[];
extern const char _Py_isascii__doc__[];
extern const char _Py_isdigit__doc__[];
extern const char _Py_islower__doc__[];
extern const char _Py_isupper__doc__[];
extern const char _Py_istitle__doc__[];
extern const char _Py_lower__doc__[];
extern const char _Py_upper__doc__[];
extern const char _Py_title__doc__[];
extern const char _Py_capitalize__doc__[];
extern const char _Py_swapcase__doc__[];
extern const char _Py_count__doc__[];
extern const char _Py_find__doc__[];
extern const char _Py_index__doc__[];
extern const char _Py_rfind__doc__[];
extern const char _Py_rindex__doc__[];
extern const char _Py_startswith__doc__[];
extern const char _Py_endswith__doc__[];
extern const char _Py_maketrans__doc__[];
extern const char _Py_expandtabs__doc__[];
extern const char _Py_ljust__doc__[];
extern const char _Py_rjust__doc__[];
extern const char _Py_center__doc__[];
extern const char _Py_zfill__doc__[];
/* this is needed because some docs are shared from the .o, not static */
#define PyDoc_STRVAR_shared(name,str) const char name[] = PyDoc_STR(str)
#endif /* !Py_BYTES_CTYPE_H */
#endif /* !Py_LIMITED_API */
| 3,301
|
C++
|
.h
| 62
| 52.080645
| 87
| 0.725866
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,486
|
pythonrun.h
|
relativty_Relativty/Relativty_Driver/include/Python/pythonrun.h
|
/* Interfaces to parse and execute pieces of python code */
#ifndef Py_PYTHONRUN_H
#define Py_PYTHONRUN_H
#ifdef __cplusplus
extern "C" {
#endif
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) PyRun_SimpleStringFlags(const char *, PyCompilerFlags *);
PyAPI_FUNC(int) PyRun_AnyFileExFlags(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
int closeit,
PyCompilerFlags *flags);
PyAPI_FUNC(int) PyRun_SimpleFileExFlags(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
int closeit,
PyCompilerFlags *flags);
PyAPI_FUNC(int) PyRun_InteractiveOneFlags(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
PyCompilerFlags *flags);
PyAPI_FUNC(int) PyRun_InteractiveOneObject(
FILE *fp,
PyObject *filename,
PyCompilerFlags *flags);
PyAPI_FUNC(int) PyRun_InteractiveLoopFlags(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
PyCompilerFlags *flags);
PyAPI_FUNC(struct _mod *) PyParser_ASTFromString(
const char *s,
const char *filename, /* decoded from the filesystem encoding */
int start,
PyCompilerFlags *flags,
PyArena *arena);
PyAPI_FUNC(struct _mod *) PyParser_ASTFromStringObject(
const char *s,
PyObject *filename,
int start,
PyCompilerFlags *flags,
PyArena *arena);
PyAPI_FUNC(struct _mod *) PyParser_ASTFromFile(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
const char* enc,
int start,
const char *ps1,
const char *ps2,
PyCompilerFlags *flags,
int *errcode,
PyArena *arena);
PyAPI_FUNC(struct _mod *) PyParser_ASTFromFileObject(
FILE *fp,
PyObject *filename,
const char* enc,
int start,
const char *ps1,
const char *ps2,
PyCompilerFlags *flags,
int *errcode,
PyArena *arena);
#endif
#ifndef PyParser_SimpleParseString
#define PyParser_SimpleParseString(S, B) \
PyParser_SimpleParseStringFlags(S, B, 0)
#define PyParser_SimpleParseFile(FP, S, B) \
PyParser_SimpleParseFileFlags(FP, S, B, 0)
#endif
PyAPI_FUNC(struct _node *) PyParser_SimpleParseStringFlags(const char *, int,
int);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
PyAPI_FUNC(struct _node *) PyParser_SimpleParseStringFlagsFilename(const char *,
const char *,
int, int);
#endif
PyAPI_FUNC(struct _node *) PyParser_SimpleParseFileFlags(FILE *, const char *,
int, int);
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) PyRun_StringFlags(const char *, int, PyObject *,
PyObject *, PyCompilerFlags *);
PyAPI_FUNC(PyObject *) PyRun_FileExFlags(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
int start,
PyObject *globals,
PyObject *locals,
int closeit,
PyCompilerFlags *flags);
#endif
#ifdef Py_LIMITED_API
PyAPI_FUNC(PyObject *) Py_CompileString(const char *, const char *, int);
#else
#define Py_CompileString(str, p, s) Py_CompileStringExFlags(str, p, s, NULL, -1)
#define Py_CompileStringFlags(str, p, s, f) Py_CompileStringExFlags(str, p, s, f, -1)
PyAPI_FUNC(PyObject *) Py_CompileStringExFlags(
const char *str,
const char *filename, /* decoded from the filesystem encoding */
int start,
PyCompilerFlags *flags,
int optimize);
PyAPI_FUNC(PyObject *) Py_CompileStringObject(
const char *str,
PyObject *filename, int start,
PyCompilerFlags *flags,
int optimize);
#endif
PyAPI_FUNC(struct symtable *) Py_SymtableString(
const char *str,
const char *filename, /* decoded from the filesystem encoding */
int start);
#ifndef Py_LIMITED_API
PyAPI_FUNC(const char *) _Py_SourceAsString(
PyObject *cmd,
const char *funcname,
const char *what,
PyCompilerFlags *cf,
PyObject **cmd_copy);
PyAPI_FUNC(struct symtable *) Py_SymtableStringObject(
const char *str,
PyObject *filename,
int start);
PyAPI_FUNC(struct symtable *) _Py_SymtableStringObjectFlags(
const char *str,
PyObject *filename,
int start,
PyCompilerFlags *flags);
#endif
PyAPI_FUNC(void) PyErr_Print(void);
PyAPI_FUNC(void) PyErr_PrintEx(int);
PyAPI_FUNC(void) PyErr_Display(PyObject *, PyObject *, PyObject *);
#ifndef Py_LIMITED_API
/* A function flavor is also exported by libpython. It is required when
libpython is accessed directly rather than using header files which defines
macros below. On Windows, for example, PyAPI_FUNC() uses dllexport to
export functions in pythonXX.dll. */
PyAPI_FUNC(PyObject *) PyRun_String(const char *str, int s, PyObject *g, PyObject *l);
PyAPI_FUNC(int) PyRun_AnyFile(FILE *fp, const char *name);
PyAPI_FUNC(int) PyRun_AnyFileEx(FILE *fp, const char *name, int closeit);
PyAPI_FUNC(int) PyRun_AnyFileFlags(FILE *, const char *, PyCompilerFlags *);
PyAPI_FUNC(int) PyRun_SimpleString(const char *s);
PyAPI_FUNC(int) PyRun_SimpleFile(FILE *f, const char *p);
PyAPI_FUNC(int) PyRun_SimpleFileEx(FILE *f, const char *p, int c);
PyAPI_FUNC(int) PyRun_InteractiveOne(FILE *f, const char *p);
PyAPI_FUNC(int) PyRun_InteractiveLoop(FILE *f, const char *p);
PyAPI_FUNC(PyObject *) PyRun_File(FILE *fp, const char *p, int s, PyObject *g, PyObject *l);
PyAPI_FUNC(PyObject *) PyRun_FileEx(FILE *fp, const char *p, int s, PyObject *g, PyObject *l, int c);
PyAPI_FUNC(PyObject *) PyRun_FileFlags(FILE *fp, const char *p, int s, PyObject *g, PyObject *l, PyCompilerFlags *flags);
/* Use macros for a bunch of old variants */
#define PyRun_String(str, s, g, l) PyRun_StringFlags(str, s, g, l, NULL)
#define PyRun_AnyFile(fp, name) PyRun_AnyFileExFlags(fp, name, 0, NULL)
#define PyRun_AnyFileEx(fp, name, closeit) \
PyRun_AnyFileExFlags(fp, name, closeit, NULL)
#define PyRun_AnyFileFlags(fp, name, flags) \
PyRun_AnyFileExFlags(fp, name, 0, flags)
#define PyRun_SimpleString(s) PyRun_SimpleStringFlags(s, NULL)
#define PyRun_SimpleFile(f, p) PyRun_SimpleFileExFlags(f, p, 0, NULL)
#define PyRun_SimpleFileEx(f, p, c) PyRun_SimpleFileExFlags(f, p, c, NULL)
#define PyRun_InteractiveOne(f, p) PyRun_InteractiveOneFlags(f, p, NULL)
#define PyRun_InteractiveLoop(f, p) PyRun_InteractiveLoopFlags(f, p, NULL)
#define PyRun_File(fp, p, s, g, l) \
PyRun_FileExFlags(fp, p, s, g, l, 0, NULL)
#define PyRun_FileEx(fp, p, s, g, l, c) \
PyRun_FileExFlags(fp, p, s, g, l, c, NULL)
#define PyRun_FileFlags(fp, p, s, g, l, flags) \
PyRun_FileExFlags(fp, p, s, g, l, 0, flags)
#endif
/* Stuff with no proper home (yet) */
#ifndef Py_LIMITED_API
PyAPI_FUNC(char *) PyOS_Readline(FILE *, FILE *, const char *);
#endif
PyAPI_DATA(int) (*PyOS_InputHook)(void);
PyAPI_DATA(char) *(*PyOS_ReadlineFunctionPointer)(FILE *, FILE *, const char *);
#ifndef Py_LIMITED_API
PyAPI_DATA(PyThreadState*) _PyOS_ReadlineTState;
#endif
/* Stack size, in "pointers" (so we get extra safety margins
on 64-bit platforms). On a 32-bit platform, this translates
to an 8k margin. */
#define PYOS_STACK_MARGIN 2048
#if defined(WIN32) && !defined(MS_WIN64) && !defined(_M_ARM) && defined(_MSC_VER) && _MSC_VER >= 1300
/* Enable stack checking under Microsoft C */
#define USE_STACKCHECK
#endif
#ifdef USE_STACKCHECK
/* Check that we aren't overflowing our stack */
PyAPI_FUNC(int) PyOS_CheckStack(void);
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_PYTHONRUN_H */
| 7,645
|
C++
|
.h
| 192
| 35.385417
| 121
| 0.693073
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,487
|
Python.h
|
relativty_Relativty/Relativty_Driver/include/Python/Python.h
|
#ifndef Py_PYTHON_H
#define Py_PYTHON_H
/* Since this is a "meta-include" file, no #ifdef __cplusplus / extern "C" { */
/* Include nearly all Python header files */
#include "patchlevel.h"
#include "pyconfig.h"
#include "pymacconfig.h"
#include <limits.h>
#ifndef UCHAR_MAX
#error "Something's broken. UCHAR_MAX should be defined in limits.h."
#endif
#if UCHAR_MAX != 255
#error "Python's source code assumes C's unsigned char is an 8-bit type."
#endif
#if defined(__sgi) && !defined(_SGI_MP_SOURCE)
#define _SGI_MP_SOURCE
#endif
#include <stdio.h>
#ifndef NULL
# error "Python.h requires that stdio.h define NULL."
#endif
#include <string.h>
#ifdef HAVE_ERRNO_H
#include <errno.h>
#endif
#include <stdlib.h>
#ifndef MS_WINDOWS
#include <unistd.h>
#endif
#ifdef HAVE_CRYPT_H
#if defined(HAVE_CRYPT_R) && !defined(_GNU_SOURCE)
/* Required for glibc to expose the crypt_r() function prototype. */
# define _GNU_SOURCE
# define _Py_GNU_SOURCE_FOR_CRYPT
#endif
#include <crypt.h>
#ifdef _Py_GNU_SOURCE_FOR_CRYPT
/* Don't leak the _GNU_SOURCE define to other headers. */
# undef _GNU_SOURCE
# undef _Py_GNU_SOURCE_FOR_CRYPT
#endif
#endif
/* For size_t? */
#ifdef HAVE_STDDEF_H
#include <stddef.h>
#endif
/* CAUTION: Build setups should ensure that NDEBUG is defined on the
* compiler command line when building Python in release mode; else
* assert() calls won't be removed.
*/
#include <assert.h>
#include "pyport.h"
#include "pymacro.h"
/* A convenient way for code to know if clang's memory sanitizer is enabled. */
#if defined(__has_feature)
# if __has_feature(memory_sanitizer)
# if !defined(_Py_MEMORY_SANITIZER)
# define _Py_MEMORY_SANITIZER
# endif
# endif
#endif
/* Debug-mode build with pymalloc implies PYMALLOC_DEBUG.
* PYMALLOC_DEBUG is in error if pymalloc is not in use.
*/
#if defined(Py_DEBUG) && defined(WITH_PYMALLOC) && !defined(PYMALLOC_DEBUG)
#define PYMALLOC_DEBUG
#endif
#if defined(PYMALLOC_DEBUG) && !defined(WITH_PYMALLOC)
#error "PYMALLOC_DEBUG requires WITH_PYMALLOC"
#endif
#include "pymath.h"
#include "pytime.h"
#include "pymem.h"
#include "object.h"
#include "objimpl.h"
#include "typeslots.h"
#include "pyhash.h"
#include "pydebug.h"
#include "bytearrayobject.h"
#include "bytesobject.h"
#include "unicodeobject.h"
#include "longobject.h"
#include "longintrepr.h"
#include "boolobject.h"
#include "floatobject.h"
#include "complexobject.h"
#include "rangeobject.h"
#include "memoryobject.h"
#include "tupleobject.h"
#include "listobject.h"
#include "dictobject.h"
#include "odictobject.h"
#include "enumobject.h"
#include "setobject.h"
#include "methodobject.h"
#include "moduleobject.h"
#include "funcobject.h"
#include "classobject.h"
#include "fileobject.h"
#include "pycapsule.h"
#include "traceback.h"
#include "sliceobject.h"
#include "cellobject.h"
#include "iterobject.h"
#include "genobject.h"
#include "descrobject.h"
#include "warnings.h"
#include "weakrefobject.h"
#include "structseq.h"
#include "namespaceobject.h"
#include "picklebufobject.h"
#include "codecs.h"
#include "pyerrors.h"
#include "cpython/initconfig.h"
#include "pystate.h"
#include "context.h"
#include "pyarena.h"
#include "modsupport.h"
#include "compile.h"
#include "pythonrun.h"
#include "pylifecycle.h"
#include "ceval.h"
#include "sysmodule.h"
#include "osmodule.h"
#include "intrcheck.h"
#include "import.h"
#include "abstract.h"
#include "bltinmodule.h"
#include "eval.h"
#include "pyctype.h"
#include "pystrtod.h"
#include "pystrcmp.h"
#include "dtoa.h"
#include "fileutils.h"
#include "pyfpe.h"
#include "tracemalloc.h"
#endif /* !Py_PYTHON_H */
| 3,615
|
C++
|
.h
| 137
| 25.182482
| 79
| 0.75398
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,488
|
tupleobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/tupleobject.h
|
/* Tuple object interface */
#ifndef Py_TUPLEOBJECT_H
#define Py_TUPLEOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
/*
Another generally useful object type is a tuple of object pointers.
For Python, this is an immutable type. C code can change the tuple items
(but not their number), and even use tuples as general-purpose arrays of
object references, but in general only brand new tuples should be mutated,
not ones that might already have been exposed to Python code.
*** WARNING *** PyTuple_SetItem does not increment the new item's reference
count, but does decrement the reference count of the item it replaces,
if not nil. It does *decrement* the reference count if it is *not*
inserted in the tuple. Similarly, PyTuple_GetItem does not increment the
returned item's reference count.
*/
PyAPI_DATA(PyTypeObject) PyTuple_Type;
PyAPI_DATA(PyTypeObject) PyTupleIter_Type;
#define PyTuple_Check(op) \
PyType_FastSubclass(Py_TYPE(op), Py_TPFLAGS_TUPLE_SUBCLASS)
#define PyTuple_CheckExact(op) (Py_TYPE(op) == &PyTuple_Type)
PyAPI_FUNC(PyObject *) PyTuple_New(Py_ssize_t size);
PyAPI_FUNC(Py_ssize_t) PyTuple_Size(PyObject *);
PyAPI_FUNC(PyObject *) PyTuple_GetItem(PyObject *, Py_ssize_t);
PyAPI_FUNC(int) PyTuple_SetItem(PyObject *, Py_ssize_t, PyObject *);
PyAPI_FUNC(PyObject *) PyTuple_GetSlice(PyObject *, Py_ssize_t, Py_ssize_t);
PyAPI_FUNC(PyObject *) PyTuple_Pack(Py_ssize_t, ...);
PyAPI_FUNC(int) PyTuple_ClearFreeList(void);
#ifndef Py_LIMITED_API
# define Py_CPYTHON_TUPLEOBJECT_H
# include "cpython/tupleobject.h"
# undef Py_CPYTHON_TUPLEOBJECT_H
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_TUPLEOBJECT_H */
| 1,661
|
C++
|
.h
| 39
| 40.923077
| 76
| 0.766894
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,489
|
structmember.h
|
relativty_Relativty/Relativty_Driver/include/Python/structmember.h
|
#ifndef Py_STRUCTMEMBER_H
#define Py_STRUCTMEMBER_H
#ifdef __cplusplus
extern "C" {
#endif
/* Interface to map C struct members to Python object attributes */
#include <stddef.h> /* For offsetof */
/* An array of PyMemberDef structures defines the name, type and offset
of selected members of a C structure. These can be read by
PyMember_GetOne() and set by PyMember_SetOne() (except if their READONLY
flag is set). The array must be terminated with an entry whose name
pointer is NULL. */
typedef struct PyMemberDef {
const char *name;
int type;
Py_ssize_t offset;
int flags;
const char *doc;
} PyMemberDef;
/* Types */
#define T_SHORT 0
#define T_INT 1
#define T_LONG 2
#define T_FLOAT 3
#define T_DOUBLE 4
#define T_STRING 5
#define T_OBJECT 6
/* XXX the ordering here is weird for binary compatibility */
#define T_CHAR 7 /* 1-character string */
#define T_BYTE 8 /* 8-bit signed int */
/* unsigned variants: */
#define T_UBYTE 9
#define T_USHORT 10
#define T_UINT 11
#define T_ULONG 12
/* Added by Jack: strings contained in the structure */
#define T_STRING_INPLACE 13
/* Added by Lillo: bools contained in the structure (assumed char) */
#define T_BOOL 14
#define T_OBJECT_EX 16 /* Like T_OBJECT, but raises AttributeError
when the value is NULL, instead of
converting to None. */
#define T_LONGLONG 17
#define T_ULONGLONG 18
#define T_PYSSIZET 19 /* Py_ssize_t */
#define T_NONE 20 /* Value is always None */
/* Flags */
#define READONLY 1
#define READ_RESTRICTED 2
#define PY_WRITE_RESTRICTED 4
#define RESTRICTED (READ_RESTRICTED | PY_WRITE_RESTRICTED)
/* Current API, use this */
PyAPI_FUNC(PyObject *) PyMember_GetOne(const char *, struct PyMemberDef *);
PyAPI_FUNC(int) PyMember_SetOne(char *, struct PyMemberDef *, PyObject *);
#ifdef __cplusplus
}
#endif
#endif /* !Py_STRUCTMEMBER_H */
| 2,030
|
C++
|
.h
| 58
| 32.241379
| 75
| 0.673824
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,490
|
parsetok.h
|
relativty_Relativty/Relativty_Driver/include/Python/parsetok.h
|
/* Parser-tokenizer link interface */
#ifndef Py_LIMITED_API
#ifndef Py_PARSETOK_H
#define Py_PARSETOK_H
#ifdef __cplusplus
extern "C" {
#endif
#include "grammar.h" /* grammar */
#include "node.h" /* node */
typedef struct {
int error;
PyObject *filename;
int lineno;
int offset;
char *text; /* UTF-8-encoded string */
int token;
int expected;
} perrdetail;
#if 0
#define PyPARSE_YIELD_IS_KEYWORD 0x0001
#endif
#define PyPARSE_DONT_IMPLY_DEDENT 0x0002
#if 0
#define PyPARSE_WITH_IS_KEYWORD 0x0003
#define PyPARSE_PRINT_IS_FUNCTION 0x0004
#define PyPARSE_UNICODE_LITERALS 0x0008
#endif
#define PyPARSE_IGNORE_COOKIE 0x0010
#define PyPARSE_BARRY_AS_BDFL 0x0020
#define PyPARSE_TYPE_COMMENTS 0x0040
#define PyPARSE_ASYNC_HACKS 0x0080
PyAPI_FUNC(node *) PyParser_ParseString(const char *, grammar *, int,
perrdetail *);
PyAPI_FUNC(node *) PyParser_ParseFile (FILE *, const char *, grammar *, int,
const char *, const char *,
perrdetail *);
PyAPI_FUNC(node *) PyParser_ParseStringFlags(const char *, grammar *, int,
perrdetail *, int);
PyAPI_FUNC(node *) PyParser_ParseFileFlags(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
const char *enc,
grammar *g,
int start,
const char *ps1,
const char *ps2,
perrdetail *err_ret,
int flags);
PyAPI_FUNC(node *) PyParser_ParseFileFlagsEx(
FILE *fp,
const char *filename, /* decoded from the filesystem encoding */
const char *enc,
grammar *g,
int start,
const char *ps1,
const char *ps2,
perrdetail *err_ret,
int *flags);
PyAPI_FUNC(node *) PyParser_ParseFileObject(
FILE *fp,
PyObject *filename,
const char *enc,
grammar *g,
int start,
const char *ps1,
const char *ps2,
perrdetail *err_ret,
int *flags);
PyAPI_FUNC(node *) PyParser_ParseStringFlagsFilename(
const char *s,
const char *filename, /* decoded from the filesystem encoding */
grammar *g,
int start,
perrdetail *err_ret,
int flags);
PyAPI_FUNC(node *) PyParser_ParseStringFlagsFilenameEx(
const char *s,
const char *filename, /* decoded from the filesystem encoding */
grammar *g,
int start,
perrdetail *err_ret,
int *flags);
PyAPI_FUNC(node *) PyParser_ParseStringObject(
const char *s,
PyObject *filename,
grammar *g,
int start,
perrdetail *err_ret,
int *flags);
/* Note that the following functions are defined in pythonrun.c,
not in parsetok.c */
PyAPI_FUNC(void) PyParser_SetError(perrdetail *);
PyAPI_FUNC(void) PyParser_ClearError(perrdetail *);
#ifdef __cplusplus
}
#endif
#endif /* !Py_PARSETOK_H */
#endif /* !Py_LIMITED_API */
| 2,958
|
C++
|
.h
| 98
| 25.05102
| 76
| 0.641503
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,491
|
ast.h
|
relativty_Relativty/Relativty_Driver/include/Python/ast.h
|
#ifndef Py_AST_H
#define Py_AST_H
#ifdef __cplusplus
extern "C" {
#endif
#include "Python-ast.h" /* mod_ty */
#include "node.h" /* node */
PyAPI_FUNC(int) PyAST_Validate(mod_ty);
PyAPI_FUNC(mod_ty) PyAST_FromNode(
const node *n,
PyCompilerFlags *flags,
const char *filename, /* decoded from the filesystem encoding */
PyArena *arena);
PyAPI_FUNC(mod_ty) PyAST_FromNodeObject(
const node *n,
PyCompilerFlags *flags,
PyObject *filename,
PyArena *arena);
#ifndef Py_LIMITED_API
/* _PyAST_ExprAsUnicode is defined in ast_unparse.c */
PyAPI_FUNC(PyObject *) _PyAST_ExprAsUnicode(expr_ty);
/* Return the borrowed reference to the first literal string in the
sequence of statemnts or NULL if it doesn't start from a literal string.
Doesn't set exception. */
PyAPI_FUNC(PyObject *) _PyAST_GetDocString(asdl_seq *);
#endif /* !Py_LIMITED_API */
#ifdef __cplusplus
}
#endif
#endif /* !Py_AST_H */
| 948
|
C++
|
.h
| 30
| 29.1
| 75
| 0.706915
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,492
|
unicodeobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/unicodeobject.h
|
#ifndef Py_UNICODEOBJECT_H
#define Py_UNICODEOBJECT_H
#include <stdarg.h>
/*
Unicode implementation based on original code by Fredrik Lundh,
modified by Marc-Andre Lemburg (mal@lemburg.com) according to the
Unicode Integration Proposal. (See
http://www.egenix.com/files/python/unicode-proposal.txt).
Copyright (c) Corporation for National Research Initiatives.
Original header:
--------------------------------------------------------------------
* Yet another Unicode string type for Python. This type supports the
* 16-bit Basic Multilingual Plane (BMP) only.
*
* Written by Fredrik Lundh, January 1999.
*
* Copyright (c) 1999 by Secret Labs AB.
* Copyright (c) 1999 by Fredrik Lundh.
*
* fredrik@pythonware.com
* http://www.pythonware.com
*
* --------------------------------------------------------------------
* This Unicode String Type is
*
* Copyright (c) 1999 by Secret Labs AB
* Copyright (c) 1999 by Fredrik Lundh
*
* By obtaining, using, and/or copying this software and/or its
* associated documentation, you agree that you have read, understood,
* and will comply with the following terms and conditions:
*
* Permission to use, copy, modify, and distribute this software and its
* associated documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice appears in all
* copies, and that both that copyright notice and this permission notice
* appear in supporting documentation, and that the name of Secret Labs
* AB or the author not be used in advertising or publicity pertaining to
* distribution of the software without specific, written prior
* permission.
*
* SECRET LABS AB AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO
* THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS. IN NO EVENT SHALL SECRET LABS AB OR THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
* -------------------------------------------------------------------- */
#include <ctype.h>
/* === Internal API ======================================================= */
/* --- Internal Unicode Format -------------------------------------------- */
/* Python 3.x requires unicode */
#define Py_USING_UNICODE
#ifndef SIZEOF_WCHAR_T
#error Must define SIZEOF_WCHAR_T
#endif
#define Py_UNICODE_SIZE SIZEOF_WCHAR_T
/* If wchar_t can be used for UCS-4 storage, set Py_UNICODE_WIDE.
Otherwise, Unicode strings are stored as UCS-2 (with limited support
for UTF-16) */
#if Py_UNICODE_SIZE >= 4
#define Py_UNICODE_WIDE
#endif
/* Set these flags if the platform has "wchar.h" and the
wchar_t type is a 16-bit unsigned type */
/* #define HAVE_WCHAR_H */
/* #define HAVE_USABLE_WCHAR_T */
/* If the compiler provides a wchar_t type we try to support it
through the interface functions PyUnicode_FromWideChar(),
PyUnicode_AsWideChar() and PyUnicode_AsWideCharString(). */
#ifdef HAVE_USABLE_WCHAR_T
# ifndef HAVE_WCHAR_H
# define HAVE_WCHAR_H
# endif
#endif
#ifdef HAVE_WCHAR_H
# include <wchar.h>
#endif
/* Py_UCS4 and Py_UCS2 are typedefs for the respective
unicode representations. */
typedef uint32_t Py_UCS4;
typedef uint16_t Py_UCS2;
typedef uint8_t Py_UCS1;
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_DATA(PyTypeObject) PyUnicode_Type;
PyAPI_DATA(PyTypeObject) PyUnicodeIter_Type;
#define PyUnicode_Check(op) \
PyType_FastSubclass(Py_TYPE(op), Py_TPFLAGS_UNICODE_SUBCLASS)
#define PyUnicode_CheckExact(op) (Py_TYPE(op) == &PyUnicode_Type)
/* --- Constants ---------------------------------------------------------- */
/* This Unicode character will be used as replacement character during
decoding if the errors argument is set to "replace". Note: the
Unicode character U+FFFD is the official REPLACEMENT CHARACTER in
Unicode 3.0. */
#define Py_UNICODE_REPLACEMENT_CHARACTER ((Py_UCS4) 0xFFFD)
/* === Public API ========================================================= */
/* Similar to PyUnicode_FromUnicode(), but u points to UTF-8 encoded bytes */
PyAPI_FUNC(PyObject*) PyUnicode_FromStringAndSize(
const char *u, /* UTF-8 encoded string */
Py_ssize_t size /* size of buffer */
);
/* Similar to PyUnicode_FromUnicode(), but u points to null-terminated
UTF-8 encoded bytes. The size is determined with strlen(). */
PyAPI_FUNC(PyObject*) PyUnicode_FromString(
const char *u /* UTF-8 encoded string */
);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
PyAPI_FUNC(PyObject*) PyUnicode_Substring(
PyObject *str,
Py_ssize_t start,
Py_ssize_t end);
#endif
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
/* Copy the string into a UCS4 buffer including the null character if copy_null
is set. Return NULL and raise an exception on error. Raise a SystemError if
the buffer is smaller than the string. Return buffer on success.
buflen is the length of the buffer in (Py_UCS4) characters. */
PyAPI_FUNC(Py_UCS4*) PyUnicode_AsUCS4(
PyObject *unicode,
Py_UCS4* buffer,
Py_ssize_t buflen,
int copy_null);
/* Copy the string into a UCS4 buffer. A new buffer is allocated using
* PyMem_Malloc; if this fails, NULL is returned with a memory error
exception set. */
PyAPI_FUNC(Py_UCS4*) PyUnicode_AsUCS4Copy(PyObject *unicode);
#endif
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
/* Get the length of the Unicode object. */
PyAPI_FUNC(Py_ssize_t) PyUnicode_GetLength(
PyObject *unicode
);
#endif
/* Get the number of Py_UNICODE units in the
string representation. */
Py_DEPRECATED(3.3) PyAPI_FUNC(Py_ssize_t) PyUnicode_GetSize(
PyObject *unicode /* Unicode object */
);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
/* Read a character from the string. */
PyAPI_FUNC(Py_UCS4) PyUnicode_ReadChar(
PyObject *unicode,
Py_ssize_t index
);
/* Write a character to the string. The string must have been created through
PyUnicode_New, must not be shared, and must not have been hashed yet.
Return 0 on success, -1 on error. */
PyAPI_FUNC(int) PyUnicode_WriteChar(
PyObject *unicode,
Py_ssize_t index,
Py_UCS4 character
);
#endif
/* Resize a Unicode object. The length is the number of characters, except
if the kind of the string is PyUnicode_WCHAR_KIND: in this case, the length
is the number of Py_UNICODE characters.
*unicode is modified to point to the new (resized) object and 0
returned on success.
Try to resize the string in place (which is usually faster than allocating
a new string and copy characters), or create a new string.
Error handling is implemented as follows: an exception is set, -1
is returned and *unicode left untouched.
WARNING: The function doesn't check string content, the result may not be a
string in canonical representation. */
PyAPI_FUNC(int) PyUnicode_Resize(
PyObject **unicode, /* Pointer to the Unicode object */
Py_ssize_t length /* New length */
);
/* Decode obj to a Unicode object.
bytes, bytearray and other bytes-like objects are decoded according to the
given encoding and error handler. The encoding and error handler can be
NULL to have the interface use UTF-8 and "strict".
All other objects (including Unicode objects) raise an exception.
The API returns NULL in case of an error. The caller is responsible
for decref'ing the returned objects.
*/
PyAPI_FUNC(PyObject*) PyUnicode_FromEncodedObject(
PyObject *obj, /* Object */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Copy an instance of a Unicode subtype to a new true Unicode object if
necessary. If obj is already a true Unicode object (not a subtype), return
the reference with *incremented* refcount.
The API returns NULL in case of an error. The caller is responsible
for decref'ing the returned objects.
*/
PyAPI_FUNC(PyObject*) PyUnicode_FromObject(
PyObject *obj /* Object */
);
PyAPI_FUNC(PyObject *) PyUnicode_FromFormatV(
const char *format, /* ASCII-encoded string */
va_list vargs
);
PyAPI_FUNC(PyObject *) PyUnicode_FromFormat(
const char *format, /* ASCII-encoded string */
...
);
PyAPI_FUNC(void) PyUnicode_InternInPlace(PyObject **);
PyAPI_FUNC(void) PyUnicode_InternImmortal(PyObject **);
PyAPI_FUNC(PyObject *) PyUnicode_InternFromString(
const char *u /* UTF-8 encoded string */
);
/* Use only if you know it's a string */
#define PyUnicode_CHECK_INTERNED(op) \
(((PyASCIIObject *)(op))->state.interned)
/* --- wchar_t support for platforms which support it --------------------- */
#ifdef HAVE_WCHAR_H
/* Create a Unicode Object from the wchar_t buffer w of the given
size.
The buffer is copied into the new object. */
PyAPI_FUNC(PyObject*) PyUnicode_FromWideChar(
const wchar_t *w, /* wchar_t buffer */
Py_ssize_t size /* size of buffer */
);
/* Copies the Unicode Object contents into the wchar_t buffer w. At
most size wchar_t characters are copied.
Note that the resulting wchar_t string may or may not be
0-terminated. It is the responsibility of the caller to make sure
that the wchar_t string is 0-terminated in case this is required by
the application.
Returns the number of wchar_t characters copied (excluding a
possibly trailing 0-termination character) or -1 in case of an
error. */
PyAPI_FUNC(Py_ssize_t) PyUnicode_AsWideChar(
PyObject *unicode, /* Unicode object */
wchar_t *w, /* wchar_t buffer */
Py_ssize_t size /* size of buffer */
);
/* Convert the Unicode object to a wide character string. The output string
always ends with a nul character. If size is not NULL, write the number of
wide characters (excluding the null character) into *size.
Returns a buffer allocated by PyMem_Malloc() (use PyMem_Free() to free it)
on success. On error, returns NULL, *size is undefined and raises a
MemoryError. */
PyAPI_FUNC(wchar_t*) PyUnicode_AsWideCharString(
PyObject *unicode, /* Unicode object */
Py_ssize_t *size /* number of characters of the result */
);
#endif
/* --- Unicode ordinals --------------------------------------------------- */
/* Create a Unicode Object from the given Unicode code point ordinal.
The ordinal must be in range(0x110000). A ValueError is
raised in case it is not.
*/
PyAPI_FUNC(PyObject*) PyUnicode_FromOrdinal(int ordinal);
/* --- Free-list management ----------------------------------------------- */
/* Clear the free list used by the Unicode implementation.
This can be used to release memory used for objects on the free
list back to the Python memory allocator.
*/
PyAPI_FUNC(int) PyUnicode_ClearFreeList(void);
/* === Builtin Codecs =====================================================
Many of these APIs take two arguments encoding and errors. These
parameters encoding and errors have the same semantics as the ones
of the builtin str() API.
Setting encoding to NULL causes the default encoding (UTF-8) to be used.
Error handling is set by errors which may also be set to NULL
meaning to use the default handling defined for the codec. Default
error handling for all builtin codecs is "strict" (ValueErrors are
raised).
The codecs all use a similar interface. Only deviation from the
generic ones are documented.
*/
/* --- Manage the default encoding ---------------------------------------- */
/* Returns "utf-8". */
PyAPI_FUNC(const char*) PyUnicode_GetDefaultEncoding(void);
/* --- Generic Codecs ----------------------------------------------------- */
/* Create a Unicode object by decoding the encoded string s of the
given size. */
PyAPI_FUNC(PyObject*) PyUnicode_Decode(
const char *s, /* encoded string */
Py_ssize_t size, /* size of buffer */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Decode a Unicode object unicode and return the result as Python
object.
This API is DEPRECATED. The only supported standard encoding is rot13.
Use PyCodec_Decode() to decode with rot13 and non-standard codecs
that decode from str. */
Py_DEPRECATED(3.6) PyAPI_FUNC(PyObject*) PyUnicode_AsDecodedObject(
PyObject *unicode, /* Unicode object */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Decode a Unicode object unicode and return the result as Unicode
object.
This API is DEPRECATED. The only supported standard encoding is rot13.
Use PyCodec_Decode() to decode with rot13 and non-standard codecs
that decode from str to str. */
Py_DEPRECATED(3.6) PyAPI_FUNC(PyObject*) PyUnicode_AsDecodedUnicode(
PyObject *unicode, /* Unicode object */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Encodes a Unicode object and returns the result as Python
object.
This API is DEPRECATED. It is superseded by PyUnicode_AsEncodedString()
since all standard encodings (except rot13) encode str to bytes.
Use PyCodec_Encode() for encoding with rot13 and non-standard codecs
that encode form str to non-bytes. */
Py_DEPRECATED(3.6) PyAPI_FUNC(PyObject*) PyUnicode_AsEncodedObject(
PyObject *unicode, /* Unicode object */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Encodes a Unicode object and returns the result as Python string
object. */
PyAPI_FUNC(PyObject*) PyUnicode_AsEncodedString(
PyObject *unicode, /* Unicode object */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Encodes a Unicode object and returns the result as Unicode
object.
This API is DEPRECATED. The only supported standard encodings is rot13.
Use PyCodec_Encode() to encode with rot13 and non-standard codecs
that encode from str to str. */
Py_DEPRECATED(3.6) PyAPI_FUNC(PyObject*) PyUnicode_AsEncodedUnicode(
PyObject *unicode, /* Unicode object */
const char *encoding, /* encoding */
const char *errors /* error handling */
);
/* Build an encoding map. */
PyAPI_FUNC(PyObject*) PyUnicode_BuildEncodingMap(
PyObject* string /* 256 character map */
);
/* --- UTF-7 Codecs ------------------------------------------------------- */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF7(
const char *string, /* UTF-7 encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF7Stateful(
const char *string, /* UTF-7 encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
Py_ssize_t *consumed /* bytes consumed */
);
/* --- UTF-8 Codecs ------------------------------------------------------- */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF8(
const char *string, /* UTF-8 encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF8Stateful(
const char *string, /* UTF-8 encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
Py_ssize_t *consumed /* bytes consumed */
);
PyAPI_FUNC(PyObject*) PyUnicode_AsUTF8String(
PyObject *unicode /* Unicode object */
);
/* --- UTF-32 Codecs ------------------------------------------------------ */
/* Decodes length bytes from a UTF-32 encoded buffer string and returns
the corresponding Unicode object.
errors (if non-NULL) defines the error handling. It defaults
to "strict".
If byteorder is non-NULL, the decoder starts decoding using the
given byte order:
*byteorder == -1: little endian
*byteorder == 0: native order
*byteorder == 1: big endian
In native mode, the first four bytes of the stream are checked for a
BOM mark. If found, the BOM mark is analysed, the byte order
adjusted and the BOM skipped. In the other modes, no BOM mark
interpretation is done. After completion, *byteorder is set to the
current byte order at the end of input data.
If byteorder is NULL, the codec starts in native order mode.
*/
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF32(
const char *string, /* UTF-32 encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
int *byteorder /* pointer to byteorder to use
0=native;-1=LE,1=BE; updated on
exit */
);
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF32Stateful(
const char *string, /* UTF-32 encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
int *byteorder, /* pointer to byteorder to use
0=native;-1=LE,1=BE; updated on
exit */
Py_ssize_t *consumed /* bytes consumed */
);
/* Returns a Python string using the UTF-32 encoding in native byte
order. The string always starts with a BOM mark. */
PyAPI_FUNC(PyObject*) PyUnicode_AsUTF32String(
PyObject *unicode /* Unicode object */
);
/* Returns a Python string object holding the UTF-32 encoded value of
the Unicode data.
If byteorder is not 0, output is written according to the following
byte order:
byteorder == -1: little endian
byteorder == 0: native byte order (writes a BOM mark)
byteorder == 1: big endian
If byteorder is 0, the output string will always start with the
Unicode BOM mark (U+FEFF). In the other two modes, no BOM mark is
prepended.
*/
/* --- UTF-16 Codecs ------------------------------------------------------ */
/* Decodes length bytes from a UTF-16 encoded buffer string and returns
the corresponding Unicode object.
errors (if non-NULL) defines the error handling. It defaults
to "strict".
If byteorder is non-NULL, the decoder starts decoding using the
given byte order:
*byteorder == -1: little endian
*byteorder == 0: native order
*byteorder == 1: big endian
In native mode, the first two bytes of the stream are checked for a
BOM mark. If found, the BOM mark is analysed, the byte order
adjusted and the BOM skipped. In the other modes, no BOM mark
interpretation is done. After completion, *byteorder is set to the
current byte order at the end of input data.
If byteorder is NULL, the codec starts in native order mode.
*/
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF16(
const char *string, /* UTF-16 encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
int *byteorder /* pointer to byteorder to use
0=native;-1=LE,1=BE; updated on
exit */
);
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUTF16Stateful(
const char *string, /* UTF-16 encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
int *byteorder, /* pointer to byteorder to use
0=native;-1=LE,1=BE; updated on
exit */
Py_ssize_t *consumed /* bytes consumed */
);
/* Returns a Python string using the UTF-16 encoding in native byte
order. The string always starts with a BOM mark. */
PyAPI_FUNC(PyObject*) PyUnicode_AsUTF16String(
PyObject *unicode /* Unicode object */
);
/* --- Unicode-Escape Codecs ---------------------------------------------- */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeUnicodeEscape(
const char *string, /* Unicode-Escape encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_AsUnicodeEscapeString(
PyObject *unicode /* Unicode object */
);
/* --- Raw-Unicode-Escape Codecs ------------------------------------------ */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeRawUnicodeEscape(
const char *string, /* Raw-Unicode-Escape encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_AsRawUnicodeEscapeString(
PyObject *unicode /* Unicode object */
);
/* --- Latin-1 Codecs -----------------------------------------------------
Note: Latin-1 corresponds to the first 256 Unicode ordinals. */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeLatin1(
const char *string, /* Latin-1 encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_AsLatin1String(
PyObject *unicode /* Unicode object */
);
/* --- ASCII Codecs -------------------------------------------------------
Only 7-bit ASCII data is excepted. All other codes generate errors.
*/
PyAPI_FUNC(PyObject*) PyUnicode_DecodeASCII(
const char *string, /* ASCII encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_AsASCIIString(
PyObject *unicode /* Unicode object */
);
/* --- Character Map Codecs -----------------------------------------------
This codec uses mappings to encode and decode characters.
Decoding mappings must map byte ordinals (integers in the range from 0 to
255) to Unicode strings, integers (which are then interpreted as Unicode
ordinals) or None. Unmapped data bytes (ones which cause a LookupError)
as well as mapped to None, 0xFFFE or '\ufffe' are treated as "undefined
mapping" and cause an error.
Encoding mappings must map Unicode ordinal integers to bytes objects,
integers in the range from 0 to 255 or None. Unmapped character
ordinals (ones which cause a LookupError) as well as mapped to
None are treated as "undefined mapping" and cause an error.
*/
PyAPI_FUNC(PyObject*) PyUnicode_DecodeCharmap(
const char *string, /* Encoded string */
Py_ssize_t length, /* size of string */
PyObject *mapping, /* decoding mapping */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_AsCharmapString(
PyObject *unicode, /* Unicode object */
PyObject *mapping /* encoding mapping */
);
/* --- MBCS codecs for Windows -------------------------------------------- */
#ifdef MS_WINDOWS
PyAPI_FUNC(PyObject*) PyUnicode_DecodeMBCS(
const char *string, /* MBCS encoded string */
Py_ssize_t length, /* size of string */
const char *errors /* error handling */
);
PyAPI_FUNC(PyObject*) PyUnicode_DecodeMBCSStateful(
const char *string, /* MBCS encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
Py_ssize_t *consumed /* bytes consumed */
);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
PyAPI_FUNC(PyObject*) PyUnicode_DecodeCodePageStateful(
int code_page, /* code page number */
const char *string, /* encoded string */
Py_ssize_t length, /* size of string */
const char *errors, /* error handling */
Py_ssize_t *consumed /* bytes consumed */
);
#endif
PyAPI_FUNC(PyObject*) PyUnicode_AsMBCSString(
PyObject *unicode /* Unicode object */
);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
PyAPI_FUNC(PyObject*) PyUnicode_EncodeCodePage(
int code_page, /* code page number */
PyObject *unicode, /* Unicode object */
const char *errors /* error handling */
);
#endif
#endif /* MS_WINDOWS */
/* --- Locale encoding --------------------------------------------------- */
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
/* Decode a string from the current locale encoding. The decoder is strict if
*surrogateescape* is equal to zero, otherwise it uses the 'surrogateescape'
error handler (PEP 383) to escape undecodable bytes. If a byte sequence can
be decoded as a surrogate character and *surrogateescape* is not equal to
zero, the byte sequence is escaped using the 'surrogateescape' error handler
instead of being decoded. *str* must end with a null character but cannot
contain embedded null characters. */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeLocaleAndSize(
const char *str,
Py_ssize_t len,
const char *errors);
/* Similar to PyUnicode_DecodeLocaleAndSize(), but compute the string
length using strlen(). */
PyAPI_FUNC(PyObject*) PyUnicode_DecodeLocale(
const char *str,
const char *errors);
/* Encode a Unicode object to the current locale encoding. The encoder is
strict is *surrogateescape* is equal to zero, otherwise the
"surrogateescape" error handler is used. Return a bytes object. The string
cannot contain embedded null characters. */
PyAPI_FUNC(PyObject*) PyUnicode_EncodeLocale(
PyObject *unicode,
const char *errors
);
#endif
/* --- File system encoding ---------------------------------------------- */
/* ParseTuple converter: encode str objects to bytes using
PyUnicode_EncodeFSDefault(); bytes objects are output as-is. */
PyAPI_FUNC(int) PyUnicode_FSConverter(PyObject*, void*);
/* ParseTuple converter: decode bytes objects to unicode using
PyUnicode_DecodeFSDefaultAndSize(); str objects are output as-is. */
PyAPI_FUNC(int) PyUnicode_FSDecoder(PyObject*, void*);
/* Decode a null-terminated string using Py_FileSystemDefaultEncoding
and the "surrogateescape" error handler.
If Py_FileSystemDefaultEncoding is not set, fall back to the locale
encoding.
Use PyUnicode_DecodeFSDefaultAndSize() if the string length is known.
*/
PyAPI_FUNC(PyObject*) PyUnicode_DecodeFSDefault(
const char *s /* encoded string */
);
/* Decode a string using Py_FileSystemDefaultEncoding
and the "surrogateescape" error handler.
If Py_FileSystemDefaultEncoding is not set, fall back to the locale
encoding.
*/
PyAPI_FUNC(PyObject*) PyUnicode_DecodeFSDefaultAndSize(
const char *s, /* encoded string */
Py_ssize_t size /* size */
);
/* Encode a Unicode object to Py_FileSystemDefaultEncoding with the
"surrogateescape" error handler, and return bytes.
If Py_FileSystemDefaultEncoding is not set, fall back to the locale
encoding.
*/
PyAPI_FUNC(PyObject*) PyUnicode_EncodeFSDefault(
PyObject *unicode
);
/* --- Methods & Slots ----------------------------------------------------
These are capable of handling Unicode objects and strings on input
(we refer to them as strings in the descriptions) and return
Unicode objects or integers as appropriate. */
/* Concat two strings giving a new Unicode string. */
PyAPI_FUNC(PyObject*) PyUnicode_Concat(
PyObject *left, /* Left string */
PyObject *right /* Right string */
);
/* Concat two strings and put the result in *pleft
(sets *pleft to NULL on error) */
PyAPI_FUNC(void) PyUnicode_Append(
PyObject **pleft, /* Pointer to left string */
PyObject *right /* Right string */
);
/* Concat two strings, put the result in *pleft and drop the right object
(sets *pleft to NULL on error) */
PyAPI_FUNC(void) PyUnicode_AppendAndDel(
PyObject **pleft, /* Pointer to left string */
PyObject *right /* Right string */
);
/* Split a string giving a list of Unicode strings.
If sep is NULL, splitting will be done at all whitespace
substrings. Otherwise, splits occur at the given separator.
At most maxsplit splits will be done. If negative, no limit is set.
Separators are not included in the resulting list.
*/
PyAPI_FUNC(PyObject*) PyUnicode_Split(
PyObject *s, /* String to split */
PyObject *sep, /* String separator */
Py_ssize_t maxsplit /* Maxsplit count */
);
/* Dito, but split at line breaks.
CRLF is considered to be one line break. Line breaks are not
included in the resulting list. */
PyAPI_FUNC(PyObject*) PyUnicode_Splitlines(
PyObject *s, /* String to split */
int keepends /* If true, line end markers are included */
);
/* Partition a string using a given separator. */
PyAPI_FUNC(PyObject*) PyUnicode_Partition(
PyObject *s, /* String to partition */
PyObject *sep /* String separator */
);
/* Partition a string using a given separator, searching from the end of the
string. */
PyAPI_FUNC(PyObject*) PyUnicode_RPartition(
PyObject *s, /* String to partition */
PyObject *sep /* String separator */
);
/* Split a string giving a list of Unicode strings.
If sep is NULL, splitting will be done at all whitespace
substrings. Otherwise, splits occur at the given separator.
At most maxsplit splits will be done. But unlike PyUnicode_Split
PyUnicode_RSplit splits from the end of the string. If negative,
no limit is set.
Separators are not included in the resulting list.
*/
PyAPI_FUNC(PyObject*) PyUnicode_RSplit(
PyObject *s, /* String to split */
PyObject *sep, /* String separator */
Py_ssize_t maxsplit /* Maxsplit count */
);
/* Translate a string by applying a character mapping table to it and
return the resulting Unicode object.
The mapping table must map Unicode ordinal integers to Unicode strings,
Unicode ordinal integers or None (causing deletion of the character).
Mapping tables may be dictionaries or sequences. Unmapped character
ordinals (ones which cause a LookupError) are left untouched and
are copied as-is.
*/
PyAPI_FUNC(PyObject *) PyUnicode_Translate(
PyObject *str, /* String */
PyObject *table, /* Translate table */
const char *errors /* error handling */
);
/* Join a sequence of strings using the given separator and return
the resulting Unicode string. */
PyAPI_FUNC(PyObject*) PyUnicode_Join(
PyObject *separator, /* Separator string */
PyObject *seq /* Sequence object */
);
/* Return 1 if substr matches str[start:end] at the given tail end, 0
otherwise. */
PyAPI_FUNC(Py_ssize_t) PyUnicode_Tailmatch(
PyObject *str, /* String */
PyObject *substr, /* Prefix or Suffix string */
Py_ssize_t start, /* Start index */
Py_ssize_t end, /* Stop index */
int direction /* Tail end: -1 prefix, +1 suffix */
);
/* Return the first position of substr in str[start:end] using the
given search direction or -1 if not found. -2 is returned in case
an error occurred and an exception is set. */
PyAPI_FUNC(Py_ssize_t) PyUnicode_Find(
PyObject *str, /* String */
PyObject *substr, /* Substring to find */
Py_ssize_t start, /* Start index */
Py_ssize_t end, /* Stop index */
int direction /* Find direction: +1 forward, -1 backward */
);
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
/* Like PyUnicode_Find, but search for single character only. */
PyAPI_FUNC(Py_ssize_t) PyUnicode_FindChar(
PyObject *str,
Py_UCS4 ch,
Py_ssize_t start,
Py_ssize_t end,
int direction
);
#endif
/* Count the number of occurrences of substr in str[start:end]. */
PyAPI_FUNC(Py_ssize_t) PyUnicode_Count(
PyObject *str, /* String */
PyObject *substr, /* Substring to count */
Py_ssize_t start, /* Start index */
Py_ssize_t end /* Stop index */
);
/* Replace at most maxcount occurrences of substr in str with replstr
and return the resulting Unicode object. */
PyAPI_FUNC(PyObject *) PyUnicode_Replace(
PyObject *str, /* String */
PyObject *substr, /* Substring to find */
PyObject *replstr, /* Substring to replace */
Py_ssize_t maxcount /* Max. number of replacements to apply;
-1 = all */
);
/* Compare two strings and return -1, 0, 1 for less than, equal,
greater than resp.
Raise an exception and return -1 on error. */
PyAPI_FUNC(int) PyUnicode_Compare(
PyObject *left, /* Left string */
PyObject *right /* Right string */
);
/* Compare a Unicode object with C string and return -1, 0, 1 for less than,
equal, and greater than, respectively. It is best to pass only
ASCII-encoded strings, but the function interprets the input string as
ISO-8859-1 if it contains non-ASCII characters.
This function does not raise exceptions. */
PyAPI_FUNC(int) PyUnicode_CompareWithASCIIString(
PyObject *left,
const char *right /* ASCII-encoded string */
);
/* Rich compare two strings and return one of the following:
- NULL in case an exception was raised
- Py_True or Py_False for successful comparisons
- Py_NotImplemented in case the type combination is unknown
Possible values for op:
Py_GT, Py_GE, Py_EQ, Py_NE, Py_LT, Py_LE
*/
PyAPI_FUNC(PyObject *) PyUnicode_RichCompare(
PyObject *left, /* Left string */
PyObject *right, /* Right string */
int op /* Operation: Py_EQ, Py_NE, Py_GT, etc. */
);
/* Apply an argument tuple or dictionary to a format string and return
the resulting Unicode string. */
PyAPI_FUNC(PyObject *) PyUnicode_Format(
PyObject *format, /* Format string */
PyObject *args /* Argument tuple or dictionary */
);
/* Checks whether element is contained in container and return 1/0
accordingly.
element has to coerce to a one element Unicode string. -1 is
returned in case of an error. */
PyAPI_FUNC(int) PyUnicode_Contains(
PyObject *container, /* Container string */
PyObject *element /* Element string */
);
/* Checks whether argument is a valid identifier. */
PyAPI_FUNC(int) PyUnicode_IsIdentifier(PyObject *s);
/* === Characters Type APIs =============================================== */
#ifndef Py_LIMITED_API
# define Py_CPYTHON_UNICODEOBJECT_H
# include "cpython/unicodeobject.h"
# undef Py_CPYTHON_UNICODEOBJECT_H
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_UNICODEOBJECT_H */
| 35,732
|
C++
|
.h
| 782
| 41.714834
| 79
| 0.651609
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,493
|
boolobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/boolobject.h
|
/* Boolean object interface */
#ifndef Py_BOOLOBJECT_H
#define Py_BOOLOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
PyAPI_DATA(PyTypeObject) PyBool_Type;
#define PyBool_Check(x) (Py_TYPE(x) == &PyBool_Type)
/* Py_False and Py_True are the only two bools in existence.
Don't forget to apply Py_INCREF() when returning either!!! */
/* Don't use these directly */
PyAPI_DATA(struct _longobject) _Py_FalseStruct, _Py_TrueStruct;
/* Use these macros */
#define Py_False ((PyObject *) &_Py_FalseStruct)
#define Py_True ((PyObject *) &_Py_TrueStruct)
/* Macros for returning Py_True or Py_False, respectively */
#define Py_RETURN_TRUE return Py_INCREF(Py_True), Py_True
#define Py_RETURN_FALSE return Py_INCREF(Py_False), Py_False
/* Function to return a bool from a C long */
PyAPI_FUNC(PyObject *) PyBool_FromLong(long);
#ifdef __cplusplus
}
#endif
#endif /* !Py_BOOLOBJECT_H */
| 886
|
C++
|
.h
| 24
| 35.5
| 63
| 0.739437
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,494
|
fileutils.h
|
relativty_Relativty/Relativty_Driver/include/Python/fileutils.h
|
#ifndef Py_FILEUTILS_H
#define Py_FILEUTILS_H
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03050000
PyAPI_FUNC(wchar_t *) Py_DecodeLocale(
const char *arg,
size_t *size);
PyAPI_FUNC(char*) Py_EncodeLocale(
const wchar_t *text,
size_t *error_pos);
PyAPI_FUNC(char*) _Py_EncodeLocaleRaw(
const wchar_t *text,
size_t *error_pos);
#endif
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03080000
typedef enum {
_Py_ERROR_UNKNOWN=0,
_Py_ERROR_STRICT,
_Py_ERROR_SURROGATEESCAPE,
_Py_ERROR_REPLACE,
_Py_ERROR_IGNORE,
_Py_ERROR_BACKSLASHREPLACE,
_Py_ERROR_SURROGATEPASS,
_Py_ERROR_XMLCHARREFREPLACE,
_Py_ERROR_OTHER
} _Py_error_handler;
PyAPI_FUNC(_Py_error_handler) _Py_GetErrorHandler(const char *errors);
PyAPI_FUNC(int) _Py_DecodeLocaleEx(
const char *arg,
wchar_t **wstr,
size_t *wlen,
const char **reason,
int current_locale,
_Py_error_handler errors);
PyAPI_FUNC(int) _Py_EncodeLocaleEx(
const wchar_t *text,
char **str,
size_t *error_pos,
const char **reason,
int current_locale,
_Py_error_handler errors);
#endif
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) _Py_device_encoding(int);
#if defined(MS_WINDOWS) || defined(__APPLE__)
/* On Windows, the count parameter of read() is an int (bpo-9015, bpo-9611).
On macOS 10.13, read() and write() with more than INT_MAX bytes
fail with EINVAL (bpo-24658). */
# define _PY_READ_MAX INT_MAX
# define _PY_WRITE_MAX INT_MAX
#else
/* write() should truncate the input to PY_SSIZE_T_MAX bytes,
but it's safer to do it ourself to have a portable behaviour */
# define _PY_READ_MAX PY_SSIZE_T_MAX
# define _PY_WRITE_MAX PY_SSIZE_T_MAX
#endif
#ifdef MS_WINDOWS
struct _Py_stat_struct {
unsigned long st_dev;
uint64_t st_ino;
unsigned short st_mode;
int st_nlink;
int st_uid;
int st_gid;
unsigned long st_rdev;
__int64 st_size;
time_t st_atime;
int st_atime_nsec;
time_t st_mtime;
int st_mtime_nsec;
time_t st_ctime;
int st_ctime_nsec;
unsigned long st_file_attributes;
unsigned long st_reparse_tag;
};
#else
# define _Py_stat_struct stat
#endif
PyAPI_FUNC(int) _Py_fstat(
int fd,
struct _Py_stat_struct *status);
PyAPI_FUNC(int) _Py_fstat_noraise(
int fd,
struct _Py_stat_struct *status);
PyAPI_FUNC(int) _Py_stat(
PyObject *path,
struct stat *status);
PyAPI_FUNC(int) _Py_open(
const char *pathname,
int flags);
PyAPI_FUNC(int) _Py_open_noraise(
const char *pathname,
int flags);
PyAPI_FUNC(FILE *) _Py_wfopen(
const wchar_t *path,
const wchar_t *mode);
PyAPI_FUNC(FILE*) _Py_fopen(
const char *pathname,
const char *mode);
PyAPI_FUNC(FILE*) _Py_fopen_obj(
PyObject *path,
const char *mode);
PyAPI_FUNC(Py_ssize_t) _Py_read(
int fd,
void *buf,
size_t count);
PyAPI_FUNC(Py_ssize_t) _Py_write(
int fd,
const void *buf,
size_t count);
PyAPI_FUNC(Py_ssize_t) _Py_write_noraise(
int fd,
const void *buf,
size_t count);
#ifdef HAVE_READLINK
PyAPI_FUNC(int) _Py_wreadlink(
const wchar_t *path,
wchar_t *buf,
/* Number of characters of 'buf' buffer
including the trailing NUL character */
size_t buflen);
#endif
#ifdef HAVE_REALPATH
PyAPI_FUNC(wchar_t*) _Py_wrealpath(
const wchar_t *path,
wchar_t *resolved_path,
/* Number of characters of 'resolved_path' buffer
including the trailing NUL character */
size_t resolved_path_len);
#endif
PyAPI_FUNC(wchar_t*) _Py_wgetcwd(
wchar_t *buf,
/* Number of characters of 'buf' buffer
including the trailing NUL character */
size_t buflen);
PyAPI_FUNC(int) _Py_get_inheritable(int fd);
PyAPI_FUNC(int) _Py_set_inheritable(int fd, int inheritable,
int *atomic_flag_works);
PyAPI_FUNC(int) _Py_set_inheritable_async_safe(int fd, int inheritable,
int *atomic_flag_works);
PyAPI_FUNC(int) _Py_dup(int fd);
#ifndef MS_WINDOWS
PyAPI_FUNC(int) _Py_get_blocking(int fd);
PyAPI_FUNC(int) _Py_set_blocking(int fd, int blocking);
#endif /* !MS_WINDOWS */
#endif /* Py_LIMITED_API */
#ifdef __cplusplus
}
#endif
#endif /* !Py_FILEUTILS_H */
| 4,352
|
C++
|
.h
| 152
| 24.460526
| 80
| 0.669786
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,495
|
pyctype.h
|
relativty_Relativty/Relativty_Driver/include/Python/pyctype.h
|
#ifndef Py_LIMITED_API
#ifndef PYCTYPE_H
#define PYCTYPE_H
#define PY_CTF_LOWER 0x01
#define PY_CTF_UPPER 0x02
#define PY_CTF_ALPHA (PY_CTF_LOWER|PY_CTF_UPPER)
#define PY_CTF_DIGIT 0x04
#define PY_CTF_ALNUM (PY_CTF_ALPHA|PY_CTF_DIGIT)
#define PY_CTF_SPACE 0x08
#define PY_CTF_XDIGIT 0x10
PyAPI_DATA(const unsigned int) _Py_ctype_table[256];
/* Unlike their C counterparts, the following macros are not meant to
* handle an int with any of the values [EOF, 0-UCHAR_MAX]. The argument
* must be a signed/unsigned char. */
#define Py_ISLOWER(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_LOWER)
#define Py_ISUPPER(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_UPPER)
#define Py_ISALPHA(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_ALPHA)
#define Py_ISDIGIT(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_DIGIT)
#define Py_ISXDIGIT(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_XDIGIT)
#define Py_ISALNUM(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_ALNUM)
#define Py_ISSPACE(c) (_Py_ctype_table[Py_CHARMASK(c)] & PY_CTF_SPACE)
PyAPI_DATA(const unsigned char) _Py_ctype_tolower[256];
PyAPI_DATA(const unsigned char) _Py_ctype_toupper[256];
#define Py_TOLOWER(c) (_Py_ctype_tolower[Py_CHARMASK(c)])
#define Py_TOUPPER(c) (_Py_ctype_toupper[Py_CHARMASK(c)])
#endif /* !PYCTYPE_H */
#endif /* !Py_LIMITED_API */
| 1,320
|
C++
|
.h
| 27
| 47.592593
| 72
| 0.725719
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,497
|
dictobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/dictobject.h
|
#ifndef Py_DICTOBJECT_H
#define Py_DICTOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Dictionary object type -- mapping from hashable object to object */
/* The distribution includes a separate file, Objects/dictnotes.txt,
describing explorations into dictionary design and optimization.
It covers typical dictionary use patterns, the parameters for
tuning dictionaries, and several ideas for possible optimizations.
*/
PyAPI_DATA(PyTypeObject) PyDict_Type;
#define PyDict_Check(op) \
PyType_FastSubclass(Py_TYPE(op), Py_TPFLAGS_DICT_SUBCLASS)
#define PyDict_CheckExact(op) (Py_TYPE(op) == &PyDict_Type)
PyAPI_FUNC(PyObject *) PyDict_New(void);
PyAPI_FUNC(PyObject *) PyDict_GetItem(PyObject *mp, PyObject *key);
PyAPI_FUNC(PyObject *) PyDict_GetItemWithError(PyObject *mp, PyObject *key);
PyAPI_FUNC(int) PyDict_SetItem(PyObject *mp, PyObject *key, PyObject *item);
PyAPI_FUNC(int) PyDict_DelItem(PyObject *mp, PyObject *key);
PyAPI_FUNC(void) PyDict_Clear(PyObject *mp);
PyAPI_FUNC(int) PyDict_Next(
PyObject *mp, Py_ssize_t *pos, PyObject **key, PyObject **value);
PyAPI_FUNC(PyObject *) PyDict_Keys(PyObject *mp);
PyAPI_FUNC(PyObject *) PyDict_Values(PyObject *mp);
PyAPI_FUNC(PyObject *) PyDict_Items(PyObject *mp);
PyAPI_FUNC(Py_ssize_t) PyDict_Size(PyObject *mp);
PyAPI_FUNC(PyObject *) PyDict_Copy(PyObject *mp);
PyAPI_FUNC(int) PyDict_Contains(PyObject *mp, PyObject *key);
/* PyDict_Update(mp, other) is equivalent to PyDict_Merge(mp, other, 1). */
PyAPI_FUNC(int) PyDict_Update(PyObject *mp, PyObject *other);
/* PyDict_Merge updates/merges from a mapping object (an object that
supports PyMapping_Keys() and PyObject_GetItem()). If override is true,
the last occurrence of a key wins, else the first. The Python
dict.update(other) is equivalent to PyDict_Merge(dict, other, 1).
*/
PyAPI_FUNC(int) PyDict_Merge(PyObject *mp,
PyObject *other,
int override);
/* PyDict_MergeFromSeq2 updates/merges from an iterable object producing
iterable objects of length 2. If override is true, the last occurrence
of a key wins, else the first. The Python dict constructor dict(seq2)
is equivalent to dict={}; PyDict_MergeFromSeq(dict, seq2, 1).
*/
PyAPI_FUNC(int) PyDict_MergeFromSeq2(PyObject *d,
PyObject *seq2,
int override);
PyAPI_FUNC(PyObject *) PyDict_GetItemString(PyObject *dp, const char *key);
PyAPI_FUNC(int) PyDict_SetItemString(PyObject *dp, const char *key, PyObject *item);
PyAPI_FUNC(int) PyDict_DelItemString(PyObject *dp, const char *key);
/* Dictionary (keys, values, items) views */
PyAPI_DATA(PyTypeObject) PyDictKeys_Type;
PyAPI_DATA(PyTypeObject) PyDictValues_Type;
PyAPI_DATA(PyTypeObject) PyDictItems_Type;
#define PyDictKeys_Check(op) PyObject_TypeCheck(op, &PyDictKeys_Type)
#define PyDictValues_Check(op) PyObject_TypeCheck(op, &PyDictValues_Type)
#define PyDictItems_Check(op) PyObject_TypeCheck(op, &PyDictItems_Type)
/* This excludes Values, since they are not sets. */
# define PyDictViewSet_Check(op) \
(PyDictKeys_Check(op) || PyDictItems_Check(op))
/* Dictionary (key, value, items) iterators */
PyAPI_DATA(PyTypeObject) PyDictIterKey_Type;
PyAPI_DATA(PyTypeObject) PyDictIterValue_Type;
PyAPI_DATA(PyTypeObject) PyDictIterItem_Type;
PyAPI_DATA(PyTypeObject) PyDictRevIterKey_Type;
PyAPI_DATA(PyTypeObject) PyDictRevIterItem_Type;
PyAPI_DATA(PyTypeObject) PyDictRevIterValue_Type;
#ifndef Py_LIMITED_API
# define Py_CPYTHON_DICTOBJECT_H
# include "cpython/dictobject.h"
# undef Py_CPYTHON_DICTOBJECT_H
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_DICTOBJECT_H */
| 3,716
|
C++
|
.h
| 76
| 45.236842
| 84
| 0.744892
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,498
|
errcode.h
|
relativty_Relativty/Relativty_Driver/include/Python/errcode.h
|
#ifndef Py_ERRCODE_H
#define Py_ERRCODE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Error codes passed around between file input, tokenizer, parser and
interpreter. This is necessary so we can turn them into Python
exceptions at a higher level. Note that some errors have a
slightly different meaning when passed from the tokenizer to the
parser than when passed from the parser to the interpreter; e.g.
the parser only returns E_EOF when it hits EOF immediately, and it
never returns E_OK. */
#define E_OK 10 /* No error */
#define E_EOF 11 /* End Of File */
#define E_INTR 12 /* Interrupted */
#define E_TOKEN 13 /* Bad token */
#define E_SYNTAX 14 /* Syntax error */
#define E_NOMEM 15 /* Ran out of memory */
#define E_DONE 16 /* Parsing complete */
#define E_ERROR 17 /* Execution error */
#define E_TABSPACE 18 /* Inconsistent mixing of tabs and spaces */
#define E_OVERFLOW 19 /* Node had too many children */
#define E_TOODEEP 20 /* Too many indentation levels */
#define E_DEDENT 21 /* No matching outer block for dedent */
#define E_DECODE 22 /* Error in decoding into Unicode */
#define E_EOFS 23 /* EOF in triple-quoted string */
#define E_EOLS 24 /* EOL in single-quoted string */
#define E_LINECONT 25 /* Unexpected characters after a line continuation */
#define E_IDENTIFIER 26 /* Invalid characters in identifier */
#define E_BADSINGLE 27 /* Ill-formed single statement input */
#ifdef __cplusplus
}
#endif
#endif /* !Py_ERRCODE_H */
| 1,695
|
C++
|
.h
| 34
| 48.205882
| 85
| 0.636693
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,499
|
modsupport.h
|
relativty_Relativty/Relativty_Driver/include/Python/modsupport.h
|
#ifndef Py_MODSUPPORT_H
#define Py_MODSUPPORT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Module support interface */
#include <stdarg.h>
/* If PY_SSIZE_T_CLEAN is defined, each functions treats #-specifier
to mean Py_ssize_t */
#ifdef PY_SSIZE_T_CLEAN
#define PyArg_Parse _PyArg_Parse_SizeT
#define PyArg_ParseTuple _PyArg_ParseTuple_SizeT
#define PyArg_ParseTupleAndKeywords _PyArg_ParseTupleAndKeywords_SizeT
#define PyArg_VaParse _PyArg_VaParse_SizeT
#define PyArg_VaParseTupleAndKeywords _PyArg_VaParseTupleAndKeywords_SizeT
#define Py_BuildValue _Py_BuildValue_SizeT
#define Py_VaBuildValue _Py_VaBuildValue_SizeT
#ifndef Py_LIMITED_API
#define _Py_VaBuildStack _Py_VaBuildStack_SizeT
#endif
#else
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) _Py_VaBuildValue_SizeT(const char *, va_list);
PyAPI_FUNC(PyObject **) _Py_VaBuildStack_SizeT(
PyObject **small_stack,
Py_ssize_t small_stack_len,
const char *format,
va_list va,
Py_ssize_t *p_nargs);
#endif /* !Py_LIMITED_API */
#endif
/* Due to a glitch in 3.2, the _SizeT versions weren't exported from the DLL. */
#if !defined(PY_SSIZE_T_CLEAN) || !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03030000
PyAPI_FUNC(int) PyArg_Parse(PyObject *, const char *, ...);
PyAPI_FUNC(int) PyArg_ParseTuple(PyObject *, const char *, ...);
PyAPI_FUNC(int) PyArg_ParseTupleAndKeywords(PyObject *, PyObject *,
const char *, char **, ...);
PyAPI_FUNC(int) PyArg_VaParse(PyObject *, const char *, va_list);
PyAPI_FUNC(int) PyArg_VaParseTupleAndKeywords(PyObject *, PyObject *,
const char *, char **, va_list);
#endif
PyAPI_FUNC(int) PyArg_ValidateKeywordArguments(PyObject *);
PyAPI_FUNC(int) PyArg_UnpackTuple(PyObject *, const char *, Py_ssize_t, Py_ssize_t, ...);
PyAPI_FUNC(PyObject *) Py_BuildValue(const char *, ...);
PyAPI_FUNC(PyObject *) _Py_BuildValue_SizeT(const char *, ...);
#ifndef Py_LIMITED_API
PyAPI_FUNC(int) _PyArg_UnpackStack(
PyObject *const *args,
Py_ssize_t nargs,
const char *name,
Py_ssize_t min,
Py_ssize_t max,
...);
PyAPI_FUNC(int) _PyArg_NoKeywords(const char *funcname, PyObject *kwargs);
PyAPI_FUNC(int) _PyArg_NoPositional(const char *funcname, PyObject *args);
#define _PyArg_NoKeywords(funcname, kwargs) \
((kwargs) == NULL || _PyArg_NoKeywords((funcname), (kwargs)))
#define _PyArg_NoPositional(funcname, args) \
((args) == NULL || _PyArg_NoPositional((funcname), (args)))
PyAPI_FUNC(void) _PyArg_BadArgument(const char *, const char *, const char *, PyObject *);
PyAPI_FUNC(int) _PyArg_CheckPositional(const char *, Py_ssize_t,
Py_ssize_t, Py_ssize_t);
#define _PyArg_CheckPositional(funcname, nargs, min, max) \
(((min) <= (nargs) && (nargs) <= (max)) \
|| _PyArg_CheckPositional((funcname), (nargs), (min), (max)))
#endif
PyAPI_FUNC(PyObject *) Py_VaBuildValue(const char *, va_list);
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject **) _Py_VaBuildStack(
PyObject **small_stack,
Py_ssize_t small_stack_len,
const char *format,
va_list va,
Py_ssize_t *p_nargs);
#endif
#ifndef Py_LIMITED_API
typedef struct _PyArg_Parser {
const char *format;
const char * const *keywords;
const char *fname;
const char *custom_msg;
int pos; /* number of positional-only arguments */
int min; /* minimal number of arguments */
int max; /* maximal number of positional arguments */
PyObject *kwtuple; /* tuple of keyword parameter names */
struct _PyArg_Parser *next;
} _PyArg_Parser;
#ifdef PY_SSIZE_T_CLEAN
#define _PyArg_ParseTupleAndKeywordsFast _PyArg_ParseTupleAndKeywordsFast_SizeT
#define _PyArg_ParseStack _PyArg_ParseStack_SizeT
#define _PyArg_ParseStackAndKeywords _PyArg_ParseStackAndKeywords_SizeT
#define _PyArg_VaParseTupleAndKeywordsFast _PyArg_VaParseTupleAndKeywordsFast_SizeT
#endif
PyAPI_FUNC(int) _PyArg_ParseTupleAndKeywordsFast(PyObject *, PyObject *,
struct _PyArg_Parser *, ...);
PyAPI_FUNC(int) _PyArg_ParseStack(
PyObject *const *args,
Py_ssize_t nargs,
const char *format,
...);
PyAPI_FUNC(int) _PyArg_ParseStackAndKeywords(
PyObject *const *args,
Py_ssize_t nargs,
PyObject *kwnames,
struct _PyArg_Parser *,
...);
PyAPI_FUNC(int) _PyArg_VaParseTupleAndKeywordsFast(PyObject *, PyObject *,
struct _PyArg_Parser *, va_list);
PyAPI_FUNC(PyObject * const *) _PyArg_UnpackKeywords(
PyObject *const *args, Py_ssize_t nargs,
PyObject *kwargs, PyObject *kwnames,
struct _PyArg_Parser *parser,
int minpos, int maxpos, int minkw,
PyObject **buf);
#define _PyArg_UnpackKeywords(args, nargs, kwargs, kwnames, parser, minpos, maxpos, minkw, buf) \
(((minkw) == 0 && (kwargs) == NULL && (kwnames) == NULL && \
(minpos) <= (nargs) && (nargs) <= (maxpos) && args != NULL) ? (args) : \
_PyArg_UnpackKeywords((args), (nargs), (kwargs), (kwnames), (parser), \
(minpos), (maxpos), (minkw), (buf)))
void _PyArg_Fini(void);
#endif /* Py_LIMITED_API */
PyAPI_FUNC(int) PyModule_AddObject(PyObject *, const char *, PyObject *);
PyAPI_FUNC(int) PyModule_AddIntConstant(PyObject *, const char *, long);
PyAPI_FUNC(int) PyModule_AddStringConstant(PyObject *, const char *, const char *);
#define PyModule_AddIntMacro(m, c) PyModule_AddIntConstant(m, #c, c)
#define PyModule_AddStringMacro(m, c) PyModule_AddStringConstant(m, #c, c)
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03050000
/* New in 3.5 */
PyAPI_FUNC(int) PyModule_SetDocString(PyObject *, const char *);
PyAPI_FUNC(int) PyModule_AddFunctions(PyObject *, PyMethodDef *);
PyAPI_FUNC(int) PyModule_ExecDef(PyObject *module, PyModuleDef *def);
#endif
#define Py_CLEANUP_SUPPORTED 0x20000
#define PYTHON_API_VERSION 1013
#define PYTHON_API_STRING "1013"
/* The API version is maintained (independently from the Python version)
so we can detect mismatches between the interpreter and dynamically
loaded modules. These are diagnosed by an error message but
the module is still loaded (because the mismatch can only be tested
after loading the module). The error message is intended to
explain the core dump a few seconds later.
The symbol PYTHON_API_STRING defines the same value as a string
literal. *** PLEASE MAKE SURE THE DEFINITIONS MATCH. ***
Please add a line or two to the top of this log for each API
version change:
22-Feb-2006 MvL 1013 PEP 353 - long indices for sequence lengths
19-Aug-2002 GvR 1012 Changes to string object struct for
interning changes, saving 3 bytes.
17-Jul-2001 GvR 1011 Descr-branch, just to be on the safe side
25-Jan-2001 FLD 1010 Parameters added to PyCode_New() and
PyFrame_New(); Python 2.1a2
14-Mar-2000 GvR 1009 Unicode API added
3-Jan-1999 GvR 1007 Decided to change back! (Don't reuse 1008!)
3-Dec-1998 GvR 1008 Python 1.5.2b1
18-Jan-1997 GvR 1007 string interning and other speedups
11-Oct-1996 GvR renamed Py_Ellipses to Py_Ellipsis :-(
30-Jul-1996 GvR Slice and ellipses syntax added
23-Jul-1996 GvR For 1.4 -- better safe than sorry this time :-)
7-Nov-1995 GvR Keyword arguments (should've been done at 1.3 :-( )
10-Jan-1995 GvR Renamed globals to new naming scheme
9-Jan-1995 GvR Initial version (incompatible with older API)
*/
/* The PYTHON_ABI_VERSION is introduced in PEP 384. For the lifetime of
Python 3, it will stay at the value of 3; changes to the limited API
must be performed in a strictly backwards-compatible manner. */
#define PYTHON_ABI_VERSION 3
#define PYTHON_ABI_STRING "3"
#ifdef Py_TRACE_REFS
/* When we are tracing reference counts, rename module creation functions so
modules compiled with incompatible settings will generate a
link-time error. */
#define PyModule_Create2 PyModule_Create2TraceRefs
#define PyModule_FromDefAndSpec2 PyModule_FromDefAndSpec2TraceRefs
#endif
PyAPI_FUNC(PyObject *) PyModule_Create2(struct PyModuleDef*,
int apiver);
#ifndef Py_LIMITED_API
PyAPI_FUNC(PyObject *) _PyModule_CreateInitialized(struct PyModuleDef*,
int apiver);
#endif
#ifdef Py_LIMITED_API
#define PyModule_Create(module) \
PyModule_Create2(module, PYTHON_ABI_VERSION)
#else
#define PyModule_Create(module) \
PyModule_Create2(module, PYTHON_API_VERSION)
#endif
#if !defined(Py_LIMITED_API) || Py_LIMITED_API+0 >= 0x03050000
/* New in 3.5 */
PyAPI_FUNC(PyObject *) PyModule_FromDefAndSpec2(PyModuleDef *def,
PyObject *spec,
int module_api_version);
#ifdef Py_LIMITED_API
#define PyModule_FromDefAndSpec(module, spec) \
PyModule_FromDefAndSpec2(module, spec, PYTHON_ABI_VERSION)
#else
#define PyModule_FromDefAndSpec(module, spec) \
PyModule_FromDefAndSpec2(module, spec, PYTHON_API_VERSION)
#endif /* Py_LIMITED_API */
#endif /* New in 3.5 */
#ifndef Py_LIMITED_API
PyAPI_DATA(const char *) _Py_PackageContext;
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_MODSUPPORT_H */
| 9,591
|
C++
|
.h
| 207
| 41.101449
| 97
| 0.676228
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
24,500
|
pymem.h
|
relativty_Relativty/Relativty_Driver/include/Python/pymem.h
|
/* The PyMem_ family: low-level memory allocation interfaces.
See objimpl.h for the PyObject_ memory family.
*/
#ifndef Py_PYMEM_H
#define Py_PYMEM_H
#include "pyport.h"
#ifdef __cplusplus
extern "C" {
#endif
/* BEWARE:
Each interface exports both functions and macros. Extension modules should
use the functions, to ensure binary compatibility across Python versions.
Because the Python implementation is free to change internal details, and
the macros may (or may not) expose details for speed, if you do use the
macros you must recompile your extensions with each Python release.
Never mix calls to PyMem_ with calls to the platform malloc/realloc/
calloc/free. For example, on Windows different DLLs may end up using
different heaps, and if you use PyMem_Malloc you'll get the memory from the
heap used by the Python DLL; it could be a disaster if you free()'ed that
directly in your own extension. Using PyMem_Free instead ensures Python
can return the memory to the proper heap. As another example, in
PYMALLOC_DEBUG mode, Python wraps all calls to all PyMem_ and PyObject_
memory functions in special debugging wrappers that add additional
debugging info to dynamic memory blocks. The system routines have no idea
what to do with that stuff, and the Python wrappers have no idea what to do
with raw blocks obtained directly by the system routines then.
The GIL must be held when using these APIs.
*/
/*
* Raw memory interface
* ====================
*/
/* Functions
Functions supplying platform-independent semantics for malloc/realloc/
free. These functions make sure that allocating 0 bytes returns a distinct
non-NULL pointer (whenever possible -- if we're flat out of memory, NULL
may be returned), even if the platform malloc and realloc don't.
Returned pointers must be checked for NULL explicitly. No action is
performed on failure (no exception is set, no warning is printed, etc).
*/
PyAPI_FUNC(void *) PyMem_Malloc(size_t size);
PyAPI_FUNC(void *) PyMem_Realloc(void *ptr, size_t new_size);
PyAPI_FUNC(void) PyMem_Free(void *ptr);
/* Macros. */
/* PyMem_MALLOC(0) means malloc(1). Some systems would return NULL
for malloc(0), which would be treated as an error. Some platforms
would return a pointer with no memory behind it, which would break
pymalloc. To solve these problems, allocate an extra byte. */
/* Returns NULL to indicate error if a negative size or size larger than
Py_ssize_t can represent is supplied. Helps prevents security holes. */
#define PyMem_MALLOC(n) PyMem_Malloc(n)
#define PyMem_REALLOC(p, n) PyMem_Realloc(p, n)
#define PyMem_FREE(p) PyMem_Free(p)
/*
* Type-oriented memory interface
* ==============================
*
* Allocate memory for n objects of the given type. Returns a new pointer
* or NULL if the request was too large or memory allocation failed. Use
* these macros rather than doing the multiplication yourself so that proper
* overflow checking is always done.
*/
#define PyMem_New(type, n) \
( ((size_t)(n) > PY_SSIZE_T_MAX / sizeof(type)) ? NULL : \
( (type *) PyMem_Malloc((n) * sizeof(type)) ) )
#define PyMem_NEW(type, n) \
( ((size_t)(n) > PY_SSIZE_T_MAX / sizeof(type)) ? NULL : \
( (type *) PyMem_MALLOC((n) * sizeof(type)) ) )
/*
* The value of (p) is always clobbered by this macro regardless of success.
* The caller MUST check if (p) is NULL afterwards and deal with the memory
* error if so. This means the original value of (p) MUST be saved for the
* caller's memory error handler to not lose track of it.
*/
#define PyMem_Resize(p, type, n) \
( (p) = ((size_t)(n) > PY_SSIZE_T_MAX / sizeof(type)) ? NULL : \
(type *) PyMem_Realloc((p), (n) * sizeof(type)) )
#define PyMem_RESIZE(p, type, n) \
( (p) = ((size_t)(n) > PY_SSIZE_T_MAX / sizeof(type)) ? NULL : \
(type *) PyMem_REALLOC((p), (n) * sizeof(type)) )
/* PyMem{Del,DEL} are left over from ancient days, and shouldn't be used
* anymore. They're just confusing aliases for PyMem_{Free,FREE} now.
*/
#define PyMem_Del PyMem_Free
#define PyMem_DEL PyMem_FREE
/* bpo-35053: expose _Py_tracemalloc_config for performance:
_Py_NewReference() needs an efficient check to test if tracemalloc is
tracing.
It has to be defined in pymem.h, before object.h is included. */
struct _PyTraceMalloc_Config {
/* Module initialized?
Variable protected by the GIL */
enum {
TRACEMALLOC_NOT_INITIALIZED,
TRACEMALLOC_INITIALIZED,
TRACEMALLOC_FINALIZED
} initialized;
/* Is tracemalloc tracing memory allocations?
Variable protected by the GIL */
int tracing;
/* limit of the number of frames in a traceback, 1 by default.
Variable protected by the GIL. */
int max_nframe;
/* use domain in trace key?
Variable protected by the GIL. */
int use_domain;
};
PyAPI_DATA(struct _PyTraceMalloc_Config) _Py_tracemalloc_config;
#define _PyTraceMalloc_Config_INIT \
{.initialized = TRACEMALLOC_NOT_INITIALIZED, \
.tracing = 0, \
.max_nframe = 1, \
.use_domain = 0}
#ifndef Py_LIMITED_API
# define Py_CPYTHON_PYMEM_H
# include "cpython/pymem.h"
# undef Py_CPYTHON_PYMEM_H
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_PYMEM_H */
| 5,406
|
C++
|
.h
| 122
| 40.967213
| 78
| 0.702245
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,501
|
rangeobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/rangeobject.h
|
/* Range object interface */
#ifndef Py_RANGEOBJECT_H
#define Py_RANGEOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
/*
A range object represents an integer range. This is an immutable object;
a range cannot change its value after creation.
Range objects behave like the corresponding tuple objects except that
they are represented by a start, stop, and step datamembers.
*/
PyAPI_DATA(PyTypeObject) PyRange_Type;
PyAPI_DATA(PyTypeObject) PyRangeIter_Type;
PyAPI_DATA(PyTypeObject) PyLongRangeIter_Type;
#define PyRange_Check(op) (Py_TYPE(op) == &PyRange_Type)
#ifdef __cplusplus
}
#endif
#endif /* !Py_RANGEOBJECT_H */
| 629
|
C++
|
.h
| 20
| 30.1
| 73
| 0.792359
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,502
|
pymacro.h
|
relativty_Relativty/Relativty_Driver/include/Python/pymacro.h
|
#ifndef Py_PYMACRO_H
#define Py_PYMACRO_H
/* Minimum value between x and y */
#define Py_MIN(x, y) (((x) > (y)) ? (y) : (x))
/* Maximum value between x and y */
#define Py_MAX(x, y) (((x) > (y)) ? (x) : (y))
/* Absolute value of the number x */
#define Py_ABS(x) ((x) < 0 ? -(x) : (x))
#define _Py_XSTRINGIFY(x) #x
/* Convert the argument to a string. For example, Py_STRINGIFY(123) is replaced
with "123" by the preprocessor. Defines are also replaced by their value.
For example Py_STRINGIFY(__LINE__) is replaced by the line number, not
by "__LINE__". */
#define Py_STRINGIFY(x) _Py_XSTRINGIFY(x)
/* Get the size of a structure member in bytes */
#define Py_MEMBER_SIZE(type, member) sizeof(((type *)0)->member)
/* Argument must be a char or an int in [-128, 127] or [0, 255]. */
#define Py_CHARMASK(c) ((unsigned char)((c) & 0xff))
/* Assert a build-time dependency, as an expression.
Your compile will fail if the condition isn't true, or can't be evaluated
by the compiler. This can be used in an expression: its value is 0.
Example:
#define foo_to_char(foo) \
((char *)(foo) \
+ Py_BUILD_ASSERT_EXPR(offsetof(struct foo, string) == 0))
Written by Rusty Russell, public domain, http://ccodearchive.net/ */
#define Py_BUILD_ASSERT_EXPR(cond) \
(sizeof(char [1 - 2*!(cond)]) - 1)
#define Py_BUILD_ASSERT(cond) do { \
(void)Py_BUILD_ASSERT_EXPR(cond); \
} while(0)
/* Get the number of elements in a visible array
This does not work on pointers, or arrays declared as [], or function
parameters. With correct compiler support, such usage will cause a build
error (see Py_BUILD_ASSERT_EXPR).
Written by Rusty Russell, public domain, http://ccodearchive.net/
Requires at GCC 3.1+ */
#if (defined(__GNUC__) && !defined(__STRICT_ANSI__) && \
(((__GNUC__ == 3) && (__GNUC_MINOR__ >= 1)) || (__GNUC__ >= 4)))
/* Two gcc extensions.
&a[0] degrades to a pointer: a different type from an array */
#define Py_ARRAY_LENGTH(array) \
(sizeof(array) / sizeof((array)[0]) \
+ Py_BUILD_ASSERT_EXPR(!__builtin_types_compatible_p(typeof(array), \
typeof(&(array)[0]))))
#else
#define Py_ARRAY_LENGTH(array) \
(sizeof(array) / sizeof((array)[0]))
#endif
/* Define macros for inline documentation. */
#define PyDoc_VAR(name) static const char name[]
#define PyDoc_STRVAR(name,str) PyDoc_VAR(name) = PyDoc_STR(str)
#ifdef WITH_DOC_STRINGS
#define PyDoc_STR(str) str
#else
#define PyDoc_STR(str) ""
#endif
/* Below "a" is a power of 2. */
/* Round down size "n" to be a multiple of "a". */
#define _Py_SIZE_ROUND_DOWN(n, a) ((size_t)(n) & ~(size_t)((a) - 1))
/* Round up size "n" to be a multiple of "a". */
#define _Py_SIZE_ROUND_UP(n, a) (((size_t)(n) + \
(size_t)((a) - 1)) & ~(size_t)((a) - 1))
/* Round pointer "p" down to the closest "a"-aligned address <= "p". */
#define _Py_ALIGN_DOWN(p, a) ((void *)((uintptr_t)(p) & ~(uintptr_t)((a) - 1)))
/* Round pointer "p" up to the closest "a"-aligned address >= "p". */
#define _Py_ALIGN_UP(p, a) ((void *)(((uintptr_t)(p) + \
(uintptr_t)((a) - 1)) & ~(uintptr_t)((a) - 1)))
/* Check if pointer "p" is aligned to "a"-bytes boundary. */
#define _Py_IS_ALIGNED(p, a) (!((uintptr_t)(p) & (uintptr_t)((a) - 1)))
/* Use this for unused arguments in a function definition to silence compiler
* warnings. Example:
*
* int func(int a, int Py_UNUSED(b)) { return a; }
*/
#if defined(__GNUC__) || defined(__clang__)
# define Py_UNUSED(name) _unused_ ## name __attribute__((unused))
#else
# define Py_UNUSED(name) _unused_ ## name
#endif
#define Py_UNREACHABLE() \
Py_FatalError("Unreachable C code path reached")
#endif /* Py_PYMACRO_H */
| 3,778
|
C++
|
.h
| 83
| 42.168675
| 80
| 0.629085
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,503
|
genobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/genobject.h
|
/* Generator object interface */
#ifndef Py_LIMITED_API
#ifndef Py_GENOBJECT_H
#define Py_GENOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
#include "pystate.h" /* _PyErr_StackItem */
struct _frame; /* Avoid including frameobject.h */
/* _PyGenObject_HEAD defines the initial segment of generator
and coroutine objects. */
#define _PyGenObject_HEAD(prefix) \
PyObject_HEAD \
/* Note: gi_frame can be NULL if the generator is "finished" */ \
struct _frame *prefix##_frame; \
/* True if generator is being executed. */ \
char prefix##_running; \
/* The code object backing the generator */ \
PyObject *prefix##_code; \
/* List of weak reference. */ \
PyObject *prefix##_weakreflist; \
/* Name of the generator. */ \
PyObject *prefix##_name; \
/* Qualified name of the generator. */ \
PyObject *prefix##_qualname; \
_PyErr_StackItem prefix##_exc_state;
typedef struct {
/* The gi_ prefix is intended to remind of generator-iterator. */
_PyGenObject_HEAD(gi)
} PyGenObject;
PyAPI_DATA(PyTypeObject) PyGen_Type;
#define PyGen_Check(op) PyObject_TypeCheck(op, &PyGen_Type)
#define PyGen_CheckExact(op) (Py_TYPE(op) == &PyGen_Type)
PyAPI_FUNC(PyObject *) PyGen_New(struct _frame *);
PyAPI_FUNC(PyObject *) PyGen_NewWithQualName(struct _frame *,
PyObject *name, PyObject *qualname);
PyAPI_FUNC(int) PyGen_NeedsFinalizing(PyGenObject *);
PyAPI_FUNC(int) _PyGen_SetStopIterationValue(PyObject *);
PyAPI_FUNC(int) _PyGen_FetchStopIterationValue(PyObject **);
PyAPI_FUNC(PyObject *) _PyGen_Send(PyGenObject *, PyObject *);
PyObject *_PyGen_yf(PyGenObject *);
PyAPI_FUNC(void) _PyGen_Finalize(PyObject *self);
#ifndef Py_LIMITED_API
typedef struct {
_PyGenObject_HEAD(cr)
PyObject *cr_origin;
} PyCoroObject;
PyAPI_DATA(PyTypeObject) PyCoro_Type;
PyAPI_DATA(PyTypeObject) _PyCoroWrapper_Type;
PyAPI_DATA(PyTypeObject) _PyAIterWrapper_Type;
#define PyCoro_CheckExact(op) (Py_TYPE(op) == &PyCoro_Type)
PyObject *_PyCoro_GetAwaitableIter(PyObject *o);
PyAPI_FUNC(PyObject *) PyCoro_New(struct _frame *,
PyObject *name, PyObject *qualname);
/* Asynchronous Generators */
typedef struct {
_PyGenObject_HEAD(ag)
PyObject *ag_finalizer;
/* Flag is set to 1 when hooks set up by sys.set_asyncgen_hooks
were called on the generator, to avoid calling them more
than once. */
int ag_hooks_inited;
/* Flag is set to 1 when aclose() is called for the first time, or
when a StopAsyncIteration exception is raised. */
int ag_closed;
int ag_running_async;
} PyAsyncGenObject;
PyAPI_DATA(PyTypeObject) PyAsyncGen_Type;
PyAPI_DATA(PyTypeObject) _PyAsyncGenASend_Type;
PyAPI_DATA(PyTypeObject) _PyAsyncGenWrappedValue_Type;
PyAPI_DATA(PyTypeObject) _PyAsyncGenAThrow_Type;
PyAPI_FUNC(PyObject *) PyAsyncGen_New(struct _frame *,
PyObject *name, PyObject *qualname);
#define PyAsyncGen_CheckExact(op) (Py_TYPE(op) == &PyAsyncGen_Type)
PyObject *_PyAsyncGenValueWrapperNew(PyObject *);
int PyAsyncGen_ClearFreeLists(void);
#endif
#undef _PyGenObject_HEAD
#ifdef __cplusplus
}
#endif
#endif /* !Py_GENOBJECT_H */
#endif /* Py_LIMITED_API */
| 3,720
|
C++
|
.h
| 83
| 41.86747
| 77
| 0.620881
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
24,504
|
fileobject.h
|
relativty_Relativty/Relativty_Driver/include/Python/fileobject.h
|
/* File object interface (what's left of it -- see io.py) */
#ifndef Py_FILEOBJECT_H
#define Py_FILEOBJECT_H
#ifdef __cplusplus
extern "C" {
#endif
#define PY_STDIOTEXTMODE "b"
PyAPI_FUNC(PyObject *) PyFile_FromFd(int, const char *, const char *, int,
const char *, const char *,
const char *, int);
PyAPI_FUNC(PyObject *) PyFile_GetLine(PyObject *, int);
PyAPI_FUNC(int) PyFile_WriteObject(PyObject *, PyObject *, int);
PyAPI_FUNC(int) PyFile_WriteString(const char *, PyObject *);
PyAPI_FUNC(int) PyObject_AsFileDescriptor(PyObject *);
/* The default encoding used by the platform file system APIs
If non-NULL, this is different than the default encoding for strings
*/
PyAPI_DATA(const char *) Py_FileSystemDefaultEncoding;
PyAPI_DATA(int) Py_HasFileSystemDefaultEncoding;
/* A routine to check if a file descriptor can be select()-ed. */
#ifdef _MSC_VER
/* On Windows, any socket fd can be select()-ed, no matter how high */
#define _PyIsSelectable_fd(FD) (1)
#else
#define _PyIsSelectable_fd(FD) ((unsigned int)(FD) < (unsigned int)FD_SETSIZE)
#endif
#ifndef Py_LIMITED_API
# define Py_CPYTHON_FILEOBJECT_H
# include "cpython/fileobject.h"
# undef Py_CPYTHON_FILEOBJECT_H
#endif
#ifdef __cplusplus
}
#endif
#endif /* !Py_FILEOBJECT_H */
| 1,342
|
C++
|
.h
| 35
| 34.6
| 82
| 0.7
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| true
| true
| false
| false
| false
| false
| false
| false
|
24,506
|
datetime.h
|
relativty_Relativty/Relativty_Driver/include/Python/datetime.h
|
/* datetime.h
*/
#ifndef Py_LIMITED_API
#ifndef DATETIME_H
#define DATETIME_H
#ifdef __cplusplus
extern "C" {
#endif
/* Fields are packed into successive bytes, each viewed as unsigned and
* big-endian, unless otherwise noted:
*
* byte offset
* 0 year 2 bytes, 1-9999
* 2 month 1 byte, 1-12
* 3 day 1 byte, 1-31
* 4 hour 1 byte, 0-23
* 5 minute 1 byte, 0-59
* 6 second 1 byte, 0-59
* 7 usecond 3 bytes, 0-999999
* 10
*/
/* # of bytes for year, month, and day. */
#define _PyDateTime_DATE_DATASIZE 4
/* # of bytes for hour, minute, second, and usecond. */
#define _PyDateTime_TIME_DATASIZE 6
/* # of bytes for year, month, day, hour, minute, second, and usecond. */
#define _PyDateTime_DATETIME_DATASIZE 10
typedef struct
{
PyObject_HEAD
Py_hash_t hashcode; /* -1 when unknown */
int days; /* -MAX_DELTA_DAYS <= days <= MAX_DELTA_DAYS */
int seconds; /* 0 <= seconds < 24*3600 is invariant */
int microseconds; /* 0 <= microseconds < 1000000 is invariant */
} PyDateTime_Delta;
typedef struct
{
PyObject_HEAD /* a pure abstract base class */
} PyDateTime_TZInfo;
/* The datetime and time types have hashcodes, and an optional tzinfo member,
* present if and only if hastzinfo is true.
*/
#define _PyTZINFO_HEAD \
PyObject_HEAD \
Py_hash_t hashcode; \
char hastzinfo; /* boolean flag */
/* No _PyDateTime_BaseTZInfo is allocated; it's just to have something
* convenient to cast to, when getting at the hastzinfo member of objects
* starting with _PyTZINFO_HEAD.
*/
typedef struct
{
_PyTZINFO_HEAD
} _PyDateTime_BaseTZInfo;
/* All time objects are of PyDateTime_TimeType, but that can be allocated
* in two ways, with or without a tzinfo member. Without is the same as
* tzinfo == None, but consumes less memory. _PyDateTime_BaseTime is an
* internal struct used to allocate the right amount of space for the
* "without" case.
*/
#define _PyDateTime_TIMEHEAD \
_PyTZINFO_HEAD \
unsigned char data[_PyDateTime_TIME_DATASIZE];
typedef struct
{
_PyDateTime_TIMEHEAD
} _PyDateTime_BaseTime; /* hastzinfo false */
typedef struct
{
_PyDateTime_TIMEHEAD
unsigned char fold;
PyObject *tzinfo;
} PyDateTime_Time; /* hastzinfo true */
/* All datetime objects are of PyDateTime_DateTimeType, but that can be
* allocated in two ways too, just like for time objects above. In addition,
* the plain date type is a base class for datetime, so it must also have
* a hastzinfo member (although it's unused there).
*/
typedef struct
{
_PyTZINFO_HEAD
unsigned char data[_PyDateTime_DATE_DATASIZE];
} PyDateTime_Date;
#define _PyDateTime_DATETIMEHEAD \
_PyTZINFO_HEAD \
unsigned char data[_PyDateTime_DATETIME_DATASIZE];
typedef struct
{
_PyDateTime_DATETIMEHEAD
} _PyDateTime_BaseDateTime; /* hastzinfo false */
typedef struct
{
_PyDateTime_DATETIMEHEAD
unsigned char fold;
PyObject *tzinfo;
} PyDateTime_DateTime; /* hastzinfo true */
/* Apply for date and datetime instances. */
#define PyDateTime_GET_YEAR(o) ((((PyDateTime_Date*)o)->data[0] << 8) | \
((PyDateTime_Date*)o)->data[1])
#define PyDateTime_GET_MONTH(o) (((PyDateTime_Date*)o)->data[2])
#define PyDateTime_GET_DAY(o) (((PyDateTime_Date*)o)->data[3])
#define PyDateTime_DATE_GET_HOUR(o) (((PyDateTime_DateTime*)o)->data[4])
#define PyDateTime_DATE_GET_MINUTE(o) (((PyDateTime_DateTime*)o)->data[5])
#define PyDateTime_DATE_GET_SECOND(o) (((PyDateTime_DateTime*)o)->data[6])
#define PyDateTime_DATE_GET_MICROSECOND(o) \
((((PyDateTime_DateTime*)o)->data[7] << 16) | \
(((PyDateTime_DateTime*)o)->data[8] << 8) | \
((PyDateTime_DateTime*)o)->data[9])
#define PyDateTime_DATE_GET_FOLD(o) (((PyDateTime_DateTime*)o)->fold)
/* Apply for time instances. */
#define PyDateTime_TIME_GET_HOUR(o) (((PyDateTime_Time*)o)->data[0])
#define PyDateTime_TIME_GET_MINUTE(o) (((PyDateTime_Time*)o)->data[1])
#define PyDateTime_TIME_GET_SECOND(o) (((PyDateTime_Time*)o)->data[2])
#define PyDateTime_TIME_GET_MICROSECOND(o) \
((((PyDateTime_Time*)o)->data[3] << 16) | \
(((PyDateTime_Time*)o)->data[4] << 8) | \
((PyDateTime_Time*)o)->data[5])
#define PyDateTime_TIME_GET_FOLD(o) (((PyDateTime_Time*)o)->fold)
/* Apply for time delta instances */
#define PyDateTime_DELTA_GET_DAYS(o) (((PyDateTime_Delta*)o)->days)
#define PyDateTime_DELTA_GET_SECONDS(o) (((PyDateTime_Delta*)o)->seconds)
#define PyDateTime_DELTA_GET_MICROSECONDS(o) \
(((PyDateTime_Delta*)o)->microseconds)
/* Define structure for C API. */
typedef struct {
/* type objects */
PyTypeObject *DateType;
PyTypeObject *DateTimeType;
PyTypeObject *TimeType;
PyTypeObject *DeltaType;
PyTypeObject *TZInfoType;
/* singletons */
PyObject *TimeZone_UTC;
/* constructors */
PyObject *(*Date_FromDate)(int, int, int, PyTypeObject*);
PyObject *(*DateTime_FromDateAndTime)(int, int, int, int, int, int, int,
PyObject*, PyTypeObject*);
PyObject *(*Time_FromTime)(int, int, int, int, PyObject*, PyTypeObject*);
PyObject *(*Delta_FromDelta)(int, int, int, int, PyTypeObject*);
PyObject *(*TimeZone_FromTimeZone)(PyObject *offset, PyObject *name);
/* constructors for the DB API */
PyObject *(*DateTime_FromTimestamp)(PyObject*, PyObject*, PyObject*);
PyObject *(*Date_FromTimestamp)(PyObject*, PyObject*);
/* PEP 495 constructors */
PyObject *(*DateTime_FromDateAndTimeAndFold)(int, int, int, int, int, int, int,
PyObject*, int, PyTypeObject*);
PyObject *(*Time_FromTimeAndFold)(int, int, int, int, PyObject*, int, PyTypeObject*);
} PyDateTime_CAPI;
#define PyDateTime_CAPSULE_NAME "datetime.datetime_CAPI"
/* This block is only used as part of the public API and should not be
* included in _datetimemodule.c, which does not use the C API capsule.
* See bpo-35081 for more details.
* */
#ifndef _PY_DATETIME_IMPL
/* Define global variable for the C API and a macro for setting it. */
static PyDateTime_CAPI *PyDateTimeAPI = NULL;
#define PyDateTime_IMPORT \
PyDateTimeAPI = (PyDateTime_CAPI *)PyCapsule_Import(PyDateTime_CAPSULE_NAME, 0)
/* Macro for access to the UTC singleton */
#define PyDateTime_TimeZone_UTC PyDateTimeAPI->TimeZone_UTC
/* Macros for type checking when not building the Python core. */
#define PyDate_Check(op) PyObject_TypeCheck(op, PyDateTimeAPI->DateType)
#define PyDate_CheckExact(op) (Py_TYPE(op) == PyDateTimeAPI->DateType)
#define PyDateTime_Check(op) PyObject_TypeCheck(op, PyDateTimeAPI->DateTimeType)
#define PyDateTime_CheckExact(op) (Py_TYPE(op) == PyDateTimeAPI->DateTimeType)
#define PyTime_Check(op) PyObject_TypeCheck(op, PyDateTimeAPI->TimeType)
#define PyTime_CheckExact(op) (Py_TYPE(op) == PyDateTimeAPI->TimeType)
#define PyDelta_Check(op) PyObject_TypeCheck(op, PyDateTimeAPI->DeltaType)
#define PyDelta_CheckExact(op) (Py_TYPE(op) == PyDateTimeAPI->DeltaType)
#define PyTZInfo_Check(op) PyObject_TypeCheck(op, PyDateTimeAPI->TZInfoType)
#define PyTZInfo_CheckExact(op) (Py_TYPE(op) == PyDateTimeAPI->TZInfoType)
/* Macros for accessing constructors in a simplified fashion. */
#define PyDate_FromDate(year, month, day) \
PyDateTimeAPI->Date_FromDate(year, month, day, PyDateTimeAPI->DateType)
#define PyDateTime_FromDateAndTime(year, month, day, hour, min, sec, usec) \
PyDateTimeAPI->DateTime_FromDateAndTime(year, month, day, hour, \
min, sec, usec, Py_None, PyDateTimeAPI->DateTimeType)
#define PyDateTime_FromDateAndTimeAndFold(year, month, day, hour, min, sec, usec, fold) \
PyDateTimeAPI->DateTime_FromDateAndTimeAndFold(year, month, day, hour, \
min, sec, usec, Py_None, fold, PyDateTimeAPI->DateTimeType)
#define PyTime_FromTime(hour, minute, second, usecond) \
PyDateTimeAPI->Time_FromTime(hour, minute, second, usecond, \
Py_None, PyDateTimeAPI->TimeType)
#define PyTime_FromTimeAndFold(hour, minute, second, usecond, fold) \
PyDateTimeAPI->Time_FromTimeAndFold(hour, minute, second, usecond, \
Py_None, fold, PyDateTimeAPI->TimeType)
#define PyDelta_FromDSU(days, seconds, useconds) \
PyDateTimeAPI->Delta_FromDelta(days, seconds, useconds, 1, \
PyDateTimeAPI->DeltaType)
#define PyTimeZone_FromOffset(offset) \
PyDateTimeAPI->TimeZone_FromTimeZone(offset, NULL)
#define PyTimeZone_FromOffsetAndName(offset, name) \
PyDateTimeAPI->TimeZone_FromTimeZone(offset, name)
/* Macros supporting the DB API. */
#define PyDateTime_FromTimestamp(args) \
PyDateTimeAPI->DateTime_FromTimestamp( \
(PyObject*) (PyDateTimeAPI->DateTimeType), args, NULL)
#define PyDate_FromTimestamp(args) \
PyDateTimeAPI->Date_FromTimestamp( \
(PyObject*) (PyDateTimeAPI->DateType), args)
#endif /* !defined(_PY_DATETIME_IMPL) */
#ifdef __cplusplus
}
#endif
#endif
#endif /* !Py_LIMITED_API */
| 9,260
|
C++
|
.h
| 206
| 41.864078
| 89
| 0.68959
|
relativty/Relativty
| 6,445
| 342
| 29
|
GPL-3.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| true
| false
| false
| false
| false
| false
| false
|
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