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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
9,071
|
tree.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/freebsd/tree.hpp
|
/* $NetBSD: tree.h,v 1.8 2004/03/28 19:38:30 provos Exp $ */
/* $OpenBSD: tree.h,v 1.7 2002/10/17 21:51:54 art Exp $ */
/* $FreeBSD$ */
/*-
* Copyright 2002 Niels Provos <provos@citi.umich.edu>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/util/util_type_traits.hpp>
AMS_PRAGMA_BEGIN_OPTIMIZE("-O3")
/*
* This file defines data structures for red-black trees.
*
* A red-black tree is a binary search tree with the node color as an
* extra attribute. It fulfills a set of conditions:
* - every search path from the root to a leaf consists of the
* same number of black nodes,
* - each red node (except for the root) has a black parent,
* - each leaf node is black.
*
* Every operation on a red-black tree is bounded as O(lg n).
* The maximum height of a red-black tree is 2lg (n+1).
*/
namespace ams::freebsd {
enum class RBColor {
RB_BLACK = 0,
RB_RED = 1,
};
#pragma pack(push, 4)
template<typename T>
class RBEntry {
private:
T *m_rbe_left ;
T *m_rbe_right;
T *m_rbe_parent;
RBColor m_rbe_color;
public:
constexpr ALWAYS_INLINE explicit RBEntry(util::ConstantInitializeTag) : m_rbe_left(nullptr), m_rbe_right(nullptr), m_rbe_parent(nullptr), m_rbe_color(RBColor::RB_BLACK) { /* ... */ }
explicit ALWAYS_INLINE RBEntry() { /* ... */ }
[[nodiscard]] constexpr ALWAYS_INLINE T *Left() { return m_rbe_left; }
[[nodiscard]] constexpr ALWAYS_INLINE const T *Left() const { return m_rbe_left; }
constexpr ALWAYS_INLINE void SetLeft(T *e) { m_rbe_left = e; }
[[nodiscard]] constexpr ALWAYS_INLINE T *Right() { return m_rbe_right; }
[[nodiscard]] constexpr ALWAYS_INLINE const T *Right() const { return m_rbe_right; }
constexpr ALWAYS_INLINE void SetRight(T *e) { m_rbe_right = e; }
[[nodiscard]] constexpr ALWAYS_INLINE T *Parent() { return m_rbe_parent; }
[[nodiscard]] constexpr ALWAYS_INLINE const T *Parent() const { return m_rbe_parent; }
constexpr ALWAYS_INLINE void SetParent(T *e) { m_rbe_parent = e; }
[[nodiscard]] constexpr ALWAYS_INLINE bool IsBlack() const { return m_rbe_color == RBColor::RB_BLACK; }
[[nodiscard]] constexpr ALWAYS_INLINE bool IsRed() const { return m_rbe_color == RBColor::RB_RED; }
[[nodiscard]] constexpr ALWAYS_INLINE RBColor Color() const { return m_rbe_color; }
constexpr ALWAYS_INLINE void SetColor(RBColor c) { m_rbe_color = c; }
};
#pragma pack(pop)
template<typename T> struct CheckRBEntry { static constexpr bool value = false; };
template<typename T> struct CheckRBEntry<RBEntry<T>> { static constexpr bool value = true; };
template<typename T>
concept IsRBEntry = CheckRBEntry<T>::value;
template<typename T>
concept HasRBEntry = requires (T &t, const T &ct) {
{ t.GetRBEntry() } -> std::same_as< RBEntry<T> &>;
{ ct.GetRBEntry() } -> std::same_as<const RBEntry<T> &>;
};
template<typename T> requires HasRBEntry<T>
class RBHead {
private:
T *m_rbh_root = nullptr;
public:
[[nodiscard]] constexpr ALWAYS_INLINE T *Root() { return m_rbh_root; }
[[nodiscard]] constexpr ALWAYS_INLINE const T *Root() const { return m_rbh_root; }
constexpr ALWAYS_INLINE void SetRoot(T *root) { m_rbh_root = root; }
[[nodiscard]] constexpr ALWAYS_INLINE bool IsEmpty() const { return this->Root() == nullptr; }
};
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE RBEntry<T> &RB_ENTRY( T *t) { return t->GetRBEntry(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE const RBEntry<T> &RB_ENTRY(const T *t) { return t->GetRBEntry(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE T *RB_LEFT( T *t) { return RB_ENTRY(t).Left(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE const T *RB_LEFT(const T *t) { return RB_ENTRY(t).Left(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE T *RB_RIGHT( T *t) { return RB_ENTRY(t).Right(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE const T *RB_RIGHT(const T *t) { return RB_ENTRY(t).Right(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE T *RB_PARENT( T *t) { return RB_ENTRY(t).Parent(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE const T *RB_PARENT(const T *t) { return RB_ENTRY(t).Parent(); }
template<typename T> requires HasRBEntry<T> constexpr ALWAYS_INLINE void RB_SET_LEFT(T *t, T *e) { RB_ENTRY(t).SetLeft(e); }
template<typename T> requires HasRBEntry<T> constexpr ALWAYS_INLINE void RB_SET_RIGHT(T *t, T *e) { RB_ENTRY(t).SetRight(e); }
template<typename T> requires HasRBEntry<T> constexpr ALWAYS_INLINE void RB_SET_PARENT(T *t, T *e) { RB_ENTRY(t).SetParent(e); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE bool RB_IS_BLACK(const T *t) { return RB_ENTRY(t).IsBlack(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE bool RB_IS_RED(const T *t) { return RB_ENTRY(t).IsRed(); }
template<typename T> requires HasRBEntry<T> [[nodiscard]] constexpr ALWAYS_INLINE RBColor RB_COLOR(const T *t) { return RB_ENTRY(t).Color(); }
template<typename T> requires HasRBEntry<T> constexpr ALWAYS_INLINE void RB_SET_COLOR(T *t, RBColor c) { RB_ENTRY(t).SetColor(c); }
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE void RB_SET(T *elm, T *parent) {
auto &rb_entry = RB_ENTRY(elm);
rb_entry.SetParent(parent);
rb_entry.SetLeft(nullptr);
rb_entry.SetRight(nullptr);
rb_entry.SetColor(RBColor::RB_RED);
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE void RB_SET_BLACKRED(T *black, T *red) {
RB_SET_COLOR(black, RBColor::RB_BLACK);
RB_SET_COLOR(red, RBColor::RB_RED);
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE void RB_ROTATE_LEFT(RBHead<T> &head, T *elm, T *&tmp) {
tmp = RB_RIGHT(elm);
if (RB_SET_RIGHT(elm, RB_LEFT(tmp)); RB_RIGHT(elm) != nullptr) {
RB_SET_PARENT(RB_LEFT(tmp), elm);
}
if (RB_SET_PARENT(tmp, RB_PARENT(elm)); RB_PARENT(tmp) != nullptr) {
if (elm == RB_LEFT(RB_PARENT(elm))) {
RB_SET_LEFT(RB_PARENT(elm), tmp);
} else {
RB_SET_RIGHT(RB_PARENT(elm), tmp);
}
} else {
head.SetRoot(tmp);
}
RB_SET_LEFT(tmp, elm);
RB_SET_PARENT(elm, tmp);
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE void RB_ROTATE_RIGHT(RBHead<T> &head, T *elm, T *&tmp) {
tmp = RB_LEFT(elm);
if (RB_SET_LEFT(elm, RB_RIGHT(tmp)); RB_LEFT(elm) != nullptr) {
RB_SET_PARENT(RB_RIGHT(tmp), elm);
}
if (RB_SET_PARENT(tmp, RB_PARENT(elm)); RB_PARENT(tmp) != nullptr) {
if (elm == RB_LEFT(RB_PARENT(elm))) {
RB_SET_LEFT(RB_PARENT(elm), tmp);
} else {
RB_SET_RIGHT(RB_PARENT(elm), tmp);
}
} else {
head.SetRoot(tmp);
}
RB_SET_RIGHT(tmp, elm);
RB_SET_PARENT(elm, tmp);
}
template <typename T> requires HasRBEntry<T>
constexpr void RB_REMOVE_COLOR(RBHead<T> &head, T *parent, T *elm) {
T *tmp;
while ((elm == nullptr || RB_IS_BLACK(elm)) && elm != head.Root()) {
if (RB_LEFT(parent) == elm) {
tmp = RB_RIGHT(parent);
if (RB_IS_RED(tmp)) {
RB_SET_BLACKRED(tmp, parent);
RB_ROTATE_LEFT(head, parent, tmp);
tmp = RB_RIGHT(parent);
}
if ((RB_LEFT(tmp) == nullptr || RB_IS_BLACK(RB_LEFT(tmp))) &&
(RB_RIGHT(tmp) == nullptr || RB_IS_BLACK(RB_RIGHT(tmp)))) {
RB_SET_COLOR(tmp, RBColor::RB_RED);
elm = parent;
parent = RB_PARENT(elm);
} else {
if (RB_RIGHT(tmp) == nullptr || RB_IS_BLACK(RB_RIGHT(tmp))) {
T *oleft;
if ((oleft = RB_LEFT(tmp)) != nullptr) {
RB_SET_COLOR(oleft, RBColor::RB_BLACK);
}
RB_SET_COLOR(tmp, RBColor::RB_RED);
RB_ROTATE_RIGHT(head, tmp, oleft);
tmp = RB_RIGHT(parent);
}
RB_SET_COLOR(tmp, RB_COLOR(parent));
RB_SET_COLOR(parent, RBColor::RB_BLACK);
if (RB_RIGHT(tmp)) {
RB_SET_COLOR(RB_RIGHT(tmp), RBColor::RB_BLACK);
}
RB_ROTATE_LEFT(head, parent, tmp);
elm = head.Root();
break;
}
} else {
tmp = RB_LEFT(parent);
if (RB_IS_RED(tmp)) {
RB_SET_BLACKRED(tmp, parent);
RB_ROTATE_RIGHT(head, parent, tmp);
tmp = RB_LEFT(parent);
}
if ((RB_LEFT(tmp) == nullptr || RB_IS_BLACK(RB_LEFT(tmp))) &&
(RB_RIGHT(tmp) == nullptr || RB_IS_BLACK(RB_RIGHT(tmp)))) {
RB_SET_COLOR(tmp, RBColor::RB_RED);
elm = parent;
parent = RB_PARENT(elm);
} else {
if (RB_LEFT(tmp) == nullptr || RB_IS_BLACK(RB_LEFT(tmp))) {
T *oright;
if ((oright = RB_RIGHT(tmp)) != nullptr) {
RB_SET_COLOR(oright, RBColor::RB_BLACK);
}
RB_SET_COLOR(tmp, RBColor::RB_RED);
RB_ROTATE_LEFT(head, tmp, oright);
tmp = RB_LEFT(parent);
}
RB_SET_COLOR(tmp, RB_COLOR(parent));
RB_SET_COLOR(parent, RBColor::RB_BLACK);
if (RB_LEFT(tmp)) {
RB_SET_COLOR(RB_LEFT(tmp), RBColor::RB_BLACK);
}
RB_ROTATE_RIGHT(head, parent, tmp);
elm = head.Root();
break;
}
}
}
if (elm) {
RB_SET_COLOR(elm, RBColor::RB_BLACK);
}
}
template <typename T> requires HasRBEntry<T>
constexpr T *RB_REMOVE(RBHead<T> &head, T *elm) {
T *child = nullptr;
T *parent = nullptr;
T *old = elm;
RBColor color = RBColor::RB_BLACK;
if (RB_LEFT(elm) == nullptr) {
child = RB_RIGHT(elm);
} else if (RB_RIGHT(elm) == nullptr) {
child = RB_LEFT(elm);
} else {
T *left;
elm = RB_RIGHT(elm);
while ((left = RB_LEFT(elm)) != nullptr) {
elm = left;
}
child = RB_RIGHT(elm);
parent = RB_PARENT(elm);
color = RB_COLOR(elm);
if (child) {
RB_SET_PARENT(child, parent);
}
if (parent) {
if (RB_LEFT(parent) == elm) {
RB_SET_LEFT(parent, child);
} else {
RB_SET_RIGHT(parent, child);
}
} else {
head.SetRoot(child);
}
if (RB_PARENT(elm) == old) {
parent = elm;
}
elm->SetRBEntry(old->GetRBEntry());
if (RB_PARENT(old)) {
if (RB_LEFT(RB_PARENT(old)) == old) {
RB_SET_LEFT(RB_PARENT(old), elm);
} else {
RB_SET_RIGHT(RB_PARENT(old), elm);
}
} else {
head.SetRoot(elm);
}
RB_SET_PARENT(RB_LEFT(old), elm);
if (RB_RIGHT(old)) {
RB_SET_PARENT(RB_RIGHT(old), elm);
}
if (parent) {
left = parent;
}
if (color == RBColor::RB_BLACK) {
RB_REMOVE_COLOR(head, parent, child);
}
return old;
}
parent = RB_PARENT(elm);
color = RB_COLOR(elm);
if (child) {
RB_SET_PARENT(child, parent);
}
if (parent) {
if (RB_LEFT(parent) == elm) {
RB_SET_LEFT(parent, child);
} else {
RB_SET_RIGHT(parent, child);
}
} else {
head.SetRoot(child);
}
if (color == RBColor::RB_BLACK) {
RB_REMOVE_COLOR(head, parent, child);
}
return old;
}
template<typename T> requires HasRBEntry<T>
constexpr void RB_INSERT_COLOR(RBHead<T> &head, T *elm) {
T *parent = nullptr, *tmp = nullptr;
while ((parent = RB_PARENT(elm)) != nullptr && RB_IS_RED(parent)) {
T *gparent = RB_PARENT(parent);
if (parent == RB_LEFT(gparent)) {
tmp = RB_RIGHT(gparent);
if (tmp && RB_IS_RED(tmp)) {
RB_SET_COLOR(tmp, RBColor::RB_BLACK);
RB_SET_BLACKRED(parent, gparent);
elm = gparent;
continue;
}
if (RB_RIGHT(parent) == elm) {
RB_ROTATE_LEFT(head, parent, tmp);
tmp = parent;
parent = elm;
elm = tmp;
}
RB_SET_BLACKRED(parent, gparent);
RB_ROTATE_RIGHT(head, gparent, tmp);
} else {
tmp = RB_LEFT(gparent);
if (tmp && RB_IS_RED(tmp)) {
RB_SET_COLOR(tmp, RBColor::RB_BLACK);
RB_SET_BLACKRED(parent, gparent);
elm = gparent;
continue;
}
if (RB_LEFT(parent) == elm) {
RB_ROTATE_RIGHT(head, parent, tmp);
tmp = parent;
parent = elm;
elm = tmp;
}
RB_SET_BLACKRED(parent, gparent);
RB_ROTATE_LEFT(head, gparent, tmp);
}
}
RB_SET_COLOR(head.Root(), RBColor::RB_BLACK);
}
template <typename T, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_INSERT(RBHead<T> &head, T *elm, Compare cmp) {
T *parent = nullptr;
T *tmp = head.Root();
int comp = 0;
while (tmp) {
parent = tmp;
comp = cmp(elm, parent);
if (comp < 0) {
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
RB_SET(elm, parent);
if (parent != nullptr) {
if (comp < 0) {
RB_SET_LEFT(parent, elm);
} else {
RB_SET_RIGHT(parent, elm);
}
} else {
head.SetRoot(elm);
}
RB_INSERT_COLOR(head, elm);
return nullptr;
}
template<typename T, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_FIND(RBHead<T> &head, T *elm, Compare cmp) {
T *tmp = head.Root();
while (tmp) {
const int comp = cmp(elm, tmp);
if (comp < 0) {
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
return nullptr;
}
template<typename T, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_NFIND(RBHead<T> &head, T *elm, Compare cmp) {
T *tmp = head.Root();
T* res = nullptr;
while (tmp) {
const int comp = cmp(elm, tmp);
if (comp < 0) {
res = tmp;
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
return res;
}
template<typename T, typename U, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_FIND_KEY(RBHead<T> &head, const U &key, Compare cmp) {
T *tmp = head.Root();
while (tmp) {
const int comp = cmp(key, tmp);
if (comp < 0) {
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
return nullptr;
}
template<typename T, typename U, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_NFIND_KEY(RBHead<T> &head, const U &key, Compare cmp) {
T *tmp = head.Root();
T* res = nullptr;
while (tmp) {
const int comp = cmp(key, tmp);
if (comp < 0) {
res = tmp;
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
return res;
}
template<typename T, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_FIND_EXISTING(RBHead<T> &head, T *elm, Compare cmp) {
T *tmp = head.Root();
while (true) {
const int comp = cmp(elm, tmp);
if (comp < 0) {
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
}
template<typename T, typename U, typename Compare> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_FIND_EXISTING_KEY(RBHead<T> &head, const U &key, Compare cmp) {
T *tmp = head.Root();
while (true) {
const int comp = cmp(key, tmp);
if (comp < 0) {
tmp = RB_LEFT(tmp);
} else if (comp > 0) {
tmp = RB_RIGHT(tmp);
} else {
return tmp;
}
}
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_NEXT(T *elm) {
if (RB_RIGHT(elm)) {
elm = RB_RIGHT(elm);
while (RB_LEFT(elm)) {
elm = RB_LEFT(elm);
}
} else {
if (RB_PARENT(elm) && (elm == RB_LEFT(RB_PARENT(elm)))) {
elm = RB_PARENT(elm);
} else {
while (RB_PARENT(elm) && (elm == RB_RIGHT(RB_PARENT(elm)))) {
elm = RB_PARENT(elm);
}
elm = RB_PARENT(elm);
}
}
return elm;
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_PREV(T *elm) {
if (RB_LEFT(elm)) {
elm = RB_LEFT(elm);
while (RB_RIGHT(elm)) {
elm = RB_RIGHT(elm);
}
} else {
if (RB_PARENT(elm) && (elm == RB_RIGHT(RB_PARENT(elm)))) {
elm = RB_PARENT(elm);
} else {
while (RB_PARENT(elm) && (elm == RB_LEFT(RB_PARENT(elm)))) {
elm = RB_PARENT(elm);
}
elm = RB_PARENT(elm);
}
}
return elm;
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_MIN(RBHead<T> &head) {
T *tmp = head.Root();
T *parent = nullptr;
while (tmp) {
parent = tmp;
tmp = RB_LEFT(tmp);
}
return parent;
}
template<typename T> requires HasRBEntry<T>
constexpr ALWAYS_INLINE T *RB_MAX(RBHead<T> &head) {
T *tmp = head.Root();
T *parent = nullptr;
while (tmp) {
parent = tmp;
tmp = RB_RIGHT(tmp);
}
return parent;
}
}
AMS_PRAGMA_END_OPTIMIZE()
| 22,054
|
C++
|
.h
| 528
| 29.9375
| 194
| 0.515309
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,072
|
ams_api_version.h
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/ams/ams_api_version.h
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#define ATMOSPHERE_RELEASE_VERSION_MAJOR 1
#define ATMOSPHERE_RELEASE_VERSION_MINOR 8
#define ATMOSPHERE_RELEASE_VERSION_MICRO 0
#define ATMOSPHERE_RELEASE_VERSION ATMOSPHERE_RELEASE_VERSION_MAJOR, ATMOSPHERE_RELEASE_VERSION_MINOR, ATMOSPHERE_RELEASE_VERSION_MICRO
#define ATMOSPHERE_SUPPORTED_HOS_VERSION_MAJOR 19
#define ATMOSPHERE_SUPPORTED_HOS_VERSION_MINOR 0
#define ATMOSPHERE_SUPPORTED_HOS_VERSION_MICRO 0
| 1,073
|
C++
|
.h
| 23
| 44.913043
| 135
| 0.790831
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,073
|
ams_target_firmware.h
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/ams/ams_target_firmware.h
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#define ATMOSPHERE_TARGET_FIRMWARE_WITH_REVISION(major, minor, micro, rev) ((major << 24) | (minor << 16) | (micro << 8) | (rev))
#define ATMOSPHERE_TARGET_FIRMWARE(major, minor, micro) ATMOSPHERE_TARGET_FIRMWARE_WITH_REVISION(major, minor, micro, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_1_0_0 ATMOSPHERE_TARGET_FIRMWARE( 1, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_2_0_0 ATMOSPHERE_TARGET_FIRMWARE( 2, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_2_1_0 ATMOSPHERE_TARGET_FIRMWARE( 2, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_2_2_0 ATMOSPHERE_TARGET_FIRMWARE( 2, 2, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_2_3_0 ATMOSPHERE_TARGET_FIRMWARE( 2, 3, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_3_0_0 ATMOSPHERE_TARGET_FIRMWARE( 3, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_3_0_1 ATMOSPHERE_TARGET_FIRMWARE( 3, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_3_0_2 ATMOSPHERE_TARGET_FIRMWARE( 3, 0, 2)
#define ATMOSPHERE_TARGET_FIRMWARE_4_0_0 ATMOSPHERE_TARGET_FIRMWARE( 4, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_4_0_1 ATMOSPHERE_TARGET_FIRMWARE( 4, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_4_1_0 ATMOSPHERE_TARGET_FIRMWARE( 4, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_5_0_0 ATMOSPHERE_TARGET_FIRMWARE( 5, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_5_0_1 ATMOSPHERE_TARGET_FIRMWARE( 5, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_5_0_2 ATMOSPHERE_TARGET_FIRMWARE( 5, 0, 2)
#define ATMOSPHERE_TARGET_FIRMWARE_5_1_0 ATMOSPHERE_TARGET_FIRMWARE( 5, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_6_0_0 ATMOSPHERE_TARGET_FIRMWARE( 6, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_6_0_1 ATMOSPHERE_TARGET_FIRMWARE( 6, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_6_1_0 ATMOSPHERE_TARGET_FIRMWARE( 6, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_6_2_0 ATMOSPHERE_TARGET_FIRMWARE( 6, 2, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_7_0_0 ATMOSPHERE_TARGET_FIRMWARE( 7, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_7_0_1 ATMOSPHERE_TARGET_FIRMWARE( 7, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_8_0_0 ATMOSPHERE_TARGET_FIRMWARE( 8, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_8_0_1 ATMOSPHERE_TARGET_FIRMWARE( 8, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_8_1_0 ATMOSPHERE_TARGET_FIRMWARE( 8, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_8_1_1 ATMOSPHERE_TARGET_FIRMWARE( 8, 1, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_9_0_0 ATMOSPHERE_TARGET_FIRMWARE( 9, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_9_0_1 ATMOSPHERE_TARGET_FIRMWARE( 9, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_9_1_0 ATMOSPHERE_TARGET_FIRMWARE( 9, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_9_2_0 ATMOSPHERE_TARGET_FIRMWARE( 9, 2, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_10_0_0 ATMOSPHERE_TARGET_FIRMWARE(10, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_10_0_1 ATMOSPHERE_TARGET_FIRMWARE(10, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_10_0_2 ATMOSPHERE_TARGET_FIRMWARE(10, 0, 2)
#define ATMOSPHERE_TARGET_FIRMWARE_10_0_3 ATMOSPHERE_TARGET_FIRMWARE(10, 0, 3)
#define ATMOSPHERE_TARGET_FIRMWARE_10_0_4 ATMOSPHERE_TARGET_FIRMWARE(10, 0, 4)
#define ATMOSPHERE_TARGET_FIRMWARE_10_1_0 ATMOSPHERE_TARGET_FIRMWARE(10, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_10_1_1 ATMOSPHERE_TARGET_FIRMWARE(10, 1, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_10_2_0 ATMOSPHERE_TARGET_FIRMWARE(10, 2, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_11_0_0 ATMOSPHERE_TARGET_FIRMWARE(11, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_11_0_1 ATMOSPHERE_TARGET_FIRMWARE(11, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_12_0_0 ATMOSPHERE_TARGET_FIRMWARE(12, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_12_0_1 ATMOSPHERE_TARGET_FIRMWARE(12, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_12_0_2 ATMOSPHERE_TARGET_FIRMWARE(12, 0, 2)
#define ATMOSPHERE_TARGET_FIRMWARE_12_0_3 ATMOSPHERE_TARGET_FIRMWARE(12, 0, 3)
#define ATMOSPHERE_TARGET_FIRMWARE_12_1_0 ATMOSPHERE_TARGET_FIRMWARE(12, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_13_0_0 ATMOSPHERE_TARGET_FIRMWARE(13, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_13_1_0 ATMOSPHERE_TARGET_FIRMWARE(13, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_13_2_0 ATMOSPHERE_TARGET_FIRMWARE(13, 2, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_13_2_1 ATMOSPHERE_TARGET_FIRMWARE(13, 2, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_14_0_0 ATMOSPHERE_TARGET_FIRMWARE(14, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_14_1_0 ATMOSPHERE_TARGET_FIRMWARE(14, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_14_1_1 ATMOSPHERE_TARGET_FIRMWARE(14, 1, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_14_1_2 ATMOSPHERE_TARGET_FIRMWARE(14, 1, 2)
#define ATMOSPHERE_TARGET_FIRMWARE_15_0_0 ATMOSPHERE_TARGET_FIRMWARE(15, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_15_0_1 ATMOSPHERE_TARGET_FIRMWARE(15, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_16_0_0 ATMOSPHERE_TARGET_FIRMWARE(16, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_16_0_1 ATMOSPHERE_TARGET_FIRMWARE(16, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_16_0_2 ATMOSPHERE_TARGET_FIRMWARE(16, 0, 2)
#define ATMOSPHERE_TARGET_FIRMWARE_16_0_3 ATMOSPHERE_TARGET_FIRMWARE(16, 0, 3)
#define ATMOSPHERE_TARGET_FIRMWARE_16_1_0 ATMOSPHERE_TARGET_FIRMWARE(16, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_17_0_0 ATMOSPHERE_TARGET_FIRMWARE(17, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_17_0_1 ATMOSPHERE_TARGET_FIRMWARE(17, 0, 1)
#define ATMOSPHERE_TARGET_FIRMWARE_18_0_0 ATMOSPHERE_TARGET_FIRMWARE(18, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_18_1_0 ATMOSPHERE_TARGET_FIRMWARE(18, 1, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_19_0_0 ATMOSPHERE_TARGET_FIRMWARE(19, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_CURRENT ATMOSPHERE_TARGET_FIRMWARE_19_0_0
#define ATMOSPHERE_TARGET_FIRMWARE_MIN ATMOSPHERE_TARGET_FIRMWARE(0, 0, 0)
#define ATMOSPHERE_TARGET_FIRMWARE_MAX ATMOSPHERE_TARGET_FIRMWARE_CURRENT
#ifdef __cplusplus
namespace ams {
enum TargetFirmware : u32 {
TargetFirmware_Min = ATMOSPHERE_TARGET_FIRMWARE_MIN,
TargetFirmware_1_0_0 = ATMOSPHERE_TARGET_FIRMWARE_1_0_0,
TargetFirmware_2_0_0 = ATMOSPHERE_TARGET_FIRMWARE_2_0_0,
TargetFirmware_2_1_0 = ATMOSPHERE_TARGET_FIRMWARE_2_1_0,
TargetFirmware_2_2_0 = ATMOSPHERE_TARGET_FIRMWARE_2_2_0,
TargetFirmware_2_3_0 = ATMOSPHERE_TARGET_FIRMWARE_2_3_0,
TargetFirmware_3_0_0 = ATMOSPHERE_TARGET_FIRMWARE_3_0_0,
TargetFirmware_3_0_1 = ATMOSPHERE_TARGET_FIRMWARE_3_0_1,
TargetFirmware_3_0_2 = ATMOSPHERE_TARGET_FIRMWARE_3_0_2,
TargetFirmware_4_0_0 = ATMOSPHERE_TARGET_FIRMWARE_4_0_0,
TargetFirmware_4_0_1 = ATMOSPHERE_TARGET_FIRMWARE_4_0_1,
TargetFirmware_4_1_0 = ATMOSPHERE_TARGET_FIRMWARE_4_1_0,
TargetFirmware_5_0_0 = ATMOSPHERE_TARGET_FIRMWARE_5_0_0,
TargetFirmware_5_0_1 = ATMOSPHERE_TARGET_FIRMWARE_5_0_1,
TargetFirmware_5_0_2 = ATMOSPHERE_TARGET_FIRMWARE_5_0_2,
TargetFirmware_5_1_0 = ATMOSPHERE_TARGET_FIRMWARE_5_1_0,
TargetFirmware_6_0_0 = ATMOSPHERE_TARGET_FIRMWARE_6_0_0,
TargetFirmware_6_0_1 = ATMOSPHERE_TARGET_FIRMWARE_6_0_1,
TargetFirmware_6_1_0 = ATMOSPHERE_TARGET_FIRMWARE_6_1_0,
TargetFirmware_6_2_0 = ATMOSPHERE_TARGET_FIRMWARE_6_2_0,
TargetFirmware_7_0_0 = ATMOSPHERE_TARGET_FIRMWARE_7_0_0,
TargetFirmware_7_0_1 = ATMOSPHERE_TARGET_FIRMWARE_7_0_1,
TargetFirmware_8_0_0 = ATMOSPHERE_TARGET_FIRMWARE_8_0_0,
TargetFirmware_8_0_1 = ATMOSPHERE_TARGET_FIRMWARE_8_0_1,
TargetFirmware_8_1_0 = ATMOSPHERE_TARGET_FIRMWARE_8_1_0,
TargetFirmware_8_1_1 = ATMOSPHERE_TARGET_FIRMWARE_8_1_1,
TargetFirmware_9_0_0 = ATMOSPHERE_TARGET_FIRMWARE_9_0_0,
TargetFirmware_9_0_1 = ATMOSPHERE_TARGET_FIRMWARE_9_0_1,
TargetFirmware_9_1_0 = ATMOSPHERE_TARGET_FIRMWARE_9_1_0,
TargetFirmware_9_2_0 = ATMOSPHERE_TARGET_FIRMWARE_9_2_0,
TargetFirmware_10_0_0 = ATMOSPHERE_TARGET_FIRMWARE_10_0_0,
TargetFirmware_10_0_1 = ATMOSPHERE_TARGET_FIRMWARE_10_0_1,
TargetFirmware_10_0_2 = ATMOSPHERE_TARGET_FIRMWARE_10_0_2,
TargetFirmware_10_0_3 = ATMOSPHERE_TARGET_FIRMWARE_10_0_3,
TargetFirmware_10_0_4 = ATMOSPHERE_TARGET_FIRMWARE_10_0_4,
TargetFirmware_10_1_0 = ATMOSPHERE_TARGET_FIRMWARE_10_1_0,
TargetFirmware_10_1_1 = ATMOSPHERE_TARGET_FIRMWARE_10_1_1,
TargetFirmware_10_2_0 = ATMOSPHERE_TARGET_FIRMWARE_10_2_0,
TargetFirmware_11_0_0 = ATMOSPHERE_TARGET_FIRMWARE_11_0_0,
TargetFirmware_11_0_1 = ATMOSPHERE_TARGET_FIRMWARE_11_0_1,
TargetFirmware_12_0_0 = ATMOSPHERE_TARGET_FIRMWARE_12_0_0,
TargetFirmware_12_0_1 = ATMOSPHERE_TARGET_FIRMWARE_12_0_1,
TargetFirmware_12_0_2 = ATMOSPHERE_TARGET_FIRMWARE_12_0_2,
TargetFirmware_12_0_3 = ATMOSPHERE_TARGET_FIRMWARE_12_0_3,
TargetFirmware_12_1_0 = ATMOSPHERE_TARGET_FIRMWARE_12_1_0,
TargetFirmware_13_0_0 = ATMOSPHERE_TARGET_FIRMWARE_13_0_0,
TargetFirmware_13_1_0 = ATMOSPHERE_TARGET_FIRMWARE_13_1_0,
TargetFirmware_13_2_0 = ATMOSPHERE_TARGET_FIRMWARE_13_2_0,
TargetFirmware_13_2_1 = ATMOSPHERE_TARGET_FIRMWARE_13_2_1,
TargetFirmware_14_0_0 = ATMOSPHERE_TARGET_FIRMWARE_14_0_0,
TargetFirmware_14_1_0 = ATMOSPHERE_TARGET_FIRMWARE_14_1_0,
TargetFirmware_14_1_1 = ATMOSPHERE_TARGET_FIRMWARE_14_1_1,
TargetFirmware_14_1_2 = ATMOSPHERE_TARGET_FIRMWARE_14_1_2,
TargetFirmware_15_0_0 = ATMOSPHERE_TARGET_FIRMWARE_15_0_0,
TargetFirmware_15_0_1 = ATMOSPHERE_TARGET_FIRMWARE_15_0_1,
TargetFirmware_16_0_0 = ATMOSPHERE_TARGET_FIRMWARE_16_0_0,
TargetFirmware_16_0_1 = ATMOSPHERE_TARGET_FIRMWARE_16_0_1,
TargetFirmware_16_0_2 = ATMOSPHERE_TARGET_FIRMWARE_16_0_2,
TargetFirmware_16_0_3 = ATMOSPHERE_TARGET_FIRMWARE_16_0_3,
TargetFirmware_16_1_0 = ATMOSPHERE_TARGET_FIRMWARE_16_1_0,
TargetFirmware_17_0_0 = ATMOSPHERE_TARGET_FIRMWARE_17_0_0,
TargetFirmware_17_0_1 = ATMOSPHERE_TARGET_FIRMWARE_17_0_1,
TargetFirmware_18_0_0 = ATMOSPHERE_TARGET_FIRMWARE_18_0_0,
TargetFirmware_18_1_0 = ATMOSPHERE_TARGET_FIRMWARE_18_1_0,
TargetFirmware_19_0_0 = ATMOSPHERE_TARGET_FIRMWARE_19_0_0,
TargetFirmware_Current = ATMOSPHERE_TARGET_FIRMWARE_CURRENT,
TargetFirmware_Max = ATMOSPHERE_TARGET_FIRMWARE_MAX,
};
static_assert(TargetFirmware_Current <= TargetFirmware_Max);
}
#endif
| 10,992
|
C++
|
.h
| 159
| 64.515723
| 129
| 0.728835
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,074
|
ams_fatal_error_context.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/ams/ams_fatal_error_context.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/includes.hpp>
#include <vapours/defines.hpp>
namespace ams::impl {
struct FatalErrorContext {
static constexpr size_t MaxStackTrace = 0x20;
static constexpr size_t MaxStackDumpSize = 0x100;
static constexpr size_t ThreadLocalSize = 0x100;
static constexpr size_t NumGprs = 29;
static constexpr uintptr_t StdAbortMagicAddress = 0x8;
static constexpr u64 StdAbortMagicValue = 0xA55AF00DDEADCAFEul;
static constexpr u32 StdAbortErrorDesc = 0xFFE;
static constexpr u32 StackOverflowErrorDesc = 0xFFD;
static constexpr u32 KernelPanicDesc = 0xF00;
static constexpr u32 DataAbortErrorDesc = 0x101;
static constexpr u32 Magic = util::FourCC<'A', 'F', 'E', '2'>::Code;
u32 magic;
u32 error_desc;
u64 program_id;
union {
u64 gprs[32];
struct {
u64 _gprs[29];
u64 fp;
u64 lr;
u64 sp;
};
};
u64 pc;
u64 module_base;
u32 pstate;
u32 afsr0;
u32 afsr1;
u32 esr;
u64 far;
u64 report_identifier; /* Normally just system tick. */
u64 stack_trace_size;
u64 stack_dump_size;
u64 stack_trace[MaxStackTrace];
u8 stack_dump[MaxStackDumpSize];
u8 tls[ThreadLocalSize];
};
static_assert(sizeof(FatalErrorContext) == 0x450);
static_assert(std::is_standard_layout<FatalErrorContext>::value);
static_assert(std::is_trivial<FatalErrorContext>::value);
}
| 2,287
|
C++
|
.h
| 61
| 30.409836
| 82
| 0.647456
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,075
|
dd_cache.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/dd/dd_cache.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/dd/dd_common_types.hpp>
namespace ams::dd {
void InvalidateDataCache(void *addr, size_t size);
void StoreDataCache(void *addr, size_t size);
void FlushDataCache(void *addr, size_t size);
}
| 870
|
C++
|
.h
| 22
| 37.227273
| 76
| 0.751479
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,076
|
dd_common_types.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/dd/dd_common_types.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/results.hpp>
namespace ams::dd {
using PhysicalAddress = u64;
using DeviceVirtualAddress = u64;
#if defined(ATMOSPHERE_OS_HORIZON)
static_assert(std::same_as<PhysicalAddress, ams::svc::PhysicalAddress>);
#endif
}
| 969
|
C++
|
.h
| 26
| 34.769231
| 76
| 0.750533
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,077
|
dd_io_mapping.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/dd/dd_io_mapping.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/dd/dd_common_types.hpp>
namespace ams::dd {
uintptr_t QueryIoMapping(dd::PhysicalAddress phys_addr, size_t size);
u32 ReadIoRegister(dd::PhysicalAddress phys_addr);
void WriteIoRegister(dd::PhysicalAddress phys_addr, u32 value);
u32 ReadModifyWriteIoRegister(PhysicalAddress phys_addr, u32 value, u32 mask);
}
| 996
|
C++
|
.h
| 23
| 40.826087
| 82
| 0.764706
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,078
|
svc_definitions.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_definitions.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#include <vapours/svc/svc_types.hpp>
#include <vapours/svc/svc_definition_macro.hpp>
#define AMS_SVC_KERN_INPUT_HANDLER(TYPE, NAME) TYPE NAME
#define AMS_SVC_KERN_OUTPUT_HANDLER(TYPE, NAME) TYPE *NAME
#define AMS_SVC_KERN_INPTR_HANDLER(TYPE, NAME) ::ams::kern::svc::KUserPointer<const TYPE *> NAME
#define AMS_SVC_KERN_OUTPTR_HANDLER(TYPE, NAME) ::ams::kern::svc::KUserPointer<TYPE *> NAME
#define AMS_SVC_USER_INPUT_HANDLER(TYPE, NAME) TYPE NAME
#define AMS_SVC_USER_OUTPUT_HANDLER(TYPE, NAME) TYPE *NAME
#define AMS_SVC_USER_INPTR_HANDLER(TYPE, NAME) ::ams::svc::UserPointer<const TYPE *> NAME
#define AMS_SVC_USER_OUTPTR_HANDLER(TYPE, NAME) ::ams::svc::UserPointer<TYPE *> NAME
#define AMS_SVC_FOREACH_USER_DEFINITION(HANDLER, NAMESPACE) AMS_SVC_FOREACH_DEFINITION_IMPL(HANDLER, NAMESPACE, AMS_SVC_USER_INPUT_HANDLER, AMS_SVC_USER_OUTPUT_HANDLER, AMS_SVC_USER_INPTR_HANDLER, AMS_SVC_USER_OUTPTR_HANDLER)
#define AMS_SVC_FOREACH_KERN_DEFINITION(HANDLER, NAMESPACE) AMS_SVC_FOREACH_DEFINITION_IMPL(HANDLER, NAMESPACE, AMS_SVC_KERN_INPUT_HANDLER, AMS_SVC_KERN_OUTPUT_HANDLER, AMS_SVC_KERN_INPTR_HANDLER, AMS_SVC_KERN_OUTPTR_HANDLER)
#define AMS_SVC_DECLARE_FUNCTION_PROTOTYPE(ID, RETURN_TYPE, NAME, ...) \
RETURN_TYPE NAME(__VA_ARGS__);
namespace ams::svc {
#define AMS_SVC_DEFINE_ID_ENUM_MEMBER(ID, RETURN_TYPE, NAME, ...) \
SvcId_##NAME = ID,
enum SvcId : u32 {
AMS_SVC_FOREACH_KERN_DEFINITION(AMS_SVC_DEFINE_ID_ENUM_MEMBER, _)
};
#undef AMS_SVC_DEFINE_ID_ENUM_MEMBER
}
#ifdef ATMOSPHERE_IS_STRATOSPHERE
namespace ams::svc {
namespace aarch64::lp64 {
AMS_SVC_FOREACH_USER_DEFINITION(AMS_SVC_DECLARE_FUNCTION_PROTOTYPE, lp64)
}
namespace aarch64::ilp32 {
AMS_SVC_FOREACH_USER_DEFINITION(AMS_SVC_DECLARE_FUNCTION_PROTOTYPE, ilp32)
}
namespace aarch32 {
AMS_SVC_FOREACH_USER_DEFINITION(AMS_SVC_DECLARE_FUNCTION_PROTOTYPE, ilp32)
}
}
/* NOTE: Change this to 1 to test the SVC definitions for user-pointer validity. */
#if 0
namespace ams::svc::test {
namespace impl {
template<typename... Ts>
struct Validator {
private:
std::array<bool, sizeof...(Ts)> m_valid;
public:
constexpr Validator(Ts... args) : m_valid{static_cast<bool>(args)...} { /* ... */ }
constexpr bool IsValid() const {
for (size_t i = 0; i < sizeof...(Ts); i++) {
if (!m_valid[i]) {
return false;
}
}
return true;
}
};
}
#define AMS_SVC_TEST_EMPTY_HANDLER(TYPE, NAME) true
#define AMS_SVC_TEST_INPTR_HANDLER(TYPE, NAME) (sizeof(::ams::svc::UserPointer<const TYPE *>) == sizeof(uintptr_t) && std::is_trivially_destructible<::ams::svc::UserPointer<const TYPE *>>::value)
#define AMS_SVC_TEST_OUTPTR_HANDLER(TYPE, NAME) (sizeof(::ams::svc::UserPointer<TYPE *>) == sizeof(uintptr_t) && std::is_trivially_destructible<::ams::svc::UserPointer<TYPE *>>::value)
#define AMS_SVC_TEST_VERIFY_USER_POINTERS(ID, RETURN_TYPE, NAME, ...) \
static_assert(impl::Validator(__VA_ARGS__).IsValid(), "Invalid User Pointer in svc::" #NAME);
AMS_SVC_FOREACH_DEFINITION_IMPL(AMS_SVC_TEST_VERIFY_USER_POINTERS, lp64, AMS_SVC_TEST_EMPTY_HANDLER, AMS_SVC_TEST_EMPTY_HANDLER, AMS_SVC_TEST_INPTR_HANDLER, AMS_SVC_TEST_OUTPTR_HANDLER);
AMS_SVC_FOREACH_DEFINITION_IMPL(AMS_SVC_TEST_VERIFY_USER_POINTERS, ilp32, AMS_SVC_TEST_EMPTY_HANDLER, AMS_SVC_TEST_EMPTY_HANDLER, AMS_SVC_TEST_INPTR_HANDLER, AMS_SVC_TEST_OUTPTR_HANDLER);
#undef AMS_SVC_TEST_VERIFY_USER_POINTERS
#undef AMS_SVC_TEST_INPTR_HANDLER
#undef AMS_SVC_TEST_OUTPTR_HANDLER
#undef AMS_SVC_TEST_EMPTY_HANDLER
}
#endif
#endif /* ATMOSPHERE_IS_STRATOSPHERE */
| 4,569
|
C++
|
.h
| 85
| 47.670588
| 225
| 0.688989
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,079
|
svc_memory_map.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_memory_map.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
namespace ams::svc {
#if defined(ATMOSPHERE_ARCH_ARM64)
constexpr inline size_t AddressMemoryRegionSmall32Size = 1_GB;
constexpr inline size_t AddressMemoryRegionLarge32Size = 4_GB - AddressMemoryRegionSmall32Size;
constexpr inline size_t AddressMemoryRegionHeap32Size = 1_GB;
constexpr inline size_t AddressMemoryRegionAlias32Size = 1_GB;
constexpr inline size_t AddressMemoryRegionSmall36Size = 2_GB;
constexpr inline size_t AddressMemoryRegionLarge36Size = 64_GB - AddressMemoryRegionSmall36Size;
constexpr inline size_t AddressMemoryRegionHeap36Size = 8_GB;
constexpr inline size_t AddressMemoryRegionAlias36Size = 6_GB;
constexpr inline size_t AddressMemoryRegionSmall39Size = 64_GB;
constexpr inline size_t AddressMemoryRegionHeap39Size = 8_GB;
constexpr inline size_t AddressMemoryRegionAlias39Size = 64_GB;
constexpr inline size_t AddressMemoryRegionStack39Size = 2_GB;
constexpr inline size_t AddressMemoryRegion39Size = 512_GB;
#elif defined(ATMOSPHERE_ARCH_ARM)
constexpr inline size_t AddressMemoryRegionSmall32Size = 512_MB;
constexpr inline size_t AddressMemoryRegionLarge32Size = 2_GB - AddressMemoryRegionSmall32Size;
constexpr inline size_t AddressMemoryRegionHeap32Size = 1_GB;
constexpr inline size_t AddressMemoryRegionAlias32Size = 512_MB;
constexpr inline size_t AddressMemoryRegionSmall36Size = 0;
constexpr inline size_t AddressMemoryRegionLarge36Size = 0;
constexpr inline size_t AddressMemoryRegionHeap36Size = 0;
constexpr inline size_t AddressMemoryRegionAlias36Size = 0;
constexpr inline size_t AddressMemoryRegionSmall39Size = 0;
constexpr inline size_t AddressMemoryRegionHeap39Size = 0;
constexpr inline size_t AddressMemoryRegionAlias39Size = 0;
constexpr inline size_t AddressMemoryRegionStack39Size = 0;
constexpr inline size_t AddressMemoryRegion39Size = 0;
#else
#error "Unknown architecture for svc::AddressMemoryRegion*Size"
#endif
constexpr inline size_t AddressNullGuard32Size = 2_MB;
constexpr inline size_t AddressNullGuard64Size = 128_MB;
constexpr inline uintptr_t AddressMemoryRegionSmall32Start = 0;
constexpr inline uintptr_t AddressMemoryRegionSmall32End = AddressMemoryRegionSmall32Start + AddressMemoryRegionSmall32Size;
constexpr inline uintptr_t AddressMemoryRegionLarge32Start = AddressMemoryRegionSmall32End;
constexpr inline uintptr_t AddressMemoryRegionLarge32End = AddressMemoryRegionLarge32Start + AddressMemoryRegionLarge32Size;
constexpr inline uintptr_t AddressSmallMap32Start = AddressMemoryRegionSmall32Start + AddressNullGuard32Size;
constexpr inline uintptr_t AddressSmallMap32End = AddressMemoryRegionSmall32End;
constexpr inline size_t AddressSmallMap32Size = AddressSmallMap32End - AddressSmallMap32Start;
constexpr inline uintptr_t AddressLargeMap32Start = AddressMemoryRegionLarge32Start;
constexpr inline uintptr_t AddressLargeMap32End = AddressMemoryRegionLarge32End;
constexpr inline size_t AddressLargeMap32Size = AddressLargeMap32End - AddressLargeMap32Start;
constexpr inline uintptr_t AddressMemoryRegionSmall36Start = 0;
constexpr inline uintptr_t AddressMemoryRegionSmall36End = AddressMemoryRegionSmall36Start + AddressMemoryRegionSmall36Size;
constexpr inline uintptr_t AddressMemoryRegionLarge36Start = AddressMemoryRegionSmall36End;
constexpr inline uintptr_t AddressMemoryRegionLarge36End = AddressMemoryRegionLarge36Start + AddressMemoryRegionLarge36Size;
constexpr inline uintptr_t AddressSmallMap36Start = AddressMemoryRegionSmall36Start + AddressNullGuard64Size;
constexpr inline uintptr_t AddressSmallMap36End = AddressMemoryRegionSmall36End;
constexpr inline size_t AddressSmallMap36Size = AddressSmallMap36End - AddressSmallMap36Start;
constexpr inline uintptr_t AddressLargeMap36Start = AddressMemoryRegionLarge36Start;
constexpr inline uintptr_t AddressLargeMap36End = AddressMemoryRegionLarge36End;
constexpr inline size_t AddressLargeMap36Size = AddressLargeMap36End - AddressLargeMap36Start;
constexpr inline uintptr_t AddressMap39Start = 0 + AddressNullGuard64Size;
constexpr inline uintptr_t AddressMap39End = AddressMemoryRegion39Size;
constexpr inline size_t AddressMap39Size = AddressMap39End - AddressMap39Start;
}
| 5,197
|
C++
|
.h
| 75
| 63.346667
| 130
| 0.796547
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,080
|
svc_select_device_name.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_select_device_name.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#if defined(ATMOSPHERE_BOARD_NINTENDO_NX)
#include <vapours/svc/board/nintendo/nx/svc_device_name.hpp>
namespace ams::svc {
using namespace ams::svc::board::nintendo::nx;
}
#else
#include <vapours/svc/board/generic/svc_device_name.hpp>
namespace ams::svc {
using namespace ams::svc::board::generic;
}
#endif
| 1,040
|
C++
|
.h
| 28
| 34
| 76
| 0.736581
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,081
|
svc_types.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_types.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#include <vapours/svc/svc_tick.hpp>
#include <vapours/svc/svc_select_thread_local_region.hpp>
#include <vapours/svc/svc_types_common.hpp>
#include <vapours/svc/svc_types_base.hpp>
#include <vapours/svc/svc_types_dd.hpp>
#include <vapours/svc/svc_types_dmnt.hpp>
#include <vapours/svc/svc_types_priv.hpp>
#include <vapours/svc/svc_select_io_pool_type.hpp>
| 1,042
|
C++
|
.h
| 25
| 40.08
| 76
| 0.767717
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,082
|
svc_types_dmnt.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_types_dmnt.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc {
namespace lp64 {
struct DebugInfoCreateProcess {
u64 program_id;
u64 process_id;
char name[0xC];
u32 flags;
u64 user_exception_context_address; /* 5.0.0+ */
};
struct DebugInfoCreateThread {
u64 thread_id;
u64 tls_address;
/* Removed in 11.0.0 u64 entrypoint; */
};
struct DebugInfoExitProcess {
ProcessExitReason reason;
};
struct DebugInfoExitThread {
ThreadExitReason reason;
};
struct DebugInfoUndefinedInstructionException {
u32 insn;
};
struct DebugInfoDataAbortException {
u64 address;
};
struct DebugInfoAlignmentFaultException {
u64 address;
};
struct DebugInfoBreakPointException {
BreakPointType type;
u64 address;
};
struct DebugInfoUserBreakException {
BreakReason break_reason;
u64 address;
u64 size;
};
struct DebugInfoDebuggerBreakException {
u64 active_thread_ids[4];
};
struct DebugInfoUndefinedSystemCallException {
u32 id;
};
union DebugInfoSpecificException {
DebugInfoUndefinedInstructionException undefined_instruction;
DebugInfoDataAbortException data_abort;
DebugInfoAlignmentFaultException alignment_fault;
DebugInfoBreakPointException break_point;
DebugInfoUserBreakException user_break;
DebugInfoDebuggerBreakException debugger_break;
DebugInfoUndefinedSystemCallException undefined_system_call;
u64 raw;
};
struct DebugInfoException {
DebugException type;
u64 address;
DebugInfoSpecificException specific;
};
union DebugInfo {
DebugInfoCreateProcess create_process;
DebugInfoCreateThread create_thread;
DebugInfoExitProcess exit_process;
DebugInfoExitThread exit_thread;
DebugInfoException exception;
};
struct DebugEventInfo {
DebugEvent type;
u32 flags;
u64 thread_id;
DebugInfo info;
};
static_assert(sizeof(DebugEventInfo) >= 0x40);
}
namespace ilp32 {
struct DebugInfoCreateProcess {
u64 program_id;
u64 process_id;
char name[0xC];
u32 flags;
u32 user_exception_context_address; /* 5.0.0+ */
};
struct DebugInfoCreateThread {
u64 thread_id;
u32 tls_address;
/* Removed in 11.0.0 u32 entrypoint; */
};
struct DebugInfoExitProcess {
ProcessExitReason reason;
};
struct DebugInfoExitThread {
ThreadExitReason reason;
};
struct DebugInfoUndefinedInstructionException {
u32 insn;
};
struct DebugInfoDataAbortException {
u32 address;
};
struct DebugInfoAlignmentFaultException {
u32 address;
};
struct DebugInfoBreakPointException {
BreakPointType type;
u32 address;
};
struct DebugInfoUserBreakException {
BreakReason break_reason;
u32 address;
u32 size;
};
struct DebugInfoDebuggerBreakException {
u64 active_thread_ids[4];
};
struct DebugInfoUndefinedSystemCallException {
u32 id;
};
union DebugInfoSpecificException {
DebugInfoUndefinedInstructionException undefined_instruction;
DebugInfoDataAbortException data_abort;
DebugInfoAlignmentFaultException alignment_fault;
DebugInfoBreakPointException break_point;
DebugInfoUserBreakException user_break;
DebugInfoDebuggerBreakException debugger_break;
DebugInfoUndefinedSystemCallException undefined_system_call;
u64 raw;
};
struct DebugInfoException {
DebugException type;
u32 address;
DebugInfoSpecificException specific;
};
union DebugInfo {
DebugInfoCreateProcess create_process;
DebugInfoCreateThread create_thread;
DebugInfoExitProcess exit_process;
DebugInfoExitThread exit_thread;
DebugInfoException exception;
};
struct DebugEventInfo {
DebugEvent type;
u32 flags;
u64 thread_id;
DebugInfo info;
};
}
}
| 5,505
|
C++
|
.h
| 164
| 23.335366
| 76
| 0.612441
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,083
|
svc_version.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_version.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#include <vapours/svc/svc_select_hardware_constants.hpp>
#include <vapours/util/util_bitpack.hpp>
namespace ams::svc {
constexpr inline u32 ConvertToSvcMajorVersion(u32 sdk) { return sdk + 4; }
constexpr inline u32 ConvertToSdkMajorVersion(u32 svc) { return svc - 4; }
constexpr inline u32 ConvertToSvcMinorVersion(u32 sdk) { return sdk; }
constexpr inline u32 ConvertToSdkMinorVersion(u32 svc) { return svc; }
struct KernelVersion {
using MinorVersion = util::BitPack32::Field<0, 4>;
using MajorVersion = util::BitPack32::Field<MinorVersion::Next, 13>;
};
constexpr inline u32 EncodeKernelVersion(u32 major, u32 minor) {
util::BitPack32 pack = {};
pack.Set<KernelVersion::MinorVersion>(minor);
pack.Set<KernelVersion::MajorVersion>(major);
return pack.value;
}
constexpr inline u32 GetKernelMajorVersion(u32 encoded) {
const util::BitPack32 pack = { encoded };
return pack.Get<KernelVersion::MajorVersion>();
}
constexpr inline u32 GetKernelMinorVersion(u32 encoded) {
const util::BitPack32 pack = { encoded };
return pack.Get<KernelVersion::MinorVersion>();
}
/* Nintendo doesn't support programs targeting SVC versions < 3.0. */
constexpr inline u32 RequiredKernelMajorVersion = 3;
constexpr inline u32 RequiredKernelMinorVersion = 0;
constexpr inline u32 RequiredKernelVersion = EncodeKernelVersion(RequiredKernelMajorVersion, RequiredKernelMinorVersion);
/* This is the highest SVC version supported by Atmosphere, to be updated on new kernel releases. */
/* NOTE: Official kernel versions have SVC major = SDK major + 4, SVC minor = SDK minor. */
constexpr inline u32 SupportedKernelMajorVersion = ConvertToSvcMajorVersion(19);
constexpr inline u32 SupportedKernelMinorVersion = ConvertToSvcMinorVersion( 3);
constexpr inline u32 SupportedKernelVersion = EncodeKernelVersion(SupportedKernelMajorVersion, SupportedKernelMinorVersion);
}
| 2,705
|
C++
|
.h
| 52
| 47.346154
| 128
| 0.748485
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,084
|
svc_definition_macro.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_definition_macro.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#define AMS_SVC_FOREACH_DEFINITION_IMPL(HANDLER, NAMESPACE, INPUT, OUTPUT, INPTR, OUTPTR) \
HANDLER(0x01, Result, SetHeapSize, OUTPUT(::ams::svc::Address, out_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x02, Result, SetMemoryPermission, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryPermission, perm)) \
HANDLER(0x03, Result, SetMemoryAttribute, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size), INPUT(uint32_t, mask), INPUT(uint32_t, attr)) \
HANDLER(0x04, Result, MapMemory, INPUT(::ams::svc::Address, dst_address), INPUT(::ams::svc::Address, src_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x05, Result, UnmapMemory, INPUT(::ams::svc::Address, dst_address), INPUT(::ams::svc::Address, src_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x06, Result, QueryMemory, OUTPTR(::ams::svc::NAMESPACE::MemoryInfo, out_memory_info), OUTPUT(::ams::svc::PageInfo, out_page_info), INPUT(::ams::svc::Address, address)) \
HANDLER(0x07, void, ExitProcess) \
HANDLER(0x08, Result, CreateThread, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::ThreadFunc, func), INPUT(::ams::svc::Address, arg), INPUT(::ams::svc::Address, stack_bottom), INPUT(int32_t, priority), INPUT(int32_t, core_id)) \
HANDLER(0x09, Result, StartThread, INPUT(::ams::svc::Handle, thread_handle)) \
HANDLER(0x0A, void, ExitThread) \
HANDLER(0x0B, void, SleepThread, INPUT(int64_t, ns)) \
HANDLER(0x0C, Result, GetThreadPriority, OUTPUT(int32_t, out_priority), INPUT(::ams::svc::Handle, thread_handle)) \
HANDLER(0x0D, Result, SetThreadPriority, INPUT(::ams::svc::Handle, thread_handle), INPUT(int32_t, priority)) \
HANDLER(0x0E, Result, GetThreadCoreMask, OUTPUT(int32_t, out_core_id), OUTPUT(uint64_t, out_affinity_mask), INPUT(::ams::svc::Handle, thread_handle)) \
HANDLER(0x0F, Result, SetThreadCoreMask, INPUT(::ams::svc::Handle, thread_handle), INPUT(int32_t, core_id), INPUT(uint64_t, affinity_mask)) \
HANDLER(0x10, int32_t, GetCurrentProcessorNumber) \
HANDLER(0x11, Result, SignalEvent, INPUT(::ams::svc::Handle, event_handle)) \
HANDLER(0x12, Result, ClearEvent, INPUT(::ams::svc::Handle, event_handle)) \
HANDLER(0x13, Result, MapSharedMemory, INPUT(::ams::svc::Handle, shmem_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryPermission, map_perm)) \
HANDLER(0x14, Result, UnmapSharedMemory, INPUT(::ams::svc::Handle, shmem_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x15, Result, CreateTransferMemory, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryPermission, map_perm)) \
HANDLER(0x16, Result, CloseHandle, INPUT(::ams::svc::Handle, handle)) \
HANDLER(0x17, Result, ResetSignal, INPUT(::ams::svc::Handle, handle)) \
HANDLER(0x18, Result, WaitSynchronization, OUTPUT(int32_t, out_index), INPTR(::ams::svc::Handle, handles), INPUT(int32_t, num_handles), INPUT(int64_t, timeout_ns)) \
HANDLER(0x19, Result, CancelSynchronization, INPUT(::ams::svc::Handle, handle)) \
HANDLER(0x1A, Result, ArbitrateLock, INPUT(::ams::svc::Handle, thread_handle), INPUT(::ams::svc::Address, address), INPUT(uint32_t, tag)) \
HANDLER(0x1B, Result, ArbitrateUnlock, INPUT(::ams::svc::Address, address)) \
HANDLER(0x1C, Result, WaitProcessWideKeyAtomic, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Address, cv_key), INPUT(uint32_t, tag), INPUT(int64_t, timeout_ns)) \
HANDLER(0x1D, void, SignalProcessWideKey, INPUT(::ams::svc::Address, cv_key), INPUT(int32_t, count)) \
HANDLER(0x1E, int64_t, GetSystemTick) \
HANDLER(0x1F, Result, ConnectToNamedPort, OUTPUT(::ams::svc::Handle, out_handle), INPTR(char, name)) \
HANDLER(0x20, Result, SendSyncRequestLight, INPUT(::ams::svc::Handle, session_handle)) \
HANDLER(0x21, Result, SendSyncRequest, INPUT(::ams::svc::Handle, session_handle)) \
HANDLER(0x22, Result, SendSyncRequestWithUserBuffer, INPUT(::ams::svc::Address, message_buffer), INPUT(::ams::svc::Size, message_buffer_size), INPUT(::ams::svc::Handle, session_handle)) \
HANDLER(0x23, Result, SendAsyncRequestWithUserBuffer, OUTPUT(::ams::svc::Handle, out_event_handle), INPUT(::ams::svc::Address, message_buffer), INPUT(::ams::svc::Size, message_buffer_size), INPUT(::ams::svc::Handle, session_handle)) \
HANDLER(0x24, Result, GetProcessId, OUTPUT(uint64_t, out_process_id), INPUT(::ams::svc::Handle, process_handle)) \
HANDLER(0x25, Result, GetThreadId, OUTPUT(uint64_t, out_thread_id), INPUT(::ams::svc::Handle, thread_handle)) \
HANDLER(0x26, void, Break, INPUT(::ams::svc::BreakReason, break_reason), INPUT(::ams::svc::Address, arg), INPUT(::ams::svc::Size, size)) \
HANDLER(0x27, Result, OutputDebugString, INPTR(char, debug_str), INPUT(::ams::svc::Size, len)) \
HANDLER(0x28, void, ReturnFromException, INPUT(::ams::Result, result)) \
HANDLER(0x29, Result, GetInfo, OUTPUT(uint64_t, out), INPUT(::ams::svc::InfoType, info_type), INPUT(::ams::svc::Handle, handle), INPUT(uint64_t, info_subtype)) \
HANDLER(0x2A, void, FlushEntireDataCache) \
HANDLER(0x2B, Result, FlushDataCache, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x2C, Result, MapPhysicalMemory, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x2D, Result, UnmapPhysicalMemory, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x2E, Result, GetDebugFutureThreadInfo, OUTPUT(::ams::svc::NAMESPACE::LastThreadContext, out_context), OUTPUT(uint64_t, thread_id), INPUT(::ams::svc::Handle, debug_handle), INPUT(int64_t, ns)) \
HANDLER(0x2F, Result, GetLastThreadInfo, OUTPUT(::ams::svc::NAMESPACE::LastThreadContext, out_context), OUTPUT(::ams::svc::Address, out_tls_address), OUTPUT(uint32_t, out_flags)) \
HANDLER(0x30, Result, GetResourceLimitLimitValue, OUTPUT(int64_t, out_limit_value), INPUT(::ams::svc::Handle, resource_limit_handle), INPUT(::ams::svc::LimitableResource, which)) \
HANDLER(0x31, Result, GetResourceLimitCurrentValue, OUTPUT(int64_t, out_current_value), INPUT(::ams::svc::Handle, resource_limit_handle), INPUT(::ams::svc::LimitableResource, which)) \
HANDLER(0x32, Result, SetThreadActivity, INPUT(::ams::svc::Handle, thread_handle), INPUT(::ams::svc::ThreadActivity, thread_activity)) \
HANDLER(0x33, Result, GetThreadContext3, OUTPTR(::ams::svc::ThreadContext, out_context), INPUT(::ams::svc::Handle, thread_handle)) \
HANDLER(0x34, Result, WaitForAddress, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::ArbitrationType, arb_type), INPUT(int64_t, value), INPUT(int64_t, timeout_ns)) \
HANDLER(0x35, Result, SignalToAddress, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::SignalType, signal_type), INPUT(int32_t, value), INPUT(int32_t, count)) \
HANDLER(0x36, void, SynchronizePreemptionState) \
HANDLER(0x37, Result, GetResourceLimitPeakValue, OUTPUT(int64_t, out_peak_value), INPUT(::ams::svc::Handle, resource_limit_handle), INPUT(::ams::svc::LimitableResource, which)) \
\
HANDLER(0x39, Result, CreateIoPool, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::IoPoolType, which)) \
HANDLER(0x3A, Result, CreateIoRegion, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::Handle, io_pool), INPUT(::ams::svc::PhysicalAddress, physical_address), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryMapping, mapping), INPUT(::ams::svc::MemoryPermission, perm)) \
\
HANDLER(0x3C, void, KernelDebug, INPUT(::ams::svc::KernelDebugType, kern_debug_type), INPUT(uint64_t, arg0), INPUT(uint64_t, arg1), INPUT(uint64_t, arg2)) \
HANDLER(0x3D, void, ChangeKernelTraceState, INPUT(::ams::svc::KernelTraceState, kern_trace_state)) \
\
HANDLER(0x40, Result, CreateSession, OUTPUT(::ams::svc::Handle, out_server_session_handle), OUTPUT(::ams::svc::Handle, out_client_session_handle), INPUT(bool, is_light), INPUT(::ams::svc::Address, name)) \
HANDLER(0x41, Result, AcceptSession, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::Handle, port)) \
HANDLER(0x42, Result, ReplyAndReceiveLight, INPUT(::ams::svc::Handle, handle)) \
HANDLER(0x43, Result, ReplyAndReceive, OUTPUT(int32_t, out_index), INPTR(::ams::svc::Handle, handles), INPUT(int32_t, num_handles), INPUT(::ams::svc::Handle, reply_target), INPUT(int64_t, timeout_ns)) \
HANDLER(0x44, Result, ReplyAndReceiveWithUserBuffer, OUTPUT(int32_t, out_index), INPUT(::ams::svc::Address, message_buffer), INPUT(::ams::svc::Size, message_buffer_size), INPTR(::ams::svc::Handle, handles), INPUT(int32_t, num_handles), INPUT(::ams::svc::Handle, reply_target), INPUT(int64_t, timeout_ns)) \
HANDLER(0x45, Result, CreateEvent, OUTPUT(::ams::svc::Handle, out_write_handle), OUTPUT(::ams::svc::Handle, out_read_handle)) \
HANDLER(0x46, Result, MapIoRegion, INPUT(::ams::svc::Handle, io_region), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryPermission, perm)) \
HANDLER(0x47, Result, UnmapIoRegion, INPUT(::ams::svc::Handle, io_region), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x48, Result, MapPhysicalMemoryUnsafe, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x49, Result, UnmapPhysicalMemoryUnsafe, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x4A, Result, SetUnsafeLimit, INPUT(::ams::svc::Size, limit)) \
HANDLER(0x4B, Result, CreateCodeMemory, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x4C, Result, ControlCodeMemory, INPUT(::ams::svc::Handle, code_memory_handle), INPUT(::ams::svc::CodeMemoryOperation, operation), INPUT(uint64_t, address), INPUT(uint64_t, size), INPUT(::ams::svc::MemoryPermission, perm)) \
HANDLER(0x4D, void, SleepSystem) \
HANDLER(0x4E, Result, ReadWriteRegister, OUTPUT(uint32_t, out_value), INPUT(::ams::svc::PhysicalAddress, address), INPUT(uint32_t, mask), INPUT(uint32_t, value)) \
HANDLER(0x4F, Result, SetProcessActivity, INPUT(::ams::svc::Handle, process_handle), INPUT(::ams::svc::ProcessActivity, process_activity)) \
HANDLER(0x50, Result, CreateSharedMemory, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryPermission, owner_perm), INPUT(::ams::svc::MemoryPermission, remote_perm)) \
HANDLER(0x51, Result, MapTransferMemory, INPUT(::ams::svc::Handle, trmem_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size), INPUT(::ams::svc::MemoryPermission, owner_perm)) \
HANDLER(0x52, Result, UnmapTransferMemory, INPUT(::ams::svc::Handle, trmem_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x53, Result, CreateInterruptEvent, OUTPUT(::ams::svc::Handle, out_read_handle), INPUT(int32_t, interrupt_id), INPUT(::ams::svc::InterruptType, interrupt_type)) \
HANDLER(0x54, Result, QueryPhysicalAddress, OUTPUT(::ams::svc::NAMESPACE::PhysicalMemoryInfo, out_info), INPUT(::ams::svc::Address, address)) \
HANDLER(0x55, Result, QueryMemoryMapping, OUTPUT(::ams::svc::Address, out_address), OUTPUT(::ams::svc::Size, out_size), INPUT(::ams::svc::PhysicalAddress, physical_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x56, Result, CreateDeviceAddressSpace, OUTPUT(::ams::svc::Handle, out_handle), INPUT(uint64_t, das_address), INPUT(uint64_t, das_size)) \
HANDLER(0x57, Result, AttachDeviceAddressSpace, INPUT(::ams::svc::DeviceName, device_name), INPUT(::ams::svc::Handle, das_handle)) \
HANDLER(0x58, Result, DetachDeviceAddressSpace, INPUT(::ams::svc::DeviceName, device_name), INPUT(::ams::svc::Handle, das_handle)) \
HANDLER(0x59, Result, MapDeviceAddressSpaceByForce, INPUT(::ams::svc::Handle, das_handle), INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, process_address), INPUT(::ams::svc::Size, size), INPUT(uint64_t, device_address), INPUT(uint32_t, option)) \
HANDLER(0x5A, Result, MapDeviceAddressSpaceAligned, INPUT(::ams::svc::Handle, das_handle), INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, process_address), INPUT(::ams::svc::Size, size), INPUT(uint64_t, device_address), INPUT(uint32_t, option)) \
HANDLER(0x5C, Result, UnmapDeviceAddressSpace, INPUT(::ams::svc::Handle, das_handle), INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, process_address), INPUT(::ams::svc::Size, size), INPUT(uint64_t, device_address)) \
HANDLER(0x5D, Result, InvalidateProcessDataCache, INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, address), INPUT(uint64_t, size)) \
HANDLER(0x5E, Result, StoreProcessDataCache, INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, address), INPUT(uint64_t, size)) \
HANDLER(0x5F, Result, FlushProcessDataCache, INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, address), INPUT(uint64_t, size)) \
HANDLER(0x60, Result, DebugActiveProcess, OUTPUT(::ams::svc::Handle, out_handle), INPUT(uint64_t, process_id)) \
HANDLER(0x61, Result, BreakDebugProcess, INPUT(::ams::svc::Handle, debug_handle)) \
HANDLER(0x62, Result, TerminateDebugProcess, INPUT(::ams::svc::Handle, debug_handle)) \
HANDLER(0x63, Result, GetDebugEvent, OUTPTR(::ams::svc::NAMESPACE::DebugEventInfo, out_info), INPUT(::ams::svc::Handle, debug_handle)) \
HANDLER(0x64, Result, ContinueDebugEvent, INPUT(::ams::svc::Handle, debug_handle), INPUT(uint32_t, flags), INPTR(uint64_t, thread_ids), INPUT(int32_t, num_thread_ids)) \
HANDLER(0x65, Result, GetProcessList, OUTPUT(int32_t, out_num_processes), OUTPTR(uint64_t, out_process_ids), INPUT(int32_t, max_out_count)) \
HANDLER(0x66, Result, GetThreadList, OUTPUT(int32_t, out_num_threads), OUTPTR(uint64_t, out_thread_ids), INPUT(int32_t, max_out_count), INPUT(::ams::svc::Handle, debug_handle)) \
HANDLER(0x67, Result, GetDebugThreadContext, OUTPTR(::ams::svc::ThreadContext, out_context), INPUT(::ams::svc::Handle, debug_handle), INPUT(uint64_t, thread_id), INPUT(uint32_t, context_flags)) \
HANDLER(0x68, Result, SetDebugThreadContext, INPUT(::ams::svc::Handle, debug_handle), INPUT(uint64_t, thread_id), INPTR(::ams::svc::ThreadContext, context), INPUT(uint32_t, context_flags)) \
HANDLER(0x69, Result, QueryDebugProcessMemory, OUTPTR(::ams::svc::NAMESPACE::MemoryInfo, out_memory_info), OUTPUT(::ams::svc::PageInfo, out_page_info), INPUT(::ams::svc::Handle, process_handle), INPUT(::ams::svc::Address, address)) \
HANDLER(0x6A, Result, ReadDebugProcessMemory, INPUT(::ams::svc::Address, buffer), INPUT(::ams::svc::Handle, debug_handle), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x6B, Result, WriteDebugProcessMemory, INPUT(::ams::svc::Handle, debug_handle), INPUT(::ams::svc::Address, buffer), INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x6C, Result, SetHardwareBreakPoint, INPUT(::ams::svc::HardwareBreakPointRegisterName, name), INPUT(uint64_t, flags), INPUT(uint64_t, value)) \
HANDLER(0x6D, Result, GetDebugThreadParam, OUTPUT(uint64_t, out_64), OUTPUT(uint32_t, out_32), INPUT(::ams::svc::Handle, debug_handle), INPUT(uint64_t, thread_id), INPUT(::ams::svc::DebugThreadParam, param)) \
\
HANDLER(0x6F, Result, GetSystemInfo, OUTPUT(uint64_t, out), INPUT(::ams::svc::SystemInfoType, info_type), INPUT(::ams::svc::Handle, handle), INPUT(uint64_t, info_subtype)) \
HANDLER(0x70, Result, CreatePort, OUTPUT(::ams::svc::Handle, out_server_handle), OUTPUT(::ams::svc::Handle, out_client_handle), INPUT(int32_t, max_sessions), INPUT(bool, is_light), INPUT(::ams::svc::Address, name)) \
HANDLER(0x71, Result, ManageNamedPort, OUTPUT(::ams::svc::Handle, out_server_handle), INPTR(char, name), INPUT(int32_t, max_sessions)) \
HANDLER(0x72, Result, ConnectToPort, OUTPUT(::ams::svc::Handle, out_handle), INPUT(::ams::svc::Handle, port)) \
HANDLER(0x73, Result, SetProcessMemoryPermission, INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, address), INPUT(uint64_t, size), INPUT(::ams::svc::MemoryPermission, perm)) \
HANDLER(0x74, Result, MapProcessMemory, INPUT(::ams::svc::Address, dst_address), INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, src_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x75, Result, UnmapProcessMemory, INPUT(::ams::svc::Address, dst_address), INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, src_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x76, Result, QueryProcessMemory, OUTPTR(::ams::svc::NAMESPACE::MemoryInfo, out_memory_info), OUTPUT(::ams::svc::PageInfo, out_page_info), INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, address)) \
HANDLER(0x77, Result, MapProcessCodeMemory, INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, dst_address), INPUT(uint64_t, src_address), INPUT(uint64_t, size)) \
HANDLER(0x78, Result, UnmapProcessCodeMemory, INPUT(::ams::svc::Handle, process_handle), INPUT(uint64_t, dst_address), INPUT(uint64_t, src_address), INPUT(uint64_t, size)) \
HANDLER(0x79, Result, CreateProcess, OUTPUT(::ams::svc::Handle, out_handle), INPTR(::ams::svc::NAMESPACE::CreateProcessParameter, parameters), INPTR(uint32_t, caps), INPUT(int32_t, num_caps)) \
HANDLER(0x7A, Result, StartProcess, INPUT(::ams::svc::Handle, process_handle), INPUT(int32_t, priority), INPUT(int32_t, core_id), INPUT(uint64_t, main_thread_stack_size)) \
HANDLER(0x7B, Result, TerminateProcess, INPUT(::ams::svc::Handle, process_handle)) \
HANDLER(0x7C, Result, GetProcessInfo, OUTPUT(int64_t, out_info), INPUT(::ams::svc::Handle, process_handle), INPUT(::ams::svc::ProcessInfoType, info_type)) \
HANDLER(0x7D, Result, CreateResourceLimit, OUTPUT(::ams::svc::Handle, out_handle)) \
HANDLER(0x7E, Result, SetResourceLimitLimitValue, INPUT(::ams::svc::Handle, resource_limit_handle), INPUT(::ams::svc::LimitableResource, which), INPUT(int64_t, limit_value)) \
HANDLER(0x7F, void, CallSecureMonitor, OUTPUT(::ams::svc::NAMESPACE::SecureMonitorArguments, args)) \
\
HANDLER(0x90, Result, MapInsecurePhysicalMemory, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x91, Result, UnmapInsecurePhysicalMemory, INPUT(::ams::svc::Address, address), INPUT(::ams::svc::Size, size)) \
\
HANDLER(0x2E, Result, LegacyGetFutureThreadInfo, OUTPUT(::ams::svc::NAMESPACE::LastThreadContext, out_context), OUTPUT(::ams::svc::Address, out_tls_address), OUTPUT(uint32_t, out_flags), INPUT(int64_t, ns)) \
HANDLER(0x55, Result, LegacyQueryIoMapping, OUTPUT(::ams::svc::Address, out_address), INPUT(::ams::svc::PhysicalAddress, physical_address), INPUT(::ams::svc::Size, size)) \
HANDLER(0x64, Result, LegacyContinueDebugEvent, INPUT(::ams::svc::Handle, debug_handle), INPUT(uint32_t, flags), INPUT(uint64_t, thread_id))
| 42,117
|
C++
|
.h
| 149
| 265.657718
| 312
| 0.331665
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,085
|
svc_codegen.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_codegen.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
/* NOTE: This header must not be included by svc.hpp. */
#include <vapours/svc/svc_common.hpp>
#include <vapours/svc/svc_types.hpp>
#include <vapours/svc/svc_definitions.hpp>
#include <vapours/svc/codegen/svc_codegen_kernel_svc_wrapper.hpp>
| 891
|
C++
|
.h
| 21
| 40.666667
| 76
| 0.762673
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,086
|
svc_select_thread_local_region.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_select_thread_local_region.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#if defined(ATMOSPHERE_ARCH_ARM64)
#include <vapours/svc/arch/arm64/svc_thread_local_region.hpp>
namespace ams::svc {
using ams::svc::arch::arm64::ThreadLocalRegion;
using ams::svc::arch::arm64::GetThreadLocalRegion;
}
#elif defined(ATMOSPHERE_ARCH_ARM)
#include <vapours/svc/arch/arm/svc_thread_local_region.hpp>
namespace ams::svc {
using ams::svc::arch::arm::ThreadLocalRegion;
using ams::svc::arch::arm::GetThreadLocalRegion;
}
#else
#error "Unknown architecture for svc::ThreadLocalRegion"
#endif
namespace ams::svc {
constexpr inline size_t ThreadLocalRegionSize = 0x200;
static_assert(sizeof(::ams::svc::ThreadLocalRegion) == ThreadLocalRegionSize);
}
| 1,423
|
C++
|
.h
| 36
| 35.972222
| 82
| 0.740015
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,087
|
svc_tick.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_tick.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#include <vapours/svc/svc_select_hardware_constants.hpp>
namespace ams::svc {
class Tick {
public:
static constexpr s64 TicksPerSecond = ::ams::svc::TicksPerSecond;
static consteval s64 GetTicksPerSecond() { return TicksPerSecond; }
private:
s64 m_tick;
private:
static constexpr s64 NanoSecondsPerSecond = TimeSpan::FromSeconds(1).GetNanoSeconds();
static constexpr ALWAYS_INLINE s64 ConvertTimeSpanToTickImpl(TimeSpan ts) {
/* Get nano-seconds. */
const s64 ns = ts.GetNanoSeconds();
/* Special-case optimize arm64/nintendo-nx value. */
if (!std::is_constant_evaluated()) {
if constexpr (TicksPerSecond == 19'200'000) {
#if defined(ATMOSPHERE_IS_MESOSPHERE) && defined(ATMOSPHERE_ARCH_ARM64)
s64 t0, t1, t2, t3;
__asm__ __volatile__("mov %[t1], #0x5A53\n"
"movk %[t1], #0xA09B, lsl #16\n"
"lsr %[t0], %[ns], #9\n"
"movk %[t1], #0xB82F, lsl #32\n"
"movk %[t1], #0x0044, lsl #48\n"
"umulh %[t0], %[t0], %[t1]\n"
"mov %[t1], #0xFFFFFFFFFFFF3600\n"
"movk %[t1], #0xC465, lsl #16\n"
"lsr %[t0], %[t0], #0xB\n"
"madd %[t1], %[t0], %[t1], %[ns]\n"
"mov %w[t2], #0xF800\n"
"movk %w[t2], #0x0124, lsl #16\n"
"mov %w[t3], #0xCA00\n"
"movk %w[t3], #0x3B9A, lsl #16\n"
"madd %[t1], %[t1], %[t2], %[t3]\n"
"mov %[t3], #0x94B3\n"
"movk %[t3], #0x26D6, lsl #16\n"
"movk %[t3], #0x0BE8, lsl #32\n"
"movk %[t3], #0x112E, lsl #48\n"
"sub %[t1], %[t1], #1\n"
"smulh %[t1], %[t1], %[t3]\n"
"asr %[t3], %[t1], #26\n"
"add %[t1], %[t3], %[t1], lsr #63\n"
"madd %[t0], %[t0], %[t2], %[t1]\n"
: [t0]"=&r"(t0), [t1]"=&r"(t1), [t2]"=&r"(t2), [t3]"=&r"(t3)
: [ns]"r"(ns)
: "cc");
return t0;
#endif
}
}
return util::ScaleByConstantFactorUp<s64, TicksPerSecond, NanoSecondsPerSecond>(ns);
}
public:
constexpr ALWAYS_INLINE explicit Tick(s64 t = 0) : m_tick(t) { /* ... */ }
constexpr ALWAYS_INLINE Tick(TimeSpan ts) : m_tick(ConvertTimeSpanToTickImpl(ts)) { /* ... */ }
constexpr ALWAYS_INLINE operator s64() const { return m_tick; }
/* Tick arithmetic. */
constexpr ALWAYS_INLINE Tick &operator+=(Tick rhs) { m_tick += rhs.m_tick; return *this; }
constexpr ALWAYS_INLINE Tick &operator-=(Tick rhs) { m_tick -= rhs.m_tick; return *this; }
constexpr ALWAYS_INLINE Tick operator+(Tick rhs) const { Tick r(*this); return r += rhs; }
constexpr ALWAYS_INLINE Tick operator-(Tick rhs) const { Tick r(*this); return r -= rhs; }
constexpr ALWAYS_INLINE Tick &operator+=(TimeSpan rhs) { m_tick += Tick(rhs).m_tick; return *this; }
constexpr ALWAYS_INLINE Tick &operator-=(TimeSpan rhs) { m_tick -= Tick(rhs).m_tick; return *this; }
constexpr ALWAYS_INLINE Tick operator+(TimeSpan rhs) const { Tick r(*this); return r += rhs; }
constexpr ALWAYS_INLINE Tick operator-(TimeSpan rhs) const { Tick r(*this); return r -= rhs; }
};
}
| 5,101
|
C++
|
.h
| 83
| 39.903614
| 112
| 0.447883
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,088
|
svc_select_io_pool_type.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_select_io_pool_type.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#if defined(ATMOSPHERE_BOARD_NINTENDO_NX)
#include <vapours/svc/board/nintendo/nx/svc_io_pool_type.hpp>
namespace ams::svc {
using IoPoolType = ::ams::svc::board::nintendo::nx::IoPoolType;
using enum ::ams::svc::board::nintendo::nx::IoPoolType;
}
#else
#define AMS_SVC_IO_POOL_NOT_SUPPORTED
namespace ams::svc {
enum IoPoolType : u32 {
/* Not supported. */
IoPoolType_Count = 0,
};
}
#endif
| 1,168
|
C++
|
.h
| 32
| 32.21875
| 76
| 0.702222
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,089
|
svc_types_dd.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_types_dd.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
#include <vapours/svc/svc_select_hardware_constants.hpp>
#include <vapours/svc/svc_select_device_name.hpp>
namespace ams::svc {
namespace lp64 {
struct PhysicalMemoryInfo {
PhysicalAddress physical_address;
u64 virtual_address;
u64 size;
};
}
namespace ilp32 {
struct PhysicalMemoryInfo {
PhysicalAddress physical_address;
u32 virtual_address;
u32 size;
};
}
}
| 1,181
|
C++
|
.h
| 35
| 28.685714
| 76
| 0.699473
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,090
|
svc_types_base.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_types_base.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc {
namespace lp64 {
struct MemoryInfo {
u64 base_address;
u64 size;
MemoryState state;
MemoryAttribute attribute;
MemoryPermission permission;
u32 ipc_count;
u32 device_count;
u32 padding;
};
struct LastThreadContext {
u64 fp;
u64 sp;
u64 lr;
u64 pc;
};
}
namespace ilp32 {
struct MemoryInfo {
u64 base_address;
u64 size;
MemoryState state;
MemoryAttribute attribute;
MemoryPermission permission;
u32 ipc_count;
u32 device_count;
u32 padding;
};
struct LastThreadContext {
u32 fp;
u32 sp;
u32 lr;
u32 pc;
};
}
}
| 1,600
|
C++
|
.h
| 55
| 20.963636
| 76
| 0.597394
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,091
|
svc_common.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_common.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/results.hpp>
namespace ams::svc {
/* TODO: C++ style handle? */
using Handle = u32;
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
static_assert(std::same_as<::ams::svc::Handle, ::Handle>);
#endif
enum {
HandleWaitMask = (1u << 30),
};
constexpr inline s32 ArgumentHandleCountMax = 0x40;
constexpr inline s64 WaitInfinite = -1;
enum PseudoHandle : Handle {
CurrentThread = 0xFFFF8000,
CurrentProcess = 0xFFFF8001,
};
constexpr inline Handle InvalidHandle = Handle(0);
constexpr ALWAYS_INLINE bool operator==(const Handle &lhs, const PseudoHandle &rhs) {
return static_cast<Handle>(lhs) == static_cast<Handle>(rhs);
}
constexpr ALWAYS_INLINE bool operator==(const PseudoHandle &lhs, const Handle &rhs) {
return static_cast<Handle>(lhs) == static_cast<Handle>(rhs);
}
constexpr ALWAYS_INLINE bool operator!=(const Handle &lhs, const PseudoHandle &rhs) {
return !(lhs == rhs);
}
constexpr ALWAYS_INLINE bool operator!=(const PseudoHandle &lhs, const Handle &rhs) {
return !(lhs == rhs);
}
constexpr ALWAYS_INLINE bool IsPseudoHandle(const Handle &handle) {
return handle == PseudoHandle::CurrentProcess || handle == PseudoHandle::CurrentThread;
}
#if defined(ATMOSPHERE_ARCH_ARM64)
namespace lp64 { /* ... */ }
namespace aarch64 { /* ... */ }
using namespace ::ams::svc::lp64;
using namespace ::ams::svc::aarch64;
/* TODO: ifdef ATMOSPHERE_ABI_LP64 */
#if 1
namespace aarch64::lp64 { /* ... */ }
using namespace ::ams::svc::aarch64::lp64;
#else
namespace aarch64::ilp32 { /* ... */ }
using namespace ::ams::svc::aarch64::ilp32;
#endif
#elif defined(ATMOSPHERE_ARCH_ARM)
namespace ilp32 { /* ... */ }
namespace aarch32 { /* ... */ }
using namespace ::ams::svc::ilp32;
using namespace ::ams::svc::aarch32;
#else
#error "Unknown Architecture"
#endif
}
| 2,725
|
C++
|
.h
| 72
| 33.166667
| 95
| 0.675285
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,092
|
svc_types_priv.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_types_priv.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc {
namespace lp64 {
struct CreateProcessParameter {
char name[12];
u32 version;
u64 program_id;
u64 code_address;
s32 code_num_pages;
u32 flags;
Handle reslimit;
s32 system_resource_num_pages;
};
static_assert(sizeof(CreateProcessParameter) == 0x30);
}
namespace ilp32 {
struct CreateProcessParameter {
char name[12];
u32 version;
u64 program_id;
u64 code_address;
s32 code_num_pages;
u32 flags;
Handle reslimit;
s32 system_resource_num_pages;
};
static_assert(sizeof(CreateProcessParameter) == 0x30);
}
}
| 1,520
|
C++
|
.h
| 45
| 26.6
| 76
| 0.623722
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,093
|
svc_types_common.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_types_common.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
namespace ams::kern::svc::impl {
struct KUserPointerTag{};
}
namespace ams::svc {
/* Utility classes required to encode information into the type system for SVC veneers. */
class Size {
private:
size_t m_size;
public:
constexpr ALWAYS_INLINE Size(size_t s) : m_size(s) { /* ... */ }
constexpr ALWAYS_INLINE operator size_t() { return m_size; }
};
static_assert(sizeof(Size) == sizeof(size_t));
static_assert(std::is_trivially_destructible<Size>::value);
class Address {
private:
uintptr_t m_uintptr;
public:
constexpr ALWAYS_INLINE Address(uintptr_t u) : m_uintptr(u) { /* ... */ }
constexpr ALWAYS_INLINE operator uintptr_t() { return m_uintptr; }
};
static_assert(sizeof(Address) == sizeof(uintptr_t));
static_assert(std::is_trivially_destructible<Address>::value);
namespace impl {
struct UserPointerTag{};
}
template<typename T>
struct UserPointer : impl::UserPointerTag {
public:
static_assert(std::is_pointer<T>::value);
static constexpr bool IsInput = std::is_const<typename std::remove_pointer<T>::type>::value;
private:
T m_pointer;
public:
constexpr ALWAYS_INLINE UserPointer(T p) : m_pointer(p) { /* ... */ }
constexpr ALWAYS_INLINE T GetPointerUnsafe() { return m_pointer; }
};
template<typename T>
static constexpr inline bool IsUserPointer = std::is_base_of<impl::UserPointerTag, T>::value;
using ProgramId = u64;
using PhysicalAddress = u64;
/* Memory types. */
enum MemoryState : u32 {
MemoryState_Free = 0x00,
MemoryState_Io = 0x01,
MemoryState_Static = 0x02,
MemoryState_Code = 0x03,
MemoryState_CodeData = 0x04,
MemoryState_Normal = 0x05,
MemoryState_Shared = 0x06,
MemoryState_Alias = 0x07,
MemoryState_AliasCode = 0x08,
MemoryState_AliasCodeData = 0x09,
MemoryState_Ipc = 0x0A,
MemoryState_Stack = 0x0B,
MemoryState_ThreadLocal = 0x0C,
MemoryState_Transfered = 0x0D,
MemoryState_SharedTransfered = 0x0E,
MemoryState_SharedCode = 0x0F,
MemoryState_Inaccessible = 0x10,
MemoryState_NonSecureIpc = 0x11,
MemoryState_NonDeviceIpc = 0x12,
MemoryState_Kernel = 0x13,
MemoryState_GeneratedCode = 0x14,
MemoryState_CodeOut = 0x15,
MemoryState_Coverage = 0x16,
MemoryState_Insecure = 0x17,
};
enum MemoryPermission : u32 {
MemoryPermission_None = (0 << 0),
MemoryPermission_Read = (1 << 0),
MemoryPermission_Write = (1 << 1),
MemoryPermission_Execute = (1 << 2),
MemoryPermission_ReadWrite = MemoryPermission_Read | MemoryPermission_Write,
MemoryPermission_ReadExecute = MemoryPermission_Read | MemoryPermission_Execute,
MemoryPermission_DontCare = (1 << 28), /* For SharedMemory */
};
enum MemoryAttribute : u32 {
MemoryAttribute_Locked = (1 << 0),
MemoryAttribute_IpcLocked = (1 << 1),
MemoryAttribute_DeviceShared = (1 << 2),
MemoryAttribute_Uncached = (1 << 3),
MemoryAttribute_PermissionLocked = (1 << 4),
};
enum MemoryMapping : u32 {
MemoryMapping_IoRegister = 0,
MemoryMapping_Uncached = 1,
MemoryMapping_Memory = 2,
};
constexpr inline size_t HeapSizeAlignment = 2_MB;
struct PageInfo {
u32 flags;
};
enum MemoryRegionType {
MemoryRegionType_None = 0,
MemoryRegionType_KernelTraceBuffer = 1,
MemoryRegionType_OnMemoryBootImage = 2,
MemoryRegionType_DTB = 3,
MemoryRegionType_Count,
};
enum MapDeviceAddressSpaceFlag : u32 {
MapDeviceAddressSpaceFlag_None = (0 << 0),
MapDeviceAddressSpaceFlag_NotIoRegister = (1 << 0),
};
struct MapDeviceAddressSpaceOption {
using Permission = util::BitPack32::Field<0, 16, MemoryPermission>;
using Flags = util::BitPack32::Field<Permission::Next, 1, MapDeviceAddressSpaceFlag>;
using Reserved = util::BitPack32::Field<Flags::Next, 15, u32>;
static constexpr ALWAYS_INLINE u32 Encode(MemoryPermission perm, u32 flags) {
util::BitPack32 pack{};
pack.Set<Permission>(perm);
pack.Set<Flags>(static_cast<svc::MapDeviceAddressSpaceFlag>(flags));
pack.Set<Reserved>(0);
return pack.value;
}
};
/* Info Types. */
enum InfoType : u32 {
InfoType_CoreMask = 0,
InfoType_PriorityMask = 1,
InfoType_AliasRegionAddress = 2,
InfoType_AliasRegionSize = 3,
InfoType_HeapRegionAddress = 4,
InfoType_HeapRegionSize = 5,
InfoType_TotalMemorySize = 6,
InfoType_UsedMemorySize = 7,
InfoType_DebuggerAttached = 8,
InfoType_ResourceLimit = 9,
InfoType_IdleTickCount = 10,
InfoType_RandomEntropy = 11,
InfoType_AslrRegionAddress = 12,
InfoType_AslrRegionSize = 13,
InfoType_StackRegionAddress = 14,
InfoType_StackRegionSize = 15,
InfoType_SystemResourceSizeTotal = 16,
InfoType_SystemResourceSizeUsed = 17,
InfoType_ProgramId = 18,
InfoType_InitialProcessIdRange = 19,
InfoType_UserExceptionContextAddress = 20,
InfoType_TotalNonSystemMemorySize = 21,
InfoType_UsedNonSystemMemorySize = 22,
InfoType_IsApplication = 23,
InfoType_FreeThreadCount = 24,
InfoType_ThreadTickCount = 25,
InfoType_IsSvcPermitted = 26,
InfoType_IoRegionHint = 27,
InfoType_AliasRegionExtraSize = 28,
/* ... */
InfoType_TransferMemoryHint = 34,
InfoType_MesosphereMeta = 65000,
InfoType_MesosphereCurrentProcess = 65001,
};
enum TickCountInfo : u64 {
TickCountInfo_Core0 = 0,
TickCountInfo_Core1 = 1,
TickCountInfo_Core2 = 2,
TickCountInfo_Core3 = 3,
TickCountInfo_Total = std::numeric_limits<s64>::max(),
};
enum MesosphereMetaInfo : u64 {
MesosphereMetaInfo_KernelVersion = 0,
MesosphereMetaInfo_IsKTraceEnabled = 1,
MesosphereMetaInfo_IsSingleStepEnabled = 2,
};
enum SystemInfoType : u32 {
SystemInfoType_TotalPhysicalMemorySize = 0,
SystemInfoType_UsedPhysicalMemorySize = 1,
SystemInfoType_InitialProcessIdRange = 2,
};
enum InitialProcessIdRangeInfo : u64 {
InitialProcessIdRangeInfo_Minimum = 0,
InitialProcessIdRangeInfo_Maximum = 1,
};
enum PhysicalMemorySystemInfo : u64 {
PhysicalMemorySystemInfo_Application = 0,
PhysicalMemorySystemInfo_Applet = 1,
PhysicalMemorySystemInfo_System = 2,
PhysicalMemorySystemInfo_SystemUnsafe = 3,
};
enum LastThreadInfoFlag : u32 {
LastThreadInfoFlag_ThreadInSystemCall = (1u << 0),
};
enum LimitableResource : u32 {
LimitableResource_PhysicalMemoryMax = 0,
LimitableResource_ThreadCountMax = 1,
LimitableResource_EventCountMax = 2,
LimitableResource_TransferMemoryCountMax = 3,
LimitableResource_SessionCountMax = 4,
LimitableResource_Count,
};
enum CodeMemoryOperation : u32 {
CodeMemoryOperation_Map = 0,
CodeMemoryOperation_MapToOwner = 1,
CodeMemoryOperation_Unmap = 2,
CodeMemoryOperation_UnmapFromOwner = 3,
};
/* Synchronization types. */
enum SignalType : u32 {
SignalType_Signal = 0,
SignalType_SignalAndIncrementIfEqual = 1,
SignalType_SignalAndModifyByWaitingCountIfEqual = 2,
};
enum ArbitrationType : u32 {
ArbitrationType_WaitIfLessThan = 0,
ArbitrationType_DecrementAndWaitIfLessThan = 1,
ArbitrationType_WaitIfEqual = 2,
ArbitrationType_WaitIfEqual64 = 3,
};
enum YieldType : s64 {
YieldType_WithoutCoreMigration = 0,
YieldType_WithCoreMigration = -1,
YieldType_ToAnyThread = -2,
};
enum InterruptType : u32 {
InterruptType_Edge = 0,
InterruptType_Level = 1,
};
/* Thread types. */
using ThreadFunc = ams::svc::Address;
#if defined(ATMOSPHERE_ARCH_ARM_V8A)
struct ThreadContext {
u64 r[29];
u64 fp;
u64 lr;
u64 sp;
u64 pc;
u32 pstate;
u32 padding;
u128 v[32];
u32 fpcr;
u32 fpsr;
u64 tpidr;
};
static_assert(sizeof(ThreadContext) == 0x320);
#elif defined(ATMOSPHERE_ARCH_ARM_V7A)
struct ThreadContext {
u32 r[13];
u32 sp;
u32 lr;
u32 pc;
u32 cpsr;
u32 padding;
u64 fpu_registers[32];
u32 fpscr;
u32 fpexc;
u32 tpidr;
};
static_assert(sizeof(ThreadContext) == 0x158);
#else
#if !defined(ATMOSPHERE_IS_EXOSPHERE)
#error "Unknown Architecture for ams::svc::ThreadContext"
#endif
#endif
enum ThreadSuspend : u32 {
ThreadSuspend_Debug = (1 << 0),
ThreadSuspend_User = (1 << 1),
};
enum ThreadState : u32 {
ThreadState_Waiting = 0,
ThreadState_Running = 1,
ThreadState_Terminated = 4,
ThreadState_Initializing = 5,
};
enum ThreadContextFlag : u32 {
ThreadContextFlag_General = (1 << 0),
ThreadContextFlag_Control = (1 << 1),
ThreadContextFlag_Fpu = (1 << 2),
ThreadContextFlag_FpuControl = (1 << 3),
ThreadContextFlag_All = (ThreadContextFlag_General | ThreadContextFlag_Control | ThreadContextFlag_Fpu | ThreadContextFlag_FpuControl),
ThreadContextFlag_SetSingleStep = (1u << 30),
ThreadContextFlag_ClearSingleStep = (1u << 31),
};
enum ContinueFlag : u32 {
ContinueFlag_ExceptionHandled = (1u << 0),
ContinueFlag_EnableExceptionEvent = (1u << 1),
ContinueFlag_ContinueAll = (1u << 2),
ContinueFlag_ContinueOthers = (1u << 3),
ContinueFlag_AllMask = (1u << 4) - 1,
};
enum ThreadExitReason : u32 {
ThreadExitReason_ExitThread = 0,
ThreadExitReason_TerminateThread = 1,
ThreadExitReason_ExitProcess = 2,
ThreadExitReason_TerminateProcess = 3,
};
enum ThreadActivity : u32 {
ThreadActivity_Runnable = 0,
ThreadActivity_Paused = 1,
};
constexpr inline s32 IdealCoreDontCare = -1;
constexpr inline s32 IdealCoreUseProcessValue = -2;
constexpr inline s32 IdealCoreNoUpdate = -3;
constexpr inline s32 LowestThreadPriority = 63;
constexpr inline s32 HighestThreadPriority = 0;
constexpr inline s32 SystemThreadPriorityHighest = 16;
/* Process types. */
enum ProcessInfoType : u32 {
ProcessInfoType_ProcessState = 0,
};
enum ProcessState : u32 {
ProcessState_Created = 0,
ProcessState_CreatedAttached = 1,
ProcessState_Running = 2,
ProcessState_Crashed = 3,
ProcessState_RunningAttached = 4,
ProcessState_Terminating = 5,
ProcessState_Terminated = 6,
ProcessState_DebugBreak = 7,
};
enum ProcessExitReason : u32 {
ProcessExitReason_ExitProcess = 0,
ProcessExitReason_TerminateProcess = 1,
ProcessExitReason_Exception = 2,
};
enum ProcessActivity : u32 {
ProcessActivity_Runnable = 0,
ProcessActivity_Paused = 1,
};
enum CreateProcessFlag : u32 {
/* Is 64 bit? */
CreateProcessFlag_Is64Bit = (1 << 0),
/* What kind of address space? */
CreateProcessFlag_AddressSpaceShift = 1,
CreateProcessFlag_AddressSpaceMask = (7 << CreateProcessFlag_AddressSpaceShift),
CreateProcessFlag_AddressSpace32Bit = (0 << CreateProcessFlag_AddressSpaceShift),
CreateProcessFlag_AddressSpace64BitDeprecated = (1 << CreateProcessFlag_AddressSpaceShift),
CreateProcessFlag_AddressSpace32BitWithoutAlias = (2 << CreateProcessFlag_AddressSpaceShift),
CreateProcessFlag_AddressSpace64Bit = (3 << CreateProcessFlag_AddressSpaceShift),
/* Should JIT debug be done on crash? */
CreateProcessFlag_EnableDebug = (1 << 4),
/* Should ASLR be enabled for the process? */
CreateProcessFlag_EnableAslr = (1 << 5),
/* Is the process an application? */
CreateProcessFlag_IsApplication = (1 << 6),
/* 4.x deprecated: Should use secure memory? */
CreateProcessFlag_DeprecatedUseSecureMemory = (1 << 7),
/* 5.x+ Pool partition type. */
CreateProcessFlag_PoolPartitionShift = 7,
CreateProcessFlag_PoolPartitionMask = (0xF << CreateProcessFlag_PoolPartitionShift),
CreateProcessFlag_PoolPartitionApplication = (0 << CreateProcessFlag_PoolPartitionShift),
CreateProcessFlag_PoolPartitionApplet = (1 << CreateProcessFlag_PoolPartitionShift),
CreateProcessFlag_PoolPartitionSystem = (2 << CreateProcessFlag_PoolPartitionShift),
CreateProcessFlag_PoolPartitionSystemNonSecure = (3 << CreateProcessFlag_PoolPartitionShift),
/* 7.x+ Should memory allocation be optimized? This requires IsApplication. */
CreateProcessFlag_OptimizeMemoryAllocation = (1 << 11),
/* 11.x+ DisableDeviceAddressSpaceMerge. */
CreateProcessFlag_DisableDeviceAddressSpaceMerge = (1 << 12),
/* 18.x EnableAliasRegionExtraSize. */
CreateProcessFlag_EnableAliasRegionExtraSize = (1 << 13),
/* Mask of all flags. */
CreateProcessFlag_All = CreateProcessFlag_Is64Bit |
CreateProcessFlag_AddressSpaceMask |
CreateProcessFlag_EnableDebug |
CreateProcessFlag_EnableAslr |
CreateProcessFlag_IsApplication |
CreateProcessFlag_PoolPartitionMask |
CreateProcessFlag_OptimizeMemoryAllocation |
CreateProcessFlag_DisableDeviceAddressSpaceMerge |
CreateProcessFlag_EnableAliasRegionExtraSize,
};
/* Debug types. */
enum DebugEvent : u32 {
DebugEvent_CreateProcess = 0,
DebugEvent_CreateThread = 1,
DebugEvent_ExitProcess = 2,
DebugEvent_ExitThread = 3,
DebugEvent_Exception = 4,
};
enum DebugThreadParam : u32 {
DebugThreadParam_Priority = 0,
DebugThreadParam_State = 1,
DebugThreadParam_IdealCore = 2,
DebugThreadParam_CurrentCore = 3,
DebugThreadParam_AffinityMask = 4,
};
enum DebugException : u32 {
DebugException_UndefinedInstruction = 0,
DebugException_InstructionAbort = 1,
DebugException_DataAbort = 2,
DebugException_AlignmentFault = 3,
DebugException_DebuggerAttached = 4,
DebugException_BreakPoint = 5,
DebugException_UserBreak = 6,
DebugException_DebuggerBreak = 7,
DebugException_UndefinedSystemCall = 8,
DebugException_MemorySystemError = 9,
};
enum DebugEventFlag : u32 {
DebugEventFlag_Stopped = (1u << 0),
};
enum ExceptionType : u32 {
ExceptionType_Init = 0x000,
ExceptionType_InstructionAbort = 0x100,
ExceptionType_DataAbort = 0x101,
ExceptionType_UnalignedInstruction = 0x102,
ExceptionType_UnalignedData = 0x103,
ExceptionType_UndefinedInstruction = 0x104,
ExceptionType_ExceptionInstruction = 0x105,
ExceptionType_MemorySystemError = 0x106,
ExceptionType_FpuException = 0x200,
ExceptionType_InvalidSystemCall = 0x301,
ExceptionType_SystemCallBreak = 0x302,
ExceptionType_AtmosphereStdAbort = 0xFFE,
};
enum BreakReason : u32 {
BreakReason_Panic = 0,
BreakReason_Assert = 1,
BreakReason_User = 2,
BreakReason_PreLoadDll = 3,
BreakReason_PostLoadDll = 4,
BreakReason_PreUnloadDll = 5,
BreakReason_PostUnloadDll = 6,
BreakReason_CppException = 7,
BreakReason_NotificationOnlyFlag = 0x80000000,
};
enum KernelDebugType : u32 {
KernelDebugType_Thread = 0,
KernelDebugType_ThreadCallStack = 1,
KernelDebugType_KernelObject = 2,
KernelDebugType_Handle = 3,
KernelDebugType_Memory = 4,
KernelDebugType_PageTable = 5,
KernelDebugType_CpuUtilization = 6,
KernelDebugType_Process = 7,
KernelDebugType_SuspendProcess = 8,
KernelDebugType_ResumeProcess = 9,
KernelDebugType_Port = 10,
};
enum KernelTraceState : u32 {
KernelTraceState_Disabled = 0,
KernelTraceState_Enabled = 1,
};
enum BreakPointType : u32 {
BreakPointType_HardwareInstruction = 0,
BreakPointType_HardwareData = 1,
};
enum HardwareBreakPointRegisterName : u32 {
HardwareBreakPointRegisterName_I0 = 0,
HardwareBreakPointRegisterName_I1 = 1,
HardwareBreakPointRegisterName_I2 = 2,
HardwareBreakPointRegisterName_I3 = 3,
HardwareBreakPointRegisterName_I4 = 4,
HardwareBreakPointRegisterName_I5 = 5,
HardwareBreakPointRegisterName_I6 = 6,
HardwareBreakPointRegisterName_I7 = 7,
HardwareBreakPointRegisterName_I8 = 8,
HardwareBreakPointRegisterName_I9 = 9,
HardwareBreakPointRegisterName_I10 = 10,
HardwareBreakPointRegisterName_I11 = 11,
HardwareBreakPointRegisterName_I12 = 12,
HardwareBreakPointRegisterName_I13 = 13,
HardwareBreakPointRegisterName_I14 = 14,
HardwareBreakPointRegisterName_I15 = 15,
HardwareBreakPointRegisterName_D0 = 16,
HardwareBreakPointRegisterName_D1 = 17,
HardwareBreakPointRegisterName_D2 = 18,
HardwareBreakPointRegisterName_D3 = 19,
HardwareBreakPointRegisterName_D4 = 20,
HardwareBreakPointRegisterName_D5 = 21,
HardwareBreakPointRegisterName_D6 = 22,
HardwareBreakPointRegisterName_D7 = 23,
HardwareBreakPointRegisterName_D8 = 24,
HardwareBreakPointRegisterName_D9 = 25,
HardwareBreakPointRegisterName_D10 = 26,
HardwareBreakPointRegisterName_D11 = 27,
HardwareBreakPointRegisterName_D12 = 28,
HardwareBreakPointRegisterName_D13 = 29,
HardwareBreakPointRegisterName_D14 = 30,
HardwareBreakPointRegisterName_D15 = 31,
};
/* Architecture specific types. */
namespace aarch64 {
struct ExceptionInfo {
u64 r[9];
u64 lr;
u64 sp;
u64 pc;
u32 pstate;
u32 afsr0;
u32 afsr1;
u32 esr;
u64 far;
};
static_assert(sizeof(ExceptionInfo) == 0x78);
struct ProcessLocalRegion {
u64 data[(0x1C0 - sizeof(ExceptionInfo)) / sizeof(u64)];
ExceptionInfo exception_info;
u64 dying_message_region_address;
u64 dying_message_region_size;
u64 padding[6];
};
static_assert(sizeof(ProcessLocalRegion) == 0x200);
static_assert(AMS_OFFSETOF(ProcessLocalRegion, dying_message_region_address) == 0x1C0);
}
namespace aarch32 {
struct ExceptionInfoStatus32 {
u32 cpsr;
u32 fsr;
u32 far;
u32 fpexc;
u32 fpinst;
u32 fpinst2;
};
struct ExceptionInfoStatus64 {
u32 pstate;
u32 afsr0;
u32 afsr1;
u32 esr;
u32 far;
};
struct ExceptionInfo {
u32 r[8];
u32 sp;
u32 lr;
u32 pc;
u32 flags;
union {
ExceptionInfoStatus32 status_32;
ExceptionInfoStatus64 status_64;
};
};
static_assert(sizeof(ExceptionInfo) == 0x48);
struct ProcessLocalRegion {
u32 data[(0x1C0 - sizeof(ExceptionInfo)) / sizeof(u32)];
ExceptionInfo exception_info;
u64 dying_message_region_address;
u64 dying_message_region_size;
u64 padding[6];
};
static_assert(sizeof(ProcessLocalRegion) == 0x200);
static_assert(AMS_OFFSETOF(ProcessLocalRegion, dying_message_region_address) == 0x1C0);
}
/* Secure monitor argument shims. */
namespace lp64 {
struct SecureMonitorArguments {
u64 r[8];
};
static_assert(sizeof(SecureMonitorArguments) == 0x40);
}
namespace ilp32 {
struct SecureMonitorArguments {
u32 r[8];
};
static_assert(sizeof(SecureMonitorArguments) == 0x20);
}
}
| 23,297
|
C++
|
.h
| 563
| 32.724689
| 143
| 0.597719
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,094
|
svc_select_hardware_constants.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/svc_select_hardware_constants.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_common.hpp>
#if defined(ATMOSPHERE_BOARD_NINTENDO_NX)
#include <vapours/svc/board/nintendo/nx/svc_hardware_constants.hpp>
namespace ams::svc {
using namespace ams::svc::board::nintendo::nx;
}
#elif defined(ATMOSPHERE_BOARD_QEMU_VIRT)
#include <vapours/svc/board/qemu/virt/svc_hardware_constants.hpp>
namespace ams::svc {
using namespace ams::svc::board::qemu::virt;
}
#else
#error "Unknown board for svc Hardware Constants"
#endif
| 1,157
|
C++
|
.h
| 30
| 35.366667
| 76
| 0.742627
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,095
|
svc_hardware_constants.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/board/nintendo/nx/svc_hardware_constants.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::board::nintendo::nx {
constexpr inline const s64 TicksPerSecond = 19'200'000;
}
| 798
|
C++
|
.h
| 20
| 37.85
| 76
| 0.75871
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,096
|
svc_io_pool_type.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/board/nintendo/nx/svc_io_pool_type.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::board::nintendo::nx {
enum IoPoolType : u32 {
IoPoolType_PcieA2 = 0, /* NOTE: Name is not official. */
IoPoolType_Count = 1,
};
}
| 870
|
C++
|
.h
| 23
| 35
| 76
| 0.728351
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,097
|
svc_device_name.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/board/nintendo/nx/svc_device_name.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::board::nintendo::nx {
enum DeviceName {
DeviceName_Afi = 0,
DeviceName_Avpc = 1,
DeviceName_Dc = 2,
DeviceName_Dcb = 3,
DeviceName_Hc = 4,
DeviceName_Hda = 5,
DeviceName_Isp2 = 6,
DeviceName_MsencNvenc = 7,
DeviceName_Nv = 8,
DeviceName_Nv2 = 9,
DeviceName_Ppcs = 10,
DeviceName_Sata = 11,
DeviceName_Vi = 12,
DeviceName_Vic = 13,
DeviceName_XusbHost = 14,
DeviceName_XusbDev = 15,
DeviceName_Tsec = 16,
DeviceName_Ppcs1 = 17,
DeviceName_Dc1 = 18,
DeviceName_Sdmmc1a = 19,
DeviceName_Sdmmc2a = 20,
DeviceName_Sdmmc3a = 21,
DeviceName_Sdmmc4a = 22,
DeviceName_Isp2b = 23,
DeviceName_Gpu = 24,
DeviceName_Gpub = 25,
DeviceName_Ppcs2 = 26,
DeviceName_Nvdec = 27,
DeviceName_Ape = 28,
DeviceName_Se = 29,
DeviceName_Nvjpg = 30,
DeviceName_Hc1 = 31,
DeviceName_Se1 = 32,
DeviceName_Axiap = 33,
DeviceName_Etr = 34,
DeviceName_Tsecb = 35,
DeviceName_Tsec1 = 36,
DeviceName_Tsecb1 = 37,
DeviceName_Nvdec1 = 38,
DeviceName_Count,
};
namespace impl {
constexpr inline const size_t RequiredNonSecureSystemMemorySizeVi = 0x2280 * 4_KB;
constexpr inline const size_t RequiredNonSecureSystemMemorySizeViFatal = 0x200 * 4_KB;
constexpr inline const size_t RequiredNonSecureSystemMemorySizeNvservices = 0x704 * 4_KB;
constexpr inline const size_t RequiredNonSecureSystemMemorySizeMisc = 0x80 * 4_KB;
}
constexpr inline const size_t RequiredNonSecureSystemMemorySize = impl::RequiredNonSecureSystemMemorySizeVi +
impl::RequiredNonSecureSystemMemorySizeNvservices +
impl::RequiredNonSecureSystemMemorySizeMisc;
constexpr inline const size_t RequiredNonSecureSystemMemorySizeWithFatal = RequiredNonSecureSystemMemorySize + impl::RequiredNonSecureSystemMemorySizeViFatal;
}
| 3,138
|
C++
|
.h
| 71
| 35.605634
| 162
| 0.598757
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,098
|
svc_hardware_constants.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/board/qemu/virt/svc_hardware_constants.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::board::qemu::virt {
constexpr inline const s64 TicksPerSecond = 19'200'000;
}
| 796
|
C++
|
.h
| 20
| 37.75
| 76
| 0.758085
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,099
|
svc_device_name.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/board/generic/svc_device_name.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::board::generic {
enum DeviceName {
/* If there is no smmu, there are no device names. */
DeviceName_Count = 0,
};
}
| 854
|
C++
|
.h
| 23
| 34.347826
| 76
| 0.731884
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,100
|
svc_thread_local_region.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/arch/arm64/svc_thread_local_region.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::arch::arm64 {
constexpr inline size_t NumTlsSlots = 16;
constexpr inline size_t MessageBufferSize = 0x100;
struct ThreadLocalRegion {
u32 message_buffer[MessageBufferSize / sizeof(u32)];
volatile u16 disable_count;
volatile u16 interrupt_flag;
volatile u8 cache_maintenance_flag;
/* TODO: How should we handle libnx vs Nintendo user thread local space? */
uintptr_t TODO[(0x200 - 0x108) / sizeof(uintptr_t)];
};
static_assert(__builtin_offsetof(ThreadLocalRegion, disable_count) == 0x100);
static_assert(__builtin_offsetof(ThreadLocalRegion, interrupt_flag) == 0x102);
static_assert(__builtin_offsetof(ThreadLocalRegion, cache_maintenance_flag) == 0x104);
ALWAYS_INLINE ThreadLocalRegion *GetThreadLocalRegion() {
ThreadLocalRegion *tlr;
__asm__ __volatile__("mrs %[tlr], tpidrro_el0" : [tlr]"=&r"(tlr));
return tlr;
}
}
| 1,662
|
C++
|
.h
| 37
| 40.486486
| 90
| 0.709877
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,101
|
svc_thread_local_region.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/arch/arm/svc_thread_local_region.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
namespace ams::svc::arch::arm {
constexpr inline size_t NumTlsSlots = 16;
constexpr inline size_t MessageBufferSize = 0x100;
struct ThreadLocalRegion {
u32 message_buffer[MessageBufferSize / sizeof(u32)];
volatile u16 disable_count;
volatile u16 interrupt_flag;
/* TODO: Should we bother adding the Nintendo aarch32 thread local context here? */
uintptr_t TODO[(0x200 - 0x104) / sizeof(uintptr_t)];
};
ALWAYS_INLINE ThreadLocalRegion *GetThreadLocalRegion() {
ThreadLocalRegion *tlr;
__asm__ __volatile__("mrc p15, 0, %[tlr], c13, c0, 3" : [tlr]"=&r"(tlr) :: "memory");
return tlr;
}
}
| 1,370
|
C++
|
.h
| 33
| 37.272727
| 93
| 0.705706
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,102
|
svc_codegen_kernel_svc_wrapper.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/svc_codegen_kernel_svc_wrapper.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_kernel_svc_wrapper.hpp>
namespace ams::svc::codegen {
#if defined(ATMOSPHERE_ARCH_ARM64) || defined(ATMOSPHERE_ARCH_ARM)
template<auto &Function64, auto &Function64From32>
class KernelSvcWrapper {
private:
/* TODO: using Aarch32 = */
using Aarch64 = impl::KernelSvcWrapperHelper<impl::Aarch64SvcInvokeAbi, impl::Aarch64Lp64Abi, impl::Aarch64Lp64Abi, Function64>;
using Aarch64From32 = impl::KernelSvcWrapperHelper<impl::Aarch32SvcInvokeAbi, impl::Aarch32Ilp32Abi, impl::Aarch64Lp64Abi, Function64From32>;
public:
/* Set omit-frame-pointer to prevent GCC from emitting MOV X29, SP instructions. */
#pragma GCC push_options
#pragma GCC optimize ("-O2")
#pragma GCC optimize ("omit-frame-pointer")
static ALWAYS_INLINE void Call64() {
if constexpr (std::is_same<typename Aarch64::ReturnType, void>::value) {
Aarch64::WrapSvcFunction();
} else {
const auto &res = Aarch64::WrapSvcFunction();
__asm__ __volatile__("" :: [res]"r"(res));
}
}
static ALWAYS_INLINE void Call64From32() {
if constexpr (std::is_same<typename Aarch64::ReturnType, void>::value) {
Aarch64From32::WrapSvcFunction();
} else {
const auto &res = Aarch64From32::WrapSvcFunction();
__asm__ __volatile__("" :: [res]"r"(res));
}
}
#pragma GCC pop_options
};
#else
#error "Unknown architecture for Kernel SVC Code Generation"
#endif
}
| 2,344
|
C++
|
.h
| 52
| 37.230769
| 153
| 0.650307
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,103
|
svc_codegen_impl_parameter.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_parameter.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_common.hpp>
namespace ams::svc::codegen::impl {
enum class Storage {
Register,
Stack,
Invalid,
};
class Location {
private:
static constexpr size_t InvalidIndex = std::numeric_limits<size_t>::max();
public:
Storage m_storage;
size_t m_index;
public:
constexpr explicit Location() : m_storage(Storage::Invalid), m_index(InvalidIndex) { /* ... */ }
constexpr explicit Location(Storage s, size_t i) : m_storage(s), m_index(i) { /* ... */ }
constexpr size_t GetIndex() const { return m_index; }
constexpr Storage GetStorage() const { return m_storage; }
constexpr bool IsValid() const {
return m_index != InvalidIndex && m_storage != Storage::Invalid;
}
constexpr bool operator==(const Location &rhs) const {
return m_index == rhs.m_index && m_storage == rhs.m_storage;
}
constexpr bool operator<(const Location &rhs) const {
if (m_storage < rhs.m_storage) {
return true;
} else if (m_storage > rhs.m_storage) {
return false;
} else {
return m_index < rhs.m_index;
}
}
constexpr bool operator>(const Location &rhs) const {
if (m_storage > rhs.m_storage) {
return true;
} else if (m_storage < rhs.m_storage) {
return false;
} else {
return m_index > rhs.m_index;
}
}
constexpr bool operator!=(const Location &rhs) const {
return !(*this == rhs);
}
};
class Parameter {
public:
static constexpr size_t MaxLocations = 8;
static constexpr size_t IdentifierLengthMax = 0x40;
class Identifier {
public:
char m_name[IdentifierLengthMax];
size_t m_index;
public:
constexpr explicit Identifier() : m_name(), m_index() { /* ... */ }
constexpr explicit Identifier(const char *nm, size_t idx = 0) : m_name(), m_index(idx) {
for (size_t i = 0; i < IdentifierLengthMax && nm[i]; i++) {
m_name[i] = nm[i];
}
}
constexpr bool operator==(const Identifier &rhs) const {
for (size_t i = 0; i < IdentifierLengthMax; i++) {
if (m_name[i] != rhs.m_name[i]) {
return false;
}
}
return m_index == rhs.m_index;
}
constexpr bool operator!=(const Identifier &rhs) const {
return !(*this == rhs);
}
};
public:
Identifier m_identifier;
ArgumentType m_type;
size_t m_type_size;
size_t m_passed_size;
bool m_passed_by_pointer;
bool m_is_boolean;
size_t m_num_locations;
Location m_locations[MaxLocations];
public:
constexpr explicit Parameter()
: m_identifier(), m_type(ArgumentType::Invalid), m_type_size(0), m_passed_size(0), m_passed_by_pointer(0), m_is_boolean(0), m_num_locations(0), m_locations()
{ /* ... */ }
constexpr explicit Parameter(Identifier id, ArgumentType t, size_t ts, size_t ps, bool p, bool b, Location l)
: m_identifier(id), m_type(t), m_type_size(ts), m_passed_size(ps), m_passed_by_pointer(p), m_is_boolean(b), m_num_locations(1), m_locations()
{
m_locations[0] = l;
}
constexpr Identifier GetIdentifier() const {
return m_identifier;
}
constexpr bool Is(Identifier rhs) const {
return m_identifier == rhs;
}
constexpr ArgumentType GetArgumentType() const {
return m_type;
}
constexpr size_t GetTypeSize() const {
return m_type_size;
}
constexpr size_t GetPassedSize() const {
return m_passed_size;
}
constexpr bool IsPassedByPointer() const {
return m_passed_by_pointer;
}
constexpr bool IsBoolean() const {
return m_is_boolean;
}
constexpr size_t GetNumLocations() const {
return m_num_locations;
}
constexpr Location GetLocation(size_t i) const {
return m_locations[i];
}
constexpr void AddLocation(Location l) {
m_locations[m_num_locations++] = l;
}
constexpr bool UsesLocation(Location l) const {
for (size_t i = 0; i < m_num_locations; i++) {
if (m_locations[i] == l) {
return true;
}
}
return false;
}
constexpr bool operator==(const Parameter &rhs) const {
if (!(m_identifier == rhs.m_identifier &&
m_type == rhs.m_type &&
m_type_size == rhs.m_type_size &&
m_passed_size == rhs.m_passed_size &&
m_passed_by_pointer == rhs.m_passed_by_pointer &&
m_is_boolean == rhs.m_is_boolean &&
m_num_locations == rhs.m_num_locations))
{
return false;
}
for (size_t i = 0; i < m_num_locations; i++) {
if (!(m_locations[i] == rhs.m_locations[i])) {
return false;
}
}
return true;
}
constexpr bool operator!=(const Parameter &rhs) const {
return !(*this == rhs);
}
};
}
| 7,019
|
C++
|
.h
| 168
| 27.202381
| 173
| 0.488566
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,104
|
svc_codegen_impl_layout_conversion.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_layout_conversion.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_common.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_parameter.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_layout.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_meta_code.hpp>
namespace ams::svc::codegen::impl {
class LayoutConversionBase {
public:
enum class OperationKind {
Move,
LoadAndStore,
PackAndUnpack,
Scatter,
Invalid,
};
class OperationMoveImpl;
class OperationLoadAndStoreImpl;
class OperationPackAndUnpackImpl;
class OperationScatterImpl;
class OperationBase{};
template<OperationKind _Kind, size_t RS, size_t PS, size_t SO, size_t PIdx, size_t... SIdx>
class Operation : public OperationBase {
public:
static constexpr OperationKind Kind = _Kind;
static constexpr size_t RegisterSize = RS;
static constexpr size_t PassedSize = PS;
static constexpr size_t StackOffset = SO;
static constexpr size_t ProcedureIndex = PIdx;
static constexpr size_t NumSvcIndices = sizeof...(SIdx);
static constexpr std::array<size_t, sizeof...(SIdx)> SvcIndices = { SIdx... };
static constexpr std::index_sequence<SIdx...> SvcIndexSequence = {};
template<size_t I>
static constexpr size_t SvcIndex = SvcIndices[I];
template<typename F>
static void ForEachSvcIndex(F f) {
(f(SIdx), ...);
}
using ImplType = typename std::conditional<Kind == OperationKind::Move, OperationMoveImpl,
typename std::conditional<Kind == OperationKind::LoadAndStore, OperationLoadAndStoreImpl,
typename std::conditional<Kind == OperationKind::PackAndUnpack, OperationPackAndUnpackImpl,
typename std::conditional<Kind == OperationKind::Scatter, OperationScatterImpl,
void>::type>::type>::type>::type;
template<size_t NPIdx>
using ModifiedType = Operation<Kind, RS, PS, SO, NPIdx, SIdx...>;
};
template<size_t RS, size_t PS, size_t PIdx, size_t SIdx>
using OperationMove = Operation<OperationKind::Move, RS, PS, 0, PIdx, SIdx>;
template<size_t RS, size_t PS, size_t PIdx, size_t SIdx>
using OperationLoadAndStore = Operation<OperationKind::LoadAndStore, RS, PS, 0, PIdx, SIdx>;
template<size_t RS, size_t PS, size_t PIdx, size_t SIdx0, size_t SIdx1>
using OperationPackAndUnpack = Operation<OperationKind::PackAndUnpack, RS, PS, 0, PIdx, SIdx0, SIdx1>;
template<size_t RS, size_t PS, size_t SO, size_t PIdx, size_t... SIdx>
using OperationScatter = Operation<OperationKind::Scatter, RS, PS, SO, PIdx, SIdx...>;
class OperationMoveImpl {
public:
template<typename Operation, size_t N>
static constexpr bool CanGenerateCodeForSvcInvocationToKernelProcedure(RegisterAllocator<N> allocator) {
static_assert(Operation::Kind == OperationKind::Move);
allocator.Free(Operation::template SvcIndex<0>);
return allocator.TryAllocate(Operation::ProcedureIndex);
}
template<typename Operation, size_t N>
static constexpr void GenerateCodeForSvcInvocationToKernelProcedure(MetaCodeGenerator &mcg, RegisterAllocator<N> &allocator) {
static_assert(Operation::Kind == OperationKind::Move);
allocator.Free(Operation::template SvcIndex<0>);
allocator.Allocate(Operation::ProcedureIndex);
mcg.template MoveRegister<Operation::ProcedureIndex, Operation::template SvcIndex<0>>();
}
};
class OperationLoadAndStoreImpl {
public:
template<typename Operation, size_t N>
static constexpr bool CanGenerateCodeForSvcInvocationToKernelProcedure(RegisterAllocator<N> allocator) {
static_assert(Operation::Kind == OperationKind::LoadAndStore);
allocator.Free(Operation::template SvcIndex<0>);
return true;
}
template<typename Operation, size_t N>
static constexpr void GenerateCodeForSvcInvocationToKernelProcedure(MetaCodeGenerator &mcg, RegisterAllocator<N> &allocator) {
static_assert(Operation::Kind == OperationKind::LoadAndStore);
allocator.Free(Operation::template SvcIndex<0>);
constexpr size_t StackOffset = Operation::ProcedureIndex * Operation::RegisterSize;
mcg.template StoreToStack<Operation::template SvcIndex<0>, StackOffset>();
}
};
class OperationPackAndUnpackImpl {
public:
template<typename Operation, size_t N>
static constexpr bool CanGenerateCodeForSvcInvocationToKernelProcedure(RegisterAllocator<N> allocator) {
static_assert(Operation::Kind == OperationKind::PackAndUnpack);
allocator.Free(Operation::template SvcIndex<0>);
allocator.Free(Operation::template SvcIndex<1>);
return allocator.TryAllocate(Operation::ProcedureIndex);
}
template<typename Operation, size_t N>
static constexpr void GenerateCodeForSvcInvocationToKernelProcedure(MetaCodeGenerator &mcg, RegisterAllocator<N> &allocator) {
static_assert(Operation::Kind == OperationKind::PackAndUnpack);
allocator.Free(Operation::template SvcIndex<0>);
allocator.Free(Operation::template SvcIndex<1>);
allocator.Allocate(Operation::ProcedureIndex);
mcg.template Pack<Operation::ProcedureIndex, Operation::template SvcIndex<0>, Operation::template SvcIndex<1>>();
}
template<typename Operation>
static constexpr void GenerateCodeForPrepareForKernelProcedureToSvcInvocation(MetaCodeGenerator &mcg) {
static_assert(Operation::Kind == OperationKind::PackAndUnpack);
AMS_UNUSED(mcg);
}
template<typename Operation>
static constexpr void GenerateCodeForKernelProcedureToSvcInvocation(MetaCodeGenerator &mcg) {
static_assert(Operation::Kind == OperationKind::PackAndUnpack);
mcg.template Unpack<Operation::template SvcIndex<0>, Operation::template SvcIndex<1>, Operation::ProcedureIndex>();
}
};
class OperationScatterImpl {
public:
template<typename Operation, size_t N>
static constexpr bool CanGenerateCodeForSvcInvocationToKernelProcedure(RegisterAllocator<N> allocator) {
static_assert(Operation::Kind == OperationKind::Scatter);
[&allocator]<size_t... SvcIndex>(std::index_sequence<SvcIndex...>) {
(allocator.Free(SvcIndex), ...);
}(Operation::SvcIndexSequence);
return allocator.TryAllocate(Operation::ProcedureIndex);
}
template<typename Operation, size_t N>
static constexpr void GenerateCodeForSvcInvocationToKernelProcedure(MetaCodeGenerator &mcg, RegisterAllocator<N> &allocator) {
static_assert(Operation::Kind == OperationKind::Scatter);
[&allocator]<size_t... SvcIndex>(std::index_sequence<SvcIndex...>) {
(allocator.Free(SvcIndex), ...);
}(Operation::SvcIndexSequence);
allocator.Allocate(Operation::ProcedureIndex);
[&mcg]<size_t... Is>(std::index_sequence<Is...>) {
(mcg.template StoreToStack<Operation::template SvcIndex<Is>, Operation::StackOffset + Operation::RegisterSize * (Is), Operation::RegisterSize>(), ...);
}(std::make_index_sequence<Operation::NumSvcIndices>());
mcg.template LoadStackAddress<Operation::ProcedureIndex, Operation::StackOffset>();
}
template<typename Operation>
static constexpr void GenerateCodeForPrepareForKernelProcedureToSvcInvocation(MetaCodeGenerator &mcg) {
static_assert(Operation::Kind == OperationKind::Scatter);
[&mcg]<size_t... Is>(std::index_sequence<Is...>) {
(mcg.template StoreToStack<Operation::template SvcIndex<Is>, Operation::StackOffset + Operation::RegisterSize * (Is), Operation::RegisterSize>(), ...);
}(std::make_index_sequence<Operation::NumSvcIndices>());
mcg.template LoadStackAddress<Operation::ProcedureIndex, Operation::StackOffset>();
}
template<typename Operation>
static constexpr void GenerateCodeForKernelProcedureToSvcInvocation(MetaCodeGenerator &mcg) {
static_assert(Operation::Kind == OperationKind::Scatter);
[&mcg]<size_t... Is>(std::index_sequence<Is...>) {
(mcg.template LoadFromStack<Operation::template SvcIndex<Is>, Operation::StackOffset + Operation::RegisterSize * (Is), Operation::RegisterSize>(), ...);
}(std::make_index_sequence<Operation::NumSvcIndices>());
}
};
};
template<typename _SvcAbiType, typename _UserAbiType, typename _KernelAbiType, typename ReturnType, typename... ArgumentTypes>
class LayoutConversion {
public:
using SvcAbiType = _SvcAbiType;
using UserAbiType = _UserAbiType;
using KernelAbiType = _KernelAbiType;
static constexpr auto LayoutForUser = ProcedureLayout::Create<UserAbiType, ReturnType, ArgumentTypes...>();
static constexpr auto LayoutForSvc = SvcInvocationLayout::Create<SvcAbiType>(LayoutForUser);
static constexpr auto LayoutForKernel = ProcedureLayout::Create<KernelAbiType, ReturnType, ArgumentTypes...>();
private:
template<bool Input, size_t ParameterIndex = 0, size_t Used = 0>
static constexpr size_t DetermineUsedStackIndices() {
[[maybe_unused]] constexpr auto Procedure = LayoutForKernel;
[[maybe_unused]] constexpr ParameterLayout Svc = Input ? LayoutForSvc.GetInputLayout() : LayoutForSvc.GetOutputLayout();
if constexpr (ParameterIndex >= Svc.GetNumParameters()) {
/* Base case: we're done. */
return Used;
} else {
/* We're processing more parameters. */
constexpr Parameter SvcParam = Svc.GetParameter(ParameterIndex);
constexpr Parameter ProcedureParam = Procedure.GetParameter(SvcParam.GetIdentifier());
if constexpr (SvcParam.IsPassedByPointer() == ProcedureParam.IsPassedByPointer()) {
/* We're not scattering, so stack won't be used. */
return DetermineUsedStackIndices<Input, ParameterIndex + 1, Used>();
} else {
/* We're scattering, and so we're using stack. */
static_assert(ProcedureParam.GetNumLocations() == 1);
constexpr size_t IndicesPerRegister = KernelAbiType::RegisterSize / SvcAbiType::RegisterSize;
static_assert(IndicesPerRegister > 0);
constexpr size_t RequiredCount = util::AlignUp(SvcParam.GetNumLocations(), IndicesPerRegister) / IndicesPerRegister;
return DetermineUsedStackIndices<Input, ParameterIndex + 1, Used + RequiredCount>();
}
}
}
static constexpr size_t AbiUsedStackIndices = [] {
constexpr auto KernLayout = LayoutForKernel.GetInputLayout();
size_t used = 0;
for (size_t i = 0; i < KernLayout.GetNumParameters(); i++) {
const auto Param = KernLayout.GetParameter(i);
for (size_t j = 0; j < Param.GetNumLocations(); j++) {
const auto Loc = Param.GetLocation(j);
if (Loc.GetStorage() == Storage::Stack) {
used = std::max(used, Loc.GetIndex() + 1);
}
}
}
return used;
}();
static constexpr size_t BeforeUsedStackIndices = DetermineUsedStackIndices<true>();
static constexpr size_t AfterUsedStackIndices = DetermineUsedStackIndices<false>();
template<bool Input, size_t ParameterIndex, size_t LocationIndex>
static constexpr auto ZipMoveOperations() {
constexpr auto Procedure = LayoutForKernel;
constexpr ParameterLayout Svc = Input ? LayoutForSvc.GetInputLayout() : LayoutForSvc.GetOutputLayout();
static_assert(ParameterIndex < Svc.GetNumParameters());
constexpr Parameter SvcParam = Svc.GetParameter(ParameterIndex);
constexpr Parameter ProcedureParam = Procedure.GetParameter(SvcParam.GetIdentifier());
static_assert(SvcParam.IsPassedByPointer() == ProcedureParam.IsPassedByPointer());
static_assert(SvcParam.GetNumLocations() == ProcedureParam.GetNumLocations());
if constexpr (LocationIndex >= SvcParam.GetNumLocations()) {
/* Base case: we're done. */
return std::tuple<>{};
} else {
constexpr Location SvcLoc = SvcParam.GetLocation(LocationIndex);
constexpr Location ProcedureLoc = ProcedureParam.GetLocation(LocationIndex);
if constexpr (SvcLoc == ProcedureLoc) {
/* No need to emit an operation if we're not changing where we are. */
return ZipMoveOperations<Input, ParameterIndex, LocationIndex + 1>();
} else {
/* Svc location needs to be in a register. */
static_assert(SvcLoc.GetStorage() == Storage::Register);
constexpr size_t Size = KernelAbiType::RegisterSize;
if constexpr (ProcedureLoc.GetStorage() == Storage::Register) {
using OperationType = LayoutConversionBase::OperationMove<Size, Size, ProcedureLoc.GetIndex(), SvcLoc.GetIndex()>;
constexpr auto cur_op = std::make_tuple(OperationType{});
return std::tuple_cat(cur_op, ZipMoveOperations<Input, ParameterIndex, LocationIndex + 1>());
} else {
using OperationType = LayoutConversionBase::OperationLoadAndStore<Size, Size, ProcedureLoc.GetIndex(), SvcLoc.GetIndex()>;
constexpr auto cur_op = std::make_tuple(OperationType{});
return std::tuple_cat(cur_op, ZipMoveOperations<Input, ParameterIndex, LocationIndex + 1>());
}
}
}
}
template<bool Input, size_t ParameterIndex, size_t StackIndex>
static constexpr auto DetermineConversionOperations() {
[[maybe_unused]] constexpr auto Procedure = LayoutForKernel;
[[maybe_unused]] constexpr ParameterLayout Svc = Input ? LayoutForSvc.GetInputLayout() : LayoutForSvc.GetOutputLayout();
[[maybe_unused]] constexpr std::array<size_t, Svc.GetNumParameters()> ParameterMap = []<auto CapturedSvc>(){
/* We want to iterate over the parameters in sorted order. */
std::array<size_t, CapturedSvc.GetNumParameters()> map{};
const size_t num_parameters = CapturedSvc.GetNumParameters();
for (size_t i = 0; i < num_parameters; i++) {
map[i] = i;
}
for (size_t i = 1; i < num_parameters; i++) {
for (size_t j = i; j > 0 && CapturedSvc.GetParameter(map[j-1]).GetLocation(0) > CapturedSvc.GetParameter(map[j]).GetLocation(0); j--) {
std::swap(map[j], map[j-1]);
}
}
return map;
}.template operator()<Svc>();
if constexpr (ParameterIndex >= Svc.GetNumParameters()) {
/* Base case: we're done. */
if constexpr (Input) {
static_assert(StackIndex == BeforeUsedStackIndices + AbiUsedStackIndices);
} else {
static_assert(StackIndex == AfterUsedStackIndices + BeforeUsedStackIndices + AbiUsedStackIndices);
}
return std::tuple<>{};
} else {
/* We're processing more parameters. */
constexpr Parameter SvcParam = Svc.GetParameter(ParameterMap[ParameterIndex]);
constexpr Parameter ProcedureParam = Procedure.GetParameter(SvcParam.GetIdentifier());
if constexpr (SvcParam.IsPassedByPointer() == ProcedureParam.IsPassedByPointer()) {
if constexpr (SvcParam.GetNumLocations() == ProcedureParam.GetNumLocations()) {
/* Normal moves and loads/stores. */
return std::tuple_cat(ZipMoveOperations<Input, ParameterMap[ParameterIndex], 0>(), DetermineConversionOperations<Input, ParameterIndex + 1, StackIndex>());
} else {
/* We're packing. */
/* Make sure we're handling the 2 -> 1 case. */
static_assert(SvcParam.GetNumLocations() == 2);
static_assert(ProcedureParam.GetNumLocations() == 1);
constexpr Location ProcedureLoc = ProcedureParam.GetLocation(0);
constexpr Location SvcLoc0 = SvcParam.GetLocation(0);
constexpr Location SvcLoc1 = SvcParam.GetLocation(1);
static_assert(ProcedureLoc.GetStorage() == Storage::Register);
static_assert(SvcLoc0.GetStorage() == Storage::Register);
static_assert(SvcLoc1.GetStorage() == Storage::Register);
constexpr size_t Size = KernelAbiType::RegisterSize;
using OperationType = LayoutConversionBase::OperationPackAndUnpack<Size, Size, ProcedureLoc.GetIndex(), SvcLoc0.GetIndex(), SvcLoc1.GetIndex()>;
constexpr auto cur_op = std::make_tuple(OperationType{});
return std::tuple_cat(cur_op, DetermineConversionOperations<Input, ParameterIndex + 1, StackIndex>());
}
} else {
/* One operation, since we're scattering. */
static_assert(ProcedureParam.GetNumLocations() == 1);
constexpr Location ProcedureLoc = ProcedureParam.GetLocation(0);
constexpr size_t IndicesPerRegister = KernelAbiType::RegisterSize / SvcAbiType::RegisterSize;
static_assert(IndicesPerRegister > 0);
constexpr size_t RequiredCount = util::AlignUp(SvcParam.GetNumLocations(), IndicesPerRegister) / IndicesPerRegister;
if constexpr (ProcedureLoc.GetStorage() == Storage::Register) {
/* Scattering. In register during kernel call. */
constexpr size_t RegisterSize = SvcAbiType::RegisterSize;
constexpr size_t PassedSize = ProcedureParam.GetTypeSize();
constexpr auto SvcIndexSequence = []<auto CapturedSvcParam, size_t... Is>(std::index_sequence<Is...>) {
return std::index_sequence<CapturedSvcParam.GetLocation(Is).GetIndex()...>{};
}.template operator()<SvcParam>(std::make_index_sequence<SvcParam.GetNumLocations()>());
constexpr auto OperationValue = []<auto CapturedProcedureLoc, size_t... Is>(std::index_sequence<Is...>) {
return LayoutConversionBase::OperationScatter<RegisterSize, PassedSize, StackIndex * KernelAbiType::RegisterSize, CapturedProcedureLoc.GetIndex(), Is...>{};
}.template operator()<ProcedureLoc>(SvcIndexSequence);
constexpr auto cur_op = std::make_tuple(OperationValue);
return std::tuple_cat(cur_op, DetermineConversionOperations<Input, ParameterIndex + 1, StackIndex + RequiredCount>());
} else {
/* TODO: How should on-stack-during-kernel-call be handled? */
static_assert(ProcedureLoc.GetStorage() == Storage::Register);
}
}
}
}
static constexpr size_t PreserveRegisterStartIndex = SvcAbiType::ArgumentRegisterCount;
static constexpr size_t PreserveRegisterEndIndex = std::min(KernelAbiType::ArgumentRegisterCount, SvcAbiType::RegisterCount);
static constexpr size_t ClearRegisterStartIndex = 0;
static constexpr size_t ClearRegisterEndIndex = std::min(KernelAbiType::ArgumentRegisterCount, SvcAbiType::RegisterCount);
template<size_t Index>
static constexpr bool ShouldPreserveRegister = (PreserveRegisterStartIndex <= Index && Index < PreserveRegisterEndIndex) &&
LayoutForSvc.GetInputLayout().IsRegisterFree(Index) && LayoutForSvc.GetOutputLayout().IsRegisterFree(Index);
template<size_t Index>
static constexpr bool ShouldClearRegister = (ClearRegisterStartIndex <= Index && Index < ClearRegisterEndIndex) &&
LayoutForSvc.GetOutputLayout().IsRegisterFree(Index) && !ShouldPreserveRegister<Index>;
template<size_t Index = PreserveRegisterStartIndex>
static constexpr auto DeterminePreserveRegisters() {
static_assert(PreserveRegisterStartIndex <= Index && Index <= PreserveRegisterEndIndex);
if constexpr (Index >= PreserveRegisterEndIndex) {
/* Base case: we're done. */
return std::index_sequence<>{};
} else {
if constexpr (ShouldPreserveRegister<Index>) {
/* Preserve this register. */
return IndexSequenceCat(std::index_sequence<Index>{}, DeterminePreserveRegisters<Index + 1>());
} else {
/* We don't need to preserve register, so we can skip onwards. */
return IndexSequenceCat(std::index_sequence<>{}, DeterminePreserveRegisters<Index + 1>());
}
}
}
template<size_t Index = ClearRegisterStartIndex>
static constexpr auto DetermineClearRegisters() {
static_assert(ClearRegisterStartIndex <= Index && Index <= ClearRegisterEndIndex);
if constexpr (Index >= ClearRegisterEndIndex) {
/* Base case: we're done. */
return std::index_sequence<>{};
} else {
if constexpr (ShouldClearRegister<Index>) {
/* Clear this register. */
return IndexSequenceCat(std::index_sequence<Index>{}, DetermineClearRegisters<Index + 1>());
} else {
/* We don't need to preserve register, so we can skip onwards. */
return IndexSequenceCat(std::index_sequence<>{}, DetermineClearRegisters<Index + 1>());
}
}
}
public:
static constexpr size_t NonAbiUsedStackIndices = AfterUsedStackIndices + BeforeUsedStackIndices;
using BeforeOperations = decltype(DetermineConversionOperations<true, 0, AbiUsedStackIndices>());
using AfterOperations = decltype(DetermineConversionOperations<false, 0, AbiUsedStackIndices + BeforeUsedStackIndices>());
static constexpr size_t NumBeforeOperations = std::tuple_size<BeforeOperations>::value;
static constexpr size_t NumAfterOperations = std::tuple_size<AfterOperations>::value;
using PreserveRegisters = decltype(DeterminePreserveRegisters());
using ClearRegisters = decltype(DetermineClearRegisters());
static constexpr size_t NumPreserveRegisters = PreserveRegisters::size();
static constexpr size_t NumClearRegisters = ClearRegisters::size();
static constexpr auto PreserveRegistersArray = ConvertToArray(PreserveRegisters{});
static constexpr auto ClearRegistersArray = ConvertToArray(ClearRegisters{});
public:
template<typename Operation, CodeGenerationKind CodeGenKind, size_t N>
static constexpr bool CanGenerateCode(RegisterAllocator<N> allocator) {
if constexpr (CodeGenKind == CodeGenerationKind::SvcInvocationToKernelProcedure) {
return Operation::ImplType::template CanGenerateCodeForSvcInvocationToKernelProcedure<Operation>(allocator);
} else {
static_assert(false, "Invalid CodeGenerationKind");
}
}
template<typename Operation, CodeGenerationKind CodeGenKind, size_t N>
static constexpr void GenerateCode(MetaCodeGenerator &mcg, RegisterAllocator<N> &allocator) {
if constexpr (CodeGenKind == CodeGenerationKind::SvcInvocationToKernelProcedure) {
Operation::ImplType::template GenerateCodeForSvcInvocationToKernelProcedure<Operation>(mcg, allocator);
} else if constexpr (CodeGenKind == CodeGenerationKind::PrepareForKernelProcedureToSvcInvocation) {
Operation::ImplType::template GenerateCodeForPrepareForKernelProcedureToSvcInvocation<Operation>(mcg);
} else if constexpr (CodeGenKind == CodeGenerationKind::KernelProcedureToSvcInvocation) {
Operation::ImplType::template GenerateCodeForKernelProcedureToSvcInvocation<Operation>(mcg);
} else {
static_assert(false, "Invalid CodeGenerationKind");
}
}
};
}
| 28,742
|
C++
|
.h
| 404
| 51.25495
| 188
| 0.582024
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,105
|
svc_codegen_impl_code_generator.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_code_generator.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_common.hpp>
namespace ams::svc::codegen::impl {
#define SVC_CODEGEN_FOR_I_FROM_0_TO_64(HANDLER, ...) \
HANDLER( 0, ## __VA_ARGS__); HANDLER( 1, ## __VA_ARGS__); HANDLER( 2, ## __VA_ARGS__); HANDLER( 3, ## __VA_ARGS__); \
HANDLER( 4, ## __VA_ARGS__); HANDLER( 5, ## __VA_ARGS__); HANDLER( 6, ## __VA_ARGS__); HANDLER( 7, ## __VA_ARGS__); \
HANDLER( 8, ## __VA_ARGS__); HANDLER( 9, ## __VA_ARGS__); HANDLER(10, ## __VA_ARGS__); HANDLER(11, ## __VA_ARGS__); \
HANDLER(12, ## __VA_ARGS__); HANDLER(13, ## __VA_ARGS__); HANDLER(14, ## __VA_ARGS__); HANDLER(15, ## __VA_ARGS__); \
HANDLER(16, ## __VA_ARGS__); HANDLER(17, ## __VA_ARGS__); HANDLER(18, ## __VA_ARGS__); HANDLER(19, ## __VA_ARGS__); \
HANDLER(20, ## __VA_ARGS__); HANDLER(21, ## __VA_ARGS__); HANDLER(22, ## __VA_ARGS__); HANDLER(23, ## __VA_ARGS__); \
HANDLER(24, ## __VA_ARGS__); HANDLER(25, ## __VA_ARGS__); HANDLER(26, ## __VA_ARGS__); HANDLER(27, ## __VA_ARGS__); \
HANDLER(28, ## __VA_ARGS__); HANDLER(29, ## __VA_ARGS__); HANDLER(30, ## __VA_ARGS__); HANDLER(31, ## __VA_ARGS__); \
HANDLER(32, ## __VA_ARGS__); HANDLER(33, ## __VA_ARGS__); HANDLER(34, ## __VA_ARGS__); HANDLER(35, ## __VA_ARGS__); \
HANDLER(36, ## __VA_ARGS__); HANDLER(37, ## __VA_ARGS__); HANDLER(38, ## __VA_ARGS__); HANDLER(39, ## __VA_ARGS__); \
HANDLER(40, ## __VA_ARGS__); HANDLER(41, ## __VA_ARGS__); HANDLER(42, ## __VA_ARGS__); HANDLER(43, ## __VA_ARGS__); \
HANDLER(44, ## __VA_ARGS__); HANDLER(45, ## __VA_ARGS__); HANDLER(46, ## __VA_ARGS__); HANDLER(47, ## __VA_ARGS__); \
HANDLER(48, ## __VA_ARGS__); HANDLER(49, ## __VA_ARGS__); HANDLER(50, ## __VA_ARGS__); HANDLER(51, ## __VA_ARGS__); \
HANDLER(52, ## __VA_ARGS__); HANDLER(53, ## __VA_ARGS__); HANDLER(54, ## __VA_ARGS__); HANDLER(55, ## __VA_ARGS__); \
HANDLER(56, ## __VA_ARGS__); HANDLER(57, ## __VA_ARGS__); HANDLER(58, ## __VA_ARGS__); HANDLER(59, ## __VA_ARGS__); \
HANDLER(60, ## __VA_ARGS__); HANDLER(61, ## __VA_ARGS__); HANDLER(62, ## __VA_ARGS__); HANDLER(63, ## __VA_ARGS__);
class Aarch64CodeGenerator {
private:
struct RegisterPair {
size_t First;
size_t Second;
};
template<size_t ...Registers>
struct RegisterPairHelper;
template<size_t First, size_t Second, size_t ...Rest>
struct RegisterPairHelper<First, Second, Rest...> {
static constexpr size_t PairCount = 1 + RegisterPairHelper<Rest...>::PairCount;
static constexpr std::array<RegisterPair, PairCount> Pairs = [] {
std::array<RegisterPair, PairCount> pairs = {};
pairs[0] = RegisterPair{First, Second};
if constexpr (RegisterPairHelper<Rest...>::PairCount) {
for (size_t i = 0; i < RegisterPairHelper<Rest...>::PairCount; i++) {
pairs[1+i] = RegisterPairHelper<Rest...>::Pairs[i];
}
}
return pairs;
}();
};
template<size_t First, size_t Second>
struct RegisterPairHelper<First, Second> {
static constexpr size_t PairCount = 1;
static constexpr std::array<RegisterPair, PairCount> Pairs = { RegisterPair{First, Second} };
};
template<size_t First>
struct RegisterPairHelper<First> {
static constexpr size_t PairCount = 0;
static constexpr std::array<RegisterPair, 0> Pairs = {};
};
template<size_t Reg>
static ALWAYS_INLINE void ClearRegister() {
__asm__ __volatile__("mov x%c[r], xzr" :: [r]"i"(Reg) : "memory");
}
template<size_t Reg>
static ALWAYS_INLINE void SaveRegister() {
__asm__ __volatile__("str x%c[r], [sp, -16]!" :: [r]"i"(Reg) : "memory");
}
template<size_t Reg>
static ALWAYS_INLINE void RestoreRegister() {
__asm__ __volatile__("ldr x%c[r], [sp], 16" :: [r]"i"(Reg) : "memory");
}
template<size_t Reg0, size_t Reg1>
static ALWAYS_INLINE void SaveRegisterPair() {
__asm__ __volatile__("stp x%c[r0], x%c[r1], [sp, -16]!" :: [r0]"i"(Reg0), [r1]"i"(Reg1) : "memory");
}
template<size_t Reg0, size_t Reg1>
static ALWAYS_INLINE void RestoreRegisterPair() {
__asm__ __volatile__("ldp x%c[r0], x%c[r1], [sp], 16" :: [r0]"i"(Reg0), [r1]"i"(Reg1) : "memory");
}
template<size_t First, size_t... Rest>
static ALWAYS_INLINE void SaveRegistersImpl() {
#define SVC_CODEGEN_HANDLER(n) \
do { if constexpr ((63 - n) < Pairs.size()) { SaveRegisterPair<Pairs[(63 - n)].First, Pairs[(63 - n)].Second>(); } } while (0)
if constexpr (sizeof...(Rest) % 2 == 1) {
/* Even number of registers. */
constexpr auto Pairs = RegisterPairHelper<First, Rest...>::Pairs;
static_assert(Pairs.size() <= 8);
SVC_CODEGEN_FOR_I_FROM_0_TO_64(SVC_CODEGEN_HANDLER)
} else if constexpr (sizeof...(Rest) > 0) {
/* Odd number of registers. */
constexpr auto Pairs = RegisterPairHelper<Rest...>::Pairs;
static_assert(Pairs.size() <= 8);
SVC_CODEGEN_FOR_I_FROM_0_TO_64(SVC_CODEGEN_HANDLER)
SaveRegister<First>();
} else {
/* Only one register. */
SaveRegister<First>();
}
#undef SVC_CODEGEN_HANDLER
}
template<size_t First, size_t... Rest>
static ALWAYS_INLINE void RestoreRegistersImpl() {
#define SVC_CODEGEN_HANDLER(n) \
do { if constexpr (n < Pairs.size()) { RestoreRegisterPair<Pairs[n].First, Pairs[n].Second>(); } } while (0)
if constexpr (sizeof...(Rest) % 2 == 1) {
/* Even number of registers. */
constexpr auto Pairs = RegisterPairHelper<First, Rest...>::Pairs;
static_assert(Pairs.size() <= 8);
SVC_CODEGEN_FOR_I_FROM_0_TO_64(SVC_CODEGEN_HANDLER)
} else if constexpr (sizeof...(Rest) > 0) {
/* Odd number of registers. */
RestoreRegister<First>();
constexpr auto Pairs = RegisterPairHelper<Rest...>::Pairs;
static_assert(Pairs.size() <= 8);
SVC_CODEGEN_FOR_I_FROM_0_TO_64(SVC_CODEGEN_HANDLER)
} else {
/* Only one register. */
RestoreRegister<First>();
}
#undef SVC_CODEGEN_HANDLER
}
public:
template<size_t... Registers>
static ALWAYS_INLINE void SaveRegisters() {
if constexpr (sizeof...(Registers) > 0) {
SaveRegistersImpl<Registers...>();
}
}
template<size_t... Registers>
static ALWAYS_INLINE void RestoreRegisters() {
if constexpr (sizeof...(Registers) > 0) {
RestoreRegistersImpl<Registers...>();
}
}
template<size_t... Registers>
static ALWAYS_INLINE void ClearRegisters() {
static_assert(sizeof...(Registers) <= 8);
(ClearRegister<Registers>(), ...);
}
template<size_t Size>
static ALWAYS_INLINE void AllocateStackSpace() {
if constexpr (Size > 0) {
__asm__ __volatile__("sub sp, sp, %c[size]" :: [size]"i"(util::AlignUp(Size, 16)) : "memory");
}
}
template<size_t Size>
static ALWAYS_INLINE void FreeStackSpace() {
if constexpr (Size > 0) {
__asm__ __volatile__("add sp, sp, %c[size]" :: [size]"i"(util::AlignUp(Size, 16)) : "memory");
}
}
template<size_t Dst, size_t Src>
static ALWAYS_INLINE void MoveRegister() {
__asm__ __volatile__("mov x%c[dst], x%c[src]" :: [dst]"i"(Dst), [src]"i"(Src) : "memory");
}
template<size_t Reg>
static ALWAYS_INLINE void ConvertToBoolean() {
__asm__ __volatile__("and x%c[reg], x%c[reg], #1" :: [reg]"i"(Reg) : "memory");
}
template<size_t Reg, size_t Offset, size_t Size>
static ALWAYS_INLINE void LoadFromStack() {
if constexpr (Size == 4) {
__asm__ __volatile__("ldr w%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory");
} else if constexpr (Size == 8) {
__asm__ __volatile__("ldr x%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory");
} else {
static_assert(false, "Invalid Size");
}
}
template<size_t Reg0, size_t Reg1, size_t Offset, size_t Size>
static ALWAYS_INLINE void LoadPairFromStack() {
if constexpr (Size == 4) {
__asm__ __volatile__("ldp w%c[r0], w%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory");
} else if constexpr (Size == 8) {
__asm__ __volatile__("ldp x%c[r0], x%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory");
} else {
static_assert(false, "Invalid Size");
}
}
template<size_t Reg, size_t Offset, size_t Size>
static ALWAYS_INLINE void StoreToStack() {
if constexpr (Size == 4) {
__asm__ __volatile__("str w%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory");
} else if constexpr (Size == 8) {
__asm__ __volatile__("str x%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory");
} else {
static_assert(false, "Invalid Size");
}
}
template<size_t Reg0, size_t Reg1, size_t Offset, size_t Size>
static ALWAYS_INLINE void StorePairToStack() {
if constexpr (Size == 4) {
__asm__ __volatile__("stp w%c[r0], w%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory");
} else if constexpr (Size == 8) {
__asm__ __volatile__("stp x%c[r0], x%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory");
} else {
static_assert(false, "Invalid Size");
}
}
template<size_t Dst, size_t Low, size_t High>
static ALWAYS_INLINE void Pack() {
__asm__ __volatile__("orr x%c[dst], x%c[low], x%c[high], lsl #32" :: [dst]"i"(Dst), [low]"i"(Low), [high]"i"(High) : "memory");
}
template<size_t Low, size_t High, size_t Src>
static ALWAYS_INLINE void Unpack() {
if constexpr (Src != Low) {
MoveRegister<Src, Low>();
}
__asm__ __volatile__("lsr x%c[high], x%c[src], #32" :: [high]"i"(High), [src]"i"(Src) : "memory");
}
template<size_t Dst, size_t Offset>
static ALWAYS_INLINE void LoadStackAddress() {
if constexpr (Offset > 0) {
__asm__ __volatile__("add x%c[dst], sp, %c[offset]" :: [dst]"i"(Dst), [offset]"i"(Offset) : "memory");
} else if constexpr (Offset == 0) {
__asm__ __volatile__("mov x%c[dst], sp" :: [dst]"i"(Dst) : "memory");
}
}
};
class Aarch32CodeGenerator {
/* TODO */
};
template<typename CodeGenerator, auto MetaCode>
static ALWAYS_INLINE void GenerateCodeForMetaCode() {
constexpr size_t NumOperations = MetaCode.GetNumOperations();
static_assert(NumOperations <= 64);
#define SVC_CODEGEN_HANDLER(n) do { if constexpr (n < NumOperations) { constexpr auto Operation = MetaCode.GetOperation(n); GenerateCodeForOperation<CodeGenerator, Operation>(); } } while (0)
SVC_CODEGEN_FOR_I_FROM_0_TO_64(SVC_CODEGEN_HANDLER)
#undef SVC_CODEGEN_HANDLER
}
#undef SVC_CODEGEN_FOR_I_FROM_0_TO_64
}
| 13,772
|
C++
|
.h
| 240
| 43.029167
| 199
| 0.489439
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,106
|
svc_codegen_impl_meta_code.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_meta_code.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_common.hpp>
namespace ams::svc::codegen::impl {
class MetaCode {
public:
static constexpr size_t MaxOperations = 0x40;
enum class OperationKind {
SaveRegisters,
RestoreRegisters,
ClearRegisters,
AllocateStackSpace,
FreeStackSpace,
MoveRegister,
ConvertToBoolean,
LoadFromStack,
LoadPairFromStack,
StoreToStack,
StorePairToStack,
Pack,
Unpack,
LoadStackAddress,
};
static constexpr const char *GetOperationKindName(OperationKind k) {
#define META_CODE_OPERATION_KIND_ENUM_CASE(s) case OperationKind::s: return #s
switch (k) {
META_CODE_OPERATION_KIND_ENUM_CASE(SaveRegisters);
META_CODE_OPERATION_KIND_ENUM_CASE(RestoreRegisters);
META_CODE_OPERATION_KIND_ENUM_CASE(ClearRegisters);
META_CODE_OPERATION_KIND_ENUM_CASE(AllocateStackSpace);
META_CODE_OPERATION_KIND_ENUM_CASE(FreeStackSpace);
META_CODE_OPERATION_KIND_ENUM_CASE(MoveRegister);
META_CODE_OPERATION_KIND_ENUM_CASE(ConvertToBoolean);
META_CODE_OPERATION_KIND_ENUM_CASE(LoadFromStack);
META_CODE_OPERATION_KIND_ENUM_CASE(LoadPairFromStack);
META_CODE_OPERATION_KIND_ENUM_CASE(StoreToStack);
META_CODE_OPERATION_KIND_ENUM_CASE(StorePairToStack);
META_CODE_OPERATION_KIND_ENUM_CASE(Pack);
META_CODE_OPERATION_KIND_ENUM_CASE(Unpack);
META_CODE_OPERATION_KIND_ENUM_CASE(LoadStackAddress);
default:
std::abort();
}
#undef META_CODE_OPERATION_KIND_ENUM_CASE
}
struct Operation {
OperationKind kind;
size_t num_parameters;
size_t parameters[16];
};
template<OperationKind Kind, size_t... Is>
static constexpr inline Operation MakeOperation() {
Operation op = {};
static_assert(sizeof...(Is) <= sizeof(op.parameters) / sizeof(op.parameters[0]));
op.kind = Kind;
op.num_parameters = sizeof...(Is);
size_t i = 0;
((op.parameters[i++] = Is), ...);
return op;
}
public:
size_t m_num_operations;
std::array<Operation, MaxOperations> m_operations;
public:
constexpr explicit MetaCode() : m_num_operations(0), m_operations() { /* ... */ }
constexpr size_t GetNumOperations() const {
return m_num_operations;
}
constexpr Operation GetOperation(size_t i) const {
return m_operations[i];
}
constexpr void AddOperation(Operation op) {
m_operations[m_num_operations++] = op;
}
};
template<auto Operation>
static constexpr auto GetOperationParameterSequence() {
constexpr size_t NumParameters = Operation.num_parameters;
return []<size_t... Is>(std::index_sequence<Is...>) {
return std::index_sequence<Operation.parameters[Is]...>{};
}(std::make_index_sequence<NumParameters>());
}
template<typename CodeGenerator, MetaCode::OperationKind Kind, size_t... Parameters>
static ALWAYS_INLINE void GenerateCodeForOperationImpl(std::index_sequence<Parameters...>) {
#define META_CODE_OPERATION_KIND_GENERATE_CODE(KIND) else if constexpr (Kind == MetaCode::OperationKind::KIND) { CodeGenerator::template KIND<Parameters...>(); }
if constexpr (false) { /* ... */ }
META_CODE_OPERATION_KIND_GENERATE_CODE(SaveRegisters)
META_CODE_OPERATION_KIND_GENERATE_CODE(RestoreRegisters)
META_CODE_OPERATION_KIND_GENERATE_CODE(ClearRegisters)
META_CODE_OPERATION_KIND_GENERATE_CODE(AllocateStackSpace)
META_CODE_OPERATION_KIND_GENERATE_CODE(FreeStackSpace)
META_CODE_OPERATION_KIND_GENERATE_CODE(MoveRegister)
META_CODE_OPERATION_KIND_GENERATE_CODE(ConvertToBoolean)
META_CODE_OPERATION_KIND_GENERATE_CODE(LoadFromStack)
META_CODE_OPERATION_KIND_GENERATE_CODE(LoadPairFromStack)
META_CODE_OPERATION_KIND_GENERATE_CODE(StoreToStack)
META_CODE_OPERATION_KIND_GENERATE_CODE(StorePairToStack)
META_CODE_OPERATION_KIND_GENERATE_CODE(Pack)
META_CODE_OPERATION_KIND_GENERATE_CODE(Unpack)
META_CODE_OPERATION_KIND_GENERATE_CODE(LoadStackAddress)
else { static_assert(false, "Unknown MetaOperationKind"); }
#undef META_CODE_OPERATION_KIND_GENERATE_CODE
}
template<typename CodeGenerator, auto Operation>
static ALWAYS_INLINE void GenerateCodeForOperation() {
GenerateCodeForOperationImpl<CodeGenerator, Operation.kind>(GetOperationParameterSequence<Operation>());
}
class MetaCodeGenerator {
private:
using OperationKind = typename MetaCode::OperationKind;
private:
MetaCode m_meta_code;
public:
constexpr explicit MetaCodeGenerator() : m_meta_code() { /* ... */ }
constexpr MetaCode GetMetaCode() const {
return m_meta_code;
}
constexpr void AddOperationDirectly(MetaCode::Operation op) {
m_meta_code.AddOperation(op);
}
template<size_t... Registers>
constexpr void SaveRegisters() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::SaveRegisters, Registers...>();
m_meta_code.AddOperation(op);
}
template<size_t... Registers>
constexpr void RestoreRegisters() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::RestoreRegisters, Registers...>();
m_meta_code.AddOperation(op);
}
template<size_t... Registers>
constexpr void ClearRegisters() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::ClearRegisters, Registers...>();
m_meta_code.AddOperation(op);
}
template<size_t Size>
constexpr void AllocateStackSpace() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::AllocateStackSpace, Size>();
m_meta_code.AddOperation(op);
}
template<size_t Size>
constexpr void FreeStackSpace() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::FreeStackSpace, Size>();
m_meta_code.AddOperation(op);
}
template<size_t Dst, size_t Src>
constexpr void MoveRegister() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::MoveRegister, Dst, Src>();
m_meta_code.AddOperation(op);
}
template<size_t Reg>
constexpr void ConvertToBoolean() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::ConvertToBoolean, Reg>();
m_meta_code.AddOperation(op);
}
template<size_t Reg, size_t Offset, size_t Size = 0>
constexpr void LoadFromStack() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::LoadFromStack, Reg, Offset, Size>();
m_meta_code.AddOperation(op);
}
template<size_t Reg0, size_t Reg1, size_t Offset, size_t Size>
constexpr void LoadPairFromStack() {
static_assert(Offset % Size == 0);
constexpr auto op = MetaCode::MakeOperation<OperationKind::LoadPairFromStack, Reg0, Reg1, Offset, Size>();
m_meta_code.AddOperation(op);
}
template<size_t Reg, size_t Offset, size_t Size = 0>
constexpr void StoreToStack() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::StoreToStack, Reg, Offset, Size>();
m_meta_code.AddOperation(op);
}
template<size_t Reg0, size_t Reg1, size_t Offset, size_t Size>
constexpr void StorePairToStack() {
static_assert(Offset % Size == 0);
constexpr auto op = MetaCode::MakeOperation<OperationKind::StorePairToStack, Reg0, Reg1, Offset, Size>();
m_meta_code.AddOperation(op);
}
template<size_t Dst, size_t Low, size_t High>
constexpr void Pack() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::Pack, Dst, Low, High>();
m_meta_code.AddOperation(op);
}
template<size_t Low, size_t High, size_t Src>
constexpr void Unpack() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::Unpack, Low, High, Src>();
m_meta_code.AddOperation(op);
}
template<size_t Dst, size_t Offset>
constexpr void LoadStackAddress() {
constexpr auto op = MetaCode::MakeOperation<OperationKind::LoadStackAddress, Dst, Offset>();
m_meta_code.AddOperation(op);
}
};
}
| 10,225
|
C++
|
.h
| 208
| 36.221154
| 169
| 0.600761
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,107
|
svc_codegen_impl_layout.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_layout.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_common.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_parameter.hpp>
namespace ams::svc::codegen::impl {
class ParameterLayout {
public:
static constexpr size_t MaxParameters = 8;
private:
static constexpr size_t InvalidIndex = std::numeric_limits<size_t>::max();
public:
/* ABI parameters. */
Abi m_abi;
/* Parameter storage. */
size_t m_num_parameters;
Parameter m_parameters[MaxParameters];
public:
constexpr explicit ParameterLayout(Abi a)
: m_abi(a), m_num_parameters(0), m_parameters()
{ /* ... */ }
constexpr void AddSingle(Parameter::Identifier id, ArgumentType type, size_t ts, size_t ps, bool p, bool b, Storage s, size_t idx) {
for (size_t i = 0; i < m_num_parameters; i++) {
if (m_parameters[i].Is(id)) {
m_parameters[i].AddLocation(Location(s, idx));
return;
}
}
m_parameters[m_num_parameters++] = Parameter(id, type, ts, ps, p, b, Location(s, idx));
}
constexpr size_t Add(Parameter::Identifier id, ArgumentType type, size_t ts, size_t ps, bool p, bool b, Storage s, size_t i) {
size_t required_registers = 0;
while (required_registers * m_abi.register_size < ps) {
this->AddSingle(id, type, ts, ps, p, b, s, i++);
required_registers++;
}
return required_registers;
}
constexpr bool UsesLocation(Location l) const {
for (size_t i = 0; i < m_num_parameters; i++) {
if (m_parameters[i].UsesLocation(l)) {
return true;
}
}
return false;
}
constexpr bool UsesRegister(size_t i) const {
return this->UsesLocation(Location(Storage::Register, i));
}
constexpr bool IsRegisterFree(size_t i) const {
return !(this->UsesRegister(i));
}
constexpr size_t GetNumParameters() const {
return m_num_parameters;
}
constexpr Parameter GetParameter(size_t i) const {
return m_parameters[i];
}
constexpr bool HasParameter(Parameter::Identifier id) const {
for (size_t i = 0; i < m_num_parameters; i++) {
if (m_parameters[i].Is(id)) {
return true;
}
}
return false;
}
constexpr Parameter GetParameter(Parameter::Identifier id) const {
for (size_t i = 0; i < m_num_parameters; i++) {
if (m_parameters[i].Is(id)) {
return m_parameters[i];
}
}
AMS_ASSUME(false);
}
};
class ProcedureLayout {
public:
Abi m_abi;
ParameterLayout m_input;
ParameterLayout m_output;
private:
template<typename AbiType, typename ArgType>
constexpr void ProcessArgument(size_t i, size_t &NGRN, size_t &NSAA) {
/* We currently don't implement support for floating point types. */
static_assert(!std::is_floating_point<ArgType>::value);
static_assert(!std::is_same<ArgType, void>::value);
constexpr size_t ArgumentTypeSize = AbiType::template Size<ArgType>;
constexpr bool PassedByPointer = IsPassedByPointer<AbiType, ArgType>;
constexpr bool IsBoolean = std::same_as<ArgType, bool>;
constexpr size_t ArgumentPassSize = PassedByPointer ? AbiType::PointerSize : ArgumentTypeSize;
/* TODO: Is there ever a case where this is not the correct alignment? */
constexpr size_t ArgumentAlignment = ArgumentPassSize;
/* Ensure NGRN is aligned. */
if constexpr (ArgumentAlignment > AbiType::RegisterSize) {
NGRN += (NGRN & 1);
}
/* TODO: We don't support splitting arguments between registers and stack, but AAPCS32 does. */
/* Is this a problem? Nintendo seems to not ever do this. */
auto id = Parameter::Identifier("FunctionParameter", i);
/* Allocate integral types specially per aapcs. */
constexpr ArgumentType Type = GetArgumentType<ArgType>;
const size_t registers_available = AbiType::RegisterCount - NGRN;
if constexpr (!PassedByPointer && IsIntegralOrUserPointer<ArgType> && ArgumentTypeSize > AbiType::RegisterSize) {
if (registers_available >= 2) {
m_input.Add(id, Type, ArgumentTypeSize, ArgumentPassSize, PassedByPointer, IsBoolean, Storage::Register, NGRN);
NGRN += 2;
} else {
/* Argument went on stack, so stop allocating arguments in registers. */
NGRN = AbiType::RegisterCount;
NSAA += (NSAA & 1);
m_input.Add(id, Type, ArgumentTypeSize, ArgumentPassSize, PassedByPointer, IsBoolean, Storage::Stack, NSAA);
NSAA += 2;
}
} else {
if (ArgumentPassSize <= AbiType::RegisterSize * registers_available) {
NGRN += m_input.Add(id, Type, ArgumentTypeSize, ArgumentPassSize, PassedByPointer, IsBoolean, Storage::Register, NGRN);
} else {
/* Argument went on stack, so stop allocating arguments in registers. */
NGRN = AbiType::RegisterCount;
/* TODO: Stack pointer alignment is only ensured for aapcs64. */
/* What should we do here? */
NSAA += m_input.Add(id, Type, ArgumentTypeSize, ArgumentPassSize, PassedByPointer, IsBoolean, Storage::Stack, NSAA);
}
}
}
public:
constexpr explicit ProcedureLayout(Abi a) : m_abi(a), m_input(a), m_output(a) { /* ... */ }
template<typename AbiType, typename ReturnType, typename... ArgumentTypes>
static constexpr ProcedureLayout Create() {
ProcedureLayout layout(Abi::Convert<AbiType>());
/* 1. The Next General-purpose Register Number (NGRN) is set to zero. */
[[maybe_unused]] size_t NGRN = 0;
/* 2. The next stacked argument address (NSAA) is set to the current stack-pointer value (SP). */
[[maybe_unused]] size_t NSAA = 0; /* Should be considered an offset from stack pointer. */
/* 3. Handle the return type. */
/* TODO: It's unclear how to handle the non-integral and too-large case. */
if constexpr (!std::is_same<ReturnType, void>::value) {
constexpr size_t ReturnTypeSize = AbiType::template Size<ReturnType>;
layout.m_output.Add(Parameter::Identifier("ReturnType"), ArgumentType::Invalid, ReturnTypeSize, ReturnTypeSize, false, false /* TODO */, Storage::Register, 0);
static_assert(IsIntegral<ReturnType> || ReturnTypeSize <= AbiType::RegisterSize);
}
/* Process all arguments, in order. */
size_t i = 0;
(layout.ProcessArgument<AbiType, ArgumentTypes>(i++, NGRN, NSAA), ...);
return layout;
}
constexpr ParameterLayout GetInputLayout() const {
return m_input;
}
constexpr ParameterLayout GetOutputLayout() const {
return m_output;
}
constexpr Parameter GetParameter(Parameter::Identifier id) const {
if (m_input.HasParameter(id)) {
return m_input.GetParameter(id);
} else {
return m_output.GetParameter(id);
}
}
};
class SvcInvocationLayout {
public:
Abi m_abi;
ParameterLayout m_input;
ParameterLayout m_output;
private:
template<typename F>
constexpr void ForEachInputArgument(ParameterLayout param_layout, F f) {
/* We want to iterate over the parameters in sorted order. */
std::array<size_t, ParameterLayout::MaxParameters> map = {};
const size_t num_parameters = param_layout.GetNumParameters();
for (size_t i = 0; i < num_parameters; i++) {
map[i] = i;
}
for (size_t i = 1; i < num_parameters; i++) {
for (size_t j = i; j > 0 && param_layout.GetParameter(map[j-1]).GetLocation(0) > param_layout.GetParameter(map[j]).GetLocation(0); j--) {
std::swap(map[j], map[j-1]);
}
}
for (size_t i = 0; i < param_layout.GetNumParameters(); i++) {
const auto Parameter = param_layout.GetParameter(map[i]);
if (Parameter.GetArgumentType() == ArgumentType::In && !Parameter.IsPassedByPointer()) {
f(Parameter);
}
}
for (size_t i = 0; i < param_layout.GetNumParameters(); i++) {
const auto Parameter = param_layout.GetParameter(map[i]);
if (Parameter.GetArgumentType() == ArgumentType::InUserPointer) {
f(Parameter);
}
}
for (size_t i = 0; i < param_layout.GetNumParameters(); i++) {
const auto Parameter = param_layout.GetParameter(map[i]);
if (Parameter.GetArgumentType() == ArgumentType::OutUserPointer) {
f(Parameter);
}
}
}
template<typename F>
constexpr void ForEachInputPointerArgument(ParameterLayout param_layout, F f) {
for (size_t i = 0; i < param_layout.GetNumParameters(); i++) {
const auto Parameter = param_layout.GetParameter(i);
if (Parameter.GetArgumentType() == ArgumentType::In && Parameter.IsPassedByPointer()) {
f(Parameter);
}
}
}
template<typename F>
constexpr void ForEachOutputArgument(ParameterLayout param_layout, F f) {
for (size_t i = 0; i < param_layout.GetNumParameters(); i++) {
const auto Parameter = param_layout.GetParameter(i);
if (Parameter.GetArgumentType() == ArgumentType::Out) {
f(Parameter);
}
}
}
template<size_t N>
static constexpr void AddRegisterParameter(ParameterLayout &dst_layout, RegisterAllocator<N> ®_allocator, Parameter param) {
for (size_t i = 0; i < param.GetNumLocations(); i++) {
const auto location = param.GetLocation(i);
if (location.GetStorage() == Storage::Register) {
reg_allocator.Allocate(location.GetIndex());
dst_layout.AddSingle(param.GetIdentifier(), param.GetArgumentType(), param.GetTypeSize(), param.GetPassedSize(), param.IsPassedByPointer(), param.IsBoolean(), Storage::Register, location.GetIndex());
}
}
}
template<size_t N>
static constexpr void AddStackParameter(ParameterLayout &dst_layout, RegisterAllocator<N> ®_allocator, Parameter param) {
for (size_t i = 0; i < param.GetNumLocations(); i++) {
const auto location = param.GetLocation(i);
if (location.GetStorage() == Storage::Stack) {
const size_t free_reg = reg_allocator.AllocateFirstFree();
dst_layout.AddSingle(param.GetIdentifier(), param.GetArgumentType(), param.GetTypeSize(), param.GetPassedSize(), param.IsPassedByPointer(), param.IsBoolean(), Storage::Register, free_reg);
}
}
}
template<typename AbiType, size_t N>
static constexpr void AddIndirectParameter(ParameterLayout &dst_layout, RegisterAllocator<N> ®_allocator, Parameter param) {
const size_t type_size = param.GetTypeSize();
for (size_t sz = 0; sz < type_size; sz += AbiType::RegisterSize) {
const size_t free_reg = reg_allocator.AllocateFirstFree();
dst_layout.AddSingle(param.GetIdentifier(), param.GetArgumentType(), type_size, type_size, false, param.IsBoolean(), Storage::Register, free_reg);
}
}
public:
constexpr explicit SvcInvocationLayout(Abi a) : m_abi(a), m_input(a), m_output(a) { /* ... */ }
template<typename AbiType>
static constexpr SvcInvocationLayout Create(ProcedureLayout procedure_layout) {
SvcInvocationLayout layout(Abi::Convert<AbiType>());
RegisterAllocator<AbiType::RegisterCount> input_register_allocator, output_register_allocator;
/* Input first wants to map in register -> register */
layout.ForEachInputArgument(procedure_layout.GetInputLayout(), [&](Parameter parameter) {
AddRegisterParameter(layout.m_input, input_register_allocator, parameter);
});
/* And then input wants to map in stack -> stack */
layout.ForEachInputArgument(procedure_layout.GetInputLayout(), [&](Parameter parameter) {
AddStackParameter(layout.m_input, input_register_allocator, parameter);
});
/* And then input wants to map in indirects -> register */
layout.ForEachInputPointerArgument(procedure_layout.GetInputLayout(), [&](Parameter parameter) {
AddIndirectParameter<AbiType>(layout.m_input, input_register_allocator, parameter);
});
/* Handle the return type. */
if (procedure_layout.GetOutputLayout().GetNumParameters() > 0) {
if (procedure_layout.GetOutputLayout().GetNumParameters() != 1) {
std::abort();
}
const auto return_param = procedure_layout.GetOutputLayout().GetParameter(0);
if (return_param.GetIdentifier() != Parameter::Identifier("ReturnType")) {
std::abort();
}
AddRegisterParameter(layout.m_output, output_register_allocator, return_param);
}
/* Handle other outputs. */
layout.ForEachOutputArgument(procedure_layout.GetInputLayout(), [&](Parameter parameter) {
AddIndirectParameter<AbiType>(layout.m_output, output_register_allocator, parameter);
});
return layout;
}
constexpr ParameterLayout GetInputLayout() const {
return m_input;
}
constexpr ParameterLayout GetOutputLayout() const {
return m_output;
}
};
}
| 16,564
|
C++
|
.h
| 300
| 38.956667
| 223
| 0.546845
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,108
|
svc_codegen_impl_kernel_svc_wrapper.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_kernel_svc_wrapper.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/codegen/impl/svc_codegen_impl_common.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_parameter.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_layout.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_meta_code.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_layout_conversion.hpp>
#include <vapours/svc/codegen/impl/svc_codegen_impl_code_generator.hpp>
namespace ams::svc::codegen::impl {
template<typename, typename, typename, typename, typename>
class KernelSvcWrapperHelperImpl;
template<typename _SvcAbiType, typename _UserAbiType, typename _KernelAbiType, typename ReturnType, typename... ArgumentTypes>
class KernelSvcWrapperHelperImpl<_SvcAbiType, _UserAbiType, _KernelAbiType, ReturnType, std::tuple<ArgumentTypes...>> {
private:
static constexpr bool TryToPerformCoalescingOptimizations = true;
template<MetaCode::OperationKind PairKind, MetaCode::OperationKind SingleKind, size_t InvalidRegisterId, size_t MaxStackIndex>
static constexpr void CoalesceOperations(MetaCodeGenerator &out_mcg, const std::array<size_t, MaxStackIndex> stack_modified, size_t stack_top) {
enum class State { WaitingForRegister, ParsingRegister, ParsedRegister, EmittingCode };
State cur_state = State::WaitingForRegister;
size_t num_regs = 0;
size_t registers[2] = { InvalidRegisterId, InvalidRegisterId };
size_t widths[2] = {};
size_t index = 0;
size_t store_base = 0;
while (index < stack_top) {
if (cur_state == State::WaitingForRegister) {
while (stack_modified[index] == InvalidRegisterId && index < stack_top) {
index++;
}
cur_state = State::ParsingRegister;
} else if (cur_state == State::ParsingRegister) {
const size_t start_index = index;
if (num_regs == 0) {
store_base = start_index;
}
const size_t reg = stack_modified[index];
registers[num_regs] = reg;
while (index < stack_top && index < start_index + KernelAbiType::RegisterSize && stack_modified[index] == reg) {
widths[num_regs]++;
index++;
}
num_regs++;
cur_state = State::ParsedRegister;
} else if (cur_state == State::ParsedRegister) {
if (num_regs == 2 || stack_modified[index] == InvalidRegisterId) {
cur_state = State::EmittingCode;
} else {
cur_state = State::ParsingRegister;
}
} else if (cur_state == State::EmittingCode) {
/* Emit an operation! */
MetaCode::Operation st_op = {};
if (num_regs == 2) {
if (registers[0] == registers[1]) {
std::abort();
}
if (widths[0] == widths[1]) {
st_op.kind = PairKind;
st_op.num_parameters = 4;
st_op.parameters[0] = registers[0];
st_op.parameters[1] = registers[1];
st_op.parameters[2] = store_base;
st_op.parameters[3] = widths[0];
} else {
std::abort();
}
} else if (num_regs == 1) {
st_op.kind = SingleKind;
st_op.num_parameters = 3;
st_op.parameters[0] = registers[0];
st_op.parameters[1] = store_base;
st_op.parameters[2] = widths[0];
} else {
std::abort();
}
out_mcg.AddOperationDirectly(st_op);
/* Go back to beginning of parse. */
for (size_t i = 0; i < num_regs; i++) {
registers[i] = InvalidRegisterId;
widths[i] = 0;
}
num_regs = 0;
cur_state = State::WaitingForRegister;
} else {
std::abort();
}
}
if (cur_state == State::ParsedRegister) {
/* Emit an operation! */
if (num_regs == 2 && widths[0] == widths[1]) {
MetaCode::Operation st_op = {};
st_op.kind = PairKind;
st_op.num_parameters = 4;
st_op.parameters[0] = registers[0];
st_op.parameters[1] = registers[1];
st_op.parameters[2] = store_base;
st_op.parameters[3] = widths[0];
out_mcg.AddOperationDirectly(st_op);
} else {
for (size_t i = 0; i < num_regs; i++) {
MetaCode::Operation st_op = {};
st_op.kind = SingleKind;
st_op.num_parameters = 3;
st_op.parameters[0] = registers[i];
st_op.parameters[1] = store_base;
st_op.parameters[2] = widths[i];
store_base += widths[i];
out_mcg.AddOperationDirectly(st_op);
}
}
}
}
/* Basic optimization of store coalescing. */
template<typename Conversion, typename... OperationTypes, size_t N>
static constexpr bool TryPrepareForKernelProcedureToSvcInvocationCoalescing(std::tuple<OperationTypes...>, MetaCodeGenerator &out_mcg, RegisterAllocator<N> &out_allocator) {
/* For debugging, allow ourselves to disable these optimizations. */
if constexpr (!TryToPerformCoalescingOptimizations) {
return false;
}
/* Generate expected code. */
MetaCodeGenerator mcg;
RegisterAllocator<N> allocator = out_allocator;
(Conversion::template GenerateCode<OperationTypes, CodeGenerationKind::PrepareForKernelProcedureToSvcInvocation>(mcg, allocator), ...);
MetaCode mc = mcg.GetMetaCode();
/* This is a naive optimization pass. */
/* We want to reorder code of the form: */
/* - Store to Stack sequence 0... */
/* - Load Stack Address 0 */
/* - Store to Stack 1... */
/* - Load Stack Address 1 */
/* Into the form: */
/* - Store to stack Sequence 0 + 1... */
/* - Load Stack Address 0 + 1... */
/* But only if they are semantically equivalent. */
/* We'll do a simple, naive pass to check if any registers are stored to stack that are modified. */
/* This shouldn't happen in any cases we care about, so we can probably get away with it. */
/* TODO: Eventually this should be e.g. operation.ModifiesRegister() / operation.CanReorderBefore() */
/* However, this will be more work, and if it's not necessary it can be put off until it is. */
constexpr size_t MaxStackIndex = 0x100;
constexpr size_t InvalidRegisterId = N;
bool register_modified[N] = {};
std::array<size_t, N> stack_address_loaded = {};
for (size_t i = 0; i < N; i++) { stack_address_loaded[i] = MaxStackIndex; }
std::array<size_t, MaxStackIndex> stack_modified = {};
for (size_t i = 0; i < MaxStackIndex; i++) { stack_modified[i] = InvalidRegisterId; }
size_t stack_top = 0;
for (size_t i = 0; i < mc.GetNumOperations(); i++) {
const auto mco = mc.GetOperation(i);
if (mco.kind == MetaCode::OperationKind::StoreToStack) {
if (register_modified[mco.parameters[0]]) {
return false;
}
const size_t offset = mco.parameters[1];
const size_t width = mco.parameters[2] == 0 ? KernelAbiType::RegisterSize : mco.parameters[2];
for (size_t j = 0; j < width; j++) {
const size_t index = offset + j;
if (index >= MaxStackIndex) {
std::abort();
}
if (stack_modified[index] != InvalidRegisterId) {
return false;
}
stack_modified[index] = mco.parameters[0];
stack_top = std::max(index + 1, stack_top);
}
} else if (mco.kind == MetaCode::OperationKind::LoadStackAddress) {
if (stack_address_loaded[mco.parameters[0]] != MaxStackIndex) {
return false;
}
if (register_modified[mco.parameters[0]]) {
return false;
}
if (mco.parameters[1] >= MaxStackIndex) {
std::abort();
}
stack_address_loaded[mco.parameters[0]] = mco.parameters[1];
register_modified[mco.parameters[0]] = true;
} else {
/* TODO: Better operation reasoning process. */
return false;
}
}
/* Looks like we can reorder! */
/* Okay, let's do this the naive way, too. */
constexpr auto PairKind = MetaCode::OperationKind::StorePairToStack;
constexpr auto SingleKind = MetaCode::OperationKind::StoreToStack;
CoalesceOperations<PairKind, SingleKind, InvalidRegisterId>(out_mcg, stack_modified, stack_top);
for (size_t i = 0; i < N; i++) {
if (stack_address_loaded[i] != MaxStackIndex) {
MetaCode::Operation load_op = {};
load_op.kind = MetaCode::OperationKind::LoadStackAddress;
load_op.num_parameters = 2;
load_op.parameters[0] = i;
load_op.parameters[1] = stack_address_loaded[i];
out_mcg.AddOperationDirectly(load_op);
}
}
/* Ensure the out allocator state is correct. */
out_allocator = allocator;
return true;
}
/* Basic optimization of load coalescing. */
template<typename Conversion, typename... OperationTypes, size_t N>
static constexpr bool TryKernelProcedureToSvcInvocationCoalescing(std::tuple<OperationTypes...>, MetaCodeGenerator &out_mcg, RegisterAllocator<N> &out_allocator) {
/* For debugging, allow ourselves to disable these optimizations. */
if constexpr (!TryToPerformCoalescingOptimizations) {
return false;
}
/* Generate expected code. */
MetaCodeGenerator mcg;
RegisterAllocator<N> allocator = out_allocator;
(Conversion::template GenerateCode<OperationTypes, CodeGenerationKind::KernelProcedureToSvcInvocation>(mcg, allocator), ...);
MetaCode mc = mcg.GetMetaCode();
/* This is a naive optimization pass. */
/* We want to coalesce all sequential stack loads, if possible. */
/* But only if they are semantically equivalent. */
/* We'll do a simple, naive pass to check if any registers are used after being loaded from stack that. */
/* This shouldn't happen in any cases we care about, so we can probably get away with it. */
/* TODO: Eventually this should be e.g. operation.ModifiesRegister() / operation.CanReorderBefore() */
/* However, this will be more work, and if it's not necessary it can be put off until it is. */
constexpr size_t MaxStackIndex = 0x100;
constexpr size_t InvalidRegisterId = N;
bool register_modified[N] = {};
std::array<size_t, N> stack_offset_loaded = {};
for (size_t i = 0; i < N; i++) { stack_offset_loaded[i] = MaxStackIndex; }
std::array<size_t, MaxStackIndex> stack_modified = {};
for (size_t i = 0; i < MaxStackIndex; i++) { stack_modified[i] = InvalidRegisterId; }
size_t stack_top = 0;
for (size_t i = 0; i < mc.GetNumOperations(); i++) {
const auto mco = mc.GetOperation(i);
if (mco.kind == MetaCode::OperationKind::Unpack) {
if (register_modified[mco.parameters[0]] || register_modified[mco.parameters[1]] || register_modified[mco.parameters[2]]) {
return false;
}
register_modified[mco.parameters[0]] = true;
register_modified[mco.parameters[1]] = true;
} else if (mco.kind == MetaCode::OperationKind::LoadFromStack) {
if (stack_offset_loaded[mco.parameters[0]] != MaxStackIndex) {
return false;
}
if (register_modified[mco.parameters[0]] != false) {
return false;
}
if (mco.parameters[1] >= MaxStackIndex) {
std::abort();
}
stack_offset_loaded[mco.parameters[0]] = mco.parameters[1];
register_modified[mco.parameters[0]] = true;
const size_t offset = mco.parameters[1];
const size_t width = mco.parameters[2] == 0 ? KernelAbiType::RegisterSize : mco.parameters[2];
for (size_t j = 0; j < width; j++) {
const size_t index = offset + j;
if (index >= MaxStackIndex) {
std::abort();
}
if (stack_modified[index] != InvalidRegisterId) {
return false;
}
stack_modified[index] = mco.parameters[0];
stack_top = std::max(index + 1, stack_top);
}
} else {
/* TODO: Better operation reasoning process. */
return false;
}
}
/* Any operations that don't load from stack, we can just re-add. */
for (size_t i = 0; i < mc.GetNumOperations(); i++) {
const auto mco = mc.GetOperation(i);
if (mco.kind != MetaCode::OperationKind::LoadFromStack) {
out_mcg.AddOperationDirectly(mco);
}
}
constexpr auto PairKind = MetaCode::OperationKind::LoadPairFromStack;
constexpr auto SingleKind = MetaCode::OperationKind::LoadFromStack;
CoalesceOperations<PairKind, SingleKind, InvalidRegisterId>(out_mcg, stack_modified, stack_top);
/* Ensure the out allocator state is correct. */
out_allocator = allocator;
return true;
}
template<typename Conversion, size_t ParameterIndex = 0>
static constexpr void SanitizeInputBooleans(MetaCodeGenerator &mcg) {
/* Get the input layout. */
constexpr auto InputLayout = Conversion::LayoutForSvc.GetInputLayout();
/* Check if we're done. */
if constexpr (ParameterIndex < InputLayout.GetNumParameters()) {
/* Get the relevant parameter. */
constexpr auto Param = InputLayout.GetParameter(ParameterIndex);
/* Handle the case where the parameter is a boolean. */
if constexpr (Param.IsBoolean()) {
/* Boolean parameters should have one location. */
static_assert(Param.GetNumLocations() == 1);
/* Get the location. */
constexpr auto Loc = Param.GetLocation(0);
/* TODO: Support boolean parameters passed-by-stack. */
static_assert(Loc.GetStorage() == Storage::Register);
/* Convert the input to boolean. */
mcg.template ConvertToBoolean<Loc.GetIndex()>();
}
/* Handle the next parameter. */
if constexpr (ParameterIndex + 1 < InputLayout.GetNumParameters()) {
SanitizeInputBooleans<Conversion, ParameterIndex + 1>(mcg);
}
}
}
template<typename... T>
struct TypeIndexFilter {
template<auto UseArray, typename X, typename Y>
struct Helper;
template<auto UseArray, size_t...Index>
struct Helper<UseArray, std::tuple<>, std::index_sequence<Index...>> {
using Type = std::tuple<>;
};
template<auto UseArray, typename HeadType, typename... TailType, size_t HeadIndex, size_t... TailIndex>
struct Helper<UseArray, std::tuple<HeadType, TailType...>, std::index_sequence<HeadIndex, TailIndex...>> {
using LastHeadType = std::tuple<HeadType>;
using LastNullType = std::tuple<>;
using LastType = typename std::conditional<!UseArray[HeadIndex], LastHeadType, LastNullType>::type;
using NextTailType = std::tuple<TailType...>;
using NextTailSequence = std::index_sequence<TailIndex...>;
using NextType = typename std::conditional<!UseArray[HeadIndex],
decltype(std::tuple_cat(std::declval<LastHeadType>(), std::declval<typename Helper<UseArray, NextTailType, NextTailSequence>::Type>())),
decltype(std::tuple_cat(std::declval<LastNullType>(), std::declval<typename Helper<UseArray, NextTailType, NextTailSequence>::Type>()))
>::type;
using Type = typename std::conditional<sizeof...(TailType) == 0, LastType, NextType>::type;
};
template<auto UseArray>
using FilteredTupleType = typename Helper<UseArray, std::tuple<T...>, decltype(std::make_index_sequence<sizeof...(T)>())>::Type;
};
template<auto Allocator, typename FirstOperation, typename...OtherOperations>
static constexpr auto GetModifiedOperations(std::tuple<FirstOperation, OtherOperations...>) {
constexpr size_t ModifyRegister = [] {
auto allocator = Allocator;
return allocator.AllocateFirstFree();
}();
using ModifiedFirstOperation = typename FirstOperation::template ModifiedType<ModifyRegister>;
using NewMoveOperation = typename LayoutConversionBase::template OperationMove<FirstOperation::RegisterSize, FirstOperation::PassedSize, FirstOperation::ProcedureIndex, ModifyRegister>;
return std::tuple<ModifiedFirstOperation, OtherOperations..., NewMoveOperation>{};
}
template<typename Conversion, auto Allocator, typename FirstOperation, typename... OtherOperations>
static constexpr auto GenerateBeforeOperations(MetaCodeGenerator &mcg, std::tuple<FirstOperation, OtherOperations...> ops) -> RegisterAllocator<Allocator.GetRegisterCount()> {
constexpr size_t NumOperations = 1 + sizeof...(OtherOperations);
using OperationsTuple = decltype(ops);
using FilterHelper = TypeIndexFilter<FirstOperation, OtherOperations...>;
constexpr auto ProcessOperation = []<typename Operation>(MetaCodeGenerator &pr_mcg, auto &allocator) {
if (Conversion::template CanGenerateCode<Operation, CodeGenerationKind::SvcInvocationToKernelProcedure>(allocator)) {
Conversion::template GenerateCode<Operation, CodeGenerationKind::SvcInvocationToKernelProcedure>(pr_mcg, allocator);
return true;
}
return false;
};
constexpr auto ProcessResults = []<auto AllocatorVal, auto ProcessOp, typename... Operations>(std::tuple<Operations...>) {
auto allocator = AllocatorVal;
MetaCodeGenerator pr_mcg;
auto use_array = std::array<bool, NumOperations>{ ProcessOp.template operator()<Operations>(pr_mcg, allocator)... };
return std::make_tuple(use_array, allocator, pr_mcg);
}.template operator()<Allocator, ProcessOperation>(OperationsTuple{});
constexpr auto CanGenerate = std::get<0>(ProcessResults);
constexpr auto AfterAllocator = std::get<1>(ProcessResults);
constexpr auto GeneratedCode = std::get<2>(ProcessResults).GetMetaCode();
for (size_t i = 0; i < GeneratedCode.GetNumOperations(); i++) {
mcg.AddOperationDirectly(GeneratedCode.GetOperation(i));
}
using FilteredOperations = typename FilterHelper::FilteredTupleType<CanGenerate>;
static_assert(std::tuple_size<FilteredOperations>::value <= NumOperations);
if constexpr (std::tuple_size<FilteredOperations>::value > 0) {
if constexpr (std::tuple_size<FilteredOperations>::value != NumOperations) {
return GenerateBeforeOperations<Conversion, AfterAllocator>(mcg, FilteredOperations{});
} else {
/* No progress was made, so we need to make a change. */
constexpr auto ModifiedOperations = GetModifiedOperations<AfterAllocator>(FilteredOperations{});
return GenerateBeforeOperations<Conversion, AfterAllocator>(mcg, ModifiedOperations);
}
} else {
return AfterAllocator;
}
}
static constexpr MetaCode GenerateOriginalBeforeMetaCode() {
MetaCodeGenerator mcg;
RegisterAllocator<KernelAbiType::RegisterCount> allocator;
static_assert(SvcAbiType::RegisterCount == KernelAbiType::RegisterCount);
/* Reserve registers used by the input layout. */
constexpr auto InitialAllocator = [] {
RegisterAllocator<KernelAbiType::RegisterCount> initial_allocator;
for (size_t i = 0; i < SvcAbiType::RegisterCount; i++) {
if (Conversion::LayoutForSvc.GetInputLayout().UsesRegister(i)) {
initial_allocator.Allocate(i);
}
}
return initial_allocator;
}();
/* Save every register that needs to be preserved to the stack. */
if constexpr (Conversion::NumPreserveRegisters > 0) {
[&mcg]<size_t... Is>(std::index_sequence<Is...>) {
mcg.template SaveRegisters<Is...>();
}(typename Conversion::PreserveRegisters{});
}
/* Allocate space on the stack for parameters that need it. */
if constexpr (UsedStackSpace > 0) {
mcg.template AllocateStackSpace<UsedStackSpace>();
}
/* Sanitize all input booleans. */
SanitizeInputBooleans<Conversion>(mcg);
/* Generate code for before operations. */
if constexpr (Conversion::NumBeforeOperations > 0) {
allocator = GenerateBeforeOperations<Conversion, InitialAllocator>(mcg, typename Conversion::BeforeOperations{});
} else {
allocator = InitialAllocator;
}
/* Generate code for after operations. */
if constexpr (Conversion::NumAfterOperations > 0) {
if (!TryPrepareForKernelProcedureToSvcInvocationCoalescing<Conversion>(typename Conversion::AfterOperations{}, mcg, allocator)) {
/* We're not eligible for the straightforward optimization. */
[&mcg, &allocator]<size_t... Is>(std::index_sequence<Is...>) {
(Conversion::template GenerateCode<typename std::tuple_element<Is, typename Conversion::AfterOperations>::type, CodeGenerationKind::PrepareForKernelProcedureToSvcInvocation>(mcg, allocator), ...);
}(std::make_index_sequence<Conversion::NumAfterOperations>());
}
}
return mcg.GetMetaCode();
}
public:
using SvcAbiType = _SvcAbiType;
using UserAbiType = _UserAbiType;
using KernelAbiType = _KernelAbiType;
using Conversion = LayoutConversion<SvcAbiType, UserAbiType, KernelAbiType, ReturnType, ArgumentTypes...>;
static constexpr size_t UsedStackSpace = Conversion::NonAbiUsedStackIndices * KernelAbiType::RegisterSize;
static constexpr MetaCode OriginalBeforeMetaCode = [] {
return GenerateOriginalBeforeMetaCode();
}();
static constexpr MetaCode OriginalAfterMetaCode = [] {
MetaCodeGenerator mcg;
RegisterAllocator<KernelAbiType::RegisterCount> allocator;
static_assert(SvcAbiType::RegisterCount == KernelAbiType::RegisterCount);
/* Generate code for after operations. */
if constexpr (Conversion::NumAfterOperations > 0) {
if (!TryKernelProcedureToSvcInvocationCoalescing<Conversion>(typename Conversion::AfterOperations{}, mcg, allocator)) {
[&mcg, &allocator]<size_t... Is>(std::index_sequence<Is...>) {
(Conversion::template GenerateCode<typename std::tuple_element<Is, typename Conversion::AfterOperations>::type, CodeGenerationKind::KernelProcedureToSvcInvocation>(mcg, allocator), ...);
}(std::make_index_sequence<Conversion::NumAfterOperations>());
}
}
/* Allocate space on the stack for parameters that need it. */
if constexpr (UsedStackSpace > 0) {
mcg.template FreeStackSpace<UsedStackSpace>();
}
if constexpr (Conversion::NumClearRegisters > 0) {
[&mcg]<size_t... Is>(std::index_sequence<Is...>) {
mcg.template ClearRegisters<Is...>();
}(typename Conversion::ClearRegisters{});
}
/* Restore registers we previously saved to the stack. */
if constexpr (Conversion::NumPreserveRegisters > 0) {
[&mcg]<size_t... Is>(std::index_sequence<Is...>) {
mcg.template RestoreRegisters<Is...>();
}(typename Conversion::PreserveRegisters{});
}
return mcg.GetMetaCode();
}();
/* TODO: Implement meta code optimization via separate layer. */
/* Right now some basic optimizations are just implemented by the above generators. */
static constexpr MetaCode OptimizedBeforeMetaCode = OriginalBeforeMetaCode;
static constexpr MetaCode OptimizedAfterMetaCode = OriginalAfterMetaCode;
};
template<typename _SvcAbiType, typename _UserAbiType, typename _KernelAbiType, auto Function>
class KernelSvcWrapperHelper {
private:
using Traits = FunctionTraits<Function>;
public:
using Impl = KernelSvcWrapperHelperImpl<_SvcAbiType, _UserAbiType, _KernelAbiType, typename Traits::ReturnType, typename Traits::ArgsType>;
using ReturnType = typename Traits::ReturnType;
static constexpr bool IsAarch64Kernel = std::is_same<_KernelAbiType, Aarch64Lp64Abi>::value;
static constexpr bool IsAarch32Kernel = std::is_same<_KernelAbiType, Aarch32Ilp32Abi>::value;
static_assert(IsAarch64Kernel || IsAarch32Kernel);
using CodeGenerator = typename std::conditional<IsAarch64Kernel, Aarch64CodeGenerator, Aarch32CodeGenerator>::type;
static constexpr auto BeforeMetaCode = Impl::OptimizedBeforeMetaCode;
static constexpr auto AfterMetaCode = Impl::OptimizedAfterMetaCode;
/* Set omit-frame-pointer to prevent GCC from emitting MOV X29, SP instructions. */
#pragma GCC push_options
#pragma GCC optimize ("-O2")
#pragma GCC optimize ("omit-frame-pointer")
static ALWAYS_INLINE ReturnType WrapSvcFunction() {
/* Generate appropriate assembly. */
GenerateCodeForMetaCode<CodeGenerator, BeforeMetaCode>();
ON_SCOPE_EXIT { GenerateCodeForMetaCode<CodeGenerator, AfterMetaCode>(); };
/* Cast the generated function to the generic funciton pointer type. */
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-function-type"
return reinterpret_cast<ReturnType (*)()>(Function)();
#pragma GCC diagnostic pop
}
#pragma GCC pop_options
};
}
| 31,831
|
C++
|
.h
| 507
| 43.047337
| 224
| 0.534227
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,109
|
svc_codegen_impl_common.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_common.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/svc/svc_types.hpp>
namespace ams::svc::codegen::impl {
template<typename T>
constexpr inline bool IsIntegral = std::is_integral<T>::value;
template<>
constexpr inline bool IsIntegral<::ams::svc::Address> = true;
template<>
constexpr inline bool IsIntegral<::ams::svc::Size> = true;
template<typename T>
constexpr inline bool IsKUserPointer = std::is_base_of<ams::kern::svc::impl::KUserPointerTag, T>::value;
template<typename T>
constexpr inline bool IsIntegralOrUserPointer = IsIntegral<T> || IsUserPointer<T> || IsKUserPointer<T>;
template<size_t... Is1, size_t... Is2>
constexpr std::index_sequence<Is1..., Is2...> IndexSequenceCat(std::index_sequence<Is1...>, std::index_sequence<Is2...>) {
return std::index_sequence<Is1..., Is2...>{};
}
template<size_t... Is>
constexpr inline std::array<size_t, sizeof...(Is)> ConvertToArray(std::index_sequence<Is...>) {
return std::array<size_t, sizeof...(Is)>{ Is... };
}
template<auto Function>
class FunctionTraits {
private:
template<typename R, typename... A>
static R GetReturnTypeImpl(R(*)(A...));
template<typename R, typename... A>
static std::tuple<A...> GetArgsImpl(R(*)(A...));
public:
using ReturnType = decltype(GetReturnTypeImpl(Function));
using ArgsType = decltype(GetArgsImpl(Function));
};
enum class CodeGenerationKind {
SvcInvocationToKernelProcedure,
PrepareForKernelProcedureToSvcInvocation,
KernelProcedureToSvcInvocation,
Invalid,
};
enum class ArgumentType {
In,
Out,
InUserPointer,
OutUserPointer,
Invalid,
};
template<typename T>
constexpr inline ArgumentType GetArgumentType = [] {
static_assert(!std::is_reference<T>::value, "SVC ABI: Reference types not allowed.");
static_assert(sizeof(T) <= sizeof(uint64_t), "SVC ABI: Type too large");
if constexpr (std::is_pointer<T>::value) {
static_assert(!std::is_const<typename std::remove_pointer<T>::type>::value, "SVC ABI: Output (T*) must not be const");
return ArgumentType::Out;
} else if constexpr (IsUserPointer<T> || IsKUserPointer<T>) {
if constexpr (T::IsInput) {
return ArgumentType::InUserPointer;
} else {
return ArgumentType::OutUserPointer;
}
} else {
return ArgumentType::In;
}
}();
template<size_t RS, size_t RC, size_t ARC, size_t PC>
struct AbiType {
static constexpr size_t RegisterSize = RS;
static constexpr size_t RegisterCount = RC;
static constexpr size_t ArgumentRegisterCount = ARC;
static constexpr size_t PointerSize = PC;
template<typename T>
static constexpr size_t GetSize() {
if constexpr (std::is_same<T, ::ams::svc::Address>::value || std::is_same<T, ::ams::svc::Size>::value || IsUserPointer<T> || IsKUserPointer<T>) {
return PointerSize;
} else if constexpr(std::is_pointer<T>::value) {
/* Out parameter. */
return GetSize<typename std::remove_pointer<T>::type>();
} else if constexpr (std::is_same<T, void>::value) {
return 0;
} else {
return sizeof(T);
}
}
template<typename T>
static constexpr inline size_t Size = GetSize<T>();
};
using Aarch64Lp64Abi = AbiType<8, 8, 8, 8>;
using Aarch64Ilp32Abi = AbiType<8, 8, 8, 4>;
using Aarch32Ilp32Abi = AbiType<4, 4, 4, 4>;
using Aarch64SvcInvokeAbi = AbiType<8, 8, 8, 8>;
using Aarch32SvcInvokeAbi = AbiType<4, 8, 4, 4>;
struct Abi {
size_t register_size;
size_t register_count;
size_t pointer_size;
template<typename AbiType>
static constexpr Abi Convert() { return { AbiType::RegisterSize, AbiType::RegisterCount, AbiType::PointerSize }; }
};
template<typename AbiType, typename ArgType>
constexpr inline bool IsPassedByPointer = [] {
if (GetArgumentType<ArgType> != ArgumentType::In) {
return true;
}
return (!IsIntegral<ArgType> && AbiType::template Size<ArgType> > AbiType::RegisterSize);
}();
template<size_t N>
class RegisterAllocator {
public:
std::array<bool, N> m_map;
public:
constexpr explicit RegisterAllocator() : m_map() { /* ... */ }
constexpr bool IsAllocated(size_t i) const { return m_map[i]; }
constexpr bool IsFree(size_t i) const { return !this->IsAllocated(i); }
constexpr void Allocate(size_t i) {
if (this->IsAllocated(i)) {
std::abort();
}
m_map[i] = true;
}
constexpr bool TryAllocate(size_t i) {
if (this->IsAllocated(i)) {
return false;
}
m_map[i] = true;
return true;
}
constexpr size_t AllocateFirstFree() {
for (size_t i = 0; i < N; i++) {
if (!this->IsAllocated(i)) {
m_map[i] = true;
return i;
}
}
std::abort();
}
constexpr void Free(size_t i) {
if (!this->IsAllocated(i)) {
std::abort();
}
m_map[i] = false;
}
constexpr size_t GetRegisterCount() const {
return N;
}
};
}
| 6,522
|
C++
|
.h
| 161
| 30.888199
| 157
| 0.583531
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,110
|
svc_message_buffer.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/svc/ipc/svc_message_buffer.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/svc/svc_types_common.hpp>
#include <vapours/svc/svc_select_thread_local_region.hpp>
namespace ams::svc::ipc {
#pragma GCC push_options
#pragma GCC optimize ("-O3")
ALWAYS_INLINE u32 *GetMessageBuffer() {
return GetThreadLocalRegion()->message_buffer;
}
constexpr inline size_t MessageBufferSize = sizeof(::ams::svc::ThreadLocalRegion::message_buffer);
class MessageBuffer {
public:
class MessageHeader {
private:
/* Define fields for the first header word. */
using Tag = util::BitPack32::Field<0, BITSIZEOF(u16), u16>;
using PointerCount = util::BitPack32::Field<Tag::Next, 4, s32>;
using SendCount = util::BitPack32::Field<PointerCount::Next, 4, s32>;
using ReceiveCount = util::BitPack32::Field<SendCount::Next, 4, s32>;
using ExchangeCount = util::BitPack32::Field<ReceiveCount::Next, 4, s32>;
static_assert(ExchangeCount::Next == BITSIZEOF(u32));
/* Define fields for the second header word. */
using RawCount = util::BitPack32::Field<0, 10, s32>;
using ReceiveListCount = util::BitPack32::Field<RawCount::Next, 4, s32>;
using Reserved0 = util::BitPack32::Field<ReceiveListCount::Next, 6, u32>;
using ReceiveListOffset = util::BitPack32::Field<Reserved0::Next, 11, s32>;
using HasSpecialHeader = util::BitPack32::Field<ReceiveListOffset::Next, 1, bool>;
static constexpr inline u64 NullTag = 0;
static_assert(HasSpecialHeader::Next == BITSIZEOF(u32));
public:
enum ReceiveListCountType {
ReceiveListCountType_None = 0,
ReceiveListCountType_ToMessageBuffer = 1,
ReceiveListCountType_ToSingleBuffer = 2,
ReceiveListCountType_CountOffset = 2,
ReceiveListCountType_CountMax = 13,
};
private:
util::BitPack32 m_header[2];
public:
constexpr ALWAYS_INLINE MessageHeader() : m_header{util::BitPack32{0}, util::BitPack32{0}} {
m_header[0].Set<Tag>(NullTag);
}
constexpr ALWAYS_INLINE MessageHeader(u16 tag, bool special, s32 ptr, s32 send, s32 recv, s32 exch, s32 raw, s32 recv_list) : m_header{util::BitPack32{0}, util::BitPack32{0}} {
m_header[0].Set<Tag>(tag);
m_header[0].Set<PointerCount>(ptr);
m_header[0].Set<SendCount>(send);
m_header[0].Set<ReceiveCount>(recv);
m_header[0].Set<ExchangeCount>(exch);
m_header[1].Set<RawCount>(raw);
m_header[1].Set<ReceiveListCount>(recv_list);
m_header[1].Set<HasSpecialHeader>(special);
}
ALWAYS_INLINE explicit MessageHeader(const MessageBuffer &buf) : m_header{util::BitPack32{0}, util::BitPack32{0}} {
buf.Get(0, m_header, util::size(m_header));
}
ALWAYS_INLINE explicit MessageHeader(const u32 *msg) : m_header{util::BitPack32{msg[0]}, util::BitPack32{msg[1]}} { /* ... */ }
constexpr ALWAYS_INLINE u16 GetTag() const {
return m_header[0].Get<Tag>();
}
constexpr ALWAYS_INLINE s32 GetPointerCount() const {
return m_header[0].Get<PointerCount>();
}
constexpr ALWAYS_INLINE s32 GetSendCount() const {
return m_header[0].Get<SendCount>();
}
constexpr ALWAYS_INLINE s32 GetReceiveCount() const {
return m_header[0].Get<ReceiveCount>();
}
constexpr ALWAYS_INLINE s32 GetExchangeCount() const {
return m_header[0].Get<ExchangeCount>();
}
constexpr ALWAYS_INLINE s32 GetMapAliasCount() const {
return this->GetSendCount() + this->GetReceiveCount() + this->GetExchangeCount();
}
constexpr ALWAYS_INLINE s32 GetRawCount() const {
return m_header[1].Get<RawCount>();
}
constexpr ALWAYS_INLINE s32 GetReceiveListCount() const {
return m_header[1].Get<ReceiveListCount>();
}
constexpr ALWAYS_INLINE s32 GetReceiveListOffset() const {
return m_header[1].Get<ReceiveListOffset>();
}
constexpr ALWAYS_INLINE bool GetHasSpecialHeader() const {
return m_header[1].Get<HasSpecialHeader>();
}
constexpr ALWAYS_INLINE void SetReceiveListCount(s32 recv_list) {
m_header[1].Set<ReceiveListCount>(recv_list);
}
constexpr ALWAYS_INLINE const util::BitPack32 *GetData() const {
return m_header;
}
static constexpr ALWAYS_INLINE size_t GetDataSize() {
return sizeof(m_header);
}
};
class SpecialHeader {
private:
/* Define fields for the header word. */
using HasProcessId = util::BitPack32::Field<0, 1, bool>;
using CopyHandleCount = util::BitPack32::Field<HasProcessId::Next, 4, s32>;
using MoveHandleCount = util::BitPack32::Field<CopyHandleCount::Next, 4, s32>;
private:
util::BitPack32 m_header;
bool m_has_header;
public:
constexpr ALWAYS_INLINE explicit SpecialHeader(bool pid, s32 copy, s32 move) : m_header{0}, m_has_header(true) {
m_header.Set<HasProcessId>(pid);
m_header.Set<CopyHandleCount>(copy);
m_header.Set<MoveHandleCount>(move);
}
consteval explicit SpecialHeader(bool pid, s32 copy, s32 move, bool _has_header) : m_header{0}, m_has_header(_has_header) {
m_header.Set<HasProcessId>(pid);
m_header.Set<CopyHandleCount>(copy);
m_header.Set<MoveHandleCount>(move);
AMS_ASSUME(m_has_header == (this->GetHasProcessId() || this->GetCopyHandleCount() > 0 || this->GetMoveHandleCount() > 0));
}
ALWAYS_INLINE explicit SpecialHeader(const MessageBuffer &buf, const MessageHeader &hdr) : m_header{0}, m_has_header(hdr.GetHasSpecialHeader()) {
if (m_has_header) {
buf.Get(MessageHeader::GetDataSize() / sizeof(util::BitPack32), std::addressof(m_header), sizeof(m_header) / sizeof(util::BitPack32));
}
}
constexpr ALWAYS_INLINE bool GetHasProcessId() const {
return m_header.Get<HasProcessId>();
}
constexpr ALWAYS_INLINE s32 GetCopyHandleCount() const {
return m_header.Get<CopyHandleCount>();
}
constexpr ALWAYS_INLINE s32 GetMoveHandleCount() const {
return m_header.Get<MoveHandleCount>();
}
constexpr ALWAYS_INLINE const util::BitPack32 *GetHeader() const {
return std::addressof(m_header);
}
constexpr ALWAYS_INLINE size_t GetHeaderSize() const {
if (m_has_header) {
return sizeof(m_header);
} else {
return 0;
}
}
constexpr ALWAYS_INLINE size_t GetDataSize() const {
if (m_has_header) {
return (this->GetHasProcessId() ? sizeof(u64) : 0) +
(this->GetCopyHandleCount() * sizeof(Handle)) +
(this->GetMoveHandleCount() * sizeof(Handle));
} else {
return 0;
}
}
};
class MapAliasDescriptor {
public:
enum Attribute {
Attribute_Ipc = 0,
Attribute_NonSecureIpc = 1,
Attribute_NonDeviceIpc = 3,
};
private:
/* Define fields for the first two words. */
using SizeLow = util::BitPack32::Field<0, BITSIZEOF(u32), u32>;
using AddressLow = util::BitPack32::Field<0, BITSIZEOF(u32), u32>;
/* Define fields for the packed descriptor word. */
using Attributes = util::BitPack32::Field<0, 2, Attribute>;
using AddressHigh = util::BitPack32::Field<Attributes::Next, 3, u32>;
using Reserved = util::BitPack32::Field<AddressHigh::Next, 19, u32>;
using SizeHigh = util::BitPack32::Field<Reserved::Next, 4, u32>;
using AddressMid = util::BitPack32::Field<SizeHigh::Next, 4, u32>;
constexpr ALWAYS_INLINE u32 GetAddressMid(u64 address) {
return static_cast<u32>(address >> AddressLow::Count) & ((1u << AddressMid::Count) - 1);
}
constexpr ALWAYS_INLINE u32 GetAddressHigh(u64 address) {
return static_cast<u32>(address >> (AddressLow::Count + AddressMid::Count));
}
private:
util::BitPack32 m_data[3];
public:
constexpr ALWAYS_INLINE MapAliasDescriptor() : m_data{util::BitPack32{0}, util::BitPack32{0}, util::BitPack32{0}} { /* ... */ }
ALWAYS_INLINE MapAliasDescriptor(const void *buffer, size_t _size, Attribute attr = Attribute_Ipc) : m_data{util::BitPack32{0}, util::BitPack32{0}, util::BitPack32{0}} {
const u64 address = reinterpret_cast<u64>(buffer);
const u64 size = static_cast<u64>(_size);
m_data[0] = { static_cast<u32>(size) };
m_data[1] = { static_cast<u32>(address) };
m_data[2].Set<Attributes>(attr);
m_data[2].Set<AddressMid>(GetAddressMid(address));
m_data[2].Set<SizeHigh>(static_cast<u32>(size >> SizeLow::Count));
m_data[2].Set<AddressHigh>(GetAddressHigh(address));
}
ALWAYS_INLINE MapAliasDescriptor(const MessageBuffer &buf, s32 index) : m_data{util::BitPack32{0}, util::BitPack32{0}, util::BitPack32{0}} {
buf.Get(index, m_data, util::size(m_data));
}
constexpr ALWAYS_INLINE uintptr_t GetAddress() const {
const u64 address = (static_cast<u64>((m_data[2].Get<AddressHigh>() << AddressMid::Count) | m_data[2].Get<AddressMid>()) << AddressLow::Count) | m_data[1].Get<AddressLow>();
return address;
}
constexpr ALWAYS_INLINE uintptr_t GetSize() const {
const u64 size = (static_cast<u64>(m_data[2].Get<SizeHigh>()) << SizeLow::Count) | m_data[0].Get<SizeLow>();
return size;
}
constexpr ALWAYS_INLINE Attribute GetAttribute() const {
return m_data[2].Get<Attributes>();
}
constexpr ALWAYS_INLINE const util::BitPack32 *GetData() const {
return m_data;
}
static constexpr ALWAYS_INLINE size_t GetDataSize() {
return sizeof(m_data);
}
};
class PointerDescriptor {
private:
/* Define fields for the packed descriptor word. */
using Index = util::BitPack32::Field<0, 4, s32>;
using Reserved0 = util::BitPack32::Field<Index::Next, 2, u32>;
using AddressHigh = util::BitPack32::Field<Reserved0::Next, 3, u32>;
using Reserved1 = util::BitPack32::Field<AddressHigh::Next, 3, u32>;
using AddressMid = util::BitPack32::Field<Reserved1::Next, 4, u32>;
using Size = util::BitPack32::Field<AddressMid::Next, 16, u32>;
/* Define fields for the second word. */
using AddressLow = util::BitPack32::Field<0, BITSIZEOF(u32), u32>;
constexpr ALWAYS_INLINE u32 GetAddressMid(u64 address) {
return static_cast<u32>(address >> AddressLow::Count) & ((1u << AddressMid::Count) - 1);
}
constexpr ALWAYS_INLINE u32 GetAddressHigh(u64 address) {
return static_cast<u32>(address >> (AddressLow::Count + AddressMid::Count));
}
private:
util::BitPack32 m_data[2];
public:
constexpr ALWAYS_INLINE PointerDescriptor() : m_data{util::BitPack32{0}, util::BitPack32{0}} { /* ... */ }
ALWAYS_INLINE PointerDescriptor(const void *buffer, size_t size, s32 index) : m_data{util::BitPack32{0}, util::BitPack32{0}} {
const u64 address = reinterpret_cast<u64>(buffer);
m_data[0].Set<Index>(index);
m_data[0].Set<AddressHigh>(GetAddressHigh(address));
m_data[0].Set<AddressMid>(GetAddressMid(address));
m_data[0].Set<Size>(size);
m_data[1] = { static_cast<u32>(address) };
}
ALWAYS_INLINE PointerDescriptor(const MessageBuffer &buf, s32 index) : m_data{util::BitPack32{0}, util::BitPack32{0}} {
buf.Get(index, m_data, util::size(m_data));
}
constexpr ALWAYS_INLINE s32 GetIndex() const {
return m_data[0].Get<Index>();
}
constexpr ALWAYS_INLINE uintptr_t GetAddress() const {
const u64 address = (static_cast<u64>((m_data[0].Get<AddressHigh>() << AddressMid::Count) | m_data[0].Get<AddressMid>()) << AddressLow::Count) | m_data[1].Get<AddressLow>();
return address;
}
constexpr ALWAYS_INLINE size_t GetSize() const {
return m_data[0].Get<Size>();
}
constexpr ALWAYS_INLINE const util::BitPack32 *GetData() const {
return m_data;
}
static constexpr ALWAYS_INLINE size_t GetDataSize() {
return sizeof(m_data);
}
};
class ReceiveListEntry {
private:
/* Define fields for the first word. */
using AddressLow = util::BitPack32::Field<0, BITSIZEOF(u32), u32>;
/* Define fields for the packed descriptor word. */
using AddressHigh = util::BitPack32::Field<0, 7, u32>;
using Reserved = util::BitPack32::Field<AddressHigh::Next, 9, u32>;
using Size = util::BitPack32::Field<Reserved::Next, 16, u32>;
constexpr ALWAYS_INLINE u32 GetAddressHigh(u64 address) {
return static_cast<u32>(address >> (AddressLow::Count));
}
private:
util::BitPack32 m_data[2];
public:
constexpr ALWAYS_INLINE ReceiveListEntry() : m_data{util::BitPack32{0}, util::BitPack32{0}} { /* ... */ }
ALWAYS_INLINE ReceiveListEntry(const void *buffer, size_t size) : m_data{util::BitPack32{0}, util::BitPack32{0}} {
const u64 address = reinterpret_cast<u64>(buffer);
m_data[0] = { static_cast<u32>(address) };
m_data[1].Set<AddressHigh>(GetAddressHigh(address));
m_data[1].Set<Size>(size);
}
ALWAYS_INLINE ReceiveListEntry(u32 a, u32 b) : m_data{util::BitPack32{a}, util::BitPack32{b}} { /* ... */ }
constexpr ALWAYS_INLINE uintptr_t GetAddress() const {
const u64 address = (static_cast<u64>(m_data[1].Get<AddressHigh>()) << AddressLow::Count) | m_data[0].Get<AddressLow>();
return address;
}
constexpr ALWAYS_INLINE size_t GetSize() const {
return m_data[1].Get<Size>();
}
constexpr ALWAYS_INLINE const util::BitPack32 *GetData() const {
return m_data;
}
static constexpr ALWAYS_INLINE size_t GetDataSize() {
return sizeof(m_data);
}
};
private:
u32 *m_buffer;
size_t m_size;
public:
constexpr ALWAYS_INLINE MessageBuffer(u32 *b, size_t sz) : m_buffer(b), m_size(sz) { /* ... */ }
constexpr explicit ALWAYS_INLINE MessageBuffer(u32 *b) : m_buffer(b), m_size(sizeof(::ams::svc::ThreadLocalRegion::message_buffer)) { /* ... */ }
constexpr ALWAYS_INLINE void *GetBufferForDebug() const {
return m_buffer;
}
constexpr ALWAYS_INLINE size_t GetBufferSize() const {
return m_size;
}
ALWAYS_INLINE void Get(s32 index, util::BitPack32 *dst, size_t count) const {
/* Ensure that this doesn't get re-ordered. */
__asm__ __volatile__("" ::: "memory");
/* Get the words. */
static_assert(sizeof(*dst) == sizeof(*m_buffer));
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wclass-memaccess"
__builtin_memcpy(dst, m_buffer + index, count * sizeof(*dst));
#pragma GCC diagnostic pop
}
ALWAYS_INLINE s32 Set(s32 index, const util::BitPack32 *src, size_t count) const {
/* Ensure that this doesn't get re-ordered. */
__asm__ __volatile__("" ::: "memory");
/* Set the words. */
__builtin_memcpy(m_buffer + index, src, count * sizeof(*src));
/* Ensure that this doesn't get re-ordered. */
__asm__ __volatile__("" ::: "memory");
return index + count;
}
template<typename T>
ALWAYS_INLINE const T &GetRaw(s32 index) const {
return *reinterpret_cast<const T *>(m_buffer + index);
}
template<typename T>
ALWAYS_INLINE s32 SetRaw(s32 index, const T &val) const {
*reinterpret_cast<const T *>(m_buffer + index) = val;
return index + (util::AlignUp(sizeof(val), sizeof(*m_buffer)) / sizeof(*m_buffer));
}
ALWAYS_INLINE void GetRawArray(s32 index, void *dst, size_t len) const {
__builtin_memcpy(dst, m_buffer + index, len);
}
ALWAYS_INLINE void SetRawArray(s32 index, const void *src, size_t len) const {
__builtin_memcpy(m_buffer + index, src, len);
}
ALWAYS_INLINE void SetNull() const {
this->Set(MessageHeader());
}
ALWAYS_INLINE s32 Set(const MessageHeader &hdr) const {
__builtin_memcpy(m_buffer, hdr.GetData(), hdr.GetDataSize());
return hdr.GetDataSize() / sizeof(*m_buffer);
}
ALWAYS_INLINE s32 Set(const SpecialHeader &spc) const {
const s32 index = MessageHeader::GetDataSize() / sizeof(*m_buffer);
__builtin_memcpy(m_buffer + index, spc.GetHeader(), spc.GetHeaderSize());
return index + (spc.GetHeaderSize() / sizeof(*m_buffer));
}
ALWAYS_INLINE s32 SetHandle(s32 index, const ::ams::svc::Handle &hnd) const {
static_assert(util::IsAligned(sizeof(hnd), sizeof(*m_buffer)));
__builtin_memcpy(m_buffer + index, std::addressof(hnd), sizeof(hnd));
return index + (sizeof(hnd) / sizeof(*m_buffer));
}
ALWAYS_INLINE s32 SetProcessId(s32 index, const u64 pid) const {
static_assert(util::IsAligned(sizeof(pid), sizeof(*m_buffer)));
__builtin_memcpy(m_buffer + index, std::addressof(pid), sizeof(pid));
return index + (sizeof(pid) / sizeof(*m_buffer));
}
ALWAYS_INLINE s32 Set(s32 index, const MapAliasDescriptor &desc) const {
__builtin_memcpy(m_buffer + index, desc.GetData(), desc.GetDataSize());
return index + (desc.GetDataSize() / sizeof(*m_buffer));
}
ALWAYS_INLINE s32 Set(s32 index, const PointerDescriptor &desc) const {
__builtin_memcpy(m_buffer + index, desc.GetData(), desc.GetDataSize());
return index + (desc.GetDataSize() / sizeof(*m_buffer));
}
ALWAYS_INLINE s32 Set(s32 index, const ReceiveListEntry &desc) const {
__builtin_memcpy(m_buffer + index, desc.GetData(), desc.GetDataSize());
return index + (desc.GetDataSize() / sizeof(*m_buffer));
}
ALWAYS_INLINE s32 Set(s32 index, const u32 val) const {
static_assert(util::IsAligned(sizeof(val), sizeof(*m_buffer)));
__builtin_memcpy(m_buffer + index, std::addressof(val), sizeof(val));
return index + (sizeof(val) / sizeof(*m_buffer));
}
ALWAYS_INLINE Result GetAsyncResult() const {
MessageHeader hdr(m_buffer);
MessageHeader null{};
R_SUCCEED_IF(AMS_UNLIKELY((__builtin_memcmp(hdr.GetData(), null.GetData(), MessageHeader::GetDataSize()) != 0)));
return m_buffer[MessageHeader::GetDataSize() / sizeof(*m_buffer)];
}
ALWAYS_INLINE void SetAsyncResult(Result res) const {
const s32 index = this->Set(MessageHeader());
const auto value = res.GetValue();
static_assert(util::IsAligned(sizeof(value), sizeof(*m_buffer)));
__builtin_memcpy(m_buffer + index, std::addressof(value), sizeof(value));
}
ALWAYS_INLINE u32 Get32(s32 index) const {
return m_buffer[index];
}
ALWAYS_INLINE u64 Get64(s32 index) const {
u64 value;
__builtin_memcpy(std::addressof(value), m_buffer + index, sizeof(value));
return value;
}
ALWAYS_INLINE u64 GetProcessId(s32 index) const {
return this->Get64(index);
}
ALWAYS_INLINE ams::svc::Handle GetHandle(s32 index) const {
static_assert(sizeof(ams::svc::Handle) == sizeof(*m_buffer));
return ::ams::svc::Handle(m_buffer[index]);
}
static constexpr ALWAYS_INLINE s32 GetSpecialDataIndex(const MessageHeader &hdr, const SpecialHeader &spc) {
AMS_UNUSED(hdr);
return (MessageHeader::GetDataSize() / sizeof(util::BitPack32)) + (spc.GetHeaderSize() / sizeof(util::BitPack32));
}
static constexpr ALWAYS_INLINE s32 GetPointerDescriptorIndex(const MessageHeader &hdr, const SpecialHeader &spc) {
return GetSpecialDataIndex(hdr, spc) + (spc.GetDataSize() / sizeof(util::BitPack32));
}
static constexpr ALWAYS_INLINE s32 GetMapAliasDescriptorIndex(const MessageHeader &hdr, const SpecialHeader &spc) {
return GetPointerDescriptorIndex(hdr, spc) + (hdr.GetPointerCount() * PointerDescriptor::GetDataSize() / sizeof(util::BitPack32));
}
static constexpr ALWAYS_INLINE s32 GetRawDataIndex(const MessageHeader &hdr, const SpecialHeader &spc) {
return GetMapAliasDescriptorIndex(hdr, spc) + (hdr.GetMapAliasCount() * MapAliasDescriptor::GetDataSize() / sizeof(util::BitPack32));
}
static constexpr ALWAYS_INLINE s32 GetReceiveListIndex(const MessageHeader &hdr, const SpecialHeader &spc) {
if (const s32 recv_list_index = hdr.GetReceiveListOffset()) {
return recv_list_index;
} else {
return GetRawDataIndex(hdr, spc) + hdr.GetRawCount();
}
}
static constexpr ALWAYS_INLINE size_t GetMessageBufferSize(const MessageHeader &hdr, const SpecialHeader &spc) {
/* Get the size of the plain message. */
size_t msg_size = GetReceiveListIndex(hdr, spc) * sizeof(util::BitPack32);
/* Add the size of the receive list. */
const auto count = hdr.GetReceiveListCount();
switch (count) {
case MessageHeader::ReceiveListCountType_None:
break;
case MessageHeader::ReceiveListCountType_ToMessageBuffer:
break;
case MessageHeader::ReceiveListCountType_ToSingleBuffer:
msg_size += ReceiveListEntry::GetDataSize();
break;
default:
msg_size += (count - MessageHeader::ReceiveListCountType_CountOffset) * ReceiveListEntry::GetDataSize();
break;
}
return msg_size;
}
};
#pragma GCC pop_options
}
| 27,873
|
C++
|
.h
| 464
| 41.198276
| 197
| 0.516886
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,111
|
tegra_ictlr.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_ictlr.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define PRI_ICTLR(n) (0x60004000 + n)
#define SEC_ICTLR(n) (0x60004100 + n)
#define TRI_ICTLR(n) (0x60004200 + n)
#define QUAD_ICTLR(n) (0x60004300 + n)
#define PENTA_ICTLR(n) (0x60004400 + n)
#define HEXA_ICTLR(n) (0x60004500 + n)
#define ICTLR_COP_IER_CLR (0x038)
| 1,105
|
C++
|
.h
| 29
| 36.517241
| 76
| 0.745573
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,112
|
tegra_mselect.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_mselect.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define MSELECT(x) (0x50060000 + x)
#define MSELECT_CONFIG (0x000)
#define MSELECT_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (MSELECT, NAME)
#define MSELECT_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (MSELECT, NAME, VALUE)
#define MSELECT_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (MSELECT, NAME, ENUM)
#define MSELECT_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(MSELECT, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_MSELECT_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (MSELECT, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_MSELECT_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (MSELECT, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_MSELECT_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (MSELECT, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_MSELECT_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(MSELECT, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_MSELECT_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (MSELECT, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_MSELECT_REG_BIT_ENUM(CONFIG_ERR_RESP_EN_SLAVE1, 24, DISABLE, ENABLE);
DEFINE_MSELECT_REG_BIT_ENUM(CONFIG_ERR_RESP_EN_SLAVE2, 25, DISABLE, ENABLE);
DEFINE_MSELECT_REG_BIT_ENUM(CONFIG_WRAP_TO_INCR_SLAVE0, 27, DISABLE, ENABLE);
DEFINE_MSELECT_REG_BIT_ENUM(CONFIG_WRAP_TO_INCR_SLAVE1, 28, DISABLE, ENABLE);
DEFINE_MSELECT_REG_BIT_ENUM(CONFIG_WRAP_TO_INCR_SLAVE2, 29, DISABLE, ENABLE);
DEFINE_MSELECT_REG_BIT_ENUM(CONFIG_WRAP_TO_INCR_SLAVE3, 30, DISABLE, ENABLE);
| 3,204
|
C++
|
.h
| 39
| 80.666667
| 337
| 0.626582
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,113
|
tegra_mc.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_mc.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define MC_INTSTATUS (0x000)
#define MC_INTMASK (0x004)
#define MC_ERR_STATUS (0x008)
#define MC_ERR_ADR (0x00C)
#define MC_SMMU_CONFIG (0x010)
#define MC_SMMU_PTB_ASID (0x01C)
#define MC_SMMU_PTB_DATA (0x020)
#define MC_SMMU_TLB_FLUSH (0x030)
#define MC_SMMU_PTC_FLUSH_0 (0x034)
#define MC_EMEM_CFG (0x050)
#define MC_EMEM_ADR_CFG (0x054)
#define MC_EMEM_ADR_CFG_DEV0 (0x058)
#define MC_EMEM_ADR_CFG_DEV1 (0x05C)
#define MC_EMEM_ADR_CFG_CHANNEL_MASK (0x060)
#define MC_EMEM_ADR_CFG_BANK_MASK_0 (0x064)
#define MC_EMEM_ADR_CFG_BANK_MASK_1 (0x068)
#define MC_EMEM_ADR_CFG_BANK_MASK_2 (0x06C)
#define MC_EMEM_ARB_CFG (0x090)
#define MC_EMEM_ARB_OUTSTANDING_REQ (0x094)
#define MC_EMEM_ARB_TIMING_RCD (0x098)
#define MC_EMEM_ARB_TIMING_RP (0x09C)
#define MC_EMEM_ARB_TIMING_RC (0x0A0)
#define MC_EMEM_ARB_TIMING_RAS (0x0A4)
#define MC_EMEM_ARB_TIMING_FAW (0x0A8)
#define MC_EMEM_ARB_TIMING_RRD (0x0AC)
#define MC_EMEM_ARB_TIMING_RAP2PRE (0x0B0)
#define MC_EMEM_ARB_TIMING_WAP2PRE (0x0B4)
#define MC_EMEM_ARB_TIMING_R2R (0x0B8)
#define MC_EMEM_ARB_TIMING_W2W (0x0BC)
#define MC_EMEM_ARB_TIMING_R2W (0x0C0)
#define MC_EMEM_ARB_TIMING_W2R (0x0C4)
#define MC_EMEM_ARB_MISC2 (0x0C8)
#define MC_EMEM_ARB_DA_TURNS (0x0D0)
#define MC_EMEM_ARB_DA_COVERS (0x0D4)
#define MC_EMEM_ARB_MISC0 (0x0D8)
#define MC_EMEM_ARB_MISC1 (0x0DC)
#define MC_EMEM_ARB_RING1_THROTTLE (0x0E0)
#define MC_EMEM_ARB_OVERRIDE (0x0E8)
#define MC_EMEM_ARB_RSV (0x0EC)
#define MC_CLKEN_OVERRIDE (0x0F4)
#define MC_TIMING_CONTROL_DBG (0x0F8)
#define MC_TIMING_CONTROL (0x0FC)
#define MC_CLIENT_HOTRESET_CTRL (0x200)
#define MC_CLIENT_HOTRESET_STATUS (0x204)
#define MC_SMMU_AFI_ASID (0x238)
#define MC_SMMU_DC_ASID (0x240)
#define MC_SMMU_DCB_ASID (0x244)
#define MC_SMMU_HC_ASID (0x250)
#define MC_SMMU_HDA_ASID (0x254)
#define MC_SMMU_ISP2_ASID (0x258)
#define MC_SMMU_MSENC_NVENC_ASID (0x264)
#define MC_SMMU_NV_ASID (0x268)
#define MC_SMMU_NV2_ASID (0x26C)
#define MC_SMMU_PPCS_ASID (0x270)
#define MC_SMMU_SATA_ASID (0x274)
#define MC_SMMU_VI_ASID (0x280)
#define MC_SMMU_VIC_ASID (0x284)
#define MC_SMMU_XUSB_HOST_ASID (0x288)
#define MC_SMMU_XUSB_DEV_ASID (0x28C)
#define MC_SMMU_TSEC_ASID (0x294)
#define MC_LATENCY_ALLOWANCE_AVPC_0 (0x2E4)
#define MC_LATENCY_ALLOWANCE_DC_0 (0x2E8)
#define MC_LATENCY_ALLOWANCE_DC_1 (0x2EC)
#define MC_LATENCY_ALLOWANCE_DCB_0 (0x2F4)
#define MC_LATENCY_ALLOWANCE_DCB_1 (0x2F8)
#define MC_LATENCY_ALLOWANCE_HC_0 (0x310)
#define MC_LATENCY_ALLOWANCE_HC_1 (0x314)
#define MC_LATENCY_ALLOWANCE_MPCORE_0 (0x320)
#define MC_LATENCY_ALLOWANCE_NVENC_0 (0x328)
#define MC_LATENCY_ALLOWANCE_PPCS_0 (0x344)
#define MC_LATENCY_ALLOWANCE_PPCS_1 (0x348)
#define MC_LATENCY_ALLOWANCE_ISP2_0 (0x370)
#define MC_LATENCY_ALLOWANCE_ISP2_1 (0x374)
#define MC_LATENCY_ALLOWANCE_XUSB_0 (0x37C)
#define MC_LATENCY_ALLOWANCE_XUSB_1 (0x380)
#define MC_LATENCY_ALLOWANCE_TSEC_0 (0x390)
#define MC_LATENCY_ALLOWANCE_VIC_0 (0x394)
#define MC_LATENCY_ALLOWANCE_VI2_0 (0x398)
#define MC_LATENCY_ALLOWANCE_GPU_0 (0x3AC)
#define MC_LATENCY_ALLOWANCE_SDMMCA_0 (0x3B8)
#define MC_LATENCY_ALLOWANCE_SDMMCAA_0 (0x3BC)
#define MC_LATENCY_ALLOWANCE_SDMMC_0 (0x3C0)
#define MC_LATENCY_ALLOWANCE_SDMMCAB_0 (0x3C4)
#define MC_LATENCY_ALLOWANCE_NVDEC_0 (0x3D8)
#define MC_LATENCY_ALLOWANCE_GPU2_0 (0x3E8)
#define MC_VIDEO_PROTECT_VPR_OVERRIDE (0x418)
#define MC_DIS_PTSA_RATE (0x41C)
#define MC_DIS_PTSA_MIN (0x420)
#define MC_DIS_PTSA_MAX (0x424)
#define MC_DISB_PTSA_RATE (0x428)
#define MC_DISB_PTSA_MIN (0x42C)
#define MC_DISB_PTSA_MAX (0x430)
#define MC_VE_PTSA_RATE (0x434)
#define MC_VE_PTSA_MIN (0x438)
#define MC_VE_PTSA_MAX (0x43C)
#define MC_MLL_MPCORER_PTSA_RATE (0x44C)
#define MC_RING1_PTSA_RATE (0x47C)
#define MC_RING1_PTSA_MIN (0x480)
#define MC_RING1_PTSA_MAX (0x484)
#define MC_PCX_PTSA_RATE (0x4AC)
#define MC_PCX_PTSA_MIN (0x4B0)
#define MC_PCX_PTSA_MAX (0x4B4)
#define MC_MSE_PTSA_RATE (0x4C4)
#define MC_MSE_PTSA_MIN (0x4C8)
#define MC_MSE_PTSA_MAX (0x4CC)
#define MC_AHB_PTSA_RATE (0x4DC)
#define MC_AHB_PTSA_MIN (0x4E0)
#define MC_AHB_PTSA_MAX (0x4E4)
#define MC_APB_PTSA_RATE (0x4E8)
#define MC_APB_PTSA_MIN (0x4EC)
#define MC_APB_PTSA_MAX (0x4F0)
#define MC_FTOP_PTSA_RATE (0x50C)
#define MC_HOST_PTSA_RATE (0x518)
#define MC_HOST_PTSA_MIN (0x51C)
#define MC_HOST_PTSA_MAX (0x520)
#define MC_USBX_PTSA_RATE (0x524)
#define MC_USBX_PTSA_MIN (0x528)
#define MC_USBX_PTSA_MAX (0x52C)
#define MC_USBD_PTSA_RATE (0x530)
#define MC_USBD_PTSA_MIN (0x534)
#define MC_USBD_PTSA_MAX (0x538)
#define MC_GK_PTSA_RATE (0x53C)
#define MC_GK_PTSA_MIN (0x540)
#define MC_GK_PTSA_MAX (0x544)
#define MC_AUD_PTSA_RATE (0x548)
#define MC_AUD_PTSA_MIN (0x54C)
#define MC_AUD_PTSA_MAX (0x550)
#define MC_VICPC_PTSA_RATE (0x554)
#define MC_VICPC_PTSA_MIN (0x558)
#define MC_VICPC_PTSA_MAX (0x55C)
#define MC_JPG_PTSA_RATE (0x584)
#define MC_JPG_PTSA_MIN (0x588)
#define MC_JPG_PTSA_MAX (0x58C)
#define MC_VIDEO_PROTECT_VPR_OVERRIDE1 (0x590)
#define MC_GK2_PTSA_RATE (0x610)
#define MC_GK2_PTSA_MIN (0x614)
#define MC_GK2_PTSA_MAX (0x618)
#define MC_SDM_PTSA_RATE (0x61C)
#define MC_SDM_PTSA_MIN (0x620)
#define MC_SDM_PTSA_MAX (0x624)
#define MC_HDAPC_PTSA_RATE (0x628)
#define MC_HDAPC_PTSA_MIN (0x62C)
#define MC_HDAPC_PTSA_MAX (0x630)
#define MC_VIDEO_PROTECT_BOM (0x648)
#define MC_EMEM_CFG_ACCESS_CTRL (0x664)
#define MC_SEC_CARVEOUT_BOM (0x670)
#define MC_SEC_CARVEOUT_SIZE_MB (0x674)
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A (0x690)
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB (0x694)
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B (0x698)
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB (0x69C)
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C (0x6A0)
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB (0x6A4)
#define MC_EMEM_ARB_TIMING_RFCPB (0x6C0)
#define MC_EMEM_ARB_TIMING_CCDMW (0x6C4)
#define MC_EMEM_ARB_REFPB_HP_CTRL (0x6F0)
#define MC_EMEM_ARB_REFPB_BANK_CTRL (0x6F4)
#define MC_UNTRANSLATED_REGION_CHECK (0x948)
#define MC_PTSA_GRANT_DECREMENT (0x960)
#define MC_EMEM_ARB_OVERRIDE_1 (0x968)
#define MC_CLIENT_HOTRESET_CTRL_1 (0x970)
#define MC_CLIENT_HOTRESET_STATUS_1 (0x974)
#define MC_VIDEO_PROTECT_BOM_ADR_HI (0x978)
#define MC_SMMU_PTC_FLUSH_1 (0x9B8)
#define MC_SEC_CARVEOUT_ADR_HI (0x9D4)
#define MC_DA_CONFIG0 (0x9DC)
#define MC_SMMU_DC1_ASID (0xA88)
#define MC_SMMU_SDMMC1A_ASID (0xA94)
#define MC_SMMU_SDMMC2A_ASID (0xA98)
#define MC_SMMU_SDMMC3A_ASID (0xA9C)
#define MC_SMMU_SDMMC4A_ASID (0xAA0)
#define MC_SMMU_ISP2B_ASID (0xAA4)
#define MC_SMMU_GPU_ASID (0xAA8)
#define MC_SMMU_GPUB_ASID (0xAAC)
#define MC_SMMU_PPCS2_ASID (0xAB0)
#define MC_SMMU_NVDEC_ASID (0xAB4)
#define MC_SMMU_APE_ASID (0xAB8)
#define MC_SMMU_SE_ASID (0xABC)
#define MC_SMMU_NVJPG_ASID (0xAC0)
#define MC_SMMU_HC1_ASID (0xAC4)
#define MC_SMMU_SE1_ASID (0xAC8)
#define MC_SMMU_AXIAP_ASID (0xACC)
#define MC_SMMU_ETR_ASID (0xAD0)
#define MC_SMMU_TSECB_ASID (0xAD4)
#define MC_SMMU_TSEC1_ASID (0xAD8)
#define MC_SMMU_TSECB1_ASID (0xADC)
#define MC_SMMU_NVDEC1_ASID (0xAE0)
#define MC_EMEM_ARB_DHYST_CTRL (0xBCC)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 (0xBD0)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 (0xBD4)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 (0xBD8)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 (0xBDC)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 (0xBE0)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 (0xBE4)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 (0xBE8)
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 (0xBEC)
#define MC_ERR_GENERALIZED_CARVEOUT_STATUS (0xC00)
#define MC_SMMU_TLB_CONFIG (0x014)
#define MC_SMMU_PTC_CONFIG (0x018)
#define MC_SMMU_AVPC_ASID (0x23C)
#define MC_SMMU_PPCS1_ASID (0x298)
#define MC_SECURITY_CFG0 (0x070)
#define MC_SECURITY_CFG1 (0x074)
#define MC_SECURITY_CFG3 (0x9BC)
#define MC_SMMU_TRANSLATION_ENABLE_0 (0x228)
#define MC_SMMU_TRANSLATION_ENABLE_1 (0x22C)
#define MC_SMMU_TRANSLATION_ENABLE_2 (0x230)
#define MC_SMMU_TRANSLATION_ENABLE_3 (0x234)
#define MC_SMMU_TRANSLATION_ENABLE_4 (0xB98)
#define MC_SMMU_ASID_SECURITY (0x038)
#define MC_SMMU_ASID_SECURITY_1 (0x03c)
#define MC_SMMU_ASID_SECURITY_2 (0x9e0)
#define MC_SMMU_ASID_SECURITY_3 (0x9e4)
#define MC_SMMU_ASID_SECURITY_4 (0x9e8)
#define MC_SMMU_ASID_SECURITY_5 (0x9ec)
#define MC_SMMU_ASID_SECURITY_6 (0x9f0)
#define MC_SMMU_ASID_SECURITY_7 (0x9f4)
#define MC_IRAM_BOM (0x65c)
#define MC_IRAM_TOM (0x660)
#define MC_IRAM_REG_CTRL (0x964)
#define MC_SEC_CARVEOUT_BOM (0x670)
#define MC_SEC_CARVEOUT_SIZE_MB (0x674)
#define MC_SEC_CARVEOUT_REG_CTRL (0x678)
#define MC_VIDEO_PROTECT_BOM (0x648)
#define MC_VIDEO_PROTECT_SIZE_MB (0x64c)
#define MC_VIDEO_PROTECT_REG_CTRL (0x650)
#define MC_VIDEO_PROTECT_GPU_OVERRIDE_0 (0x984)
#define MC_VIDEO_PROTECT_GPU_OVERRIDE_1 (0x988)
#define MC_MTS_CARVEOUT_BOM (0x9a0)
#define MC_MTS_CARVEOUT_SIZE_MB (0x9a4)
#define MC_MTS_CARVEOUT_ADR_HI (0x9a8)
#define MC_MTS_CARVEOUT_REG_CTRL (0x9ac)
#define MC_SECURITY_CARVEOUT1_CFG0 (0xc08)
#define MC_SECURITY_CARVEOUT1_BOM (0xc0c)
#define MC_SECURITY_CARVEOUT1_BOM_HI (0xc10)
#define MC_SECURITY_CARVEOUT1_SIZE_128KB (0xc14)
#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0 (0xc18)
#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1 (0xc1c)
#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2 (0xc20)
#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3 (0xc24)
#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4 (0xc28)
#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0 (0xc2c)
#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1 (0xc30)
#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2 (0xc34)
#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3 (0xc38)
#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4 (0xc3c)
#define MC_SECURITY_CARVEOUT2_CFG0 (0xc58)
#define MC_SECURITY_CARVEOUT2_BOM (0xc5c)
#define MC_SECURITY_CARVEOUT2_BOM_HI (0xc60)
#define MC_SECURITY_CARVEOUT2_SIZE_128KB (0xc64)
#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0 (0xc68)
#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1 (0xc6c)
#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2 (0xc70)
#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3 (0xc74)
#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4 (0xc78)
#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0 (0xc7c)
#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1 (0xc80)
#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2 (0xc84)
#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3 (0xc88)
#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4 (0xc8c)
#define MC_SECURITY_CARVEOUT3_CFG0 (0xca8)
#define MC_SECURITY_CARVEOUT3_BOM (0xcac)
#define MC_SECURITY_CARVEOUT3_BOM_HI (0xcb0)
#define MC_SECURITY_CARVEOUT3_SIZE_128KB (0xcb4)
#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0 (0xcb8)
#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1 (0xcbc)
#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2 (0xcc0)
#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3 (0xcc4)
#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4 (0xcc8)
#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0 (0xccc)
#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1 (0xcd0)
#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2 (0xcd4)
#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3 (0xcd8)
#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4 (0xcdc)
#define MC_SECURITY_CARVEOUT4_CFG0 (0xcf8)
#define MC_SECURITY_CARVEOUT4_BOM (0xcfc)
#define MC_SECURITY_CARVEOUT4_BOM_HI (0xd00)
#define MC_SECURITY_CARVEOUT4_SIZE_128KB (0xd04)
#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0 (0xd08)
#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1 (0xd0c)
#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2 (0xd10)
#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3 (0xd14)
#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4 (0xd18)
#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0 (0xd1c)
#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1 (0xd20)
#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2 (0xd24)
#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3 (0xd28)
#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4 (0xd2c)
#define MC_SECURITY_CARVEOUT5_CFG0 (0xd48)
#define MC_SECURITY_CARVEOUT5_BOM (0xd4c)
#define MC_SECURITY_CARVEOUT5_BOM_HI (0xd50)
#define MC_SECURITY_CARVEOUT5_SIZE_128KB (0xd54)
#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0 (0xd58)
#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1 (0xd5c)
#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2 (0xd60)
#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3 (0xd64)
#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4 (0xd68)
#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0 (0xd6c)
#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1 (0xd70)
#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2 (0xd74)
#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3 (0xd78)
#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4 (0xd7c)
#define MC_STAT_CONTROL (0x100)
#define MC_STAT_EMC_CLOCK_LIMIT (0x108)
#define MC_STAT_EMC_CLOCK_LIMIT_MSBS (0x10c)
#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_LO (0x118)
#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_HI (0x11c)
#define MC_STAT_EMC_FILTER_SET0_SPARE (0x124)
#define MC_STAT_EMC_FILTER_SET0_CLIENT_0 (0x128)
#define MC_STAT_EMC_FILTER_SET0_CLIENT_1 (0x12c)
#define MC_STAT_EMC_FILTER_SET0_CLIENT_2 (0x130)
#define MC_STAT_EMC_FILTER_SET0_CLIENT_3 (0x134)
#define MC_STAT_EMC_SET0_COUNT (0x138)
#define MC_STAT_EMC_SET0_COUNT_MSBS (0x13c)
#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_LO (0x158)
#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_HI (0x15c)
#define MC_STAT_EMC_FILTER_SET1_SPARE (0x164)
#define MC_STAT_EMC_FILTER_SET1_CLIENT_0 (0x168)
#define MC_STAT_EMC_FILTER_SET1_CLIENT_1 (0x16c)
#define MC_STAT_EMC_FILTER_SET1_CLIENT_2 (0x170)
#define MC_STAT_EMC_FILTER_SET1_CLIENT_3 (0x174)
#define MC_STAT_EMC_SET1_COUNT (0x178)
#define MC_STAT_EMC_SET1_COUNT_MSBS (0x17c)
#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_UPPER (0xa20)
#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_UPPER (0xa24)
#define MC_STAT_EMC_FILTER_SET0_CLIENT_4 (0xb88)
#define MC_STAT_EMC_FILTER_SET1_CLIENT_4 (0xb8c)
#define MC_STAT_EMC_FILTER_SET0_CLIENT_5 (0xbc4)
#define MC_STAT_EMC_FILTER_SET1_CLIENT_5 (0xbc8)
#define MC_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (MC, NAME)
#define MC_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (MC, NAME, VALUE)
#define MC_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (MC, NAME, ENUM)
#define MC_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(MC, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_MC_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (MC, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_MC_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (MC, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_MC_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (MC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_MC_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(MC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_MC_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (MC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_MC_REG_BIT_ENUM(SMMU_CONFIG_SMMU_ENABLE, 0, DISABLE, ENABLE);
DEFINE_MC_REG(SMMU_TLB_CONFIG_TLB_ACTIVE_LINES, 0, 6);
DEFINE_MC_REG_BIT_ENUM(SMMU_TLB_CONFIG_TLB_ROUND_ROBIN_ARBITRATION, 28, DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(SMMU_TLB_CONFIG_TLB_HIT_UNDER_MISS, 29, DISABLE, ENABLE);
DEFINE_MC_REG(SMMU_PTC_CONFIG_PTC_INDEX_MAP, 0, 7);
DEFINE_MC_REG(SMMU_PTC_CONFIG_PTC_REQ_LIMIT, 24, 4);
DEFINE_MC_REG_BIT_ENUM(SMMU_PTC_CONFIG_PTC_CACHE_ENABLE, 29, DISABLE, ENABLE);
DEFINE_MC_REG(SMMU_PTB_ASID_CURRENT_ASID, 0, 7);
DEFINE_MC_REG(SMMU_PTB_DATA_ASID_PDE_BASE, 0, 22);
DEFINE_MC_REG_BIT_ENUM(SMMU_PTB_DATA_ASID_NONSECURE, 29, DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(SMMU_PTB_DATA_ASID_WRITABLE, 30, DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(SMMU_PTB_DATA_ASID_READABLE, 31, DISABLE, ENABLE);
DEFINE_MC_REG(SMMU_AVPC_ASID_AVPC_ASID, 0, 7);
DEFINE_MC_REG_BIT_ENUM(SMMU_AVPC_ASID_AVPC_SMMU_ENABLE, 31, DISABLE, ENABLE);
DEFINE_MC_REG(SMMU_PPCS1_ASID_PPCS1_ASID, 0, 7);
DEFINE_MC_REG_BIT_ENUM(SMMU_PPCS1_ASID_PPCS1_SMMU_ENABLE, 31, DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_0, 0, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_1, 1, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_2, 2, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_3, 3, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_4, 4, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_5, 5, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_6, 6, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_7, 7, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_8, 8, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_9, 9, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_10, 10, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_11, 11, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_12, 12, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_13, 13, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_14, 14, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_SECURE_ASIDS_15, 15, NONSECURE, SECURE);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_0, 16, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_1, 17, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_2, 18, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_3, 19, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_4, 20, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_5, 21, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_6, 22, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_7, 23, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_8, 24, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_9, 25, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_10, 26, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_11, 27, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_12, 28, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_13, 29, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_14, 30, NONPROMOTING, PROMOTING);
DEFINE_MC_REG_BIT_ENUM(SMMU_ASID_SECURITY_PROMOTING_ASIDS_15, 31, NONPROMOTING, PROMOTING);
DEFINE_MC_REG(SECURITY_CFG0_SECURITY_BOM, 20, 12);
DEFINE_MC_REG(SECURITY_CFG1_SECURITY_SIZE, 0, 13);
DEFINE_MC_REG(SECURITY_CFG3_SECURITY_BOM_HI, 0, 2);
DEFINE_MC_REG_BIT_ENUM(SEC_CARVEOUT_REG_CTRL_SEC_CARVEOUT_WRITE_ACCESS, 0, ENABLED, DISABLED);
DEFINE_MC_REG_BIT_ENUM(VIDEO_PROTECT_REG_CTRL_VIDEO_PROTECT_WRITE_ACCESS, 0, ENABLED, DISABLED);
DEFINE_MC_REG_BIT_ENUM(VIDEO_PROTECT_REG_CTRL_VIDEO_PROTECT_ALLOW_TZ_WRITE, 1, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(MTS_CARVEOUT_REG_CTRL_MTS_CARVEOUT_WRITE_ACCESS, 0, ENABLED, DISABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_PROTECT_MODE, 0, LOCKBIT_SECURE, TZ_SECURE);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_LOCK_MODE, 1, UNLOCKED, LOCKED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_ADDRESS_TYPE, 2, ANY_ADDRESS, UNTRANSLATED_ONLY);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_READ_ACCESS_LEVEL0, 3, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_READ_ACCESS_LEVEL1, 4, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_READ_ACCESS_LEVEL2, 5, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_READ_ACCESS_LEVEL3, 6, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_WRITE_ACCESS_LEVEL0, 7, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_WRITE_ACCESS_LEVEL1, 8, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_WRITE_ACCESS_LEVEL2, 9, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_WRITE_ACCESS_LEVEL3, 10, DISABLED, ENABLED);
DEFINE_MC_REG(SECURITY_CARVEOUT_CFG0_APERTURE_ID, 11, 3);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_READ_CHECK_ACCESS_LEVEL0, 14, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_READ_CHECK_ACCESS_LEVEL1, 15, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_READ_CHECK_ACCESS_LEVEL2, 16, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_READ_CHECK_ACCESS_LEVEL3, 17, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_WRITE_CHECK_ACCESS_LEVEL0, 18, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_WRITE_CHECK_ACCESS_LEVEL1, 19, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_WRITE_CHECK_ACCESS_LEVEL2, 20, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_DISABLE_WRITE_CHECK_ACCESS_LEVEL3, 21, ENABLE_CHECKS, DISABLE_CHECKS);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_SEND_CFG_TO_GPU, 22, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_TZ_GLOBAL_WR_EN, 23, DISABLED, BYPASS_CHECK);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_TZ_GLOBAL_RD_EN, 24, DISABLED, BYPASS_CHECK);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_ALLOW_APERTURE_ID_MISMATCH, 25, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_FORCE_APERTURE_ID_MATCH, 26, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(SECURITY_CARVEOUT_CFG0_IS_WPR, 27, DISABLED, ENABLED);
#define MC_CLIENT_ACCESS_NUM_CLIENTS 32
/* _ACCESS0 */
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_PTCR, ( 0 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAY0A, ( 1 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAY0AB, ( 2 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAY0B, ( 3 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAY0BB, ( 4 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAY0C, ( 5 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAY0CB, ( 6 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_AFIR, ( 14 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_AVPCARM7R, ( 15 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAYHC, ( 16 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_DISPLAYHCB, ( 17 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_HDAR, ( 21 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_HOST1XDMAR, ( 22 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_HOST1XR, ( 23 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_NVENCSRD, ( 28 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_PPCSAHBDMAR, ( 29 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_PPCSAHBSLVR, ( 30 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS0_SATAR, ( 31 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 0)), DISABLE, ENABLE);
/* _ACCESS1 */
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_VDEBSEVR, ( 34 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_VDEMBER, ( 35 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_VDEMCER, ( 36 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_VDETPER, ( 37 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_MPCORELPR, ( 38 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_MPCORER, ( 39 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_NVENCSWR, ( 43 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_AFIW, ( 49 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_AVPCARM7W, ( 50 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_HDAW, ( 53 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_HOST1XW, ( 54 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_MPCORELPW, ( 56 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_MPCOREW, ( 57 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_PPCSAHBDMAW, ( 59 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_PPCSAHBSLVW, ( 60 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_SATAW, ( 61 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_VDEBSEVW, ( 62 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS1_VDEDBGW, ( 63 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 1)), DISABLE, ENABLE);
/* _ACCESS2 */
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_VDEMBEW, ( 64 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_VDETPMW, ( 65 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_ISPRA, ( 68 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_ISPWA, ( 70 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_ISPWB, ( 71 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_XUSB_HOSTR, ( 74 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_XUSB_HOSTW, ( 75 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_XUSB_DEVR, ( 76 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_XUSB_DEVW, ( 77 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_ISPRAB, ( 78 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_ISPWAB, ( 80 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_ISPWBB, ( 81 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_TSECSRD, ( 84 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_TSECSWR, ( 85 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_A9AVPSCR, ( 86 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_A9AVPSCW, ( 87 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_GPUSRD, ( 88 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_GPUSWR, ( 89 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS2_DISPLAYT, ( 90 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 2)), DISABLE, ENABLE);
/* _ACCESS3 */
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCRA, ( 96 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCRAA, ( 97 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCR, ( 98 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCRAB, ( 99 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCWA, (100 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCWAA, (101 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCW, (102 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_SDMMCWAB, (103 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_VICSRD, (108 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_VICSWR, (109 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_VIW, (114 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_DISPLAYD, (115 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_NVDECSRD, (120 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_NVDECSWR, (121 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_APER, (122 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_APEW, (123 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_NVJPGSRD, (126 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS3_NVJPGSWR, (127 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 3)), DISABLE, ENABLE);
/* _ACCESS4 */
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_SESRD, (128 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_SESWR, (129 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_AXIAPR, (130 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_AXIAPW, (131 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_ETRR, (132 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_ETRW, (133 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_TSECRDB, (134 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_TSECWRB, (135 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_GPUSRD2, (136 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_GPUSWR2, (137 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG(IRAM_BOM_IRAM_BOM, 12, BITSIZEOF(u32) - 12);
DEFINE_MC_REG(IRAM_TOM_IRAM_TOM, 12, BITSIZEOF(u32) - 12);
DEFINE_MC_REG_BIT_ENUM(IRAM_REG_CTRL_IRAM_CFG_WRITE_ACCESS, 0, ENABLED, DISABLED);
DEFINE_MC_REG_BIT_ENUM(UNTRANSLATED_REGION_CHECK_UNTRANSLATED_REGION_CHECK_ACCESS, 0, ENABLED, DISABLED);
DEFINE_MC_REG_BIT_ENUM(UNTRANSLATED_REGION_CHECK_REQUIRE_UNTRANSLATED_CLIENTS_HIT_CARVEOUT, 8, DISABLED, ENABLED);
DEFINE_MC_REG_BIT_ENUM(UNTRANSLATED_REGION_CHECK_REQUIRE_UNTRANSLATED_GPU_HIT_CARVEOUT, 9, DISABLED, ENABLED);
| 39,612
|
C++
|
.h
| 536
| 72.796642
| 327
| 0.628904
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,114
|
tegra_sysctr0.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_sysctr0.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define SYSCTR0_CNTCR (0x000)
#define SYSCTR0_CNTCV0 (0x008)
#define SYSCTR0_CNTCV1 (0x00C)
#define SYSCTR0_CNTFID0 (0x020)
#define SYSCTR0_CNTFID1 (0x024)
#define SYSCTR0_COUNTERID4 (0xFD0)
#define SYSCTR0_COUNTERID5 (0xFD4)
#define SYSCTR0_COUNTERID6 (0xFD8)
#define SYSCTR0_COUNTERID7 (0xFDC)
#define SYSCTR0_COUNTERID0 (0xFE0)
#define SYSCTR0_COUNTERID1 (0xFE4)
#define SYSCTR0_COUNTERID2 (0xFE8)
#define SYSCTR0_COUNTERID3 (0xFEC)
#define SYSCTR0_COUNTERID8 (0xFF0)
#define SYSCTR0_COUNTERID9 (0xFF4)
#define SYSCTR0_COUNTERID10 (0xFF8)
#define SYSCTR0_COUNTERID11 (0xFFC)
#define SYSCTR0_COUNTERID(n) SYSCTR0_COUNTERID##n
#define SYSCTR0_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (SYSCTR0, NAME)
#define SYSCTR0_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (SYSCTR0, NAME, VALUE)
#define SYSCTR0_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (SYSCTR0, NAME, ENUM)
#define SYSCTR0_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(SYSCTR0, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_SYSCTR0_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (SYSCTR0, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_SYSCTR0_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (SYSCTR0, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_SYSCTR0_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (SYSCTR0, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_SYSCTR0_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(SYSCTR0, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_SYSCTR0_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (SYSCTR0, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_SYSCTR0_REG_BIT_ENUM(CNTCR_EN, 0, DISABLE, ENABLE);
DEFINE_SYSCTR0_REG_BIT_ENUM(CNTCR_HDBG, 1, DISABLE, ENABLE);
| 3,435
|
C++
|
.h
| 51
| 65.960784
| 337
| 0.640024
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,115
|
tegra_i2c.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_i2c.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define I2C_I2C_CNFG (0x000)
#define I2C_I2C_CMD_ADDR0 (0x004)
#define I2C_I2C_CMD_DATA1 (0x00C)
#define I2C_I2C_STATUS (0x01C)
#define I2C_PACKET_TRANSFER_STATUS (0x058)
#define I2C_FIFO_CONTROL (0x05C)
#define I2C_FIFO_STATUS (0x060)
#define I2C_INTERRUPT_MASK_REGISTER (0x064)
#define I2C_INTERRUPT_STATUS_REGISTER (0x068)
#define I2C_CLK_DIVISOR_REGISTER (0x06C)
#define I2C_BUS_CLEAR_CONFIG (0x084)
#define I2C_BUS_CLEAR_STATUS (0x088)
#define I2C_CONFIG_LOAD (0x08C)
#define I2C_INTERFACE_TIMING_0 (0x094)
#define I2C_INTERFACE_TIMING_1 (0x098)
#define I2C_HS_INTERFACE_TIMING_0 (0x094)
#define I2C_HS_INTERFACE_TIMING_1 (0x098)
#define I2C_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (I2C, NAME)
#define I2C_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (I2C, NAME, VALUE)
#define I2C_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (I2C, NAME, ENUM)
#define I2C_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(I2C, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_I2C_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (I2C, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_I2C_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (I2C, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_I2C_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (I2C, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_I2C_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(I2C, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_I2C_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (I2C, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
/* I2C_CNFG */
DEFINE_I2C_REG(I2C_CNFG_LENGTH, 1, 3);
DEFINE_I2C_REG_BIT_ENUM(I2C_CNFG_CMD1, 6, WRITE, READ);
DEFINE_I2C_REG_BIT_ENUM(I2C_CNFG_SEND, 9, NOP, GO);
DEFINE_I2C_REG_BIT_ENUM(I2C_CNFG_PACKET_MODE_EN, 10, NOP, GO);
DEFINE_I2C_REG_BIT_ENUM(I2C_CNFG_NEW_MASTER_FSM, 11, DISABLE, ENABLE);
DEFINE_I2C_REG_THREE_BIT_ENUM(I2C_CNFG_DEBOUNCE_CNT, 12, NO_DEBOUNCE, DEBOUNCE_2T, DEBOUNCE_4T, DEBOUNCE_6T, DEBOUNCE_8T, DEBOUNCE_10T, DEBOUNCE_12T, DEBOUNCE_14T);
/* I2C_CMD_ADDR0 */
DEFINE_I2C_REG_BIT_ENUM(I2C_CMD_ADDR0_7BIT_RW, 0, WRITE, READ);
DEFINE_I2C_REG(I2C_CMD_ADDR0_7BIT_ADDR, 1, 7);
/* I2C_STATUS */
DEFINE_I2C_REG_FOUR_BIT_ENUM(I2C_STATUS_CMD1_STAT, 0, SL1_XFER_SUCCESSFUL, SL1_NOACK_FOR_BYTE1, SL1_NOACK_FOR_BYTE2, SL1_NOACK_FOR_BYTE3, SL1_NOACK_FOR_BYTE4, SL1_NOACK_FOR_BYTE5, SL1_NOACK_FOR_BYTE6, SL1_NOACK_FOR_BYTE7, SL1_NOACK_FOR_BYTE8, SL1_NOACK_FOR_BYTE9, SL1_NOACK_FOR_BYTE10, RESERVED11, RESERVED12, RESERVED13, RESERVED14, RESERVED15);
DEFINE_I2C_REG_FOUR_BIT_ENUM(I2C_STATUS_CMD2_STAT, 4, SL2_XFER_SUCCESSFUL, SL2_NOACK_FOR_BYTE1, SL2_NOACK_FOR_BYTE2, SL2_NOACK_FOR_BYTE3, SL2_NOACK_FOR_BYTE4, SL2_NOACK_FOR_BYTE5, SL2_NOACK_FOR_BYTE6, SL2_NOACK_FOR_BYTE7, SL2_NOACK_FOR_BYTE8, SL2_NOACK_FOR_BYTE9, SL2_NOACK_FOR_BYTE10, RESERVED11, RESERVED12, RESERVED13, RESERVED14, RESERVED15);
DEFINE_I2C_REG_BIT_ENUM(I2C_STATUS_BUSY, 8, NOT_BUSY, BUSY);
/* PACKET_TRANSFER_STATUS */
DEFINE_I2C_REG_BIT_ENUM(PACKET_TRANSFER_STATUS_CONTROLLER_BUSY, 0, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(PACKET_TRANSFER_STATUS_ARB_LOST, 1, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(PACKET_TRANSFER_STATUS_NOACK_FOR_DATA, 2, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(PACKET_TRANSFER_STATUS_NOACK_FOR_ADDR, 3, UNSET, SET);
/* FIFO_CONTROL */
DEFINE_I2C_REG_BIT_ENUM(FIFO_CONTROL_RX_FIFO_FLUSH, 0, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(FIFO_CONTROL_TX_FIFO_FLUSH, 1, UNSET, SET);
DEFINE_I2C_REG_TWO_BIT_ENUM(FIFO_CONTROL_FIFO_FLUSH, 0, RX_UNSET_TX_UNSET, RX_SET_TX_UNSET, RX_UNSET_TX_SET, RX_SET_TX_SET);
DEFINE_I2C_REG(FIFO_CONTROL_RX_FIFO_TRIG, 2, 3);
DEFINE_I2C_REG(FIFO_CONTROL_TX_FIFO_TRIG, 5, 3);
/* FIFO_STATUS */
DEFINE_I2C_REG(FIFO_STATUS_RX_FIFO_FULL_CNT, 0, 4);
DEFINE_I2C_REG(FIFO_STATUS_TX_FIFO_EMPTY_CNT, 4, 4);
/* INTERRUPT_MASK_REGISTER */
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_RFIFO_DATA_REQ_INT_EN, 0, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_TFIFO_DATA_REQ_INT_EN, 1, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_ARB_LOST_INT_EN, 2, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_NOACK_INT_EN, 3, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_RFIFO_UNF_INT_EN, 4, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_TFIFO_OVF_INT_EN, 5, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_ALL_PACKETS_XFER_COMPLETE_INT_EN, 6, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_MASK_REGISTER_PACKET_XFER_COMPLETE_INT_EN, 7, DISABLE, ENABLE);
/* INTERRUPT_STATUS_REGISTER */
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_RFIFO_DATA_REQ, 0, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_TFIFO_DATA_REQ, 1, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_ARB_LOST, 2, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_NOACK, 3, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_RFIFO_UNF, 4, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_TFIFO_OVF, 5, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_ALL_PACKETS_XFER_COMPLETE, 6, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_PACKET_XFER_COMPLETE, 7, UNSET, SET);
DEFINE_I2C_REG_BIT_ENUM(INTERRUPT_STATUS_REGISTER_BUS_CLEAR_DONE, 11, UNSET, SET);
/* CLK_DIVISOR_REGISTER */
DEFINE_I2C_REG(CLK_DIVISOR_REGISTER_HSMODE, 0, 16);
DEFINE_I2C_REG(CLK_DIVISOR_REGISTER_STD_FAST_MODE, 16, 16);
/* BUS_CLEAR_CONFIG */
DEFINE_I2C_REG_BIT_ENUM(BUS_CLEAR_CONFIG_BC_ENABLE, 0, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(BUS_CLEAR_CONFIG_BC_TERMINATE, 1, THRESHOLD, IMMEDIATE);
DEFINE_I2C_REG_BIT_ENUM(BUS_CLEAR_CONFIG_BC_STOP_COND, 2, NO_STOP, STOP);
DEFINE_I2C_REG(BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD, 16, 8);
/* BUS_CLEAR_STATUS */
DEFINE_I2C_REG_BIT_ENUM(BUS_CLEAR_STATUS_BC_STATUS, 0, NOT_CLEARED, CLEARED);
/* CONFIG_LOAD */
DEFINE_I2C_REG_BIT_ENUM(CONFIG_LOAD_MSTR_CONFIG_LOAD, 0, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(CONFIG_LOAD_SLV_CONFIG_LOAD, 1, DISABLE, ENABLE);
DEFINE_I2C_REG_BIT_ENUM(CONFIG_LOAD_TIMEOUT_CONFIG_LOAD, 2, DISABLE, ENABLE);
DEFINE_I2C_REG(CONFIG_LOAD_RESERVED_BIT_5, 5, 1);
/* INTERFACE_TIMING_0 */
DEFINE_I2C_REG(INTERFACE_TIMING_0_TLOW, 0, 6);
DEFINE_I2C_REG(INTERFACE_TIMING_0_THIGH, 8, 6);
/* HS_INTERFACE_TIMING_0 */
DEFINE_I2C_REG(HS_INTERFACE_TIMING_0_HS_TLOW, 0, 6);
DEFINE_I2C_REG(HS_INTERFACE_TIMING_0_HS_THIGH, 8, 6);
| 8,446
|
C++
|
.h
| 116
| 71.508621
| 346
| 0.673005
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,116
|
tegra_pg_up.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_pg_up.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define PG_UP(x) (0x60000000 + x)
#define PG_UP_TAG (0x000)
#define PG_UP_TAG_PID_COP 0xAAAAAAAA
| 932
|
C++
|
.h
| 25
| 35.6
| 76
| 0.756637
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,117
|
tegra_sb.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_sb.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define SB_CSR (0x200)
#define SB_PFCFG (0x208)
#define SB_AA64_RESET_LOW (0x230)
#define SB_AA64_RESET_HIGH (0x234)
#define SB_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (SB, NAME)
#define SB_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (SB, NAME, VALUE)
#define SB_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (SB, NAME, ENUM)
#define SB_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(SB, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_SB_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (SB, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_SB_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (SB, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_SB_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (SB, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_SB_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(SB, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_SB_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (SB, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_SB_REG_BIT_ENUM(CSR_SECURE_BOOT_FLAG, 0, DISABLE, ENABLE);
DEFINE_SB_REG_BIT_ENUM(CSR_NS_RST_VEC_WR_DIS, 1, ENABLE, DISABLE);
DEFINE_SB_REG_BIT_ENUM(CSR_PIROM_DISABLE, 4, ENABLE, DISABLE);
DEFINE_SB_REG_BIT_ENUM(CSR_HANG, 6, DISABLE, ENABLE);
DEFINE_SB_REG_BIT_ENUM(CSR_SWDM_ENABLE, 7, DISABLE, ENABLE);
DEFINE_SB_REG(CSR_SWDM_FAIL_COUNT, 8, 4);
DEFINE_SB_REG(CSR_COT_FAIL_COUNT, 12, 4);
DEFINE_SB_REG_BIT_ENUM(PFCFG_SPNIDEN, 0, DISABLE, ENABLE);
DEFINE_SB_REG_BIT_ENUM(PFCFG_SPIDEN, 1, DISABLE, ENABLE);
DEFINE_SB_REG_BIT_ENUM(PFCFG_NIDEN, 2, DISABLE, ENABLE);
DEFINE_SB_REG_BIT_ENUM(PFCFG_DBGEN, 3, DISABLE, ENABLE);
| 3,375
|
C++
|
.h
| 46
| 71.934783
| 327
| 0.609389
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,118
|
tegra_mipi_cal.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_mipi_cal.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define MIPI_CAL_MIPI_CAL_CTRL (0x000)
#define MIPI_CAL_CIL_MIPI_CAL_STATUS (0x008)
#define MIPI_CAL_CILA_MIPI_CAL_CONFIG (0x014)
#define MIPI_CAL_CILB_MIPI_CAL_CONFIG (0x018)
#define MIPI_CAL_CILC_MIPI_CAL_CONFIG (0x01C)
#define MIPI_CAL_CILD_MIPI_CAL_CONFIG (0x020)
#define MIPI_CAL_CILE_MIPI_CAL_CONFIG (0x024)
#define MIPI_CAL_CILF_MIPI_CAL_CONFIG (0x028)
#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG (0x038)
#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG (0x03C)
#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG (0x040)
#define MIPI_CAL_DSID_MIPI_CAL_CONFIG (0x044)
#define MIPI_CAL_MIPI_BIAS_PAD_CFG0 (0x058)
#define MIPI_CAL_MIPI_BIAS_PAD_CFG1 (0x05C)
#define MIPI_CAL_MIPI_BIAS_PAD_CFG2 (0x060)
#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2 (0x064)
#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2 (0x068)
#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2 (0x070)
#define MIPI_CAL_DSID_MIPI_CAL_CONFIG_2 (0x074)
#define MIPI_CAL_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (MIPI_CAL, NAME)
#define MIPI_CAL_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (MIPI_CAL, NAME, VALUE)
#define MIPI_CAL_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (MIPI_CAL, NAME, ENUM)
#define MIPI_CAL_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(MIPI_CAL, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_MIPI_CAL_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (MIPI_CAL, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_MIPI_CAL_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (MIPI_CAL, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_MIPI_CAL_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (MIPI_CAL, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_MIPI_CAL_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(MIPI_CAL, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_MIPI_CAL_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (MIPI_CAL, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
| 3,595
|
C++
|
.h
| 50
| 70.56
| 339
| 0.629305
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,119
|
tegra_clkrst.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_clkrst.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
/* Clock source enums. */
#define CLK_RST_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (CLK_RST_CONTROLLER, NAME)
#define CLK_RST_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (CLK_RST_CONTROLLER, NAME, VALUE)
#define CLK_RST_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (CLK_RST_CONTROLLER, NAME, ENUM)
#define CLK_RST_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(CLK_RST_CONTROLLER, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_CLK_RST_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (CLK_RST_CONTROLLER, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_CLK_RST_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (CLK_RST_CONTROLLER, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_CLK_RST_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (CLK_RST_CONTROLLER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_CLK_RST_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(CLK_RST_CONTROLLER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (CLK_RST_CONTROLLER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
#define CLK_RST_CONTROLLER_RST_SOURCE (0x000)
#define CLK_RST_CONTROLLER_CCLK_BURST_POLICY (0x020)
#define CLK_RST_CONTROLLER_SUPER_CCLK_DIVIDER (0x024)
#define CLK_RST_CONTROLLER_SCLK_BURST_POLICY (0x028)
#define CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER (0x02C)
#define CLK_RST_CONTROLLER_CLK_SYSTEM_RATE (0x030)
#define CLK_RST_CONTROLLER_MISC_CLK_ENB (0x048)
#define CLK_RST_CONTROLLER_OSC_CTRL (0x050)
#define CLK_RST_CONTROLLER_PLLC_BASE (0x080)
#define CLK_RST_CONTROLLER_PLLC_OUT (0x084)
#define CLK_RST_CONTROLLER_PLLC_MISC (0x088)
#define CLK_RST_CONTROLLER_PLLC_MISC1 (0x08C)
#define CLK_RST_CONTROLLER_PLLM_BASE (0x090)
#define CLK_RST_CONTROLLER_PLLM_MISC1 (0x098)
#define CLK_RST_CONTROLLER_PLLM_MISC2 (0x09C)
#define CLK_RST_CONTROLLER_PLLD_BASE (0x0D0)
#define CLK_RST_CONTROLLER_PLLD_MISC1 (0x0D8)
#define CLK_RST_CONTROLLER_PLLD_MISC (0x0DC)
#define CLK_RST_CONTROLLER_PLLX_BASE (0x0E0)
#define CLK_RST_CONTROLLER_PLLX_MISC (0x0E4)
#define CLK_RST_CONTROLLER_CCLKG_BURST_POLICY (0x368)
#define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER (0x36C)
#define CLK_RST_CONTROLLER_CCLKLP_BURST_POLICY (0x370)
#define CLK_RST_CONTROLLER_SUPER_CCLKLP_DIVIDER (0x374)
#define CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2 (0x388)
#define CLK_RST_CONTROLLER_PLLX_MISC1 (0x510)
#define CLK_RST_CONTROLLER_PLLX_MISC2 (0x514)
#define CLK_RST_CONTROLLER_PLLX_MISC3 (0x518)
#define CLK_RST_CONTROLLER_SPARE_REG0 (0x55C)
#define CLK_RST_CONTROLLER_PLLC4_BASE (0x5A4)
#define CLK_RST_CONTROLLER_PLLC_MISC2 (0x5D0)
#define CLK_RST_CONTROLLER_PLLMB_BASE (0x5E8)
#define CLK_RST_CONTROLLER_PLLMB_MISC1 (0x5EC)
/* Mariko. */
#define CLK_RST_CONTROLLER_PLLM_SS_CFG (0x774)
#define CLK_RST_CONTROLLER_PLLM_SS_CTRL1 (0x778)
#define CLK_RST_CONTROLLER_PLLM_SS_CTRL2 (0x77C)
#define CLK_RST_CONTROLLER_PLLMB_SS_CFG (0x780)
#define CLK_RST_CONTROLLER_PLLMB_SS_CTRL1 (0x784)
#define CLK_RST_CONTROLLER_PLLMB_SS_CTRL2 (0x788)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA (0x0F8)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB (0x0FC)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC (0x3A0)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD (0x3A4)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE (0x554)
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(SCLK_BURST_POLICY_SWAKEUP_IDLE_SOURCE, 0, CLKM, PLLC_OUT1, PLLC4_OUT3PLLP_OUT4, PLLP_OUT0, PLLP_OUT2, PLLC4_OUT1PLLC_OUT0, CLK_SCLKS, PLLC4_OUT2);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(SCLK_BURST_POLICY_SWAKEUP_RUN_SOURCE, 4, CLKM, PLLC_OUT1, PLLC4_OUT3PLLP_OUT4, PLLP_OUT0, PLLP_OUT2, PLLC4_OUT1PLLC_OUT0, CLK_SCLKS, PLLC4_OUT2);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(SCLK_BURST_POLICY_SWAKEUP_IRQ_SOURCE, 8, CLKM, PLLC_OUT1, PLLC4_OUT3PLLP_OUT4, PLLP_OUT0, PLLP_OUT2, PLLC4_OUT1PLLC_OUT0, CLK_SCLKS, PLLC4_OUT2);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(SCLK_BURST_POLICY_SWAKEUP_FIQ_SOURCE, 12, CLKM, PLLC_OUT1, PLLC4_OUT3PLLP_OUT4, PLLP_OUT0, PLLP_OUT2, PLLC4_OUT1PLLC_OUT0, CLK_SCLKS, PLLC4_OUT2);
DEFINE_CLK_RST_REG_BIT_ENUM(SCLK_BURST_POLICY_CPU_AUTO_SWAKEUP_FROM_IRQ, 24, NOP, BURST);
DEFINE_CLK_RST_REG_BIT_ENUM(SCLK_BURST_POLICY_COP_AUTO_SWAKEUP_FROM_IRQ, 25, NOP, BURST);
DEFINE_CLK_RST_REG_BIT_ENUM(SCLK_BURST_POLICY_CPU_AUTO_SWAKEUP_FROM_FIQ, 26, NOP, BURST);
DEFINE_CLK_RST_REG_BIT_ENUM(SCLK_BURST_POLICY_COP_AUTO_SWAKEUP_FROM_FIQ, 27, NOP, BURST);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(SCLK_BURST_POLICY_SYS_STATE, 28, STDBY, IDLE, RUN, RSVD3, IRQ, RSVD5, RSVD6, RSVD7, FIQ, RSVD9, RSVD10, RSVD11, RSVD12, RSVD13, RSVD14, RSVD15);
DEFINE_CLK_RST_REG(SUPER_SCLK_DIVIDER_SUPER_SDIV_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG(SUPER_SCLK_DIVIDER_SUPER_SDIV_DIVIDEND, 8, 8);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_SCLK_DIVIDER_SUPER_SDIV_DIS_FROM_CPU_IRQ, 24, NOP, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_SCLK_DIVIDER_SUPER_SDIV_DIS_FROM_COP_IRQ, 25, NOP, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_SCLK_DIVIDER_SUPER_SDIV_DIS_FROM_CPU_FIQ, 26, NOP, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_SCLK_DIVIDER_SUPER_SDIV_DIS_FROM_COP_FIQ, 27, NOP, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_SCLK_DIVIDER_SUPER_SDIV_ENB, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG(CLK_SYSTEM_RATE_APB_RATE, 0, 2);
DEFINE_CLK_RST_REG(CLK_SYSTEM_RATE_PCLK_DIS, 3, 1);
DEFINE_CLK_RST_REG(CLK_SYSTEM_RATE_AHB_RATE, 4, 2);
DEFINE_CLK_RST_REG(CLK_SYSTEM_RATE_HCLK_DIS, 7, 1);
DEFINE_CLK_RST_REG(MISC_CLK_ENB_CFG_ALL_VISIBLE, 28, 1);
DEFINE_CLK_RST_REG_BIT_ENUM(OSC_CTRL_XOE, 0, DISABLE, ENABLE);
DEFINE_CLK_RST_REG(OSC_CTRL_XOFS, 4, 6);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(OSC_CTRL_OSC_FREQ, 28, OSC13, OSC16P8, RSVD2, RSVD3, OSC19P2, OSC38P4, RSVD6, RSVD7, OSC12, OSC48, RSVD10, RSVD11, OSC26, RSVD13, RSVD14, RSVD15);
DEFINE_CLK_RST_REG(PLLC_BASE_PLLC_DIVM, 0, 8);
DEFINE_CLK_RST_REG(PLLC_BASE_PLLC_DIVN, 10, 8);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_BASE_PLLC_LOCK, 27, NOT_LOCK, LOCK);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_BASE_PLLC_REF_DIS, 29, REF_ENABLE, REF_DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_BASE_PLLC_ENABLE, 30, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_BASE_PLLC_BYPASS, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_OUT_PLLC_OUT1_RSTN, 0, RESET_ENABLE, RESET_DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_OUT_PLLC_OUT1_CLKEN, 1, DISABLE, ENABLE);
DEFINE_CLK_RST_REG(PLLC_OUT_PLLC_OUT1_RATIO, 8, 8);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC_OUT_PLLC_OUT1_DIV_BYP, 16, DISABLE, ENABLE);
DEFINE_CLK_RST_REG(PLLM_BASE_PLLM_DIVM, 0, 8);
DEFINE_CLK_RST_REG(PLLM_BASE_PLLM_DIVN, 8, 8);
DEFINE_CLK_RST_REG(PLLM_BASE_PLLM_DIVP, 20, 5);
DEFINE_CLK_RST_REG(PLLM_BASE_PLLM_DIVP_B01, 20, 1);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLM_BASE_PLLM_LOCK, 27, NOT_LOCK, LOCK);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLM_BASE_PLLM_REF_DIS, 29, REF_ENABLE, REF_DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLM_BASE_PLLM_ENABLE, 30, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLM_BASE_PLLM_BYPASSPLL, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLM_MISC2_PLLM_EN_LCKDET, 4, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLD_BASE_CSI_CLK_SRC, 23, BRICK, PLL_D);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLD_BASE_PLLD_REF_DIS, 29, REF_ENABLE, REF_DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLD_BASE_PLLD_ENABLE, 30, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLD_BASE_PLLD_BYPASS, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLX_BASE_PLLX_LOCK, 27, NOT_LOCK, LOCK);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLX_BASE_PLLX_REF_DIS, 29, REF_ENABLE, REF_DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLX_BASE_PLLX_ENABLE, 30, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLX_MISC_PLLX_LOCK_ENABLE, 18, DISABLE, ENABLE);
DEFINE_CLK_RST_REG(SUPER_CCLK_DIVIDER_SUPER_CDIV_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG(SUPER_CCLK_DIVIDER_SUPER_CDIV_DIVIDEND, 8, 8);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLK_DIVIDER_SUPER_CDIV_DIS_FROM_CPU_IRQ, 24, NO_IMPACT, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLK_DIVIDER_SUPER_CDIV_DIS_FROM_COP_IRQ, 25, NO_IMPACT, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLK_DIVIDER_SUPER_CDIV_DIS_FROM_CPU_FIQ, 26, NO_IMPACT, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLK_DIVIDER_SUPER_CDIV_DIS_FROM_COP_FIQ, 27, NO_IMPACT, DISABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLK_DIVIDER_SUPER_CDIV_ENB, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLKG_DIVIDER_SUPER_CDIV_ENB, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(SUPER_CCLKLP_DIVIDER_SUPER_CDIV_ENB, 31, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(CCLK_BURST_POLICY_CWAKEUP_IDLE_SOURCE, 0, CLKM, RSVD1, CLKS, RSVD3, PLLP_OUT0, PLLP_OUT4, RSVD6, RSVD7, PLLX_OUT0_LJ, DVFS_CPU_CLK, RSVD10, RSVD11, RSVD12, RSVD13, PLLX_OUT0, DVFS_CPU_CLK_LJ);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(CCLK_BURST_POLICY_CWAKEUP_RUN_SOURCE, 4, CLKM, RSVD1, CLKS, RSVD3, PLLP_OUT0, PLLP_OUT4, RSVD6, RSVD7, PLLX_OUT0_LJ, DVFS_CPU_CLK, RSVD10, RSVD11, RSVD12, RSVD13, PLLX_OUT0, DVFS_CPU_CLK_LJ);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(CCLK_BURST_POLICY_CWAKEUP_IRQ_SOURCE, 8, CLKM, RSVD1, CLKS, RSVD3, PLLP_OUT0, PLLP_OUT4, RSVD6, RSVD7, PLLX_OUT0_LJ, DVFS_CPU_CLK, RSVD10, RSVD11, RSVD12, RSVD13, PLLX_OUT0, DVFS_CPU_CLK_LJ);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(CCLK_BURST_POLICY_CWAKEUP_FIQ_SOURCE, 12, CLKM, RSVD1, CLKS, RSVD3, PLLP_OUT0, PLLP_OUT4, RSVD6, RSVD7, PLLX_OUT0_LJ, DVFS_CPU_CLK, RSVD10, RSVD11, RSVD12, RSVD13, PLLX_OUT0, DVFS_CPU_CLK_LJ);
DEFINE_CLK_RST_REG_FOUR_BIT_ENUM(CCLK_BURST_POLICY_CPU_STATE, 28, STDBY, IDLE, RUN, RSVD3, IRQ, RSVD5, RSVD6, RSVD7, FIQ, RSVD9, RSVD10, RSVD11, RSVD12, RSVD13, RSVD14, RSVD15);
DEFINE_CLK_RST_REG(CPU_SOFTRST_CTRL2_CAR2PMC_CPU_ACK_WIDTH, 0, 12);
DEFINE_CLK_RST_REG(PLLX_MISC3_PLLX_IDDQ, 3, 1);
DEFINE_CLK_RST_REG_TWO_BIT_ENUM(SPARE_REG0_CLK_M_DIVISOR, 2, CLK_M_DIVISOR1, CLK_M_DIVISOR2, CLK_M_DIVISOR3, CLK_M_DIVISOR4);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC4_BASE_PLLC4_IDDQ, 18, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC4_BASE_PLLC4_LOCK, 27, NOT_LOCK, LOCK_FEQ_AND_PHASE);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLC4_BASE_PLLC4_ENABLE, 30, DISABLE, ENABLE);
DEFINE_CLK_RST_REG(PLLMB_BASE_PLLMB_DIVM, 0, 8);
DEFINE_CLK_RST_REG(PLLMB_BASE_PLLMB_DIVN, 8, 8);
DEFINE_CLK_RST_REG(PLLMB_BASE_PLLMB_DIVP, 20, 5);
DEFINE_CLK_RST_REG(PLLMB_BASE_PLLMB_DIVP_B01, 20, 1);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLMB_BASE_PLLMB_LOCK, 27, NOT_LOCK, LOCK);
DEFINE_CLK_RST_REG_BIT_ENUM(PLLMB_BASE_PLLMB_ENABLE, 30, DISABLE, ENABLE);
/* RST_DEVICES */
#define CLK_RST_CONTROLLER_RST_DEVICES_L (0x004)
#define CLK_RST_CONTROLLER_RST_DEVICES_H (0x008)
#define CLK_RST_CONTROLLER_RST_DEVICES_U (0x00C)
#define CLK_RST_CONTROLLER_RST_DEVICES_X (0x28C)
#define CLK_RST_CONTROLLER_RST_DEVICES_Y (0x2A4)
#define CLK_RST_CONTROLLER_RST_DEVICES_V (0x358)
#define CLK_RST_CONTROLLER_RST_DEVICES_W (0x35C)
/* CLK_OUT_ENB */
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_L (0x010)
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_H (0x014)
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_U (0x018)
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_X (0x280)
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_Y (0x298)
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_V (0x360)
#define CLK_RST_CONTROLLER_CLK_OUT_ENB_W (0x364)
/* CLK_SOURCE */
#define CLK_RST_CONTROLLER_CLK_SOURCE_PWM (0x110)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 (0x124)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5 (0x128)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DISP1 (0x138)
#define CLK_RST_CONTROLLER_CLK_SOURCE_VI (0x148)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1 (0x150)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC2 (0x154)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 (0x164)
#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTA (0x178)
#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTB (0x17C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X (0x180)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C2 (0x198)
#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC (0x19C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTC (0x1A0)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C3 (0x1B8)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3 (0x1BC)
#define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE (0x1D4)
#define CLK_RST_CONTROLLER_CLK_SOURCE_TSEC (0x1F4)
#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT (0x3B4)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 (0x3C4)
#define CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON (0x3E8)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 (0x410)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SE (0x42C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP (0x620)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF (0x62C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC (0x630)
#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C6 (0x65C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL (0x664)
#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL (0x66C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM (0x694)
#define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC (0x6A0)
#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC_SAFE (0x724)
/* RST_DEV_*_SET */
#define CLK_RST_CONTROLLER_RST_DEV_L_SET (0x300)
#define CLK_RST_CONTROLLER_RST_DEV_H_SET (0x308)
#define CLK_RST_CONTROLLER_RST_DEV_U_SET (0x310)
#define CLK_RST_CONTROLLER_RST_DEV_V_SET (0x430)
#define CLK_RST_CONTROLLER_RST_DEV_W_SET (0x438)
#define CLK_RST_CONTROLLER_RST_DEV_X_SET (0x290)
#define CLK_RST_CONTROLLER_RST_DEV_Y_SET (0x2A8)
/* RST_DEV_*_CLR */
#define CLK_RST_CONTROLLER_RST_DEV_L_CLR (0x304)
#define CLK_RST_CONTROLLER_RST_DEV_H_CLR (0x30C)
#define CLK_RST_CONTROLLER_RST_DEV_U_CLR (0x314)
#define CLK_RST_CONTROLLER_RST_DEV_V_CLR (0x434)
#define CLK_RST_CONTROLLER_RST_DEV_W_CLR (0x43C)
#define CLK_RST_CONTROLLER_RST_DEV_X_CLR (0x294)
#define CLK_RST_CONTROLLER_RST_DEV_Y_CLR (0x2AC)
/* CLK_ENB_*_SET */
#define CLK_RST_CONTROLLER_CLK_ENB_L_SET (0x320)
#define CLK_RST_CONTROLLER_CLK_ENB_H_SET (0x328)
#define CLK_RST_CONTROLLER_CLK_ENB_U_SET (0x330)
#define CLK_RST_CONTROLLER_CLK_ENB_V_SET (0x440)
#define CLK_RST_CONTROLLER_CLK_ENB_W_SET (0x448)
#define CLK_RST_CONTROLLER_CLK_ENB_X_SET (0x284)
#define CLK_RST_CONTROLLER_CLK_ENB_Y_SET (0x29C)
/* CLK_ENB_*_CLR */
#define CLK_RST_CONTROLLER_CLK_ENB_L_CLR (0x324)
#define CLK_RST_CONTROLLER_CLK_ENB_H_CLR (0x32C)
#define CLK_RST_CONTROLLER_CLK_ENB_U_CLR (0x334)
#define CLK_RST_CONTROLLER_CLK_ENB_X_CLR (0x288)
#define CLK_RST_CONTROLLER_CLK_ENB_Y_CLR (0x2A0)
#define CLK_RST_CONTROLLER_CLK_ENB_V_CLR (0x444)
#define CLK_RST_CONTROLLER_CLK_ENB_W_CLR (0x44C)
/* RST_*_INDEX */
#define CLK_RST_CONTROLLER_RST_I2C1_INDEX (0x0C)
#define CLK_RST_CONTROLLER_RST_I2C2_INDEX (0x16)
#define CLK_RST_CONTROLLER_RST_I2C3_INDEX (0x03)
#define CLK_RST_CONTROLLER_RST_I2C4_INDEX (0x07)
#define CLK_RST_CONTROLLER_RST_I2C5_INDEX (0x0F)
#define CLK_RST_CONTROLLER_RST_I2C6_INDEX (0x06)
#define CLK_RST_CONTROLLER_RST_PWM_INDEX (0x11)
#define CLK_RST_CONTROLLER_RST_UARTA_INDEX (0x06)
#define CLK_RST_CONTROLLER_RST_UARTB_INDEX (0x07)
#define CLK_RST_CONTROLLER_RST_UARTC_INDEX (0x17)
#define CLK_RST_CONTROLLER_RST_ACTMON_INDEX (0x17)
/* CLK_ENB_*_INDEX */
#define CLK_RST_CONTROLLER_CLK_ENB_I2C1_INDEX (0x0C)
#define CLK_RST_CONTROLLER_CLK_ENB_I2C2_INDEX (0x16)
#define CLK_RST_CONTROLLER_CLK_ENB_I2C3_INDEX (0x03)
#define CLK_RST_CONTROLLER_CLK_ENB_I2C4_INDEX (0x07)
#define CLK_RST_CONTROLLER_CLK_ENB_I2C5_INDEX (0x0F)
#define CLK_RST_CONTROLLER_CLK_ENB_I2C6_INDEX (0x06)
#define CLK_RST_CONTROLLER_CLK_ENB_PWM_INDEX (0x11)
#define CLK_RST_CONTROLLER_CLK_ENB_UARTA_INDEX (0x06)
#define CLK_RST_CONTROLLER_CLK_ENB_UARTB_INDEX (0x07)
#define CLK_RST_CONTROLLER_CLK_ENB_UARTC_INDEX (0x17)
#define CLK_RST_CONTROLLER_CLK_ENB_ACTMON_INDEX (0x17)
#define CLK_RST_CONTROLLER_CLK_ENB_DVFS_INDEX (0x1B)
#define CLK_RST_CONTROLLER_CLK_ENB_TZRAM_INDEX (0x1E)
#define CLK_RST_CONTROLLER_CLK_ENB_CACHE2_INDEX (0x1F)
#define CLK_RST_CONTROLLER_CLK_ENB_CRAM2_INDEX (0x18)
#define CLK_RST_CONTROLLER_CLK_ENB_SE_INDEX (0x1F)
#define CLK_RST_CONTROLLER_CLK_ENB_CSITE_INDEX (0x09)
#define CLK_RST_CONTROLLER_CLK_ENB_HOST1X_INDEX (0x1C)
#define CLK_RST_CONTROLLER_CLK_ENB_TSEC_INDEX (0x13)
#define CLK_RST_CONTROLLER_CLK_ENB_SOR0_INDEX (0x16)
#define CLK_RST_CONTROLLER_CLK_ENB_SOR1_INDEX (0x17)
#define CLK_RST_CONTROLLER_CLK_ENB_SOR_SAFE_INDEX (0x1E)
#define CLK_RST_CONTROLLER_CLK_ENB_KFUSE_INDEX (0x08)
/* RST_CPUG_CMPLX_* */
#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET (0x450)
#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR (0x454)
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_ARC_CLK_OVR_ON, 19, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_TSEC_CLK_OVR_ON, 20, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_TSECB_CLK_OVR_ON, 21, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_ISPB_CLK_OVR_ON, 22, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_TZRAM_CLK_OVR_ON, 23, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_QSPI_CLK_OVR_ON, 24, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_A9AVP_CLK_OVR_ON, 26, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_MPCORE_MSELECT_CLK_OVR_ON, 27, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_SDMMC1_LEGACY_TMCLK_OVR_ON, 28, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_SDMMC2_LEGACY_TMCLK_OVR_ON, 29, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_SDMMC3_LEGACY_TMCLK_OVR_ON, 30, OFF, ON);
DEFINE_CLK_RST_REG_BIT_ENUM(LVL2_CLK_GATE_OVRD_SDMMC4_LEGACY_TMCLK_OVR_ON, 31, OFF, ON);
DEFINE_CLK_RST_REG(CLK_SOURCE_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG(CLK_SOURCE_CLK_SOURCE, 29, 3);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_I2C1_I2C1_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG(CLK_SOURCE_I2C1_I2C1_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_I2C5_I2C5_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG(CLK_SOURCE_I2C5_I2C5_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SDMMC1_SDMMC1_CLK_SRC, 29, PLLP_OUT0, PLLA_OUT, PLLC_OUT0, PLLC4_OUT2, PLLM_OUT0, PLLE_OUT0, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SDMMC2_SDMMC2_CLK_SRC, 29, PLLP_OUT0, PLLC4_OUT2_LJ, PLLC4_OUT0_LJ, PLLC4_OUT2, PLLC4_OUT1, PLLC4_OUT1_LJ, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SDMMC4_SDMMC4_CLK_SRC, 29, PLLP_OUT0, PLLC4_OUT2_LJ, PLLC4_OUT0_LJ, PLLC4_OUT2, PLLC4_OUT1, PLLC4_OUT1_LJ, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SDMMC3_SDMMC3_CLK_SRC, 29, PLLP_OUT0, PLLA_OUT, PLLC_OUT0, PLLC4_OUT2, PLLC4_OUT1, PLLE_OUT0, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SDMMCX_SDMMCX_CLK_SRC, 29, PLLP_OUT0, _RSVD1_, _RSVD2_, PLLC4_OUT2, _RSVD4_, _RSVD5_, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SDMMC24_SDMMC24_CLK_SRC, 29, PLLP_OUT0, PLLC4_OUT2_LJ, PLLC4_OUT0_LJ, PLLC4_OUT2, PLLC4_OUT1, PLLC4_OUT1_LJ, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG(CLK_SOURCE_SDMMC1_SDMMC1_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG(CLK_SOURCE_SDMMC2_SDMMC2_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG(CLK_SOURCE_SDMMC4_SDMMC4_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG(CLK_SOURCE_SDMMC3_SDMMC3_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_UARTA_UARTA_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_UARTB_UARTB_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_UARTC_UARTC_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_VI_VI_CLK_SRC, 29, RESERVED0, PLLC2_OUT0, PLLC_OUT, PLLC3_OUT0, PLLP_OUT0, CLK_M, PLLA1_OUT0, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_HOST1X_HOST1X_CLK_SRC, 29, PLLC4_OUT1, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT2, PLLP_OUT0, CLK_M, PLLA_OUT0, PLLC4_OUT0);
DEFINE_CLK_RST_REG(CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_EMC_EMC_2X_CLK_SRC, 29, PLLM_OUT0, PLLC_OUT0, PLLP_OUT0, CLK_M, PLLM_UD, PLLMB_UD, PLLMB_OUT0, PLLP_UD);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_NVENC_NVENC_CLK_SRC, 29, RESERVED0, PLLC2_OUT0, PLLC_OUT0, PLLC3_OUT0, PLLP_OUT0, RESERVED5, PLLA1_OUT0, CLK_M);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_CSITE_CSITE_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC3_OUT0, PLLREFE_OUT1, PLLA1_OUT0, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_TSEC_TSEC_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC3_OUT0, RESERVED4, PLLA1_OUT0, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SE_SE_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC3_OUT0, RSVD4, PLLA1_OUT0, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_SOURCE_SE_CLK_LOCK, 8, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_SOURCE_SOR1_SOR1_CLK_SEL0, 14, MUX, SOR1_BRICK_OUTPUT);
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_SOURCE_SOR1_SOR1_CLK_SEL1, 15, SAFE_CLOCK, SOR1_CLOCK_SWITCH);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_SOR1_SOR1_CLK_SRC, 29, PLLP_OUT0, RESERVED1, PLLD_OUT0, RESERVED3, RESERVED4, PLLD2_OUT0, CLK_M, RESERVED7);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_MSELECT_MSELECT_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT2, PLLC4_OUT1, CLK_S, CLK_M, PLLC4_OUT0);
DEFINE_CLK_RST_REG(CLK_SOURCE_MSELECT_MSELECT_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_ACTMON_ACTMON_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, CLK_S, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG(CLK_SOURCE_DSIA_LP_DSIA_LP_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_DSIA_LP_DSIA_LP_CLK_SRC, 29, PLLP_OUT0, RSVD1, PLLC_OUT0, PLLC4_OUT0, PLLC4_OUT1, PLLC4_OUT2, CLK_M, RSVD7);
DEFINE_CLK_RST_REG(CLK_SOURCE_DVFS_REF_DVFS_REF_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_DVFS_REF_DVFS_REF_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG(CLK_SOURCE_DVFS_SOC_DVFS_SOC_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_DVFS_SOC_DVFS_SOC_CLK_SRC, 29, PLLP_OUT0, PLLC2_OUT0, PLLC_OUT0, PLLC4_OUT0, RESERVED4, PLLC4_OUT1, CLK_M, PLLC4_OUT2);
DEFINE_CLK_RST_REG(CLK_SOURCE_UART_FST_MIPI_CAL_UART_FST_MIPI_CAL_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_UART_FST_MIPI_CAL_UART_FST_MIPI_CAL_CLK_SRC, 29, PLLP_OUT3, PLLC_OUT0, PLLC2_OUT0_2, RSVD3, PLLC2_OUT0_4, RSVD5, CLK_M, RSVD7);
DEFINE_CLK_RST_REG(CLK_SOURCE_LEGACY_TM_CLK_DIVISOR, 0, 8);
DEFINE_CLK_RST_REG_THREE_BIT_ENUM(CLK_SOURCE_LEGACY_TM_CLK_SRC, 29, PLLP_OUT3, PLLC_OUT0, PLLC2_OUT0, CLK_M, PLLP_OUT0, PLLC4_OUT0, PLLC4_OUT1, PLLC4_OUT2);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_DEV_L_SET_SET_COP_RST, 1, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_DEV_L_CLR_CLR_COP_RST, 1, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CPURESET0, 0, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CPURESET1, 1, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CPURESET2, 2, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CPURESET3, 3, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CORERESET0, 16, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CORERESET1, 17, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CORERESET2, 18, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_CORERESET3, 19, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_L2RESET, 24, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_NONCPURESET, 29, DISABLE, ENABLE);
DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_PRESETDBG, 30, DISABLE, ENABLE);
/* TODO: Actually include all devices. */
#define CLK_RST_FOREACH_DEVICE(HANDLER) \
HANDLER(L, CPU, 0, 0) \
HANDLER(L, RTC, 0, 4) \
HANDLER(L, TMR, 0, 5) \
HANDLER(L, GPIO, 0, 8) \
HANDLER(L, SDMMC2, 0, 9) \
HANDLER(L, SDMMC1, 0, 14) \
HANDLER(L, SDMMC4, 0, 15) \
HANDLER(L, USBD, 0, 22) \
HANDLER(L, DISP1, 0, 27) \
HANDLER(L, HOST1X, 0, 28) \
HANDLER(L, CACHE2, 0, 31) \
HANDLER(H, MEM, 1, 0) \
HANDLER(H, AHBDMA, 1, 1) \
HANDLER(H, APBDMA, 1, 2) \
HANDLER(H, PMC, 1, 6) \
HANDLER(H, FUSE, 1, 7) \
HANDLER(H, KFUSE, 1, 8) \
HANDLER(H, I2C5, 1, 15) \
HANDLER(H, DSI, 1, 16) \
HANDLER(H, MIPI_CAL, 1, 24) \
HANDLER(H, EMC, 1, 25) \
HANDLER(H, USB2, 1, 26) \
HANDLER(U, SDMMC3, 2, 5) \
HANDLER(U, CSITE, 2, 9) \
HANDLER(U, IRAMA, 2, 20) \
HANDLER(U, IRAMB, 2, 21) \
HANDLER(U, IRAMC, 2, 22) \
HANDLER(U, IRAMD, 2, 23) \
HANDLER(U, CRAM2, 2, 24) \
HANDLER(V, CPUG, 3, 0) \
HANDLER(V, MSELECT, 3, 3) \
HANDLER(V, AHUB, 3, 10) \
HANDLER(V, APB2APE, 3, 11) \
HANDLER(V, SPDIF_DOUBLER, 3, 22) \
HANDLER(V, ACTMON, 3, 23) \
HANDLER(V, TZRAM, 3, 30) \
HANDLER(V, SE, 3, 31) \
HANDLER(W, PCIERX0, 4, 2) \
HANDLER(W, PCIERX1, 4, 3) \
HANDLER(W, PCIERX2, 4, 4) \
HANDLER(W, PCIERX3, 4, 5) \
HANDLER(W, PCIERX4, 4, 6) \
HANDLER(W, PCIERX5, 4, 7) \
HANDLER(W, DSIA_LP, 4, 19) \
HANDLER(W, ENTROPY, 4, 21) \
HANDLER(W, DVFS, 4, 27) \
HANDLER(W, MC1, 4, 30) \
HANDLER(X, MC_CAPA, 5, 7) \
HANDLER(X, MC_CBPA, 5, 8) \
HANDLER(X, MC_CPU, 5, 9) \
HANDLER(X, MC_BBC, 5, 10) \
HANDLER(X, EMC_DLL, 5, 14) \
HANDLER(X, UART_FST_MIPI_CAL, 5, 17) \
HANDLER(X, VIC, 5, 18) \
HANDLER(X, GPU, 5, 24) \
HANDLER(X, DBGAPB, 5, 25) \
HANDLER(X, PLLG_REF, 5, 29) \
HANDLER(Y, LEGACY_TM, 6, 1) \
HANDLER(Y, APE, 6, 6) \
HANDLER(Y, MC_CCPA, 6, 8) \
HANDLER(Y, MC_CDPA, 6, 9) \
HANDLER(Y, PLLP_OUT_CPU, 6, 31)
#define CLK_RST_DEFINE_SET_CLR_REG(REGISTER, DEVICE, REGISTER_INDEX, DEVICE_INDEX) \
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_ENB_##REGISTER##_SET_SET_CLK_ENB_##DEVICE, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_ENB_##REGISTER##_CLR_CLR_CLK_ENB_##DEVICE, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_OUT_ENB_##REGISTER##_CLK_ENB_##DEVICE, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(CLK_ENB_##REGISTER##_CLK_ENB_##DEVICE, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(RST_DEV_##REGISTER##_SET_SET_##DEVICE##_RST, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(RST_DEV_##REGISTER##_CLR_CLR_##DEVICE##_RST, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(RST_DEV_##REGISTER##_##DEVICE##_RST, DEVICE_INDEX, DISABLE, ENABLE); \
DEFINE_CLK_RST_REG_BIT_ENUM(RST_DEVICES_##REGISTER##_SWR_##DEVICE##_RST, DEVICE_INDEX, DISABLE, ENABLE);
CLK_RST_FOREACH_DEVICE(CLK_RST_DEFINE_SET_CLR_REG)
#undef CLK_RST_DEFINE_SET_CLR_REG
| 30,223
|
C++
|
.h
| 418
| 70.406699
| 348
| 0.68157
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,120
|
tegra_apb_misc.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_apb_misc.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define APB_MISC_PP_CONFIG_CTL (0x024)
#define APB_MISC_PP_PINMUX_GLOBAL_0 (0x040)
#define APB_MISC_GP_ASDBGREG (0x810)
#define APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL (0xA98)
#define APB_MISC_GP_EMMC2_PAD_CFGPADCTRL (0xA9C)
#define APB_MISC_GP_SDMMC2_PAD_CFGPADCTRL (0xA9C)
#define APB_MISC_GP_EMMC4_PAD_CFGPADCTRL (0xAB4)
#define APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL (0xABC)
/* Mariko only */
#define APB_MISC_GP_DSI_PAD_CONTROL (0xAC0)
#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 (0xc00)
#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 (0xc00)
#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 (0xc04)
#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0 (0xc08)
#define APB_MISC_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (APB_MISC, NAME)
#define APB_MISC_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (APB_MISC, NAME, VALUE)
#define APB_MISC_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (APB_MISC, NAME, ENUM)
#define APB_MISC_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(APB_MISC, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_APB_MISC_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (APB_MISC, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_APB_MISC_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (APB_MISC, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_APB_MISC_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (APB_MISC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_APB_MISC_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(APB_MISC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_APB_MISC_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (APB_MISC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_APB_MISC_REG_BIT_ENUM(PP_CONFIG_CTL_JTAG, 6, DISABLE, ENABLE);
DEFINE_APB_MISC_REG_BIT_ENUM(PP_CONFIG_CTL_TBE, 7, DISABLE, ENABLE);
DEFINE_APB_MISC_REG(GP_ASDBGREG_CFG2TMC_RAM_SVOP_PDP, 24, 2);
DEFINE_APB_MISC_REG (GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_PAD_CAL_DRVDN, 12, 7);
DEFINE_APB_MISC_REG (GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_PAD_CAL_DRVUP, 20, 7);
DEFINE_APB_MISC_REG (GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_CLK_CFG_CAL_DRVDN_SLWR, 28, 2);
DEFINE_APB_MISC_REG (GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_CLK_CFG_CAL_DRVDN_SLWF, 30, 2);
DEFINE_APB_MISC_REG_BIT_ENUM(GP_EMMC2_PAD_CFGPADCTRL_CFG2TMC_EMMC2_PAD_E_SCH, 0, DISABLE, ENABLE);
DEFINE_APB_MISC_REG (GP_EMMC2_PAD_CFGPADCTRL_CFG2TMC_EMMC2_PAD_DRVDN_COMP, 2, 6);
DEFINE_APB_MISC_REG (GP_EMMC2_PAD_CFGPADCTRL_CFG2TMC_EMMC2_PAD_DRVUP_COMP, 8, 6);
DEFINE_APB_MISC_REG (GP_EMMC2_PAD_CFGPADCTRL_MISC2PMC_EMMC2_ALL_PARK, 14, 13);
DEFINE_APB_MISC_REG (GP_SDMMC2_PAD_CFGPADCTRL_CFG2TMC_SDMMC2_PAD_CAL_DRVDN, 12, 7);
DEFINE_APB_MISC_REG (GP_SDMMC2_PAD_CFGPADCTRL_CFG2TMC_SDMMC2_PAD_CAL_DRVUP, 20, 7);
DEFINE_APB_MISC_REG_BIT_ENUM(GP_EMMC4_PAD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_E_SCH, 0, DISABLE, ENABLE);
DEFINE_APB_MISC_REG (GP_EMMC4_PAD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_DRVDN_COMP, 2, 6);
DEFINE_APB_MISC_REG (GP_EMMC4_PAD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_DRVUP_COMP, 8, 6);
DEFINE_APB_MISC_REG (GP_EMMC4_PAD_CFGPADCTRL_MISC2PMC_EMMC4_ALL_PARK, 14, 13);
DEFINE_APB_MISC_REG(GP_EMMC4_PAD_PUPD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_CMD_PUPD_PULLU, 1, 1);
DEFINE_APB_MISC_REG(GP_EMMC4_PAD_PUPD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_CLK_PUPD_PULLD, 2, 1);
DEFINE_APB_MISC_REG(GP_EMMC4_PAD_PUPD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_DQS_PUPD_PULLD, 22, 1);
#define DEFINE_SLAVE_SECURITY_REG(RINDEX, INDEX, NAME) DEFINE_APB_MISC_REG_BIT_ENUM(SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG##RINDEX##_##NAME##_SECURITY_EN, INDEX, DISABLE, ENABLE)
DEFINE_SLAVE_SECURITY_REG(0, 29, STM);
DEFINE_SLAVE_SECURITY_REG(0, 24, CEC);
DEFINE_SLAVE_SECURITY_REG(0, 23, ATOMICS);
DEFINE_SLAVE_SECURITY_REG(0, 22, LA);
DEFINE_SLAVE_SECURITY_REG(0, 21, HDA);
DEFINE_SLAVE_SECURITY_REG(0, 20, SATA);
DEFINE_SLAVE_SECURITY_REG(0, 16, KFUSE);
DEFINE_SLAVE_SECURITY_REG(0, 15, FUSE);
DEFINE_SLAVE_SECURITY_REG(0, 14, SE);
DEFINE_SLAVE_SECURITY_REG(0, 13, PMC);
DEFINE_SLAVE_SECURITY_REG(0, 11, RTC);
DEFINE_SLAVE_SECURITY_REG(0, 10, CSITE);
DEFINE_SLAVE_SECURITY_REG(0, 9, QSPI);
DEFINE_SLAVE_SECURITY_REG(0, 8, PWM);
DEFINE_SLAVE_SECURITY_REG(0, 6, DTV);
DEFINE_SLAVE_SECURITY_REG(0, 4, APE);
DEFINE_SLAVE_SECURITY_REG(0, 3, PINMUX_AUX);
DEFINE_SLAVE_SECURITY_REG(0, 2, SATA_AUX);
DEFINE_SLAVE_SECURITY_REG(0, 1, MISC_REGS);
DEFINE_SLAVE_SECURITY_REG(1, 31, I2C6);
DEFINE_SLAVE_SECURITY_REG(1, 30, DVC);
DEFINE_SLAVE_SECURITY_REG(1, 29, I2C4);
DEFINE_SLAVE_SECURITY_REG(1, 28, I2C3);
DEFINE_SLAVE_SECURITY_REG(1, 27, I2C2);
DEFINE_SLAVE_SECURITY_REG(1, 26, I2C1);
DEFINE_SLAVE_SECURITY_REG(1, 25, SPI6);
DEFINE_SLAVE_SECURITY_REG(1, 24, SPI5);
DEFINE_SLAVE_SECURITY_REG(1, 23, SPI4);
DEFINE_SLAVE_SECURITY_REG(1, 22, SPI3);
DEFINE_SLAVE_SECURITY_REG(1, 21, SPI2);
DEFINE_SLAVE_SECURITY_REG(1, 20, SPI1);
DEFINE_SLAVE_SECURITY_REG(1, 15, UART_D);
DEFINE_SLAVE_SECURITY_REG(1, 14, UART_C);
DEFINE_SLAVE_SECURITY_REG(1, 13, UART_B);
DEFINE_SLAVE_SECURITY_REG(1, 12, UART_A);
DEFINE_SLAVE_SECURITY_REG(1, 11, EMCB);
DEFINE_SLAVE_SECURITY_REG(1, 10, MCB);
DEFINE_SLAVE_SECURITY_REG(1, 9, EMC1);
DEFINE_SLAVE_SECURITY_REG(1, 8, MC1);
DEFINE_SLAVE_SECURITY_REG(1, 5, EMC0);
DEFINE_SLAVE_SECURITY_REG(1, 4, MC0);
DEFINE_SLAVE_SECURITY_REG(2, 21, FEK);
DEFINE_SLAVE_SECURITY_REG(2, 20, PKA1);
DEFINE_SLAVE_SECURITY_REG(2, 19, SE2);
DEFINE_SLAVE_SECURITY_REG(2, 16, DVFS);
DEFINE_SLAVE_SECURITY_REG(2, 15, MIPI_CAL);
DEFINE_SLAVE_SECURITY_REG(2, 14, XUSB_PADCTL);
DEFINE_SLAVE_SECURITY_REG(2, 13, XUSB_DEV);
DEFINE_SLAVE_SECURITY_REG(2, 12, XUSB_HOST);
DEFINE_SLAVE_SECURITY_REG(2, 11, APB2JTAG);
DEFINE_SLAVE_SECURITY_REG(2, 10, SOC_THERM);
DEFINE_SLAVE_SECURITY_REG(2, 9, DP2);
DEFINE_SLAVE_SECURITY_REG(2, 8, DDS);
DEFINE_SLAVE_SECURITY_REG(2, 7, MIPIBIF);
DEFINE_SLAVE_SECURITY_REG(2, 3, SDMMC4);
DEFINE_SLAVE_SECURITY_REG(2, 2, SDMMC3);
DEFINE_SLAVE_SECURITY_REG(2, 1, SDMMC2);
DEFINE_SLAVE_SECURITY_REG(2, 0, SDMMC1);
#undef DEFINE_SLAVE_SECURITY_REG
#define SLAVE_SECURITY_REG_BITS_ENUM(RINDEX, NAME, ENUM) APB_MISC_REG_BITS_ENUM(SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG##RINDEX##_##NAME##_SECURITY_EN, ENUM)
| 8,056
|
C++
|
.h
| 126
| 62.634921
| 339
| 0.681002
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,121
|
tegra_avp_cache.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_avp_cache.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define AVP_CACHE_ADDR(n) (0x50040000 + n)
#define AVP_CACHE_CONFIG (0x000)
#define AVP_CACHE_LOCK (0x004)
#define AVP_CACHE_SIZE (0x00C)
#define AVP_CACHE_LFSR (0x010)
#define AVP_CACHE_TAG_STATUS (0x014)
#define AVP_CACHE_CLKEN_OVERRIDE (0x018)
#define AVP_CACHE_MAINT_0 (0x020)
#define AVP_CACHE_MAINT_1 (0x024)
#define AVP_CACHE_MAINT_2 (0x028)
#define AVP_CACHE_INT_MASK (0x040)
#define AVP_CACHE_INT_CLEAR (0x044)
#define AVP_CACHE_INT_RAW_EVENT (0x048)
#define AVP_CACHE_INT_STATUS (0x04C)
#define AVP_CACHE_RB_CFG (0x080)
#define AVP_CACHE_WB_CFG (0x084)
#define AVP_CACHE_MMU_FALLBACK_ENTRY (0x0A0)
#define AVP_CACHE_MMU_SHADOW_COPY_MASK_0 (0x0A4)
#define AVP_CACHE_MMU_CFG (0x0AC)
#define AVP_CACHE_MMU_CMD (0x0B0)
#define AVP_CACHE_MMU_ABORT_STAT (0x0B4)
#define AVP_CACHE_MMU_ABORT_ADDR (0x0B8)
#define AVP_CACHE_MMU_ACTIVE_ENTRIES (0x0BC)
#define AVP_CACHE_MMU_SHADOW_ENTRY_0_MIN_ADDR (0x400)
#define AVP_CACHE_MMU_SHADOW_ENTRY_0_MAX_ADDR (0x404)
#define AVP_CACHE_MMU_SHADOW_ENTRY_0_CFG (0x408)
#define AVP_CACHE_MMU_SHADOW_ENTRY_1_MIN_ADDR (0x410)
#define AVP_CACHE_MMU_SHADOW_ENTRY_1_MAX_ADDR (0x414)
#define AVP_CACHE_MMU_SHADOW_ENTRY_1_CFG (0x418)
#define AVP_CACHE_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (AVP_CACHE, NAME)
#define AVP_CACHE_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (AVP_CACHE, NAME, VALUE)
#define AVP_CACHE_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (AVP_CACHE, NAME, ENUM)
#define AVP_CACHE_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(AVP_CACHE, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_AVP_CACHE_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (AVP_CACHE, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_AVP_CACHE_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (AVP_CACHE, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_AVP_CACHE_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (AVP_CACHE, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_AVP_CACHE_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(AVP_CACHE, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_AVP_CACHE_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (AVP_CACHE, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_AVP_CACHE_REG_BIT_ENUM(CONFIG_ENABLE_CACHE, 0, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(CONFIG_FORCE_WRITE_THROUGH, 3, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_TWO_BIT_ENUM(CONFIG_MMU_TAG_MODE, 8, PARALLEL, TAG_FIRST, MMU_FIRST, RSVD3);
DEFINE_AVP_CACHE_REG_BIT_ENUM(CONFIG_DISABLE_WB, 10, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(CONFIG_DISABLE_RB, 11, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(CONFIG_TAG_CHECK_ABORT_ON_ERROR, 14, FALSE, TRUE);
DEFINE_AVP_CACHE_REG(MAINT_2_OPCODE, 0, 8);
DEFINE_AVP_CACHE_REG(MAINT_2_WAY_BITMAP, 8, 4);
enum AVP_CACHE_MAINT_OPCODE : u32 {
AVP_CACHE_MAINT_OPCODE_NOP = 0,
AVP_CACHE_MAINT_OPCODE_CLEAN_PHY = 1,
AVP_CACHE_MAINT_OPCODE_INVALID_PHY = 2,
AVP_CACHE_MAINT_OPCODE_CLEAN_INVALID_PHY = 3,
AVP_CACHE_MAINT_OPCODE_CLEAN_LINE = 9,
AVP_CACHE_MAINT_OPCODE_INVALID_LINE = 10,
AVP_CACHE_MAINT_OPCODE_CLEAN_INVALID_LINE = 11,
AVP_CACHE_MAINT_OPCODE_CLEAN_WAY = 17,
AVP_CACHE_MAINT_OPCODE_INVALID_WAY = 18,
AVP_CACHE_MAINT_OPCODE_CLEAN_INVALID_WAY = 19,
};
DEFINE_AVP_CACHE_REG_BIT_ENUM(INT_CLEAR_MAINTENANCE_DONE, 0, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(INT_RAW_EVENT_MAINTENANCE_DONE, 0, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(INT_STATUS_MAINTENANCE_DONE, 0, FALSE, TRUE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_FALLBACK_ENTRY_CACHED, 0, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_FALLBACK_ENTRY_EXE_ENA, 1, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_FALLBACK_ENTRY_RD_ENA, 2, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_FALLBACK_ENTRY_WR_ENA, 3, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_CFG_BLOCK_MAIN_ENTRY_WR, 0, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_CFG_SEQ_ENA, 1, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_CFG_TLB_ENA, 2, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_CFG_SEQ_CHECK_ALL_ENTRIES, 3, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_CFG_ABORT_MODE, 4, STORE_FIRST, STORE_LAST);
DEFINE_AVP_CACHE_REG_BIT_ENUM(MMU_CFG_CLR_ABORT, 5, NOP, CLEAN);
DEFINE_AVP_CACHE_REG_TWO_BIT_ENUM(MMU_CMD_CMD, 0, NOP, INIT, COPY_SHADOW, RSVD3);
DEFINE_AVP_CACHE_REG_BIT_ENUM(SHADOW_ENTRY_CFG_CACHED, 0, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(SHADOW_ENTRY_CFG_EXE_ENA, 1, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(SHADOW_ENTRY_CFG_RD_ENA, 2, DISABLE, ENABLE);
DEFINE_AVP_CACHE_REG_BIT_ENUM(SHADOW_ENTRY_CFG_WR_ENA, 3, DISABLE, ENABLE);
| 6,647
|
C++
|
.h
| 98
| 66.081633
| 341
| 0.649158
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,122
|
tegra_pmc.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_pmc.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define APBDEV_PMC_CNTRL (0x000)
#define APBDEV_PMC_WAKE_MASK (0x00C)
#define APBDEV_PMC_WAKE_LVL (0x010)
#define APBDEV_PMC_WAKE_STATUS (0x014)
#define APBDEV_PMC_DPD_PADS_ORIDE (0x01C)
#define APBDEV_PMC_DPD_SAMPLE (0x020)
#define APBDEV_PMC_DPD_ENABLE (0x024)
#define APBDEV_PMC_CLAMP_STATUS (0x02C)
#define APBDEV_PMC_PWRGATE_TOGGLE (0x030)
#define APBDEV_PMC_REMOVE_CLAMPING_CMD (0x034)
#define APBDEV_PMC_PWRGATE_STATUS (0x038)
#define APBDEV_PMC_PWRGOOD_TIMER (0x03C)
#define APBDEV_PMC_BLINK_TIMER (0x040)
#define APBDEV_PMC_NO_IOPOWER (0x044)
#define APBDEV_PMC_PWR_DET (0x048)
#define APBDEV_PMC_AUTO_WAKE_LVL_MASK (0x0DC)
#define APBDEV_PMC_WAKE_DELAY (0x0E0)
#define APBDEV_PMC_PWR_DET_VAL (0x0E4)
#define APBDEV_PMC_DDR_PWR (0x0E8)
#define APBDEV_PMC_CRYPTO_OP (0x0F4)
#define APBDEV_PMC_WAKE2_MASK (0x160)
#define APBDEV_PMC_WAKE2_LVL (0x164)
#define APBDEV_PMC_WAKE2_STATUS (0x168)
#define APBDEV_PMC_AUTO_WAKE2_LVL_MASK (0x170)
#define APBDEV_PMC_OSC_EDPD_OVER (0x1A4)
#define APBDEV_PMC_CLK_OUT_CNTRL (0x1A8)
#define APBDEV_PMC_RST_STATUS (0x1B4)
#define APBDEV_PMC_IO_DPD_REQ (0x1B8)
#define APBDEV_PMC_IO_DPD_STATUS (0x1BC)
#define APBDEV_PMC_IO_DPD2_REQ (0x1C0)
#define APBDEV_PMC_IO_DPD2_STATUS (0x1C4)
#define APBDEV_PMC_SEL_DPD_TIM (0x1C8)
#define APBDEV_PMC_VDDP_SEL (0x1CC)
#define APBDEV_PMC_DDR_CFG (0x1D0)
#define APBDEV_PMC_TSC_MULT (0x2B4)
#define APBDEV_PMC_STICKY_BITS (0x2C0)
#define APBDEV_PMC_WEAK_BIAS (0x2C8)
#define APBDEV_PMC_REG_SHORT (0x2CC)
#define APBDEV_PMC_GPU_RG_CNTRL (0x2D4)
#define APBDEV_PMC_CNTRL2 (0x440)
#define APBDEV_PMC_FUSE_CTRL (0x450)
#define APBDEV_PMC_IO_DPD3_REQ (0x45C)
#define APBDEV_PMC_IO_DPD3_STATUS (0x460)
#define APBDEV_PMC_IO_DPD4_REQ (0x464)
#define APBDEV_PMC_IO_DPD4_STATUS (0x468)
#define APBDEV_PMC_SET_SW_CLAMP (0x47C)
#define APBDEV_PMC_WAKE_DEBOUNCE_EN (0x4D8)
#define APBDEV_PMC_DDR_CNTRL (0x4E4)
#define APBDEV_PMC_SEC_DISABLE (0x004)
#define APBDEV_PMC_SEC_DISABLE2 (0x2C4)
#define APBDEV_PMC_SEC_DISABLE3 (0x2D8)
#define APBDEV_PMC_SEC_DISABLE4 (0x5B0)
#define APBDEV_PMC_SEC_DISABLE5 (0x5B4)
#define APBDEV_PMC_SEC_DISABLE6 (0x5B8)
#define APBDEV_PMC_SEC_DISABLE7 (0x5BC)
#define APBDEV_PMC_SEC_DISABLE8 (0x5C0)
/* Mariko. */
#define APBDEV_PMC_TZRAM_PWR_CNTRL (0xBE8)
#define APBDEV_PMC_TZRAM_SEC_DISABLE (0xBEC)
#define APBDEV_PMC_TZRAM_NON_SEC_DISABLE (0xBF0)
#define APBDEV_PMC_SCRATCH0 (0x050)
#define APBDEV_PMC_SCRATCH1 (0x054)
#define APBDEV_PMC_SCRATCH2 (0x058)
#define APBDEV_PMC_SCRATCH3 (0x05C)
#define APBDEV_PMC_SCRATCH4 (0x060)
#define APBDEV_PMC_SCRATCH5 (0x064)
#define APBDEV_PMC_SCRATCH6 (0x068)
#define APBDEV_PMC_SCRATCH7 (0x06C)
#define APBDEV_PMC_SCRATCH8 (0x070)
#define APBDEV_PMC_SCRATCH9 (0x074)
#define APBDEV_PMC_SCRATCH10 (0x078)
#define APBDEV_PMC_SCRATCH11 (0x07C)
#define APBDEV_PMC_SCRATCH12 (0x080)
#define APBDEV_PMC_SCRATCH13 (0x084)
#define APBDEV_PMC_SCRATCH14 (0x088)
#define APBDEV_PMC_SCRATCH15 (0x08C)
#define APBDEV_PMC_SCRATCH16 (0x090)
#define APBDEV_PMC_SCRATCH17 (0x094)
#define APBDEV_PMC_SCRATCH18 (0x098)
#define APBDEV_PMC_SCRATCH19 (0x09C)
#define APBDEV_PMC_SCRATCH20 (0x0A0)
#define APBDEV_PMC_SCRATCH21 (0x0A4)
#define APBDEV_PMC_SCRATCH22 (0x0A8)
#define APBDEV_PMC_SCRATCH23 (0x0AC)
#define APBDEV_PMC_SCRATCH24 (0x0FC)
#define APBDEV_PMC_SCRATCH25 (0x100)
#define APBDEV_PMC_SCRATCH26 (0x104)
#define APBDEV_PMC_SCRATCH27 (0x108)
#define APBDEV_PMC_SCRATCH28 (0x10C)
#define APBDEV_PMC_SCRATCH29 (0x110)
#define APBDEV_PMC_SCRATCH30 (0x114)
#define APBDEV_PMC_SCRATCH31 (0x118)
#define APBDEV_PMC_SCRATCH32 (0x11C)
#define APBDEV_PMC_SCRATCH33 (0x120)
#define APBDEV_PMC_SCRATCH34 (0x124)
#define APBDEV_PMC_SCRATCH35 (0x128)
#define APBDEV_PMC_SCRATCH36 (0x12C)
#define APBDEV_PMC_SCRATCH37 (0x130)
#define APBDEV_PMC_SCRATCH38 (0x134)
#define APBDEV_PMC_SCRATCH39 (0x138)
#define APBDEV_PMC_SCRATCH40 (0x13C)
#define APBDEV_PMC_SCRATCH41 (0x140)
#define APBDEV_PMC_SCRATCH42 (0x144)
#define APBDEV_PMC_SCRATCH43 (0x22C)
#define APBDEV_PMC_SCRATCH44 (0x230)
#define APBDEV_PMC_SCRATCH45 (0x234)
#define APBDEV_PMC_SCRATCH46 (0x238)
#define APBDEV_PMC_SCRATCH47 (0x23C)
#define APBDEV_PMC_SCRATCH48 (0x240)
#define APBDEV_PMC_SCRATCH49 (0x244)
#define APBDEV_PMC_SCRATCH50 (0x248)
#define APBDEV_PMC_SCRATCH51 (0x24C)
#define APBDEV_PMC_SCRATCH52 (0x250)
#define APBDEV_PMC_SCRATCH53 (0x254)
#define APBDEV_PMC_SCRATCH54 (0x258)
#define APBDEV_PMC_SCRATCH55 (0x25C)
#define APBDEV_PMC_SCRATCH56 (0x600)
#define APBDEV_PMC_SCRATCH57 (0x604)
#define APBDEV_PMC_SCRATCH58 (0x608)
#define APBDEV_PMC_SCRATCH59 (0x60C)
#define APBDEV_PMC_SCRATCH60 (0x610)
#define APBDEV_PMC_SCRATCH61 (0x614)
#define APBDEV_PMC_SCRATCH62 (0x618)
#define APBDEV_PMC_SCRATCH63 (0x61C)
#define APBDEV_PMC_SCRATCH64 (0x620)
#define APBDEV_PMC_SCRATCH65 (0x624)
#define APBDEV_PMC_SCRATCH66 (0x628)
#define APBDEV_PMC_SCRATCH67 (0x62C)
#define APBDEV_PMC_SCRATCH68 (0x630)
#define APBDEV_PMC_SCRATCH69 (0x634)
#define APBDEV_PMC_SCRATCH70 (0x638)
#define APBDEV_PMC_SCRATCH71 (0x63C)
#define APBDEV_PMC_SCRATCH72 (0x640)
#define APBDEV_PMC_SCRATCH73 (0x644)
#define APBDEV_PMC_SCRATCH74 (0x648)
#define APBDEV_PMC_SCRATCH75 (0x64C)
#define APBDEV_PMC_SCRATCH76 (0x650)
#define APBDEV_PMC_SCRATCH77 (0x654)
#define APBDEV_PMC_SCRATCH78 (0x658)
#define APBDEV_PMC_SCRATCH79 (0x65C)
#define APBDEV_PMC_SCRATCH80 (0x660)
#define APBDEV_PMC_SCRATCH81 (0x664)
#define APBDEV_PMC_SCRATCH82 (0x668)
#define APBDEV_PMC_SCRATCH83 (0x66C)
#define APBDEV_PMC_SCRATCH84 (0x670)
#define APBDEV_PMC_SCRATCH85 (0x674)
#define APBDEV_PMC_SCRATCH86 (0x678)
#define APBDEV_PMC_SCRATCH87 (0x67C)
#define APBDEV_PMC_SCRATCH88 (0x680)
#define APBDEV_PMC_SCRATCH89 (0x684)
#define APBDEV_PMC_SCRATCH90 (0x688)
#define APBDEV_PMC_SCRATCH91 (0x68C)
#define APBDEV_PMC_SCRATCH92 (0x690)
#define APBDEV_PMC_SCRATCH93 (0x694)
#define APBDEV_PMC_SCRATCH94 (0x698)
#define APBDEV_PMC_SCRATCH95 (0x69C)
#define APBDEV_PMC_SCRATCH96 (0x6A0)
#define APBDEV_PMC_SCRATCH97 (0x6A4)
#define APBDEV_PMC_SCRATCH98 (0x6A8)
#define APBDEV_PMC_SCRATCH99 (0x6AC)
#define APBDEV_PMC_SCRATCH100 (0x6B0)
#define APBDEV_PMC_SCRATCH101 (0x6B4)
#define APBDEV_PMC_SCRATCH102 (0x6B8)
#define APBDEV_PMC_SCRATCH103 (0x6BC)
#define APBDEV_PMC_SCRATCH104 (0x6C0)
#define APBDEV_PMC_SCRATCH105 (0x6C4)
#define APBDEV_PMC_SCRATCH106 (0x6C8)
#define APBDEV_PMC_SCRATCH107 (0x6CC)
#define APBDEV_PMC_SCRATCH108 (0x6D0)
#define APBDEV_PMC_SCRATCH109 (0x6D4)
#define APBDEV_PMC_SCRATCH110 (0x6D8)
#define APBDEV_PMC_SCRATCH111 (0x6DC)
#define APBDEV_PMC_SCRATCH112 (0x6E0)
#define APBDEV_PMC_SCRATCH113 (0x6E4)
#define APBDEV_PMC_SCRATCH114 (0x6E8)
#define APBDEV_PMC_SCRATCH115 (0x6EC)
#define APBDEV_PMC_SCRATCH116 (0x6F0)
#define APBDEV_PMC_SCRATCH117 (0x6F4)
#define APBDEV_PMC_SCRATCH118 (0x6F8)
#define APBDEV_PMC_SCRATCH119 (0x6FC)
#define APBDEV_PMC_SCRATCH120 (0x700)
#define APBDEV_PMC_SCRATCH121 (0x704)
#define APBDEV_PMC_SCRATCH122 (0x708)
#define APBDEV_PMC_SCRATCH123 (0x70C)
#define APBDEV_PMC_SCRATCH124 (0x710)
#define APBDEV_PMC_SCRATCH125 (0x714)
#define APBDEV_PMC_SCRATCH126 (0x718)
#define APBDEV_PMC_SCRATCH127 (0x71C)
#define APBDEV_PMC_SCRATCH128 (0x720)
#define APBDEV_PMC_SCRATCH129 (0x724)
#define APBDEV_PMC_SCRATCH130 (0x728)
#define APBDEV_PMC_SCRATCH131 (0x72C)
#define APBDEV_PMC_SCRATCH132 (0x730)
#define APBDEV_PMC_SCRATCH133 (0x734)
#define APBDEV_PMC_SCRATCH134 (0x738)
#define APBDEV_PMC_SCRATCH135 (0x73C)
#define APBDEV_PMC_SCRATCH136 (0x740)
#define APBDEV_PMC_SCRATCH137 (0x744)
#define APBDEV_PMC_SCRATCH138 (0x748)
#define APBDEV_PMC_SCRATCH139 (0x74C)
#define APBDEV_PMC_SCRATCH140 (0x750)
#define APBDEV_PMC_SCRATCH141 (0x754)
#define APBDEV_PMC_SCRATCH142 (0x758)
#define APBDEV_PMC_SCRATCH143 (0x75C)
#define APBDEV_PMC_SCRATCH144 (0x760)
#define APBDEV_PMC_SCRATCH145 (0x764)
#define APBDEV_PMC_SCRATCH146 (0x768)
#define APBDEV_PMC_SCRATCH147 (0x76C)
#define APBDEV_PMC_SCRATCH148 (0x770)
#define APBDEV_PMC_SCRATCH149 (0x774)
#define APBDEV_PMC_SCRATCH150 (0x778)
#define APBDEV_PMC_SCRATCH151 (0x77C)
#define APBDEV_PMC_SCRATCH152 (0x780)
#define APBDEV_PMC_SCRATCH153 (0x784)
#define APBDEV_PMC_SCRATCH154 (0x788)
#define APBDEV_PMC_SCRATCH155 (0x78C)
#define APBDEV_PMC_SCRATCH156 (0x790)
#define APBDEV_PMC_SCRATCH157 (0x794)
#define APBDEV_PMC_SCRATCH158 (0x798)
#define APBDEV_PMC_SCRATCH159 (0x79C)
#define APBDEV_PMC_SCRATCH160 (0x7A0)
#define APBDEV_PMC_SCRATCH161 (0x7A4)
#define APBDEV_PMC_SCRATCH162 (0x7A8)
#define APBDEV_PMC_SCRATCH163 (0x7AC)
#define APBDEV_PMC_SCRATCH164 (0x7B0)
#define APBDEV_PMC_SCRATCH165 (0x7B4)
#define APBDEV_PMC_SCRATCH166 (0x7B8)
#define APBDEV_PMC_SCRATCH167 (0x7BC)
#define APBDEV_PMC_SCRATCH168 (0x7C0)
#define APBDEV_PMC_SCRATCH169 (0x7C4)
#define APBDEV_PMC_SCRATCH170 (0x7C8)
#define APBDEV_PMC_SCRATCH171 (0x7CC)
#define APBDEV_PMC_SCRATCH172 (0x7D0)
#define APBDEV_PMC_SCRATCH173 (0x7D4)
#define APBDEV_PMC_SCRATCH174 (0x7D8)
#define APBDEV_PMC_SCRATCH175 (0x7DC)
#define APBDEV_PMC_SCRATCH176 (0x7E0)
#define APBDEV_PMC_SCRATCH177 (0x7E4)
#define APBDEV_PMC_SCRATCH178 (0x7E8)
#define APBDEV_PMC_SCRATCH179 (0x7EC)
#define APBDEV_PMC_SCRATCH180 (0x7F0)
#define APBDEV_PMC_SCRATCH181 (0x7F4)
#define APBDEV_PMC_SCRATCH182 (0x7F8)
#define APBDEV_PMC_SCRATCH183 (0x7FC)
#define APBDEV_PMC_SCRATCH184 (0x800)
#define APBDEV_PMC_SCRATCH185 (0x804)
#define APBDEV_PMC_SCRATCH186 (0x808)
#define APBDEV_PMC_SCRATCH187 (0x80C)
#define APBDEV_PMC_SCRATCH188 (0x810)
#define APBDEV_PMC_SCRATCH189 (0x814)
#define APBDEV_PMC_SCRATCH190 (0x818)
#define APBDEV_PMC_SCRATCH191 (0x81C)
#define APBDEV_PMC_SCRATCH192 (0x820)
#define APBDEV_PMC_SCRATCH193 (0x824)
#define APBDEV_PMC_SCRATCH194 (0x828)
#define APBDEV_PMC_SCRATCH195 (0x82C)
#define APBDEV_PMC_SCRATCH196 (0x830)
#define APBDEV_PMC_SCRATCH197 (0x834)
#define APBDEV_PMC_SCRATCH198 (0x838)
#define APBDEV_PMC_SCRATCH199 (0x83C)
#define APBDEV_PMC_SCRATCH200 (0x840)
#define APBDEV_PMC_SCRATCH201 (0x844)
#define APBDEV_PMC_SCRATCH202 (0x848)
#define APBDEV_PMC_SCRATCH203 (0x84C)
#define APBDEV_PMC_SCRATCH204 (0x850)
#define APBDEV_PMC_SCRATCH205 (0x854)
#define APBDEV_PMC_SCRATCH206 (0x858)
#define APBDEV_PMC_SCRATCH207 (0x85C)
#define APBDEV_PMC_SCRATCH208 (0x860)
#define APBDEV_PMC_SCRATCH209 (0x864)
#define APBDEV_PMC_SCRATCH210 (0x868)
#define APBDEV_PMC_SCRATCH211 (0x86C)
#define APBDEV_PMC_SCRATCH212 (0x870)
#define APBDEV_PMC_SCRATCH213 (0x874)
#define APBDEV_PMC_SCRATCH214 (0x878)
#define APBDEV_PMC_SCRATCH215 (0x87C)
#define APBDEV_PMC_SCRATCH216 (0x880)
#define APBDEV_PMC_SCRATCH217 (0x884)
#define APBDEV_PMC_SCRATCH218 (0x888)
#define APBDEV_PMC_SCRATCH219 (0x88C)
#define APBDEV_PMC_SCRATCH220 (0x890)
#define APBDEV_PMC_SCRATCH221 (0x894)
#define APBDEV_PMC_SCRATCH222 (0x898)
#define APBDEV_PMC_SCRATCH223 (0x89C)
#define APBDEV_PMC_SCRATCH224 (0x8A0)
#define APBDEV_PMC_SCRATCH225 (0x8A4)
#define APBDEV_PMC_SCRATCH226 (0x8A8)
#define APBDEV_PMC_SCRATCH227 (0x8AC)
#define APBDEV_PMC_SCRATCH228 (0x8B0)
#define APBDEV_PMC_SCRATCH229 (0x8B4)
#define APBDEV_PMC_SCRATCH230 (0x8B8)
#define APBDEV_PMC_SCRATCH231 (0x8BC)
#define APBDEV_PMC_SCRATCH232 (0x8C0)
#define APBDEV_PMC_SCRATCH233 (0x8C4)
#define APBDEV_PMC_SCRATCH234 (0x8C8)
#define APBDEV_PMC_SCRATCH235 (0x8CC)
#define APBDEV_PMC_SCRATCH236 (0x8D0)
#define APBDEV_PMC_SCRATCH237 (0x8D4)
#define APBDEV_PMC_SCRATCH238 (0x8D8)
#define APBDEV_PMC_SCRATCH239 (0x8DC)
#define APBDEV_PMC_SCRATCH240 (0x8E0)
#define APBDEV_PMC_SCRATCH241 (0x8E4)
#define APBDEV_PMC_SCRATCH242 (0x8E8)
#define APBDEV_PMC_SCRATCH243 (0x8EC)
#define APBDEV_PMC_SCRATCH244 (0x8F0)
#define APBDEV_PMC_SCRATCH245 (0x8F4)
#define APBDEV_PMC_SCRATCH246 (0x8F8)
#define APBDEV_PMC_SCRATCH247 (0x8FC)
#define APBDEV_PMC_SCRATCH248 (0x900)
#define APBDEV_PMC_SCRATCH249 (0x904)
#define APBDEV_PMC_SCRATCH250 (0x908)
#define APBDEV_PMC_SCRATCH251 (0x90C)
#define APBDEV_PMC_SCRATCH252 (0x910)
#define APBDEV_PMC_SCRATCH253 (0x914)
#define APBDEV_PMC_SCRATCH254 (0x918)
#define APBDEV_PMC_SCRATCH255 (0x91C)
#define APBDEV_PMC_SCRATCH256 (0x920)
#define APBDEV_PMC_SCRATCH257 (0x924)
#define APBDEV_PMC_SCRATCH258 (0x928)
#define APBDEV_PMC_SCRATCH259 (0x92C)
#define APBDEV_PMC_SCRATCH260 (0x930)
#define APBDEV_PMC_SCRATCH261 (0x934)
#define APBDEV_PMC_SCRATCH262 (0x938)
#define APBDEV_PMC_SCRATCH263 (0x93C)
#define APBDEV_PMC_SCRATCH264 (0x940)
#define APBDEV_PMC_SCRATCH265 (0x944)
#define APBDEV_PMC_SCRATCH266 (0x948)
#define APBDEV_PMC_SCRATCH267 (0x94C)
#define APBDEV_PMC_SCRATCH268 (0x950)
#define APBDEV_PMC_SCRATCH269 (0x954)
#define APBDEV_PMC_SCRATCH270 (0x958)
#define APBDEV_PMC_SCRATCH271 (0x95C)
#define APBDEV_PMC_SCRATCH272 (0x960)
#define APBDEV_PMC_SCRATCH273 (0x964)
#define APBDEV_PMC_SCRATCH274 (0x968)
#define APBDEV_PMC_SCRATCH275 (0x96C)
#define APBDEV_PMC_SCRATCH276 (0x970)
#define APBDEV_PMC_SCRATCH277 (0x974)
#define APBDEV_PMC_SCRATCH278 (0x978)
#define APBDEV_PMC_SCRATCH279 (0x97C)
#define APBDEV_PMC_SCRATCH280 (0x980)
#define APBDEV_PMC_SCRATCH281 (0x984)
#define APBDEV_PMC_SCRATCH282 (0x988)
#define APBDEV_PMC_SCRATCH283 (0x98C)
#define APBDEV_PMC_SCRATCH284 (0x990)
#define APBDEV_PMC_SCRATCH285 (0x994)
#define APBDEV_PMC_SCRATCH286 (0x998)
#define APBDEV_PMC_SCRATCH287 (0x99C)
#define APBDEV_PMC_SCRATCH288 (0x9A0)
#define APBDEV_PMC_SCRATCH289 (0x9A4)
#define APBDEV_PMC_SCRATCH290 (0x9A8)
#define APBDEV_PMC_SCRATCH291 (0x9AC)
#define APBDEV_PMC_SCRATCH292 (0x9B0)
#define APBDEV_PMC_SCRATCH293 (0x9B4)
#define APBDEV_PMC_SCRATCH294 (0x9B8)
#define APBDEV_PMC_SCRATCH295 (0x9BC)
#define APBDEV_PMC_SCRATCH296 (0x9C0)
#define APBDEV_PMC_SCRATCH297 (0x9C4)
#define APBDEV_PMC_SCRATCH298 (0x9C8)
#define APBDEV_PMC_SCRATCH299 (0x9CC)
#define APBDEV_PMC_SECURE_SCRATCH0 (0x0B0)
#define APBDEV_PMC_SECURE_SCRATCH1 (0x0B4)
#define APBDEV_PMC_SECURE_SCRATCH2 (0x0B8)
#define APBDEV_PMC_SECURE_SCRATCH3 (0x0BC)
#define APBDEV_PMC_SECURE_SCRATCH4 (0x0C0)
#define APBDEV_PMC_SECURE_SCRATCH5 (0x0C4)
#define APBDEV_PMC_SECURE_SCRATCH6 (0x224)
#define APBDEV_PMC_SECURE_SCRATCH7 (0x228)
#define APBDEV_PMC_SECURE_SCRATCH8 (0x300)
#define APBDEV_PMC_SECURE_SCRATCH9 (0x304)
#define APBDEV_PMC_SECURE_SCRATCH10 (0x308)
#define APBDEV_PMC_SECURE_SCRATCH11 (0x30C)
#define APBDEV_PMC_SECURE_SCRATCH12 (0x310)
#define APBDEV_PMC_SECURE_SCRATCH13 (0x314)
#define APBDEV_PMC_SECURE_SCRATCH14 (0x318)
#define APBDEV_PMC_SECURE_SCRATCH15 (0x31C)
#define APBDEV_PMC_SECURE_SCRATCH16 (0x320)
#define APBDEV_PMC_SECURE_SCRATCH17 (0x324)
#define APBDEV_PMC_SECURE_SCRATCH18 (0x328)
#define APBDEV_PMC_SECURE_SCRATCH19 (0x32C)
#define APBDEV_PMC_SECURE_SCRATCH20 (0x330)
#define APBDEV_PMC_SECURE_SCRATCH21 (0x334)
#define APBDEV_PMC_SECURE_SCRATCH22 (0x338)
#define APBDEV_PMC_SECURE_SCRATCH23 (0x33C)
#define APBDEV_PMC_SECURE_SCRATCH24 (0x340)
#define APBDEV_PMC_SECURE_SCRATCH25 (0x344)
#define APBDEV_PMC_SECURE_SCRATCH26 (0x348)
#define APBDEV_PMC_SECURE_SCRATCH27 (0x34C)
#define APBDEV_PMC_SECURE_SCRATCH28 (0x350)
#define APBDEV_PMC_SECURE_SCRATCH29 (0x354)
#define APBDEV_PMC_SECURE_SCRATCH30 (0x358)
#define APBDEV_PMC_SECURE_SCRATCH31 (0x35C)
#define APBDEV_PMC_SECURE_SCRATCH32 (0x360)
#define APBDEV_PMC_SECURE_SCRATCH33 (0x364)
#define APBDEV_PMC_SECURE_SCRATCH34 (0x368)
#define APBDEV_PMC_SECURE_SCRATCH35 (0x36C)
#define APBDEV_PMC_SECURE_SCRATCH36 (0x370)
#define APBDEV_PMC_SECURE_SCRATCH37 (0x374)
#define APBDEV_PMC_SECURE_SCRATCH38 (0x378)
#define APBDEV_PMC_SECURE_SCRATCH39 (0x37C)
#define APBDEV_PMC_SECURE_SCRATCH40 (0x380)
#define APBDEV_PMC_SECURE_SCRATCH41 (0x384)
#define APBDEV_PMC_SECURE_SCRATCH42 (0x388)
#define APBDEV_PMC_SECURE_SCRATCH43 (0x38C)
#define APBDEV_PMC_SECURE_SCRATCH44 (0x390)
#define APBDEV_PMC_SECURE_SCRATCH45 (0x394)
#define APBDEV_PMC_SECURE_SCRATCH46 (0x398)
#define APBDEV_PMC_SECURE_SCRATCH47 (0x39C)
#define APBDEV_PMC_SECURE_SCRATCH48 (0x3A0)
#define APBDEV_PMC_SECURE_SCRATCH49 (0x3A4)
#define APBDEV_PMC_SECURE_SCRATCH50 (0x3A8)
#define APBDEV_PMC_SECURE_SCRATCH51 (0x3AC)
#define APBDEV_PMC_SECURE_SCRATCH52 (0x3B0)
#define APBDEV_PMC_SECURE_SCRATCH53 (0x3B4)
#define APBDEV_PMC_SECURE_SCRATCH54 (0x3B8)
#define APBDEV_PMC_SECURE_SCRATCH55 (0x3BC)
#define APBDEV_PMC_SECURE_SCRATCH56 (0x3C0)
#define APBDEV_PMC_SECURE_SCRATCH57 (0x3C4)
#define APBDEV_PMC_SECURE_SCRATCH58 (0x3C8)
#define APBDEV_PMC_SECURE_SCRATCH59 (0x3CC)
#define APBDEV_PMC_SECURE_SCRATCH60 (0x3D0)
#define APBDEV_PMC_SECURE_SCRATCH61 (0x3D4)
#define APBDEV_PMC_SECURE_SCRATCH62 (0x3D8)
#define APBDEV_PMC_SECURE_SCRATCH63 (0x3DC)
#define APBDEV_PMC_SECURE_SCRATCH64 (0x3E0)
#define APBDEV_PMC_SECURE_SCRATCH65 (0x3E4)
#define APBDEV_PMC_SECURE_SCRATCH66 (0x3E8)
#define APBDEV_PMC_SECURE_SCRATCH67 (0x3EC)
#define APBDEV_PMC_SECURE_SCRATCH68 (0x3F0)
#define APBDEV_PMC_SECURE_SCRATCH69 (0x3F4)
#define APBDEV_PMC_SECURE_SCRATCH70 (0x3F8)
#define APBDEV_PMC_SECURE_SCRATCH71 (0x3FC)
#define APBDEV_PMC_SECURE_SCRATCH72 (0x400)
#define APBDEV_PMC_SECURE_SCRATCH73 (0x404)
#define APBDEV_PMC_SECURE_SCRATCH74 (0x408)
#define APBDEV_PMC_SECURE_SCRATCH75 (0x40C)
#define APBDEV_PMC_SECURE_SCRATCH76 (0x410)
#define APBDEV_PMC_SECURE_SCRATCH77 (0x414)
#define APBDEV_PMC_SECURE_SCRATCH78 (0x418)
#define APBDEV_PMC_SECURE_SCRATCH79 (0x41C)
#define APBDEV_PMC_SECURE_SCRATCH80 (0xA98)
#define APBDEV_PMC_SECURE_SCRATCH81 (0xA9C)
#define APBDEV_PMC_SECURE_SCRATCH82 (0xAA0)
#define APBDEV_PMC_SECURE_SCRATCH83 (0xAA4)
#define APBDEV_PMC_SECURE_SCRATCH84 (0xAA8)
#define APBDEV_PMC_SECURE_SCRATCH85 (0xAAC)
#define APBDEV_PMC_SECURE_SCRATCH86 (0xAB0)
#define APBDEV_PMC_SECURE_SCRATCH87 (0xAB4)
#define APBDEV_PMC_SECURE_SCRATCH88 (0xAB8)
#define APBDEV_PMC_SECURE_SCRATCH89 (0xABC)
#define APBDEV_PMC_SECURE_SCRATCH90 (0xAC0)
#define APBDEV_PMC_SECURE_SCRATCH91 (0xAC4)
#define APBDEV_PMC_SECURE_SCRATCH92 (0xAC8)
#define APBDEV_PMC_SECURE_SCRATCH93 (0xACC)
#define APBDEV_PMC_SECURE_SCRATCH94 (0xAD0)
#define APBDEV_PMC_SECURE_SCRATCH95 (0xAD4)
#define APBDEV_PMC_SECURE_SCRATCH96 (0xAD8)
#define APBDEV_PMC_SECURE_SCRATCH97 (0xADC)
#define APBDEV_PMC_SECURE_SCRATCH98 (0xAE0)
#define APBDEV_PMC_SECURE_SCRATCH99 (0xAE4)
#define APBDEV_PMC_SECURE_SCRATCH100 (0xAE8)
#define APBDEV_PMC_SECURE_SCRATCH101 (0xAEC)
#define APBDEV_PMC_SECURE_SCRATCH102 (0xAF0)
#define APBDEV_PMC_SECURE_SCRATCH103 (0xAF4)
#define APBDEV_PMC_SECURE_SCRATCH104 (0xAF8)
#define APBDEV_PMC_SECURE_SCRATCH105 (0xAFC)
#define APBDEV_PMC_SECURE_SCRATCH106 (0xB00)
#define APBDEV_PMC_SECURE_SCRATCH107 (0xB04)
#define APBDEV_PMC_SECURE_SCRATCH108 (0xB08)
#define APBDEV_PMC_SECURE_SCRATCH109 (0xB0C)
#define APBDEV_PMC_SECURE_SCRATCH110 (0xB10)
#define APBDEV_PMC_SECURE_SCRATCH111 (0xB14)
#define APBDEV_PMC_SECURE_SCRATCH112 (0xB18)
#define APBDEV_PMC_SECURE_SCRATCH113 (0xB1C)
#define APBDEV_PMC_SECURE_SCRATCH114 (0xB20)
#define APBDEV_PMC_SECURE_SCRATCH115 (0xB24)
#define APBDEV_PMC_SECURE_SCRATCH116 (0xB28)
#define APBDEV_PMC_SECURE_SCRATCH117 (0xB2C)
#define APBDEV_PMC_SECURE_SCRATCH118 (0xB30)
#define APBDEV_PMC_SECURE_SCRATCH119 (0xB34)
/* Mariko. */
#define APBDEV_PMC_SECURE_SCRATCH120 (0xB38)
#define APBDEV_PMC_SECURE_SCRATCH121 (0xB3C)
#define APBDEV_PMC_SECURE_SCRATCH122 (0xB40)
#define APBDEV_PMC_SECURE_SCRATCH123 (0xB44)
#define APBDEV_PMC_SECURE_SCRATCH124 (0xB68)
#define APBDEV_PMC_SECURE_SCRATCH125 (0xB6C)
#define APBDEV_PMC_SECURE_SCRATCH126 (0xB70)
#define APBDEV_PMC_SECURE_SCRATCH127 (0xB74)
#define APBDEV_PMC_SECURE_SCRATCH128 (0xB78)
#define APBDEV_PMC_SECURE_SCRATCH129 (0xB7C)
#define APBDEV_PMC_SECURE_SCRATCH130 (0xB80)
#define APBDEV_PMC_SECURE_SCRATCH131 (0xB84)
#define APBDEV_PMC_SECURE_SCRATCH132 (0xB88)
#define APBDEV_PMC_SECURE_SCRATCH133 (0xB8C)
#define APBDEV_PMC_SECURE_SCRATCH134 (0xB90)
#define APBDEV_PMC_SECURE_SCRATCH135 (0xB94)
#define APBDEV_PMC_SECURE_SCRATCH136 (0xB98)
#define APBDEV_PMC_SECURE_SCRATCH137 (0xB9C)
#define APBDEV_PMC_SECURE_SCRATCH138 (0xBA0)
#define APBDEV_PMC_SECURE_SCRATCH139 (0xBA4)
#define PMC_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (APBDEV_PMC, NAME)
#define PMC_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (APBDEV_PMC, NAME, VALUE)
#define PMC_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (APBDEV_PMC, NAME, ENUM)
#define PMC_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(APBDEV_PMC, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_PMC_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (APBDEV_PMC, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_PMC_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (APBDEV_PMC, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_PMC_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (APBDEV_PMC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_PMC_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(APBDEV_PMC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_PMC_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (APBDEV_PMC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_PMC_REG_BIT_ENUM(CNTRL_MAIN_RESET, 4, DISABLE, ENABLE)
DEFINE_PMC_REG_BIT_ENUM(DPD_SAMPLE_ON, 0, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(DPD_ENABLE_ON, 0, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(DPD_ENABLE_TSC_MULT_EN, 1, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_TOGGLE_START, 8, DISABLE, ENABLE);
DEFINE_PMC_REG(PWRGATE_TOGGLE_PARTID, 0, 5);
enum APBDEV_PMC_PWRGATE_TOGGLE_PARTID : u8 {
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_CRAIL = 0,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_VE = 2,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_PCX = 3,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_MPE = 6,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_SAX = 8,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_CE1 = 9,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_CE2 = 10,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_CE3 = 11,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_CE0 = 14,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_C0NC = 15,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_SOR = 17,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_DIS = 18,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_DISB = 19,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_XUSBA = 20,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_XUSBB = 21,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_XUSBC = 22,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_VIC = 23,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_IRAM = 24,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_NVDEC = 25,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_NVJPG = 26,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_AUD = 27,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_DFD = 28,
APBDEV_PMC_PWRGATE_TOGGLE_PARTID_VE2 = 29,
};
DEFINE_PMC_REG_BIT_ENUM(REMOVE_CLAMPING_COMMAND_CRAIL, 0, DISABLE, ENABLE);
enum APBDEV_PMC_PWRGATE_STATUS_STATUS {
APBDEV_PMC_PWRGATE_STATUS_STATUS_OFF = 0,
APBDEV_PMC_PWRGATE_STATUS_STATUS_ON = 1,
};
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_CRAIL, 0, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_VE, 2, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_PCX, 3, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_MPE, 6, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_SAX, 8, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_CE1, 9, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_CE2, 10, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_CE3, 11, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_CE0, 14, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_C0NC, 15, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_SOR, 17, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_DIS, 18, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_DISB, 19, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_XUSBA, 20, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_XUSBB, 21, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_XUSBC, 22, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_VIC, 23, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_IRAM, 24, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_NVDEC, 25, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_NVJPG, 26, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_AUD, 27, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_DFD, 28, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(PWRGATE_STATUS_VE2, 29, OFF, ON);
DEFINE_PMC_REG(PWRGATE_STATUS_CE123, 9, 3);
DEFINE_PMC_REG_BIT_ENUM(NO_IOPOWER_SDMMC1, 12, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(PWR_DET_SDMMC1, 12, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(PWR_DET_VAL_SDMMC1, 12, DISABLE, ENABLE);
DEFINE_PMC_REG(SET_SW_CLAMP_CRAIL, 0, 1);
DEFINE_PMC_REG_TWO_BIT_ENUM(IO_DPD_REQ_CODE, 30, IDLE, DPD_OFF, DPD_ON, RESERVED3);
DEFINE_PMC_REG_TWO_BIT_ENUM(IO_DPD2_REQ_CODE, 30, IDLE, DPD_OFF, DPD_ON, RESERVED3);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_CRAIL, 0, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_TE, 1, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_VE, 2, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_PCX, 3, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_VDE, 4, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_MPE, 6, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_HEG, 7, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_SAX, 8, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_CE1, 9, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_CE2, 10, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_CE3, 11, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_CELP, 12, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_CE0, 14, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_C0NC, 15, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_SOR, 17, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_C1NC, 16, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_DIS, 18, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_DISB, 19, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_XUSBA, 20, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_XUSBB, 21, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_XUSBC, 22, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_VIC, 23, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CLAMP_STATUS_IRAM, 24, DISABLE, ENABLE);
DEFINE_PMC_REG(OSC_EDPD_OVER_XOFS, 1, 6);
DEFINE_PMC_REG_BIT_ENUM(OSC_EDPD_OVER_OSC_CTRL_SELECT, 22, CAR, PMC);
DEFINE_PMC_REG(TSC_MULT_MULT_VAL, 0, 16);
DEFINE_PMC_REG_BIT_ENUM(STICKY_BITS_HDA_LPBK_DIS, 0, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(STICKY_BITS_JTAG_STS, 6, ENABLE, DISABLE);
DEFINE_PMC_REG_BIT_ENUM(CNTRL2_WAKE_DET_EN, 9, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(CNTRL2_HOLD_CKE_LOW_EN, 12, DISABLE, ENABLE);
DEFINE_PMC_REG_BIT_ENUM(SEC_DISABLE2_WRITE21, 26, OFF, ON);
DEFINE_PMC_REG(TZRAM_PWR_CNTRL_TZRAM_SD, 0, 1);
DEFINE_PMC_REG(TZRAM_PWR_CNTRL_TZRAM_SLCG_OVR, 1, 1);
DEFINE_PMC_REG_BIT_ENUM(TZRAM_SEC_DISABLE_SD_WRITE, 0, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(TZRAM_SEC_DISABLE_SD_READ, 1, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(TZRAM_NON_SEC_DISABLE_SD_WRITE, 0, OFF, ON);
DEFINE_PMC_REG_BIT_ENUM(TZRAM_NON_SEC_DISABLE_SD_READ, 1, OFF, ON);
| 33,151
|
C++
|
.h
| 635
| 50.979528
| 336
| 0.659299
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,123
|
tegra_evp.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_evp.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define EVP_CPU_RESET_VECTOR (0x100)
#define EVP_COP_RESET_VECTOR (0x200)
#define EVP_COP_UNDEF_VECTOR (0x204)
#define EVP_COP_SWI_VECTOR (0x208)
#define EVP_COP_PREFETCH_ABORT_VECTOR (0x20C)
#define EVP_COP_DATA_ABORT_VECTOR (0x210)
#define EVP_COP_RSVD_VECTOR (0x214)
#define EVP_COP_IRQ_VECTOR (0x218)
#define EVP_COP_FIQ_VECTOR (0x21C)
| 1,242
|
C++
|
.h
| 31
| 38.548387
| 76
| 0.721257
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,124
|
tegra_pinmux.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_pinmux.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define PINMUX_AUX_SDMMC1_CLK (0x3000)
#define PINMUX_AUX_SDMMC1_CMD (0x3004)
#define PINMUX_AUX_SDMMC1_DAT3 (0x3008)
#define PINMUX_AUX_SDMMC1_DAT2 (0x300C)
#define PINMUX_AUX_SDMMC1_DAT1 (0x3010)
#define PINMUX_AUX_SDMMC1_DAT0 (0x3014)
#define PINMUX_AUX_DMIC3_CLK (0x30B4)
#define PINMUX_AUX_GEN1_I2C_SCL (0x30BC)
#define PINMUX_AUX_GEN1_I2C_SDA (0x30C0)
#define PINMUX_AUX_PWR_I2C_SCL (0x30DC)
#define PINMUX_AUX_PWR_I2C_SDA (0x30E0)
#define PINMUX_AUX_UART1_TX (0x30E4)
#define PINMUX_AUX_UART1_RX (0x30E8)
#define PINMUX_AUX_UART1_RTS (0x30EC)
#define PINMUX_AUX_UART1_CTS (0x30F0)
#define PINMUX_AUX_UART2_TX (0x30F4)
#define PINMUX_AUX_UART2_RX (0x30F8)
#define PINMUX_AUX_UART2_RTS (0x30FC)
#define PINMUX_AUX_UART2_CTS (0x3100)
#define PINMUX_AUX_UART3_TX (0x3104)
#define PINMUX_AUX_UART3_RX (0x3108)
#define PINMUX_AUX_UART3_RTS (0x310C)
#define PINMUX_AUX_UART3_CTS (0x3110)
#define PINMUX_AUX_DVFS_PWM (0x3184)
#define PINMUX_AUX_NFC_EN (0x31D0)
#define PINMUX_AUX_NFC_INT (0x31D4)
#define PINMUX_AUX_CAM_FLASH_EN (0x31E8)
#define PINMUX_AUX_LCD_BL_PWM (0x31FC)
#define PINMUX_AUX_LCD_BL_EN (0x3200)
#define PINMUX_AUX_LCD_RST (0x3204)
#define PINMUX_AUX_GPIO_PA6 (0x3244)
#define PINMUX_AUX_GPIO_PE6 (0x3248)
#define PINMUX_AUX_GPIO_PH6 (0x3250)
#define PINMUX_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (PINMUX, NAME)
#define PINMUX_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (PINMUX, NAME, VALUE)
#define PINMUX_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (PINMUX, NAME, ENUM)
#define PINMUX_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(PINMUX, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_PINMUX_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (PINMUX, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_PINMUX_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (PINMUX, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_PINMUX_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (PINMUX, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_PINMUX_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(PINMUX, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_PINMUX_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (PINMUX, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_PUPD, 2, NONE, PULL_DOWN, PULL_UP, RSVD);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_TRISTATE, 4, PASSTHROUGH, TRISTATE);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_PARK, 5, NORMAL, PARKED);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_E_INPUT, 6, DISABLE, ENABLE);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_LOCK, 7, DISABLE, ENABLE);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_E_LPDR, 8, DISABLE, ENABLE);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_E_OD, 11, DISABLE, ENABLE);
DEFINE_PINMUX_REG_BIT_ENUM(AUX_E_SCHMT, 12, DISABLE, ENABLE);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_SDMMC1_CLK_PM, 0, SDMMC1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_SDMMC1_CMD_PM, 0, SDMMC1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_SDMMC1_DAT3_PM, 0, SDMMC1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_SDMMC1_DAT2_PM, 0, SDMMC1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_SDMMC1_DAT1_PM, 0, SDMMC1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_SDMMC1_DAT0_PM, 0, SDMMC1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_DMIC3_CLK_PM, 0, DMIC3, I2S5A, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_GEN1_I2C_PM, 0, I2C1, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_PWR_I2C_PM, 0, I2CPMU, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_UART1_PM, 0, UARTA, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_UART2_PM, 0, UARTB, I2S4A, RSVD2, UART);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_UART3_PM, 0, UARTC, SPI4, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_DVFS_PWM_PM, 0, RSVD0, CLDVFS, SPI3, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_LCD_BL_PWM_PM, 0, DISPLAYA, PWM0, SOR0, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_GPIO_PA6_PM, 0, SATA, RSVD1, RSVD2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_GPIO_PE6_PM, 0, RSVD0, I2S5A, PWM2, RSVD3);
DEFINE_PINMUX_REG_TWO_BIT_ENUM(AUX_GPIO_PH6_PM, 0, RSVD0, RSVD1, RSVD2, RSVD3);
| 5,976
|
C++
|
.h
| 89
| 65.808989
| 335
| 0.661386
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,125
|
tegra_timer.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_timer.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define TIMERUS_USEC_CFG (0x014)
#define TIMER_SHARED_TIMER_SECURE_CFG (0x1A4)
#define TIMER_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (TIMER, NAME)
#define TIMER_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (TIMER, NAME, VALUE)
#define TIMER_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (TIMER, NAME, ENUM)
#define TIMER_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(TIMER, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_TIMER_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (TIMER, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_TIMER_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (TIMER, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_TIMER_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (TIMER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_TIMER_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(TIMER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_TIMER_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (TIMER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_TIMER_REG(USEC_CFG_USEC_DIVISOR, 0, 8);
DEFINE_TIMER_REG(USEC_CFG_USEC_DIVIDEND, 8, 8);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR5, 5, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR6, 6, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR7, 7, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_TMR8, 8, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_WDT0, 12, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_WDT1, 13, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_WDT2, 14, DISABLE, ENABLE);
DEFINE_TIMER_REG_BIT_ENUM(SHARED_TIMER_SECURE_CFG_WDT3, 15, DISABLE, ENABLE);
| 3,439
|
C++
|
.h
| 43
| 78.534884
| 333
| 0.631967
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,126
|
tegra_ahb_arbc.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_ahb_arbc.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define AHB_ARBC(x) (0x6000c000 + x)
#define AHB_ARBITRATION_DISABLE (0x004)
#define AHB_ARBITRATION_PRIORITY_CTRL (0x008)
#define AHB_MASTER_SWID (0x018)
#define AHB_MASTER_SWID_1 (0x038)
#define AHB_GIZMO_TZRAM (0x054)
#define AHB_ARBITRATION_XBAR_CTRL (0x0E0)
#define AHB_AHB_SPARE_REG (0x110)
#define AHB_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (AHB_, NAME)
#define AHB_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (AHB_, NAME, VALUE)
#define AHB_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (AHB_, NAME, ENUM)
#define AHB_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(AHB_, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_AHB_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (AHB_, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_AHB_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (AHB_, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_AHB_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (AHB_, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_AHB_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(AHB_, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_AHB_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (AHB_, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_AHB_REG_BIT_ENUM(ARBITRATION_DISABLE_COP, 1, ENABLE, DISABLE);
DEFINE_AHB_REG_BIT_ENUM(ARBITRATION_DISABLE_AHBDMA, 5, ENABLE, DISABLE);
DEFINE_AHB_REG_BIT_ENUM(ARBITRATION_DISABLE_USB, 6, ENABLE, DISABLE);
DEFINE_AHB_REG_BIT_ENUM(ARBITRATION_DISABLE_USB2, 18, ENABLE, DISABLE);
DEFINE_AHB_REG_BIT_ENUM(ARBITRATION_XBAR_CTRL_MEM_INIT_DONE, 16, NOT_DONE, DONE);
DEFINE_AHB_REG(AHB_SPARE_REG_CSITE_PADMACRO3_TRIM_SEL, 0, 5);
DEFINE_AHB_REG_BIT_ENUM(AHB_SPARE_REG_OBS_OVERRIDE_EN, 5, DISABLE, ENABLE);
DEFINE_AHB_REG_BIT_ENUM(AHB_SPARE_REG_APB2JTAG_OVERRIDE_EN, 6, DISABLE, ENABLE);
DEFINE_AHB_REG(AHB_SPARE_REG_AHB_SPARE_REG, 12, 32-12);
| 3,618
|
C++
|
.h
| 48
| 73.9375
| 330
| 0.621386
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,127
|
tegra_i2s.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_i2s.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define I2S_REG(x) (0x702d1000 + x)
#define I2S0_I2S_CG (0x088)
#define I2S0_I2S_CTRL (0x0A0)
#define I2S1_I2S_CG (0x188)
#define I2S1_I2S_CTRL (0x1A0)
#define I2S2_I2S_CG (0x288)
#define I2S2_I2S_CTRL (0x2A0)
#define I2S3_I2S_CG (0x388)
#define I2S3_I2S_CTRL (0x3A0)
#define I2S4_I2S_CG (0x488)
#define I2S4_I2S_CTRL (0x4A0)
#define I2S_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (I2S, NAME)
#define I2S_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (I2S, NAME, VALUE)
#define I2S_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (I2S, NAME, ENUM)
#define I2S_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(I2S, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_I2S_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (I2S, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_I2S_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (I2S, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_I2S_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (I2S, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_I2S_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(I2S, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_I2S_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (I2S, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_I2S_REG_BIT_ENUM(I2S_CG_SLCG_ENABLE, 0, FALSE, TRUE);
DEFINE_I2S_REG_BIT_ENUM(I2S_CTRL_MASTER, 10, DISABLE, ENABLE);
| 3,057
|
C++
|
.h
| 44
| 68
| 329
| 0.607452
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,128
|
tegra_pwm.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_pwm.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define PWM_CONTROLLER_PWM_CHANNEL_OFFSET(channel) (0x10 * channel)
#define PWM_CONTROLLER_PWM_CSR (0x000)
#define PWM_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (PWM_CONTROLLER, NAME)
#define PWM_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (PWM_CONTROLLER, NAME, VALUE)
#define PWM_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (PWM_CONTROLLER, NAME, ENUM)
#define PWM_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(PWM_CONTROLLER, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_PWM_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (PWM_CONTROLLER, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_PWM_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (PWM_CONTROLLER, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_PWM_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (PWM_CONTROLLER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_PWM_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(PWM_CONTROLLER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_PWM_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (PWM_CONTROLLER, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_PWM_REG(PWM_CSR_PFM, 0, 13);
DEFINE_PWM_REG(PWM_CSR_PWM, 16, 15);
DEFINE_PWM_REG_BIT_ENUM(PWM_CSR_ENB, 31, DISABLE, ENABLE);
| 2,935
|
C++
|
.h
| 36
| 79.944444
| 340
| 0.61065
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,129
|
tegra_emc.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_emc.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define EMC_ADDRESS(x) (0x7001B000 + x)
#define EMC0_ADDRESS(x) (0x7001E000 + x)
#define EMC1_ADDRESS(x) (0x7001F000 + x)
#define EMC_INTSTATUS (0x000)
#define EMC_DBG (0x008)
#define EMC_CFG (0x00C)
#define EMC_ADR_CFG (0x010)
#define EMC_REFCTRL (0x020)
#define EMC_PIN (0x024)
#define EMC_TIMING_CONTROL (0x028)
#define EMC_RC (0x02C)
#define EMC_RFC (0x030)
#define EMC_RAS (0x034)
#define EMC_RP (0x038)
#define EMC_R2W (0x03C)
#define EMC_W2R (0x040)
#define EMC_R2P (0x044)
#define EMC_W2P (0x048)
#define EMC_RD_RCD (0x04C)
#define EMC_WR_RCD (0x050)
#define EMC_RRD (0x054)
#define EMC_REXT (0x058)
#define EMC_WDV (0x05C)
#define EMC_QUSE (0x060)
#define EMC_QRST (0x064)
#define EMC_QSAFE (0x068)
#define EMC_RDV (0x06C)
#define EMC_REFRESH (0x070)
#define EMC_BURST_REFRESH_NUM (0x074)
#define EMC_PDEX2WR (0x078)
#define EMC_PDEX2RD (0x07C)
#define EMC_PCHG2PDEN (0x080)
#define EMC_ACT2PDEN (0x084)
#define EMC_AR2PDEN (0x088)
#define EMC_RW2PDEN (0x08C)
#define EMC_TXSR (0x090)
#define EMC_TCKE (0x094)
#define EMC_TFAW (0x098)
#define EMC_TRPAB (0x09C)
#define EMC_TCLKSTABLE (0x0A0)
#define EMC_TCLKSTOP (0x0A4)
#define EMC_TREFBW (0x0A8)
#define EMC_TPPD (0x0AC)
#define EMC_ODT_WRITE (0x0B0)
#define EMC_PDEX2MRR (0x0B4)
#define EMC_WEXT (0x0B8)
#define EMC_TRTM (0x0BC)
#define EMC_RFC_SLR (0x0C0)
#define EMC_MRS_WAIT_CNT2 (0x0C4)
#define EMC_MRS_WAIT_CNT (0x0C8)
#define EMC_MRS (0x0CC)
#define EMC_EMRS (0x0D0)
#define EMC_REF (0x0D4)
#define EMC_NOP (0x0DC)
#define EMC_SELF_REF (0x0E0)
#define EMC_MRW (0x0E8)
#define EMC_MRR (0x0EC)
#define EMC_CMDQ (0x0F0)
#define EMC_MC2EMCQ (0x0F4)
#define EMC_TWTM (0x0F8)
#define EMC_TRATM (0x0FC)
#define EMC_FBIO_SPARE (0x100)
#define EMC_FBIO_CFG5 (0x104)
#define EMC_TWATM (0x108)
#define EMC_TR2REF (0x10C)
#define EMC_PMACRO_DATA_PI_CTRL (0x110)
#define EMC_PMACRO_CMD_PI_CTRL (0x114)
#define EMC_PDEX2CKE (0x118)
#define EMC_CKE2PDEN (0x11C)
#define EMC_CFG_RSV (0x120)
#define EMC_ACPD_CONTROL (0x124)
#define EMC_MPC (0x128)
#define EMC_EMRS2 (0x12C)
#define EMC_MRW2 (0x134)
#define EMC_MRW3 (0x138)
#define EMC_MRW3 (0x138)
#define EMC_MRW4 (0x13C)
#define EMC_CLKEN_OVERRIDE (0x140)
#define EMC_R2R (0x144)
#define EMC_W2W (0x148)
#define EMC_EINPUT (0x14C)
#define EMC_EINPUT_DURATION (0x150)
#define EMC_PUTERM_EXTRA (0x154)
#define EMC_TCKESR (0x158)
#define EMC_TPD (0x15C)
#define EMC_AUTO_CAL_CONFIG (0x2A4)
#define EMC_AUTO_CAL_INTERVAL (0x2A8)
#define EMC_REQ_CTRL (0x2B0)
#define EMC_EMC_STATUS (0x2B4)
#define EMC_CFG_2 (0x2B8)
#define EMC_CFG_DIG_DLL (0x2BC)
#define EMC_CFG_DIG_DLL_PERIOD (0x2C0)
#define EMC_DIG_DLL_STATUS (0x2C4)
#define EMC_CFG_DIG_DLL_1 (0x2C8)
#define EMC_RDV_MASK (0x2CC)
#define EMC_WDV_MASK (0x2D0)
#define EMC_RDV_EARLY_MASK (0x2D4)
#define EMC_RDV_EARLY (0x2D8)
#define EMC_AUTO_CAL_CONFIG8 (0x2DC)
#define EMC_ZCAL_INTERVAL (0x2E0)
#define EMC_ZCAL_WAIT_CNT (0x2E4)
#define EMC_ZCAL_MRW_CMD (0x2E8)
#define EMC_ZQ_CAL (0x2EC)
#define EMC_XM2COMPPADCTRL3 (0x2F4)
#define EMC_AUTO_CAL_VREF_SEL_0 (0x2F8)
#define EMC_AUTO_CAL_VREF_SEL_1 (0x300)
#define EMC_XM2COMPPADCTRL (0x30C)
#define EMC_FDPD_CTRL_DQ (0x310)
#define EMC_FDPD_CTRL_CMD (0x314)
#define EMC_PMACRO_CMD_BRICK_CTRL_FDPD (0x318)
#define EMC_PMACRO_DATA_BRICK_CTRL_FDPD (0x31C)
#define EMC_SCRATCH0 (0x324)
#define EMC_PMACRO_BRICK_CTRL_RFU1 (0x330)
#define EMC_PMACRO_BRICK_CTRL_RFU2 (0x334)
#define EMC_CMD_MAPPING_CMD0_0 (0x380)
#define EMC_CMD_MAPPING_CMD0_1 (0x384)
#define EMC_CMD_MAPPING_CMD0_2 (0x388)
#define EMC_CMD_MAPPING_CMD1_0 (0x38C)
#define EMC_CMD_MAPPING_CMD1_1 (0x390)
#define EMC_CMD_MAPPING_CMD1_2 (0x394)
#define EMC_CMD_MAPPING_CMD2_0 (0x398)
#define EMC_CMD_MAPPING_CMD2_1 (0x39C)
#define EMC_CMD_MAPPING_CMD2_2 (0x3A0)
#define EMC_CMD_MAPPING_CMD3_0 (0x3A4)
#define EMC_CMD_MAPPING_CMD3_1 (0x3A8)
#define EMC_CMD_MAPPING_CMD3_2 (0x3AC)
#define EMC_CMD_MAPPING_BYTE (0x3B0)
#define EMC_TR_TIMING_0 (0x3B4)
#define EMC_TR_CTRL_0 (0x3B8)
#define EMC_TR_CTRL_1 (0x3BC)
#define EMC_SWITCH_BACK_CTRL (0x3C0)
#define EMC_TR_RDV (0x3C4)
#define EMC_STALL_THEN_EXE_AFTER_CLKCHANGE (0x3CC)
#define EMC_SEL_DPD_CTRL (0x3D8)
#define EMC_PRE_REFRESH_REQ_CNT (0x3DC)
#define EMC_DYN_SELF_REF_CONTROL (0x3E0)
#define EMC_TXSRDLL (0x3E4)
#define EMC_CCFIFO_ADDR (0x3E8)
#define EMC_CCFIFO_DATA (0x3EC)
#define EMC_CCFIFO_STATUS (0x3F0)
#define EMC_TR_QPOP (0x3F4)
#define EMC_TR_RDV_MASK (0x3F8)
#define EMC_TR_QSAFE (0x3FC)
#define EMC_TR_QRST (0x400)
#define EMC_SWIZZLE_RANK0_BYTE0 (0x404)
#define EMC_SWIZZLE_RANK0_BYTE1 (0x408)
#define EMC_SWIZZLE_RANK0_BYTE2 (0x40C)
#define EMC_SWIZZLE_RANK0_BYTE3 (0x410)
#define EMC_SWIZZLE_RANK1_BYTE0 (0x418)
#define EMC_SWIZZLE_RANK1_BYTE1 (0x41C)
#define EMC_SWIZZLE_RANK1_BYTE2 (0x420)
#define EMC_SWIZZLE_RANK1_BYTE3 (0x424)
#define EMC_ISSUE_QRST (0x428)
#define EMC_AUTO_CAL_CONFIG9 (0x42C)
#define EMC_PMC_SCRATCH1 (0x440)
#define EMC_PMC_SCRATCH2 (0x444)
#define EMC_PMC_SCRATCH3 (0x448)
#define EMC_AUTO_CAL_CONFIG2 (0x458)
#define EMC_AUTO_CAL_CONFIG3 (0x45C)
#define EMC_TR_DVFS (0x460)
#define EMC_AUTO_CAL_CHANNEL (0x464)
#define EMC_IBDLY (0x468)
#define EMC_OBDLY (0x46C)
#define EMC_TXDSRVTTGEN (0x480)
#define EMC_WE_DURATION (0x48C)
#define EMC_WS_DURATION (0x490)
#define EMC_WEV (0x494)
#define EMC_WSV (0x498)
#define EMC_CFG_3 (0x49C)
#define EMC_MRW5 (0x4A0)
#define EMC_MRW6 (0x4A4)
#define EMC_MRW7 (0x4A8)
#define EMC_MRW8 (0x4AC)
#define EMC_MRW9 (0x4B0)
#define EMC_MRW10 (0x4B4)
#define EMC_MRW11 (0x4B8)
#define EMC_MRW12 (0x4BC)
#define EMC_MRW13 (0x4C0)
#define EMC_MRW14 (0x4C4)
#define EMC_MRW15 (0x4D0)
#define EMC_CFG_SYNC (0x4D4)
#define EMC_FDPD_CTRL_CMD_NO_RAMP (0x4D8)
#define EMC_WDV_CHK (0x4E0)
#define EMC_CFG_PIPE_2 (0x554)
#define EMC_CFG_PIPE_CLK (0x558)
#define EMC_CFG_PIPE_1 (0x55C)
#define EMC_CFG_PIPE (0x560)
#define EMC_QPOP (0x564)
#define EMC_QUSE_WIDTH (0x568)
#define EMC_PUTERM_WIDTH (0x56C)
#define EMC_AUTO_CAL_CONFIG7 (0x574)
#define EMC_XM2COMPPADCTRL2 (0x578)
#define EMC_REFCTRL2 (0x580)
#define EMC_FBIO_CFG7 (0x584)
#define EMC_DATA_BRLSHFT_0 (0x588)
#define EMC_DATA_BRLSHFT_1 (0x58C)
#define EMC_RFCPB (0x590)
#define EMC_DQS_BRLSHFT_0 (0x594)
#define EMC_DQS_BRLSHFT_1 (0x598)
#define EMC_CMD_BRLSHFT_0 (0x59C)
#define EMC_CMD_BRLSHFT_1 (0x5A0)
#define EMC_CMD_BRLSHFT_2 (0x5A4)
#define EMC_CMD_BRLSHFT_3 (0x5A8)
#define EMC_QUSE_BRLSHFT_0 (0x5AC)
#define EMC_AUTO_CAL_CONFIG4 (0x5B0)
#define EMC_AUTO_CAL_CONFIG5 (0x5B4)
#define EMC_QUSE_BRLSHFT_1 (0x5B8)
#define EMC_QUSE_BRLSHFT_2 (0x5BC)
#define EMC_CCDMW (0x5C0)
#define EMC_QUSE_BRLSHFT_3 (0x5C4)
#define EMC_FBIO_CFG8 (0x5C8)
#define EMC_AUTO_CAL_CONFIG6 (0x5CC)
/* Erista */
#define EMC_DLL_CFG_0 (0x5E4)
#define EMC_DLL_CFG_1 (0x5E8)
/* Mariko */
#define EMC_PMACRO_DLL_CFG_0 (0x5E4)
#define EMC_PMACRO_DLL_CFG_1 (0x5E8)
#define EMC_PMACRO_DLL_CFG_2 (0x5F8)
#define EMC_CONFIG_SAMPLE_DELAY (0x5F0)
#define EMC_CFG_UPDATE (0x5F4)
#define EMC_PMACRO_QUSE_DDLL_RANK0_0 (0x600)
#define EMC_PMACRO_QUSE_DDLL_RANK0_1 (0x604)
#define EMC_PMACRO_QUSE_DDLL_RANK0_2 (0x608)
#define EMC_PMACRO_QUSE_DDLL_RANK0_3 (0x60C)
#define EMC_PMACRO_QUSE_DDLL_RANK0_4 (0x610)
#define EMC_PMACRO_QUSE_DDLL_RANK0_5 (0x614)
#define EMC_PMACRO_QUSE_DDLL_RANK1_4 (0x630)
#define EMC_PMACRO_QUSE_DDLL_RANK1_5 (0x634)
#define EMC_PMACRO_QUSE_DDLL_RANK1_0 (0x620)
#define EMC_PMACRO_QUSE_DDLL_RANK1_1 (0x624)
#define EMC_PMACRO_QUSE_DDLL_RANK1_2 (0x628)
#define EMC_PMACRO_QUSE_DDLL_RANK1_3 (0x62C)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0 (0x640)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1 (0x644)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2 (0x648)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3 (0x64C)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4 (0x650)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5 (0x654)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0 (0x660)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1 (0x664)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2 (0x668)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3 (0x66C)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4 (0x670)
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5 (0x674)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0 (0x680)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1 (0x684)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2 (0x688)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3 (0x68C)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4 (0x690)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5 (0x694)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0 (0x6A0)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1 (0x6A4)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2 (0x6A8)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3 (0x6AC)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4 (0x6B0)
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5 (0x6B4)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0 (0x6C0)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1 (0x6C4)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2 (0x6C8)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3 (0x6CC)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0 (0x6E0)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1 (0x6E4)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2 (0x6E8)
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3 (0x6EC)
#define EMC_PMACRO_AUTOCAL_CFG_0 (0x700)
#define EMC_PMACRO_AUTOCAL_CFG_1 (0x704)
#define EMC_PMACRO_AUTOCAL_CFG_2 (0x708)
#define EMC_PMACRO_TX_PWRD_0 (0x720)
#define EMC_PMACRO_TX_PWRD_1 (0x724)
#define EMC_PMACRO_TX_PWRD_2 (0x728)
#define EMC_PMACRO_TX_PWRD_3 (0x72C)
#define EMC_PMACRO_TX_PWRD_4 (0x730)
#define EMC_PMACRO_TX_PWRD_5 (0x734)
#define EMC_PMACRO_TX_SEL_CLK_SRC_0 (0x740)
#define EMC_PMACRO_TX_SEL_CLK_SRC_1 (0x744)
#define EMC_PMACRO_TX_SEL_CLK_SRC_3 (0x74C)
#define EMC_PMACRO_TX_SEL_CLK_SRC_2 (0x748)
#define EMC_PMACRO_TX_SEL_CLK_SRC_4 (0x750)
#define EMC_PMACRO_TX_SEL_CLK_SRC_5 (0x754)
#define EMC_PMACRO_DDLL_BYPASS (0x760)
#define EMC_PMACRO_DDLL_PWRD_0 (0x770)
#define EMC_PMACRO_DDLL_PWRD_1 (0x774)
#define EMC_PMACRO_DDLL_PWRD_2 (0x778)
#define EMC_PMACRO_CMD_CTRL_0 (0x780)
#define EMC_PMACRO_CMD_CTRL_1 (0x784)
#define EMC_PMACRO_CMD_CTRL_2 (0x788)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0 (0x800)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1 (0x804)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2 (0x808)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_3 (0x80C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0 (0x810)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1 (0x814)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2 (0x818)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_3 (0x81C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0 (0x820)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1 (0x824)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2 (0x828)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_3 (0x82C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0 (0x830)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1 (0x834)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2 (0x838)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_3 (0x83C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0 (0x840)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1 (0x844)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2 (0x848)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_3 (0x84C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0 (0x850)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1 (0x854)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2 (0x858)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_3 (0x85C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0 (0x860)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1 (0x864)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2 (0x868)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_3 (0x86C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0 (0x870)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1 (0x874)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2 (0x878)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_3 (0x87C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0 (0x880)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1 (0x884)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2 (0x888)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_3 (0x88C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0 (0x890)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1 (0x894)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2 (0x898)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_3 (0x89C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0 (0x8A0)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1 (0x8A4)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2 (0x8A8)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_3 (0x8AC)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0 (0x8B0)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1 (0x8B4)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2 (0x8B8)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_3 (0x8BC)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0 (0x900)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1 (0x904)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2 (0x908)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_3 (0x90C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0 (0x910)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1 (0x914)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2 (0x918)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_3 (0x91C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0 (0x920)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1 (0x924)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2 (0x928)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_3 (0x92C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0 (0x930)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1 (0x934)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2 (0x938)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_3 (0x93C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0 (0x940)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1 (0x944)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2 (0x948)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_3 (0x94C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0 (0x950)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1 (0x954)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2 (0x958)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_3 (0x95C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0 (0x960)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1 (0x964)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2 (0x968)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_3 (0x96C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0 (0x970)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1 (0x974)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2 (0x978)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_3 (0x97C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_0 (0x980)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_1 (0x984)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_2 (0x988)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_3 (0x98C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_0 (0x990)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_1 (0x994)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_2 (0x998)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_3 (0x99C)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_0 (0x9A0)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_1 (0x9A4)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_2 (0x9A8)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_3 (0x9AC)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_0 (0x9B0)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_1 (0x9B4)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_2 (0x9B8)
#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_3 (0x9BC)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0 (0xA00)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1 (0xA04)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2 (0xA08)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0 (0xA10)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1 (0xA14)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2 (0xA18)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0 (0xA20)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1 (0xA24)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2 (0xA28)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0 (0xA30)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1 (0xA34)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2 (0xA38)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0 (0xA40)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1 (0xA44)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2 (0xA48)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0 (0xA50)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1 (0xA54)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2 (0xA58)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0 (0xA60)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1 (0xA64)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2 (0xA68)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0 (0xA70)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1 (0xA74)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2 (0xA78)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0 (0xB00)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1 (0xB04)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2 (0xB08)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0 (0xB10)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1 (0xB14)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2 (0xB18)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0 (0xB20)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1 (0xB24)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2 (0xB28)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0 (0xB30)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1 (0xB34)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2 (0xB38)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0 (0xB40)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1 (0xB44)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2 (0xB48)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0 (0xB50)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1 (0xB54)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2 (0xB58)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0 (0xB60)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1 (0xB64)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2 (0xB68)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0 (0xB70)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1 (0xB74)
#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2 (0xB78)
#define EMC_PMACRO_IB_VREF_DQ_0 (0xBE0)
#define EMC_PMACRO_IB_VREF_DQ_1 (0xBE4)
#define EMC_PMACRO_IB_VREF_DQS_0 (0xBF0)
#define EMC_PMACRO_IB_VREF_DQS_1 (0xBF4)
#define EMC_PMACRO_DDLL_LONG_CMD_0 (0xC00)
#define EMC_PMACRO_DDLL_LONG_CMD_1 (0xC04)
#define EMC_PMACRO_DDLL_LONG_CMD_2 (0xC08)
#define EMC_PMACRO_DDLL_LONG_CMD_3 (0xC0C)
#define EMC_PMACRO_DDLL_LONG_CMD_4 (0xC10)
#define EMC_PMACRO_DDLL_SHORT_CMD_0 (0xC20)
#define EMC_PMACRO_DDLL_SHORT_CMD_1 (0xC24)
#define EMC_PMACRO_DDLL_SHORT_CMD_2 (0xC28)
#define EMC_PMACRO_CFG_PM_GLOBAL_0 (0xC30)
#define EMC_PMACRO_VTTGEN_CTRL_0 (0xC34)
#define EMC_PMACRO_VTTGEN_CTRL_1 (0xC38)
#define EMC_PMACRO_BG_BIAS_CTRL_0 (0xC3C)
#define EMC_PMACRO_PAD_CFG_CTRL (0xC40)
#define EMC_PMACRO_ZCTRL (0xC44)
#define EMC_PMACRO_RX_TERM (0xC48)
#define EMC_PMACRO_CMD_TX_DRV (0xC4C)
#define EMC_PMACRO_CMD_PAD_RX_CTRL (0xC50)
#define EMC_PMACRO_DATA_PAD_RX_CTRL (0xC54)
#define EMC_PMACRO_CMD_RX_TERM_MODE (0xC58)
#define EMC_PMACRO_DATA_RX_TERM_MODE (0xC5C)
#define EMC_PMACRO_CMD_PAD_TX_CTRL (0xC60)
#define EMC_PMACRO_DATA_PAD_TX_CTRL (0xC64)
#define EMC_PMACRO_COMMON_PAD_TX_CTRL (0xC68)
#define EMC_PMACRO_DSR_VTTGEN_CTRL_0 (0xC6C)
#define EMC_PMACRO_DQ_TX_DRV (0xC70)
#define EMC_PMACRO_CA_TX_DRV (0xC74)
#define EMC_PMACRO_AUTOCAL_CFG_COMMON (0xC78)
#define EMC_PMACRO_BRICK_MAPPING_0 (0xC80)
#define EMC_PMACRO_BRICK_MAPPING_1 (0xC84)
#define EMC_PMACRO_BRICK_MAPPING_2 (0xC88)
#define EMC_PMACRO_DDLL_PERIODIC_OFFSET (0xCE8)
#define EMC_PMACRO_VTTGEN_CTRL_2 (0xCF0)
#define EMC_PMACRO_IB_RXRT (0xCF4)
#define EMC_PMACRO_TRAINING_CTRL_0 (0xCF8)
#define EMC_PMACRO_TRAINING_CTRL_1 (0xCFC)
#define EMC_PMACRO_DIG_DLL_STATUS_0 (0xD20)
#define EMC_PMACRO_PERBIT_FGCG_CTRL_0 (0xD40)
#define EMC_PMACRO_PERBIT_FGCG_CTRL_1 (0xD44)
#define EMC_PMACRO_PERBIT_FGCG_CTRL_2 (0xD48)
#define EMC_PMACRO_PERBIT_FGCG_CTRL_3 (0xD4C)
#define EMC_PMACRO_PERBIT_FGCG_CTRL_4 (0xD50)
#define EMC_PMACRO_PERBIT_FGCG_CTRL_5 (0xD54)
#define EMC_PMACRO_PERBIT_RFU_CTRL_0 (0xD60)
#define EMC_PMACRO_PERBIT_RFU_CTRL_1 (0xD64)
#define EMC_PMACRO_PERBIT_RFU_CTRL_2 (0xD68)
#define EMC_PMACRO_PERBIT_RFU_CTRL_3 (0xD6C)
#define EMC_PMACRO_PERBIT_RFU_CTRL_4 (0xD70)
#define EMC_PMACRO_PERBIT_RFU_CTRL_5 (0xD74)
#define EMC_PMACRO_PERBIT_RFU1_CTRL_0 (0xD80)
#define EMC_PMACRO_PERBIT_RFU1_CTRL_1 (0xD84)
#define EMC_PMACRO_PERBIT_RFU1_CTRL_2 (0xD88)
#define EMC_PMACRO_PERBIT_RFU1_CTRL_3 (0xD8C)
#define EMC_PMACRO_PERBIT_RFU1_CTRL_4 (0xD90)
#define EMC_PMACRO_PERBIT_RFU1_CTRL_5 (0xD94)
#define EMC_TRAINING_CMD (0xE00)
#define EMC_TRAINING_CTRL (0xE04)
#define EMC_TRAINING_STATUS (0xE08)
#define EMC_TRAINING_QUSE_CORS_CTRL (0xE0C)
#define EMC_TRAINING_QUSE_FINE_CTRL (0xE10)
#define EMC_TRAINING_QUSE_CTRL_MISC (0xE14)
#define EMC_TRAINING_WRITE_FINE_CTRL (0xE18)
#define EMC_TRAINING_WRITE_CTRL_MISC (0xE1C)
#define EMC_TRAINING_WRITE_VREF_CTRL (0xE20)
#define EMC_TRAINING_READ_FINE_CTRL (0xE24)
#define EMC_TRAINING_READ_CTRL_MISC (0xE28)
#define EMC_TRAINING_READ_VREF_CTRL (0xE2C)
#define EMC_TRAINING_CA_FINE_CTRL (0xE30)
#define EMC_TRAINING_CA_CTRL_MISC (0xE34)
#define EMC_TRAINING_CA_CTRL_MISC1 (0xE38)
#define EMC_TRAINING_CA_VREF_CTRL (0xE3C)
#define EMC_TRAINING_SETTLE (0xE44)
#define EMC_TRAINING_MPC (0xE5C)
#define EMC_TRAINING_PATRAM_CTRL (0xE60)
#define EMC_TRAINING_PATRAM_DQ (0xE64)
#define EMC_TRAINING_PATRAM_DMI (0xE68)
#define EMC_TRAINING_VREF_SETTLE (0xE6C)
#define EMC_TRAINING_RW_OFFSET_IB_BYTE0 (0xE98)
#define EMC_TRAINING_RW_OFFSET_IB_BYTE1 (0xE9C)
#define EMC_TRAINING_RW_OFFSET_IB_BYTE2 (0xEA0)
#define EMC_TRAINING_RW_OFFSET_IB_BYTE3 (0xEA4)
#define EMC_TRAINING_RW_OFFSET_IB_MISC (0xEA8)
#define EMC_TRAINING_RW_OFFSET_OB_BYTE0 (0xEAC)
#define EMC_TRAINING_RW_OFFSET_OB_BYTE1 (0xEB0)
#define EMC_TRAINING_RW_OFFSET_OB_BYTE2 (0xEB4)
#define EMC_TRAINING_RW_OFFSET_OB_BYTE3 (0xEB8)
#define EMC_TRAINING_RW_OFFSET_OB_MISC (0xEBC)
#define EMC_TRAINING_OPT_CA_VREF (0xEC0)
#define EMC_TRAINING_OPT_DQ_OB_VREF (0xEC4)
#define EMC_TRAINING_QUSE_VREF_CTRL (0xED0)
#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK0 (0xED4)
#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK1 (0xED8)
#define EMC_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (EMC, NAME)
#define EMC_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (EMC, NAME, VALUE)
#define EMC_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (EMC, NAME, ENUM)
#define EMC_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(EMC, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_EMC_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (EMC, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_EMC_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (EMC, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_EMC_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (EMC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_EMC_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(EMC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_EMC_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (EMC, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_EMC_REG_BIT_ENUM(DBG_WRITE_MUX, 1, ASSEMBLY, ACTIVE);
DEFINE_EMC_REG_BIT_ENUM(CFG_DYN_SELF_REF, 28, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(CFG_DRAM_ACPD, 29, NO_POWERDOWN, ACTIVE_POWERDOWN);
DEFINE_EMC_REG_BIT_ENUM(ADR_CFG_EMEM_NUMDEV, 0, N1, N2);
DEFINE_EMC_REG_BIT_ENUM(TIMING_CONTROL_TIMING_UPDATE, 0, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(SELF_REF_SELF_REF_CMD, 0, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(SELF_REF_ACTIVE_SELF_REF, 8, DISABLED, ENABLED);
DEFINE_EMC_REG_TWO_BIT_ENUM(SELF_REF_SREF_DEV_SELECTN, 30, BOTH, DEV1, DEV0, RESERVED);
DEFINE_EMC_REG(MRW_OP, 0, 8);
DEFINE_EMC_REG(MRW_MA, 16, 8);
DEFINE_EMC_REG_TWO_BIT_ENUM(MRW_CNT, 26, SHORT, LONG, EXT1, EXT2);
DEFINE_EMC_REG_TWO_BIT_ENUM(MRW_DEV_SELECTN, 30, BOTH, DEV1, DEV0, RESERVED);
DEFINE_EMC_REG_TWO_BIT_ENUM(FBIO_CFG5_DRAM_TYPE, 0, DDR4, LPDDR4, LPDDR2, DDR2);
DEFINE_EMC_REG_BIT_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_MEASURE_STALL, 9, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_UPDATE_STALL, 10, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_START, 31, DISABLE, ENABLE);
DEFINE_EMC_REG(REQ_CTRL_STALL_ALL_READS, 0, 1);
DEFINE_EMC_REG(REQ_CTRL_STALL_ALL_WRITES, 1, 1);
DEFINE_EMC_REG_TWO_BIT_ENUM(EMC_STATUS_DRAM_IN_SELF_REFRESH, 8, DISABLED, DEV0_ENABLED, DEV1_ENABLED, BOTH_ENABLED);
DEFINE_EMC_REG_BIT_ENUM(EMC_STATUS_DRAM_DEV0_IN_SELF_REFRESH, 8, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(EMC_STATUS_NO_OUTSTANDING_TRANSACTIONS, 2, WAITING, COMPLETED);
DEFINE_EMC_REG_BIT_ENUM(EMC_STATUS_TIMING_UPDATE_STALLED, 23, DONE, BUSY);
DEFINE_EMC_REG_BIT_ENUM(CFG_DIG_DLL_CFG_DLL_EN, 0, DISABLED, ENABLED);
DEFINE_EMC_REG(ZCAL_INTERVAL_LO, 0, 10);
DEFINE_EMC_REG(ZCAL_INTERVAL_HI, 10, 14);
DEFINE_EMC_REG(PMC_SCRATCH3_DDR_CNTRL, 0, 19);
DEFINE_EMC_REG_BIT_ENUM(PMC_SCRATCH3_WEAK_BIAS, 30, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(FBIO_CFG7_CH0_ENABLE, 1, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(FBIO_CFG7_CH1_ENABLE, 2, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE0, 16, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE1, 17, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE2, 18, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE3, 19, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE4, 20, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE5, 21, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE6, 22, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE7, 23, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD0, 24, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD1, 25, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD2, 26, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD3, 27, DISABLE, ENABLE);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_0_CH0_TRAINING_ENABLED, 0, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_0_CH0_TRAINING_TRAIN_QPOP, 1, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_0_CH0_TRAINING_RX_E_DIRECT_ZI, 2, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_0_CH0_TRAINING_E_WRPTR, 3, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_0_CH0_TRAINING_DRV_DQS, 4, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_1_CH1_TRAINING_ENABLED, 0, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_1_CH1_TRAINING_TRAIN_QPOP, 1, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_1_CH1_TRAINING_RX_E_DIRECT_ZI, 2, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_1_CH1_TRAINING_E_WRPTR, 3, DISABLED, ENABLED);
DEFINE_EMC_REG_BIT_ENUM(PMACRO_TRAINING_CTRL_1_CH1_TRAINING_DRV_DQS, 4, DISABLED, ENABLED);
| 37,019
|
C++
|
.h
| 608
| 59.817434
| 329
| 0.585301
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,130
|
tegra_flow_ctlr.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/include/vapours/tegra/tegra_flow_ctlr.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours/common.hpp>
#include <vapours/assert.hpp>
#include <vapours/literals.hpp>
#include <vapours/util.hpp>
#include <vapours/results.hpp>
#include <vapours/reg.hpp>
#define FLOW_CTLR_RAM_REPAIR (0x040)
#define FLOW_CTLR_FLOW_DBG_QUAL (0x050)
#define FLOW_CTLR_CC4_HVC_CONTROL (0x060)
#define FLOW_CTLR_CC4_RETENTION_CONTROL (0x064)
#define FLOW_CTLR_CC4_HVC_RETRY (0x08C)
#define FLOW_CTLR_L2FLUSH_CONTROL (0x094)
#define FLOW_CTLR_BPMP_CLUSTER_CONTROL (0x098)
#define FLOW_CTLR_CPU0_CSR (0x008)
#define FLOW_CTLR_CPU1_CSR (0x018)
#define FLOW_CTLR_CPU2_CSR (0x020)
#define FLOW_CTLR_CPU3_CSR (0x028)
#define FLOW_CTLR_HALT_CPU0_EVENTS (0x000)
#define FLOW_CTLR_HALT_CPU1_EVENTS (0x014)
#define FLOW_CTLR_HALT_CPU2_EVENTS (0x01C)
#define FLOW_CTLR_HALT_CPU3_EVENTS (0x024)
#define FLOW_CTLR_HALT_COP_EVENTS (0x004)
#define FLOW_CTLR_CC4_CORE0_CTRL (0x06C)
#define FLOW_CTLR_CC4_CORE1_CTRL (0x070)
#define FLOW_CTLR_CC4_CORE2_CTRL (0x074)
#define FLOW_CTLR_CC4_CORE3_CTRL (0x078)
#define FLOW_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (FLOW_CTLR, NAME)
#define FLOW_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (FLOW_CTLR, NAME, VALUE)
#define FLOW_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (FLOW_CTLR, NAME, ENUM)
#define FLOW_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(FLOW_CTLR, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_FLOW_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (FLOW_CTLR, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_FLOW_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (FLOW_CTLR, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_FLOW_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (FLOW_CTLR, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_FLOW_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(FLOW_CTLR, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_FLOW_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (FLOW_CTLR, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_FLOW_REG_BIT_ENUM(CPUN_CSR_ENABLE, 0, DISABLE, ENABLE);
DEFINE_FLOW_REG(CPUN_CSR_WAIT_WFI_BITMAP, 8, 4);
DEFINE_FLOW_REG_TWO_BIT_ENUM(CPUN_CSR_ENABLE_EXT, 12, POWERGATE_CPU_ONLY, POWERGATE_BOTH_CPU_NONCPU, POWERGATE_CPU_TURNOFF_CPURAIL, PG_EMULATION);
DEFINE_FLOW_REG_BIT_ENUM(CPUN_CSR_EVENT_FLAG, 14, FALSE, TRUE);
DEFINE_FLOW_REG_BIT_ENUM(CPUN_CSR_INTR_FLAG, 15, FALSE, TRUE);
DEFINE_FLOW_REG_BIT_ENUM(HALT_CPUN_EVENTS_GIC_FIQN, 8, DISABLE, ENABLE);
DEFINE_FLOW_REG_BIT_ENUM(HALT_CPUN_EVENTS_GIC_IRQN, 9, DISABLE, ENABLE);
DEFINE_FLOW_REG_BIT_ENUM(HALT_CPUN_EVENTS_LIC_FIQN, 10, DISABLE, ENABLE);
DEFINE_FLOW_REG_BIT_ENUM(HALT_CPUN_EVENTS_LIC_IRQN, 11, DISABLE, ENABLE);
DEFINE_FLOW_REG_THREE_BIT_ENUM(HALT_CPUN_EVENTS_FLOW_MODE, 29, NONE, RUN_AND_INT, WAITEVENT, WAITEVENT_AND_INT, STOP_UNTIL_IRQ, STOP_UNTIL_EVENT_AND_IRQ, RESERVED6, RESERVED7);
DEFINE_FLOW_REG_BIT_ENUM(HALT_COP_EVENTS_JTAG, 28, DISABLED, ENABLED);
DEFINE_FLOW_REG_THREE_BIT_ENUM(HALT_COP_EVENTS_MODE, 29, FLOW_MODE_NONE, FLOW_MODE_RUN_AND_INT, FLOW_MODE_STOP, FLOW_MODE_STOP_AND_INT, FLOW_MODE_STOP_UNTIL_IRQ, FLOW_MODE_STOP_UNTIL_IRQ_AND_INT, FLOW_MODE_STOP_UNTIL_EVENT_AND_IRQ, RESERVED7);
DEFINE_FLOW_REG_BIT_ENUM(FLOW_DBG_QUAL_FIQ2CCPLEX_ENABLE, 28, DISABLE, ENABLE);
DEFINE_FLOW_REG_BIT_ENUM(RAM_REPAIR_REQ, 0, DISABLE, ENABLE);
DEFINE_FLOW_REG_BIT_ENUM(RAM_REPAIR_STS, 1, REQUESTED, DONE);
DEFINE_FLOW_REG_BIT_ENUM(BPMP_CLUSTER_CONTROL_ACTIVE_CLUSTER, 0, FAST, SLOW);
DEFINE_FLOW_REG_BIT_ENUM(BPMP_CLUSTER_CONTROL_CLUSTER_SWITCH_ENABLE, 1, DISABLE, ENABLE);
DEFINE_FLOW_REG_BIT_ENUM(BPMP_CLUSTER_CONTROL_ACTIVE_CLUSTER_LOCK, 2, DISABLE, ENABLE);
| 5,257
|
C++
|
.h
| 69
| 74.782609
| 336
| 0.660611
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,131
|
sdmmc_sd_card_device_accessor.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_sd_card_device_accessor.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_base_device_accessor.hpp"
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
#include "sdmmc_device_detector.hpp"
#endif
namespace ams::sdmmc::impl {
class SdCardDevice : public BaseDevice {
private:
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
mutable os::EventType m_removed_event;
#endif
u16 m_rca;
bool m_is_valid_rca;
bool m_is_uhs_i_mode;
public:
SdCardDevice() : m_rca(0) {
this->OnDeactivate();
}
virtual void Deactivate() override {
this->OnDeactivate();
BaseDevice::Deactivate();
}
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
virtual os::EventType *GetRemovedEvent() const override {
return std::addressof(m_removed_event);
}
#elif defined(AMS_SDMMC_USE_OS_EVENTS)
virtual os::EventType *GetRemovedEvent() const override {
/* Mmc can't be removed. */
return nullptr;
}
#endif
virtual DeviceType GetDeviceType() const override {
return DeviceType_SdCard;
}
virtual u16 GetRca() const override {
AMS_ABORT_UNLESS(m_is_valid_rca);
return m_rca;
}
void OnDeactivate() {
m_is_valid_rca = false;
m_is_uhs_i_mode = false;
}
void SetRca(u16 v) {
m_rca = v;
m_is_valid_rca = true;
}
void SetOcrAndHighCapacity(u32 ocr);
void SetUhsIMode(bool en) {
m_is_uhs_i_mode = en;
}
bool IsUhsIMode() const {
return m_is_uhs_i_mode;
}
};
enum SdCardApplicationCommandIndex : std::underlying_type<CommandIndex>::type {
SdApplicationCommandIndex_SetBusWidth = 6,
SdApplicationCommandIndex_SdStatus = 13,
SdApplicationCommandIndex_SendNumWriteBlocks = 22,
SdApplicationCommandIndex_SetWriteBlockEraseCount = 23,
SdApplicationCommandIndex_SdSendOpCond = 41,
SdApplicationCommandIndex_SetClearCardDetect = 42,
SdApplicationCommandIndex_SendScr = 51,
};
enum SwitchFunctionAccessMode {
SwitchFunctionAccessMode_Default = 0,
SwitchFunctionAccessMode_HighSpeed = 1,
SwitchFunctionAccessMode_Sdr50 = 2,
SwitchFunctionAccessMode_Sdr104 = 3,
SwitchFunctionAccessMode_Ddr50 = 4,
};
class SdCardDeviceAccessor : public BaseDeviceAccessor {
private:
SdCardDevice m_sd_card_device;
void *m_work_buffer;
size_t m_work_buffer_size;
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
DeviceDetector *m_sd_card_detector;
#endif
BusWidth m_max_bus_width;
SpeedMode m_max_speed_mode;
bool m_is_initialized;
private:
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
void RemovedCallback();
static void RemovedCallbackEntry(void *arg) {
static_cast<SdCardDeviceAccessor *>(arg)->RemovedCallback();
}
#endif
Result IssueCommandSendRelativeAddr(u16 *out_rca) const;
Result IssueCommandSendIfCond() const;
Result IssueCommandCheckSupportedFunction(void *dst, size_t dst_size) const;
Result IssueCommandSwitchAccessMode(void *dst, size_t dst_size, bool set_function, SwitchFunctionAccessMode access_mode) const;
Result IssueCommandVoltageSwitch() const;
Result IssueCommandAppCmd(DeviceState expected_state, u32 ignore_mask = 0) const;
Result IssueCommandSetBusWidth4Bit() const;
Result IssueCommandSdStatus(void *dst, size_t dst_size) const;
Result IssueCommandSendOpCond(u32 *out_ocr, bool spec_under_2, bool uhs_i_supported) const;
Result IssueCommandClearCardDetect() const;
Result IssueCommandSendScr(void *dst, size_t dst_size) const;
Result EnterUhsIMode();
Result ChangeToReadyState(bool spec_under_2, bool uhs_i_supported);
Result ChangeToStbyStateAndGetRca();
Result SetMemoryCapacity(const void *csd);
Result GetScr(void *dst, size_t dst_size) const;
Result ExtendBusWidth(BusWidth max_bw, u8 sd_bw);
Result SwitchAccessMode(SwitchFunctionAccessMode access_mode, void *wb, size_t wb_size);
Result ExtendBusSpeedAtUhsIMode(SpeedMode max_sm, void *wb, size_t wb_size);
Result ExtendBusSpeedAtNonUhsIMode(SpeedMode max_sm, bool spec_under_1_1, void *wb, size_t wb_size);
Result GetSdStatus(void *dst, size_t dst_size) const;
Result StartupSdCardDevice(BusWidth max_bw, SpeedMode max_sm, void *wb, size_t wb_size);
void TryDisconnectDat3PullUpResistor() const;
protected:
virtual Result OnActivate() override;
virtual Result OnReadWrite(u32 sector_index, u32 num_sectors, void *buf, size_t buf_size, bool is_read) override;
virtual Result ReStartup() override;
public:
virtual void Initialize() override;
virtual void Finalize() override;
virtual Result Activate() override;
virtual Result GetSpeedMode(SpeedMode *out_speed_mode) const override;
public:
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
explicit SdCardDeviceAccessor(IHostController *hc, DeviceDetector *dd) : BaseDeviceAccessor(hc), m_sd_card_detector(dd)
#else
explicit SdCardDeviceAccessor(IHostController *hc) : BaseDeviceAccessor(hc)
#endif
{
m_work_buffer = nullptr;
m_work_buffer_size = 0;
m_max_bus_width = BusWidth_4Bit;
m_max_speed_mode = SpeedMode_SdCardSdr104;
m_is_initialized = false;
}
void SetSdCardWorkBuffer(void *wb, size_t wb_size) {
m_work_buffer = wb;
m_work_buffer_size = wb_size;
}
void PutSdCardToSleep();
void AwakenSdCard();
Result GetSdCardProtectedAreaCapacity(u32 *out_num_sectors) const;
Result GetSdCardScr(void *dst, size_t dst_size) const;
Result GetSdCardSwitchFunctionStatus(void *dst, size_t dst_size, SdCardSwitchFunction switch_function) const;
Result GetSdCardCurrentConsumption(u16 *out_current_consumption, SpeedMode speed_mode) const;
Result GetSdCardSdStatus(void *dst, size_t dst_size) const;
bool IsSdCardInserted() {
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
return m_sd_card_detector->IsInserted();
#else
AMS_ABORT("IsSdCardInserted without SdCardDetector");
#endif
}
bool IsSdCardRemoved() {
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
return m_sd_card_device.IsRemoved();
#else
AMS_ABORT("IsSdCardRemoved without SdCardDetector");
#endif
}
void RegisterSdCardDetectionEventCallback(DeviceDetectionEventCallback cb, void *arg) {
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
return m_sd_card_detector->RegisterDetectionEventCallback(cb, arg);
#else
AMS_UNUSED(cb, arg);
AMS_ABORT("RegisterSdCardDetectionEventCallback without SdCardDetector");
#endif
}
void UnregisterSdCardDetectionEventCallback() {
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
return m_sd_card_detector->UnregisterDetectionEventCallback();
#else
AMS_ABORT("UnregisterSdCardDetectionEventCallback without SdCardDetector");
#endif
}
};
}
| 9,043
|
C++
|
.h
| 192
| 34.661458
| 139
| 0.601632
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,132
|
sdmmc_clock_reset_controller.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_clock_reset_controller.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
namespace ams::sdmmc::impl::ClockResetController {
enum Module {
#if defined(ATMOSPHERE_BOARD_NINTENDO_NX)
Module_Sdmmc1 = 0,
Module_Sdmmc2 = 1,
Module_Sdmmc3 = 2,
Module_Sdmmc4 = 3,
#endif
Module_Count,
};
void Initialize(Module module);
void Finalize(Module module);
bool IsAvailable(Module module);
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
void SwitchToPcvControl();
#endif
void SetClockFrequencyKHz(u32 *out_actual_frequency, Module module, u32 target_frequency);
void AssertReset(Module module);
void ReleaseReset(Module module, u32 target_frequency_khz);
}
| 1,367
|
C++
|
.h
| 37
| 32.243243
| 94
| 0.71353
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,133
|
sdmmc_port_sd_card0.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_port_sd_card0.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_i_host_controller.hpp"
#include "sdmmc_i_device_accessor.hpp"
#include "sdmmc_sd_card_device_accessor.hpp"
namespace ams::sdmmc::impl {
IHostController *GetHostControllerOfPortSdCard0();
IDeviceAccessor *GetDeviceAccessorOfPortSdCard0();
SdCardDeviceAccessor *GetSdCardDeviceAccessorOfPortSdCard0();
}
| 1,004
|
C++
|
.h
| 25
| 38
| 76
| 0.776639
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,134
|
sdmmc_port_mmc0.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_port_mmc0.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_i_host_controller.hpp"
#include "sdmmc_i_device_accessor.hpp"
#include "sdmmc_mmc_device_accessor.hpp"
namespace ams::sdmmc::impl {
IHostController *GetHostControllerOfPortMmc0();
IDeviceAccessor *GetDeviceAccessorOfPortMmc0();
MmcDeviceAccessor *GetMmcDeviceAccessorOfPortMmc0();
}
| 985
|
C++
|
.h
| 25
| 37.24
| 76
| 0.77325
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,135
|
sdmmc_i_device_accessor.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_i_device_accessor.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_i_host_controller.hpp"
namespace ams::sdmmc::impl {
class IDeviceAccessor {
public:
virtual void Initialize() = 0;
virtual void Finalize() = 0;
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
virtual void RegisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) = 0;
virtual void UnregisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) = 0;
#endif
virtual Result Activate() = 0;
virtual void Deactivate() = 0;
virtual Result ReadWrite(u32 sector_index, u32 num_sectors, void *buffer, size_t buffer_size, bool is_read) = 0;
virtual Result CheckConnection(SpeedMode *out_speed_mode, BusWidth *out_bus_width) = 0;
virtual Result GetSpeedMode(SpeedMode *out) const = 0;
virtual Result GetMemoryCapacity(u32 *out_sectors) const = 0;
virtual Result GetDeviceStatus(u32 *out) const = 0;
virtual Result GetOcr(u32 *out) const = 0;
virtual Result GetRca(u16 *out) const = 0;
virtual Result GetCid(void *out, size_t size) const = 0;
virtual Result GetCsd(void *out, size_t size) const = 0;
virtual void GetAndClearErrorInfo(ErrorInfo *out_error_info, size_t *out_log_size, char *out_log_buffer, size_t log_buffer_size) = 0;
};
}
| 2,195
|
C++
|
.h
| 41
| 46.341463
| 159
| 0.688723
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,136
|
sdmmc_base_device_accessor.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_base_device_accessor.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_i_host_controller.hpp"
#include "sdmmc_i_device_accessor.hpp"
namespace ams::sdmmc::impl {
#if defined(AMS_SDMMC_USE_LOGGER)
class Logger {
private:
static constexpr size_t LogLengthMax = 0x20;
static constexpr size_t LogCountMax = 0x10;
private:
char m_logs[LogCountMax][LogLengthMax];
int m_log_index;
private:
void Clear() {
for (size_t i = 0; i < LogCountMax; ++i) {
m_logs[i][0] = '\0';
}
m_log_index = 0;
}
size_t Pop(char *dst, size_t dst_size) {
/* Decrease log index. */
if ((--m_log_index) < 0) {
m_log_index = LogCountMax - 1;
}
/* Check if we have a log. */
if (m_logs[m_log_index][0] == '\0') {
return 0;
}
/* Copy log to output. */
const int len = ::ams::util::Strlcpy(dst, m_logs[m_log_index], dst_size);
/* Clear the log we copied. */
m_logs[m_log_index][0] = '\0';
return static_cast<size_t>(len);
}
public:
Logger() {
this->Clear();
}
void Push(const char *fmt, std::va_list vl) {
/* Format the log into the current buffer. */
::ams::util::TVSNPrintf(m_logs[m_log_index], LogLengthMax, fmt, vl);
/* Update our log index. */
if ((++m_log_index) >= static_cast<int>(LogCountMax)) {
m_log_index = 0;
}
}
void Push(const char *fmt, ...) {
std::va_list vl;
va_start(vl, fmt);
this->Push(fmt, vl);
va_end(vl);
}
bool HasLog() const {
const int index = m_log_index > 0 ? m_log_index - 1 : static_cast<int>(LogCountMax - 1);
return m_logs[index][0] != '\0';
}
size_t GetAndClearLogs(char *dst, size_t dst_size) {
AMS_ABORT_UNLESS(dst != nullptr);
AMS_ABORT_UNLESS(dst_size > 0);
/* Pop logs until we run out of them. */
size_t total_len = 0;
while (true) {
/* Pop the current log. */
const size_t cur_len = this->Pop(dst + total_len, dst_size - total_len);
if (cur_len == 0) {
break;
}
/* Check if the log exceeded the buffer size. */
if (total_len + cur_len + 1 >= dst_size) {
break;
}
/* Advance the total length. */
total_len += cur_len;
/* Check if there's space for our separator. */
if (total_len + 3 >= dst_size) {
break;
}
dst[total_len + 0] = ',';
dst[total_len + 1] = ' ';
total_len += 2;
}
/* Ensure that the complete log fits in the buffer. */
if (total_len >= dst_size) {
total_len = dst_size - 1;
}
/* Ensure null termination. */
dst[total_len] = '\0';
/* Clear any remaining logs. */
this->Clear();
/* Return the length of the logs, including null terminator. */
return total_len + 1;
}
};
#endif
enum DeviceType {
DeviceType_Mmc = 0,
DeviceType_SdCard = 1,
DeviceType_GcAsic = 2,
};
enum DeviceState {
DeviceState_Idle = 0,
DeviceState_Ready = 1,
DeviceState_Ident = 2,
DeviceState_Stby = 3,
DeviceState_Tran = 4,
DeviceState_Data = 5,
DeviceState_Rcv = 6,
DeviceState_Prg = 7,
DeviceState_Dis = 8,
DeviceState_Rsvd0 = 9,
DeviceState_Rsvd1 = 10,
DeviceState_Rsvd2 = 11,
DeviceState_Rsvd3 = 12,
DeviceState_Rsvd4 = 13,
DeviceState_Rsvd5 = 14,
DeviceState_RsvdIoMode = 15,
DeviceState_Unknown = 16,
};
enum DeviceStatus : u32 {
DeviceStatus_AkeSeqError = (1u << 3),
DeviceStatus_AppCmd = (1u << 5),
DeviceStatus_SwitchError = (1u << 7),
DeviceStatus_EraseReset = (1u << 13),
DeviceStatus_WpEraseSkip = (1u << 15),
DeviceStatus_CidCsdOverwrite = (1u << 16),
DeviceStatus_Error = (1u << 19),
DeviceStatus_CcError = (1u << 20),
DeviceStatus_DeviceEccFailed = (1u << 21),
DeviceStatus_IllegalCommand = (1u << 22),
DeviceStatus_ComCrcError = (1u << 23),
DeviceStatus_LockUnlockFailed = (1u << 24),
DeviceStatus_WpViolation = (1u << 26),
DeviceStatus_EraseParam = (1u << 27),
DeviceStatus_EraseSeqError = (1u << 28),
DeviceStatus_BlockLenError = (1u << 29),
DeviceStatus_AddressMisaligned = (1u << 30),
DeviceStatus_AddressOutOfRange = (1u << 31),
DeviceStatus_CurrentStateShift = 9,
DeviceStatus_CurrentStateMask = (0b1111u << DeviceStatus_CurrentStateShift),
DeviceStatus_ErrorMask = (DeviceStatus_SwitchError |
DeviceStatus_EraseReset |
DeviceStatus_WpEraseSkip |
DeviceStatus_CidCsdOverwrite |
DeviceStatus_Error |
DeviceStatus_CcError |
DeviceStatus_DeviceEccFailed |
DeviceStatus_IllegalCommand |
DeviceStatus_ComCrcError |
DeviceStatus_LockUnlockFailed |
DeviceStatus_WpViolation |
DeviceStatus_EraseParam |
DeviceStatus_EraseSeqError |
DeviceStatus_BlockLenError |
DeviceStatus_AddressMisaligned |
DeviceStatus_AddressOutOfRange),
};
class BaseDevice {
private:
u32 m_ocr;
u8 m_cid[DeviceCidSize];
u16 m_csd[DeviceCsdSize / sizeof(u16)];
u32 m_memory_capacity;
bool m_is_high_capacity;
bool m_is_valid_ocr;
bool m_is_valid_cid;
bool m_is_valid_csd;
bool m_is_valid_high_capacity;
bool m_is_valid_memory_capacity;
bool m_is_active;
bool m_is_awake;
public:
#if defined(AMS_SDMMC_THREAD_SAFE)
mutable os::SdkRecursiveMutex m_device_mutex;
public:
BaseDevice() : m_device_mutex()
#else
BaseDevice()
#endif
{
m_is_awake = true;
m_ocr = 0;
m_memory_capacity = 0;
m_is_high_capacity = false;
this->OnDeactivate();
}
void OnDeactivate() {
m_is_active = false;
m_is_valid_ocr = false;
m_is_valid_cid = false;
m_is_valid_csd = false;
m_is_valid_high_capacity = false;
m_is_valid_memory_capacity = false;
}
bool IsAwake() const {
return m_is_awake;
}
void Awaken() {
m_is_awake = true;
}
void PutToSleep() {
m_is_awake = false;
}
bool IsActive() const {
return m_is_active;
}
void SetActive() {
m_is_active = true;
}
virtual void Deactivate() {
this->OnDeactivate();
}
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual os::EventType *GetRemovedEvent() const = 0;
#endif
virtual DeviceType GetDeviceType() const = 0;
virtual u16 GetRca() const = 0;
#if defined(AMS_SDMMC_USE_OS_EVENTS)
void InitializeRemovedEvent() {
if (os::EventType *removed_event = this->GetRemovedEvent(); removed_event != nullptr) {
os::InitializeEvent(removed_event, false, os::EventClearMode_ManualClear);
}
}
void FinalizeRemovedEvent() {
if (os::EventType *removed_event = this->GetRemovedEvent(); removed_event != nullptr) {
os::FinalizeEvent(removed_event);
}
}
void SignalRemovedEvent() {
if (os::EventType *removed_event = this->GetRemovedEvent(); removed_event != nullptr) {
os::SignalEvent(removed_event);
}
}
void ClearRemovedEvent() {
if (os::EventType *removed_event = this->GetRemovedEvent(); removed_event != nullptr) {
os::ClearEvent(removed_event);
}
}
bool IsRemoved() const {
if (os::EventType *removed_event = this->GetRemovedEvent(); removed_event != nullptr) {
return os::TryWaitEvent(removed_event);
}
return false;
}
#endif
Result CheckRemoved() const {
#if defined(AMS_SDMMC_USE_OS_EVENTS)
R_UNLESS(!this->IsRemoved(), sdmmc::ResultDeviceRemoved());
#endif
R_SUCCEED();
}
Result CheckAccessible() const {
/* Check awake. */
R_UNLESS(this->IsAwake(), sdmmc::ResultNotAwakened());
/* Check active. */
R_UNLESS(this->IsActive(), sdmmc::ResultNotActivated());
/* Check removed. */
R_TRY(this->CheckRemoved());
R_SUCCEED();
}
void SetHighCapacity(bool en) {
m_is_high_capacity = en;
m_is_valid_high_capacity = true;
}
bool IsHighCapacity() const {
AMS_ABORT_UNLESS(m_is_valid_high_capacity);
return m_is_high_capacity;
}
void SetOcr(u32 o) {
m_ocr = o;
m_is_valid_ocr = true;
}
u32 GetOcr() const {
AMS_ABORT_UNLESS(m_is_valid_ocr);
return m_ocr;
}
void SetCid(const void *src, size_t src_size) {
AMS_ABORT_UNLESS(src != nullptr);
AMS_ABORT_UNLESS(src_size >= DeviceCidSize);
std::memcpy(m_cid, src, DeviceCidSize);
m_is_valid_cid = true;
}
void GetCid(void *dst, size_t dst_size) const {
AMS_ABORT_UNLESS(m_is_valid_cid);
AMS_ABORT_UNLESS(dst != nullptr);
AMS_ABORT_UNLESS(dst_size >= DeviceCidSize);
std::memcpy(dst, m_cid, DeviceCidSize);
}
void SetCsd(const void *src, size_t src_size) {
AMS_ABORT_UNLESS(src != nullptr);
AMS_ABORT_UNLESS(src_size >= DeviceCsdSize);
std::memcpy(m_csd, src, DeviceCsdSize);
m_is_valid_csd = true;
}
void GetCsd(void *dst, size_t dst_size) const {
AMS_ABORT_UNLESS(m_is_valid_csd);
AMS_ABORT_UNLESS(dst != nullptr);
AMS_ABORT_UNLESS(dst_size >= DeviceCsdSize);
std::memcpy(dst, m_csd, DeviceCsdSize);
}
void SetMemoryCapacity(u32 num_sectors) {
m_memory_capacity = num_sectors;
m_is_valid_memory_capacity = true;
}
u32 GetMemoryCapacity() const {
AMS_ABORT_UNLESS(m_is_valid_memory_capacity);
return m_memory_capacity;
}
void GetLegacyCapacityParameters(u8 *out_c_size_mult, u8 *out_read_bl_len) const;
Result SetLegacyMemoryCapacity();
Result CheckDeviceStatus(u32 r1_resp) const;
DeviceState GetDeviceState(u32 r1_resp) const;
};
class BaseDeviceAccessor : public IDeviceAccessor {
private:
IHostController *m_host_controller;
BaseDevice *m_base_device;
u32 m_num_activation_failures;
u32 m_num_activation_error_corrections;
u32 m_num_read_write_failures;
u32 m_num_read_write_error_corrections;
#if defined(AMS_SDMMC_USE_LOGGER)
Logger m_error_logger;
#endif
private:
void ClearErrorInfo() {
m_num_activation_failures = 0;
m_num_activation_error_corrections = 0;
m_num_read_write_failures = 0;
m_num_read_write_error_corrections = 0;
}
protected:
explicit BaseDeviceAccessor(IHostController *hc) : m_host_controller(hc), m_base_device(nullptr) {
this->ClearErrorInfo();
}
IHostController *GetHostController() const {
return m_host_controller;
}
void SetDevice(BaseDevice *bd) {
m_base_device = bd;
}
Result CheckRemoved() const {
R_RETURN(m_base_device->CheckRemoved());
}
Result IssueCommandAndCheckR1(u32 *out_response, u32 command_index, u32 command_arg, bool is_busy, DeviceState expected_state, u32 status_ignore_mask) const;
Result IssueCommandAndCheckR1(u32 command_index, u32 command_arg, bool is_busy, DeviceState expected_state, u32 status_ignore_mask) const {
u32 dummy;
R_RETURN(this->IssueCommandAndCheckR1(std::addressof(dummy), command_index, command_arg, is_busy, expected_state, status_ignore_mask));
}
Result IssueCommandAndCheckR1(u32 command_index, u32 command_arg, bool is_busy, DeviceState expected_state) const {
R_RETURN(this->IssueCommandAndCheckR1(command_index, command_arg, is_busy, expected_state, 0));
}
Result IssueCommandGoIdleState() const;
Result IssueCommandAllSendCid(void *dst, size_t dst_size) const;
Result IssueCommandSelectCard() const;
Result IssueCommandSendCsd(void *dst, size_t dst_size) const;
Result IssueCommandSendStatus(u32 *out_device_status, u32 status_ignore_mask) const;
Result IssueCommandSendStatus(u32 status_ignore_mask) const {
u32 dummy;
R_RETURN(this->IssueCommandSendStatus(std::addressof(dummy), status_ignore_mask));
}
Result IssueCommandSendStatus() const {
R_RETURN(this->IssueCommandSendStatus(0));
}
Result IssueCommandSetBlockLenToSectorSize() const;
Result IssueCommandMultipleBlock(u32 *out_num_transferred_blocks, u32 sector_index, u32 num_sectors, void *buf, bool is_read) const;
Result ReadWriteSingle(u32 *out_num_transferred_blocks, u32 sector_index, u32 num_sectors, void *buf, bool is_read) const;
Result ReadWriteMultiple(u32 sector_index, u32 num_sectors, u32 sector_index_alignment, void *buf, size_t buf_size, bool is_read);
void IncrementNumActivationErrorCorrections() {
++m_num_activation_error_corrections;
}
void PushErrorTimeStamp() {
#if defined(AMS_SDMMC_USE_LOGGER)
{
m_error_logger.Push("%u", static_cast<u32>(os::ConvertToTimeSpan(os::GetSystemTick()).GetSeconds()));
}
#endif
}
void PushErrorLog(bool with_timestamp, const char *fmt, ...) {
#if defined(AMS_SDMMC_USE_LOGGER)
{
std::va_list vl;
va_start(vl, fmt);
m_error_logger.Push(fmt, vl);
va_end(vl);
if (with_timestamp) {
this->PushErrorTimeStamp();
}
}
#else
{
AMS_UNUSED(with_timestamp, fmt);
}
#endif
}
virtual Result OnActivate() = 0;
virtual Result OnReadWrite(u32 sector_index, u32 num_sectors, void *buf, size_t buf_size, bool is_read) = 0;
virtual Result ReStartup() = 0;
public:
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
virtual void RegisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) override;
virtual void UnregisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) override;
#endif
virtual Result Activate() override;
virtual void Deactivate() override;
virtual Result ReadWrite(u32 sector_index, u32 num_sectors, void *buffer, size_t buffer_size, bool is_read) override;
virtual Result CheckConnection(SpeedMode *out_speed_mode, BusWidth *out_bus_width) override;
virtual Result GetMemoryCapacity(u32 *out_sectors) const override;
virtual Result GetDeviceStatus(u32 *out) const override;
virtual Result GetOcr(u32 *out) const override;
virtual Result GetRca(u16 *out) const override;
virtual Result GetCid(void *out, size_t size) const override;
virtual Result GetCsd(void *out, size_t size) const override;
virtual void GetAndClearErrorInfo(ErrorInfo *out_error_info, size_t *out_log_size, char *out_log_buffer, size_t log_buffer_size) override;
};
}
| 19,549
|
C++
|
.h
| 431
| 30.508121
| 169
| 0.508168
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,137
|
sdmmc_clock_reset_controller.pcv.board.nintendo_nx.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_clock_reset_controller.pcv.board.nintendo_nx.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_clock_reset_controller.hpp"
namespace ams::sdmmc::impl::ClockResetController::pcv {
void Initialize(Module module);
void Finalize(Module module);
bool IsAvailable(Module module);
void SetClockFrequencyKHz(u32 *out_actual_frequency, Module module, u32 target_frequency);
void AssertReset(Module module);
void ReleaseReset(Module module, u32 target_frequency_khz);
}
| 1,080
|
C++
|
.h
| 26
| 38.923077
| 94
| 0.764762
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,138
|
sdmmc_sd_host_standard_registers.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_sd_host_standard_registers.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
namespace ams::sdmmc::impl {
struct SdHostStandardRegisters {
volatile uint32_t dma_address;
volatile uint16_t block_size;
volatile uint16_t block_count;
volatile uint32_t argument;
volatile uint16_t transfer_mode;
volatile uint16_t command;
volatile uint32_t response[0x4];
volatile uint32_t buffer;
volatile uint32_t present_state;
volatile uint8_t host_control;
volatile uint8_t power_control;
volatile uint8_t block_gap_control;
volatile uint8_t wake_up_control;
volatile uint16_t clock_control;
volatile uint8_t timeout_control;
volatile uint8_t software_reset;
volatile uint16_t normal_int_status;
volatile uint16_t error_int_status;
volatile uint16_t normal_int_enable;
volatile uint16_t error_int_enable;
volatile uint16_t normal_signal_enable;
volatile uint16_t error_signal_enable;
volatile uint16_t acmd12_err;
volatile uint16_t host_control2;
volatile uint32_t capabilities;
volatile uint32_t capabilities_1;
volatile uint32_t max_current;
volatile uint32_t _0x4c;
volatile uint16_t set_acmd12_error;
volatile uint16_t set_int_error;
volatile uint8_t adma_error;
volatile uint8_t _0x56[0x3];
volatile uint32_t adma_address;
volatile uint32_t upper_adma_address;
volatile uint16_t preset_for_init;
volatile uint16_t preset_for_default;
volatile uint16_t preset_for_high;
volatile uint16_t preset_for_sdr12;
volatile uint16_t preset_for_sdr25;
volatile uint16_t preset_for_sdr50;
volatile uint16_t preset_for_sdr104;
volatile uint16_t preset_for_ddr50;
volatile uint32_t _0x70[0x23];
volatile uint16_t slot_int_status;
volatile uint16_t host_version;
static constexpr inline u16 BlockCountMax = 0xFFFF;
};
static_assert(sizeof(SdHostStandardRegisters) == 0x100);
constexpr inline size_t SdmaBufferBoundary = 512_KB;
#define SD_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (SD_HOST_STANDARD, NAME)
#define SD_REG_BITS_VALUE(NAME, VALUE) REG_NAMED_BITS_VALUE (SD_HOST_STANDARD, NAME, VALUE)
#define SD_REG_BITS_ENUM(NAME, ENUM) REG_NAMED_BITS_ENUM (SD_HOST_STANDARD, NAME, ENUM)
#define SD_REG_BITS_ENUM_SEL(NAME, __COND__, TRUE_ENUM, FALSE_ENUM) REG_NAMED_BITS_ENUM_SEL(SD_HOST_STANDARD, NAME, __COND__, TRUE_ENUM, FALSE_ENUM)
#define DEFINE_SD_REG(NAME, __OFFSET__, __WIDTH__) REG_DEFINE_NAMED_REG (SD_HOST_STANDARD, NAME, __OFFSET__, __WIDTH__)
#define DEFINE_SD_REG_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE) REG_DEFINE_NAMED_BIT_ENUM (SD_HOST_STANDARD, NAME, __OFFSET__, ZERO, ONE)
#define DEFINE_SD_REG_TWO_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE) REG_DEFINE_NAMED_TWO_BIT_ENUM (SD_HOST_STANDARD, NAME, __OFFSET__, ZERO, ONE, TWO, THREE)
#define DEFINE_SD_REG_THREE_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN) REG_DEFINE_NAMED_THREE_BIT_ENUM(SD_HOST_STANDARD, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN)
#define DEFINE_SD_REG_FOUR_BIT_ENUM(NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN) REG_DEFINE_NAMED_FOUR_BIT_ENUM (SD_HOST_STANDARD, NAME, __OFFSET__, ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN, EIGHT, NINE, TEN, ELEVEN, TWELVE, THIRTEEN, FOURTEEN, FIFTEEN)
DEFINE_SD_REG(BLOCK_SIZE_TRANSFER_BLOCK_SIZE, 0, 12);
DEFINE_SD_REG_THREE_BIT_ENUM(BLOCK_SIZE_SDMA_BUFFER_BOUNDARY, 12, 4_KB, 8_KB, 16_KB, 32_KB, 64_KB, 128_KB, 256_KB, 512_KB);
constexpr inline size_t SdHostStandardBlockSizeTransferBlockSizeMax = 0xFFF;
DEFINE_SD_REG_BIT_ENUM(TRANSFER_MODE_DMA_ENABLE, 0, DISABLE, ENABLE);
DEFINE_SD_REG_BIT_ENUM(TRANSFER_MODE_BLOCK_COUNT_ENABLE, 1, DISABLE, ENABLE);
DEFINE_SD_REG_TWO_BIT_ENUM(TRANSFER_MODE_AUTO_CMD_ENABLE, 2, DISABLE, CMD12_ENABLE, CMD23_ENABLE, AUTO_SELECT);
DEFINE_SD_REG_BIT_ENUM(TRANSFER_MODE_DATA_TRANSFER_DIRECTION, 4, WRITE, READ);
DEFINE_SD_REG_BIT_ENUM(TRANSFER_MODE_MULTI_BLOCK_SELECT, 5, SINGLE_BLOCK, MULTI_BLOCK);
DEFINE_SD_REG_TWO_BIT_ENUM(COMMAND_RESPONSE_TYPE, 0, NO_RESPONSE, RESPONSE_LENGTH_136, RESPONSE_LENGTH_48, RESPONSE_LENGTH_48_CHECK_BUSY_AFTER_RESPONSE);
DEFINE_SD_REG_BIT_ENUM(COMMAND_CRC_CHECK, 3, DISABLE, ENABLE);
DEFINE_SD_REG_BIT_ENUM(COMMAND_INDEX_CHECK, 4, DISABLE, ENABLE);
DEFINE_SD_REG_BIT_ENUM(COMMAND_DATA_PRESENT, 5, NO_DATA_PRESENT, DATA_PRESENT);
DEFINE_SD_REG(COMMAND_COMMAND_INDEX, 8, 6);
constexpr inline size_t SdHostStandardCommandIndexMax = 0x3F;
DEFINE_SD_REG_BIT_ENUM(PRESENT_STATE_COMMAND_INHIBIT_CMD, 0, READY, NOT_READY);
DEFINE_SD_REG_BIT_ENUM(PRESENT_STATE_COMMAND_INHIBIT_DAT, 1, READY, NOT_READY);
DEFINE_SD_REG_BIT_ENUM(PRESENT_STATE_DAT0_LINE_SIGNAL_LEVEL, 20, LOW, HIGH);
DEFINE_SD_REG_BIT_ENUM(PRESENT_STATE_DAT1_LINE_SIGNAL_LEVEL, 21, LOW, HIGH);
DEFINE_SD_REG_BIT_ENUM(PRESENT_STATE_DAT2_LINE_SIGNAL_LEVEL, 22, LOW, HIGH);
DEFINE_SD_REG_BIT_ENUM(PRESENT_STATE_DAT3_LINE_SIGNAL_LEVEL, 23, LOW, HIGH);
DEFINE_SD_REG(PRESENT_STATE_DAT0_3_LINE_SIGNAL_LEVEL, 20, 4);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL_DATA_TRANSFER_WIDTH, 1, ONE_BIT, FOUR_BIT);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL_HIGH_SPEED_ENABLE, 2, NORMAL_SPEED, HIGH_SPEED);
DEFINE_SD_REG_TWO_BIT_ENUM(HOST_CONTROL_DMA_SELECT, 3, SDMA, RESERVED1, ADMA2, ADMA2_OR_ADMA3);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL_EXTENDED_DATA_TRANSFER_WIDTH, 5, USE_DATA_TRANSFER_WIDTH, EIGHT_BIT);
DEFINE_SD_REG_BIT_ENUM(POWER_CONTROL_SD_BUS_POWER_FOR_VDD1, 0, OFF, ON);
DEFINE_SD_REG_THREE_BIT_ENUM(POWER_CONTROL_SD_BUS_VOLTAGE_SELECT_FOR_VDD1, 1, RESERVED0, RESERVED1, RESERVED2, RESERVED3, RESERVED4, 1_8V, 3_0V, 3_3V);
DEFINE_SD_REG_BIT_ENUM(CLOCK_CONTROL_INTERNAL_CLOCK_ENABLE, 0, STOP, OSCILLATE);
DEFINE_SD_REG_BIT_ENUM(CLOCK_CONTROL_INTERNAL_CLOCK_STABLE, 1, NOT_READY, READY);
DEFINE_SD_REG_BIT_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, 2, DISABLE, ENABLE);
DEFINE_SD_REG_BIT_ENUM(CLOCK_CONTROL_CLOCK_GENERATOR_SELECT, 5, DIVIDED_CLOCK, PROGRAMMABLE_CLOCK);
DEFINE_SD_REG(CLOCK_CONTROL_UPPER_BITS_OF_SDCLK_FREQUENCY_SELECT, 6, 2);
DEFINE_SD_REG(CLOCK_CONTROL_SDCLK_FREQUENCY_SELECT, 8, 8);
DEFINE_SD_REG(TIMEOUT_CONTROL_DATA_TIMEOUT_COUNTER, 0, 4);
DEFINE_SD_REG_BIT_ENUM(SOFTWARE_RESET_FOR_ALL, 0, WORK, RESET);
DEFINE_SD_REG_BIT_ENUM(SOFTWARE_RESET_FOR_CMD, 1, WORK, RESET);
DEFINE_SD_REG_BIT_ENUM(SOFTWARE_RESET_FOR_DAT, 2, WORK, RESET);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_STATUS_COMMAND_COMPLETE, 0, NOT_COMPLETE, COMPLETE);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_STATUS_TRANSFER_COMPLETE, 1, NOT_COMPLETE, COMPLETE);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_STATUS_DMA_INTERRUPT, 3, NOT_GENERATED, GENERATED);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_STATUS_ERROR_INTERRUPT, 15, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_COMMAND_TIMEOUT, 0, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_COMMAND_CRC, 1, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_COMMAND_END_BIT, 2, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_COMMAND_INDEX, 3, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_DATA_TIMEOUT, 4, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_DATA_CRC, 5, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_DATA_END_BIT, 6, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_STATUS_AUTO_CMD, 8, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(AUTO_CMD_ERROR_AUTO_CMD_TIMEOUT, 1, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(AUTO_CMD_ERROR_AUTO_CMD_CRC, 2, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(AUTO_CMD_ERROR_AUTO_CMD_END_BIT, 3, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(AUTO_CMD_ERROR_AUTO_CMD_INDEX, 4, NO_ERROR, ERROR);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_COMMAND_COMPLETE, 0, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_TRANSFER_COMPLETE, 1, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_DMA_INTERRUPT, 3, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, 5, MASKED, ENABLED);
#define SD_HOST_STANDARD_NORMAL_INTERRUPT_ENABLE_ISSUE_COMMAND(__ENUM__) \
SD_REG_BITS_ENUM(NORMAL_INTERRUPT_COMMAND_COMPLETE, __ENUM__), \
SD_REG_BITS_ENUM(NORMAL_INTERRUPT_TRANSFER_COMPLETE, __ENUM__), \
SD_REG_BITS_ENUM(NORMAL_INTERRUPT_DMA_INTERRUPT, __ENUM__)
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_COMMAND_TIMEOUT_ERROR, 0, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_COMMAND_CRC_ERROR, 1, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_COMMAND_END_BIT_ERROR, 2, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_COMMAND_INDEX_ERROR, 3, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_DATA_TIMEOUT_ERROR, 4, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_DATA_CRC_ERROR, 5, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_DATA_END_BIT_ERROR, 6, MASKED, ENABLED);
DEFINE_SD_REG_BIT_ENUM(ERROR_INTERRUPT_AUTO_CMD_ERROR, 8, MASKED, ENABLED);
#define SD_HOST_STANDARD_ERROR_INTERRUPT_ENABLE_ISSUE_COMMAND(__ENUM__) \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_COMMAND_TIMEOUT_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_COMMAND_CRC_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_COMMAND_END_BIT_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_COMMAND_INDEX_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_DATA_TIMEOUT_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_DATA_CRC_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_DATA_END_BIT_ERROR, __ENUM__), \
SD_REG_BITS_ENUM(ERROR_INTERRUPT_AUTO_CMD_ERROR, __ENUM__)
DEFINE_SD_REG_THREE_BIT_ENUM(HOST_CONTROL2_UHS_MODE_SELECT, 0, SDR12, SDR25, SDR50, SDR104, DDR50, HS400, RSVD6, UHS_II);
constexpr inline auto SD_HOST_STANDARD_HOST_CONTROL2_UHS_MODE_SELECT_HS200 = SD_HOST_STANDARD_HOST_CONTROL2_UHS_MODE_SELECT_SDR104;
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 3, 3_3V_SIGNALING, 1_8V_SIGNALING);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL2_EXECUTE_TUNING, 6, TUNING_COMPLETED, EXECUTE_TUNING);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL2_SAMPLING_CLOCK, 7, USING_FIXED_CLOCK, USING_TUNED_CLOCK);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL2_HOST_VERSION_4_ENABLE, 12, VERSION_300_COMPATIBLE, VERSION_4);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL2_64_BIT_ADDRESSING, 13, 32_BIT_ADDRESSING, 64_BIT_ADDRESSING);
DEFINE_SD_REG_BIT_ENUM(HOST_CONTROL2_PRESET_VALUE_ENABLE, 15, HOST_DRIVER, AUTOMATIC_SELECTION);
DEFINE_SD_REG_BIT_ENUM(CAPABILITIES_64_BIT_SYSTEM_ADDRESS_SUPPORT_FOR_V3, 28, NOT_SUPPORTED, SUPPORTED);
}
| 12,416
|
C++
|
.h
| 165
| 69.072727
| 345
| 0.674221
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,139
|
sdmmc_gc_asic_device_accessor.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_gc_asic_device_accessor.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_base_device_accessor.hpp"
namespace ams::sdmmc::impl {
class GcAsicDevice : public BaseDevice {
private:
static constexpr u16 Rca = 0;
private:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
mutable os::EventType m_removed_event;
#endif
public:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual os::EventType *GetRemovedEvent() const override {
return std::addressof(m_removed_event);
}
#endif
virtual DeviceType GetDeviceType() const override {
return DeviceType_GcAsic;
}
virtual u16 GetRca() const override {
return Rca;
}
};
class GcAsicDeviceAccessor : public BaseDeviceAccessor {
private:
GcAsicDevice m_gc_asic_device;
bool m_is_initialized;
private:
Result IssueCommandWriteOperation(const void *op_buf, size_t op_buf_size) const;
Result IssueCommandFinishOperation() const;
Result IssueCommandSleep();
Result IssueCommandUpdateKey() const;
Result StartupGcAsicDevice();
protected:
virtual Result OnActivate() override;
virtual Result OnReadWrite(u32 sector_index, u32 num_sectors, void *buf, size_t buf_size, bool is_read) override;
virtual Result ReStartup() override {
AMS_ABORT("Can't ReStartup GcAsic\n");
}
public:
virtual void Initialize() override;
virtual void Finalize() override;
virtual Result GetSpeedMode(SpeedMode *out_speed_mode) const override;
public:
explicit GcAsicDeviceAccessor(IHostController *hc) : BaseDeviceAccessor(hc), m_is_initialized(false) {
/* ... */
}
void PutGcAsicToSleep();
Result AwakenGcAsic();
Result WriteGcAsicOperation(const void *op_buf, size_t op_buf_size);
Result FinishGcAsicOperation();
Result AbortGcAsicOperation();
Result SleepGcAsic();
Result UpdateGcAsicKey();
void SignalGcRemovedEvent() {
#if defined(AMS_SDMMC_USE_OS_EVENTS)
m_gc_asic_device.SignalRemovedEvent();
#else
AMS_ABORT("SignalGcRemovedEvent called without event support\n");
#endif
}
void ClearGcRemovedEvent() {
#if defined(AMS_SDMMC_USE_OS_EVENTS)
m_gc_asic_device.ClearRemovedEvent();
#else
AMS_ABORT("ClearGcRemovedEvent called without event support\n");
#endif
}
};
}
| 3,495
|
C++
|
.h
| 86
| 29.872093
| 125
| 0.606061
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,140
|
sdmmc_timer.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_timer.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
namespace ams::sdmmc::impl {
void WaitMicroSeconds(u32 us);
void WaitClocks(u32 num_clocks, u32 clock_frequency_khz);
#if defined(AMS_SDMMC_USE_OS_TIMER)
class ManualTimer {
private:
os::Tick m_timeout_tick;
bool m_is_timed_out;
public:
explicit ManualTimer(u32 ms) {
m_timeout_tick = os::GetSystemTick() + os::ConvertToTick(TimeSpan::FromMilliSeconds(ms));
m_is_timed_out = false;
}
bool Update() {
if (m_is_timed_out) {
return false;
}
m_is_timed_out = os::GetSystemTick() > m_timeout_tick;
return true;
}
};
#elif defined(AMS_SDMMC_USE_UTIL_TIMER)
class ManualTimer {
private:
u32 m_timeout_us;
bool m_is_timed_out;
public:
explicit ManualTimer(u32 ms) {
m_timeout_us = util::GetMicroSeconds() + (ms * 1000);
m_is_timed_out = false;
}
bool Update() {
if (m_is_timed_out) {
return false;
}
m_is_timed_out = util::GetMicroSeconds() > m_timeout_us;
return true;
}
};
#else
#error "Unknown context for ams::sdmmc::ManualTimer"
#endif
}
| 2,208
|
C++
|
.h
| 60
| 25.566667
| 109
| 0.543925
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,141
|
sdmmc_sd_host_standard_controller.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_sd_host_standard_controller.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_i_host_controller.hpp"
#include "sdmmc_sd_host_standard_registers.hpp"
namespace ams::sdmmc::impl {
class SdHostStandardController : public IHostController {
protected:
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
struct BufferInfo {
uintptr_t buffer_address;
size_t buffer_size;
dd::DeviceVirtualAddress buffer_device_virtual_address;
};
static constexpr inline auto NumBufferInfos = 3;
#endif
protected:
SdHostStandardRegisters *m_registers;
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
BufferInfo m_buffer_infos[NumBufferInfos];
#endif
#if defined(AMS_SDMMC_USE_OS_EVENTS)
os::MultiWaitType m_multi_wait;
os::InterruptEventType *m_interrupt_event;
os::MultiWaitHolderType m_interrupt_event_holder;
os::EventType *m_removed_event;
os::MultiWaitHolderType m_removed_event_holder;
#endif
u64 m_next_sdma_address;
u32 m_check_transfer_interval_ms;
u32 m_device_clock_frequency_khz;
bool m_is_power_saving_enable;
bool m_is_device_clock_enable;
ResponseType m_last_response_type;
u32 m_last_response[4];
u32 m_last_stop_transmission_response;
protected:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
void PreSetInterruptEvent(os::InterruptEventType *ie) {
m_interrupt_event = ie;
}
bool IsRemoved() const {
return m_removed_event != nullptr && os::TryWaitEvent(m_removed_event);
}
#endif
void SetDeviceClockFrequencyKHz(u32 khz) {
m_device_clock_frequency_khz = khz;
}
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
void ResetBufferInfos();
dd::DeviceVirtualAddress GetDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size);
#endif
void EnsureControl();
Result EnableInternalClock();
void SetBusPower(BusPower bus_power);
void EnableInterruptStatus();
void DisableInterruptStatus();
#if defined(AMS_SDMMC_USE_OS_EVENTS)
Result WaitInterrupt(u32 timeout_ms);
void ClearInterrupt();
#endif
void SetTransfer(u32 *out_num_transferred_blocks, const TransferData *xfer_data);
void SetTransferForTuning();
void SetCommand(const Command *command, bool has_xfer_data);
void SetCommandForTuning(u32 command_index);
Result ResetCmdDatLine();
Result AbortTransaction();
Result WaitWhileCommandInhibit(bool has_dat);
Result CheckAndClearInterruptStatus(volatile u16 *out_normal_int_status, u16 wait_mask);
Result WaitCommandComplete();
Result WaitTransferComplete();
Result WaitWhileBusy();
void GetResponse(u32 *out_response, size_t response_size, ResponseType response_type) const;
Result IssueCommandWithDeviceClock(const Command *command, TransferData *xfer_data, u32 *out_num_transferred_blocks);
Result IssueStopTransmissionCommandWithDeviceClock(u32 *out_response);
ALWAYS_INLINE Result CheckRemoved() {
#if defined(AMS_SDMMC_USE_OS_EVENTS)
R_UNLESS(!this->IsRemoved(), sdmmc::ResultDeviceRemoved());
#endif
R_SUCCEED();
}
public:
SdHostStandardController(dd::PhysicalAddress registers_phys_addr, size_t registers_size);
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual void PreSetRemovedEvent(os::EventType *e) override {
m_removed_event = e;
}
#endif
virtual void Initialize() override;
virtual void Finalize() override;
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
virtual void RegisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) override;
virtual void UnregisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) override;
#endif
virtual void SetWorkBuffer(void *wb, size_t wb_size) override;
virtual Result SwitchToSdr12() override {
AMS_ABORT("SwitchToSdr12 not supported\n");
}
virtual BusPower GetBusPower() const override;
virtual void SetBusWidth(BusWidth bus_width) override;
virtual BusWidth GetBusWidth() const override;
virtual u32 GetDeviceClockFrequencyKHz() const override {
return m_device_clock_frequency_khz;
}
virtual void SetPowerSaving(bool en) override;
virtual bool IsPowerSavingEnable() const override {
return m_is_power_saving_enable;
}
virtual void EnableDeviceClock() override;
virtual void DisableDeviceClock() override;
virtual bool IsDeviceClockEnable() const override {
return m_is_device_clock_enable;
}
virtual u32 GetMaxTransferNumBlocks() const override {
return SdHostStandardRegisters::BlockCountMax;
}
virtual void ChangeCheckTransferInterval(u32 ms) override;
virtual void SetDefaultCheckTransferInterval() override;
virtual Result IssueCommand(const Command *command, TransferData *xfer_data, u32 *out_num_transferred_blocks) override;
virtual Result IssueStopTransmissionCommand(u32 *out_response) override;
virtual void GetLastResponse(u32 *out_response, size_t response_size, ResponseType response_type) const override;
virtual void GetLastStopTransmissionResponse(u32 *out_response, size_t response_size) const override;
virtual bool IsSupportedTuning() const override {
return false;
}
virtual Result Tuning(SpeedMode speed_mode, u32 command_index) override {
AMS_UNUSED(speed_mode, command_index);
AMS_ABORT("Tuning not supported\n");
}
virtual void SaveTuningStatusForHs400() override {
AMS_ABORT("SaveTuningStatusForHs400 not supported\n");
}
};
}
| 7,420
|
C++
|
.h
| 148
| 37.635135
| 164
| 0.633158
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,142
|
sdmmc_io_impl.board.nintendo_nx.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_io_impl.board.nintendo_nx.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
namespace ams::sdmmc::impl {
Result SetSdCardVoltageEnabled(bool en);
Result SetSdCardVoltageValue(u32 micro_volts);
namespace pinmux_impl {
enum PinAssignment {
PinAssignment_Sdmmc1OutputHigh = 2,
PinAssignment_Sdmmc1ResetState = 3,
PinAssignment_Sdmmc1SchmtEnable = 4,
PinAssignment_Sdmmc1SchmtDisable = 5,
};
void SetPinAssignment(PinAssignment assignment);
}
namespace gpio_impl {
enum GpioValue {
GpioValue_Low = 0,
GpioValue_High = 1
};
enum Direction {
Direction_Input = 0,
Direction_Output = 1,
};
enum GpioPadName {
GpioPadName_PowSdEn = 2,
};
void OpenSession(GpioPadName pad);
void CloseSession(GpioPadName pad);
void SetDirection(GpioPadName pad, Direction direction);
void SetValue(GpioPadName pad, GpioValue value);
}
}
| 1,663
|
C++
|
.h
| 47
| 28.744681
| 76
| 0.67208
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,143
|
sdmmc_port_gc_asic0.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_port_gc_asic0.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_i_host_controller.hpp"
#include "sdmmc_i_device_accessor.hpp"
#include "sdmmc_gc_asic_device_accessor.hpp"
namespace ams::sdmmc::impl {
IHostController *GetHostControllerOfPortGcAsic0();
IDeviceAccessor *GetDeviceAccessorOfPortGcAsic0();
GcAsicDeviceAccessor *GetGcAsicDeviceAccessorOfPortGcAsic0();
}
| 1,004
|
C++
|
.h
| 25
| 38
| 76
| 0.776639
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,144
|
sdmmc_select_sdmmc_controller.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_select_sdmmc_controller.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#if defined(ATMOSPHERE_BOARD_NINTENDO_NX)
#include "sdmmc_sdmmc_controller.board.nintendo_nx.hpp"
namespace ams::sdmmc::impl {
using SdmmcControllerForPortSdCard0 = Sdmmc1Controller;
using SdmmcControllerForPortGcAsic0 = Sdmmc2Controller;
using SdmmcControllerForPortMmc0 = Sdmmc4Controller;
}
#else
#error "Unknown board for ams::sdmmc::SdmmcController"
#endif
| 1,082
|
C++
|
.h
| 27
| 36.851852
| 76
| 0.757865
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,145
|
sdmmc_i_host_controller.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_i_host_controller.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#if defined(AMS_SDMMC_USE_OS_EVENTS)
#include <stratosphere/os.hpp>
#endif
namespace ams::sdmmc::impl {
enum ResponseType {
ResponseType_R0 = 0,
ResponseType_R1 = 1,
ResponseType_R2 = 2,
ResponseType_R3 = 3,
ResponseType_R6 = 4,
ResponseType_R7 = 5,
};
enum TransferDirection {
TransferDirection_ReadFromDevice = 0,
TransferDirection_WriteToDevice = 1,
};
enum CommandIndex {
/* Generic commands. */
CommandIndex_GoIdleState = 0,
CommandIndex_SendOpCond = 1,
CommandIndex_AllSendCid = 2,
CommandIndex_SendRelativeAddr = 3,
CommandIndex_SetRelativeAddr = 3,
CommandIndex_SetDsr = 4,
CommandIndex_Switch = 6,
CommandIndex_SelectCard = 7,
CommandIndex_DeselectCard = 7,
CommandIndex_SendIfCond = 8,
CommandIndex_SendExtCsd = 8,
CommandIndex_SendCsd = 9,
CommandIndex_SendCid = 10,
CommandIndex_VoltageSwitch = 11,
CommandIndex_StopTransmission = 12,
CommandIndex_SendStatus = 13,
CommandIndex_SendTaskStatus = 13,
CommandIndex_GoInactiveState = 15,
CommandIndex_SetBlockLen = 16,
CommandIndex_ReadSingleBlock = 17,
CommandIndex_ReadMultipleBlock = 18,
CommandIndex_SendTuningBlock = 19,
CommandIndex_SpeedClassControl = 20,
CommandIndex_AddressExtension = 22,
CommandIndex_SetBlockCount = 23,
CommandIndex_WriteBlock = 24,
CommandIndex_WriteMultipleBlock = 25,
CommandIndex_ProgramCsd = 27,
CommandIndex_SetWriteProt = 28,
CommandIndex_ClearWriteProt = 29,
CommandIndex_SendWriteProt = 30,
CommandIndex_EraseWriteBlockStart = 32,
CommandIndex_EraseWriteBlockEnd = 33,
CommandIndex_EraseGroupStart = 35,
CommandIndex_EraseGroupEnd = 36,
CommandIndex_Erase = 38,
CommandIndex_LockUnlock = 42,
CommandIndex_AppCmd = 55,
CommandIndex_GenCmd = 56,
/* Nintendo specific vendor commands for lotus3. */
CommandIndex_GcAsicWriteOperation = 60,
CommandIndex_GcAsicFinishOperation = 61,
CommandIndex_GcAsicSleep = 62,
CommandIndex_GcAsicUpdateKey = 63,
};
struct Command {
u32 command_index;
u32 command_argument;
ResponseType response_type;
bool is_busy;
constexpr Command(u32 ci, u32 ca, ResponseType r, bool b) : command_index(ci), command_argument(ca), response_type(r), is_busy(b) { /* ... */ }
};
struct TransferData {
void *buffer;
size_t block_size;
u32 num_blocks;
TransferDirection transfer_direction;
bool is_multi_block_transfer;
bool is_stop_transmission_command_enabled;
constexpr TransferData(void *b, size_t bs, u32 nb, TransferDirection xd, bool mb, bool st)
: buffer(b), block_size(bs), num_blocks(nb), transfer_direction(xd), is_multi_block_transfer(mb), is_stop_transmission_command_enabled(st)
{
if (this->num_blocks > 1) {
AMS_ABORT_UNLESS(this->is_multi_block_transfer);
}
}
constexpr TransferData(void *b, size_t bs, u32 nb, TransferDirection xd)
: buffer(b), block_size(bs), num_blocks(nb), transfer_direction(xd), is_multi_block_transfer(false), is_stop_transmission_command_enabled(false)
{
AMS_ABORT_UNLESS(this->num_blocks == 1);
}
};
class IHostController {
public:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual void PreSetRemovedEvent(ams::os::EventType *event) = 0;
#endif
virtual void Initialize() = 0;
virtual void Finalize() = 0;
#if defined(AMS_SDMMC_USE_DEVICE_VIRTUAL_ADDRESS)
virtual void RegisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) = 0;
virtual void UnregisterDeviceVirtualAddress(uintptr_t buffer, size_t buffer_size, ams::dd::DeviceVirtualAddress buffer_device_virtual_address) = 0;
#endif
virtual void SetWorkBuffer(void *wb, size_t wb_size) = 0;
virtual Result Startup(BusPower bus_power, BusWidth bus_width, SpeedMode speed_mode, bool power_saving_enable) = 0;
virtual void Shutdown() = 0;
virtual void PutToSleep() = 0;
virtual Result Awaken() = 0;
virtual Result SwitchToSdr12();
virtual bool IsSupportedBusPower(BusPower bus_power) const = 0;
virtual BusPower GetBusPower() const = 0;
virtual bool IsSupportedBusWidth(BusWidth bus_width) const = 0;
virtual void SetBusWidth(BusWidth bus_width) = 0;
virtual BusWidth GetBusWidth() const = 0;
virtual Result SetSpeedMode(SpeedMode speed_mode) = 0;
virtual SpeedMode GetSpeedMode() const = 0;
virtual u32 GetDeviceClockFrequencyKHz() const = 0;
virtual void SetPowerSaving(bool en) = 0;
virtual bool IsPowerSavingEnable() const = 0;
virtual void EnableDeviceClock() = 0;
virtual void DisableDeviceClock() = 0;
virtual bool IsDeviceClockEnable() const = 0;
virtual u32 GetMaxTransferNumBlocks() const = 0;
virtual void ChangeCheckTransferInterval(u32 ms) = 0;
virtual void SetDefaultCheckTransferInterval() = 0;
virtual Result IssueCommand(const Command *command, TransferData *xfer_data, u32 *out_num_transferred_blocks) = 0;
virtual Result IssueStopTransmissionCommand(u32 *out_response) = 0;
ALWAYS_INLINE Result IssueCommand(const Command *command, TransferData *xfer_data) {
R_RETURN(this->IssueCommand(command, xfer_data, nullptr));
}
ALWAYS_INLINE Result IssueCommand(const Command *command) {
R_RETURN(this->IssueCommand(command, nullptr, nullptr));
}
virtual void GetLastResponse(u32 *out_response, size_t response_size, ResponseType response_type) const = 0;
virtual void GetLastStopTransmissionResponse(u32 *out_response, size_t response_size) const = 0;
virtual bool IsSupportedTuning() const = 0;
virtual Result Tuning(SpeedMode speed_mode, u32 command_index) = 0;
virtual void SaveTuningStatusForHs400() = 0;
virtual Result GetInternalStatus() const = 0;
};
}
| 7,713
|
C++
|
.h
| 156
| 40.147436
| 159
| 0.620194
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,146
|
sdmmc_device_detector.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_device_detector.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#if defined(AMS_SDMMC_USE_SD_CARD_DETECTOR)
#include <stratosphere.hpp>
namespace ams::sdmmc::impl {
using InsertedCallback = void (*)(void *);
using RemovedCallback = void (*)(void *);
struct CallbackInfo {
InsertedCallback inserted_callback;
void *inserted_callback_arg;
RemovedCallback removed_callback;
void *removed_callback_arg;
};
class DeviceDetector {
private:
enum State {
State_Initializing = 0,
State_Awake = 1,
State_Sleep = 2,
State_Finalized = 3,
};
private:
alignas(os::ThreadStackAlignment) u8 m_detector_thread_stack[8_KB];
State m_state;
bool m_is_prev_inserted;
bool m_force_detection;
os::ThreadType m_detector_thread;
os::EventType m_detector_thread_end_event;
os::EventType m_request_sleep_wake_event;
os::EventType m_acknowledge_sleep_awake_event;
os::EventType m_ready_device_status_event;
DeviceCode m_gpio_device_code;
gpio::GpioValue m_inserted_gpio_value;
u32 m_gpio_debounce_ms;
gpio::GpioPadSession m_gpio_pad_session;
CallbackInfo m_callback_info;
DeviceDetectionEventCallback m_device_detection_event_callback;
void *m_device_detection_event_callback_arg;
private:
static void DetectorThreadEntry(void *arg) {
reinterpret_cast<DeviceDetector *>(arg)->DetectorThread();
}
void DetectorThread();
bool IsCurrentInserted();
void HandleDeviceStatus(bool prev_inserted, bool cur_inserted);
public:
explicit DeviceDetector(DeviceCode dc, gpio::GpioValue igv, u32 gd)
: m_gpio_device_code(dc), m_inserted_gpio_value(igv), m_gpio_debounce_ms(gd)
{
m_state = State_Finalized;
m_is_prev_inserted = false;
m_force_detection = false;
m_callback_info = {};
m_device_detection_event_callback = nullptr;
m_device_detection_event_callback_arg = nullptr;
}
void Initialize(CallbackInfo *ci);
void Finalize();
void PutToSleep();
void Awaken(bool force_det);
u32 GetDebounceMilliSeconds() const {
return m_gpio_debounce_ms;
}
bool IsInserted();
void RegisterDetectionEventCallback(DeviceDetectionEventCallback cb, void *arg);
void UnregisterDetectionEventCallback();
};
}
#endif
| 3,506
|
C++
|
.h
| 84
| 31.880952
| 92
| 0.600059
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,147
|
sdmmc_clock_reset_controller.reg.board.nintendo_nx.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_clock_reset_controller.reg.board.nintendo_nx.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_clock_reset_controller.hpp"
namespace ams::sdmmc::impl::ClockResetController::reg {
void Initialize(Module module);
void Finalize(Module module);
bool IsAvailable(Module module);
void SetClockFrequencyKHz(u32 *out_actual_frequency, Module module, u32 target_frequency);
void AssertReset(Module module);
void ReleaseReset(Module module, u32 target_frequency_khz);
}
| 1,080
|
C++
|
.h
| 26
| 38.923077
| 94
| 0.764762
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,148
|
sdmmc_sdmmc_controller.board.nintendo_nx.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_sdmmc_controller.board.nintendo_nx.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_sd_host_standard_controller.hpp"
#include "sdmmc_clock_reset_controller.hpp"
namespace ams::sdmmc::impl {
bool IsSocMariko();
constexpr inline size_t SdmmcRegistersSize = 0x200;
constexpr inline dd::PhysicalAddress ApbMiscRegistersPhysicalAddress = UINT64_C(0x70000000);
constexpr inline size_t ApbMiscRegistersSize = 16_KB;
class SdmmcController : public SdHostStandardController {
private:
struct SdmmcRegisters {
/* Standard registers. */
volatile SdHostStandardRegisters sd_host_standard_registers;
/* Vendor specific registers */
volatile uint32_t vendor_clock_cntrl;
volatile uint32_t vendor_sys_sw_cntrl;
volatile uint32_t vendor_err_intr_status;
volatile uint32_t vendor_cap_overrides;
volatile uint32_t vendor_boot_cntrl;
volatile uint32_t vendor_boot_ack_timeout;
volatile uint32_t vendor_boot_dat_timeout;
volatile uint32_t vendor_debounce_count;
volatile uint32_t vendor_misc_cntrl;
volatile uint32_t max_current_override;
volatile uint32_t max_current_override_hi;
volatile uint32_t _0x12c[0x20];
volatile uint32_t vendor_io_trim_cntrl;
/* Start of sdmmc2/sdmmc4 only */
volatile uint32_t vendor_dllcal_cfg;
volatile uint32_t vendor_dll_ctrl0;
volatile uint32_t vendor_dll_ctrl1;
volatile uint32_t vendor_dllcal_cfg_sta;
/* End of sdmmc2/sdmmc4 only */
volatile uint32_t vendor_tuning_cntrl0;
volatile uint32_t vendor_tuning_cntrl1;
volatile uint32_t vendor_tuning_status0;
volatile uint32_t vendor_tuning_status1;
volatile uint32_t vendor_clk_gate_hysteresis_count;
volatile uint32_t vendor_preset_val0;
volatile uint32_t vendor_preset_val1;
volatile uint32_t vendor_preset_val2;
volatile uint32_t sdmemcomppadctrl;
volatile uint32_t auto_cal_config;
volatile uint32_t auto_cal_interval;
volatile uint32_t auto_cal_status;
volatile uint32_t io_spare;
volatile uint32_t sdmmca_mccif_fifoctrl;
volatile uint32_t timeout_wcoal_sdmmca;
volatile uint32_t _0x1fc;
};
static_assert(sizeof(SdmmcRegisters) == SdmmcRegistersSize);
private:
SdmmcRegisters *m_sdmmc_registers;
bool m_is_shutdown;
bool m_is_awake;
SpeedMode m_current_speed_mode;
BusPower m_bus_power_before_sleep;
BusWidth m_bus_width_before_sleep;
SpeedMode m_speed_mode_before_sleep;
u8 m_tap_value_before_sleep;
bool m_is_powersaving_enable_before_sleep;
u8 m_tap_value_for_hs_400;
bool m_is_valid_tap_value_for_hs_400;
Result m_drive_strength_calibration_status;
private:
void ReleaseReset(SpeedMode speed_mode);
void AssertReset();
Result StartupCore(BusPower bus_power);
Result SetClockTrimmer(SpeedMode speed_mode, u8 tap_value);
u8 GetCurrentTapValue();
Result CalibrateDll();
Result SetSpeedModeWithTapValue(SpeedMode speed_mode, u8 tap_value);
Result IssueTuningCommand(u32 command_index);
protected:
void SetDriveCodeOffsets(BusPower bus_power);
void CalibrateDriveStrength(BusPower bus_power);
virtual void SetPad() = 0;
virtual ClockResetController::Module GetClockResetModule() const = 0;
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual int GetInterruptNumber() const = 0;
virtual os::InterruptEventType *GetInterruptEvent() const = 0;
#endif
virtual bool IsNeedPeriodicDriveStrengthCalibration() = 0;
virtual void ClearPadParked() = 0;
virtual Result PowerOn(BusPower bus_power) = 0;
virtual void PowerOff() = 0;
virtual Result LowerBusPower() = 0;
virtual void SetSchmittTrigger(BusPower bus_power) = 0;
virtual u8 GetOutboundTapValue() const = 0;
virtual u8 GetDefaultInboundTapValue() const = 0;
virtual u8 GetVrefSelValue() const = 0;
virtual void SetSlewCodes() = 0;
virtual void GetAutoCalOffsets(u8 *out_auto_cal_pd_offset, u8 *out_auto_cal_pu_offset, BusPower bus_power) const = 0;
virtual void SetDriveStrengthToDefaultValues(BusPower bus_power) = 0;
public:
explicit SdmmcController(dd::PhysicalAddress registers_phys_addr) : SdHostStandardController(registers_phys_addr, SdmmcRegistersSize) {
/* Set sdmmc registers. */
static_assert(AMS_OFFSETOF(SdmmcRegisters, sd_host_standard_registers) == 0);
m_sdmmc_registers = reinterpret_cast<SdmmcRegisters *>(m_registers);
m_is_shutdown = true;
m_is_awake = true;
m_is_valid_tap_value_for_hs_400 = false;
m_drive_strength_calibration_status = sdmmc::ResultDriveStrengthCalibrationNotCompleted();
m_tap_value_for_hs_400 = 0;
m_current_speed_mode = SpeedMode_MmcIdentification;
m_bus_power_before_sleep = BusPower_Off;
m_bus_width_before_sleep = BusWidth_1Bit;
m_speed_mode_before_sleep = SpeedMode_MmcIdentification;
m_tap_value_before_sleep = 0;
m_is_powersaving_enable_before_sleep = false;
}
virtual void Initialize() override {
/* Set pad. */
this->SetPad();
/* Initialize our clock/reset module. */
ClockResetController::Initialize(this->GetClockResetModule());
/* If necessary, initialize our interrupt event. */
#if defined(AMS_SDMMC_USE_OS_EVENTS)
{
os::InterruptEventType *interrupt_event = this->GetInterruptEvent();
os::InitializeInterruptEvent(interrupt_event, this->GetInterruptNumber(), os::EventClearMode_ManualClear);
SdHostStandardController::PreSetInterruptEvent(interrupt_event);
}
#endif
/* Perform base initialization. */
SdHostStandardController::Initialize();
}
virtual void Finalize() override {
/* Perform base finalization. */
SdHostStandardController::Finalize();
/* If necessary, finalize our interrupt event. */
#if defined(AMS_SDMMC_USE_OS_EVENTS)
{
os::FinalizeInterruptEvent(this->GetInterruptEvent());
}
#endif
/* Finalize our clock/reset module. */
ClockResetController::Finalize(this->GetClockResetModule());
}
virtual Result Startup(BusPower bus_power, BusWidth bus_width, SpeedMode speed_mode, bool power_saving_enable) override;
virtual void Shutdown() override;
virtual void PutToSleep() override;
virtual Result Awaken() override;
virtual Result SwitchToSdr12() override;
virtual Result SetSpeedMode(SpeedMode speed_mode) override;
virtual SpeedMode GetSpeedMode() const override {
return m_current_speed_mode;
}
virtual void SetPowerSaving(bool en) override;
virtual void EnableDeviceClock() override;
virtual Result IssueCommand(const Command *command, TransferData *xfer_data, u32 *out_num_transferred_blocks) override;
virtual Result IssueStopTransmissionCommand(u32 *out_response) override;
virtual bool IsSupportedTuning() const override {
return true;
}
virtual Result Tuning(SpeedMode speed_mode, u32 command_index) override;
virtual void SaveTuningStatusForHs400() override;
virtual Result GetInternalStatus() const override {
return m_drive_strength_calibration_status;
}
};
constexpr inline dd::PhysicalAddress Sdmmc1RegistersPhysicalAddress = UINT64_C(0x700B0000);
class Sdmmc1Controller : public SdmmcController {
private:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
static constinit inline os::InterruptEventType s_interrupt_event{};
#endif
/* NOTE: This is a fascimile of pcv's Sdmmc1PowerController. */
class PowerController {
NON_COPYABLE(PowerController);
NON_MOVEABLE(PowerController);
private:
BusPower m_current_bus_power;
private:
Result ControlVddioSdmmc1(BusPower bus_power);
void SetSdmmcIoMode(bool is_3_3V);
void ControlRailSdmmc1Io(bool is_power_on);
public:
PowerController();
~PowerController();
Result PowerOn(BusPower bus_power);
Result PowerOff();
Result LowerBusPower();
};
private:
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
/* TODO: pinmux::PinmuxSession m_pinmux_session; */
#endif
BusPower m_current_bus_power;
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
bool m_is_pcv_control;
#endif
util::TypedStorage<PowerController> m_power_controller_storage;
PowerController *m_power_controller;
private:
Result PowerOnForRegisterControl(BusPower bus_power);
void PowerOffForRegisterControl();
Result LowerBusPowerForRegisterControl();
void SetSchmittTriggerForRegisterControl(BusPower bus_power);
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
Result PowerOnForPcvControl(BusPower bus_power);
void PowerOffForPcvControl();
Result LowerBusPowerForPcvControl();
void SetSchmittTriggerForPcvControl(BusPower bus_power);
#endif
protected:
virtual void SetPad() override {
/* Nothing is needed here. */
}
virtual ClockResetController::Module GetClockResetModule() const override {
return ClockResetController::Module_Sdmmc1;
}
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual int GetInterruptNumber() const override {
return 46;
}
virtual os::InterruptEventType *GetInterruptEvent() const override {
return std::addressof(s_interrupt_event);
}
#endif
virtual bool IsNeedPeriodicDriveStrengthCalibration() override {
return !IsSocMariko();
}
virtual void ClearPadParked() override {
/* Nothing is needed here. */
}
virtual Result PowerOn(BusPower bus_power) override;
virtual void PowerOff() override;
virtual Result LowerBusPower() override;
virtual void SetSchmittTrigger(BusPower bus_power) override;
virtual u8 GetOutboundTapValue() const override {
if (IsSocMariko()) {
return 0xE;
} else {
return 0x2;
}
}
virtual u8 GetDefaultInboundTapValue() const override {
if (IsSocMariko()) {
return 0xB;
} else {
return 0x4;
}
}
virtual u8 GetVrefSelValue() const override {
if (IsSocMariko()) {
return 0x0;
} else {
return 0x7;
}
}
virtual void SetSlewCodes() override {
if (IsSocMariko()) {
/* Do nothing. */
} else {
/* Ensure that we can control registers. */
SdHostStandardController::EnsureControl();
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
/* Write the slew values to APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL. */
reg::ReadWrite(apb_address + APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_CLK_CFG_CAL_DRVDN_SLWR, 0x1),
APB_MISC_REG_BITS_VALUE(GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_CLK_CFG_CAL_DRVDN_SLWF, 0x1));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL);
}
}
virtual void GetAutoCalOffsets(u8 *out_auto_cal_pd_offset, u8 *out_auto_cal_pu_offset, BusPower bus_power) const override {
/* Ensure that we can write the offsets. */
AMS_ABORT_UNLESS(out_auto_cal_pd_offset != nullptr);
AMS_ABORT_UNLESS(out_auto_cal_pu_offset != nullptr);
/* Set the offsets. */
if (IsSocMariko()) {
switch (bus_power) {
case BusPower_1_8V:
*out_auto_cal_pd_offset = 6;
*out_auto_cal_pu_offset = 6;
break;
case BusPower_3_3V:
*out_auto_cal_pd_offset = 0;
*out_auto_cal_pu_offset = 0;
break;
case BusPower_Off:
AMS_UNREACHABLE_DEFAULT_CASE();
}
} else {
switch (bus_power) {
case BusPower_1_8V:
*out_auto_cal_pd_offset = 0x7B;
*out_auto_cal_pu_offset = 0x7B;
break;
case BusPower_3_3V:
*out_auto_cal_pd_offset = 0x7D;
*out_auto_cal_pu_offset = 0;
break;
case BusPower_Off:
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
}
virtual void SetDriveStrengthToDefaultValues(BusPower bus_power) override {
/* Ensure that we can control registers. */
SdHostStandardController::EnsureControl();
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
/* Determine the drive code values. */
u8 drvdn, drvup;
if (IsSocMariko()) {
drvdn = 0x8;
drvup = 0x8;
} else {
switch (bus_power) {
case BusPower_1_8V:
drvdn = 0xF;
drvup = 0xB;
break;
case BusPower_3_3V:
drvdn = 0xC;
drvup = 0xC;
break;
case BusPower_Off:
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
/* Write the drv up/down values to APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL. */
reg::ReadWrite(apb_address + APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_PAD_CAL_DRVDN, drvdn),
APB_MISC_REG_BITS_VALUE(GP_SDMMC1_PAD_CFGPADCTRL_CFG2TMC_SDMMC1_PAD_CAL_DRVUP, drvup));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL);
}
public:
Sdmmc1Controller() : SdmmcController(Sdmmc1RegistersPhysicalAddress) {
m_current_bus_power = BusPower_Off;
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
m_is_pcv_control = false;
#endif
m_power_controller = nullptr;
}
virtual void Initialize() override;
virtual void Finalize() override;
void InitializeForRegisterControl();
void FinalizeForRegisterControl();
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
void InitializeForPcvControl();
void FinalizeForPcvControl();
#endif
virtual bool IsSupportedBusPower(BusPower bus_power) const override {
switch (bus_power) {
case BusPower_Off: return true;
case BusPower_1_8V: return true;
case BusPower_3_3V: return true;
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
virtual bool IsSupportedBusWidth(BusWidth bus_width) const override {
switch (bus_width) {
case BusWidth_1Bit: return true;
case BusWidth_4Bit: return true;
case BusWidth_8Bit: return false;
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
};
class Sdmmc2And4Controller : public SdmmcController {
protected:
virtual bool IsNeedPeriodicDriveStrengthCalibration() override {
return false;
}
virtual Result PowerOn(BusPower bus_power) override {
/* Power for SDMMC2/4 is assumed on, so we don't need to do anything. */
AMS_UNUSED(bus_power);
R_SUCCEED();
}
virtual void PowerOff() override {
/* Power for SDMMC2/4 is assumed on, so we don't need to do anything. */
}
virtual Result LowerBusPower() override {
AMS_ABORT("Sdmmc2And4Controller cannot lower bus power\n");
}
virtual void SetSchmittTrigger(BusPower bus_power) override {
/* Do nothing. */
AMS_UNUSED(bus_power);
}
virtual u8 GetOutboundTapValue() const override {
if (IsSocMariko()) {
return 0xD;
} else {
return 0x8;
}
}
virtual u8 GetDefaultInboundTapValue() const override {
if (IsSocMariko()) {
return 0xB;
} else {
return 0x0;
}
}
virtual u8 GetVrefSelValue() const override {
return 0x7;
}
virtual void SetSlewCodes() override {
/* Do nothing. */
}
virtual void GetAutoCalOffsets(u8 *out_auto_cal_pd_offset, u8 *out_auto_cal_pu_offset, BusPower bus_power) const override {
/* Ensure that we can write the offsets. */
AMS_ABORT_UNLESS(out_auto_cal_pd_offset != nullptr);
AMS_ABORT_UNLESS(out_auto_cal_pu_offset != nullptr);
/* Sdmmc2And4Controller only supports 1.8v. */
AMS_ABORT_UNLESS(bus_power == BusPower_1_8V);
/* Set the offsets. */
*out_auto_cal_pd_offset = 5;
*out_auto_cal_pu_offset = 5;
}
public:
explicit Sdmmc2And4Controller(dd::PhysicalAddress registers_phys_addr) : SdmmcController(registers_phys_addr) {
/* ... */
}
virtual bool IsSupportedBusPower(BusPower bus_power) const override {
switch (bus_power) {
case BusPower_Off: return true;
case BusPower_1_8V: return true;
case BusPower_3_3V: return false;
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
virtual bool IsSupportedBusWidth(BusWidth bus_width) const override {
switch (bus_width) {
case BusWidth_1Bit: return true;
case BusWidth_4Bit: return true;
case BusWidth_8Bit: return true;
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
};
constexpr inline dd::PhysicalAddress Sdmmc2RegistersPhysicalAddress = UINT64_C(0x700B0200);
class Sdmmc2Controller : public Sdmmc2And4Controller {
private:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
static constinit inline os::InterruptEventType s_interrupt_event{};
#endif
protected:
virtual void SetPad() override {
/* Nothing is needed here. */
}
virtual ClockResetController::Module GetClockResetModule() const override {
return ClockResetController::Module_Sdmmc2;
}
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual int GetInterruptNumber() const override {
return 47;
}
virtual os::InterruptEventType *GetInterruptEvent() const override {
return std::addressof(s_interrupt_event);
}
#endif
virtual void ClearPadParked() override {
if (IsSocMariko()) {
/* Nothing is needed here. */
} else {
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
/* Clear all MISC2PMC_EMMC2_*_PARK bits. */
reg::ReadWrite(apb_address + APB_MISC_GP_EMMC2_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_EMMC2_PAD_CFGPADCTRL_MISC2PMC_EMMC2_ALL_PARK, 0));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_EMMC2_PAD_CFGPADCTRL);
}
}
virtual void SetDriveStrengthToDefaultValues(BusPower bus_power) override {
/* SDMMC2 only supports 1.8v. */
AMS_ABORT_UNLESS(bus_power == BusPower_1_8V);
/* Ensure that we can control registers. */
SdHostStandardController::EnsureControl();
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
if (IsSocMariko()) {
/* Write the drv up/down values to APB_MISC_GP_SDMMC2_PAD_CFGPADCTRL. */
reg::ReadWrite(apb_address + APB_MISC_GP_SDMMC2_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_SDMMC2_PAD_CFGPADCTRL_CFG2TMC_SDMMC2_PAD_CAL_DRVDN, 0xA),
APB_MISC_REG_BITS_VALUE(GP_SDMMC2_PAD_CFGPADCTRL_CFG2TMC_SDMMC2_PAD_CAL_DRVUP, 0xA));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_SDMMC2_PAD_CFGPADCTRL);
} else {
/* Write the drv up/down values to APB_MISC_GP_EMMC4_PAD_CFGPADCTRL. */
reg::ReadWrite(apb_address + APB_MISC_GP_EMMC2_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_EMMC2_PAD_CFGPADCTRL_CFG2TMC_EMMC2_PAD_DRVDN_COMP, 0x10),
APB_MISC_REG_BITS_VALUE(GP_EMMC2_PAD_CFGPADCTRL_CFG2TMC_EMMC2_PAD_DRVUP_COMP, 0x10));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_EMMC2_PAD_CFGPADCTRL);
}
}
public:
Sdmmc2Controller() : Sdmmc2And4Controller(Sdmmc2RegistersPhysicalAddress) {
/* ... */
}
};
constexpr inline dd::PhysicalAddress Sdmmc4RegistersPhysicalAddress = UINT64_C(0x700B0600);
class Sdmmc4Controller : public Sdmmc2And4Controller {
private:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
static constinit inline os::InterruptEventType s_interrupt_event{};
#endif
protected:
virtual void SetPad() override {
if (IsSocMariko()) {
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
/* Enable Schmitt Trigger in emmc4 iobrick. */
reg::ReadWrite(apb_address + APB_MISC_GP_EMMC4_PAD_CFGPADCTRL, APB_MISC_REG_BITS_ENUM(GP_EMMC4_PAD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_E_SCH, ENABLE));
/* Clear CMD_PULLU, CLK_PULLD, DQS_PULLD. */
reg::ReadWrite(apb_address + APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_EMMC4_PAD_PUPD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_CMD_PUPD_PULLU, 0),
APB_MISC_REG_BITS_VALUE(GP_EMMC4_PAD_PUPD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_CLK_PUPD_PULLD, 0),
APB_MISC_REG_BITS_VALUE(GP_EMMC4_PAD_PUPD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_DQS_PUPD_PULLD, 0));
/* Read again to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL);
} else {
/* On Erista, we can just leave the reset value intact. */
}
}
virtual ClockResetController::Module GetClockResetModule() const override {
return ClockResetController::Module_Sdmmc4;
}
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual int GetInterruptNumber() const override {
return 63;
}
virtual os::InterruptEventType *GetInterruptEvent() const override {
return std::addressof(s_interrupt_event);
}
#endif
virtual void ClearPadParked() override {
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
/* Clear all MISC2PMC_EMMC4_*_PARK bits. */
reg::ReadWrite(apb_address + APB_MISC_GP_EMMC4_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_EMMC4_PAD_CFGPADCTRL_MISC2PMC_EMMC4_ALL_PARK, 0));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_EMMC4_PAD_CFGPADCTRL);
}
virtual void SetDriveStrengthToDefaultValues(BusPower bus_power) override {
/* SDMMC4 only supports 1.8v. */
AMS_ABORT_UNLESS(bus_power == BusPower_1_8V);
/* Ensure that we can control registers. */
SdHostStandardController::EnsureControl();
/* Get the apb registers address. */
const uintptr_t apb_address = dd::QueryIoMapping(ApbMiscRegistersPhysicalAddress, ApbMiscRegistersSize);
/* Determine the drv up/down values. */
u8 drvdn, drvup;
if (IsSocMariko()) {
drvdn = 0xA;
drvup = 0xA;
} else {
drvdn = 0x10;
drvup = 0x10;
}
/* Write the drv up/down values to APB_MISC_GP_EMMC4_PAD_CFGPADCTRL. */
reg::ReadWrite(apb_address + APB_MISC_GP_EMMC4_PAD_CFGPADCTRL, APB_MISC_REG_BITS_VALUE(GP_EMMC4_PAD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_DRVDN_COMP, drvdn),
APB_MISC_REG_BITS_VALUE(GP_EMMC4_PAD_CFGPADCTRL_CFG2TMC_EMMC4_PAD_DRVUP_COMP, drvup));
/* Read to be sure our config takes. */
reg::Read(apb_address + APB_MISC_GP_EMMC4_PAD_CFGPADCTRL);
}
public:
Sdmmc4Controller() : Sdmmc2And4Controller(Sdmmc4RegistersPhysicalAddress) {
/* ... */
}
};
}
| 29,939
|
C++
|
.h
| 578
| 35.185121
| 179
| 0.549031
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,149
|
sdmmc_mmc_device_accessor.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/sdmmc/impl/sdmmc_mmc_device_accessor.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include "sdmmc_base_device_accessor.hpp"
namespace ams::sdmmc::impl {
class MmcDevice : public BaseDevice {
private:
static constexpr u16 Rca = 2;
public:
#if defined(AMS_SDMMC_USE_OS_EVENTS)
virtual os::EventType *GetRemovedEvent() const override {
/* Mmc can't be removed. */
return nullptr;
}
#endif
virtual DeviceType GetDeviceType() const override {
return DeviceType_Mmc;
}
virtual u16 GetRca() const override {
return Rca;
}
void SetOcrAndHighCapacity(u32 ocr);
};
class MmcDeviceAccessor : public BaseDeviceAccessor {
private:
MmcDevice m_mmc_device;
void *m_work_buffer;
size_t m_work_buffer_size;
BusWidth m_max_bus_width;
SpeedMode m_max_speed_mode;
MmcPartition m_current_partition;
bool m_is_initialized;
private:
enum CommandSwitch {
CommandSwitch_SetBitsProductionStateAwarenessEnable = 0,
CommandSwitch_ClearBitsAutoModeEnable = 1,
CommandSwitch_WriteProductionStateAwarenessNormal = 2,
CommandSwitch_WriteProductionStateAwarenessPreSolderingWrites = 3,
CommandSwitch_WriteProductionStateAwarenessPreSolderingPostWrites = 4,
CommandSwitch_SetBitsBkopsEnAutoEn = 5,
CommandSwitch_WriteBusWidth1Bit = 6,
CommandSwitch_WriteBusWidth4Bit = 7,
CommandSwitch_WriteBusWidth8Bit = 8,
CommandSwitch_WriteBusWidth8BitDdr = 9,
CommandSwitch_WriteHsTimingLegacySpeed = 10,
CommandSwitch_WriteHsTimingHighSpeed = 11,
CommandSwitch_WriteHsTimingHs200 = 12,
CommandSwitch_WriteHsTimingHs400 = 13,
CommandSwitch_WritePartitionAccessDefault = 14,
CommandSwitch_WritePartitionAccessRwBootPartition1 = 15,
CommandSwitch_WritePartitionAccessRwBootPartition2 = 16,
};
static constexpr ALWAYS_INLINE u32 GetCommandSwitchArgument(CommandSwitch cs) {
switch (cs) {
case CommandSwitch_SetBitsProductionStateAwarenessEnable: return 0x01111000;
case CommandSwitch_ClearBitsAutoModeEnable: return 0x02112000;
case CommandSwitch_WriteProductionStateAwarenessNormal: return 0x03850000;
case CommandSwitch_WriteProductionStateAwarenessPreSolderingWrites: return 0x03850100;
case CommandSwitch_WriteProductionStateAwarenessPreSolderingPostWrites: return 0x03850200;
case CommandSwitch_SetBitsBkopsEnAutoEn: return 0x01A30200;
case CommandSwitch_WriteBusWidth1Bit: return 0x03B70000;
case CommandSwitch_WriteBusWidth4Bit: return 0x03B70100;
case CommandSwitch_WriteBusWidth8Bit: return 0x03B70200;
case CommandSwitch_WriteBusWidth8BitDdr: return 0x03B70600;
case CommandSwitch_WriteHsTimingLegacySpeed: return 0x03B90000;
case CommandSwitch_WriteHsTimingHighSpeed: return 0x03B90100;
case CommandSwitch_WriteHsTimingHs200: return 0x03B90200;
case CommandSwitch_WriteHsTimingHs400: return 0x03B90300;
case CommandSwitch_WritePartitionAccessDefault: return 0x03B30000;
case CommandSwitch_WritePartitionAccessRwBootPartition1: return 0x03B30100;
case CommandSwitch_WritePartitionAccessRwBootPartition2: return 0x03B30200;
AMS_UNREACHABLE_DEFAULT_CASE();
}
}
private:
Result IssueCommandSendOpCond(u32 *out_ocr, BusPower bus_power) const;
Result IssueCommandSetRelativeAddr() const;
Result IssueCommandSwitch(CommandSwitch cs) const;
Result IssueCommandSendExtCsd(void *dst, size_t dst_size) const;
Result IssueCommandEraseGroupStart(u32 sector_index) const;
Result IssueCommandEraseGroupEnd(u32 sector_index) const;
Result IssueCommandErase() const;
Result CancelToshibaMmcModel();
Result ChangeToReadyState(BusPower bus_power);
Result ExtendBusWidth(BusWidth max_bus_width);
Result EnableBkopsAuto();
Result ChangeToHighSpeed(bool check_before);
Result ChangeToHs200();
Result ChangeToHs400();
Result ExtendBusSpeed(u8 device_type, SpeedMode max_sm);
Result StartupMmcDevice(BusWidth max_bw, SpeedMode max_sm, void *wb, size_t wb_size);
protected:
virtual Result OnActivate() override;
virtual Result OnReadWrite(u32 sector_index, u32 num_sectors, void *buf, size_t buf_size, bool is_read) override;
virtual Result ReStartup() override;
public:
virtual void Initialize() override;
virtual void Finalize() override;
virtual Result GetSpeedMode(SpeedMode *out_speed_mode) const override;
public:
explicit MmcDeviceAccessor(IHostController *hc)
: BaseDeviceAccessor(hc), m_work_buffer(nullptr), m_work_buffer_size(0),
m_max_bus_width(BusWidth_8Bit), m_max_speed_mode(SpeedMode_MmcHs400), m_current_partition(MmcPartition_Unknown),
m_is_initialized(false)
{
/* ... */
}
void SetMmcWorkBuffer(void *wb, size_t wb_size) {
m_work_buffer = wb;
m_work_buffer_size = wb_size;
}
void PutMmcToSleep();
void AwakenMmc();
Result SelectMmcPartition(MmcPartition part);
Result EraseMmc();
Result GetMmcBootPartitionCapacity(u32 *out_num_sectors) const;
Result GetMmcExtendedCsd(void *dst, size_t dst_size) const;
};
}
| 7,656
|
C++
|
.h
| 133
| 44.56391
| 130
| 0.572607
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,150
|
crypto_aes_impl.arch.x64.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/crypto/impl/crypto_aes_impl.arch.x64.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
#include <x86intrin.h>
namespace ams::crypto::impl {
extern const bool g_is_aes_ni_available;
ALWAYS_INLINE bool IsAesNiAvailable() {
return g_is_aes_ni_available;
}
}
| 863
|
C++
|
.h
| 24
| 33.375
| 76
| 0.74491
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,151
|
crypto_update_impl.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/crypto/impl/crypto_update_impl.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <vapours.hpp>
namespace ams::crypto::impl {
template<typename Cipher, typename Self>
void UpdateImpl(Self *self, const void *src, size_t src_size) {
const size_t BlockSize = self->GetBlockSize();
const u8 *src_u8 = static_cast<const u8 *>(src);
size_t remaining = src_size;
if (const size_t buffered = self->GetBufferedDataSize(); buffered > 0) {
const size_t partial = std::min(BlockSize - buffered, remaining);
self->ProcessPartialData(src_u8, partial);
src_u8 += partial;
remaining -= partial;
}
if (remaining >= BlockSize) {
const size_t num_blocks = remaining / BlockSize;
self->template ProcessBlocks<Cipher>(src_u8, num_blocks);
const size_t processed = num_blocks * BlockSize;
src_u8 += processed;
remaining -= processed;
}
if (remaining > 0) {
self->ProcessRemainingData(src_u8, remaining);
}
}
template<typename Cipher, typename Self>
size_t UpdateImpl(Self *self, void *dst, size_t dst_size, const void *src, size_t src_size) {
AMS_UNUSED(dst_size);
const size_t BlockSize = self->GetBlockSize();
const u8 *src_u8 = static_cast<const u8 *>(src);
u8 *dst_u8 = static_cast<u8 *>(dst);
size_t remaining = src_size;
size_t total_processed = 0;
if (const size_t buffered = self->GetBufferedDataSize(); buffered > 0) {
const size_t partial = std::min(BlockSize - buffered, remaining);
const size_t processed = self->ProcessPartialData(dst_u8, src_u8, partial);
dst_u8 += processed;
total_processed += processed;
src_u8 += partial;
remaining -= partial;
}
if (remaining >= BlockSize) {
const size_t num_blocks = remaining / BlockSize;
const size_t input_size = num_blocks * BlockSize;
const size_t processed = self->template ProcessBlocks<Cipher>(dst_u8, src_u8, num_blocks);
dst_u8 += processed;
total_processed += processed;
src_u8 += input_size;
remaining -= input_size;
}
if (remaining > 0) {
const size_t processed = self->ProcessRemainingData(dst_u8, src_u8, remaining);
total_processed += processed;
}
return total_processed;
}
}
| 3,159
|
C++
|
.h
| 72
| 35.305556
| 102
| 0.616917
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,152
|
dd_cache_impl.os.macos.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/dd/impl/dd_cache_impl.os.macos.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
#include <stratosphere.hpp>
#else
#include <vapours.hpp>
#endif
namespace ams::dd::impl {
void StoreDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* On aarch64, we can use cache maintenance instructions. */
/* Get cache line size. */
uintptr_t ctr_el0 = 0;
__asm__ __volatile__("mrs %[ctr_el0], ctr_el0" : [ctr_el0]"=r"(ctr_el0));
const uintptr_t cache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
/* Invalidate the cache. */
const uintptr_t start_addr = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1);
const uintptr_t end_addr = reinterpret_cast<uintptr_t>(addr) + size;
for (uintptr_t cur = start_addr; cur < end_addr; cur += cache_line_size) {
__asm__ __volatile__("dc cvac, %[cur]" : : [cur]"r"(cur));
}
/* Add a memory barrier. */
__asm__ __volatile__("dsb sy" ::: "memory");
#elif defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for macOS dd::StoreDataCacheImpl"
#endif
}
void FlushDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* On aarch64, we can use cache maintenance instructions. */
/* Get cache line size. */
uintptr_t ctr_el0 = 0;
__asm__ __volatile__("mrs %[ctr_el0], ctr_el0" : [ctr_el0]"=r"(ctr_el0));
const uintptr_t cache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
/* Invalidate the cache. */
const uintptr_t start_addr = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1);
const uintptr_t end_addr = reinterpret_cast<uintptr_t>(addr) + size;
for (uintptr_t cur = start_addr; cur < end_addr; cur += cache_line_size) {
__asm__ __volatile__("dc civac, %[cur]" : : [cur]"r"(cur));
}
/* Add a memory barrier. */
__asm__ __volatile__("dsb sy" ::: "memory");
#elif defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for macOS dd::FlushDataCacheImpl"
#endif
}
void InvalidateDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* Just perform a flush, which is clean + invalidate. */
return FlushDataCacheImpl(addr, size);
#elif defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for macOS dd::InvalidateDataCacheImpl"
#endif
}
}
| 3,770
|
C++
|
.h
| 78
| 39.679487
| 100
| 0.6069
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,153
|
dd_select_cache_impl.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/dd/impl/dd_select_cache_impl.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#if defined(ATMOSPHERE_OS_HORIZON)
#include "dd_cache_impl.os.horizon.hpp"
#elif defined(ATMOSPHERE_OS_WINDOWS)
#include "dd_cache_impl.os.windows.hpp"
#elif defined(ATMOSPHERE_OS_LINUX)
#include "dd_cache_impl.os.linux.hpp"
#elif defined(ATMOSPHERE_OS_MACOS)
#include "dd_cache_impl.os.macos.hpp"
#else
#error "Unknown OS for ams::dd::CacheImpl"
#endif
| 1,023
|
C++
|
.h
| 27
| 35.592593
| 76
| 0.752764
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,154
|
dd_cache_impl.os.windows.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/dd/impl/dd_cache_impl.os.windows.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
#include <stratosphere.hpp>
#else
#include <vapours.hpp>
#endif
namespace ams::dd::impl {
void StoreDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for windows dd::StoreDataCacheImpl"
#endif
}
void FlushDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for windows dd::FlushDataCacheImpl"
#endif
}
void InvalidateDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for windows dd::InvalidateDataCacheImpl"
#endif
}
}
| 1,902
|
C++
|
.h
| 47
| 34.723404
| 92
| 0.690811
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,155
|
dd_cache_impl.os.linux.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/dd/impl/dd_cache_impl.os.linux.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
#include <stratosphere.hpp>
#else
#include <vapours.hpp>
#endif
namespace ams::dd::impl {
void StoreDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* On aarch64, we can use cache maintenance instructions. */
/* Get cache line size. */
uintptr_t ctr_el0 = 0;
__asm__ __volatile__("mrs %[ctr_el0], ctr_el0" : [ctr_el0]"=r"(ctr_el0));
const uintptr_t cache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
/* Invalidate the cache. */
const uintptr_t start_addr = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1);
const uintptr_t end_addr = reinterpret_cast<uintptr_t>(addr) + size;
for (uintptr_t cur = start_addr; cur < end_addr; cur += cache_line_size) {
__asm__ __volatile__("dc cvac, %[cur]" : : [cur]"r"(cur));
}
/* Add a memory barrier. */
__asm__ __volatile__("dsb sy" ::: "memory");
#elif defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for linux dd::StoreDataCacheImpl"
#endif
}
void FlushDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* On aarch64, we can use cache maintenance instructions. */
/* Get cache line size. */
uintptr_t ctr_el0 = 0;
__asm__ __volatile__("mrs %[ctr_el0], ctr_el0" : [ctr_el0]"=r"(ctr_el0));
const uintptr_t cache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
/* Invalidate the cache. */
const uintptr_t start_addr = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1);
const uintptr_t end_addr = reinterpret_cast<uintptr_t>(addr) + size;
for (uintptr_t cur = start_addr; cur < end_addr; cur += cache_line_size) {
__asm__ __volatile__("dc civac, %[cur]" : : [cur]"r"(cur));
}
/* Add a memory barrier. */
__asm__ __volatile__("dsb sy" ::: "memory");
#elif defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for linux dd::FlushDataCacheImpl"
#endif
}
void InvalidateDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* Just perform a flush, which is clean + invalidate. */
return FlushDataCacheImpl(addr, size);
#elif defined(ATMOSPHERE_ARCH_X64) || defined(ATMOSPHERE_ARCH_X86)
/* Don't do anything, cache maintenance isn't available/relevant to userland. */
AMS_UNUSED(addr, size);
#else
#error "Unknown architecture for linux dd::InvalidateDataCacheImpl"
#endif
}
}
| 3,770
|
C++
|
.h
| 78
| 39.679487
| 100
| 0.6069
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,156
|
dd_cache_impl.os.horizon.hpp
|
Atmosphere-NX_Atmosphere/libraries/libvapours/source/dd/impl/dd_cache_impl.os.horizon.hpp
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
#include <stratosphere.hpp>
#else
#include <vapours.hpp>
#endif
namespace ams::dd::impl {
void StoreDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* On aarch64, we can use cache maintenance instructions. */
/* Get cache line size. */
uintptr_t ctr_el0 = 0;
__asm__ __volatile__("mrs %[ctr_el0], ctr_el0" : [ctr_el0]"=r"(ctr_el0));
const uintptr_t cache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
/* Get the thread local region. */
auto * const tlr = svc::GetThreadLocalRegion();
/* Note to the kernel that we're performing cache maintenance, in case we get interrupted while touching cache lines. */
tlr->cache_maintenance_flag = 1;
ON_SCOPE_EXIT { tlr->cache_maintenance_flag = 0; };
#endif
/* Invalidate the cache. */
const uintptr_t start_addr = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1);
const uintptr_t end_addr = reinterpret_cast<uintptr_t>(addr) + size;
for (uintptr_t cur = start_addr; cur < end_addr; cur += cache_line_size) {
__asm__ __volatile__("dc cvac, %[cur]" : : [cur]"r"(cur));
}
/* Add a memory barrier. */
__asm__ __volatile__("dsb sy" ::: "memory");
#else
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
/* Invoke the relevant svc. */
const auto result = svc::StoreProcessDataCache(svc::PseudoHandle::CurrentProcess, reinterpret_cast<uintptr_t>(addr), size);
R_ASSERT(result);
#elif defined(ATMOSPHERE_IS_EXOSPHERE) && defined(__BPMP__)
return hw::StoreDataCache(addr, size);
#else
#error "Unknown execution context for ams::dd::impl::StoreDataCacheImpl"
#endif
#endif
}
void FlushDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_ARCH_ARM64)
/* On aarch64, we can use cache maintenance instructions. */
/* Get cache line size. */
uintptr_t ctr_el0 = 0;
__asm__ __volatile__("mrs %[ctr_el0], ctr_el0" : [ctr_el0]"=r"(ctr_el0));
const uintptr_t cache_line_size = 4 << ((ctr_el0 >> 16) & 0xF);
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
/* Get the thread local region. */
auto * const tlr = svc::GetThreadLocalRegion();
/* Note to the kernel that we're performing cache maintenance, in case we get interrupted while touching cache lines. */
tlr->cache_maintenance_flag = 1;
ON_SCOPE_EXIT { tlr->cache_maintenance_flag = 0; };
#endif
/* Invalidate the cache. */
const uintptr_t start_addr = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1);
const uintptr_t end_addr = reinterpret_cast<uintptr_t>(addr) + size;
for (uintptr_t cur = start_addr; cur < end_addr; cur += cache_line_size) {
__asm__ __volatile__("dc civac, %[cur]" : : [cur]"r"(cur));
}
/* Add a memory barrier. */
__asm__ __volatile__("dsb sy" ::: "memory");
#else
#if defined(ATMOSPHERE_IS_STRATOSPHERE)
/* Invoke the relevant svc. */
const auto result = svc::FlushProcessDataCache(svc::PseudoHandle::CurrentProcess, reinterpret_cast<uintptr_t>(addr), size);
R_ASSERT(result);
#elif defined(ATMOSPHERE_IS_EXOSPHERE) && defined(__BPMP__)
return hw::FlushDataCache(addr, size);
#else
#error "Unknown execution context for ams::dd::impl::FlushDataCacheImpl"
#endif
#endif
}
void InvalidateDataCacheImpl(void *addr, size_t size) {
#if defined(ATMOSPHERE_IS_EXOSPHERE) && defined(__BPMP__)
return hw::InvalidateDataCache(addr, size);
#else
/* Just perform a flush, which is clean + invalidate. */
return FlushDataCacheImpl(addr, size);
#endif
}
}
| 4,891
|
C++
|
.h
| 99
| 39.383838
| 139
| 0.594306
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,157
|
exceptions.h
|
Atmosphere-NX_Atmosphere/thermosphere/src/exceptions.h
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __EXCEPTION_H__
#define __EXCEPTION_H__
/**
* Borrowed fom Xen (not copyrightable as these are facts).
* Description of the EL2 exception syndrome register.
*/
#define HSR_EC_UNKNOWN 0x00
#define HSR_EC_WFI_WFE 0x01
#define HSR_EC_CP15_32 0x03
#define HSR_EC_CP15_64 0x04
#define HSR_EC_CP14_32 0x05 /* Trapped MCR or MRC access to CP14 */
#define HSR_EC_CP14_DBG 0x06 /* Trapped LDC/STC access to CP14 (only for debug registers) */
#define HSR_EC_CP 0x07 /* HCPTR-trapped access to CP0-CP13 */
#define HSR_EC_CP10 0x08
#define HSR_EC_JAZELLE 0x09
#define HSR_EC_BXJ 0x0a
#define HSR_EC_CP14_64 0x0c
#define HSR_EC_SVC32 0x11
#define HSR_EC_HVC32 0x12
#define HSR_EC_SMC32 0x13
#define HSR_EC_HVC64 0x16
#define HSR_EC_SMC64 0x17
#define HSR_EC_SYSREG 0x18
#define HSR_EC_INSTR_ABORT_LOWER_EL 0x20
#define HSR_EC_INSTR_ABORT_CURR_EL 0x21
#define HSR_EC_DATA_ABORT_LOWER_EL 0x24
#define HSR_EC_DATA_ABORT_CURR_EL 0x25
#define HSR_EC_BRK 0x3c
/**
* Borrowed fom Xen (not copyrightable as these are facts).
* Description of the EL2 exception syndrome register.
*/
union esr {
uint32_t bits;
struct {
unsigned long iss:25; /* Instruction Specific Syndrome */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
};
/* Common to all conditional exception classes (0x0N, except 0x00). */
struct hsr_cond {
unsigned long iss:20; /* Instruction Specific Syndrome */
unsigned long cc:4; /* Condition Code */
unsigned long ccvalid:1;/* CC Valid */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} cond;
struct hsr_wfi_wfe {
unsigned long ti:1; /* Trapped instruction */
unsigned long sbzp:19;
unsigned long cc:4; /* Condition Code */
unsigned long ccvalid:1;/* CC Valid */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} wfi_wfe;
/* reg, reg0, reg1 are 4 bits on AArch32, the fifth bit is sbzp. */
struct hsr_cp32 {
unsigned long read:1; /* Direction */
unsigned long crm:4; /* CRm */
unsigned long reg:5; /* Rt */
unsigned long crn:4; /* CRn */
unsigned long op1:3; /* Op1 */
unsigned long op2:3; /* Op2 */
unsigned long cc:4; /* Condition Code */
unsigned long ccvalid:1;/* CC Valid */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} cp32; /* HSR_EC_CP15_32, CP14_32, CP10 */
struct hsr_cp64 {
unsigned long read:1; /* Direction */
unsigned long crm:4; /* CRm */
unsigned long reg1:5; /* Rt1 */
unsigned long reg2:5; /* Rt2 */
unsigned long sbzp2:1;
unsigned long op1:4; /* Op1 */
unsigned long cc:4; /* Condition Code */
unsigned long ccvalid:1;/* CC Valid */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} cp64; /* HSR_EC_CP15_64, HSR_EC_CP14_64 */
struct hsr_cp {
unsigned long coproc:4; /* Number of coproc accessed */
unsigned long sbz0p:1;
unsigned long tas:1; /* Trapped Advanced SIMD */
unsigned long res0:14;
unsigned long cc:4; /* Condition Code */
unsigned long ccvalid:1;/* CC Valid */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} cp; /* HSR_EC_CP */
struct hsr_sysreg {
unsigned long read:1; /* Direction */
unsigned long crm:4; /* CRm */
unsigned long reg:5; /* Rt */
unsigned long crn:4; /* CRn */
unsigned long op1:3; /* Op1 */
unsigned long op2:3; /* Op2 */
unsigned long op0:2; /* Op0 */
unsigned long res0:3;
unsigned long len:1; /* Instruction length */
unsigned long ec:6;
} sysreg; /* HSR_EC_SYSREG */
struct hsr_iabt {
unsigned long ifsc:6; /* Instruction fault status code */
unsigned long res0:1;
unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
unsigned long res1:1;
unsigned long eat:1; /* External abort type */
unsigned long res2:15;
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} iabt; /* HSR_EC_INSTR_ABORT_* */
struct hsr_dabt {
unsigned long dfsc:6; /* Data Fault Status Code */
unsigned long write:1; /* Write / not Read */
unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
unsigned long cache:1; /* Cache Maintenance */
unsigned long eat:1; /* External Abort Type */
unsigned long sbzp0:4;
unsigned long ar:1; /* Acquire Release */
unsigned long sf:1; /* Sixty Four bit register */
unsigned long reg:5; /* Register */
unsigned long sign:1; /* Sign extend */
unsigned long size:2; /* Access Size */
unsigned long valid:1; /* Syndrome Valid */
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} dabt; /* HSR_EC_DATA_ABORT_* */
struct hsr_brk {
unsigned long comment:16; /* Comment */
unsigned long res0:9;
unsigned long len:1; /* Instruction length */
unsigned long ec:6; /* Exception Class */
} brk;
};
/**
* Structure that stores the saved register values on a hypercall.
*/
struct guest_state {
uint64_t pc;
uint64_t cpsr;
uint64_t elr_el1;
uint64_t spsr_el1;
uint64_t sp_el0;
uint64_t sp_el1;
union esr esr_el2;
uint64_t x[31];
}
__attribute__((packed));
#endif
| 6,815
|
C++
|
.h
| 165
| 35.509091
| 111
| 0.595626
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,158
|
regs.h
|
Atmosphere-NX_Atmosphere/thermosphere/src/regs.h
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __REGS_H__
#define __REGS_H__
/**
* Access to system registers.
*/
#define WRITE_SYSREG(sysreg, val, type) \
asm volatile ("msr "#sysreg", %0\n" : : "r"((type)(val)))
#define READ_SYSREG(sysreg, val, type) \
asm volatile ("mrs %0, "#sysreg"\n" : "=r"((type)(val)))
#define READ_SYSREG_32(sysreg, val) READ_SYSREG(sysreg, val, uint32_t)
#define WRITE_SYSREG_32(sysreg, val) WRITE_SYSREG(sysreg, val, uint32_t)
#define READ_SYSREG_64(sysreg, val) READ_SYSREG(sysreg, val, uint64_t)
#define WRITE_SYSREG_64(sysreg, val) WRITE_SYSREG(sysreg, val, uint64_t)
/**
* Returns the system's current Execution Level (EL).
*/
inline static uint32_t get_current_el(void) {
uint32_t val;
// Read the CurrentEl register, and extract the bits that tell us our EL.
READ_SYSREG_32(CurrentEl, val);
return val >> 2;
}
/**
* Sets the base address of the EL2 exception table.
*/
inline static void set_vbar_el2(void * address) {
WRITE_SYSREG_64(vbar_el2, (uint64_t)address);
}
/**
* Sets the address to 'return to' when leaving EL2.
*/
inline static void set_elr_el2(void * address) {
WRITE_SYSREG_64(elr_el2, (uint64_t)address);
}
/**
* Returns the MMU status bit from the SCTLR register.
*/
inline static uint32_t get_el2_mmu_status(void) {
uint32_t val;
// Read the CurrentEl register, and extract the bits that tell us our EL.
READ_SYSREG_32(sctlr_el2, val);
return val & 1;
}
#endif
| 2,101
|
C++
|
.h
| 59
| 33.152542
| 77
| 0.703156
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,159
|
printk.h
|
Atmosphere-NX_Atmosphere/thermosphere/src/lib/printk.h
|
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
void printk(char *fmt, ...);
| 666
|
C++
|
.h
| 16
| 39.625
| 76
| 0.75
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,160
|
vsprintf.h
|
Atmosphere-NX_Atmosphere/thermosphere/src/lib/vsprintf.h
|
/*
* Copyright (C) 2011 Andrei Warkentin <andrey.warkentin@gmail.com>
*
* This program is free software ; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <stdarg.h>
#include <stdlib.h>
#ifndef VSPRINTF_H
#define VSPRINTF_H
struct va_format {
const char *fmt;
va_list *va;
};
unsigned long long simple_strtoull(const char *cp, char **endp, unsigned int base);
int vsnprintf(char *buf, size_t size, const char *fmt, va_list args);
int sscanf(const char *buf, const char *fmt, ...);
#endif /* VSPRINTF_H */
| 648
|
C++
|
.h
| 19
| 31.631579
| 83
| 0.722311
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,162
|
FS_structs.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/FS_structs.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_STRUCTS_H__
#define __FS_STRUCTS_H__
#include "../utils/types.h"
typedef struct
{
char *device_addr_buffer;
uint64_t device_addr_buffer_size;
char *device_addr_buffer_masked;
} sdmmc_dma_buffer_t;
_Static_assert(__alignof(sdmmc_dma_buffer_t) == 8, "sdmmc_dma_buffer_t definition");
typedef struct sdmmc_accessor_vt
{
void *ctor;
void *dtor;
void *map_device_addr_space;
void *unmap_device_addr_space;
uint64_t (*sdmmc_accessor_controller_open)(void *);
uint64_t (*sdmmc_accessor_controller_close)(void *);
uint64_t (*read_write)(void *, uint64_t, uint64_t, void *, uint64_t, uint64_t);
// More not included because we don't use it.
} sdmmc_accessor_vt_t;
_Static_assert(__alignof(sdmmc_accessor_vt_t) == 8, "sdmmc_accessor_vt_t definition");
typedef struct
{
void *vtab;
t210_sdmmc_t *io_map;
sdmmc_dma_buffer_t dmaBuffers[3];
// More not included because we don't use it.
} mmc_obj_t;
typedef struct
{
sdmmc_accessor_vt_t *vtab;
mmc_obj_t *parent;
// More not included because we don't use it.
} sdmmc_accessor_t;
#endif // __FS_STRUCTS_H__
| 1,817
|
C++
|
.h
| 52
| 32.096154
| 86
| 0.713554
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,163
|
FS_offsets.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/FS_offsets.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_OFFSETS_H__
#define __FS_OFFSETS_H__
#include <stdint.h>
#include "FS_versions.h"
typedef struct {
int opcode_reg;
uint32_t adrp_offset;
uint32_t add_rel_offset;
} fs_offsets_nintendo_path_t;
typedef struct {
// Accessor vtable getters
uintptr_t sdmmc_accessor_gc;
uintptr_t sdmmc_accessor_sd;
uintptr_t sdmmc_accessor_nand;
// Hooks
uintptr_t sdmmc_wrapper_read;
uintptr_t sdmmc_wrapper_write;
uintptr_t rtld;
uintptr_t rtld_destination;
uintptr_t clkrst_set_min_v_clock_rate;
// Misc funcs
uintptr_t lock_mutex;
uintptr_t unlock_mutex;
uintptr_t sdmmc_accessor_controller_open;
uintptr_t sdmmc_accessor_controller_close;
// Misc data
uintptr_t sd_mutex;
uintptr_t nand_mutex;
uintptr_t active_partition;
uintptr_t sdmmc_das_handle;
// NOPs
uintptr_t sd_das_init;
// Nintendo Paths
fs_offsets_nintendo_path_t nintendo_paths[];
} fs_offsets_t;
const fs_offsets_t *get_fs_offsets(enum FS_VER version);
#endif // __FS_OFFSETS_H__
| 1,736
|
C++
|
.h
| 53
| 29.320755
| 76
| 0.722123
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,164
|
FS.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/FS.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_H__
#define __FS_H__
// TODO
#include "../emmc/sdmmc_t210.h"
#include "FS_versions.h"
#include "FS_offsets.h"
#include "FS_structs.h"
#define FS_SDMMC_EMMC 0
#define FS_SDMMC_SD 1
#define FS_SDMMC_GC 2
#define FS_EMMC_PARTITION_GPP 0
#define FS_EMMC_PARTITION_BOOT0 1
#define FS_EMMC_PARTITION_BOOT1 2
#define FS_EMMC_PARTITION_INVALID 3
#define BOOT_PARTITION_SIZE 0x2000
#define FS_READ_WRITE_ERROR 1048
#define NAND_PATROL_SECTOR 0xC20
#define NAND_PATROL_OFFSET 0x184000
typedef struct _fs_nand_patrol_t
{
uint8_t hmac[0x20];
unsigned int offset;
unsigned int count;
uint8_t rsvd[0x1D8];
} fs_nand_patrol_t;
#endif /* __FS_H__ */
| 1,341
|
C++
|
.h
| 42
| 30.261905
| 76
| 0.756589
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,165
|
FS_versions.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/FS_versions.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_VERSIONS_H__
#define __FS_VERSIONS_H__
// FS Version enum
enum FS_VER
{
FS_VER_1_0_0 = 0,
FS_VER_2_0_0,
FS_VER_2_0_0_EXFAT,
FS_VER_2_1_0,
FS_VER_2_1_0_EXFAT,
FS_VER_3_0_0,
FS_VER_3_0_0_EXFAT,
FS_VER_3_0_1,
FS_VER_3_0_1_EXFAT,
FS_VER_4_0_0,
FS_VER_4_0_0_EXFAT,
FS_VER_4_1_0,
FS_VER_4_1_0_EXFAT,
FS_VER_5_0_0,
FS_VER_5_0_0_EXFAT,
FS_VER_5_1_0,
FS_VER_5_1_0_EXFAT,
FS_VER_6_0_0,
FS_VER_6_0_0_EXFAT,
FS_VER_7_0_0,
FS_VER_7_0_0_EXFAT,
FS_VER_8_0_0,
FS_VER_8_0_0_EXFAT,
FS_VER_8_1_0,
FS_VER_8_1_0_EXFAT,
FS_VER_9_0_0,
FS_VER_9_0_0_EXFAT,
FS_VER_9_1_0,
FS_VER_9_1_0_EXFAT,
FS_VER_10_0_0,
FS_VER_10_0_0_EXFAT,
FS_VER_10_2_0,
FS_VER_10_2_0_EXFAT,
FS_VER_11_0_0,
FS_VER_11_0_0_EXFAT,
FS_VER_12_0_0,
FS_VER_12_0_0_EXFAT,
FS_VER_12_0_3,
FS_VER_12_0_3_EXFAT,
FS_VER_13_0_0,
FS_VER_13_0_0_EXFAT,
FS_VER_13_1_0,
FS_VER_13_1_0_EXFAT,
FS_VER_14_0_0,
FS_VER_14_0_0_EXFAT,
FS_VER_15_0_0,
FS_VER_15_0_0_EXFAT,
FS_VER_16_0_0,
FS_VER_16_0_0_EXFAT,
FS_VER_16_0_3,
FS_VER_16_0_3_EXFAT,
FS_VER_17_0_0,
FS_VER_17_0_0_EXFAT,
FS_VER_18_0_0,
FS_VER_18_0_0_EXFAT,
FS_VER_18_1_0,
FS_VER_18_1_0_EXFAT,
FS_VER_19_0_0,
FS_VER_19_0_0_EXFAT,
FS_VER_MAX,
};
#endif // __FS_VERSIONS_H__
| 2,116
|
C++
|
.h
| 83
| 21.024096
| 76
| 0.615
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,166
|
600.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/offsets/600.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_600_H__
#define __FS_600_H__
// Accessor vtable getters
#define FS_OFFSET_600_SDMMC_ACCESSOR_GC 0x153780
#define FS_OFFSET_600_SDMMC_ACCESSOR_SD 0x1534F0
#define FS_OFFSET_600_SDMMC_ACCESSOR_NAND 0x14F990
// Hooks
#define FS_OFFSET_600_SDMMC_WRAPPER_READ 0x1485A0
#define FS_OFFSET_600_SDMMC_WRAPPER_WRITE 0x148680
#define FS_OFFSET_600_RTLD 0x5B0
#define FS_OFFSET_600_RTLD_DESTINATION 0x98
#define FS_OFFSET_600_CLKRST_SET_MIN_V_CLK_RATE 0x0
// Misc funcs
#define FS_OFFSET_600_LOCK_MUTEX 0x1412C0
#define FS_OFFSET_600_UNLOCK_MUTEX 0x141310
#define FS_OFFSET_600_SDMMC_WRAPPER_CONTROLLER_OPEN 0
#define FS_OFFSET_600_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x148500
// Misc Data
#define FS_OFFSET_600_SD_MUTEX 0xF06268
#define FS_OFFSET_600_NAND_MUTEX 0xF01BA0
#define FS_OFFSET_600_ACTIVE_PARTITION 0xF01BE0
#define FS_OFFSET_600_SDMMC_DAS_HANDLE 0xE01670
// NOPs
#define FS_OFFSET_600_SD_DAS_INIT 0x0
// Nintendo Paths
#define FS_OFFSET_600_NINTENDO_PATHS \
{ \
{.opcode_reg = 3, .adrp_offset = 0x000790DC, .add_rel_offset = 4}, \
{.opcode_reg = 3, .adrp_offset = 0x0007A924, .add_rel_offset = 4}, \
{.opcode_reg = 3, .adrp_offset = 0x0007AB18, .add_rel_offset = 4}, \
{.opcode_reg = 3, .adrp_offset = 0x0007AEF4, .add_rel_offset = 4}, \
{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0} \
}
#endif // __FS_600_H__
| 2,115
|
C++
|
.h
| 50
| 40.42
| 76
| 0.719844
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,167
|
600_exfat.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/offsets/600_exfat.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_600_EXFAT_H__
#define __FS_600_EXFAT_H__
// Accessor vtable getters
#define FS_OFFSET_600_EXFAT_SDMMC_ACCESSOR_GC 0x15EE80
#define FS_OFFSET_600_EXFAT_SDMMC_ACCESSOR_SD 0x15EBF0
#define FS_OFFSET_600_EXFAT_SDMMC_ACCESSOR_NAND 0x15B090
// Hooks
#define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_READ 0x153CA0
#define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_WRITE 0x153D80
#define FS_OFFSET_600_EXFAT_RTLD 0x5B0
#define FS_OFFSET_600_EXFAT_RTLD_DESTINATION 0x98
#define FS_OFFSET_600_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x0
// Misc funcs
#define FS_OFFSET_600_EXFAT_LOCK_MUTEX 0x14C9C0
#define FS_OFFSET_600_EXFAT_UNLOCK_MUTEX 0x14CA10
#define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN 0
#define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x153C00
// Misc Data
#define FS_OFFSET_600_EXFAT_SD_MUTEX 0xFEB268
#define FS_OFFSET_600_EXFAT_NAND_MUTEX 0xFE6BA0
#define FS_OFFSET_600_EXFAT_ACTIVE_PARTITION 0xFE6BE0
#define FS_OFFSET_600_EXFAT_SDMMC_DAS_HANDLE 0xEE6670
// NOPs
#define FS_OFFSET_600_EXFAT_SD_DAS_INIT 0x0
// Nintendo Paths
#define FS_OFFSET_600_EXFAT_NINTENDO_PATHS \
{ \
{.opcode_reg = 3, .adrp_offset = 0x000847DC, .add_rel_offset = 4}, \
{.opcode_reg = 3, .adrp_offset = 0x00086024, .add_rel_offset = 4}, \
{.opcode_reg = 3, .adrp_offset = 0x00086218, .add_rel_offset = 4}, \
{.opcode_reg = 3, .adrp_offset = 0x000865F4, .add_rel_offset = 4}, \
{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0} \
}
#endif // __FS_600_EXFAT_H__
| 2,241
|
C++
|
.h
| 50
| 42.94
| 76
| 0.726398
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,168
|
900_exfat.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/offsets/900_exfat.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_900_EXFAT_H__
#define __FS_900_EXFAT_H__
// Accessor vtable getters
#define FS_OFFSET_900_EXFAT_SDMMC_ACCESSOR_GC 0x1430F0
#define FS_OFFSET_900_EXFAT_SDMMC_ACCESSOR_SD 0x141200
#define FS_OFFSET_900_EXFAT_SDMMC_ACCESSOR_NAND 0x13C080
// Hooks
#define FS_OFFSET_900_EXFAT_SDMMC_WRAPPER_READ 0x1377E0
#define FS_OFFSET_900_EXFAT_SDMMC_WRAPPER_WRITE 0x1378C0
#define FS_OFFSET_900_EXFAT_RTLD 0x454
#define FS_OFFSET_900_EXFAT_RTLD_DESTINATION 0x9C
#define FS_OFFSET_900_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x136A00
// Misc funcs
#define FS_OFFSET_900_EXFAT_LOCK_MUTEX 0x25280
#define FS_OFFSET_900_EXFAT_UNLOCK_MUTEX 0x252D0
#define FS_OFFSET_900_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN 0
#define FS_OFFSET_900_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x137740
// Misc Data
#define FS_OFFSET_900_EXFAT_SD_MUTEX 0xE2B3E8
#define FS_OFFSET_900_EXFAT_NAND_MUTEX 0xE26258
#define FS_OFFSET_900_EXFAT_ACTIVE_PARTITION 0xE26298
#define FS_OFFSET_900_EXFAT_SDMMC_DAS_HANDLE 0xE0CFA0
// NOPs
#define FS_OFFSET_900_EXFAT_SD_DAS_INIT 0x1472BC
// Nintendo Paths
#define FS_OFFSET_900_EXFAT_NINTENDO_PATHS \
{ \
{.opcode_reg = 3, .adrp_offset = 0x00068A60, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x00070A40, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x00081CB4, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x00081EF4, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 4, .adrp_offset = 0x0008211C, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
}
#endif // __FS_900_EXFAT_H__
| 2,350
|
C++
|
.h
| 51
| 44.490196
| 78
| 0.734061
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,169
|
1810.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/offsets/1810.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_1810_H__
#define __FS_1810_H__
// Accessor vtable getters
#define FS_OFFSET_1810_SDMMC_ACCESSOR_GC 0x18AB00
#define FS_OFFSET_1810_SDMMC_ACCESSOR_SD 0x18C800
#define FS_OFFSET_1810_SDMMC_ACCESSOR_NAND 0x18AFE0
// Hooks
#define FS_OFFSET_1810_SDMMC_WRAPPER_READ 0x186A50
#define FS_OFFSET_1810_SDMMC_WRAPPER_WRITE 0x186AB0
#define FS_OFFSET_1810_RTLD 0x2A3A4
#define FS_OFFSET_1810_RTLD_DESTINATION ((uintptr_t)(INT64_C(-0x44)))
#define FS_OFFSET_1810_CLKRST_SET_MIN_V_CLK_RATE 0x1A77D0
// Misc funcs
#define FS_OFFSET_1810_LOCK_MUTEX 0x17FCC0
#define FS_OFFSET_1810_UNLOCK_MUTEX 0x17FD10
#define FS_OFFSET_1810_SDMMC_WRAPPER_CONTROLLER_OPEN 0x186A10
#define FS_OFFSET_1810_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x186A30
// Misc Data
#define FS_OFFSET_1810_SD_MUTEX 0xFD13F0
#define FS_OFFSET_1810_NAND_MUTEX 0xFCCB28
#define FS_OFFSET_1810_ACTIVE_PARTITION 0xFCCB68
#define FS_OFFSET_1810_SDMMC_DAS_HANDLE 0xFB1950
// NOPs
#define FS_OFFSET_1810_SD_DAS_INIT 0x28F24
// Nintendo Paths
#define FS_OFFSET_1810_NINTENDO_PATHS \
{ \
{.opcode_reg = 3, .adrp_offset = 0x00068B08, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x000758DC, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 4, .adrp_offset = 0x0007C77C, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 4, .adrp_offset = 0x000905C4, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
}
#endif // __FS_1810_H__
| 2,201
|
C++
|
.h
| 50
| 42.44
| 78
| 0.732493
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,170
|
1603_exfat.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/offsets/1603_exfat.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_1603_EXFAT_H__
#define __FS_1603_EXFAT_H__
// Accessor vtable getters
#define FS_OFFSET_1603_EXFAT_SDMMC_ACCESSOR_GC 0x190FD0
#define FS_OFFSET_1603_EXFAT_SDMMC_ACCESSOR_SD 0x192C50
#define FS_OFFSET_1603_EXFAT_SDMMC_ACCESSOR_NAND 0x191490
// Hooks
#define FS_OFFSET_1603_EXFAT_SDMMC_WRAPPER_READ 0x18CF20
#define FS_OFFSET_1603_EXFAT_SDMMC_WRAPPER_WRITE 0x18CF80
#define FS_OFFSET_1603_EXFAT_RTLD 0x269B0
#define FS_OFFSET_1603_EXFAT_RTLD_DESTINATION ((uintptr_t)(INT64_C(-0x3C)))
#define FS_OFFSET_1603_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x1ADA60
// Misc funcs
#define FS_OFFSET_1603_EXFAT_LOCK_MUTEX 0x186460
#define FS_OFFSET_1603_EXFAT_UNLOCK_MUTEX 0x1864B0
#define FS_OFFSET_1603_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN 0x18CEE0
#define FS_OFFSET_1603_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x18CF00
// Misc Data
#define FS_OFFSET_1603_EXFAT_SD_MUTEX 0x100D3F0
#define FS_OFFSET_1603_EXFAT_NAND_MUTEX 0x1008B58
#define FS_OFFSET_1603_EXFAT_ACTIVE_PARTITION 0x1008B98
#define FS_OFFSET_1603_EXFAT_SDMMC_DAS_HANDLE 0xFE98B0
// NOPs
#define FS_OFFSET_1603_EXFAT_SD_DAS_INIT 0x258D4
// Nintendo Paths
#define FS_OFFSET_1603_EXFAT_NINTENDO_PATHS \
{ \
{.opcode_reg = 3, .adrp_offset = 0x00063B98, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x00070DBC, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 4, .adrp_offset = 0x0007795C, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 4, .adrp_offset = 0x0008A7A4, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
}
#endif // __FS_1603_EXFAT_H__
| 2,330
|
C++
|
.h
| 50
| 45.02
| 78
| 0.738441
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
9,171
|
1100.h
|
Atmosphere-NX_Atmosphere/emummc/source/FS/offsets/1100.h
|
/*
* Copyright (c) 2019 m4xw <m4x@m4xw.net>
* Copyright (c) 2019 Atmosphere-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __FS_1100_H__
#define __FS_1100_H__
// Accessor vtable getters
#define FS_OFFSET_1100_SDMMC_ACCESSOR_GC 0x156D90
#define FS_OFFSET_1100_SDMMC_ACCESSOR_SD 0x154F40
#define FS_OFFSET_1100_SDMMC_ACCESSOR_NAND 0x1500F0
// Hooks
#define FS_OFFSET_1100_SDMMC_WRAPPER_READ 0x14B990
#define FS_OFFSET_1100_SDMMC_WRAPPER_WRITE 0x14BA70
#define FS_OFFSET_1100_RTLD 0x688
#define FS_OFFSET_1100_RTLD_DESTINATION ((uintptr_t)(INT64_C(-0x3C)))
#define FS_OFFSET_1100_CLKRST_SET_MIN_V_CLK_RATE 0x14AC40
// Misc funcs
#define FS_OFFSET_1100_LOCK_MUTEX 0x28FF0
#define FS_OFFSET_1100_UNLOCK_MUTEX 0x29040
#define FS_OFFSET_1100_SDMMC_WRAPPER_CONTROLLER_OPEN 0x14B840
#define FS_OFFSET_1100_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x14B8F0
// Misc Data
#define FS_OFFSET_1100_SD_MUTEX 0xE323E8
#define FS_OFFSET_1100_NAND_MUTEX 0xE2D338
#define FS_OFFSET_1100_ACTIVE_PARTITION 0xE2D378
#define FS_OFFSET_1100_SDMMC_DAS_HANDLE 0xE15D40
// NOPs
#define FS_OFFSET_1100_SD_DAS_INIT 0x273B4
// Nintendo Paths
#define FS_OFFSET_1100_NINTENDO_PATHS \
{ \
{.opcode_reg = 3, .adrp_offset = 0x0006D944, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x0007A3C0, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 3, .adrp_offset = 0x00080708, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 4, .adrp_offset = 0x00092198, .add_rel_offset = 0x00000004}, \
{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
}
#endif // __FS_1100_H__
| 2,197
|
C++
|
.h
| 50
| 42.36
| 78
| 0.731993
|
Atmosphere-NX/Atmosphere
| 14,324
| 1,207
| 54
|
GPL-2.0
|
9/20/2024, 9:26:25 PM (Europe/Amsterdam)
| false
| false
| false
| false
| false
| false
| false
| false
|
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