| # Performance summary | |
| These figures are selected from the PyC H100 kernel-lab campaign and are | |
| included as orientation, not as universal benchmark claims. | |
| | Lane | Shape | Result | | |
| | --- | --- | --- | | |
| | Hopper WMMA FP16 | 1024^3 | 0.105 ms, 20.473 TFLOPS | | |
| | Hopper WMMA BF16 | 1024^3 | 0.102 ms, 21.024 TFLOPS | | |
| | Hopper cuBLASLt BF16 control | 4096^3 | 0.162 ms, 846.466 TFLOPS | | |
| | Hopper async square K64 | 4096^3 | 0.9252 ms in the captured profile | | |
| The engineering progression is: shared-memory tiling and reuse, WMMA Tensor | |
| Core execution, BF16/FP16 comparison, `cp.async` double buffering, CTA shape | |
| and warp-work assignment, K-stage depth, and finally a cuBLASLt control lane. | |
| Always interpret a result together with GPU model, architecture, CUDA version, | |
| matrix shape, warmup/repeat policy, and correctness mode. | |