Vertical-Driven Architectures
Collection
Physical AI system designs by CodeNinja, reasoned on Praxis, made living with Hyper Ontology. • 89 items • Updated
choice stringclasses 9
values | picked stringclasses 9
values | why stringclasses 9
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|---|---|---|
Work surface model | GLM 5.3, open weights, self hosted on the operator's own servers inside the fab; named as 753B at FP8 and node class by the stack row, unsized until a verified register row stands | Named in the operator's own ask; the fab is a commercial buyer that holds its weights, so sovereignty needs no third party model service; carries the reasoning for the three named agents and the command center's cited answers, never at the tool |
Edge anomaly detector model | Unsupervised anomaly model fitted on the fab's own normal images, served on the CodeNinja on-device AI stack runtime at the inspection and review tools | System of Context forbids a model trained for this operator; a classifier trained on labelled images locks the estate to one defect mix and becomes a standing retraining burden; confirmed classes become memory; no accuracy is quoted before the phase one bench run |
Edge hardware | Octa core 6 TOPS NPU edge SoC class, commercial grade 0 to 80 C, fanless sealed smooth-wall cleanroom enclosure, PoE front end, one unit per inspection tool group | No fan sheds or moves particles; shelf load figures are measured for detectors, so the 60 percent headroom gate governs until the anomaly load is measured |
Site hardware | 141 GB HBM GPU class, 8 GPUs per node, on the operator's own hardware inside the fab | Frontier class open weights at FP8 are node class (chapter 3 names one full node); no GPU count is derived while no verified model row stands |
Sizing rule | Frontier model footprint sizing rule for vLLM and SGLang serving | Fixes the node count, the weights against usable memory and the KV cache ceiling once a verified row is filed with its parameter count, precision and license terms |
Sensing | Chamber FDC traces, wafer map signature residuals, SPC control limit status and edge unit heartbeats; the inspection tools' own images | No new cameras; the inspection and review tools already image the wafers, and wafer and lot movement is tracked by the MES, not by a vision tracker |
Time synchronisation | Linuxptp against an Open Time Card grandmaster class clock | An FDC trace, an inspection run and a wafer map signature from the same excursion share one clock |
Pattern: governing | System of Context: a governed ontology over untouched systems of record, agents that draft, engineers who decide, memory of confirmed classes and root causes | Improvement compounds in the record, not in weights; nothing is trained or fine tuned |
Pattern: boundary | The operator's own hardware inside the fab; nothing crosses the fab perimeter; edge units carry no internet path; updates through the air gapped Harbor registry | The fab's data is controlled technology, and the operator's requirement rules out any third party model service |
Physical AI System Design for Wafer Defect Inspection in the United States: ontology and model register
The object model and the model and equipment register from Physical AI System Design for Wafer Defect Inspection in the United States, an open reference architecture by CodeNinja Atoms. Physical AI system design for wafer defect inspection in the United States: edge defect classification, one fab ontology, engineers approve every hold. Part of the Vertical-Driven Architectures series; every design in the series is also a row in the cumulative dataset https://huggingface.co/datasets/CodeNinjatools/vertical-driven-architectures.
- Read the paper: https://codeatoms.ai/wafer-defect-inspection-us/
- DOI: https://doi.org/10.5281/zenodo.23889770
- Source files and PDF: https://github.com/muhammadumar89/codeninja-research
- Live view: https://huggingface.co/spaces/CodeNinjatools/wafer-defect-inspection-us
Files
| File | What it holds |
|---|---|
objects.json |
16 typed objects (Wafer, Lot, Process step, Tool, Chamber, Recipe, Inspection run, Defect, Defect class, Wafer map signature, Excursion, Hold, Corrective action, Defect review engineer, Yield engineer, Process owner), with 12 typed links. Format hyper-ontology/1: designed with CodeNinja Praxis, implemented with Hyper Ontology. |
models.csv |
The model and equipment register: every model and hardware class with its license and the reason for each choice. |
How to use it
import json
from huggingface_hub import hf_hub_download
p = hf_hub_download("CodeNinjatools/wafer-defect-inspection-us-ontology", "objects.json", repo_type="dataset")
objects = json.load(open(p))["objects"]
print([o["label"] for o in objects])
Made with
CodeNinja Praxis, the CodeNinja Atoms platform for designing physical AI systems, and Hyper Ontology, which turns the object model into a living system.
Citation
CodeNinja Engineering Team and Muhammad Umar. 2026. Physical AI System Design for Wafer Defect Inspection in the United States. CodeNinja Atoms. https://doi.org/10.5281/zenodo.23889770. CC BY 4.0.
One of the CodeNinja Atoms designs for physical AI system design. Every published design is listed with its sector, country, compute and three-year cost on the sovereign AI reference architectures page.
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