| Id Level Type Task InputNodes OutputNodes InputVoltage OutputVoltage Components SubModuleName |
| 1 Easy Sensing Design a resistor divider to scale a high-voltage input to a low-voltage sense node for single-end ADC measurement, you don't need to provide other functions. VIN VSENSE 60 3.3 Resistors VDIV_BUS_SENSE |
| 2 Easy Sensing Design an isolated voltage sensing front-end using a resistor divider with an isolated amplifier to measure a high-voltage bus and output an isolated differential low-voltage sense signal. Use only AMC1350 and passive components; you do not need to model or provide the isolated VDD1/GND1 supply rails (assume they are provided externally). VIN "OUTP, OUTN" 400 3.3 (diff) AMC1350 ISO_AMP_HV_SENSE |
| 3 Easy Sensing "Design a differential-to-single-ended amplifier using one op-amp with a VREF offset. Assume VREF=1.65 V and differential input VINP-VINN = +/-2.0 V. Use a standard differential amplifier with matched pairs R1=R3 and R2=R4, and choose the gain so that VOUT stays within 0 to 3.0 V." "VINP, VINN, VREF" VOUT 2 3 OPA328 DIFF2SE_VREF |
| 4 Easy Sensing Design a Hall-effect isolated current sensing circuit that measures line current through an integrated isolated current path and outputs an isolated analog signal, the isolation barrier and amplifier are already provided within the chip. LINE_IN ISNS_ISO 50A 3.3V ACS37010 ISENSE_HALL_ISO |
| 5 Easy AuxPower Design an LDO-based supply that converts a DC input into a regulated low-voltage rail. VIN VOUT 12 3.3 TLV1117-33 LDO_AUX_LOGIC |
| 6 Easy AuxPower Design a low voltage auxilary buck regulator using chip that converts a DC input into a regulated low-voltage rail. if EN is left floating it defaults to enabled,please connect EN to NC. VIN VOUT 12 3.3 TPS54302 BUCK_AUX_LOGIC |
| 7 Medium AuxPower Design an isolated DC-DC module that generates isolated positive and negative gate-drive supply rails for isolated gate drivers or sensors. VIN "VISO+, VISO-" 12 "15.0,-9.0" MGJ2D121505 MJISO_DCDC_GATE_SUPPLY |
| 8 Medium PowerStage "Implement a TO-247-3 MOSFET half-bridge power stage with a switching phase output. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task." "VBUS+, GATE_H, GATE_L" VSW 400 400 IMW65R015M2H HB_TO2473_STAGE |
| 9 Medium PowerStage "Implement a TO-247-4 SiC MOSFET half-bridge stage with Kelvin source connection. Note that at least 8 decoupling caps for high dv/dt loop is needed , gate driver is NOT needed for this task." "VBUS+, GATE_H, GATE_L" "VSW" 400 400 IMZA65R015M2H HB_TO2474K_SIC_STAGE |
| 10 Medium PowerStage "Implement a TOLL MOSFET half-bridge stage with Kelvin source connection. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task." "VBUS+, GATE_H, GATE_L" "VSW" 400 400 IMT65R033M2H HB_TOLL_STAGE |
| 11 Medium PowerStage "Implement a TOLT top-side-cooled MOSFET half-bridge stage with Kelvin source connection. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task." "VBUS+, GATE_H, GATE_L" "VSW" 400 400 IMLT65R015M2H HB_TOLT_TOPCOOL_STAGE |
| 12 Medium PowerStage "Implement a QFN-8*8 integrated half-bridge power stage. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task." "VBUS+, GATE_H, GATE_L" VSW 48 48 BSC052N08NS5 HB_QFN_INTEGRATED_STAGE |
| 13 Medium Driver Design a low-side gate driver that drives a MOSFET gate from a logic-level PWM signal, do not include power MOSFET,please include gate resistor. "PWM, VCC" GATE "48.0, 9.0" 12 UCC27511 DRV_LOW_SIDE |
| 14 Medium Driver "Design a bootstrap high-side/low-side half-bridge gate driver that generates HO/LO outputs from logic PWM inputs, noted that the bootstrap freewheeling diode is integrated in the driver, do not add bootstrap diode again, do not include power MOSFET,please include gate resistor" "PWM_H, PWM_L, VCC" "HO, LO, VB, VS" 12 12 UCC27211 DRV_BOOTSTRAP_HB |
| 15 Medium Driver "Design an isolated gate driver that transfers PWM across an isolation barrier to drive a MOSFET gate, the secondary side of the gate driver is driven by isolated bipolar +15/-9V power supply, do not include power MOSFET, please include gate resistor" "PWM, VCC1, VCC2, VEE2" OUT 3.3 "15.0,-9.0" UCC5390E DRV_ISOLATED_GATE |
| 16 Medium Driver "Design a protected isolated gate driver with DESAT detection, Miller clamp, fault reporting, and enable control, the secondary side of the gate driver is driven by isolated bipolar +15/-9V power supply, do not include power MOSFET. OUTH and OUTL must each use a series turn-on/off resistor." "PWM, VCC, EN/FLT, VDD, VEE" "OUT, FLT, DESAT, CLAMP" 5 "15.0,-9.0" UCC21710 DRV_PROTECTED_DESAT |
| 17 Hard DC-DC Design a synchronous buck converter using a half-bridge power stage. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers. "VIN, PWM_H, PWM_L" VOUT 200 100 IMZA65R015M2H CONV_BUCK_SYNC |
| 18 Hard DC-DC Design a synchronous boost converter using a half-bridge power stage. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers. "VIN, PWM_H, PWM_L" VOUT 100 200 IMZA65R015M2H CONV_BOOST_SYNC |
| 19 Hard DC-DC Design a 4-switch buck-boost converter using two half-bridges. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers. "VIN, PWM_1_H, PWM_1_L, PWM_2_H, PWM_2_L" VOUT 200 200 IMZA65R015M2H CONV_4SW_BUCKBOOST |
| 20 Hard DC-DC "Design a dual active bridge converter with one full bridge on primary side, one full bridge on secondary side. On the primary side, place one DC blocking capacitor and one external series inductor between one leg midpoint and the transformer primary terminal; the other leg midpoint connects directly to the other transformer primary terminal. Leave the port for transformers. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers." "VIN, PWM_PRI_H, PWM_PRI_L, PWM_SEC_H, PWM_SEC_L" "VSW_1, VSW_2" 400 400 IMZA65R015M2H CONV_DAB_ISOLATED |
| 21 Hard DC-DC "Design an LLC resonant converter with a half-bridge on the primary side and an isolated transformer output. On the primary side, place one DC blocking capacitor and one resonant inductor in series between the half-bridge switch node and the transformer primary terminal; the other transformer primary terminal connects to the half-bridge DC bus midpoint. Leave the port for transformers. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers." "VIN, PWM_H, PWM_L" "VSW_1, VSW_2" 400 12 IMZA65R015M2H CONV_LLC_RESONANT |
| 22 Hard DC-AC Design a 3-phase motor drive using three half-bridges. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers. "VIN, PWM_1_H, PWM_1_L, PWM_2_H, PWM_2_L, PWM_3_H, PWM_3_L" "VSW_1, VSW_2, VSW_3" 400 230 IMZA65R015M2H DRIVE_3PH_MOTOR |
| 23 Hard DC-AC Design a single-phase grid-tied inverter from a DC link input. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers. "VIN, GRID_L, GRID_N, PWM_1_H, PWM_1_L, PWM_2_H, PWM_2_L" "VSW_1, VSW_2" 400 230 IMZA65R015M2H INV_GRID_1PH |
| 37 Easy Comm Design a non-isolated CAN bus transceiver circuit using SN65HVD230. Include a 120 ohm termination resistor between CANH and CANL, and a 100nF decoupling capacitor on VCC. The RS pin should be connected to GND for high-speed mode. Connect TXD and RXD to the MCU side. TXD, RXD CANH, CANL 3.3 3.3 SN65HVD230 CAN_TRANSCEIVER |
| 24 Easy Filter Design a 400V DC-link pi filter (C-L-C with damping resistor) for high-voltage bus filtering using film capacitors and a power inductor. "VBUS_IN, PGND" VBUS_FILT 400 400 "C_film, Inductor_power" FILTER_HV_PI |
| 25 Easy Filter Design a second-order Sallen-Key antialiasing low-pass filter for ADC front-end using OPA328. Include VREF biasing for single-supply operation. "VIN, VDD, GND, VREF" VOUT 3.3 3.3 OPA328 FILTER_AA_SALLENKEY |
| 26 Easy Sensing Design an NTC thermistor temperature sensing circuit with pull-up voltage divider and RC filtering for ADC input. "VDD, GND" TEMP_ADC 3.3 3.3 "NTC, R, C" SENSE_NTC_TEMP |
| 27 Easy Sensing Design a bidirectional shunt current sense amplifier using INA240A1. Include input filtering and VREF biasing. "IP+, IP-, VDD, GND, VREF" ISENSE 3.3 3.3 INA240A1 ISENSE_SHUNT_INA240 |
| 28 Easy Sensing Design a bridge signal instrumentation amplifier using INA333 for strain gauge or load cell measurement. Include gain-setting resistor and VREF biasing. "VINP, VINN, VREF, VDD, GND" VOUT 3.3 3.3 INA333 SENSE_BRIDGE_INA333 |
| 29 Easy Sensing Design a PT100 RTD digital temperature converter using MAX31865 with SPI output interface. Include reference resistor and filtering. "RTDIN+, RTDIN-, VDD, GND, SCLK, MOSI, CS" MISO 3.3 3.3 MAX31865 SENSE_RTD_MAX31865 |
| 30 Easy Sensing Design a K-type thermocouple analog amplifier using AD8495 with built-in cold junction compensation. "TC+, TC-, VDD, GND" VOUT 5 5 AD8495 SENSE_THERMOCOUPLE_AD8495 |
| 31 Easy DataConv Design a 12-bit SPI ADC circuit using ADS7042 with input RC antialiasing filter and reference decoupling. "AIN, VDD, GND, SCLK, CS" MISO 3.3 3.3 ADS7042 SPI_ADC_ADS7042 |
| 32 Easy DataConv Design a 12-bit SPI DAC with output buffer using MCP4921 and OPA328. Include RC output filtering. "VDD, GND, SCLK, MOSI, CS, VREF" VOUT 3.3 3.3 "MCP4921, OPA328" SPI_DAC_MCP4921_BUF |
| 33 Easy DataConv Design a precision 3.3V voltage reference using REF3033 with input and output decoupling filtering. "VIN, GND" VREF 5 3.3 REF3033 VREF_PRECISION_REF3033 |
| 34 Medium MCU Design an STM32F103C8T6 minimum system with power supply decoupling, reset circuit, SWD debug interface, BOOT configuration, and CAN peripheral connections. "VDD3V3, GND, NRST" "TIM, CAN, SPI, GPIO" 3.3 3.3 STM32F103C8T6 MCU_STM32_MIN_SYSTEM_PWR |
| 35 Medium MCU Design an STM32F103C8T6 minimum system with power supply decoupling, reset circuit, SWD debug interface, crystal oscillator, and UART connections. "VDD3V3, GND" "SPI, UART, GPIO" 3.3 3.3 STM32F103C8T6 MCU_STM32_MIN_SYSTEM |
| 36 Medium MCU Design a crystal oscillator network (8MHz Pierce oscillator) with load capacitors and series damping resistor for MCU clock input. "XIN, XOUT, GND" "XIN, XOUT" 3.3 3.3 "Crystal, C_load" MCU_CRYSTAL_NETWORK |
| 38 Medium Comm Design an RS485 half-duplex transceiver circuit using SP3485. Include termination resistor, bus biasing resistors, and ESD protection. "VDD3V3, GND, TXD, RXD, DE_RE" "A, B" 3.3 3.3 SP3485 RS485_HALF_DUPLEX |
| 39 Medium Comm Design a USB to UART bridge circuit using CP2102N with USB ESD protection using TPD4E05U06. Include decoupling and crystal. "VBUS, D+, D-, GND" "TXD, RXD" 5 3.3 "CP2102N, TPD4E05U06" USB_UART_BRIDGE |
| 40 Medium Isolation Design a 4-channel SPI digital isolator using ISO7741 with 3 forward channels and 1 reverse channel. Include decoupling on both sides. "VDD1, GND1, VDD2, GND2, MOSI_IN, SCLK_IN, CS_IN, MISO_IN" "MOSI_ISO, SCLK_ISO, CS_ISO, MISO_ISO" 3.3 3.3 ISO7741 ISO_SPI_4CH |
| 41 Medium Isolation Design a bidirectional I2C digital isolator using ADUM1250. Include decoupling and pull-up resistors on both sides. "VDD1, GND1, VDD2, GND2, SDA1, SCL1" "SDA2, SCL2" 3.3 3.3 ADUM1250 ISO_I2C_BIDIR |
| 42 Medium Storage Design a SPI NOR Flash circuit using W25Q64JV. Include decoupling, CS pull-up, and HOLD/WP pin handling. "VDD, GND, SCLK, MOSI, CS" MISO 3.3 3.3 W25Q64JV SPI_FLASH_W25Q64 |
| 43 Medium Storage Design an I2C EEPROM circuit using AT24C256. Include address configuration, write protect, and I2C pull-up resistors. "VDD, GND, SDA, SCL, WP" "SDA, SCL" 3.3 3.3 AT24C256 I2C_EEPROM_AT24C256 |
| 44 Medium PowerMgmt Design an I2C power monitor circuit using INA226 with high-side shunt resistor and bus voltage filtering. "VDD, GND, VBUS+, VBUS-, SDA, SCL" ALERT 3.3 3.3 INA226 PWR_MONITOR_INA226 |
| 45 Medium PowerMgmt Design a power tree with Buck regulator (TPS54302) for 3.3V digital rail followed by LDO (TLV1117-33) for 3.3V low-noise analog rail from 12V input. "VIN12, GND" "V3P3_DIG, V3P3_ANA" 12 3.3 "TPS54302, TLV1117-33" PWR_TREE_12V_3V3D_3V3A |
| 46 Medium Comm Design a fully isolated CAN interface using ISO7741 digital isolator, SN65HVD230 CAN transceiver, and NXE1S0303MC isolated DC-DC power supply. "VDD, GND, TXD, RXD" "CANH, CANL" 3.3 3.3 "ISO7741, SN65HVD230, NXE1S0303MC" CAN_ISOLATED_FULL |
| 47 Medium BMS Design a 5-series battery cell AFE using BQ76920 with RC cell sampling network, cell balancing resistors, I2C interface, and NTC temperature sensing. "CELL0, CELL1, CELL2, CELL3, CELL4, CELL5, PACK+, PACK-, SDA, SCL" "ALERT, CHG, DSG" 20 3.3 BQ76920 BMS_AFE_5S_BQ76920 |
| 49 Hard BMS-System Design a complete 5S BMS system with BQ76920 AFE, BQ76200 high-side charge/discharge FET driver, and SN65HVD230 CAN bus communication interface. "CELL0, CELL1, CELL2, CELL3, CELL4, CELL5, PACK+, PACK-, CAN_TXD, CAN_RXD" "CANH, CANL, CHG, DSG" 20 3.3 "BQ76920, BQ76200, SN65HVD230" BMS_5S_FULL_SYSTEM |
| 50 Hard Motor-System Design a complete BLDC FOC controller with STM32F103C8T6 MCU, three isolated gate drivers (UCC5390E), six SiC MOSFETs (IMZA65R015M2H) forming three half-bridges, and two current sense amplifiers (INA240A1). "VIN, PWM, GND" "VSW_A, VSW_B, VSW_C" 400 400 "STM32F103C8T6, UCC5390E, IMZA65R015M2H, INA240A1" BLDC_FOC_CONTROLLER |
| 51 Hard DAQ-System Design a 4-channel isolated data acquisition system with four ADS7042 ADCs, ISO7741 SPI isolator, NXE1S0303MC isolated DC-DC power, and REF3033 precision reference. "AIN1, AIN2, AIN3, AIN4, VDD, GND, SCLK, MOSI, CS" MISO 3.3 3.3 "ADS7042, ISO7741, NXE1S0303MC, REF3033" ISOLATED_DAQ_4CH |
| 52 Hard IoT-System Design an IoT sensor node with STM32F103C8T6 MCU, SN65HVD230 CAN transceiver, TPS54302 Buck regulator, and TLV1117-33 LDO for power management. "VIN12, GND" "CANH, CANL, TEMP_ADC" 12 3.3 "STM32F103C8T6, SN65HVD230, TPS54302, TLV1117-33" IOT_SENSOR_NODE |
| 54 Hard Charger-System Design a Li-ion battery charger system with BQ25895 charge controller, INA226 power monitor, and TPD4E05U06 USB ESD protection. "VBUS, D+, D-, GND" "BAT, SYS" 5 4.2 "BQ25895, INA226, TPD4E05U06" LI_ION_CHARGER_FULL |
| 55 Hard Converter-System Design a DAB converter with MCU control using the P20 DAB base topology plus STM32F103C8T6 MCU, SN65HVD230 CAN transceiver, and INA240A1 current sense amplifier. "VIN, PWM, GND, CAN_TXD, CAN_RXD" "VOUT, CANH, CANL" 400 400 "STM32F103C8T6, SN65HVD230, INA240A1, IMZA65R015M2H" DAB_WITH_CONTROL |
| 56 Hard Comm Design a SPI Ethernet controller circuit using W5500. Include RJ45 magnetic interface connections, decoupling, and ESD protection. "VDD, GND, SCLK, MOSI, CS, MISO" "TXP, TXN, RXP, RXN" 3.3 3.3 W5500 ETHERNET_SPI_W5500 |
| 57 Medium Motor-System Design a stepper motor driver system using DRV8825 with TPS54302 for motor power supply. Include current limiting configuration and MCU control interface. "VDD, GND, STEP, DIR, VMOT" "A1, A2, B1, B2" 12 12 "DRV8825, TPS54302" STEPPER_DRIVER_FULL |
| 58 Medium PowerMgmt Design a voltage supervisor and watchdog reset circuit using TPS3808 with adjustable threshold and delay. "VDD, GND, SENSE" RESET 3.3 3.3 TPS3808 VOLTAGE_SUPERVISOR |
| 59 Medium Memory Design an SDRAM interface circuit using W9825G6KH with 16-bit data bus, address bus, control signals, and power supply decoupling. "VDD, GND, CLK, CKE, CS, RAS, CAS, WE, DQM, ADDR, DATA" DATA 3.3 3.3 W9825G6KH SDRAM_INTERFACE_W9825G6 |
| 60 Medium HighSpeed Design a PCIe x1 endpoint connector interface with differential TX/RX pairs, 100MHz reference clock, PERST |
| 61 Medium PowerMgmt Design a P-MOSFET reverse polarity protection circuit with gate voltage divider, TVS protection, and indicator LED. "VIN, GND" VOUT 12 12 "PMOS, R, C" REVERSE_POLARITY_PMOS |
| 62 Hard DigitalPower Design a complete MCU digital synchronous buck system with STM32F103C8T6 MCU, two UCC5390E isolated gate drivers, two IMZA65R015M2H SiC MOSFETs, INA240A1 current sense, and SN65HVD230 CAN transceiver. "VIN, PWM, GND, CAN_TXD, CAN_RXD" "VOUT, CANH, CANL" 200 100 "STM32F103C8T6, UCC5390E, IMZA65R015M2H, INA240A1, SN65HVD230" MCU_SYNC_BUCK_SYSTEM |
| 64 Hard DigitalMotor Design a complete MCU 3-phase inverter system with STM32F103C8T6 MCU, six UCC5390E isolated gate drivers, six IMZA65R015M2H SiC MOSFETs, three INA240A1 current sense amplifiers, three MGJ2D121505SC isolated gate supplies, SN65HVD230 CAN transceiver, and TPS54302 auxiliary supply. "VIN, PWM, GND, CAN_TXD, CAN_RXD" "VSW_A, VSW_B, VSW_C, CANH, CANL" 400 400 "STM32F103C8T6, UCC5390E, IMZA65R015M2H, INA240A1, MGJ2D121505SC, SN65HVD230, TPS54302" MCU_3PH_INVERTER_FULL |
| 65 Hard Memory-System Design an MCU SDRAM system with STM32F103C8T6 MCU, W9825G6KH SDRAM, and TLV1117-33 LDO for power supply with bus termination resistors. "VDD5, GND" "GPIO, ADDR, DATA" 5 3.3 "STM32F103C8T6, W9825G6KH, TLV1117-33" MCU_SDRAM_SYSTEM |
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