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// ZX-Evo Base Configuration (c) NedoPC 2008,2009,2010,2011,2012,2013,2014
//
// frame INT generation
/*
This file is part of ZX-Evo Base Configuration firmware.
ZX-Evo Base Configuration firmware is free software:
you can redistribute it and/or modify it under the terms of
the GNU General Pu... |
#include <bits/stdc++.h> using namespace std; int n, m, k; int a[100]; int ans; int main() { cin >> n >> m >> k; for (int i = 0; i < k; i++) { cin >> a[i]; a[i]--; } for (int i = 0; i < n; i++) { for (int j = 0; j < m; j++) { int x; cin >> x; x--; ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; const int maxn = 100000 + 5; int g[10][10]; int a[5]; int ans; int cal() { int sum = 0; for (int i = 0; i < 5; ++i) { for (int j = i; j < 4; j += 2) sum += g[a[j]][a[j + 1]] + g[a[j + 1]][a[j]]; } return sum; } int main() { for (int... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
//Legal Notice: (C)2018 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic functions, and any
//output files any of the foregoing (including device programming or
//simulation files), and any associated do... |
#include <bits/stdc++.h> using namespace std; int n; int x, y; int p[1000003]; int r[1000003]; map<int, int> a; int ans[200003]; int s; int parent(int x) { if (p[x] < 0) return x; return p[x] = parent(p[x]); } void join(int x, int y) { p[y] = parent(x); } int main() { fill_n(p, 10000... |
//
// .. hwt-autodoc::
//
module FullAdder (
input wire a,
input wire b,
input wire ci,
output reg co,
output reg s
);
always @(a, b, ci) begin: assig_process_co
co = a & b | (a & ci) | (b & ci);
end
always @(a, b, ci) begin: assig_process_s
s = a ^ b ^ ci;
en... |
`timescale 1ns/10ps
module pll_vga_0002(
// interface 'refclk'
input wire refclk,
// interface 'reset'
input wire rst,
// interface 'outclk0'
output wire outclk_0,
// interface 'locked'
output wire locked
);
altera_pll #(
.fractional_vco_multiplier("false"),
.reference_clock_frequency("50.0 MHz"),
... |
//*****************************************************************************
// (c) Copyright 2009 - 2013 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
/... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; template <class T> bool uin(T &a, T b) { if (a > b) { a = b; return true; } return false; } template <class T> bool uax(T &a, T b) { if (a < b) { a = b; return true; } return false; } const int MAXN = 1100000; ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; long long n = 1009; int LG2(int N) { int ans = 0; while (N) { N >>= 1; ans++; } return ans - 1; } int main() { cin.tie(0); cin.sync_with_stdio(0); int n; cin >> n; map<string, int> M; int o = 1; vector<long l... |
#include <bits/stdc++.h> using namespace std; const int N = 1e6 + 5; const int INF = 0x3f3f3f3f; const int mo = 1e9 + 7; inline int ksm(int a, int b) { int ret = 1; for (; b; b >>= 1, a = 1ll * a * a % mo) if (b & 1) ret = 1ll * ret * a % mo; return ret; } inline int read() { char ch... |
#include <bits/stdc++.h> using namespace std; int main() { int n; cin >> n; string s; cin >> s; map<string, int> m; int groot = 0; string p = ; vector<string> vec; for (int i = 1; i < s.size(); i++) { p.push_back(s[i - 1]); p.push_back(s[i]); m[p]++; gro... |
// (c) NedoPC 2010
//
// doubles video line by replicating it in 3x512b RAM buffer
module vga_double(
input wire clk,
input wire hsync_start,
input wire scanin_start,
input wire [ 5:0] pix_in,
input wire scanout_start,
output reg [ 5:0] pix_out
);
/*
addre... |
/*****************************************************************************
-------------------------------------------------------------------------------
-- Entity: mig_interface_model
-- File: mig_interface_model.v
-- Author: Fredrik Ringhage - Aeroflex Gaisler AB
--
-- This is a interface mode... |
#include <bits/stdc++.h> using namespace std; const int mod = 1000003; char in[2010]; int catlen[2010]; long long fac[4010], inv[4010], rf[4010]; int t[2010], tc; int first[2010], stc; long long dp[2010][2010]; inline int solve() { int n = strlen(in); tc = 0; bool isn = 0, ist; for (in... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; const int N = (int)1e6 + 7; int n; string s; vector<int> p; int main() { ios::sync_with_stdio(0); cin.tie(0); cin >> s; n = (int)s.size(); for (int i = 0; i < n; i++) { if (s[i] != s[(i + 1) % n]) { p.push_back(i); } }... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// Check that the signedness of methods on the built-in enum type is handled
// correctly when calling the method without parenthesis.
module test;
bit failed = 1'b0;
`define check(x) \
if (!(x)) begin \
$display("FAILED(%0d): ", `__LINE__, `"x`"); \
failed = 1'b1; \
end
int unsigned x = 1... |
module spi_engine_offload (
input ctrl_clk,
input ctrl_cmd_wr_en,
input [15:0] ctrl_cmd_wr_data,
input ctrl_sdo_wr_en,
input [7:0] ctrl_sdo_wr_data,
input ctrl_enable,
output ctrl_enabled,
input ctrl_mem_reset,
input spi_clk,
input spi_resetn,
input trigger,
output cmd_valid,
input cmd_ready,
outpu... |
// Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2016.4 (win64) Build Wed Dec 14 22:35:39 MST 2016
// Date : Sat May 27 20:55:50 2017
// Host : GILAMONSTER running 64-bit major release (... |
module tb_sram (
// main clock
input CLOCk_50,
// Switches & keys
input [17:0] SW,
input [3:0] KEY,
output [17:0] LEDR,
// Hex displays (seven segment displays)
output [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7,
// SRAM
inout [15:0] SRAM_DQ,
output [19:0] SRAM_ADDR,
output SRAM_CE_N, SRAM_OE_... |
#include <bits/stdc++.h> using namespace std; long long arr[100005]; long long ans = 0; long long temp[100005]; bool is(int m, string s) { set<char> ss; map<char, int> mp; for (int i = 0; i < m; i++) { ss.insert(s[i]); mp[s[i]]++; } if (ss.size() == ans) return true; for (i... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
module single_cycle(input clk,input enable,output LED1,output reg LED2,LED3);
reg [32:0] cnt = 0;
reg number=0;
reg start=0;
reg stop=0;
reg reset=0;
wire debug1,debug2;
single_cycle_top sc(number,reset,debug1,debug2);
always @(negedge enable,posedge stop)begin
if(stop)
start=0;
else begin
if(!enable)
star... |
#include <bits/stdc++.h> using namespace std; inline int mini(int a, int b) { return a < b ? a : b; } inline int maxi(int a, int b) { return a > b ? a : b; } int main() { int n; scanf( %d , &n); int *a = new int[n]; int najm = 1000000010; for (int i = 0; i < n; i++) { scanf( %d , &a[i]... |
#include <bits/stdc++.h> using namespace std; using i64 = long long int; using ii = pair<int, int>; using ii64 = pair<i64, i64>; i64 ipow(i64 x, i64 n) { if (n == 0) return 1ll; i64 half = ipow(x, n / 2); half = (half * half) % 1000000007; if (n % 2 == 0) return half; else retu... |
// DESCRIPTION: Verilator: Verilog Test module
//
// Copyright 2010 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.
`ifdef VERILATOR
//We call it via $c... |
// Put your file header here
//
`ifndef TESTSIZE
`define TESTSIZE 78
`endif
module stimulus;
reg [9:0] test_vector [`TESTSIZE-1:0];
parameter period = 20;
parameter delay = 2;
// declare the signals here
reg clk, rst_n, push, pop;
reg [15:0] datain;
wire empty, almost_empty, full, almost_full, error;
wire [1... |
#include <bits/stdc++.h> inline long long read() { long long x = 0; char ch = getchar(), w = 1; while (ch < 0 || ch > 9 ) { if (ch == - ) w = -1; ch = getchar(); } while (ch >= 0 && ch <= 9 ) { x = x * 10 + ch - 0 ; ch = getchar(); } return x * w; } void... |
#include <bits/stdc++.h> using namespace std; int r, c, n, k, x, y; int flag[101][101]; int main() { cin >> r >> c >> n >> k; for (int i = 0; i < n; i++) { cin >> x >> y; flag[x][y] = 1; } int cnt = 0; for (int i = 1; i <= r; i++) { for (int i1 = 1; i1 <= c; i1++) { ... |
#include <bits/stdc++.h> using namespace std; vector<vector<set<int> > > setgrid; vector<string> grid; int k; int ro[4] = {1, -1, 0, 0}; int co[4] = {0, 0, -1, 1}; struct s { s() : r(-1), c(-1), set(-1), path( ), let( A ), d(0) {} s(int nr, int nc, unsigned int nset, string npath, char nlet, int ... |
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(false); cin.tie(0); cout.tie(0); long long n; cin >> n; std::vector<long long> x0, x1, y0, y1; long long a[n][4]; for (long long int i = 0; i < n; i++) { cin >> a[i][0] >> a[i][1] >> a[i][2] >>... |
#include <bits/stdc++.h> using namespace std; const long long INF = 1e+18; int main() { cin.tie(0); ios::sync_with_stdio(0); int n, c = 0; cin >> n; while (n != 0) { string str = to_string(n); int maxi = 0; for (int i = 0; i < str.size(); i++) { if ((str[i] - 0 ) > m... |
`timescale 1ns/10ps
`include "demux2to4.v"
module spdutb;
reg in0, in1, in2, in3, d0, d1;
wire out;
demux demux1 (in0, in1, in2, in3, d0, d1, out);
initial
begin
in0=1'b0; in1=1'b1; in2=1'b1; in3=1'b1;
d0=1'b0; d1=1'b0;
#10;
d0=1'b1; d1=1'... |
#include <bits/stdc++.h> using namespace std; struct node { int x, y, z; } a[10]; int flag; long long v[5]; long long dist(int i, int j) { long long x = a[i].x - a[j].x; long long y = a[i].y - a[j].y; long long z = a[i].z - a[j].z; return x * x + y * y + z * z; } int ok() { int c... |
#include <bits/stdc++.h> using namespace std; int main() { int n, m, q; cin >> n >> m >> q; vector<vector<int> > arr(n); for (int i = 0; i < n; i++) { arr[i].resize(m); } vector<pair<int, int> > did; for (int i = 0; i < q; i++) { int t; cin >> t; if (t == 1) { ... |
#include <bits/stdc++.h> using namespace std; int n, a[1234567], ans[1234567]; int main() { cin >> n; for (int i = 0; i < n; i++) cin >> a[i]; int in = 0; for (int i = 0; i < n; i++) if (!a[i]) { in = i; break; } for (int i = 0; i <= in; i++) ans[i] = in - i; fo... |
/**
* @module controller
* @author sabertazimi
* @email
* @brief control signals generator
* @input op op code
* @input funct functy code
* @output aluop,
* @output alusrc 1 => imm16, 0 => rt
* @output alusham 1 => sham, 0=> rt
* @output regdst 1 => rd, 0 => rt
* @output regwe 1 => enable, 0 => disable
* ... |
#include <bits/stdc++.h> int main(void) { int a, b, x, y; scanf( %d %d , &a, &b); x = (a > b) ? a : b; y = (a < b) ? a : b; printf( %d %d n , y, ((x - y) / 2)); return 0; } |
// This tests SystemVerilog casting support
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2012 by Iztok Jeras.
// Extended by Maciej Suminski
// Copied and modified by Martin Whitaker
module test();
typedef logic signed [7:0] reg08;
typedef logic signed [15:0] reg16;
... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int mark[1 << 22]; int is[1 << 22]; int a[1 << 22]; int n, m; int tot; void dfs(int x) { if (mark[x]) return; mark[x] = 1; if (is[x]) dfs(tot ^ x); for (int j = 0; j < n; j++) { if (x >> j & 1) { dfs(x ^ (1 << j)); } } ... |
#include <bits/stdc++.h> using namespace std; const int maxn = 2e5 + 50; int n, cnt; pair<int, int> poi[maxn], A[maxn]; void solve(int l, int r) { if (l > r) return; int mid = (l + r) >> 1; for (int i = l; i <= r; i++) poi[++cnt] = (pair<int, int>){A[mid].first, A[i].second}; solve(l, mi... |
#include <bits/stdc++.h> using namespace std; const int N = 103; using pi = pair<int, int>; inline int rd() { int x = 0, f = 1, c; while (!isdigit(c = getchar())) if (c == - ) f = -1; for (; isdigit(c); c = getchar()) x = x * 10 + c - 0 ; return f * x; } int n, m, k; char p[N][N]; ... |
#include <bits/stdc++.h> using namespace std; const int inf = 0x3f3f3f3f; const int N = 2e5 + 10; char s[3][N]; int main() { int t; cin >> t; while (t--) { int n; cin >> n; for (int i = 1; i <= 2; i++) for (int j = 1; j <= n; j++) { cin >> s[i][j]; if ... |
#include <bits/stdc++.h> using namespace std; int n, m; double ax, ay, bx, by, tx, ty, x, y; char s[100100]; double len(double x1, double y1, double x2, double y2) { return sqrt((x1 - x2) * (x1 - x2) + (y1 - y2) * (y1 - y2)); } int main() { ios_base::sync_with_stdio(false); cin >> ax >> ay >> ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
//Verilint 182 off // WARNING: Illegal statement for synthesis: $realtobits (in1)
//Verilint 311 off // WARNING: Converting real to unsigned: $realtobits (in1)
//Verilint 20 off // WARNING: Assign statement may not be synthesizable: assign out7[i] = ...;
//Verilint 599 off // WARNING: This construct is not supported b... |
// Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2016.4 (lin64) Build Wed Dec 14 22:35:42 MST 2016
// Date : Sat Jan 21 17:58:33 2017
// Host : natu-OMEN-by-HP-Laptop running 64-bit Ubunt... |
#include <bits/stdc++.h> using namespace std; const int LIM = 3e5 + 7; int T[LIM][10], n, m, ans1, ans2; bool spr(int x) { vector<int> V[1 << m]; for (int i = 0; i < (n); ++i) { int l = 0; for (int j = 0; j < (m); ++j) { if (T[i][j] >= x) l += 1 << j; } V[l].push_back(i);... |
// ----------------------------------------------------------------------
// Copyright (c) 2016, The Regents of the University of California All
// rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:... |
#include <bits/stdc++.h> using namespace std; int i, j, n, m, k; int main() { scanf( %d , &n); if (n <= 2) { printf( %d n , -1); } else { printf( %d n , 35); printf( %d n , 77); for (i = 1; i <= n - 2; i++) printf( %d n , i * 55); } return 0; } |
// -------------------------------------------------------------
//
// Generated Architecture Declaration for rtl of ent_ba
//
// Generated
// by: wig
// on: Tue Jun 27 05:12:12 2006
// cmd: /cygdrive/h/work/eclipse/MIX/mix_0.pl ../verilog.xls
//
// !!! Do not edit this file! Autogenerated by MIX !!!
// $Author: w... |
#include <bits/stdc++.h> using namespace std; int main(void) { int n; char str[102][102]; scanf( %d , &n); bool row, col; row = col = false; for (int i = 0; i < n; i++) { scanf( %s , str[i]); bool bolong = false; for (int j = 0; j < n; j++) { if (str[i][j] == . ) {... |
//
// Copyright 2011 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is dis... |
/**
\file "celem-test.v"
Drive a single C-element with phase-shifted clocks
Expect to see missing keeper diagnostics.
$Id: inverters.v,v 1.3 2010/04/06 00:08:35 fang Exp $
*/
`timescale 1ns/1ps
`include "clkgen.v"
module timeunit;
initial $timeformat(-9,1," ns",9);
endmodule
module TOP;
wire in0, in1;
reg ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; const long long mod = 1000000007; const int MAXN = 1000005; int dp[MAXN]; int main() { ios::sync_with_stdio(false); cin.tie(nullptr); int n; cin >> n; int x; int maxn = 0; for (int i = 0; i < n; i++) { cin >> x; dp[x]++; ... |
#include <bits/stdc++.h> using namespace std; int x1[200010]; int x2[200010]; int yz1[200010]; int yz2[200010]; int n; pair<pair<int, int>, pair<int, int> > pp[200010]; pair<pair<int, int>, pair<int, int> > qq[200010]; bool isValid(int x1, int y1, int x2, int y2) { if (x1 <= x2 && y1 <= y2) { ... |
#include <bits/stdc++.h> using namespace std; int main() { ios::sync_with_stdio(0); cin.tie(0); int n; cin >> n; multiset<long long> s; long long now = 0; for (int i = 1; i <= n; i++) { long long a; cin >> a; a -= i; s.insert(a); s.insert(a); now -= a;... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(0); cin.tie(0); cout.tie(0); int n, m, gn1 = 0, gj1 = 0, gn2 = 0, gj2 = 0; cin >> n >> m; for (int i = 0; i < n; i++) { int x; cin >> x; if (x % 2 == 0) gn1++; else gj... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; int main() { int n, i; cin >> n; cout << (n / 2) + 1 << endl; for (i = 1; i <= (n / 2) + 1; i++) cout << i << 1 << endl; ; if (n % 2 != 0) for (i = 2; i <= (n / 2) + 1; i++) cout << (n / 2) + 1 << << i << endl; else for (i ... |
#include <bits/stdc++.h> using namespace std; int T; int h, c, t; int main() { scanf( %d , &T); while (T--) { scanf( %d%d%d , &h, &c, &t); if (t * 2 <= (h + c)) printf( %d n , 2); else { long long lef = (h - t) / (2 * t - (h + c)); double a1 = (1.0 * h * (lef + ... |
#include <bits/stdc++.h> using namespace std; const int maxn = 1e3 + 10; struct pos { double x, y; } p[maxn]; int n; int main() { scanf( %d , &n); for (int i = 0; i < n; i++) scanf( %lf%lf , &p[i].x, &p[i].y); double ans = 0x3f3f3f3f; for (int i = 0; i < n; i++) { pos a = p[i]; ... |
// lattice ice5lp4k spi_slave + R G B blinky for RPi
// 10-05-16 E. Brombaugh
module rpi_tst(
// SPI slave port
input SPI_CSL,
input SPI_MOSI,
output SPI_MISO,
input SPI_SCLK,
// RGB output
output wire o_red,
output wire o_green,
output wire o_blue
);
// This should be unique so firmware knows who it's ta... |
module LCDhex (
//////////////////// Clock Input ////////////////////
CLOCK_27, // 27 MHz
CLOCK_50, // 50 MHz
//////////////////// Push Button ////////////////////
KEY, // Button[3:0]
//////////////////// DPDT Switch ////////////////////
SW, // DPDT Switch[17:0]
////... |
/****************************************************************************
Shifter unit
Opcode Table:
sign_ext dir
0 0 | ShiftLeft
0 1 | ShiftRightLogic
1 1 | ShiftRightArith
************************************************************************... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 22:34:44 03/13/2015
// Design Name:
// Module Name: PreProcessxy
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// De... |
#include <bits/stdc++.h> using namespace std; int main() { int n; cin >> n; int a[n]; for (int i = 0; i < n; ++i) cin >> a[i]; int m; cin >> m; int b[m]; for (int i = 0; i < m; ++i) cin >> b[i]; sort(a + 0, a + n); sort(b + 0, b + m); int ans = 0; for (int i = 0, j = ... |
#include <bits/stdc++.h> using namespace std; int main() { int x, k = 0; cin >> x; while (x) { k += x % 2; x /= 2; } cout << k; } |
#include <bits/stdc++.h> using namespace std; vector<pair<long long, long long>> g[111111]; long long d[111111]; set<long long> t[111111]; int main() { int n, m; cin >> n >> m; for (int i = 1; i <= n; i++) { d[i] = 1e13; } for (int i = 1; i <= m; i++) { long long a, b, cost; ... |
#include <bits/stdc++.h> using namespace std; const double PI = acos(-1); const int inf = 0x3f3f3f3f; const long long inff = 0x3f3f3f3f3f3f3f3f; int n; int a[200010]; int dp[200010]; int main() { ios::sync_with_stdio(false); cin.tie(0); cout.tie(0); cin >> n; for (int i = 1; i <= n; ... |
#include <bits/stdc++.h> using namespace std; const int N = 155; const int INF = 123456789; struct edge { int to, lim, pri, rev; edge() : to(0), lim(0), pri(0), rev(0){}; edge(int to, int lim, int pri, int rev) : to(to), lim(lim), pri(pri), rev(rev){}; }; vector<edge> nei[N]; char ss[1... |
#include <bits/stdc++.h> using namespace std; const int N = 110; vector<int> G[N]; int vis[N]; void DFS(int cur) { vis[cur]++; int sz = G[cur].size(); int v; for (int i = 0; i < sz; i++) { v = G[cur][i]; if (!vis[v]) DFS(v); } } int main() { int n, m, u, v; cin >> n... |
//--------------------------------------------------------------------------------
// meta.v
//
// Copyright (C) 2011 Ian Davis
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; eith... |
module forward_mem_stage(mem_wb_op,mem_wb_regA,mem_wb_regC,ex_mem_op,ex_mem_regA,F3,mem_wb_CCR_write,ex_mem_CCR_write);
parameter ADD = 6'b000000;
parameter NDU = 6'b001000;
parameter ADC = 6'b000010;
parameter ADZ = 6'b000001;
parameter ADI = 4'b0001;
parameter NDC = 6'b001010;
parameter NDZ = 6'b001001;
parameter L... |
#include <bits/stdc++.h> using namespace std; const int M = (119 << 23) + 1; int add(int a, int b) { return (a += b) < M ? a : a - M; } int sub(int a, int b) { return (a -= b) < 0 ? a + M : a; } int mul(int a, int b) { return 1LL * a * b % M; } int mod_pow(int a, int b) { int res = 1; while (b) { ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; int n, u, v, N; vector<char> ans(1e5 + 5); vector<int> sub(1e5 + 5); vector<set<int> > adj(1e5 + 5); void dfs(int u, int par) { sub[u] = 1; for (int v : adj[u]) { if (v != par) { dfs(v, u); sub[u] += sub[v]; } } } int ... |
/*
Copyright (C) 2014 Adapteva, Inc.
Contributed by Fred Huettig <>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
T... |
module edge_detect
(/*autoport*/
input clk,
input rst_n,
input signal_in,
output reg signal_out
);
//*******************************************************
//Internal
//*******************************************************
//Local Parameters
//Wires
//Registers
reg f... |
#include <bits/stdc++.h> using namespace std; int main() { int n; unsigned long long k, res = 0; cin >> n >> k; unsigned long long *arr = new unsigned long long[n + 1]; arr[0] = 1; for (int i = 1; i <= n; i++) arr[i] = arr[i - 1] * 2; bool left = true; while (n > 1) { if (k > a... |
// Copyright 2020-2022 F4PGA Authors
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed... |
#include <bits/stdc++.h> using namespace std; int main() { long long n, k; cin >> n >> k; if (k <= (n + 1) / 2) { cout << k * 2 - 1 << n ; } else cout << (k - (n + 1) / 2) * 2 << n ; return 0; } |
#include <bits/stdc++.h> using namespace std; template <typename T, typename U> ostream& operator<<(ostream& os, const pair<T, U>& _p) { return os << ( << _p.first << , << _p.second << ) ; } template <typename T> ostream& operator<<(ostream& os, const vector<T>& _V) { bool f = true; os << ... |
#include <bits/stdc++.h> using namespace std; int N, M; vector<int> edge[100001]; int val[100001]; vector<int> ans[2]; void dfs(int i, int fi) { if (val[i] != 0 && fi != val[i]) { cout << -1 n ; exit(0); } if (val[i] != 0 && fi == val[i]) { return; } val[i] = fi; a... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2004 by Wilson Snyder.
module t (/*AUTOARG*/
// Outputs
ign, ign2, ign3,
// Inputs
clk
);
input clk;
output [31:0] ign;
output [3:0] ign2;
output [11:0] ... |
#include <bits/stdc++.h> using namespace std; bool fun(int n) { if (n == 1) return false; if (n == 2) return true; if (n % 2 == 0) return false; for (int i = 2; i * i <= n; i++) { if (n % i == 0) return false; } return true; } int main() { int n; scanf( %d , &n); if (fu... |
// (C) 1992-2014 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulati... |
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