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// -- (c) Copyright 2009 - 2011 Xilinx, Inc. All rights reserved.
// --
// -- This file contains confidential and proprietary information
// -- of Xilinx, Inc. and is protected under U.S. and
// -- international copyright and other intellectual property
// -- laws.
// --
// -- DISCLAIMER
// -- This disclaimer is not a... |
#include <bits/stdc++.h> using namespace std; template <class T> inline T abs(T a) { return a > 0 ? a : -a; } int n; int m; int main() { int last; cin >> n >> last; if (n == 1) { if (last == 1) { cout << 0 << endl << T << endl; } else { cout << IMPOSSIBLE <<... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; int a[100004]; int main() { int n, no; cin >> n >> a[0]; a[0] = (a[0] - 1) % 2; for (int i = 1; i < n; i++) { cin >> no; a[i] = (a[i - 1] + (no - 1)) % 2; } for (int i = 0; i < n; i++) { if (a[i] == 1) { cout << 1 n ;... |
#include <bits/stdc++.h> using namespace std; int a, b, c, d, e; int main() { cin >> a >> b >> c >> d >> e; int t = min(a, min(b, min(c / 2, min(d / 7, e / 4)))); cout << t << endl; return 0; } |
#include <bits/stdc++.h> using namespace std; using i64 = long long; struct SplayNode { using pSplayNode = SplayNode *; static pSplayNode root; int sz; pSplayNode fa, son[2]; int val, type, type1num; i64 sum; SplayNode(int _type, int _val) { sz = 1; fa = son[0] = son[1] = n... |
#include <bits/stdc++.h> using namespace std; template <typename T> void chkmax(T &x, T y) { x = x > y ? x : y; } template <typename T> void chkmin(T &x, T y) { x = x > y ? y : x; } const int INF = 2139062143; template <typename T> void read(T &x) { x = 0; bool f = 1; char ch; ... |
#include <bits/stdc++.h> using namespace std; int main() { int n, k, i, x = 0; cin >> n >> k; char a; for (i = 0; i < n; i++) { cin >> a; if (a == # ) { x++; if (x == k) break; } else x = 0; } cout << (x == k ? NO : YES ); return 0; } |
#include <bits/stdc++.h> using namespace std; vector<int> ans; struct item { int key, prior; item *left, *right; item() {} item(int key, int prior) : key(key), prior(prior), left(NULL), right(NULL) {} }; typedef item* pitem; void split(pitem temp, int key, pitem& left, pitem& right) { if... |
#include<bits/stdc++.h> #define ll long long using namespace std; ll T,n,k; void work(){ scanf( %lld%lld ,&n,&k); if(n<=k){printf( %lld n ,(long long)ceil((double)k*1.0/(double)n));return;} else{ if(n%k==0){ printf( %lld n ,1LL); return; } else printf( %lld n ,2LL); } return... |
#include <bits/stdc++.h> using namespace std; long long fpow(long long a, int b, int mod) { long long res = 1; for (; b > 0; b >>= 1) { if (b & 1) res = res * a % mod; a = a * a % mod; } return res % mod; } const int mod = 1e9 + 7; const int N = 2e5 + 100; inline int read() { ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> #pragma GCC optimize( O3 ) #pragma GCC target( tune=native ) #pragma GCC optimize( unroll-loops ) using namespace std; using ll = long long; const int N = 120005; struct node_t { int tag, time, value, number; ll answer; } tree[N << 2]; int n, m, top_max, top_min, a[N],... |
`include "setseed.vh"
module top(input clk, din, stb, output dout);
reg [41:0] din_bits;
wire [78:0] dout_bits;
reg [41:0] din_shr;
reg [78:0] dout_shr;
always @(posedge clk) begin
if (stb) begin
din_bits <= din_shr;
dout_shr <= dout_bits;
end else begin
din_shr <= {din_shr, din};
dout_shr <= {d... |
//-----------------------------------------------------------------------------
//
// (c) Copyright 2008, 2009 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information of Xilinx, Inc.
// and is protected under U.S. and international copyright and other
// intellectual pr... |
#include <bits/stdc++.h> using namespace std; const int MaxN = 200010, MaxB = 500, MaxA = 1000010, mod = 1000000007; struct Query { int l, r, id; bool operator<(const Query &a) const { return r < a.r; } } q[MaxN]; int n, m, a[MaxN]; vector<pair<int, int> > f[MaxN]; int last[MaxA]; int prime[MaxA... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// soc_design_mm_interconnect_0_avalon_st_adapter.v
// This file was auto-generated from altera_avalon_st_adapter_hw.tcl. If you edit it your changes
// will probably be lost.
//
// Generated using ACDS version 16.0 211
`timescale 1 ps / 1 ps
module soc_design_mm_interconnect_0_avalon_st_adapter #(
parameter inBi... |
#include <bits/stdc++.h> using namespace std; const int MAX_N = 100000; int N, M, S; vector<pair<int, int> > b; vector<pair<pair<int, int>, int> > s; vector<pair<int, int> > b2; vector<pair<pair<int, int>, int> > s2; int ans[MAX_N + 1]; priority_queue<pair<int, int>, vector<pair<int, int> >, ... |
`timescale 1ns/1ps
module tb_multiplier (); /* this is automatically generated */
reg clk;
// clock
initial begin
clk = 0;
forever #5 clk = ~clk;
end
`ifdef SINGLE
parameter SW = 24;
`endif
`ifdef DOUBLE
parameter SW = 54;// */
`endif
// (*NOTE*) replace reset, clock
reg [SW-1:0] a;
reg [S... |
// $Id: c_and_nto1.v 1534 2009-09-16 16:10:23Z dub $
/*
Copyright (c) 2007-2009, Trustees of The Leland Stanford Junior University
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
Redistributions of sou... |
#include <bits/stdc++.h> using namespace std; const int inf = 0x3f3f3f3f; const int _inf = 0xc0c0c0c0; const long long INF = 0x3f3f3f3f3f3f3f3f; const long long _INF = 0xc0c0c0c0c0c0c0c0; const long long mod = (int)1e9 + 7; const int N = 3e5 + 100; vector<int> vc[N], e[N]; int col[N]; int vis[N]; ... |
#include <bits/stdc++.h> using namespace std; const int K = 7; const int N = 2005; int a[K][N]; vector<int> s[N]; int d[N], n, k, p; void read() { cin >> n >> k; for (int i = 0; i < int(k); ++i) { for (int j = 0; j < int(n); ++j) { cin >> p; --p; if (i == 0) ... |
#include <bits/stdc++.h> using namespace std; int N; double A[100001]; double dp[100001]; int main() { scanf( %d , &N); for (int i = 1; i <= N; i++) scanf( %lf , A + i); double ans = 0.0; for (int i = 1; i <= N; i++) ans += A[i] + 2 * (dp[i] = (dp[i - 1] + A[i - 1]) * A[i]); printf( ... |
/*
* async_fifo: asynchronous FIFO, 18 bits wide
*
* (C) Arlet Ottens <>
*/
module async_fifo(
input clka,
input [17:0] in,
input wr,
output full,
input clkb,
output [17:0] out,
input rd,
output empty );
reg [10:0] head_a = 0;
reg [10:0] head_a_b = 0;
reg [10:0] head_b = 0;
reg [10:0] tail_b = 0;
reg [1... |
// We assume clock with frequency F = 100 MHz or period T = 10 ns
`timescale 1ns / 1ps
module moore_fsm_tb;
// Inputs (reg because they are assigned using procedural blocks)
reg clk;
reg rst;
reg inp;
// outputs
wire oup;
wire [2:0] current_state;
wire [2:0] next_state;
// Clock Const... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int n, a, b, k; const int MOD = 1000000007; int dp[5005][5005], sum[5005]; int main() { scanf( %d%d%d%d , &n, &b, &a, &k); for (int i = b; i <= n; i++) sum[i] = 1; dp[0][b] = 1; for (int i = 1; i <= k; i++) { for (int j = 1; j <= n; j++) { ... |
module testbench;
reg clk;
reg reset;
reg Compress;
reg Decompress;
initial
begin
clk = 1'b1;
reset = 1'b1;
Decompress = 1'b0;
#30 reset = 1'b0;
#50 Compress = 1'b1;
end
always
#5 clk = ~clk;
wire [17:0] oBufferIn;
BufferIn buffin(
.Clk(clk),
.InputBuffer(RequestInputBuffer),... |
#include <bits/stdc++.h> using namespace std; inline int read() { int x = 0, f = 1; char ch = getchar(); while (!(ch >= 0 && ch <= 9 )) { if (ch == - ) f = -1; ch = getchar(); } while (ch >= 0 && ch <= 9 ) { x = x * 10 + (ch - 0 ); ch = getchar(); } return... |
`define SC_IDLE 2'b00
`define SC_CVI 2'b01
`define SC_CVO 2'b10
module alt_vipitc131_IS2Vid_sync_compare(
input wire rst,
input wire clk,
// control signals
input wire [1:0] genlock_enable,
input wire serial_output,
input wire [13:0] h_total_minus_one,
input wire restart_count,
inp... |
#include <bits/stdc++.h> using namespace std; struct node { int first; int second; } a[350030]; int cmp(node a, node b) { if (a.first == b.first) { return a.second < b.second; } else return a.first > b.first; } int main() { int n; while (~scanf( %d , &n)) { for (int... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 20:16:57 02/26/2016
// Design Name:
// Module Name: Register
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
/... |
#include <bits/stdc++.h> using namespace std; int main() { int x; cin >> x; int a[x], i; for (i = 0; i < x; i++) { cin >> a[i]; } sort(a, a + x); int s = 0; int j = 0, m = 0; for (i = 0; i < x; i++) { while (j < x && a[j] - a[i] <= 5) { j++; s = max(s,... |
`timescale 1ns/10ps
module VGA2InterfaceSim;
reg clock;
reg reset;
reg color_r;
reg color_g;
reg color_b;
wire [10:0] fb_addr_h;
wire [10:0] fb_addr_v;
wire vga_hsync;
wire vga_vsync;
wire vga_r;
wire vga_g;
wire... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 20:07:12 10/28/2015
// Design Name:
// Module Name: UART_echo_test_module
// Project Name:
// Target Devices:
// Tool versions:
// Description:
... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; mt19937_64 rng(chrono::steady_clock::now().time_since_epoch().count()); const int nmax = 2e5 + 5; int t, n, a[nmax], b[nmax], f[nmax], L[nmax], R[nmax], d[nmax]; long long ans; vector<int> v1[nmax], v2[nmax]; int main() { srand(time(NULL)); ios::sync_w... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int n; vector<int> f, s; int main() { long long buf, sumf = 0, sums = 0; int last = 0; cin >> n; for (int i = 0; i < n; i++) { cin >> buf; if (buf > 0) { f.push_back(buf); sumf += buf; last = 1; } else { ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> #pragma GCC optimize( Ofast ) #pragma GCC optimization( unroll-loops ) using namespace std; template <typename T> ostream& operator<<(ostream& out, vector<T>& a) { for (auto& p : a) out << p << ; return out; } template <typename T> istream& operator>>(istream& inp, ve... |
//////////////////////////////////////////////////////////////////////////////////
// NPCG_Toggle_way_CE_timer for Cosmos OpenSSD
// Copyright (c) 2015 Hanyang University ENC Lab.
// Contributed by Ilyong Jung <>
// Yong Ho Song <>
//
// This file is part of Cosmos OpenSSD.
//
// Cosmos OpenSSD is free s... |
// TimeHoldOver_Qsys_mm_interconnect_0_avalon_st_adapter_006.v
// This file was auto-generated from altera_avalon_st_adapter_hw.tcl. If you edit it your changes
// will probably be lost.
//
// Generated using ACDS version 16.0 222
`timescale 1 ps / 1 ps
module TimeHoldOver_Qsys_mm_interconnect_0_avalon_st_adapter_0... |
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(false); cin.tie(0); cout.tie(0); long long n; cin >> n; multiset<long long> A, B; for (long long i = 0; i < n; i++) { long long num; cin >> num; A.insert(-num); } for (long long... |
#include <bits/stdc++.h> using namespace std; #define pb push_back #define ff first #define ss second #define lli long long int #define ll long long #define st string #define vi vector<int> #define vll vector<long long> #define tll tuple<ll,ll,ll> #define pii pair<int,int> #define pll pair<ll... |
#include <bits/stdc++.h> using namespace std; const int N = 200; long long n, num[N], tmp; int main() { cin >> n; for (int i = 0, v; i < n; i++) cin >> v, num[v]++; for (int i = 1; i <= 100; i++) { for (int j = 1; j < i; j++) tmp = max(0ll, min(num[0] - num[j], num[i])), num[j] += tmp,... |
#include <bits/stdc++.h> using namespace std; const int E9 = 1e9; const int E8 = 1e8; const int E7 = 1e7; const int E6 = 1e6; const int E5 = 1e5; const int E4 = 1e4; const int E3 = 1e3; const int N = 5e5 + 7; const int MOD = 1e9 + 7; const long long INF = 1e18; int n; bool dp[101][51][2][201];... |
//****************************************************************************************************
//*---------------Copyright (c) 2016 C-L-G.FPGA1988.lichangbeiju. All rights reserved-----------------
//
// -- It to be define --
// -- ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
module XorShift128Plus_tb ();
reg [127:0] seed;
reg clk;
reg rst;
reg seedStrobe;
reg read;
wire randomReady;
wire [63:0] randomValue;
integer i;
integer failures;
reg [63:0] testVector [0:99];
reg [63:0] testValue;
always #1 clk = ~clk;
initial begin
seed = {64'd2, 64'... |
#include <bits/stdc++.h> using namespace std; int t[40008]; int main() { ios::sync_with_stdio(false); cin.tie(0); cout.tie(0); long long n, m, k, l, p; cin >> n; string s; map<string, string> ex; map<string, int> kol; map<string, int> wh; for (int u = 1; u <= n; u++) { ... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 05.10.2017 12:13:15
// Design Name:
// Module Name: control
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revis... |
///////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995/2016 Xilinx, Inc.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//... |
`include "defines.v"
module serialcontrol(
input wire clk25,
input wire rst,
//Input
//Control from MMU
input wire[2:0] ramOp_i,
input wire mode_i, /* 0: data; 1: control */
input wire[7:0] storeData_i,
//Output
//Data to MMU
output wire[31:0] ramData_o,
... |
#include <bits/stdc++.h> using namespace std; int dp(int a, int b) { if ((a == 1 && b == 1) || b == 0) return 0; return dp(max(b + 1, a - 2), min(b + 1, a - 2)) + 1; } int main() { int n, m; cin >> n >> m; printf( %d , dp(max(n, m), min(n, m))); } |
#include <bits/stdc++.h> using namespace std; const int N = 2e5 + 7; int n, num[100], cnt[N]; long long a[N]; int main() { cin >> n; for (int i = 1; i <= n; i++) cin >> a[i]; for (int i = 1; i <= n; i++) { long long temp = a[i]; while (temp && temp % 2 == 0) { cnt[i]++; ... |
#include <bits/stdc++.h> using namespace std; struct pkt { int x, y; }; int main() { ios_base::sync_with_stdio(0); int n, m; cin >> n >> m; vector<string> p(n); for (int i = 0; i < n; ++i) cin >> p[i]; vector<vector<int> > a(n, vector<int>(m, -1)); for (int k = 0; k < n; ++k) { ... |
#include <bits/stdc++.h> using namespace std; int n, arr[206]; char str[206]; inline bool check1() { for (int i = 0; i < (n >> 1); ++i) { if (arr[i] >= arr[i + (n >> 1)]) return 0; } return 1; } inline bool check2() { for (int i = 0; i < (n >> 1); ++i) { if (arr[i] <= arr[i + (n ... |
// -------------------------------------------------------------
//
// Generated Architecture Declaration for rtl of inst_eca_e
//
// Generated
// by: wig
// on: Mon Mar 22 13:27:29 2004
// cmd: H:\work\mix_new\mix\mix_0.pl -strip -nodelta ../../mde_tests.xls
//
// !!! Do not edit this file! Autogenerated by MIX !... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 14:01:00 04/23/2015
// Design Name:
// Module Name: modBigNumbers
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies: ... |
//Legal Notice: (C)2015 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic functions, and any
//output files any of the foregoing (including device programming or
//simulation files), and any associated do... |
module transmision (input enable,
input wire [7:0] dout,
output busy,
output reg done,
input wire clk_div,
output reg tx);
parameter count = 8;
initial begin
tx <= 1'b1;
done=0;
end
parameter STATE_IDLE = 2'... |
#include <bits/stdc++.h> using namespace std; using ll = long long; int main() { ll N, M; cin >> N >> M; if (N > M) swap(N, M); ll rem = 0; if (N == 1) { rem = min(M % 6, 6 - M % 6); } else { if (N % 2 == 1 && M % 2 == 1) { rem = 1; } else { if (M == 2) { ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//
// Copyright 2011 Ettus Research LLC
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is dis... |
#include <bits/stdc++.h> using namespace std; const int inf = 1e9; const long long Inf = 1e18; const int N = 2e6 + 10; const int mod = 1e9 + 7; int gi() { int x = 0, o = 1; char ch = getchar(); while ((ch < 0 || ch > 9 ) && ch != - ) ch = getchar(); if (ch == - ) o = -1, ch = getchar();... |
module ER_CDE_Handler(ER_CDE, clk, HEX0, HEX1, HEX2, HEX3, HEX1DP);
input[7:0] ER_CDE;
input clk;
output reg[6:0] HEX0, HEX1, HEX2, HEX3;
output reg HEX1DP;
always @(posedge clk) begin
case (ER_CDE[7:0])
8'b00000000: begin //No Error
HEX0 = 7'b0000000;
HEX1 = 7'b0000000;
HEX2 = 7'b0000000;
HEX3 = 7... |
#include <bits/stdc++.h> using namespace std; const int SIGMA_SIZE = 26; const int MAXNODE = 1000010; struct AhoCorasickAutomata { int ch[MAXNODE][SIGMA_SIZE]; int f[MAXNODE]; int match[MAXNODE]; int mp[MAXNODE]; int sz; void init() { sz = 1; } int idx(char c) { if (c <= z &&... |
#include <bits/stdc++.h> using namespace std; int main() { int n, s, sum = 0, big; cin >> n >> s; int arr[n]; for (int i = 0; i < n; i++) { cin >> arr[i]; sum += arr[i]; } sort(arr, arr + n); big = arr[n - 1]; if (sum - big <= s) cout << YES ; else cout <... |
`default_nettype none
`timescale 1ns / 1ps
/***********************************************************************************************************************
* *
* ANTIKERNEL v0.1 ... |
#include <bits/stdc++.h> using namespace std; int main() { string s; cin >> s; if (s.size() == 1) { int a = s[0] - 48; if (a % 4 == 0) cout << 4; else cout << 0; } else { int a = (s[s.size() - 2] - 48) * 10 + (s[s.size() - 1] - 48); if (a % 4 == 0) ... |
#include <bits/stdc++.h> int main() { int s = 0, ar[5], t = 0; for (int i = 0; i < 5; ++i) { scanf( %d , &ar[i]); s += ar[i]; } if (s % 5 || s == 0) printf( -1 n ); else { for (int i = 0; i < 5; ++i) if (ar[i] % 2) ++t; if ((((s / 5) % 2) && (t == 1 || t == 3 ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
// (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
// laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant ... |
#include <bits/stdc++.h> #pragma GCC optimize(2) using namespace std; const long long mod = 1e9 + 7; long long a[200010]; int main() { long long n, k; cin >> n >> k; long long i; for (i = 1; i <= n; i++) scanf( %d , &a[i]); long long sum = 0; for (i = 1; i <= n; i++) { long long ... |
// fpgaTop_kc705.v - the top-level Verilog for the Xilinx KC705 board
// Copyright (c) 2011-2012 Atomic Rules LLC - ALL RIGHTS RESERVED
//
module fpgaTop (
input wire sys0_clkp, // sys0 Clock +
input wire sys0_clkn, // sys0 Clock -
input wire sys0_rst, // sys0 Reset (activ... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Module Name: mask_to_zero
// Description: Selects active region from input data, bit reverses and masks LS
// bits to zero depending on the position of the leading zero identified
// by... |
#include <bits/stdc++.h> using namespace std; int main() { int N; while (cin >> N) { int Store[31][31], i, j, SumR, SumC, Count = 0; vector<int> Row, Col; memset(Store, false, sizeof(Store)); for (i = 0; i < N; i++) for (j = 0; j < N; j++) cin >> Store[i][j]; for (i = 0... |
#include <bits/stdc++.h> using namespace std; int gcd(int u, int v) { int tmp; while (v) { tmp = v; v = u % v; u = tmp; } return u; } int main() { int a, b, t; cin >> a >> b; if (a > b) { swap(a, b); } if ((t = gcd(a, b)) == 1) { cout << NO << ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//*****************************************************************************
// (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
/... |
#include <bits/stdc++.h> using namespace std; int main() { int n; cin >> n; long long int a[n], sum = 0; vector<int> v; vector<int> u; for (int i = 0; i < n; i++) { cin >> a[i]; sum += a[i]; if (a[i] > 0) u.push_back(a[i]); else v.push_back(0 - a[i]); ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
//*****************************************************************************
// (c) Copyright 2008-2009 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
// ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
// megafunction wizard: %FIFO%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: scfifo
// ============================================================
// File Name: altpcierd_tx_ecrc_ctl_fifo.v
// Megafunction Name(s):
// scfifo
//
// Simulation Library Files(s):
// altera_mf
// ================... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int main() { string a, b, c; cin >> a >> b >> c; if (a[0] == c[2] && a[1] == c[1] && a[2] == c[0] && b[0] == b[2]) cout << YES << endl; else cout << NO << endl; } |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//Legal Notice: (C)2012 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic functions, and any
//output files any of the foregoing (including device programming or
//simulation files), and any associate... |
// Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2017.3 (win64) Build Wed Oct 4 19:58:22 MDT 2017
// Date : Fri Nov 17 14:49:55 2017
// Host : egk-pc running 64-bit major release (build... |
#include <bits/stdc++.h> using namespace std; const long long N = 2e3 + 5; const long long MOD = 1e9 + 7; long long nCr[N][N]; void precompute() { nCr[0][0] = 1; for (long long i = 1; i < N; i++) { nCr[i][0] = 1; for (long long j = 1; j <= i; j++) { nCr[i][j] = nCr[i - 1][j - 1] + ... |
// (C) 2001-2016 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulation
// files), and any associated doc... |
module hf_compression (
input wire val_in,
output reg [3:0] hf_c,
output reg hf_c_valid,
input wire CLK,
input wire Reset
);
// parameter len = 4;
// The length of an uncompressed data amount
/* For constructing the Tree:
* the uncompressed length is 4
* that leaves 0 -> F
* Which is a total of ... |
module mojo_top(
// 50MHz clock input
input clk,
// Input from reset button (active low)
input rst_n,
// cclk input from AVR, high when AVR is ready
input cclk,
// Outputs to the 8 onboard LEDs
output[7:0]led,
// AVR SPI connections
output spi_miso,
input spi_ss,
input sp... |
#include <bits/stdc++.h> using namespace std; using vi = vector<int>; using vvi = vector<vi>; using ll = long long; using vll = vector<ll>; using vpi = vector<pair<int, int>>; int main() { ios_base::sync_with_stdio(false); int n; cin >> n; int speedlim = 301; bool overtake = true; ... |
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