name string | code string | asm string | file string |
|---|---|---|---|
ncnn::float32_to_int8(float) | signed char float32_to_int8(float value)
{
float tmp;
if (value >= 0.f)
tmp = value + 0.5f;
else
tmp = value - 0.5f;
if (tmp > 127)
return 127;
if (tmp < -128)
return -128;
return static_cast<signed char>(tmp);
} | movss %xmm0, -0x8(%rsp)
movss -0x8(%rsp), %xmm0
xorps %xmm1, %xmm1
ucomiss %xmm1, %xmm0
jb 0x16ee5ca
movss 0x7a9a64(%rip), %xmm0 # 0x1e98020
addss -0x8(%rsp), %xmm0
movss %xmm0, -0xc(%rsp)
jmp 0x16ee5e2
movss -0x8(%rsp), %xmm0
movss 0x7a9a48(%rip), %xmm1 # 0x1e98020
subss %xmm1, %xmm0
movss %xmm0, -0xc(%rsp)
movss ... | /Tencent[P]ncnn/src/layer/cast.cpp |
ncnn::Cast_x86::forward(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | int Cast_x86::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
{
if (type_from == type_to)
{
top_blob = bottom_blob;
return 0;
}
int w = bottom_blob.w;
int h = bottom_blob.h;
int d = bottom_blob.d;
int channels = bottom_blob.c;
int dims = bottom_bl... | subq $0x378, %rsp # imm = 0x378
movq %rdi, 0x190(%rsp)
movq %rsi, 0x188(%rsp)
movq %rdx, 0x180(%rsp)
movq %rcx, 0x178(%rsp)
movq 0x190(%rsp), %rcx
movq %rcx, 0x80(%rsp)
movl 0xd0(%rcx), %eax
cmpl 0xd4(%rcx), %eax
jne 0x16f1d44
movq 0x188(%rsp), %rax
movq 0x180(%rsp), %rcx
movq %rcx, 0x1b0(%rsp)
movq %rax, 0x... | /Tencent[P]ncnn/src/layer/x86/cast_x86.cpp |
ncnn::cast_fp16_to_fp32_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_fp16_to_fp32_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_F16C && __AVX__ && !__F16C__
if (ncnn::cpu_support_x86_f16c())
{
cast_fp16_to_fp32_sse_f16c(bottom_blob, top_blob, opt);
return;
}
#endif
const int w = bottom_blob.w;
const int h =... | subq $0x2d8, %rsp # imm = 0x2D8
movq %rdi, 0x140(%rsp)
movq %rsi, 0x138(%rsp)
movq %rdx, 0x130(%rsp)
movq 0x140(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x12c(%rsp)
movq 0x140(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x128(%rsp)
movq 0x140(%rsp), %rax
movl 0x34(%rax), %eax
movl %eax, 0x124(%rsp)
movq... | /Tencent[P]ncnn/src/layer/x86/cast_fp16.h |
ncnn::cast_fp32_to_fp16_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_fp32_to_fp16_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_RUNTIME_CPU && NCNN_F16C && __AVX__ && !__F16C__
if (ncnn::cpu_support_x86_f16c())
{
cast_fp32_to_fp16_sse_f16c(bottom_blob, top_blob, opt);
return;
}
#endif
const int w = bottom_blob.... | pushq %rbp
movq %rsp, %rbp
andq $-0x40, %rsp
subq $0x440, %rsp # imm = 0x440
movq %rdi, 0x210(%rsp)
movq %rsi, 0x208(%rsp)
movq %rdx, 0x200(%rsp)
movq 0x210(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x1fc(%rsp)
movq 0x210(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x1f8(%rsp)
movq 0x210(%rsp), %rax
movl... | /Tencent[P]ncnn/src/layer/x86/cast_fp16.h |
ncnn::cast_fp32_to_bf16_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_fp32_to_bf16_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_fp32_to_bf16_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#... | pushq %rbp
movq %rsp, %rbp
andq $-0x40, %rsp
subq $0xa40, %rsp # imm = 0xA40
movq %rdi, 0x220(%rsp)
movq %rsi, 0x218(%rsp)
movq %rdx, 0x210(%rsp)
callq 0x7e2f0
cmpl $0x0, %eax
je 0x16f7bd3
movq 0x220(%rsp), %rdi
movq 0x218(%rsp), %rsi
movq 0x210(%rsp), %rdx
callq 0x1701b60
jmp 0x16f8ab2
movq 0x220(%rsp), %ra... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::cast_bf16_to_fp32_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_bf16_to_fp32_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_bf16_to_fp32_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#if NCNN_RUNTIME_CPU ... | pushq %rbp
movq %rsp, %rbp
andq $-0x40, %rsp
subq $0x780, %rsp # imm = 0x780
movq %rdi, 0x190(%rsp)
movq %rsi, 0x188(%rsp)
movq %rdx, 0x180(%rsp)
callq 0x7e2f0
cmpl $0x0, %eax
je 0x16f8b13
movq 0x190(%rsp), %rdi
movq 0x188(%rsp), %rsi
movq 0x180(%rsp), %rdx
callq 0x17028a0
jmp 0x16f9995
movq 0x190(%rsp), %ra... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::cast_fp16_to_fp32_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_fp16_to_fp32_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_F16C && __AVX__ && !__F16C__
if (ncnn::cpu_support_x86_f16c())
{
cast_fp16_to_fp32_sse_f16c(bottom_blob, top_blob, opt);
return;
}
#endif
const int w = bottom_blob.w;
const int h =... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x3e0, %rsp # imm = 0x3E0
movq %rdi, 0x1a0(%rsp)
movq %rsi, 0x198(%rsp)
movq %rdx, 0x190(%rsp)
movq 0x1a0(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x18c(%rsp)
movq 0x1a0(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x188(%rsp)
movq 0x1a0(%rsp), %rax
movl... | /Tencent[P]ncnn/src/layer/x86/cast_fp16.h |
ncnn::cast_fp32_to_bf16_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_fp32_to_bf16_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_fp32_to_bf16_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x660, %rsp # imm = 0x660
movq %rdi, 0x1b0(%rsp)
movq %rsi, 0x1a8(%rsp)
movq %rdx, 0x1a0(%rsp)
callq 0x7e280
cmpl $0x0, %eax
je 0x16fc093
movq 0x1b0(%rsp), %rdi
movq 0x1a8(%rsp), %rsi
movq 0x1a0(%rsp), %rdx
callq 0x1703660
jmp 0x16fcf24
movq 0x1b0(%rsp), %ra... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::cast_bf16_to_fp32_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_bf16_to_fp32_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_bf16_to_fp32_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#if NCNN_RUNTIME_CPU ... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x4c0, %rsp # imm = 0x4C0
movq %rdi, 0x150(%rsp)
movq %rsi, 0x148(%rsp)
movq %rdx, 0x140(%rsp)
callq 0x7e280
cmpl $0x0, %eax
je 0x16fcf83
movq 0x150(%rsp), %rdi
movq 0x148(%rsp), %rsi
movq 0x140(%rsp), %rdx
callq 0x17043f0
jmp 0x16fdbeb
movq 0x150(%rsp), %ra... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::cast_bf16_to_fp32_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_bf16_to_fp32_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_bf16_to_fp32_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#if NCNN_RUNTIME_CPU ... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x4e0, %rsp # imm = 0x4E0
movq %rdi, 0x168(%rsp)
movq %rsi, 0x160(%rsp)
movq %rdx, 0x158(%rsp)
callq 0x7e280
cmpl $0x0, %eax
je 0x1700e83
movq 0x168(%rsp), %rdi
movq 0x160(%rsp), %rsi
movq 0x158(%rsp), %rdx
callq 0x17043f0
jmp 0x1701b0f
movq 0x168(%rsp), %ra... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::cast_fp32_to_bf16_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_fp32_to_bf16_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_fp32_to_bf16_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x640, %rsp # imm = 0x640
movq %rdi, 0x1a8(%rsp)
movq %rsi, 0x1a0(%rsp)
movq %rdx, 0x198(%rsp)
movq 0x1a8(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x194(%rsp)
movq 0x1a8(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x190(%rsp)
movq 0x1a8(%rsp), %rax
movl... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::cast_bf16_to_fp32_sse(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void cast_bf16_to_fp32_sse(const Mat& bottom_blob, Mat& top_blob, const Option& opt)
{
#if NCNN_AVX512BF16 && __AVX512F__ && !__AVX512BF16__
if (ncnn::cpu_support_x86_avx512_bf16())
{
cast_bf16_to_fp32_sse_avx512bf16(bottom_blob, top_blob, opt);
return;
}
#endif
#if NCNN_RUNTIME_CPU ... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x500, %rsp # imm = 0x500
movq %rdi, 0x168(%rsp)
movq %rsi, 0x160(%rsp)
movq %rdx, 0x158(%rsp)
movq 0x168(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x154(%rsp)
movq 0x168(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x150(%rsp)
movq 0x168(%rsp), %rax
movl... | /Tencent[P]ncnn/src/layer/x86/cast_bf16.h |
ncnn::HardSigmoid_x86_avx::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int HardSigmoid_x86_avx::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int channels = bottom_top_blob.c;
int elempack = bottom_top_blob.elempack;
int size = w * h * d * elempack;
#pragma omp ... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x620, %rsp # imm = 0x620
movq %rdi, 0x1c0(%rsp)
movq %rsi, 0x1b8(%rsp)
movq %rdx, 0x1b0(%rsp)
movq 0x1c0(%rsp), %rax
movq %rax, 0x38(%rsp)
movq 0x1b8(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x1ac(%rsp)
movq 0x1b8(%rsp), %rax
movl 0x30(%rax), %eax
movl ... | /Tencent[P]ncnn/build_O0/src/layer/x86/hardsigmoid_x86_avx.cpp |
ncnn::SELU_x86_fma::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int SELU_x86_fma::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int elempack = bottom_top_blob.elempack;
int channels = bottom_top_blob.c;
int size = w * h * d * elempack;
#pragma omp paralle... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x15c0, %rsp # imm = 0x15C0
movq %rdi, 0x280(%rsp)
movq %rsi, 0x278(%rsp)
movq %rdx, 0x270(%rsp)
movq 0x280(%rsp), %rax
movq %rax, 0x50(%rsp)
movq 0x278(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x26c(%rsp)
movq 0x278(%rsp), %rax
movl 0x30(%rax), %eax
movl... | /Tencent[P]ncnn/build_O0/src/layer/x86/selu_x86_fma.cpp |
ncnn::HardSwish::load_param(ncnn::ParamDict const&) | int HardSwish::load_param(const ParamDict& pd)
{
// Note that tensorflow/pytorch use alpha,beta = 1/6, 0.5, not the default value here.
// You can setup them manually in .param file.
alpha = pd.get(0, 0.2f);
beta = pd.get(1, 0.5f);
lower = -beta / alpha;
upper = (1.f / alpha) + lower;
retur... | subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movq 0x10(%rsp), %rax
movq %rax, (%rsp)
movq 0x8(%rsp), %rdi
xorl %esi, %esi
movss 0x79b6ba(%rip), %xmm0 # 0x1eada00
callq 0x78df0
movq (%rsp), %rax
movss %xmm0, 0xd0(%rax)
movq 0x8(%rsp), %rdi
movl $0x1, %esi
movss 0x785cb7(%rip), %xmm0 # 0x1e98020
callq ... | /Tencent[P]ncnn/src/layer/hardswish.cpp |
ncnn::Mish_x86::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int Mish_x86::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int channels = bottom_top_blob.c;
int elempack = bottom_top_blob.elempack;
int size = w * h * d * elempack;
#pragma omp parallel fo... | pushq %r14
pushq %rbx
subq $0x15a8, %rsp # imm = 0x15A8
movq %rdi, 0xf8(%rsp)
movq %rsi, 0xf0(%rsp)
movq %rdx, 0xe8(%rsp)
movq 0xf0(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0xe4(%rsp)
movq 0xf0(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0xe0(%rsp)
movq 0xf0(%rsp), %rax
movl 0x34(%rax), %eax
movl %eax, 0... | /Tencent[P]ncnn/src/layer/x86/mish_x86.cpp |
ncnn::StatisticsPooling::forward(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | int StatisticsPooling::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
{
int w = bottom_blob.w;
int h = bottom_blob.h;
int channels = bottom_blob.c;
int size = w * h;
size_t elemsize = bottom_blob.elemsize;
int out_channels = channels;
if (include_stddev)
{
... | subq $0x318, %rsp # imm = 0x318
movq %rdi, 0x150(%rsp)
movq %rsi, 0x148(%rsp)
movq %rdx, 0x140(%rsp)
movq %rcx, 0x138(%rsp)
movq 0x150(%rsp), %rax
movq 0x148(%rsp), %rcx
movl 0x2c(%rcx), %ecx
movl %ecx, 0x134(%rsp)
movq 0x148(%rsp), %rcx
movl 0x30(%rcx), %ecx
movl %ecx, 0x130(%rsp)
movq 0x148(%rsp), %rcx
mov... | /Tencent[P]ncnn/src/layer/statisticspooling.cpp |
ncnn::Swish_x86_avx::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int Swish_x86_avx::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int channels = bottom_top_blob.c;
int elempack = bottom_top_blob.elempack;
int size = w * h * d * elempack;
#pragma omp parall... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x1500, %rsp # imm = 0x1500
movq %rdi, 0x178(%rsp)
movq %rsi, 0x170(%rsp)
movq %rdx, 0x168(%rsp)
movq 0x170(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x164(%rsp)
movq 0x170(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x160(%rsp)
movq 0x170(%rsp), %rax
mov... | /Tencent[P]ncnn/build_O0/src/layer/x86/swish_x86_avx.cpp |
ncnn::Gemm::load_model(ncnn::ModelBin const&) | int Gemm::load_model(const ModelBin& mb)
{
if (constantA == 1)
{
if (transA == 0)
A_data = mb.load(constantK, constantM, 0);
else
A_data = mb.load(constantM, constantK, 0);
if (A_data.empty())
return -100;
}
if (constantB == 1)
{
i... | subq $0x9f8, %rsp # imm = 0x9F8
movq %rdi, 0x4b8(%rsp)
movq %rsi, 0x4b0(%rsp)
movq 0x4b8(%rsp), %rax
movq %rax, 0x180(%rsp)
cmpl $0x1, 0xe0(%rax)
jne 0x17322c1
movq 0x180(%rsp), %rax
cmpl $0x0, 0xd8(%rax)
jne 0x1731d62
movq 0x180(%rsp), %rax
movq 0x4b0(%rsp), %rsi
movl 0xf4(%rax), %edx
movl 0xec(%rax), %ecx
... | /Tencent[P]ncnn/src/layer/gemm.cpp |
ncnn::Gemm::forward_int8(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int Gemm::forward_int8(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
const Mat& A0 = constantA ? A_data : bottom_blobs[0];
const Mat& B0 = constantB ? B_data : constantA ? bottom_blobs[0] : bottom_blobs[1];
Mat A;
if (transA == 0)
{
A = A0;
... | subq $0xa58, %rsp # imm = 0xA58
movq %rdi, 0x568(%rsp)
movq %rsi, 0x560(%rsp)
movq %rdx, 0x558(%rsp)
movq %rcx, 0x550(%rsp)
movq 0x568(%rsp), %rax
movq %rax, 0x260(%rsp)
cmpl $0x0, 0xe0(%rax)
je 0x1737048
movq 0x260(%rsp), %rax
addq $0x120, %rax # imm = 0x120
movq %rax, 0x258(%rsp)
jmp 0x1737061
m... | /Tencent[P]ncnn/src/layer/gemm.cpp |
ncnn::Gemm_x86::Gemm_x86() | Gemm_x86::Gemm_x86()
{
#if __SSE2__
support_packing = true;
#endif // __SSE2__
nT = 0;
} | subq $0x98, %rsp
movq %rdi, 0x38(%rsp)
movq 0x38(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x1731200
movq 0x18(%rsp), %rax
leaq 0x7e9739(%rip), %rcx # 0x1f24bb0
addq $0x10, %rcx
movq %rcx, (%rax)
addq $0x248, %rax # imm = 0x248
movq %rax, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x20(%rsp)
movq $0x0, (%r... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::Gemm_x86::create_pipeline(ncnn::Option const&) | int Gemm_x86::create_pipeline(const Option& opt)
{
#if NCNN_INT8
if (int8_scale_term)
{
return create_pipeline_int8(opt);
}
#endif
if (constantA)
{
const int M = constantM;
const int K = constantK;
int TILE_M, TILE_N, TILE_K;
get_optimal_tile_mnk(M, 0, K, co... | pushq %rbx
subq $0x730, %rsp # imm = 0x730
movq %rdi, 0x348(%rsp)
movq %rsi, 0x340(%rsp)
movq 0x348(%rsp), %rax
movq %rax, 0x138(%rsp)
cmpl $0x0, 0x10c(%rax)
je 0x173b632
movq 0x138(%rsp), %rdi
movq 0x340(%rsp), %rsi
callq 0x173d910
movl %eax, 0x354(%rsp)
jmp 0x173d8ec
movq 0x138(%rsp), %rax
cmpl $0x0, 0xe0(... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::pack_A_tile(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_A_tile(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
const int elempack = A.elempack;
const int A_hstep = A.dims == 3 ? (int)A.cstep : A.w;
float* pp = AT;
int ii = 0;
#if __SSE2__
#if __AVX__
#if __AVX512F__
for (; ii + 15 < max_ii; ii += 16)
{
if (el... | subq $0x398, %rsp # imm = 0x398
movq %rdi, 0xd8(%rsp)
movq %rsi, 0xd0(%rsp)
movl %edx, 0xcc(%rsp)
movl %ecx, 0xc8(%rsp)
movl %r8d, 0xc4(%rsp)
movl %r9d, 0xc0(%rsp)
movq 0xd8(%rsp), %rax
movl 0x18(%rax), %eax
movl %eax, 0xbc(%rsp)
movq 0xd8(%rsp), %rax
cmpl $0x3, 0x28(%rax)
jne 0x17405f7
movq 0xd8(%rsp), %rax... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::Gemm_x86::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int Gemm_x86::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
#if NCNN_INT8
if (int8_scale_term)
{
// return Gemm::forward_int8(bottom_blobs, top_blobs, opt);
return forward_int8(bottom_blobs, top_blobs, opt);
}
#endif
int M;
int... | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x890, %rsp # imm = 0x890
movq %rdi, 0x4a0(%rsp)
movq %rsi, 0x498(%rsp)
movq %rdx, 0x490(%rsp)
movq %rcx, 0x488(%rsp)
movq 0x4a0(%rsp), %rax
movq %rax, 0x238(%rsp)
cmpl $0x0, 0x10c(%rax)
je 0x1746039
movq 0x238(%rsp), %rdi
movq 0x498(%rsp), %rsi
mo... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::Gemm_x86::forward_int8(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int Gemm_x86::forward_int8(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
int M;
int N;
if (constantA && constantB)
{
M = constantM;
N = constantN;
}
else if (constantA)
{
const Mat& B = bottom_blobs[0];
M = const... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x718, %rsp # imm = 0x718
movq %rdi, 0x3e8(%rsp)
movq %rsi, 0x3e0(%rsp)
movq %rdx, 0x3d8(%rsp)
movq %rcx, 0x3d0(%rsp)
movq 0x3e8(%rsp), %rax
movq %rax, 0x1d8(%rsp)
cmpl $0x0, 0xe0(%rax)
je 0x1749372
movq 0x1d8(%rsp), %rax
cmpl $0x0, 0xe4... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::gemm_AT_BT_x86(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, int, int, int, int, ncnn::Option const&) | static int gemm_AT_BT_x86(const Mat& AT, const Mat& BT, const Mat& C, Mat& top_blob, int broadcast_type_C, int M, int N, int K, int output_transpose, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
// NCNN_LOGE("M/N/K = %d %d %d", M, N, K);
int TILE_M, TILE_N, TILE_K... | pushq %rbp
pushq %rbx
subq $0x7f8, %rsp # imm = 0x7F8
movq 0x848(%rsp), %rax
movl 0x840(%rsp), %eax
movl 0x838(%rsp), %eax
movl 0x830(%rsp), %eax
movl 0x828(%rsp), %eax
movl 0x820(%rsp), %eax
movl 0x818(%rsp), %eax
movl 0x810(%rsp), %eax
movq %rdi, 0x3c0(%rsp)
movq %rsi, 0x3b8(%rsp)
movq %rdx, 0x3b0(%rsp)
mo... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::get_optimal_tile_mnk_int8(int, int, int, int, int, int, int&, int&, int&, int) | static void get_optimal_tile_mnk_int8(int M, int N, int K, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int& TILE_M, int& TILE_N, int& TILE_K, int nT)
{
// resolve optimal tile size from cache size
const size_t l2_cache_size = get_cpu_level2_cache_size();
if (nT == 0)
nT = get_phy... | subq $0x98, %rsp
movl 0xb8(%rsp), %eax
movq 0xb0(%rsp), %rax
movq 0xa8(%rsp), %rax
movq 0xa0(%rsp), %rax
movl %edi, 0x94(%rsp)
movl %esi, 0x90(%rsp)
movl %edx, 0x8c(%rsp)
movl %ecx, 0x88(%rsp)
movl %r8d, 0x84(%rsp)
movl %r9d, 0x80(%rsp)
callq 0x7e540
cltq
movq %rax, 0x78(%rsp)
cmpl $0x0, 0xb8(%rsp)
jne 0x1756a44
callq ... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::transpose_pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void transpose_pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
transpose_pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
... | subq $0x20, %rsp
movq %rdi, -0x20(%rsp)
movq %rsi, -0x28(%rsp)
movl %edx, -0x2c(%rsp)
movl %ecx, -0x30(%rsp)
movl %r8d, -0x34(%rsp)
movl %r9d, -0x38(%rsp)
movq -0x20(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, -0x3c(%rsp)
movq -0x28(%rsp), %rax
movq %rax, -0x18(%rsp)
movq -0x18(%rsp), %rax
movq (%rax), %rax
movq %rax,... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
}
#endif
#if NCN... | subq $0x78, %rsp
movq %rdi, -0x8(%rsp)
movq %rsi, -0x10(%rsp)
movl %edx, -0x14(%rsp)
movl %ecx, -0x18(%rsp)
movl %r8d, -0x1c(%rsp)
movl %r9d, -0x20(%rsp)
movq -0x10(%rsp), %rax
movq %rax, (%rsp)
movq (%rsp), %rax
movq (%rax), %rax
movq %rax, -0x28(%rsp)
movl $0x0, -0x2c(%rsp)
movl -0x2c(%rsp), %eax
addl $0x3, %eax
cmpl... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_B_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_B_tile_int8(const Mat& B, Mat& BT, int j, int max_jj, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_B_tile_int8_avx512vnni(B, BT, j, max_jj, k, max_kk);
return;
}
#endif
#if NCN... | subq $0x140, %rsp # imm = 0x140
movq %rdi, 0x40(%rsp)
movq %rsi, 0x38(%rsp)
movl %edx, 0x34(%rsp)
movl %ecx, 0x30(%rsp)
movl %r8d, 0x2c(%rsp)
movl %r9d, 0x28(%rsp)
movq 0x38(%rsp), %rax
movq %rax, 0x48(%rsp)
movq 0x48(%rsp), %rax
movq (%rax), %rax
movq %rax, 0x20(%rsp)
movl $0x0, 0x1c(%rsp)
movl 0x1c(%rsp), ... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::transpose_unpack_output_tile(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void transpose_unpack_output_tile(const Mat& topT, Mat& top_blob, int i, int max_ii, int j, int max_jj)
{
const int out_elempack = top_blob.elempack;
const int out_hstep = top_blob.dims == 3 ? (int)top_blob.cstep : top_blob.w;
const float* pp = topT;
int ii = 0;
#if __SSE2__
#if __AVX__
#if __A... | subq $0x2d8, %rsp # imm = 0x2D8
movq %rdi, 0xb8(%rsp)
movq %rsi, 0xb0(%rsp)
movl %edx, 0xac(%rsp)
movl %ecx, 0xa8(%rsp)
movl %r8d, 0xa4(%rsp)
movl %r9d, 0xa0(%rsp)
movq 0xb0(%rsp), %rax
movl 0x18(%rax), %eax
movl %eax, 0x9c(%rsp)
movq 0xb0(%rsp), %rax
cmpl $0x3, 0x28(%rax)
jne 0x1773967
movq 0xb0(%rsp), %rax... | /Tencent[P]ncnn/src/layer/x86/gemm_x86.cpp |
ncnn::Gemm_x86_avx512::create_pipeline_int8(ncnn::Option const&) | int Gemm_x86_avx512::create_pipeline_int8(const Option& opt)
{
if (constantA)
{
const int M = constantM;
const int K = constantK;
int TILE_M, TILE_N, TILE_K;
get_optimal_tile_mnk_int8(M, 0, K, constant_TILE_M, constant_TILE_N, constant_TILE_K, TILE_M, TILE_N, TILE_K, opt.num_thr... | pushq %rbx
subq $0x5f0, %rsp # imm = 0x5F0
movq %rdi, 0x2b0(%rsp)
movq %rsi, 0x2a8(%rsp)
movq 0x2b0(%rsp), %rax
movq %rax, 0x100(%rsp)
cmpl $0x0, 0xe0(%rax)
je 0x1798bbf
movq 0x100(%rsp), %rax
movl 0xec(%rax), %ecx
movl %ecx, 0x2a4(%rsp)
movl 0xf4(%rax), %ecx
movl %ecx, 0x2a0(%rsp)
movl 0x2a4(%rsp), %edi
mov... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx512.cpp |
ncnn::gemm_AT_BT_x86(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, int, int, int, int, ncnn::Option const&) | static int gemm_AT_BT_x86(const Mat& AT, const Mat& BT, const Mat& C, Mat& top_blob, int broadcast_type_C, int M, int N, int K, int output_transpose, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
// NCNN_LOGE("M/N/K = %d %d %d", M, N, K);
int TILE_M, TILE_N, TILE_K... | pushq %rbp
pushq %rbx
subq $0x7f8, %rsp # imm = 0x7F8
movq 0x848(%rsp), %rax
movl 0x840(%rsp), %eax
movl 0x838(%rsp), %eax
movl 0x830(%rsp), %eax
movl 0x828(%rsp), %eax
movl 0x820(%rsp), %eax
movl 0x818(%rsp), %eax
movl 0x810(%rsp), %eax
movq %rdi, 0x3c0(%rsp)
movq %rsi, 0x3b8(%rsp)
movq %rdx, 0x3b0(%rsp)
mo... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx512.cpp |
ncnn::gemm_AT_x86(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, int, int, int, int, ncnn::Option const&) | static int gemm_AT_x86(const Mat& AT, const Mat& B, const Mat& C, Mat& top_blob, int broadcast_type_C, int M, int K, int transB, int output_transpose, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
const int N = transB ? (B.dims == 3 ? B.c : B.h) * B.elempack : B.w;
... | pushq %rbp
pushq %rbx
subq $0xb28, %rsp # imm = 0xB28
movq 0xb78(%rsp), %rax
movl 0xb70(%rsp), %eax
movl 0xb68(%rsp), %eax
movl 0xb60(%rsp), %eax
movl 0xb58(%rsp), %eax
movl 0xb50(%rsp), %eax
movl 0xb48(%rsp), %eax
movl 0xb40(%rsp), %eax
movq %rdi, 0x530(%rsp)
movq %rsi, 0x528(%rsp)
movq %rdx, 0x520(%rsp)
mo... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx512.cpp |
ncnn::gemm_x86(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, int, int, int, ncnn::Option const&) | static int gemm_x86(const Mat& A, const Mat& B, const Mat& C, Mat& top_blob, int broadcast_type_C, int transA, int transB, int output_transpose, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
const int M = transA ? A.w : (A.dims == 3 ? A.c : A.h) * A.elempack;
const ... | pushq %rbp
pushq %rbx
subq $0xc58, %rsp # imm = 0xC58
movq 0xca0(%rsp), %rax
movl 0xc98(%rsp), %eax
movl 0xc90(%rsp), %eax
movl 0xc88(%rsp), %eax
movl 0xc80(%rsp), %eax
movl 0xc78(%rsp), %eax
movl 0xc70(%rsp), %eax
movq %rdi, 0x5e8(%rsp)
movq %rsi, 0x5e0(%rsp)
movq %rdx, 0x5d8(%rsp)
movq %rcx, 0x5d0(%rsp)
mo... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx512.cpp |
ncnn::pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
}
#endif
#if NCN... | pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
andq $-0x40, %rsp
subq $0x8c0, %rsp # imm = 0x8C0
movq %rdi, 0x1d0(%rsp)
movq %rsi, 0x1c8(%rsp)
movl %edx, 0x1c4(%rsp)
movl %ecx, 0x1c0(%rsp)
movl %r8d, 0x1bc(%rsp)
movl %r9d, 0x1b8(%rsp)
callq 0x7e2e0
cmpl $0x0, %eax
je 0x17c4094
movq 0x1d0(%rsp), ... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::gemm_BT_x86(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, int, int, int, int, ncnn::Option const&) | static int gemm_BT_x86(const Mat& A, const Mat& BT, const Mat& C, Mat& top_blob, int broadcast_type_C, int N, int K, int transA, int output_transpose, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
const int M = transA ? A.w : (A.dims == 3 ? A.c : A.h) * A.elempack;
... | pushq %rbp
pushq %rbx
subq $0x908, %rsp # imm = 0x908
movq 0x958(%rsp), %rax
movl 0x950(%rsp), %eax
movl 0x948(%rsp), %eax
movl 0x940(%rsp), %eax
movl 0x938(%rsp), %eax
movl 0x930(%rsp), %eax
movl 0x928(%rsp), %eax
movl 0x920(%rsp), %eax
movq %rdi, 0x458(%rsp)
movq %rsi, 0x450(%rsp)
movq %rdx, 0x448(%rsp)
mo... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_fma.cpp |
ncnn::transpose_pack_B_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void transpose_pack_B_tile_int8(const Mat& B, Mat& BT, int j, int max_jj, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
transpose_pack_B_tile_int8_avx512vnni(B, BT, j, max_jj, k, max_kk);
return;
... | subq $0x1b8, %rsp # imm = 0x1B8
movq %rdi, 0xb0(%rsp)
movq %rsi, 0xa8(%rsp)
movl %edx, 0xa4(%rsp)
movl %ecx, 0xa0(%rsp)
movl %r8d, 0x9c(%rsp)
movl %r9d, 0x98(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x18d0977
movq 0xb0(%rsp), %rdi
movq 0xa8(%rsp), %rsi
movl 0xa4(%rsp), %edx
movl 0xa0(%rsp), %ecx
movl 0x9c(%rsp... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::gemm_AT_BT_x86_int8(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, float, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, float, float, int, int, int, int, ncnn::Option const&) | static int gemm_AT_BT_x86_int8(const Mat& AT, const Mat& A_int8_scales, const Mat& BT, float B_int8_scale, const Mat& C, Mat& top_blob, int broadcast_type_C, int M, int N, int K, int output_transpose, float alpha, float beta, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
... | pushq %rbx
subq $0x850, %rsp # imm = 0x850
movq 0x8a0(%rsp), %rax
movl 0x898(%rsp), %eax
movl 0x890(%rsp), %eax
movl 0x888(%rsp), %eax
movl 0x880(%rsp), %eax
movl 0x878(%rsp), %eax
movl 0x870(%rsp), %eax
movl 0x868(%rsp), %eax
movl 0x860(%rsp), %eax
movq %rdi, 0x3e8(%rsp)
movq %rsi, 0x3e0(%rsp)
movq %rdx, 0x... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_fma.cpp |
ncnn::gemm_AT_x86_int8(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, float, float, int, int, int, int, ncnn::Option const&) | static int gemm_AT_x86_int8(const Mat& AT, const Mat& A_int8_scales, const Mat& B, const Mat& C, Mat& top_blob, int broadcast_type_C, int M, int K, int transB, int output_transpose, float alpha, float beta, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
// NCNN_LOGE("gem... | pushq %rbx
subq $0xb70, %rsp # imm = 0xB70
movq 0xbc0(%rsp), %rax
movl 0xbb8(%rsp), %eax
movl 0xbb0(%rsp), %eax
movl 0xba8(%rsp), %eax
movl 0xba0(%rsp), %eax
movl 0xb98(%rsp), %eax
movl 0xb90(%rsp), %eax
movl 0xb88(%rsp), %eax
movl 0xb80(%rsp), %eax
movq %rdi, 0x548(%rsp)
movq %rsi, 0x540(%rsp)
movq %rdx, 0x... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_fma.cpp |
ncnn::Gemm_x86_avx::create_pipeline(ncnn::Option const&) | int Gemm_x86_avx::create_pipeline(const Option& opt)
{
#if NCNN_INT8
if (int8_scale_term)
{
return create_pipeline_int8(opt);
}
#endif
if (constantA)
{
const int M = constantM;
const int K = constantK;
int TILE_M, TILE_N, TILE_K;
get_optimal_tile_mnk(M, 0, K... | pushq %rbx
subq $0x730, %rsp # imm = 0x730
movq %rdi, 0x348(%rsp)
movq %rsi, 0x340(%rsp)
movq 0x348(%rsp), %rax
movq %rax, 0x138(%rsp)
cmpl $0x0, 0x10c(%rax)
je 0x193fe92
movq 0x138(%rsp), %rdi
movq 0x340(%rsp), %rsi
callq 0x19421b0
movl %eax, 0x354(%rsp)
jmp 0x194218b
movq 0x138(%rsp), %rax
cmpl $0x0, 0xe0(... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx.cpp |
ncnn::Gemm_x86_avx::create_pipeline_int8(ncnn::Option const&) | int Gemm_x86_avx::create_pipeline_int8(const Option& opt)
{
if (constantA)
{
const int M = constantM;
const int K = constantK;
int TILE_M, TILE_N, TILE_K;
get_optimal_tile_mnk_int8(M, 0, K, constant_TILE_M, constant_TILE_N, constant_TILE_K, TILE_M, TILE_N, TILE_K, opt.num_thread... | pushq %rbx
subq $0x5f0, %rsp # imm = 0x5F0
movq %rdi, 0x2b0(%rsp)
movq %rsi, 0x2a8(%rsp)
movq 0x2b0(%rsp), %rax
movq %rax, 0x100(%rsp)
cmpl $0x0, 0xe0(%rax)
je 0x1942f4f
movq 0x100(%rsp), %rax
movl 0xec(%rax), %ecx
movl %ecx, 0x2a4(%rsp)
movl 0xf4(%rax), %ecx
movl %ecx, 0x2a0(%rsp)
movl 0x2a4(%rsp), %edi
mov... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx.cpp |
ncnn::Gemm_x86_avx::forward_int8(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int Gemm_x86_avx::forward_int8(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
int M;
int N;
if (constantA && constantB)
{
M = constantM;
N = constantN;
}
else if (constantA)
{
const Mat& B = bottom_blobs[0];
M = c... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x718, %rsp # imm = 0x718
movq %rdi, 0x3e8(%rsp)
movq %rsi, 0x3e0(%rsp)
movq %rdx, 0x3d8(%rsp)
movq %rcx, 0x3d0(%rsp)
movq 0x3e8(%rsp), %rax
movq %rax, 0x1d8(%rsp)
cmpl $0x0, 0xe0(%rax)
je 0x1955952
movq 0x1d8(%rsp), %rax
cmpl $0x0, 0xe4... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx.cpp |
ncnn::get_optimal_tile_mnk_int8(int, int, int, int, int, int, int&, int&, int&, int) | static void get_optimal_tile_mnk_int8(int M, int N, int K, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int& TILE_M, int& TILE_N, int& TILE_K, int nT)
{
// resolve optimal tile size from cache size
const size_t l2_cache_size = get_cpu_level2_cache_size();
if (nT == 0)
nT = get_phy... | subq $0x98, %rsp
movl 0xb8(%rsp), %eax
movq 0xb0(%rsp), %rax
movq 0xa8(%rsp), %rax
movq 0xa0(%rsp), %rax
movl %edi, 0x94(%rsp)
movl %esi, 0x90(%rsp)
movl %edx, 0x8c(%rsp)
movl %ecx, 0x88(%rsp)
movl %r8d, 0x84(%rsp)
movl %r9d, 0x80(%rsp)
callq 0x7e540
cltq
movq %rax, 0x78(%rsp)
cmpl $0x0, 0xb8(%rsp)
jne 0x1963304
callq ... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::transpose_pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void transpose_pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
transpose_pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
... | subq $0xa8, %rsp
movq %rdi, 0x68(%rsp)
movq %rsi, 0x60(%rsp)
movl %edx, 0x5c(%rsp)
movl %ecx, 0x58(%rsp)
movl %r8d, 0x54(%rsp)
movl %r9d, 0x50(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x19637c3
movq 0x68(%rsp), %rdi
movq 0x60(%rsp), %rsi
movl 0x5c(%rsp), %edx
movl 0x58(%rsp), %ecx
movl 0x54(%rsp), %r8d
movl 0x50(%rsp), %... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
}
#endif
#if NCN... | subq $0xf8, %rsp
movq %rdi, 0x78(%rsp)
movq %rsi, 0x70(%rsp)
movl %edx, 0x6c(%rsp)
movl %ecx, 0x68(%rsp)
movl %r8d, 0x64(%rsp)
movl %r9d, 0x60(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x1963ca3
movq 0x78(%rsp), %rdi
movq 0x70(%rsp), %rsi
movl 0x6c(%rsp), %edx
movl 0x68(%rsp), %ecx
movl 0x64(%rsp), %r8d
movl 0x60(%rsp), %... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_B_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_B_tile_int8(const Mat& B, Mat& BT, int j, int max_jj, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_B_tile_int8_avx512vnni(B, BT, j, max_jj, k, max_kk);
return;
}
#endif
#if NCN... | subq $0x1c8, %rsp # imm = 0x1C8
movq %rdi, 0xc8(%rsp)
movq %rsi, 0xc0(%rsp)
movl %edx, 0xbc(%rsp)
movl %ecx, 0xb8(%rsp)
movl %r8d, 0xb4(%rsp)
movl %r9d, 0xb0(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x19642f7
movq 0xc8(%rsp), %rdi
movq 0xc0(%rsp), %rsi
movl 0xbc(%rsp), %edx
movl 0xb8(%rsp), %ecx
movl 0xb4(%rsp... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::gemm_AT_x86_int8(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, float, float, int, int, int, int, ncnn::Option const&) | static int gemm_AT_x86_int8(const Mat& AT, const Mat& A_int8_scales, const Mat& B, const Mat& C, Mat& top_blob, int broadcast_type_C, int M, int K, int transB, int output_transpose, float alpha, float beta, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
// NCNN_LOGE("gem... | pushq %rbx
subq $0xb70, %rsp # imm = 0xB70
movq 0xbc0(%rsp), %rax
movl 0xbb8(%rsp), %eax
movl 0xbb0(%rsp), %eax
movl 0xba8(%rsp), %eax
movl 0xba0(%rsp), %eax
movl 0xb98(%rsp), %eax
movl 0xb90(%rsp), %eax
movl 0xb88(%rsp), %eax
movl 0xb80(%rsp), %eax
movq %rdi, 0x548(%rsp)
movq %rsi, 0x540(%rsp)
movq %rdx, 0x... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx.cpp |
ncnn::gemm_x86_int8(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, int, int, int, int, float, float, int, int, int, int, ncnn::Option const&) | static int gemm_x86_int8(const Mat& A, const Mat& B, const Mat& C, Mat& top_blob, int broadcast_type_C, int transA, int transB, int output_transpose, float alpha, float beta, int constant_TILE_M, int constant_TILE_N, int constant_TILE_K, int nT, const Option& opt)
{
// NCNN_LOGE("gemm_x86_int8");
const int M =... | pushq %rbx
subq $0xd70, %rsp # imm = 0xD70
movq 0xdb0(%rsp), %rax
movl 0xda8(%rsp), %eax
movl 0xda0(%rsp), %eax
movl 0xd98(%rsp), %eax
movl 0xd90(%rsp), %eax
movl 0xd88(%rsp), %eax
movl 0xd80(%rsp), %eax
movq %rdi, 0x6a0(%rsp)
movq %rsi, 0x698(%rsp)
movq %rdx, 0x690(%rsp)
movq %rcx, 0x688(%rsp)
movl %r8d, 0x... | /Tencent[P]ncnn/build_O0/src/layer/x86/gemm_x86_avx.cpp |
ncnn::compute_B_fp32_int8_scale(ncnn::Mat const&, float&) | static void compute_B_fp32_int8_scale(const Mat& B, float& scale)
{
// NCNN_LOGE("compute_B_fp32_int8_scale");
float absmax = 0.f;
#if __SSE2__
#if __AVX__
#if __AVX512F__
__m512 _absmax_avx512 = _mm512_setzero_ps();
#endif // __AVX512F__
__m256 _absmax_avx = _mm256_setzero_ps();
#endif // __AVX__
... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x500, %rsp # imm = 0x500
movq %rdi, 0xe0(%rsp)
movq %rsi, 0xd8(%rsp)
movl $0x0, 0xd4(%rsp)
vxorps %xmm0, %xmm0, %xmm0
vmovaps %ymm0, 0x100(%rsp)
vmovaps 0x100(%rsp), %ymm0
vmovaps %ymm0, 0xa0(%rsp)
vxorps %xmm0, %xmm0, %xmm0
vmovaps %xmm0, 0x130(%rsp)
vmova... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
}
#endif
#if NCN... | pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0xb60, %rsp # imm = 0xB60
movq %rdi, 0x1e0(%rsp)
movq %rsi, 0x1d8(%rsp)
movl %edx, 0x1d4(%rsp)
movl %ecx, 0x1d0(%rsp)
movl %r8d, 0x1cc(%rsp)
movl %r9d, 0x1c8(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x1a60... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_B_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_B_tile_int8(const Mat& B, Mat& BT, int j, int max_jj, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_B_tile_int8_avx512vnni(B, BT, j, max_jj, k, max_kk);
return;
}
#endif
#if NCN... | pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x9a0, %rsp # imm = 0x9A0
movq %rdi, 0x1a0(%rsp)
movq %rsi, 0x198(%rsp)
movl %edx, 0x194(%rsp)
movl %ecx, 0x190(%rsp)
movl %r8d, 0x18c(%rsp)
movl %r9d, 0x188(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x1a64... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::transpose_pack_B_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void transpose_pack_B_tile_int8(const Mat& B, Mat& BT, int j, int max_jj, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
transpose_pack_B_tile_int8_avx512vnni(B, BT, j, max_jj, k, max_kk);
return;
... | pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x660, %rsp # imm = 0x660
movq %rdi, 0x1a8(%rsp)
movq %rsi, 0x1a0(%rsp)
movl %edx, 0x19c(%rsp)
movl %ecx, 0x198(%rsp)
movl %r8d, 0x194(%rsp)
movl %r9d, 0x190(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x1a66... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::pack_A_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void pack_A_tile_int8(const Mat& A, Mat& AT, int i, int max_ii, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
pack_A_tile_int8_avx512vnni(A, AT, i, max_ii, k, max_kk);
return;
}
#endif
#if NCN... | pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x7a0, %rsp # imm = 0x7A0
movq %rdi, 0x120(%rsp)
movq %rsi, 0x118(%rsp)
movl %edx, 0x114(%rsp)
movl %ecx, 0x110(%rsp)
movl %r8d, 0x10c(%rsp)
movl %r9d, 0x108(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x1af2... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::transpose_pack_B_tile_int8(ncnn::Mat const&, ncnn::Mat&, int, int, int, int) | static void transpose_pack_B_tile_int8(const Mat& B, Mat& BT, int j, int max_jj, int k, int max_kk)
{
#if NCNN_RUNTIME_CPU && NCNN_AVX512VNNI && __AVX512F__ && !__AVX512VNNI__
if (ncnn::cpu_support_x86_avx512_vnni())
{
transpose_pack_B_tile_int8_avx512vnni(B, BT, j, max_jj, k, max_kk);
return;
... | subq $0x1c8, %rsp # imm = 0x1C8
movq %rdi, 0xb0(%rsp)
movq %rsi, 0xa8(%rsp)
movl %edx, 0xa4(%rsp)
movl %ecx, 0xa0(%rsp)
movl %r8d, 0x9c(%rsp)
movl %r9d, 0x98(%rsp)
callq 0x7e2a0
cmpl $0x0, %eax
je 0x1af5ec7
movq 0xb0(%rsp), %rdi
movq 0xa8(%rsp), %rsi
movl 0xa4(%rsp), %edx
movl 0xa0(%rsp), %ecx
movl 0x9c(%rsp... | /Tencent[P]ncnn/src/layer/x86/gemm_int8.h |
ncnn::GroupNorm::GroupNorm() | GroupNorm::GroupNorm()
{
one_blob_only = true;
support_inplace = true;
} | subq $0x68, %rsp
movq %rdi, 0x30(%rsp)
movq 0x30(%rsp), %rdi
movq %rdi, 0x10(%rsp)
callq 0x88680
movq 0x10(%rsp), %rax
leaq 0x3e5ebc(%rip), %rcx # 0x1f24d90
addq $0x10, %rcx
movq %rcx, (%rax)
addq $0xe0, %rax
movq %rax, 0x38(%rsp)
movq 0x38(%rsp), %rax
movq %rax, 0x18(%rsp)
movq $0x0, (%rax)
movq $0x0, 0x8(%rax)
mov... | /Tencent[P]ncnn/src/layer/groupnorm.cpp |
ncnn::GroupNorm::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int GroupNorm::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
const int dims = bottom_top_blob.dims;
const int channels_per_group = channels / group;
if (dims == 1)
{
#pragma omp parallel for num_threads(opt.num_threads)
for (int g = 0; g < group; g++)
{
... | subq $0xe58, %rsp # imm = 0xE58
movq %rdi, 0x620(%rsp)
movq %rsi, 0x618(%rsp)
movq %rdx, 0x610(%rsp)
movq 0x620(%rsp), %rcx
movq %rcx, 0x190(%rsp)
movq 0x618(%rsp), %rax
movl 0x28(%rax), %eax
movl %eax, 0x60c(%rsp)
movl 0xd4(%rcx), %eax
cltd
idivl 0xd0(%rcx)
movl %eax, 0x608(%rsp)
cmpl $0x1, 0x60c(%rsp)
jne ... | /Tencent[P]ncnn/src/layer/groupnorm.cpp |
ncnn::LayerNorm_x86::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int LayerNorm_x86::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
const int dims = bottom_top_blob.dims;
const int elempack = bottom_top_blob.elempack;
const int w = bottom_top_blob.w;
const int h = bottom_top_blob.h;
const int channels = bottom_top_blob.c;
if (dims == 1)
... | subq $0x348, %rsp # imm = 0x348
movq %rdi, 0x150(%rsp)
movq %rsi, 0x148(%rsp)
movq %rdx, 0x140(%rsp)
movq 0x150(%rsp), %rax
movq %rax, 0x50(%rsp)
movq 0x148(%rsp), %rax
movl 0x28(%rax), %eax
movl %eax, 0x13c(%rsp)
movq 0x148(%rsp), %rax
movl 0x18(%rax), %eax
movl %eax, 0x138(%rsp)
movq 0x148(%rsp), %rax
movl... | /Tencent[P]ncnn/src/layer/x86/layernorm_x86.cpp |
ncnn::layernorm(float*, float const*, float const*, float, int, int) | static void layernorm(float* ptr, const float* gamma_ptr, const float* beta_ptr, float eps, int elemcount, int elempack)
{
const int size = elemcount * elempack;
#if __SSE2__
#if __AVX__
#if __AVX512F__
__m512 _mean_avx512 = _mm512_set1_ps(0.f);
#endif // __AVX512F__
__m256 _mean_avx = _mm256_set1_ps(0.f);... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x18a0, %rsp # imm = 0x18A0
movq %rdi, 0x4b8(%rsp)
movq %rsi, 0x4b0(%rsp)
movq %rdx, 0x4a8(%rsp)
vmovss %xmm0, 0x4a4(%rsp)
movl %ecx, 0x4a0(%rsp)
movl %r8d, 0x49c(%rsp)
movl 0x4a0(%rsp), %eax
movl 0x49c(%rsp), %ecx
imull %ecx, %eax
movl %eax, 0x498(%rsp)
movl... | /Tencent[P]ncnn/build_O0/src/layer/x86/layernorm_x86_avx.cpp |
ncnn::GRU::load_model(ncnn::ModelBin const&) | int GRU::load_model(const ModelBin& mb)
{
int num_directions = direction == 2 ? 2 : 1;
int size = weight_data_size / num_directions / num_output / 3;
// raw weight data
weight_xc_data = mb.load(size, num_output * 3, num_directions, 0);
if (weight_xc_data.empty())
return -100;
bias_c_d... | subq $0x4f8, %rsp # imm = 0x4F8
movq %rdi, 0x260(%rsp)
movq %rsi, 0x258(%rsp)
movq 0x260(%rsp), %rcx
movq %rcx, 0xc8(%rsp)
movl 0xd8(%rcx), %esi
movl $0x1, %eax
movl $0x2, %edx
cmpl $0x2, %esi
cmovel %edx, %eax
movl %eax, 0x254(%rsp)
movl 0xd4(%rcx), %eax
cltd
idivl 0x254(%rsp)
cltd
idivl 0xd0(%rcx)
movl $0x... | /Tencent[P]ncnn/src/layer/gru.cpp |
ncnn::gru(ncnn::Mat const&, ncnn::Mat&, int, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static int gru(const Mat& bottom_blob, Mat& top_blob, int reverse, const Mat& weight_xc, const Mat& bias_c, const Mat& weight_hc, Mat& hidden_state, const Option& opt)
{
int size = bottom_blob.w;
int T = bottom_blob.h;
int num_output = top_blob.w;
// 2 x num_output
Mat gates(2, num_output, 4u, opt... | subq $0x338, %rsp # imm = 0x338
movq 0x348(%rsp), %rax
movq 0x340(%rsp), %rax
movq %rdi, 0x198(%rsp)
movq %rsi, 0x190(%rsp)
movl %edx, 0x18c(%rsp)
movq %rcx, 0x180(%rsp)
movq %r8, 0x178(%rsp)
movq %r9, 0x170(%rsp)
movq 0x198(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x16c(%rsp)
movq 0x198(%rsp), %rax
movl... | /Tencent[P]ncnn/src/layer/gru.cpp |
ncnn::MultiHeadAttention::forward_int8(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int MultiHeadAttention::forward_int8(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
const Mat& q_blob = bottom_blobs[0];
const Mat& k_blob = (bottom_blobs.size() == 1 || (bottom_blobs.size() == 2 && attn_mask)) ? q_blob : bottom_blobs[1];
const Mat& v_blob = (b... | subq $0x2698, %rsp # imm = 0x2698
movq %rdi, 0x11e0(%rsp)
movq %rsi, 0x11d8(%rsp)
movq %rdx, 0x11d0(%rsp)
movq %rcx, 0x11c8(%rsp)
movq 0x11e0(%rsp), %rax
movq %rax, 0x650(%rsp)
movq 0x11d8(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x89920
movq %rax, 0x11c0(%rsp)
movq 0x11d8(%rsp), %rdi
callq 0x704d0
c... | /Tencent[P]ncnn/src/layer/multiheadattention.cpp |
ncnn::MultiHeadAttention_x86::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int MultiHeadAttention_x86::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& _opt) const
{
const Mat& q_blob = bottom_blobs[0];
const Mat& k_blob = (bottom_blobs.size() == 1 || (bottom_blobs.size() == 2 && attn_mask)) ? q_blob : bottom_blobs[1];
const Mat& v_blob = (b... | subq $0x1158, %rsp # imm = 0x1158
movq %rdi, 0x8f0(%rsp)
movq %rsi, 0x8e8(%rsp)
movq %rdx, 0x8e0(%rsp)
movq %rcx, 0x8d8(%rsp)
movq 0x8f0(%rsp), %rax
movq %rax, 0x2e0(%rsp)
movq 0x8e8(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x89920
movq %rax, 0x8d0(%rsp)
movq 0x8e8(%rsp), %rdi
callq 0x704d0
cmpq $0x1... | /Tencent[P]ncnn/src/layer/x86/multiheadattention_x86.cpp |
ncnn::MultiHeadAttention_x86_avx512::create_pipeline(ncnn::Option const&) | int MultiHeadAttention_x86_avx512::create_pipeline(const Option& _opt)
{
Option opt = _opt;
if (int8_scale_term)
{
support_packing = false;
opt.use_packing_layout = false; // TODO enable packing
}
{
qk_softmax = ncnn::create_layer_cpu(ncnn::LayerType::Softmax);
ncnn... | subq $0xe28, %rsp # imm = 0xE28
movq %rdi, 0x8b0(%rsp)
movq %rsi, 0x8a8(%rsp)
movq 0x8b0(%rsp), %rax
movq %rax, 0x318(%rsp)
movq 0x8a8(%rsp), %rsi
leaq 0x868(%rsp), %rdi
movl $0x40, %edx
callq 0x24580
movq 0x318(%rsp), %rax
cmpl $0x0, 0xec(%rax)
je 0x1ba3816
movq 0x318(%rsp), %rax
movb $0x0, 0xb(%rax)
movb $... | /Tencent[P]ncnn/build_O0/src/layer/x86/multiheadattention_x86_avx512.cpp |
ncnn::MultiHeadAttention_x86_fma::create_pipeline(ncnn::Option const&) | int MultiHeadAttention_x86_fma::create_pipeline(const Option& _opt)
{
Option opt = _opt;
if (int8_scale_term)
{
support_packing = false;
opt.use_packing_layout = false; // TODO enable packing
}
{
qk_softmax = ncnn::create_layer_cpu(ncnn::LayerType::Softmax);
ncnn::P... | subq $0xe28, %rsp # imm = 0xE28
movq %rdi, 0x8b0(%rsp)
movq %rsi, 0x8a8(%rsp)
movq 0x8b0(%rsp), %rax
movq %rax, 0x318(%rsp)
movq 0x8a8(%rsp), %rsi
leaq 0x868(%rsp), %rdi
movl $0x40, %edx
callq 0x24580
movq 0x318(%rsp), %rax
cmpl $0x0, 0xec(%rax)
je 0x1bad2e6
movq 0x318(%rsp), %rax
movb $0x0, 0xb(%rax)
movb $... | /Tencent[P]ncnn/build_O0/src/layer/x86/multiheadattention_x86_fma.cpp |
ncnn::MultiHeadAttention_x86_fma::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int MultiHeadAttention_x86_fma::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& _opt) const
{
const Mat& q_blob = bottom_blobs[0];
const Mat& k_blob = (bottom_blobs.size() == 1 || (bottom_blobs.size() == 2 && attn_mask)) ? q_blob : bottom_blobs[1];
const Mat& v_blob ... | subq $0x1158, %rsp # imm = 0x1158
movq %rdi, 0x8f0(%rsp)
movq %rsi, 0x8e8(%rsp)
movq %rdx, 0x8e0(%rsp)
movq %rcx, 0x8d8(%rsp)
movq 0x8f0(%rsp), %rax
movq %rax, 0x2e0(%rsp)
movq 0x8e8(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x89920
movq %rax, 0x8d0(%rsp)
movq 0x8e8(%rsp), %rdi
callq 0x704d0
cmpq $0x1... | /Tencent[P]ncnn/build_O0/src/layer/x86/multiheadattention_x86_fma.cpp |
ncnn::MultiHeadAttention_x86_avx::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int MultiHeadAttention_x86_avx::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& _opt) const
{
const Mat& q_blob = bottom_blobs[0];
const Mat& k_blob = (bottom_blobs.size() == 1 || (bottom_blobs.size() == 2 && attn_mask)) ? q_blob : bottom_blobs[1];
const Mat& v_blob ... | subq $0x1158, %rsp # imm = 0x1158
movq %rdi, 0x8f0(%rsp)
movq %rsi, 0x8e8(%rsp)
movq %rdx, 0x8e0(%rsp)
movq %rcx, 0x8d8(%rsp)
movq 0x8f0(%rsp), %rax
movq %rax, 0x2e0(%rsp)
movq 0x8e8(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x89920
movq %rax, 0x8d0(%rsp)
movq 0x8e8(%rsp), %rdi
callq 0x704d0
cmpq $0x1... | /Tencent[P]ncnn/build_O0/src/layer/x86/multiheadattention_x86_avx.cpp |
ncnn::GELU_x86_fma::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int GELU_x86_fma::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
if (!fast_gelu)
{
return GELU::forward_inplace(bottom_top_blob, opt);
}
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int elempack = bottom_top_blob.elempack;
in... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0xe60, %rsp # imm = 0xE60
movq %rdi, 0x240(%rsp)
movq %rsi, 0x238(%rsp)
movq %rdx, 0x230(%rsp)
movq 0x240(%rsp), %rax
movq %rax, 0x48(%rsp)
cmpl $0x0, 0xd0(%rax)
jne 0x1bc4893
movq 0x48(%rsp), %rdi
movq 0x238(%rsp), %rsi
movq 0x230(%rsp), %rdx
callq 0x1bc087... | /Tencent[P]ncnn/build_O0/src/layer/x86/gelu_x86_fma.cpp |
ncnn::GELU_x86_avx::forward_inplace(ncnn::Mat&, ncnn::Option const&) const | int GELU_x86_avx::forward_inplace(Mat& bottom_top_blob, const Option& opt) const
{
if (!fast_gelu)
{
return GELU::forward_inplace(bottom_top_blob, opt);
}
int w = bottom_top_blob.w;
int h = bottom_top_blob.h;
int d = bottom_top_blob.d;
int elempack = bottom_top_blob.elempack;
in... | pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0xfc0, %rsp # imm = 0xFC0
movq %rdi, 0x240(%rsp)
movq %rsi, 0x238(%rsp)
movq %rdx, 0x230(%rsp)
movq 0x240(%rsp), %rax
movq %rax, 0x48(%rsp)
cmpl $0x0, 0xd0(%rax)
jne 0x1bc65b3
movq 0x48(%rsp), %rdi
movq 0x238(%rsp), %rsi
movq 0x230(%rsp), %rdx
callq 0x1bc087... | /Tencent[P]ncnn/build_O0/src/layer/x86/gelu_x86_avx.cpp |
ncnn::Convolution1D::load_model(ncnn::ModelBin const&) | int Convolution1D::load_model(const ModelBin& mb)
{
if (dynamic_weight)
return 0;
weight_data = mb.load(weight_data_size, 0);
if (weight_data.empty())
return -100;
if (bias_term)
{
bias_data = mb.load(num_output, 1);
if (bias_data.empty())
return -100;
... | subq $0x238, %rsp # imm = 0x238
movq %rdi, 0x118(%rsp)
movq %rsi, 0x110(%rsp)
movq 0x118(%rsp), %rax
movq %rax, 0x68(%rsp)
cmpl $0x0, 0x140(%rax)
je 0x1bc8d8d
movl $0x0, 0x124(%rsp)
jmp 0x1bc9794
movq 0x68(%rsp), %rax
movq 0x110(%rsp), %rsi
movl 0xf0(%rax), %edx
movq (%rsi), %rax
leaq 0xc8(%rsp), %rdi
xorl %... | /Tencent[P]ncnn/src/layer/convolution1d.cpp |
ncnn::Convolution1D_x86::forward(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | int Convolution1D_x86::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
{
int w = bottom_blob.w;
size_t elemsize = bottom_blob.elemsize;
int elempack = bottom_blob.elempack;
const int kernel_extent_w = dilation_w * (kernel_w - 1) + 1;
Mat bottom_blob_bordered;
make_paddi... | pushq %rbx
subq $0x190, %rsp # imm = 0x190
movq %rdi, 0x118(%rsp)
movq %rsi, 0x110(%rsp)
movq %rdx, 0x108(%rsp)
movq %rcx, 0x100(%rsp)
movq 0x118(%rsp), %rdi
movq %rdi, 0x68(%rsp)
movq 0x110(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0xfc(%rsp)
movq 0x110(%rsp), %rax
movq 0x10(%rax), %rax
movq %rax, 0xf0(%... | /Tencent[P]ncnn/src/layer/x86/convolution1d_x86.cpp |
ncnn::Convolution1D_x86_fma::forward(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | int Convolution1D_x86_fma::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
{
int w = bottom_blob.w;
size_t elemsize = bottom_blob.elemsize;
int elempack = bottom_blob.elempack;
const int kernel_extent_w = dilation_w * (kernel_w - 1) + 1;
Mat bottom_blob_bordered;
make_p... | pushq %rbx
subq $0x190, %rsp # imm = 0x190
movq %rdi, 0x118(%rsp)
movq %rsi, 0x110(%rsp)
movq %rdx, 0x108(%rsp)
movq %rcx, 0x100(%rsp)
movq 0x118(%rsp), %rdi
movq %rdi, 0x68(%rsp)
movq 0x110(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0xfc(%rsp)
movq 0x110(%rsp), %rax
movq 0x10(%rax), %rax
movq %rax, 0xf0(%... | /Tencent[P]ncnn/build_O0/src/layer/x86/convolution1d_x86_fma.cpp |
ncnn::ConvolutionDepthWise1D::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int ConvolutionDepthWise1D::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
const Mat& bottom_blob = bottom_blobs[0];
const Mat& _weight_data = bottom_blobs[1];
Mat& top_blob = top_blobs[0];
const int _kernel_w = _weight_data.w;
const int _num_o... | subq $0x358, %rsp # imm = 0x358
movq %rdi, 0x230(%rsp)
movq %rsi, 0x228(%rsp)
movq %rdx, 0x220(%rsp)
movq %rcx, 0x218(%rsp)
movq 0x230(%rsp), %rax
movq %rax, 0xd0(%rsp)
movq 0x228(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
movq %rsi, 0xd8(%rsp)
callq 0x89920
movq %rax, 0x210(%rsp)
movq 0x228(%rsp), %rdi
mov... | /Tencent[P]ncnn/src/layer/convolutiondepthwise1d.cpp |
ncnn::Pooling3D::load_param(ncnn::ParamDict const&) | int Pooling3D::load_param(const ParamDict& pd)
{
pooling_type = pd.get(0, 0);
kernel_w = pd.get(1, 0);
kernel_h = pd.get(11, kernel_w);
kernel_d = pd.get(21, kernel_w);
stride_w = pd.get(2, 1);
stride_h = pd.get(12, stride_w);
stride_d = pd.get(22, stride_w);
pad_left = pd.get(3, 0);
... | subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movq 0x10(%rsp), %rax
movq %rax, (%rsp)
movq 0x8(%rsp), %rdi
xorl %edx, %edx
movl %edx, %esi
callq 0x78d90
movl %eax, %ecx
movq (%rsp), %rax
movl %ecx, 0xd0(%rax)
movq 0x8(%rsp), %rdi
movl $0x1, %esi
xorl %edx, %edx
callq 0x78d90
movl %eax, %ecx
movq (%rsp), %... | /Tencent[P]ncnn/src/layer/pooling3d.cpp |
ncnn::Pooling3D::forward(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | int Pooling3D::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
{
// max value in NxN window
// avg value in NxN window
int w = bottom_blob.w;
int h = bottom_blob.h;
int d = bottom_blob.d;
int channels = bottom_blob.c;
size_t elemsize = bottom_blob.elemsize;
// ... | subq $0x15e8, %rsp # imm = 0x15E8
movq %rdi, 0x9e8(%rsp)
movq %rsi, 0x9e0(%rsp)
movq %rdx, 0x9d8(%rsp)
movq %rcx, 0x9d0(%rsp)
movq 0x9e8(%rsp), %rax
movq %rax, 0x2f0(%rsp)
movq 0x9e0(%rsp), %rcx
movl 0x2c(%rcx), %ecx
movl %ecx, 0x9cc(%rsp)
movq 0x9e0(%rsp), %rcx
movl 0x30(%rcx), %ecx
movl %ecx, 0x9c8(%rsp)
mo... | /Tencent[P]ncnn/src/layer/pooling3d.cpp |
ncnn::Pooling3D::make_padding(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | void Pooling3D::make_padding(const Mat& bottom_blob, Mat& bottom_blob_bordered, const Option& opt) const
{
int w = bottom_blob.w;
int h = bottom_blob.h;
int d = bottom_blob.d;
bottom_blob_bordered = bottom_blob;
float pad_value = 0.f;
if (pooling_type == PoolMethod_MAX)
{
pad_value... | pushq %rbx
subq $0x210, %rsp # imm = 0x210
movq %rdi, 0x1d0(%rsp)
movq %rsi, 0x1c8(%rsp)
movq %rdx, 0x1c0(%rsp)
movq %rcx, 0x1b8(%rsp)
movq 0x1d0(%rsp), %rax
movq %rax, 0x60(%rsp)
movq 0x1c8(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, 0x1b4(%rsp)
movq 0x1c8(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, 0x1b0... | /Tencent[P]ncnn/src/layer/pooling3d.cpp |
ncnn::matmul_transb(ncnn::Mat const&, ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) | static void matmul_transb(const Mat& A, const Mat& B, Mat& top_blob, const Option& opt)
{
const int M = A.h;
const int K = A.w; // assert A.w == B.w
const int N = B.h;
const float* pA = A;
const float* pB = B;
float* pOut = top_blob;
#pragma omp parallel for num_threads(opt.num_threads)
... | subq $0x10, %rsp
movq %rdi, -0x10(%rsp)
movq %rsi, -0x18(%rsp)
movq %rdx, -0x20(%rsp)
movq %rcx, -0x28(%rsp)
movq -0x10(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, -0x2c(%rsp)
movq -0x10(%rsp), %rax
movl 0x2c(%rax), %eax
movl %eax, -0x30(%rsp)
movq -0x18(%rsp), %rax
movl 0x30(%rax), %eax
movl %eax, -0x34(%rsp)
movq -0... | /Tencent[P]ncnn/src/layer/matmul.cpp |
ncnn::MatMul_x86::create_pipeline(ncnn::Option const&) | int MatMul_x86::create_pipeline(const Option& opt)
{
gemm = ncnn::create_layer_cpu(ncnn::LayerType::Gemm);
ncnn::ParamDict pd;
pd.set(2, 0); // transA
pd.set(3, transB); // transB
pd.set(4, 0); // constantA
pd.set(5, 0); // constantB
pd.set(6, 1); // constantC
pd.set... | subq $0x58, %rsp
movq %rdi, 0x50(%rsp)
movq %rsi, 0x48(%rsp)
movq 0x50(%rsp), %rax
movq %rax, 0x8(%rsp)
movl $0x4a, %edi
callq 0x89670
movq %rax, %rcx
movq 0x8(%rsp), %rax
movq %rcx, 0xd8(%rax)
leaq 0x38(%rsp), %rdi
movq %rdi, 0x10(%rsp)
callq 0x78060
movq 0x10(%rsp), %rdi
movl $0x2, %esi
xorl %edx, %edx
callq 0x79040
... | /Tencent[P]ncnn/src/layer/x86/matmul_x86.cpp |
ncnn::MatMul_x86_avx512::destroy_pipeline(ncnn::Option const&) | int MatMul_x86_avx512::destroy_pipeline(const Option& opt)
{
if (gemm)
{
gemm->destroy_pipeline(opt);
delete gemm;
gemm = 0;
}
return 0;
} | subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq %rsi, 0x18(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
cmpq $0x0, 0xd8(%rax)
je 0x1c6e5eb
movq 0x10(%rsp), %rax
movq 0xd8(%rax), %rdi
movq 0x18(%rsp), %rsi
movq (%rdi), %rax
callq *0x28(%rax)
movq 0x10(%rsp), %rax
movq 0xd8(%rax), %rax
movq %rax, 0x8(%rsp)
cmpq $0x0, %r... | /Tencent[P]ncnn/build_O0/src/layer/x86/matmul_x86_avx512.cpp |
ncnn::MatMul_x86_avx512::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int MatMul_x86_avx512::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
const Mat& A = bottom_blobs[0];
const Mat& B = bottom_blobs[1];
Mat& top_blob = top_blobs[0];
const int Adims = A.dims;
const int Bdims = B.dims;
const int max_ABdims = s... | subq $0x26d8, %rsp # imm = 0x26D8
movq %rdi, 0x11e8(%rsp)
movq %rsi, 0x11e0(%rsp)
movq %rdx, 0x11d8(%rsp)
movq %rcx, 0x11d0(%rsp)
movq 0x11e8(%rsp), %rax
movq %rax, 0x630(%rsp)
movq 0x11e0(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x89920
movq %rax, 0x11c8(%rsp)
movq 0x11e0(%rsp), %rdi
movl $0x1, %esi... | /Tencent[P]ncnn/build_O0/src/layer/x86/matmul_x86_avx512.cpp |
ncnn::MatMul_x86_fma::destroy_pipeline(ncnn::Option const&) | int MatMul_x86_fma::destroy_pipeline(const Option& opt)
{
if (gemm)
{
gemm->destroy_pipeline(opt);
delete gemm;
gemm = 0;
}
return 0;
} | subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq %rsi, 0x18(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
cmpq $0x0, 0xd8(%rax)
je 0x1c7af4b
movq 0x10(%rsp), %rax
movq 0xd8(%rax), %rdi
movq 0x18(%rsp), %rsi
movq (%rdi), %rax
callq *0x28(%rax)
movq 0x10(%rsp), %rax
movq 0xd8(%rax), %rax
movq %rax, 0x8(%rsp)
cmpq $0x0, %r... | /Tencent[P]ncnn/build_O0/src/layer/x86/matmul_x86_fma.cpp |
ncnn::MatMul_x86_avx::create_pipeline(ncnn::Option const&) | int MatMul_x86_avx::create_pipeline(const Option& opt)
{
gemm = ncnn::create_layer_cpu(ncnn::LayerType::Gemm);
ncnn::ParamDict pd;
pd.set(2, 0); // transA
pd.set(3, transB); // transB
pd.set(4, 0); // constantA
pd.set(5, 0); // constantB
pd.set(6, 1); // constantC
pd... | subq $0x58, %rsp
movq %rdi, 0x50(%rsp)
movq %rsi, 0x48(%rsp)
movq 0x50(%rsp), %rax
movq %rax, 0x8(%rsp)
movl $0x4a, %edi
callq 0x89670
movq %rax, %rcx
movq 0x8(%rsp), %rax
movq %rcx, 0xd8(%rax)
leaq 0x38(%rsp), %rdi
movq %rdi, 0x10(%rsp)
callq 0x78060
movq 0x10(%rsp), %rdi
movl $0x2, %esi
xorl %edx, %edx
callq 0x79040
... | /Tencent[P]ncnn/build_O0/src/layer/x86/matmul_x86_avx.cpp |
ncnn::Deconvolution1D::Deconvolution1D() | Deconvolution1D::Deconvolution1D()
{
one_blob_only = true;
support_inplace = false;
} | subq $0x98, %rsp
movq %rdi, 0x38(%rsp)
movq 0x38(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x88680
movq 0x18(%rsp), %rax
leaq 0x291f51(%rip), %rcx # 0x1f25ee8
addq $0x10, %rcx
movq %rcx, (%rax)
addq $0x100, %rax # imm = 0x100
movq %rax, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x20(%rsp)
movq $0x0, (%rax... | /Tencent[P]ncnn/src/layer/deconvolution1d.cpp |
ncnn::Deconvolution1D::load_param(ncnn::ParamDict const&) | int Deconvolution1D::load_param(const ParamDict& pd)
{
num_output = pd.get(0, 0);
kernel_w = pd.get(1, 0);
dilation_w = pd.get(2, 1);
stride_w = pd.get(3, 1);
pad_left = pd.get(4, 0);
pad_right = pd.get(15, pad_left);
output_pad_right = pd.get(18, 0);
output_w = pd.get(20, 0);
bias_t... | subq $0x1b8, %rsp # imm = 0x1B8
movq %rdi, 0xf0(%rsp)
movq %rsi, 0xe8(%rsp)
movq 0xf0(%rsp), %rax
movq %rax, 0x38(%rsp)
movq 0xe8(%rsp), %rdi
xorl %edx, %edx
movl %edx, 0x34(%rsp)
movl %edx, %esi
callq 0x78d90
movl 0x34(%rsp), %edx
movl %eax, %ecx
movq 0x38(%rsp), %rax
movl %ecx, 0xd0(%rax)
movq 0xe8(%rsp), ... | /Tencent[P]ncnn/src/layer/deconvolution1d.cpp |
ncnn::Deconvolution1D::load_model(ncnn::ModelBin const&) | int Deconvolution1D::load_model(const ModelBin& mb)
{
if (dynamic_weight)
return 0;
weight_data = mb.load(weight_data_size, 0);
if (weight_data.empty())
return -100;
if (bias_term)
{
bias_data = mb.load(num_output, 1);
if (bias_data.empty())
return -100;... | subq $0x238, %rsp # imm = 0x238
movq %rdi, 0x118(%rsp)
movq %rsi, 0x110(%rsp)
movq 0x118(%rsp), %rax
movq %rax, 0x68(%rsp)
cmpl $0x0, 0x148(%rax)
je 0x1c94a3d
movl $0x0, 0x124(%rsp)
jmp 0x1c95444
movq 0x68(%rsp), %rax
movq 0x110(%rsp), %rsi
movl 0xf4(%rax), %edx
movq (%rsi), %rax
leaq 0xc8(%rsp), %rdi
xorl %... | /Tencent[P]ncnn/src/layer/deconvolution1d.cpp |
ncnn::DeconvolutionDepthWise1D::DeconvolutionDepthWise1D() | DeconvolutionDepthWise1D::DeconvolutionDepthWise1D()
{
one_blob_only = true;
support_inplace = false;
} | subq $0x98, %rsp
movq %rdi, 0x38(%rsp)
movq 0x38(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x88680
movq 0x18(%rsp), %rax
leaq 0x28dbd9(%rip), %rcx # 0x1f25f60
addq $0x10, %rcx
movq %rcx, (%rax)
addq $0x100, %rax # imm = 0x100
movq %rax, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x20(%rsp)
movq $0x0, (%rax... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise1d.cpp |
ncnn::DeconvolutionDepthWise1D::load_model(ncnn::ModelBin const&) | int DeconvolutionDepthWise1D::load_model(const ModelBin& mb)
{
if (dynamic_weight)
return 0;
weight_data = mb.load(weight_data_size, 0);
if (weight_data.empty())
return -100;
if (bias_term)
{
bias_data = mb.load(num_output, 1);
if (bias_data.empty())
ret... | subq $0x238, %rsp # imm = 0x238
movq %rdi, 0x118(%rsp)
movq %rsi, 0x110(%rsp)
movq 0x118(%rsp), %rax
movq %rax, 0x68(%rsp)
cmpl $0x0, 0x148(%rax)
je 0x1c98e4d
movl $0x0, 0x124(%rsp)
jmp 0x1c99854
movq 0x68(%rsp), %rax
movq 0x110(%rsp), %rsi
movl 0xf4(%rax), %edx
movq (%rsi), %rax
leaq 0xc8(%rsp), %rdi
xorl %... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise1d.cpp |
ncnn::DeconvolutionDepthWise1D::forward(ncnn::Mat const&, ncnn::Mat&, ncnn::Option const&) const | int DeconvolutionDepthWise1D::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
{
int w = bottom_blob.w;
size_t elemsize = bottom_blob.elemsize;
const int kernel_extent_w = dilation_w * (kernel_w - 1) + 1;
int outw = (w - 1) * stride_w + kernel_extent_w + output_pad_right;
M... | pushq %r14
pushq %rbx
subq $0x1c8, %rsp # imm = 0x1C8
movq %rdi, 0x118(%rsp)
movq %rsi, 0x110(%rsp)
movq %rdx, 0x108(%rsp)
movq %rcx, 0x100(%rsp)
movq 0x118(%rsp), %rax
movq %rax, 0x78(%rsp)
movq 0x110(%rsp), %rcx
movl 0x2c(%rcx), %ecx
movl %ecx, 0xfc(%rsp)
movq 0x110(%rsp), %rcx
movq 0x10(%rcx), %rcx
movq %... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise1d.cpp |
ncnn::deconvolutiondepthwise1d(ncnn::Mat const&, ncnn::Mat&, ncnn::Mat const&, ncnn::Mat const&, int, int, int, int, int, ncnn::Mat const&, ncnn::Option const&) | static int deconvolutiondepthwise1d(const Mat& bottom_blob, Mat& top_blob, const Mat& weight_data, const Mat& bias_data, int kernel_w, int stride_w, int dilation_w, int group, int activation_type, const Mat& activation_params, const Option& opt)
{
const int w = bottom_blob.w;
const int h = bottom_blob.h;
c... | subq $0x518, %rsp # imm = 0x518
movq 0x540(%rsp), %rax
movq 0x538(%rsp), %rax
movl 0x530(%rsp), %eax
movl 0x528(%rsp), %eax
movl 0x520(%rsp), %eax
movq %rdi, 0x220(%rsp)
movq %rsi, 0x218(%rsp)
movq %rdx, 0x210(%rsp)
movq %rcx, 0x208(%rsp)
movl %r8d, 0x204(%rsp)
movl %r9d, 0x200(%rsp)
movq 0x220(%rsp), %rax
m... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise1d.cpp |
ncnn::deconvolution3d(ncnn::Mat const&, ncnn::Mat&, ncnn::Mat const&, ncnn::Mat const&, int, int, int, int, int, int, int, int, int, int, ncnn::Mat const&, ncnn::Option const&) | static int deconvolution3d(const Mat& bottom_blob, Mat& top_blob, const Mat& weight_data, const Mat& bias_data, int kernel_w, int kernel_h, int kernel_d, int stride_w, int stride_h, int stride_d, int dilation_w, int dilation_h, int dilation_d, int activation_type, const Mat& activation_params, const Option& opt)
{
... | subq $0x688, %rsp # imm = 0x688
movq 0x6d8(%rsp), %rax
movq 0x6d0(%rsp), %rax
movl 0x6c8(%rsp), %eax
movl 0x6c0(%rsp), %eax
movl 0x6b8(%rsp), %eax
movl 0x6b0(%rsp), %eax
movl 0x6a8(%rsp), %eax
movl 0x6a0(%rsp), %eax
movl 0x698(%rsp), %eax
movl 0x690(%rsp), %eax
movq %rdi, 0x2f0(%rsp)
movq %rsi, 0x2e8(%rsp)
m... | /Tencent[P]ncnn/src/layer/deconvolution3d.cpp |
ncnn::DeconvolutionDepthWise3D::DeconvolutionDepthWise3D() | DeconvolutionDepthWise3D::DeconvolutionDepthWise3D()
{
one_blob_only = true;
support_inplace = false;
} | subq $0x98, %rsp
movq %rdi, 0x38(%rsp)
movq 0x38(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x88680
movq 0x18(%rsp), %rax
leaq 0x284a89(%rip), %rcx # 0x1f26050
addq $0x10, %rcx
movq %rcx, (%rax)
addq $0x138, %rax # imm = 0x138
movq %rax, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x20(%rsp)
movq $0x0, (%rax... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise3d.cpp |
ncnn::DeconvolutionDepthWise3D::load_param(ncnn::ParamDict const&) | int DeconvolutionDepthWise3D::load_param(const ParamDict& pd)
{
num_output = pd.get(0, 0);
kernel_w = pd.get(1, 0);
kernel_h = pd.get(11, kernel_w);
kernel_d = pd.get(21, kernel_w);
dilation_w = pd.get(2, 1);
dilation_h = pd.get(12, dilation_w);
dilation_d = pd.get(22, dilation_w);
strid... | subq $0x1b8, %rsp # imm = 0x1B8
movq %rdi, 0xf0(%rsp)
movq %rsi, 0xe8(%rsp)
movq 0xf0(%rsp), %rax
movq %rax, 0x38(%rsp)
movq 0xe8(%rsp), %rdi
xorl %edx, %edx
movl %edx, 0x34(%rsp)
movl %edx, %esi
callq 0x78d90
movl 0x34(%rsp), %edx
movl %eax, %ecx
movq 0x38(%rsp), %rax
movl %ecx, 0xd0(%rax)
movq 0xe8(%rsp), ... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise3d.cpp |
ncnn::deconvolutiondepthwise3d(ncnn::Mat const&, ncnn::Mat&, ncnn::Mat const&, ncnn::Mat const&, int, int, int, int, int, int, int, int, int, int, int, ncnn::Mat const&, ncnn::Option const&) | static int deconvolutiondepthwise3d(const Mat& bottom_blob, Mat& top_blob, const Mat& weight_data, const Mat& bias_data, int kernel_w, int kernel_h, int kernel_d, int stride_w, int stride_h, int stride_d, int dilation_w, int dilation_h, int dilation_d, int group, int activation_type, const Mat& activation_params, const... | subq $0xb98, %rsp # imm = 0xB98
movq 0xbf0(%rsp), %rax
movq 0xbe8(%rsp), %rax
movl 0xbe0(%rsp), %eax
movl 0xbd8(%rsp), %eax
movl 0xbd0(%rsp), %eax
movl 0xbc8(%rsp), %eax
movl 0xbc0(%rsp), %eax
movl 0xbb8(%rsp), %eax
movl 0xbb0(%rsp), %eax
movl 0xba8(%rsp), %eax
movl 0xba0(%rsp), %eax
movq %rdi, 0x500(%rsp)
m... | /Tencent[P]ncnn/src/layer/deconvolutiondepthwise3d.cpp |
ncnn::Einsum::forward(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>>&, ncnn::Option const&) const | int Einsum::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
{
// assert bottom_blobs.size() == lhs_tokens.size()
// assert top_blobs.size() == 1
size_t elemsize = bottom_blobs[0].elemsize;
if (lhs_tokens.empty() && rhs_token == "ii")
{
//... | subq $0x6d8, %rsp # imm = 0x6D8
movq %rdi, 0x410(%rsp)
movq %rsi, 0x408(%rsp)
movq %rdx, 0x400(%rsp)
movq %rcx, 0x3f8(%rsp)
movq 0x410(%rsp), %rax
movq %rax, 0x210(%rsp)
movq 0x408(%rsp), %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x89920
movq 0x210(%rsp), %rdi
movq 0x10(%rax), %rax
movq %rax, 0x3f0(%rsp)
ad... | /Tencent[P]ncnn/src/layer/einsum.cpp |
ncnn::sum_dim(std::vector<int, std::allocator<int>> const&, int, std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, std::vector<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::allocator<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>> const&, s... | static float sum_dim(const std::vector<int>& dim_sizes, int d, const std::vector<Mat>& bottom_blobs, const std::vector<std::string>& tokens, std::vector<int>& indexes)
{
if (d == (int)dim_sizes.size())
{
float v = 1.f;
for (size_t b = 0; b < bottom_blobs.size(); b++)
{
v *= g... | subq $0x68, %rsp
movq %rdi, 0x58(%rsp)
movl %esi, 0x54(%rsp)
movq %rdx, 0x48(%rsp)
movq %rcx, 0x40(%rsp)
movq %r8, 0x38(%rsp)
movl 0x54(%rsp), %eax
movl %eax, 0x1c(%rsp)
movq 0x58(%rsp), %rdi
callq 0x2fb30
movq %rax, %rcx
movl 0x1c(%rsp), %eax
cmpl %ecx, %eax
jne 0x1ca9807
movss 0x1ee8af(%rip), %xmm0 # 0x1e98024
movs... | /Tencent[P]ncnn/src/layer/einsum.cpp |
ncnn::DeformableConv2D::DeformableConv2D() | DeformableConv2D::DeformableConv2D()
{
one_blob_only = false;
support_inplace = false;
} | subq $0x98, %rsp
movq %rdi, 0x38(%rsp)
movq 0x38(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x88680
movq 0x18(%rsp), %rax
leaq 0x27aad9(%rip), %rcx # 0x1f26140
addq $0x10, %rcx
movq %rcx, (%rax)
addq $0x108, %rax # imm = 0x108
movq %rax, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x20(%rsp)
movq $0x0, (%rax... | /Tencent[P]ncnn/src/layer/deformableconv2d.cpp |
ncnn::DeformableConv2D::load_param(ncnn::ParamDict const&) | int DeformableConv2D::load_param(const ParamDict& pd)
{
num_output = pd.get(0, 0);
kernel_w = pd.get(1, 0);
kernel_h = pd.get(11, kernel_w);
dilation_w = pd.get(2, 1);
dilation_h = pd.get(12, dilation_w);
stride_w = pd.get(3, 1);
stride_h = pd.get(13, stride_w);
pad_left = pd.get(4, 0);
... | subq $0x1b8, %rsp # imm = 0x1B8
movq %rdi, 0xf0(%rsp)
movq %rsi, 0xe8(%rsp)
movq 0xf0(%rsp), %rax
movq %rax, 0x38(%rsp)
movq 0xe8(%rsp), %rdi
xorl %edx, %edx
movl %edx, 0x34(%rsp)
movl %edx, %esi
callq 0x78d90
movl 0x34(%rsp), %edx
movl %eax, %ecx
movq 0x38(%rsp), %rax
movl %ecx, 0xd0(%rax)
movq 0xe8(%rsp), ... | /Tencent[P]ncnn/src/layer/deformableconv2d.cpp |
ncnn::deformableconv2d_pack1to4_sse(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, ncnn::Mat&, ncnn::Mat const&, ncnn::Mat const&, int, int, int, int, int, int, int, int, int, ncnn::Mat const&, ncnn::Option const&) | static void deformableconv2d_pack1to4_sse(const std::vector<Mat>& bottom_blobs, Mat& top_blob, const Mat& weight_data_packed, const Mat& bias_data, int kernel_w, int kernel_h, int dilation_w, int dilation_h, int stride_w, int stride_h, int pad_left, int pad_top, int activation_type, const Mat& activation_params, const ... | pushq %r14
pushq %rbx
subq $0x2c98, %rsp # imm = 0x2C98
movq 0x2cf0(%rsp), %rax
movq 0x2ce8(%rsp), %rax
movl 0x2ce0(%rsp), %eax
movl 0x2cd8(%rsp), %eax
movl 0x2cd0(%rsp), %eax
movl 0x2cc8(%rsp), %eax
movl 0x2cc0(%rsp), %eax
movl 0x2cb8(%rsp), %eax
movl 0x2cb0(%rsp), %eax
movq %rdi, 0x6c0(%rsp)
movq %rsi, 0x6b... | /Tencent[P]ncnn/src/layer/x86/deformableconv2d_pack1to4.h |
ncnn::deformableconv2d_transform_kernel_packed_sse(ncnn::Mat const&, ncnn::Mat&, int, int, int, int, int, int) | static void deformableconv2d_transform_kernel_packed_sse(const Mat& weight_data, Mat& weight_data_tm, int num_input, int num_output, int kernel_w, int kernel_h, int elempack, int out_elempack)
{
const int maxk = kernel_w * kernel_h;
// src = kw-kh-inch-outch
// dst = pb-pa-inch/pa-kw-kh-outch/pb
{
... | pushq %rbp
pushq %rbx
subq $0x198, %rsp # imm = 0x198
movl 0x1b8(%rsp), %eax
movl 0x1b0(%rsp), %eax
movq %rdi, 0x108(%rsp)
movq %rsi, 0x100(%rsp)
movl %edx, 0xfc(%rsp)
movl %ecx, 0xf8(%rsp)
movl %r8d, 0xf4(%rsp)
movl %r9d, 0xf0(%rsp)
movl 0xf4(%rsp), %eax
imull 0xf0(%rsp), %eax
movl %eax, 0xec(%rsp)
movq 0x1... | /Tencent[P]ncnn/build_O0/src/layer/x86/deformableconv2d_x86_avx512.cpp |
ncnn::deformableconv2d_pack1to16_avx512(std::vector<ncnn::Mat, std::allocator<ncnn::Mat>> const&, ncnn::Mat&, ncnn::Mat const&, ncnn::Mat const&, int, int, int, int, int, int, int, int, int, ncnn::Mat const&, ncnn::Option const&) | static void deformableconv2d_pack1to16_avx512(const std::vector<Mat>& bottom_blobs, Mat& top_blob, const Mat& weight_data_packed, const Mat& bias_data, int kernel_w, int kernel_h, int dilation_w, int dilation_h, int stride_w, int stride_h, int pad_left, int pad_top, int activation_type, const Mat& activation_params, co... | pushq %rbp
movq %rsp, %rbp
andq $-0x40, %rsp
subq $0x7000, %rsp # imm = 0x7000
movq 0x50(%rbp), %rax
movq 0x48(%rbp), %rax
movl 0x40(%rbp), %eax
movl 0x38(%rbp), %eax
movl 0x30(%rbp), %eax
movl 0x28(%rbp), %eax
movl 0x20(%rbp), %eax
movl 0x18(%rbp), %eax
movl 0x10(%rbp), %eax
movq %rdi, 0xa60(%rsp)
movq %rsi,... | /Tencent[P]ncnn/src/layer/x86/deformableconv2d_pack1to16.h |
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