name string | code string | asm string | file string |
|---|---|---|---|
diy::RegularLink<diy::Bounds<int>>::RegularLink() | RegularLink():
dim_(0), core_(0), bounds_(0) {} | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x215aa(%rip), %al # 0x41480
leaq 0x207f3(%rip), %rax # 0x406d0
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
... | /diatomic[P]diy/include/diy/link.hpp |
diy::RegularLink<diy::Bounds<int>>::load(diy::BinaryBuffer&) | void load(BinaryBuffer& bb) override
{
Link::load(bb);
diy::load(bb, dim_);
diy::load(bb, dir_map_);
diy::load(bb, dir_vec_);
diy::load(bb, core_);
diy::load(bb, bounds_);
diy::load(bb, nbr_cores_);
diy::load(bb, nbr_bounds_);
... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e39a
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x20(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2084a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1f690
leaq ... | /diatomic[P]diy/include/diy/link.hpp |
diy::Serialization<std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>>>::save(diy::BinaryBuffer&, std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>> const&) | static void save(BinaryBuffer& bb, const Vector& v)
{
size_t s = v.size();
diy::save(bb, s);
if (s > 0)
diy::save(bb, &v[0], v.size());
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x8(%rsi), %rax
subq (%rsi), %rax
sarq $0x7, %rax
leaq 0x8(%rsp), %r15
movq %rax, (%r15)
movq (%rdi), %rax
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x10(%rax)
cmpq $0x0, (%r15)
je 0x20814
movq (%r14), %rsi
movq 0x8(%r14), %rdx
sub... | /diatomic[P]diy/include/diy/serialization.hpp |
diy::Serialization<std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>>>::load(diy::BinaryBuffer&, std::vector<diy::Bounds<int>, std::allocator<diy::Bounds<int>>>&) | static void load(BinaryBuffer& bb, Vector& v)
{
size_t s;
diy::load(bb, s);
v.resize(s, U());
if (s > 0)
diy::load(bb, &v[0], s);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq (%rdi), %rax
movq %rsp, %r15
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x20(%rax)
movq (%r15), %r15
leaq 0x8(%rsp), %r12
movq %r12, %rdi
callq 0x20da2
movq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
callq 0x20d6c
leaq 0x... | /diatomic[P]diy/include/diy/serialization.hpp |
diy::RegularLink<diy::Bounds<float>>::RegularLink() | RegularLink():
dim_(0), core_(0), bounds_(0) {} | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x202dc(%rip), %al # 0x41490
leaq 0x1f5c5(%rip), %rax # 0x40780
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
... | /diatomic[P]diy/include/diy/link.hpp |
diy::RegularLink<diy::Bounds<float>>::save(diy::BinaryBuffer&) const | void save(BinaryBuffer& bb) const override
{
Link::save(bb);
diy::save(bb, dim_);
diy::save(bb, dir_map_);
diy::save(bb, dir_vec_);
diy::save(bb, core_);
diy::save(bb, bounds_);
diy::save(bb, nbr_cores_);
diy::save(bb, nbr_bounds... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e348
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x10(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2074a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1ed18
leaq ... | /diatomic[P]diy/include/diy/link.hpp |
itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>::~small_vector() | ~small_vector()
{
clear();
if (m_dynamic_data)
{
atraits::deallocate(get_alloc(), m_dynamic_data, m_dynamic_capacity);
}
} | movq %rdi, %rax
movq 0x8(%rdi), %rcx
movq 0x38(%rdi), %rdi
movq %rcx, 0x10(%rax)
testq %rdi, %rdi
je 0x214ff
movq 0x30(%rax), %rsi
shlq $0x2, %rsi
jmp 0x6450
retq
| /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>::choose_data(unsigned long) | T* choose_data(size_t desired_capacity)
{
if (m_begin == m_dynamic_data)
{
// we're at the dyn buffer, so see if it needs resize or revert to static
if (desired_capacity > m_dynamic_capacity)
{
while (m_dynamic_capacity < desired_capacity)
... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq 0x38(%rdi), %rax
cmpq %rax, 0x8(%rdi)
je 0x215d8
cmpq $0x5, %r14
jb 0x21604
movq 0x30(%rbx), %rsi
cmpq %r14, %rsi
jae 0x2160b
testq %rax, %rax
je 0x215cc
shlq $0x2, %rsi
movq %rax, %rdi
callq 0x6450
movq %r14, 0x30(%rbx)
movq %rbx, %rdi
movq %r14, %r... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
diy::Serialization<diy::DynamicPoint<float, 4ul>>::save(diy::BinaryBuffer&, diy::DynamicPoint<float, 4ul> const&) | static void save(BinaryBuffer& bb, const Point& p)
{
size_t s = p.size();
diy::save(bb, s);
if (s > 0)
diy::save(bb, &p[0], p.size());
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x10(%rsi), %rax
subq 0x8(%rsi), %rax
sarq $0x2, %rax
leaq 0x8(%rsp), %r15
movq %rax, (%r15)
movq (%rdi), %rax
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x10(%rax)
cmpq $0x0, (%r15)
je 0x21a67
movq 0x8(%r14), %rsi
movq 0x10(%r14), ... | /diatomic[P]diy/include/diy/dynamic-point.hpp |
diy::Serialization<diy::DynamicPoint<float, 4ul>>::load(diy::BinaryBuffer&, diy::DynamicPoint<float, 4ul>&) | static void load(BinaryBuffer& bb, Point& p)
{
size_t s;
diy::load(bb, s);
p.resize(s);
if (s > 0)
diy::load(bb, &p[0], s);
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq (%rdi), %rax
leaq 0x8(%rsp), %r15
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x20(%rax)
movq (%r15), %rsi
movq %r14, %rdi
callq 0x21b66
movq (%r15), %rdx
testq %rdx, %rdx
je 0x21b5c
movq 0x8(%r14), %rsi
shlq $0x2, %rdx
movq (%rbx), ... | /diatomic[P]diy/include/diy/dynamic-point.hpp |
itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>::small_vector(itlib::small_vector<float, 4ul, 0ul, std::allocator<float>>&&) | small_vector(small_vector&& v) noexcept
: m_alloc(std::move(v.get_alloc()))
, m_capacity(v.m_capacity)
, m_dynamic_capacity(v.m_dynamic_capacity)
, m_dynamic_data(v.m_dynamic_data)
{
if (v.m_begin == v.static_begin_ptr())
{
m_begin = m_end = static_begin_p... | movq 0x18(%rsi), %rax
movq %rax, 0x18(%rdi)
leaq 0x30(%rsi), %rax
movq 0x30(%rsi), %rcx
movq %rcx, 0x30(%rdi)
movq 0x38(%rsi), %rcx
movq %rcx, 0x38(%rdi)
movq 0x8(%rsi), %rdx
leaq 0x20(%rsi), %rcx
cmpq %rcx, %rdx
je 0x2202c
movq %rdx, 0x8(%rdi)
movq 0x10(%rsi), %rdx
movq %rdx, 0x10(%rdi)
xorps %xmm0, %xmm0
movups %xmm0... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
diy::RegularLink<diy::Bounds<double>>::RegularLink() | RegularLink():
dim_(0), core_(0), bounds_(0) {} | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x1f240(%rip), %al # 0x414a0
leaq 0x1e5c9(%rip), %rax # 0x40830
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
... | /diatomic[P]diy/include/diy/link.hpp |
diy::RegularLink<diy::Bounds<double>>::load(diy::BinaryBuffer&) | void load(BinaryBuffer& bb) override
{
Link::load(bb);
diy::load(bb, dim_);
diy::load(bb, dir_map_);
diy::load(bb, dir_vec_);
diy::load(bb, core_);
diy::load(bb, bounds_);
diy::load(bb, nbr_cores_);
diy::load(bb, nbr_bounds_);
... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e39a
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x20(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2084a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1f690
leaq ... | /diatomic[P]diy/include/diy/link.hpp |
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::assign_impl(unsigned long, double const&) | void assign_impl(size_type count, const T& value)
{
assert(m_begin);
assert(m_begin == m_end);
m_begin = m_end = choose_data(count);
for (size_type i = 0; i < count; ++i)
{
atraits::construct(get_alloc(), m_end, value);
++m_end;
}
upd... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
callq 0x2264a
movq %rax, 0x10(%rbx)
movq %rax, 0x8(%rbx)
leaq 0x8(%rax), %rcx
subq $0x1, %r15
jb 0x2262d
movsd (%r14), %xmm0
movsd %xmm0, -0x8(%rcx)
movq %rcx, 0x10(%rbx)
addq $0x8, %rcx
jmp 0x22613
leaq 0x20(%rbx), %rcx
cmpq %rcx, %rax
je... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::small_vector(itlib::small_vector<double, 4ul, 0ul, std::allocator<double>> const&, std::allocator<double> const&) | small_vector(const small_vector& v, const Alloc& alloc)
: m_alloc(alloc)
, m_dynamic_capacity(0)
, m_dynamic_data(nullptr)
{
if (v.size() > StaticCapacity)
{
m_dynamic_capacity = v.size();
m_begin = m_end = m_dynamic_data = atraits::allocate(get_alloc(... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
xorps %xmm0, %xmm0
movups %xmm0, 0x40(%rdi)
movq 0x10(%rsi), %rsi
subq 0x8(%rbx), %rsi
sarq $0x3, %rsi
cmpq $0x5, %rsi
jb 0x229ae
movq %rsi, 0x40(%r14)
movq %r14, %rdi
callq 0x226c6
movq %rax, 0x48(%r14)
movq %rax, 0x10(%r14)
movq %rax, 0x8(%r14)
movq 0x8... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::resize(unsigned long) | void resize(size_type n)
{
auto new_buf = choose_data(n);
if (new_buf == m_begin)
{
// no special transfers needed
auto new_end = m_begin + n;
while (m_end > new_end)
{
atraits::destroy(get_alloc(), --m_end);
}
... | pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %r14
movq %rdi, %rbx
callq 0x2264a
movq 0x8(%rbx), %rdi
cmpq %rdi, %rax
je 0x22cbd
movq %rax, %r15
movq 0x10(%rbx), %rax
subq %rdi, %rax
sarq $0x3, %rax
cmpq %r14, %rax
cmovaeq %r14, %rax
xorl %ecx, %ecx
cmpq %rcx, %rax
je 0x22c97
movsd (%rdi,%rcx,8), %xmm0
movsd %xmm0, (%r15... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>::small_vector(itlib::small_vector<double, 4ul, 0ul, std::allocator<double>>&&) | small_vector(small_vector&& v) noexcept
: m_alloc(std::move(v.get_alloc()))
, m_capacity(v.m_capacity)
, m_dynamic_capacity(v.m_dynamic_capacity)
, m_dynamic_data(v.m_dynamic_data)
{
if (v.m_begin == v.static_begin_ptr())
{
m_begin = m_end = static_begin_p... | movq 0x18(%rsi), %rax
movq %rax, 0x18(%rdi)
leaq 0x40(%rsi), %rax
movq 0x40(%rsi), %rcx
movq %rcx, 0x40(%rdi)
movq 0x48(%rsi), %rcx
movq %rcx, 0x48(%rdi)
movq 0x8(%rsi), %rdx
leaq 0x20(%rsi), %rcx
cmpq %rcx, %rdx
je 0x23150
movq %rdx, 0x8(%rdi)
movq 0x10(%rsi), %rdx
movq %rdx, 0x10(%rdi)
xorps %xmm0, %xmm0
movups %xmm0... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
diy::RegularLink<diy::Bounds<long>>::RegularLink() | RegularLink():
dim_(0), core_(0), bounds_(0) {} | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
andq $0x0, 0x18(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rdi)
movb 0x1e108(%rip), %al # 0x414b0
leaq 0x1d531(%rip), %rax # 0x408e0
movq %rax, (%rdi)
andl $0x0, 0x20(%rdi)
leaq 0x30(%rdi), %rax
andl $0x0, 0x30(%rdi)
andq $0x0, 0x38(%rdi)
movq %rax, 0x40(%rdi)
... | /diatomic[P]diy/include/diy/link.hpp |
diy::RegularLink<diy::Bounds<long>>::load(diy::BinaryBuffer&) | void load(BinaryBuffer& bb) override
{
Link::load(bb);
diy::load(bb, dim_);
diy::load(bb, dir_map_);
diy::load(bb, dir_vec_);
diy::load(bb, core_);
diy::load(bb, bounds_);
diy::load(bb, nbr_cores_);
diy::load(bb, nbr_bounds_);
... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rdi), %rsi
movq %rbx, %rdi
callq 0x1e39a
leaq 0x20(%r14), %rsi
movq (%rbx), %rax
pushq $0x4
popq %rdx
movq %rbx, %rdi
callq *0x20(%rax)
leaq 0x28(%r14), %rsi
movq %rbx, %rdi
callq 0x2084a
leaq 0x58(%r14), %rsi
movq %rbx, %rdi
callq 0x1f690
leaq ... | /diatomic[P]diy/include/diy/link.hpp |
itlib::small_vector<long, 4ul, 0ul, std::allocator<long>>::assign_impl(unsigned long, long const&) | void assign_impl(size_type count, const T& value)
{
assert(m_begin);
assert(m_begin == m_end);
m_begin = m_end = choose_data(count);
for (size_type i = 0; i < count; ++i)
{
atraits::construct(get_alloc(), m_end, value);
++m_end;
}
upd... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
callq 0x237a2
movq %rax, 0x10(%rbx)
movq %rax, 0x8(%rbx)
leaq 0x8(%rax), %rcx
subq $0x1, %r15
jb 0x23786
movq (%r14), %rdx
movq %rdx, -0x8(%rcx)
movq %rcx, 0x10(%rbx)
addq $0x8, %rcx
jmp 0x2376f
leaq 0x20(%rbx), %rcx
cmpq %rcx, %rax
je 0x2... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
itlib::small_vector<long, 4ul, 0ul, std::allocator<long>>::small_vector(itlib::small_vector<long, 4ul, 0ul, std::allocator<long>> const&, std::allocator<long> const&) | small_vector(const small_vector& v, const Alloc& alloc)
: m_alloc(alloc)
, m_dynamic_capacity(0)
, m_dynamic_data(nullptr)
{
if (v.size() > StaticCapacity)
{
m_dynamic_capacity = v.size();
m_begin = m_end = m_dynamic_data = atraits::allocate(get_alloc(... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
xorps %xmm0, %xmm0
movups %xmm0, 0x40(%rdi)
movq 0x10(%rsi), %rsi
subq 0x8(%rbx), %rsi
sarq $0x3, %rsi
cmpq $0x5, %rsi
jb 0x23b06
movq %rsi, 0x40(%r14)
movq %r14, %rdi
callq 0x2381e
movq %rax, 0x48(%r14)
movq %rax, 0x10(%r14)
movq %rax, 0x8(%r14)
movq 0x8... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
diy::Serialization<std::vector<diy::Bounds<long>, std::allocator<diy::Bounds<long>>>>::save(diy::BinaryBuffer&, std::vector<diy::Bounds<long>, std::allocator<diy::Bounds<long>>> const&) | static void save(BinaryBuffer& bb, const Vector& v)
{
size_t s = v.size();
diy::save(bb, s);
if (s > 0)
diy::save(bb, &v[0], v.size());
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq 0x8(%rsi), %rax
subq (%rsi), %rax
movl $0xa0, %r12d
cqto
idivq %r12
movq %rsp, %r15
movq %rax, (%r15)
movq (%rdi), %rax
pushq $0x8
popq %rdx
movq %r15, %rsi
callq *0x10(%rax)
cmpq $0x0, (%r15)
je 0x23cf2
movq (%r14), %rsi
movq 0... | /diatomic[P]diy/include/diy/serialization.hpp |
itlib::small_vector<long, 4ul, 0ul, std::allocator<long>>::resize(unsigned long) | void resize(size_type n)
{
auto new_buf = choose_data(n);
if (new_buf == m_begin)
{
// no special transfers needed
auto new_end = m_begin + n;
while (m_end > new_end)
{
atraits::destroy(get_alloc(), --m_end);
}
... | pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %r14
movq %rdi, %rbx
callq 0x237a2
movq 0x8(%rbx), %rdi
cmpq %rdi, %rax
je 0x23e10
movq %rax, %r15
movq 0x10(%rbx), %rax
subq %rdi, %rax
sarq $0x3, %rax
cmpq %r14, %rax
cmovaeq %r14, %rax
xorl %ecx, %ecx
cmpq %rcx, %rax
je 0x23dea
movq (%rdi,%rcx,8), %rdx
movq %rdx, (%r15,%rc... | /diatomic[P]diy/include/diy/thirdparty/itlib/small_vector.hpp |
opts::OptionContainer<int>::OptionContainer(char, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, int&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&) | OptionContainer(char s_,
const std::string& l_,
T& var_,
const std::string& help_,
const std::string& type_ = Traits<T>::type_string()):
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x80, %rsp
movq %r9, %r12
movq %r8, %r15
movq %rcx, %rbx
movl %esi, %ebp
movq %rdi, %r14
leaq 0x60(%rsp), %rdi
movq %rdx, %rsi
callq 0x65e0
leaq 0x40(%rsp), %rdi
movq %rbx, %rsi
callq 0x24d16
leaq 0x20(%rsp), %rdi
movq %r12, %rsi
callq 0x65e0
movq %rsp, %rdi
... | /diatomic[P]diy/examples/opts.h |
backward::SignalHandling::make_default_signals() | static std::vector<int> make_default_signals() {
const int posix_signals[] = {
// Signals for which the default action is "Core".
SIGABRT, // Abort signal from abort(3)
SIGBUS, // Bus error (bad memory access)
SIGFPE, // Floating point exception
SIGILL, // Illegal Instruction
... | pushq %rbx
subq $0x40, %rsp
movq %rdi, %rbx
movups 0x4641(%rip), %xmm0 # 0x29bcc
leaq 0x3c(%rsp), %rdx
movups %xmm0, -0x10(%rdx)
movaps 0x4625(%rip), %xmm0 # 0x29bc0
movaps %xmm0, -0x1c(%rdx)
movaps 0x460a(%rip), %xmm0 # 0x29bb0
movaps %xmm0, -0x2c(%rdx)
leaq 0x10(%rsp), %rsi
leaq 0xf(%rsp), %rcx
callq 0x25... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::SignalHandling::sig_handler(int, siginfo_t*, void*) | static void
sig_handler(int signo, siginfo_t *info, void *_ctx) {
handleSignal(signo, info, _ctx);
// try to forward the signal.
raise(info->si_signo);
// terminate the process immediately.
puts("watf? exit");
_exit(EXIT_FAILURE);
} | pushq %rbx
movq %rsi, %rbx
callq 0x257d4
movl (%rbx), %edi
callq 0x6440
leaq 0x4428(%rip), %rdi # 0x29bdf
callq 0x66d0
pushq $0x1
popq %rdi
callq 0x6740
| /diatomic[P]diy/tests/backward/backward.hpp |
backward::Printer::Printer() | Printer()
: snippet(true), color_mode(ColorMode::automatic), address(false),
object(false), inliner_context_size(5), trace_context_size(7) {} | pushq %rbx
movq %rdi, %rbx
movb $0x1, (%rdi)
andl $0x0, 0x4(%rdi)
andw $0x0, 0x8(%rdi)
movabsq $0x700000005, %rax # imm = 0x700000005
movq %rax, 0xc(%rdi)
addq $0x18, %rdi
callq 0x25cfe
leaq 0xb8(%rbx), %rax
movq %rax, 0x88(%rbx)
movq $0x1, 0x90(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, 0x98(%rbx)
movl $0x3f800000, 0... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::StackTraceImplBase::load_thread_info() | void load_thread_info() {
#ifdef BACKWARD_SYSTEM_LINUX
#ifndef __ANDROID__
_thread_id = static_cast<size_t>(syscall(SYS_gettid));
#else
_thread_id = static_cast<size_t>(gettid());
#endif
if (_thread_id == static_cast<size_t>(getpid())) {
// If the thread is the main one, let's hide that.
// I li... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl $0xba, %edi
xorl %eax, %eax
callq 0x6080
movq %rax, %r14
movq %rax, (%rbx)
callq 0x6680
cltq
cmpq %rax, %r14
jne 0x25c45
andq $0x0, (%rbx)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
| /diatomic[P]diy/tests/backward/backward.hpp |
backward::details::Unwinder<backward::StackTraceImpl<backward::system_tag::linux_tag>::callback>::backtrace(_Unwind_Context*) | _Unwind_Reason_Code backtrace(_Unwind_Context *ctx) {
if (_index >= 0 && static_cast<size_t>(_index) >= _depth)
return _URC_END_OF_STACK;
int ip_before_instruction = 0;
uintptr_t ip = _Unwind_GetIPInfo(ctx, &ip_before_instruction);
if (!ip_before_instruction) {
// calculating 0-1 for unsig... | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq 0x8(%rdi), %rax
testq %rax, %rax
js 0x25cbc
cmpq 0x10(%rbx), %rax
jb 0x25cbc
pushq $0x5
popq %rax
jmp 0x25cf8
leaq 0xc(%rsp), %rax
andl $0x0, (%rax)
movq %rsi, %rdi
movq %rax, %rsi
callq 0x6050
movq 0x8(%rbx), %rcx
testq %rcx, %rcx
js 0x25cef
cmpl $0x1, 0xc(%rsp)
sbbq $0... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::TraceResolverLinuxBase::TraceResolverLinuxBase() | TraceResolverLinuxBase()
: argv0_(get_argv0()), exec_path_(read_symlink("/proc/self/exe")) {} | pushq %r15
pushq %r14
pushq %rbx
subq $0x30, %rsp
movq %rdi, %rbx
andq $0x0, 0x8(%rdi)
movb $0x1, 0x10(%rdi)
andq $0x0, 0x18(%rdi)
leaq 0x1ada9(%rip), %rax # 0x40c40
movq %rax, (%rdi)
leaq 0x20(%rdi), %r14
movq %r14, %rdi
callq 0x25f20
leaq 0x3d3d(%rip), %rsi # 0x29bea
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rd... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::details::demangler_impl<backward::system_tag::linux_tag>::demangle[abi:cxx11](char const*) | std::string demangle(const char *funcname) {
using namespace details;
char *result = abi::__cxa_demangle(funcname, _demangle_buffer.get(),
&_demangle_buffer_length, nullptr);
if (result) {
_demangle_buffer.update(result);
return result;
}
return fun... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
movq (%rsi), %rsi
leaq 0x10(%r15), %rdx
movq %r14, %rdi
xorl %ecx, %ecx
callq 0x63b0
testq %rax, %rax
je 0x2622f
movq %rax, (%r15)
movb $0x0, 0x8(%r15)
leaq 0xf(%rsp), %rdx
movq %rbx, %rdi
movq %rax, %rsi
jmp 0x2623a
leaq ... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::Printer::print_trace(std::ostream&, backward::ResolvedTrace const&, backward::Colorize&) | void print_trace(std::ostream &os, const ResolvedTrace &trace,
Colorize &colorize) {
os << "#" << std::left << std::setw(2) << trace.idx << std::right;
bool already_indented = true;
if (!trace.source.filename.size() || object) {
os << " Object \"" << trace.object_filename << "\",... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rcx, 0x10(%rsp)
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %r15
leaq 0x3749(%rip), %rsi # 0x29c3c
movq %r14, %rdi
callq 0x6420
movq (%rax), %rcx
movq -0x18(%rcx), %rdx
movl $0xffffff4f, %ebx # imm = 0xFFFFFF4F
movl 0x18(... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::Printer::print_source_loc(std::ostream&, char const*, backward::ResolvedTrace::SourceLoc const&, void*) | void print_source_loc(std::ostream &os, const char *indent,
const ResolvedTrace::SourceLoc &source_loc,
void *addr = nullptr) {
os << indent << "Source \"" << source_loc.filename << "\", line "
<< source_loc.line << ", in " << source_loc.function;
if (addr... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %r14
movq %rcx, %r12
movq %rsi, %rbx
movq %rdi, %r15
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x6420
leaq 0x34cb(%rip), %rsi # 0x29c65
movq %rax, %rdi
callq 0x6420
leaq 0x20(%r12), %rsi
movq %rax, %rdi
callq 0x63d0
leaq 0x34b8(%rip), %rsi # 0x29c6e... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::Colorize::set_color(backward::Color::type) | void set_color(Color::type ccode) {
if (!_enabled)
return;
// I assume that the terminal can handle basic colors. Seriously I
// don't want to deal with all the termcap shit.
_os << "\033[" << static_cast<int>(ccode) << "m";
_reset = (ccode != Color::reset);
} | cmpb $0x1, 0x9(%rdi)
jne 0x269d3
pushq %rbp
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movq (%rdi), %rdi
leaq 0x32f1(%rip), %rsi # 0x29c99
callq 0x6420
movq %rax, %rdi
movl %ebp, %esi
callq 0x67b0
leaq 0x32de(%rip), %rsi # 0x29c9c
movq %rax, %rdi
callq 0x6420
cmpl $0x27, %ebp
setne 0x8(%rbx)
addq $... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::SourceFile::SourceFile(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&) | SourceFile(const std::string &path) {
// 1. If BACKWARD_CXX_SOURCE_PREFIXES is set then assume it contains
// a colon-separated list of path prefixes. Try prepending each
// to the given path until a valid file is found.
const std::vector<std::string> &prefixes = get_paths_from_env_variable();
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, (%rsp)
movq %rdi, %rbx
andq $0x0, (%rdi)
movb $0x1, 0x8(%rdi)
callq 0x27074
movq %rax, %r15
pushq $-0x1
popq %r14
xorl %r13d, %r13d
leaq 0x28(%rsp), %r12
movq (%r15), %rsi
movq 0x8(%r15), %rax
subq %rsi, %rax
sarq $0x5, %rax
i... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::SourceFile::get_lines(unsigned int, unsigned int, std::vector<std::pair<unsigned int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>, std::allocator<std::pair<unsigned int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>>>&) | lines_t &get_lines(unsigned line_start, unsigned line_count, lines_t &lines) {
using namespace std;
// This function make uses of the dumbest algo ever:
// 1) seek(0)
// 2) read lines one by one and discard until line_start
// 3) read line one by one until line_start + line_count
//
// If yo... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rcx, 0x8(%rsp)
movl %edx, %ebp
movl %esi, %r15d
movq %rdi, %r14
movq (%rdi), %rdi
movq (%rdi), %rax
addq -0x18(%rax), %rdi
xorl %ebx, %ebx
xorl %esi, %esi
callq 0x6780
movq (%r14), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x6560
... | /diatomic[P]diy/tests/backward/backward.hpp |
backward::SourceFile::not_isempty::operator()(std::pair<unsigned int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>> const&) | bool operator()(const lines_t::value_type &p) {
return !(std::find_if(p.second.begin(), p.second.end(), not_isspace()) ==
p.second.end());
} | pushq %rbx
movq %rsi, %rbx
movq 0x8(%rsi), %rdi
movq 0x10(%rsi), %rsi
addq %rdi, %rsi
callq 0x27cd8
movq 0x8(%rbx), %rcx
addq 0x10(%rbx), %rcx
cmpq %rcx, %rax
setne %al
popq %rbx
retq
| /diatomic[P]diy/tests/backward/backward.hpp |
usage() | void usage()
{
std::cout <<
"\n"
"Usage:\n"
" XSTSHarness <testSet>\n"
"\n"
"This program runs the tests listed in the XMLSchema Test Suite, available at\n"
"http://www.w3.org/XML/2004/xml-schema-test-suite/xmlschema2006-11-06/xsts-2007-06-2... | pushq %rax
movq 0x8a24(%rip), %rdi # 0xef68
leaq 0x3b1f(%rip), %rsi # 0xa06a
callq 0x61b0
movq %rax, %rdi
popq %rax
jmp 0x6330
nop
| /apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp |
BaseHarnessHandlers::error(xercesc_4_0::SAXParseException const&) | void BaseHarnessHandlers::error(const SAXParseException& e)
{
fSawErrors = true;
std::cout << "\nError at file " << StrX(e.getSystemId())
<< ", line " << e.getLineNumber()
<< ", char " << e.getColumnNumber()
<< "\n Message: " << StrX(e.getMessage()) << std::endl;
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movb $0x1, 0x88(%rdi)
movq 0x898a(%rip), %rdi # 0xef68
leaq 0x3c59(%rip), %rsi # 0xa23e
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x6230
leaq 0x8(%rsp), %r15
movq %r15, %rdi
movq %rax, %rsi
callq 0x721a
movq (%r15), %rsi
movq %r14, %rd... | /apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp |
BaseHarnessHandlers::fatalError(xercesc_4_0::SAXParseException const&) | void BaseHarnessHandlers::fatalError(const SAXParseException& e)
{
fSawErrors = true;
std::cout << "\nFatal Error at file " << StrX(e.getSystemId())
<< ", line " << e.getLineNumber()
<< ", char " << e.getColumnNumber()
<< "\n Message: " << StrX(e.getMessage()) << std::endl;
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movb $0x1, 0x88(%rdi)
movq 0x8870(%rip), %rdi # 0xef68
leaq 0x3b6c(%rip), %rsi # 0xa26b
callq 0x61b0
movq %rax, %r14
movq %rbx, %rdi
callq 0x6230
leaq 0x8(%rsp), %r15
movq %r15, %rdi
movq %rax, %rsi
callq 0x721a
movq (%r15), %rsi
movq %r14, %rd... | /apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp |
BaseHarnessHandlers::printFile(xercesc_4_0::XMLURL&) | void BaseHarnessHandlers::printFile(XMLURL& url)
{
if(XMLString::equals(url.getURLText(), dummy))
return;
BinInputStream* stream=url.makeNewStream();
if(stream==NULL)
{
std::cout << "File " << StrX(url.getURLText()) << " is missing" << std::endl;
return;
}
std::cout << "C... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x118, %rsp # imm = 0x118
movq %rsi, %r14
movq %rsi, %rdi
callq 0x72ac
leaq 0x36e5(%rip), %rsi # 0xa010
movq %rax, %rdi
callq 0x7252
testb %al, %al
jne 0x6a8c
movq %r14, %rdi
callq 0x61c0
movq %rax, 0x8(%rsp)
movq 0x8619(%rip), %rdi... | /apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp |
main | int main(int argC, char* argV[])
{
// Check command line and extract arguments.
if (argC < 2)
{
usage();
return 1;
}
try
{
XMLPlatformUtils::Initialize();
}
catch (const XMLException& toCatch)
{
std::cout << "Error during initialization! Message:\n"... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
cmpl $0x1, %edi
jg 0x6ba5
callq 0x653c
pushq $0x1
popq %rax
addq $0x58, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rsi, %r14
movl %edi, %ebx
movq 0x8387(%rip), %rdi # 0xef38
xorl %esi, %esi
xorl %edx... | /apache[P]xerces-c/tests/src/XSTSHarness/XSTSHarness.cpp |
testing::internal::String::FormatIntWidth2[abi:cxx11](int) | std::string String::FormatIntWidth2(int value) {
std::stringstream ss;
ss << std::setfill('0') << std::setw(2) << value;
return ss.str();
} | subq $0x1e8, %rsp # imm = 0x1E8
movq %rdi, 0x18(%rsp)
movq %rdi, %rax
movq %rax, 0x20(%rsp)
movq %rdi, 0x1e0(%rsp)
movl %esi, 0x1dc(%rsp)
leaq 0x50(%rsp), %rdi
callq 0x83b0
leaq 0x60(%rsp), %rax
movq %rax, 0x28(%rsp)
movl $0x30, %edi
callq 0x2f400
movb %al, 0x37(%rsp)
jmp 0x10307
movq 0x28(%rsp), %rdi
movb 0... | /scientific-systems[P]fmt/test/gmock-gtest-all.cc |
testing::ValidateTestPropertyName(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::vector<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::allocator<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>> const&) | bool ValidateTestPropertyName(const std::string& property_name,
const std::vector<std::string>& reserved_names) {
if (std::find(reserved_names.begin(), reserved_names.end(), property_name) !=
reserved_names.end()) {
ADD_FAILURE() << "Reserved key used in RecordProperty(): "... | subq $0xb8, %rsp
movq %rdi, 0xa8(%rsp)
movq %rsi, 0xa0(%rsp)
movq 0xa0(%rsp), %rdi
callq 0x2fba0
movq %rax, 0x90(%rsp)
movq 0xa0(%rsp), %rdi
callq 0x2fbd0
movq %rax, 0x88(%rsp)
movq 0xa8(%rsp), %rdx
movq 0x90(%rsp), %rdi
movq 0x88(%rsp), %rsi
callq 0x2fb40
movq %rax, 0x98(%rsp)
movq 0xa0(%rsp), %rdi
callq 0x2fbd0
movq ... | /scientific-systems[P]fmt/test/gmock-gtest-all.cc |
testing::TestInfo::TestInfo(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, char const*, char const*, void const*, testing::internal::TestFactoryBase*) | TestInfo::TestInfo(const std::string& a_test_case_name,
const std::string& a_name,
const char* a_type_param,
const char* a_value_param,
internal::TypeId fixture_class_id,
internal::TestFactoryBase* factory)
: test_case_na... | subq $0xc8, %rsp
movq 0xd0(%rsp), %rax
movq %rdi, 0xc0(%rsp)
movq %rsi, 0xb8(%rsp)
movq %rdx, 0xb0(%rsp)
movq %rcx, 0xa8(%rsp)
movq %r8, 0xa0(%rsp)
movq %r9, 0x98(%rsp)
movq 0xc0(%rsp), %rdi
movq %rdi, 0x58(%rsp)
movq %rdi, %rax
movq %rax, 0x50(%rsp)
movq 0xb8(%rsp), %rsi
callq 0x8230
movq 0x58(%rsp), %rdi
addq $0x20, ... | /scientific-systems[P]fmt/test/gmock-gtest-all.cc |
testing::internal::ReportInvalidTestCaseType(char const*, char const*, int) | void ReportInvalidTestCaseType(const char* test_case_name,
const char* file, int line) {
Message errors;
errors
<< "Attempted redefinition of test case " << test_case_name << ".\n"
<< "All tests in the same test case must use the same test fixture\n"
<< "class. Howe... | subq $0xe8, %rsp
movq %rdi, 0xe0(%rsp)
movq %rsi, 0xd8(%rsp)
movl %edx, 0xd4(%rsp)
leaq 0xc8(%rsp), %rdi
movq %rdi, 0x68(%rsp)
callq 0xca70
movq 0x68(%rsp), %rdi
leaq 0x3e625(%rip), %rsi # 0x50ae1
callq 0x308e0
movq %rax, 0x70(%rsp)
jmp 0x124c8
movq 0x70(%rsp), %rdi
leaq 0xe0(%rsp), %rsi
callq 0x2e180
movq %rax, 0x... | /scientific-systems[P]fmt/test/gmock-gtest-all.cc |
testing::TestPartResult::~TestPartResult() | class GTEST_API_ TestPartResult {
public:
// The possible outcomes of a test part (i.e. an assertion or an
// explicit SUCCEED(), FAIL(), or ADD_FAILURE()).
enum Type {
kSuccess, // Succeeded.
kNonFatalFailure, // Failed but the test can continue.
kFatalFailure // Failed and the test s... | subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq 0x10(%rsp), %rdi
movq %rdi, 0x8(%rsp)
addq $0x50, %rdi
callq 0x8d18
movq 0x8(%rsp), %rdi
addq $0x30, %rdi
callq 0x8d18
movq 0x8(%rsp), %rdi
addq $0x8, %rdi
callq 0x8d18
addq $0x18, %rsp
retq
nopl (%rax)
| /scientific-systems[P]fmt/test/gtest/gtest.h |
testing::internal::ScopedPrematureExitFile::ScopedPrematureExitFile(char const*) | explicit ScopedPrematureExitFile(const char* premature_exit_filepath)
: premature_exit_filepath_(premature_exit_filepath) {
// If a path to the premature-exit file is specified...
if (premature_exit_filepath != NULL && *premature_exit_filepath != '\0') {
// create the file with a single "0" characte... | subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movq 0x10(%rsp), %rax
movq 0x8(%rsp), %rcx
movq %rcx, (%rax)
cmpq $0x0, 0x8(%rsp)
je 0x32586
movq 0x8(%rsp), %rax
movsbl (%rax), %eax
cmpl $0x0, %eax
je 0x32586
movq 0x8(%rsp), %rdi
leaq 0x1f70f(%rip), %rsi # 0x51c6b
callq 0x31a60
movq %rax, (%rsp)
movq (%... | /scientific-systems[P]fmt/test/gmock-gtest-all.cc |
bool testing::internal::HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool>(testing::internal::UnitTestImpl*, bool (testing::internal::UnitTestImpl::*)(), char const*) | Result HandleExceptionsInMethodIfSupported(
T* object, Result (T::*method)(), const char* location) {
// NOTE: The user code can affect the way in which Google Test handles
// exceptions by setting GTEST_FLAG(catch_exceptions), but only before
// RUN_ALL_TESTS() starts. It is technically possible to check the... | subq $0xc8, %rsp
movq %rsi, 0xb0(%rsp)
movq %rdx, 0xb8(%rsp)
movq 0xb0(%rsp), %rax
movq 0xb8(%rsp), %rdx
movq %rdi, 0xa8(%rsp)
movq %rdx, 0xa0(%rsp)
movq %rax, 0x98(%rsp)
movq %rcx, 0x90(%rsp)
callq 0x2d8f0
movq %rax, %rdi
callq 0x45340
testb $0x1, %al
jne 0x3261d
jmp 0x327eb
movq 0xa8(%rsp), %rdi
movq 0x98(%rsp), %rax... | /scientific-systems[P]fmt/test/gmock-gtest-all.cc |
Gudhi::Persistence_representations::Persistence_landscape::multiply_lanscape_by_real_number_not_overwrite(double) const | Persistence_landscape Persistence_landscape::multiply_lanscape_by_real_number_not_overwrite(double x) const {
std::vector<std::vector<std::pair<double, double> > > result(this->land.size());
for (size_t dim = 0; dim != this->land.size(); ++dim) {
std::vector<std::pair<double, double> > lambda_dim(this->land[dim... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movsd %xmm0, 0x28(%rsp)
movq %rsi, %r14
movq 0x8(%rsi), %rsi
subq (%r14), %rsi
movq %rdi, 0x20(%rsp)
sarq $0x3, %rsi
movabsq $-0x5555555555555555, %rbp # imm = 0xAAAAAAAAAAAAAAAB
imulq %rbp, %rsi
leaq 0x30(%rsp), %rdi
leaq 0x8(%rsp), %rd... | /GUDHI[P]gudhi-devel/src/Persistence_representations/include/gudhi/Persistence_landscape.h |
archs_enable | static void archs_enable(void)
{
static bool initialized = false;
if (initialized)
return;
#ifdef CAPSTONE_HAS_ARM
ARM_enable();
#endif
#ifdef CAPSTONE_HAS_ARM64
AArch64_enable();
#endif
#ifdef CAPSTONE_HAS_MIPS
Mips_enable();
#endif
#ifdef CAPSTONE_HAS_POWERPC
PPC_enable();
#endif
#ifdef CAPSTONE_HAS_SPARC
... | cmpb $0x0, 0x254973(%rip) # 0x298f14
jne 0x445d7
pushq %rax
callq 0x458dc
callq 0x45a0c
callq 0x45adc
callq 0x45bd0
callq 0x48048
callq 0x48124
callq 0x45cac
callq 0x481f4
movb $0x1, 0x254941(%rip) # 0x298f14
addq $0x8, %rsp
retq
| /radare[P]capstone/cs.c |
cs_support | CAPSTONE_EXPORT
bool cs_support(int query)
{
archs_enable();
if (query == CS_ARCH_ALL)
return all_arch == ((1 << CS_ARCH_ARM) | (1 << CS_ARCH_ARM64) |
(1 << CS_ARCH_MIPS) | (1 << CS_ARCH_X86) |
(1 << CS_ARCH_PPC) | (1 << CS_ARCH_SPARC) |
(1 << CS_ARCH_SYSZ) | (1 << CS_ARCH_XCORE));
if ((unsigned int)... | pushq %rbx
movl %edi, %ebx
callq 0x4459a
cmpl $0xffff, %ebx # imm = 0xFFFF
jne 0x445f7
cmpl $0xff, 0x25491e(%rip) # 0x298f10
sete %al
jmp 0x4460c
cmpl $0x7, %ebx
ja 0x4460a
movl 0x25490e(%rip), %eax # 0x298f10
btl %ebx, %eax
setb %al
jmp 0x4460c
xorl %eax, %eax
popq %rbx
retq
| /radare[P]capstone/cs.c |
cs_close | CAPSTONE_EXPORT
cs_err cs_close(csh *handle)
{
struct cs_struct *ud;
if (*handle == 0)
// invalid handle
return CS_ERR_CSH;
ud = (struct cs_struct *)(*handle);
if (ud->printer_info)
cs_mem_free(ud->printer_info);
cs_mem_free(ud->insn_cache);
memset(ud, 0, sizeof(*ud));
cs_mem_free(ud);
// invalidate... | pushq %rbp
pushq %r14
pushq %rbx
movq (%rdi), %r14
testq %r14, %r14
je 0x44791
movq %rdi, %rbx
movq 0x10(%r14), %rdi
testq %rdi, %rdi
je 0x44764
callq *0x160964(%rip) # 0x1a50c8
movq 0xf0(%r14), %rdi
callq *0x160957(%rip) # 0x1a50c8
xorl %ebp, %ebp
movl $0x128, %edx # imm = 0x128
movq %r14, %... | /radare[P]capstone/cs.c |
cs_option | CAPSTONE_EXPORT
cs_err cs_option(csh ud, cs_opt_type type, size_t value)
{
struct cs_struct *handle;
archs_enable();
// cs_option() can be called with NULL handle just for CS_OPT_MEM
// This is supposed to be executed before all other APIs (even cs_open())
if (type == CS_OPT_MEM) {
cs_opt_mem *mem = (cs_opt_mem... | pushq %rbp
pushq %r14
pushq %rbx
movq %rdx, %r14
movl %esi, %ebp
movq %rdi, %rbx
callq 0x4459a
cmpl $0x4, %ebp
jne 0x447ee
movq (%r14), %rax
movq %rax, 0x1608f5(%rip) # 0x1a50b0
movq 0x8(%r14), %rax
movq %rax, 0x1608f2(%rip) # 0x1a50b8
movq 0x10(%r14), %rax
movq %rax, 0x1608ef(%rip) # 0x1a50c0
movq 0x18(%r14),... | /radare[P]capstone/cs.c |
fill_insn | static void fill_insn(struct cs_struct *handle, cs_insn *insn, char *buffer, MCInst *mci,
PostPrinter_t postprinter, const uint8_t *code)
{
#ifndef CAPSTONE_DIET
char *sp, *mnem;
#endif
unsigned int copy_size = MIN(sizeof(insn->bytes), insn->size);
// fill the instruction bytes.
// we might skip some redundant b... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %r15
movq %rcx, %r12
movq %rdx, %r14
movq %rsi, %rbx
movzwl 0x10(%rsi), %esi
cmpw $0x10, %si
pushq $0x10
popq %rbp
cmovbl %esi, %ebp
movq %rdi, %r13
leaq 0x12(%rbx), %rdi
addq %r9, %rsi
subq %rbp, %rsi
movq %rbp, %rdx
callq 0x440e0
m... | /radare[P]capstone/cs.c |
skipdata_opstr | static void skipdata_opstr(char *opstr, const uint8_t *buffer, size_t size)
{
char *p = opstr;
int len;
size_t i;
if (!size) {
opstr[0] = '\0';
return;
}
len = sprintf(p, "0x%02x", buffer[0]);
p+= len;
for(i = 1; i < size; i++) {
len = sprintf(p, ", 0x%02x", buffer[i]);
p+= len;
}
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdi, %r12
testq %rdx, %rdx
je 0x44e37
movq %rdx, %rbx
movq %rsi, %r14
movzbl (%rsi), %edx
leaq 0x7c650(%rip), %rsi # 0xc144b
movq %r12, %rdi
xorl %eax, %eax
callq 0x44120
movslq %eax, %r15
addq %r12, %r15
pushq $0x1
popq %r13
leaq 0x7c633(%rip), %r12 ... | /radare[P]capstone/cs.c |
cs_disasm_iter | CAPSTONE_EXPORT
bool cs_disasm_iter(csh ud, const uint8_t **code, size_t *size,
uint64_t *address, cs_insn *insn)
{
struct cs_struct *handle;
uint16_t insn_size;
MCInst mci;
bool r;
handle = (struct cs_struct *)(uintptr_t)ud;
if (!handle) {
return false;
}
handle->errnum = CS_ERR_OK;
MCInst_Init(&mci);
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x558, %rsp # imm = 0x558
testq %rdi, %rdi
je 0x44fec
movq %r8, %r12
movq %rcx, %rbx
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %r13
andl $0x0, 0x58(%rdi)
leaq 0x20(%rsp), %rbp
movq %rbp, %rdi
callq 0x45528
movq %r13, 0x320(%rbp)
movq (%... | /radare[P]capstone/cs.c |
DecodeT2LoadShift | static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Insn,
uint64_t Address, const void *Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned addrmode;
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
if (Rn == 15) {
switch (MCInst_getOpcode... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %r14d
movq %rdi, %rbx
movl %esi, %ebp
shrl $0x10, %ebp
andl $0xf, %ebp
cmpl $0xf, %ebp
jne 0x53e3f
movq %rbx, %rdi
callq 0x45580
cmpl $0x949, %eax # imm = 0x949
je 0x53f07
cmpl $0x9b4, %eax # imm = 0x9B4
je 0x53f15
cmpl $0x960, %eax... | /radare[P]capstone/arch/ARM/ARMDisassembler.c |
DecodeT2LoadImm8 | static DecodeStatus DecodeT2LoadImm8(MCInst *Inst, unsigned Insn,
uint64_t Address, const void* Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned U = fieldFromInstruction_4(Insn, 9, 1);
unsigned imm ... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl %esi, %r14d
shrl $0x10, %r14d
andl $0xf, %r14d
cmpl $0xf, %r14d
jne 0x53fb3
movq %rbx, %rdi
callq 0x45580
cmpl $0x9b2, %eax # imm = 0x9B2
je 0x54067
cmpl $0x955, %eax # imm = 0x955
je 0x54075
cmpl $0x95d, %... | /radare[P]capstone/arch/ARM/ARMDisassembler.c |
DecodeT2LoadT | static DecodeStatus DecodeT2LoadT(MCInst *Inst, unsigned Insn,
uint64_t Address, const void* Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned imm = fieldFromInstruction_4(Insn, 0, 8);
imm |= (Rn << ... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl %esi, %r14d
shrl $0x10, %r14d
andl $0xf, %r14d
cmpl $0xf, %r14d
jne 0x540f0
movq %rbx, %rdi
callq 0x45580
cmpl $0x969, %eax # imm = 0x969
je 0x5415b
movl %eax, %ecx
cmpl $0x951, %eax # imm = 0x951
je 0x5413... | /radare[P]capstone/arch/ARM/ARMDisassembler.c |
DecodeT2LoadImm12 | static DecodeStatus DecodeT2LoadImm12(MCInst *Inst, unsigned Insn,
uint64_t Address, const void* Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Insn, 16, 4);
unsigned Rt = fieldFromInstruction_4(Insn, 12, 4);
unsigned imm = fieldFromInstruction_4(Insn, 0, 12);
imm |= (R... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl %esi, %r14d
shrl $0x10, %r14d
andl $0xf, %r14d
cmpl $0xf, %r14d
jne 0x541f8
movq %rbx, %rdi
callq 0x45580
cmpl $0x945, %eax # imm = 0x945
je 0x542b8
cmpl $0x9b1, %eax # imm = 0x9B1
je 0x542c6
cmpl $0x95c, %... | /radare[P]capstone/arch/ARM/ARMDisassembler.c |
DecodeSPRRegisterClass | static DecodeStatus DecodeSPRRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address, const void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return MCDisassembler_Fail;
Register = SPRDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x54626
pushq %rax
movl %esi, %eax
leaq 0x7897a(%rip), %rcx # 0xccf90
movzwl (%rcx,%rax,2), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
| /radare[P]capstone/arch/ARM/ARMDisassembler.c |
DecodeAddrMode5Operand | static DecodeStatus DecodeAddrMode5Operand(MCInst *Inst, unsigned Val,
uint64_t Address, const void *Decoder)
{
DecodeStatus S = MCDisassembler_Success;
unsigned Rn = fieldFromInstruction_4(Val, 9, 4);
unsigned U = fieldFromInstruction_4(Val, 8, 1);
unsigned imm = fieldFromInstruction_4(Val, 0, 8);
if (!Check(... | pushq %rbp
pushq %r14
pushq %rbx
movl %esi, %ebx
movq %rdi, %r14
shrl $0x9, %esi
andl $0xf, %esi
callq 0x4fd97
movl %eax, %ebp
orl $0x2, %eax
cmpl $0x3, %eax
jne 0x5465e
andl $0x1ff, %ebx # imm = 0x1FF
xorl $0x100, %ebx # imm = 0x100
movq %r14, %rdi
movq %rbx, %rsi
callq 0x4563a
jmp 0x54660
xorl %... | /radare[P]capstone/arch/ARM/ARMDisassembler.c |
ARM_post_printer | void ARM_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci)
{
if (((cs_struct *)ud)->detail != CS_OPT_ON)
return;
// check if this insn requests write-back
if (mci->writeback || (strrchr(insn_asm, '!')) != NULL) {
insn->detail->arm.writeback = true;
} else if (mci->csh->mode & CS_MODE_THUMB) {
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
cmpl $0x3, 0xe0(%rdi)
jne 0x5bd2a
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %rbx
cmpb $0x0, 0x32e(%rcx)
jne 0x5bc5f
pushq $0x21
popq %rsi
movq %r15, %rdi
callq 0x440b0
testq %rax, %rax
jne 0x5bc5f
movq 0x320(%r14), %rax
testb $0x10, 0x4... | /radare[P]capstone/arch/ARM/ARMInstPrinter.c |
printImmPlusOneOperand | static void printImmPlusOneOperand(MCInst *MI, unsigned OpNum, SStream *O)
{
unsigned Imm = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum));
if (Imm + 1 > HEX_THRESHOLD)
SStream_concat(O, "#0x%x", Imm + 1);
else
SStream_concat(O, "#%u", Imm + 1);
if (MI->csh->detail) {
MI->flat_insn->detail->arm.... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %rdi
callq 0x455e2
movq %rax, %r14
incl %r14d
cmpl $0xa, %r14d
leaq 0x70adc(%rip), %rax # 0xd43ba
leaq 0x70add(%rip), %rsi # 0xd43c2
cmovaeq %rax, %rsi
movq %r15, %rdi
movl %r14d, %edx
xorl %eax, %eax
callq 0x456a6
movq 0x... | /radare[P]capstone/arch/ARM/ARMInstPrinter.c |
ARM_insn_name | const char *ARM_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= ARM_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
#else
return NULL;
#endif
} | cmpl $0x1b2, %esi # imm = 0x1B2
jbe 0x64703
xorl %eax, %eax
retq
movl %esi, %eax
shlq $0x4, %rax
leaq 0x130060(%rip), %rcx # 0x194770
movq 0x8(%rax,%rcx), %rax
retq
| /radare[P]capstone/arch/ARM/ARMMapping.c |
DecodeDDDDRegisterClass | static DecodeStatus DecodeDDDDRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = DDDDDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69add
pushq %rax
movl %esi, %eax
leaq 0x6be72(%rip), %rcx # 0xd5940
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
| /radare[P]capstone/arch/AArch64/AArch64Disassembler.c |
DecodeDDDRegisterClass | static DecodeStatus DecodeDDDRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr, void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = DDDDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69b26
pushq %rax
movl %esi, %eax
leaq 0x6bf29(%rip), %rcx # 0xd5a40
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
| /radare[P]capstone/arch/AArch64/AArch64Disassembler.c |
DecodeGPR64RegisterClass | static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = GPR64DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69c0d
pushq %rax
movl %esi, %eax
leaq 0x6bdc2(%rip), %rcx # 0xd59c0
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
| /radare[P]capstone/arch/AArch64/AArch64Disassembler.c |
DecodeFPR16RegisterClass | static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = FPR16DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69c4f
pushq %rax
movl %esi, %eax
leaq 0x6c100(%rip), %rcx # 0xd5d40
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
| /radare[P]capstone/arch/AArch64/AArch64Disassembler.c |
DecodeFPR32RegisterClass | static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = FPR32DecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x69c91
pushq %rax
movl %esi, %eax
leaq 0x6c1be(%rip), %rcx # 0xd5e40
movl (%rcx,%rax,4), %esi
callq 0x4560d
pushq $0x3
popq %rax
addq $0x8, %rsp
retq
| /radare[P]capstone/arch/AArch64/AArch64Disassembler.c |
DecodeVectorRegisterClass | static DecodeStatus DecodeVectorRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Addr,
void *Decoder)
{
unsigned Register;
if (RegNo > 31)
return Fail;
Register = VectorDecoderTable[RegNo];
MCOperand_CreateReg0(Inst, Register);
return Success;
} | cmpl $0x1f, %esi
jbe 0x69d08
retq
movl %esi, %eax
leaq 0x6c1af(%rip), %rcx # 0xd5ec0
movl (%rcx,%rax,4), %esi
jmp 0x4560d
| /radare[P]capstone/arch/AArch64/AArch64Disassembler.c |
getWRegFromXReg | inline static unsigned getWRegFromXReg(unsigned Reg)
{
switch (Reg) {
case ARM64_REG_X0: return ARM64_REG_W0;
case ARM64_REG_X1: return ARM64_REG_W1;
case ARM64_REG_X2: return ARM64_REG_W2;
case ARM64_REG_X3: return ARM64_REG_W3;
case ARM64_REG_X4: return ARM64_REG_W4;
case ARM64_REG_X5: return ARM64_REG_W... | movl %edi, %eax
leal -0xc7(%rax), %ecx
cmpl $0x1c, %ecx
ja 0x6b199
leaq 0x6b13a(%rip), %rax # 0xd62c4
movslq (%rax,%rcx,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movl $0xa8, %eax
retq
leal -0x1(%rax), %ecx
cmpl $0x6, %ecx
ja 0x6b198
leaq 0x6b100(%rip), %rdx # 0xd62a8
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%... | /radare[P]capstone/arch/AArch64/AArch64BaseInfo.h |
printOperand | static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
if (MCOperand_isReg(Op)) {
unsigned Reg = MCOperand_getReg(Op);
SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
if (MI->csh->doing_mem) {
if (MI->flat_ins... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rdi, %rbx
callq 0x45587
movq %rax, %r15
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8381e
movq %r15, %rdi
callq 0x455da
movl %eax, %r15d
leal -0x1(%r15), %eax
leaq 0x58705(%rip), %rcx # 0xdbeb0
movl (%rcx,%rax,4), %eax
leaq 0x162bab(%rip), %rsi # 0x1e6... | /radare[P]capstone/arch/AArch64/AArch64InstPrinter.c |
printAlignedLabel | static void printAlignedLabel(MCInst *MI, unsigned OpNum, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNum);
// If the label has already been resolved to an immediate offset (say, when
// we're running the disassembler), just print the immediate.
if (MCOperand_isImm(Op)) {
uint64_t imm = (MCOperand_getI... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movq %rdi, %rbx
callq 0x45587
movq %rax, %r15
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x839a3
movq %r15, %rdi
callq 0x455e2
movq %rax, %r15
shlq $0x2, %r15
addq 0x318(%rbx), %r15
movq %r14, %rdi
movq %r15, %rsi
callq 0x45797
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0... | /radare[P]capstone/arch/AArch64/AArch64InstPrinter.c |
printHexImm | static void printHexImm(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
SStream_concat(O, "#%#llx", MCOperand_getImm(Op));
if (MI->csh->detail) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.op... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455e2
leaq 0x59768(%rip), %rsi # 0xdd133
movq %r15, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x83a3c
movq 0x310(%rbx), %rax
movq 0xe8(%rax)... | /radare[P]capstone/arch/AArch64/AArch64InstPrinter.c |
set_mem_access | static void set_mem_access(MCInst *MI, bool status)
{
if (MI->csh->detail != CS_OPT_ON)
return;
MI->csh->doing_mem = status;
if (status) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_co... | movq 0x320(%rdi), %rax
cmpl $0x3, 0xe0(%rax)
jne 0x83ecf
movb %sil, 0xe8(%rax)
movq 0x310(%rdi), %rax
movq 0xe8(%rax), %rax
testb %sil, %sil
je 0x83ecc
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
movl $0x3, 0x50(%rax,%rcx)
movq 0x310(%rdi), %rax
movq 0xe8(%rax), %rax
movzbl 0x36(%rax), %ecx
imulq $0x30, %rcx, %rcx
... | /radare[P]capstone/arch/AArch64/AArch64InstPrinter.c |
printSysCROperand | static void printSysCROperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op = MCInst_getOperand(MI, OpNo);
//assert(Op.isImm() && "System instruction C[nm] operands must be immediates!");
SStream_concat(O, "c%u", MCOperand_getImm(Op));
if (MI->csh->detail) {
MI->flat_insn->detail->arm64.operands[MI->flat... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455e2
leaq 0x5012f(%rip), %rsi # 0xd43a4
movq %r15, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x456a6
movq 0x320(%rbx), %rax
cmpl $0x0, 0xe0(%rax)
je 0x842e6
movq 0x310(%rbx), %rax
movq 0xe8(%rax)... | /radare[P]capstone/arch/AArch64/AArch64InstPrinter.c |
AArch64_map_vregister | arm64_reg AArch64_map_vregister(unsigned int r)
{
// for some reasons different Arm64 can map different register number to
// the same register. this function handles the issue for exposing Mips
// operands by mapping internal registers to 'public' register.
unsigned int map[] = { 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, ... | xorl %eax, %eax
cmpl $0x1a3, %edi # imm = 0x1A3
ja 0x84d35
movl %edi, %eax
leaq 0x59a1e(%rip), %rcx # 0xde750
movl (%rcx,%rax,4), %eax
retq
| /radare[P]capstone/arch/AArch64/AArch64Mapping.c |
Mips_getInstruction | static DecodeStatus MipsDisassembler_getInstruction(int mode, MCInst *instr,
const uint8_t *code, size_t code_len,
uint16_t *Size,
uint64_t Address, bool isBigEndian, MCRegisterInfo *MRI)
{
uint32_t Insn;
DecodeStatus Result;
if (code_len < 4)
// not enough data
return MCDisassembler_Fail;
if (instr->fl... | cmpq $0x4, %rdx
jae 0x84eb9
xorl %eax, %eax
retq
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r14
movq %rcx, %r15
movq %rsi, %r13
movq %r8, 0x10(%rsp)
movl 0x4(%rdi), %ebx
movb 0x28(%rdi), %r12b
movq 0x310(%rcx), %rax
movq 0xe8(%rax), %rdi
testq %rdi, %rdi
je 0x84efb
mov... | /radare[P]capstone/arch/Mips/MipsDisassembler.c |
Mips64_getInstruction | bool Mips64_getInstruction(csh ud, const uint8_t *code, size_t code_len, MCInst *instr,
uint16_t *size, uint64_t address, void *info)
{
cs_struct *handle = (cs_struct *)(uintptr_t)ud;
DecodeStatus status = Mips64Disassembler_getInstruction(handle->mode, instr,
code, code_len,
size,
address, handle->big_en... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r9, %r14
movq %r8, %rbx
movq %rcx, %r15
movq %rsi, %rax
movq 0x40(%rsp), %r12
movl 0x4(%rdi), %ebp
movzbl 0x28(%rdi), %edx
leaq 0x4(%rsp), %rsi
movq %rax, %rdi
xorl %ecx, %ecx
callq 0x85082
movq 0x310(%r15), %rax
movq 0xe8(%rax), %rdi
te... | /radare[P]capstone/arch/Mips/MipsDisassembler.c |
readInstruction32 | static DecodeStatus readInstruction32(unsigned char *code, uint32_t *insn, bool isBigEndian, bool isMicroMips)
{
// We want to read exactly 4 Bytes of data.
if (isBigEndian) {
// Encoded as a big-endian 32-bit word in the stream.
*insn = (code[3] << 0) |
(code[2] << 8) |
(code[1] << 16) |
(code[0] << 2... | testl %edx, %edx
je 0x8508c
movl (%rdi), %eax
bswapl %eax
jmp 0x850a9
testb %cl, %cl
je 0x850a7
movzwl 0x2(%rdi), %eax
movzbl (%rdi), %ecx
shll $0x10, %ecx
orl %eax, %ecx
movzbl 0x1(%rdi), %eax
shll $0x18, %eax
orl %ecx, %eax
jmp 0x850a9
movl (%rdi), %eax
movl %eax, (%rsi)
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeGPR32RegisterClass | static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_GPR32RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x8908b
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x8
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeFCCRegisterClass | static DecodeStatus DecodeFCCRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 7)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FCCRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x7, %esi
ja 0x8911a
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x11
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeACC64DSPRegisterClass | static DecodeStatus DecodeACC64DSPRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo >= 4)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_ACC64DSPRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x3, %esi
ja 0x89143
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x22
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeFGR32RegisterClass | static DecodeStatus DecodeFGR32RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FGR32RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x89195
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x5
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeFGR64RegisterClass | static DecodeStatus DecodeFGR64RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FGR64RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x891be
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x1b
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeCCRRegisterClass | static DecodeStatus DecodeCCRRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_CCRRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x891e7
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x1
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeMSA128HRegisterClass | static DecodeStatus DecodeMSA128HRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_MSA128HRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x8926d
pushq %rbx
movl %esi, %edx
movq %rdi, %rbx
pushq $0x2c
popq %rsi
movq %rcx, %rdi
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeMSA128WRegisterClass | static DecodeStatus DecodeMSA128WRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_MSA128WRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x89294
pushq %rbx
movl %esi, %edx
movq %rdi, %rbx
pushq $0x2d
popq %rsi
movq %rcx, %rdi
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeMSA128DRegisterClass | static DecodeStatus DecodeMSA128DRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_MSA128DRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x892bb
pushq %rbx
movl %esi, %edx
movq %rdi, %rbx
pushq $0x2b
popq %rsi
movq %rcx, %rdi
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeFGRCCRegisterClass | static DecodeStatus DecodeFGRCCRegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_FGRCCRegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x89323
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x6
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
DecodeCOP2RegisterClass | static DecodeStatus DecodeCOP2RegisterClass(MCInst *Inst,
unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder)
{
unsigned Reg;
if (RegNo > 31)
return MCDisassembler_Fail;
Reg = getReg(Decoder, Mips_COP2RegClassID, RegNo);
MCOperand_CreateReg0(Inst, Reg);
return MCDisassembler_Success;
} | xorl %eax, %eax
cmpl $0x1f, %esi
ja 0x8934c
pushq %rbx
movl %esi, %ecx
movq %rdi, %rbx
pushq $0x2
popq %rsi
movq %rdx, %rdi
movl %ecx, %edx
callq 0x8934d
movq %rbx, %rdi
movl %eax, %esi
callq 0x4560d
pushq $0x3
popq %rax
popq %rbx
retq
| /radare[P]capstone/arch/Mips/MipsDisassembler.c |
Mips_printInst | void Mips_printInst(MCInst *MI, SStream *O, void *info)
{
char *mnem;
switch (MCInst_getOpcode(MI)) {
default: break;
case Mips_Save16:
case Mips_SaveX16:
case Mips_Restore16:
case Mips_RestoreX16:
return;
}
// Try to print any aliases first.
mnem = printAliasInstr(MI, O, info);
if (!mnem) {
mnem... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdx, %r15
movq %rsi, %rbx
movq %rdi, %r14
callq 0x45580
leal -0x547(%rax), %ecx
cmpl $0x2, %ecx
jb 0x89390
addl $0xfffff9bf, %eax # imm = 0xFFFFF9BF
cmpl $0x2, %eax
jae 0x8939a
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
movq %r14, %rdi
callq... | /radare[P]capstone/arch/Mips/MipsInstPrinter.c |
printOperand | static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
{
MCOperand *Op;
if (OpNo >= MI->size)
return;
Op = MCInst_getOperand(MI, OpNo);
if (MCOperand_isReg(Op)) {
unsigned int reg = MCOperand_getReg(Op);
printRegName(O, reg);
reg = Mips_map_register(reg);
if (MI->csh->detail) {
if (MI->csh->... | movzbl 0x4(%rdi), %eax
cmpl %esi, %eax
jbe 0x8b197
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r15
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455c2
testb %al, %al
je 0x8b00c
movq %r14, %rdi
callq 0x455da
movl %eax, %r14d
leal -0x1(%r14), %eax
leaq 0x54f7a(%rip), %rcx # 0xdff20
movl (%rcx... | /radare[P]capstone/arch/Mips/MipsInstPrinter.c |
printUnsignedImm | static void printUnsignedImm(MCInst *MI, int opNum, SStream *O)
{
MCOperand *MO = MCInst_getOperand(MI, opNum);
if (MCOperand_isImm(MO)) {
int64_t imm = MCOperand_getImm(MO);
if (imm >= 0) {
if (imm > HEX_THRESHOLD)
SStream_concat(O, "0x%x", (unsigned short int)imm);
else
SStream_concat(O, "%u", (un... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %r15
movl %esi, %ebp
movq %rdi, %rbx
callq 0x45587
movq %rax, %r14
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8b1de
movq %r14, %rdi
callq 0x455e2
movq %rax, %r14
testq %rax, %rax
js 0x8b1f5
cmpq $0xa, %r14
jb 0x8b20c
movzwl %r14w, %edx
leaq 0x5b34... | /radare[P]capstone/arch/Mips/MipsInstPrinter.c |
printMemOperand | static void printMemOperand(MCInst *MI, int opNum, SStream *O)
{
// Load/Store memory operands -- imm($reg)
// If PIC target the target is loaded as the
// pattern lw $25,%call16($28)
set_mem_access(MI, true);
printOperand(MI, opNum + 1, O);
SStream_concat0(O, "(");
printOperand(MI, opNum, O);
SStream_concat0(O... | pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %r14
movl %esi, %r15d
movq %rdi, %rbx
pushq $0x1
popq %rsi
callq 0x8b3cf
leal 0x1(%r15), %esi
movq %rbx, %rdi
movq %r14, %rdx
callq 0x8af65
leaq 0x3fd41(%rip), %rsi # 0xcb007
movq %r14, %rdi
callq 0x4565f
movq %rbx, %rdi
movl %r15d, %esi
movq %r14, %rdx
callq 0x8af65
leaq... | /radare[P]capstone/arch/Mips/MipsInstPrinter.c |
printUnsignedImm8 | static void printUnsignedImm8(MCInst *MI, int opNum, SStream *O)
{
MCOperand *MO = MCInst_getOperand(MI, opNum);
if (MCOperand_isImm(MO)) {
uint8_t imm = (uint8_t)MCOperand_getImm(MO);
if (imm > HEX_THRESHOLD)
SStream_concat(O, "0x%x", imm);
else
SStream_concat(O, "%u", imm);
if (MI->csh->detail) {
M... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %r14
movl %esi, %ebp
movq %rdi, %rbx
callq 0x45587
movq %rax, %r15
movq %rax, %rdi
callq 0x455ca
testb %al, %al
je 0x8b3b8
movq %r15, %rdi
callq 0x455e2
movq %rax, %r15
movzbl %r15b, %edx
cmpl $0xa, %edx
leaq 0x5b1eb(%rip), %rax # 0xe6525
leaq 0x3fbe... | /radare[P]capstone/arch/Mips/MipsInstPrinter.c |
Mips_reg_name | const char *Mips_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET
if (reg >= MIPS_REG_ENDING)
return NULL;
return reg_name_maps[reg].name;
#else
return NULL;
#endif
} | cmpl $0x87, %esi
jbe 0x8b453
xorl %eax, %eax
retq
movl %esi, %eax
shlq $0x4, %rax
leaq 0x10c0f0(%rip), %rcx # 0x197550
movq 0x8(%rax,%rcx), %rax
retq
| /radare[P]capstone/arch/Mips/MipsMapping.c |
Mips_insn_name | const char *Mips_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
if (id >= MIPS_INS_ENDING)
return NULL;
return insn_name_maps[id].name;
#else
return NULL;
#endif
} | cmpl $0x249, %esi # imm = 0x249
jbe 0x8b616
xorl %eax, %eax
retq
movl %esi, %eax
shlq $0x4, %rax
leaq 0x1819fd(%rip), %rcx # 0x20d020
movq 0x8(%rax,%rcx), %rax
retq
| /radare[P]capstone/arch/Mips/MipsMapping.c |
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