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+    "model.layers.5.post_attention_layernorm.weight": "model-00001-of-00004.safetensors",
+    "model.layers.5.self_attn.k_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.5.self_attn.k_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.5.self_attn.o_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.5.self_attn.q_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.5.self_attn.q_proj.weight": "model-00001-of-00004.safetensors",
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+    "model.layers.5.self_attn.v_proj.weight": "model-00001-of-00004.safetensors",
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+    "model.layers.6.mlp.down_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.6.mlp.gate_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.6.mlp.up_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.6.post_attention_layernorm.weight": "model-00001-of-00004.safetensors",
+    "model.layers.6.self_attn.k_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.6.self_attn.k_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.6.self_attn.o_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.6.self_attn.q_proj.bias": "model-00001-of-00004.safetensors",
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+    "model.layers.6.self_attn.v_proj.bias": "model-00001-of-00004.safetensors",
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+    "model.layers.7.mlp.down_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.mlp.gate_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.mlp.up_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.post_attention_layernorm.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.k_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.k_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.o_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.q_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.q_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.v_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.7.self_attn.v_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.8.input_layernorm.weight": "model-00002-of-00004.safetensors",
+    "model.layers.8.mlp.down_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.8.mlp.gate_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.8.mlp.up_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.8.post_attention_layernorm.weight": "model-00002-of-00004.safetensors",
+    "model.layers.8.self_attn.k_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.8.self_attn.k_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.8.self_attn.o_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.8.self_attn.q_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.8.self_attn.q_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.8.self_attn.v_proj.bias": "model-00001-of-00004.safetensors",
+    "model.layers.8.self_attn.v_proj.weight": "model-00001-of-00004.safetensors",
+    "model.layers.9.input_layernorm.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.mlp.down_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.mlp.gate_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.mlp.up_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.post_attention_layernorm.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.k_proj.bias": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.k_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.o_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.q_proj.bias": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.q_proj.weight": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.v_proj.bias": "model-00002-of-00004.safetensors",
+    "model.layers.9.self_attn.v_proj.weight": "model-00002-of-00004.safetensors",
+    "model.norm.weight": "model-00003-of-00004.safetensors"
+  }
+}

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platform/aiml/checkpoints/qwen3-8b-elizabeth-sft/optimizer_backups.tar.gz

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platform/aiml/models/vllm/torch_compile_cache/069ce3ea2b/rank_0_0/triton_cache/JGBJTSHFQO5ZMSSDR5JQ4N6IDDC3AKTV33H2WXFG26XWQP3IZ4ZA/triton_poi_fused_cat_1.ptx

@@ -0,0 +1,528 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.4
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_poi_fused_cat_1  // -- Begin function triton_poi_fused_cat_1
+.extern .func __assertfail
+(
+	.param .b64 __assertfail_param_0,
+	.param .b64 __assertfail_param_1,
+	.param .b32 __assertfail_param_2,
+	.param .b64 __assertfail_param_3,
+	.param .b64 __assertfail_param_4
+)
+.noreturn;
+.global .align 1 .b8 assertFunc_1[8] = {117, 110, 107, 110, 111, 119, 110};
+.global .align 1 .b8 assertFile_1[134] = {47, 104, 111, 109, 101, 47, 120, 47, 46, 99, 97, 99, 104, 101, 47, 118, 108, 108, 109, 47, 116, 111, 114, 99, 104, 95, 99, 111, 109, 112, 105, 108, 101, 95, 99, 97, 99, 104, 101, 47, 48, 54, 57, 99, 101, 51, 101, 97, 50, 98, 47, 114, 97, 110, 107, 95, 48, 95, 48, 47, 105, 110, 100, 117, 99, 116, 111, 114, 95, 99, 97, 99, 104, 101, 47, 122, 109, 47, 99, 122, 109, 119, 113, 108, 110, 51, 112, 109, 100, 53, 105, 116, 102, 53, 110, 98, 118, 110, 106, 117, 114, 102, 122, 115, 120, 103, 50, 52, 120, 51, 114, 120, 117, 103, 97, 103, 107, 116, 114, 107, 54, 109, 101, 102, 119, 114, 101, 97, 97, 104, 46, 112, 121};
+.global .align 1 .b8 assertMessage_1[68] = {105, 110, 100, 101, 120, 32, 111, 117, 116, 32, 111, 102, 32, 98, 111, 117, 110, 100, 115, 58, 32, 48, 32, 60, 61, 32, 116, 108, 46, 98, 114, 111, 97, 100, 99, 97, 115, 116, 95, 116, 111, 40, 116, 109, 112, 50, 56, 44, 32, 91, 88, 66, 76, 79, 67, 75, 93, 41, 32, 60, 32, 49, 51, 49, 48, 55, 50};
+.global .align 1 .b8 assertFunc_0[8] = {117, 110, 107, 110, 111, 119, 110};
+.global .align 1 .b8 assertFile_0[134] = {47, 104, 111, 109, 101, 47, 120, 47, 46, 99, 97, 99, 104, 101, 47, 118, 108, 108, 109, 47, 116, 111, 114, 99, 104, 95, 99, 111, 109, 112, 105, 108, 101, 95, 99, 97, 99, 104, 101, 47, 48, 54, 57, 99, 101, 51, 101, 97, 50, 98, 47, 114, 97, 110, 107, 95, 48, 95, 48, 47, 105, 110, 100, 117, 99, 116, 111, 114, 95, 99, 97, 99, 104, 101, 47, 122, 109, 47, 99, 122, 109, 119, 113, 108, 110, 51, 112, 109, 100, 53, 105, 116, 102, 53, 110, 98, 118, 110, 106, 117, 114, 102, 122, 115, 120, 103, 50, 52, 120, 51, 114, 120, 117, 103, 97, 103, 107, 116, 114, 107, 54, 109, 101, 102, 119, 114, 101, 97, 97, 104, 46, 112, 121};
+.global .align 1 .b8 assertMessage_0[68] = {105, 110, 100, 101, 120, 32, 111, 117, 116, 32, 111, 102, 32, 98, 111, 117, 110, 100, 115, 58, 32, 48, 32, 60, 61, 32, 116, 108, 46, 98, 114, 111, 97, 100, 99, 97, 115, 116, 95, 116, 111, 40, 116, 109, 112, 49, 48, 44, 32, 91, 88, 66, 76, 79, 67, 75, 93, 41, 32, 60, 32, 49, 51, 49, 48, 55, 50};
+                                        // @triton_poi_fused_cat_1
+.visible .entry triton_poi_fused_cat_1(
+	.param .u64 .ptr .global .align 1 triton_poi_fused_cat_1_param_0,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_cat_1_param_1,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_cat_1_param_2,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_cat_1_param_3,
+	.param .u32 triton_poi_fused_cat_1_param_4,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_cat_1_param_5
+)
+.reqntid 256, 1, 1
+{
+	.reg .pred 	%p<27>;
+	.reg .b16 	%rs<17>;
+	.reg .b32 	%r<58>;
+	.reg .f32 	%f<29>;
+	.reg .b64 	%rd<54>;
+	.loc	1 18 0                          // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:18:0
+
+// %bb.0:
+	ld.param.u32 	%r12, [triton_poi_fused_cat_1_param_4];
+	ld.param.u64 	%rd5, [triton_poi_fused_cat_1_param_0];
+	ld.param.u64 	%rd13, [triton_poi_fused_cat_1_param_1];
+$L__tmp0:
+	.loc	1 19 28                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:19:28
+	mov.u32 	%r15, %ctaid.x;
+	.loc	1 19 33                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:19:33
+	shl.b32 	%r16, %r15, 9;
+	.loc	1 20 36                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:20:36
+	mov.u32 	%r17, %tid.x;
+	shl.b32 	%r18, %r17, 1;
+	and.b32  	%r19, %r18, 510;
+	.loc	1 20 23                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:20:23
+	or.b32  	%r1, %r19, %r16;
+	.loc	1 21 21                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:21:21
+	setp.lt.s32 	%p6, %r1, %r12;
+	.loc	1 23 21                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:23:21
+	bfe.s32 	%r20, %r15, 22, 1;
+	shr.u32 	%r21, %r20, 25;
+	add.s32 	%r22, %r1, %r21;
+	shr.s32 	%r23, %r22, 7;
+	.loc	1 22 19                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:22:19
+	and.b32  	%r24, %r22, -128;
+	sub.s32 	%r2, %r1, %r24;
+	.loc	1 23 28                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:23:28
+	mul.hi.s32 	%r25, %r23, -1840700269;
+	add.s32 	%r26, %r25, %r23;
+	shr.u32 	%r27, %r26, 31;
+	shr.u32 	%r28, %r26, 4;
+	add.s32 	%r29, %r28, %r27;
+	mul.lo.s32 	%r30, %r29, 28;
+	sub.s32 	%r31, %r23, %r30;
+	.loc	1 24 19                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:24:19
+	mul.hi.s32 	%r32, %r1, -1840700269;
+	add.s32 	%r33, %r32, %r1;
+	shr.u32 	%r34, %r33, 31;
+	shr.s32 	%r35, %r33, 11;
+	add.s32 	%r36, %r35, %r34;
+	.loc	1 30 18                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:30:18
+	setp.lt.s32 	%p7, %r2, 64;
+	.loc	1 31 34                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:34
+	shl.b32 	%r3, %r31, 7;
+	.loc	1 31 44                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:44
+	mul.lo.s32 	%r4, %r36, 4608;
+	.loc	1 31 39                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:39
+	add.s32 	%r5, %r3, %r4;
+	.loc	1 31 50                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:50
+	add.s32 	%r37, %r5, %r2;
+	.loc	1 31 30                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:30
+	mul.wide.s32 	%rd14, %r37, 2;
+	add.s64 	%rd8, %rd5, %rd14;
+	.loc	1 31 64                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:64
+	and.pred  	%p5, %p7, %p6;
+	not.pred 	%p8, %p5;
+	mov.b32 	%r14, 0;
+	.loc	1 31 56                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:56
+	// begin inline asm
+	mov.u32 %r13, %r14;
+	@%p5 ld.global.L1::evict_last.b32 { %r13 }, [ %rd8 + 0 ];
+	// end inline asm
+	.loc	1 32 30                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:32:30
+	mul.wide.s32 	%rd15, %r36, 8;
+	add.s64 	%rd12, %rd13, %rd15;
+	.loc	1 32 35                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:32:35
+	// begin inline asm
+	mov.u64 %rd9, 0x0;
+	@%p5 ld.global.L1::evict_last.b64 { %rd9 }, [ %rd12 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd11, 0x0;
+	@%p5 ld.global.L1::evict_last.b64 { %rd11 }, [ %rd12 + 0 ];
+	// end inline asm
+	.loc	1 36 33                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:36:33
+	shr.u64 	%rd16, %rd9, 46;
+	and.b64  	%rd17, %rd16, 131072;
+	add.s64 	%rd2, %rd17, %rd9;
+	.loc	1 37 65                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:37:65
+	setp.lt.u64 	%p9, %rd2, 131072;
+	.loc	1 37 128                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:37:128
+	or.pred  	%p10, %p8, %p9;
+	@%p10 bra 	$L__BB0_2;
+	bra.uni 	$L__BB0_1;
+$L__BB0_2:
+	.loc	1 0 128                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:0:128
+	ld.param.u64 	%rd6, [triton_poi_fused_cat_1_param_2];
+	.loc	1 37 128                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:37:128
+	bar.sync 	0;
+	.loc	1 38 31                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:38:31
+	shl.b64 	%rd26, %rd2, 8;
+	add.s64 	%rd27, %rd6, %rd26;
+	mul.wide.s32 	%rd28, %r2, 2;
+	add.s64 	%rd18, %rd27, %rd28;
+	.loc	1 38 50                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:38:50
+	// begin inline asm
+	mov.u32 %r38, %r14;
+	@%p5 ld.global.L1::evict_last.b32 { %r38 }, [ %rd18 + 0 ];
+	// end inline asm
+	.loc	1 40 45                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:40:45
+	add.s32 	%r46, %r4, %r3;
+	add.s32 	%r47, %r46, 64;
+	.loc	1 40 56                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:40:56
+	add.s32 	%r48, %r47, %r2;
+	.loc	1 40 31                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:40:31
+	mul.wide.s32 	%rd29, %r48, 2;
+	add.s64 	%rd19, %rd5, %rd29;
+	.loc	1 40 62                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:40:62
+	// begin inline asm
+	mov.u32 %r40, %r14;
+	@%p5 ld.global.L1::evict_last.b32 { %r40 }, [ %rd19 + 0 ];
+	// end inline asm
+	.loc	1 41 31                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:41:31
+	add.s64 	%rd20, %rd18, 128;
+	.loc	1 41 55                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:41:55
+	// begin inline asm
+	mov.u32 %r42, %r14;
+	@%p5 ld.global.L1::evict_last.b32 { %r42 }, [ %rd20 + 0 ];
+	// end inline asm
+	.loc	1 46 20                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:46:20
+	setp.gt.s32 	%p18, %r2, 63;
+	.loc	1 49 64                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:49:64
+	add.s32 	%r10, %r2, -64;
+	.loc	1 49 56                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:49:56
+	add.s32 	%r49, %r47, %r10;
+	.loc	1 49 31                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:49:31
+	mul.wide.s32 	%rd30, %r49, 2;
+	add.s64 	%rd21, %rd5, %rd30;
+	.loc	1 49 78                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:49:78
+	and.pred  	%p16, %p18, %p6;
+	not.pred 	%p19, %p16;
+	.loc	1 49 70                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:49:70
+	// begin inline asm
+	mov.u32 %r44, %r14;
+	@%p16 ld.global.L1::evict_last.b32 { %r44 }, [ %rd21 + 0 ];
+	// end inline asm
+	.loc	1 50 36                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:50:36
+	// begin inline asm
+	mov.u64 %rd22, 0x0;
+	@%p16 ld.global.L1::evict_last.b64 { %rd22 }, [ %rd12 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd24, 0x0;
+	@%p16 ld.global.L1::evict_last.b64 { %rd24 }, [ %rd12 + 0 ];
+	// end inline asm
+	.loc	1 54 35                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:54:35
+	shr.u64 	%rd31, %rd22, 46;
+	and.b64  	%rd32, %rd31, 131072;
+	add.s64 	%rd4, %rd32, %rd22;
+	.loc	1 55 65                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:55:65
+	setp.lt.u64 	%p20, %rd4, 131072;
+	.loc	1 55 129                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:55:129
+	or.pred  	%p21, %p19, %p20;
+	@%p21 bra 	$L__BB0_4;
+	bra.uni 	$L__BB0_3;
+$L__BB0_4:
+	.loc	1 0 129                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:0:129
+	ld.param.u64 	%rd7, [triton_poi_fused_cat_1_param_3];
+	cvt.s64.s32 	%rd3, %r2;
+	.loc	1 55 129                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:55:129
+	bar.sync 	0;
+	.loc	1 56 31                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:56:31
+	shl.b64 	%rd37, %rd4, 8;
+	add.s64 	%rd38, %rd6, %rd37;
+	shl.b64 	%rd39, %rd3, 1;
+	add.s64 	%rd35, %rd38, %rd39;
+	add.s64 	%rd33, %rd35, -128;
+	mov.b32 	%r51, 0;
+	.loc	1 56 58                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:56:58
+	// begin inline asm
+	mov.u32 %r50, %r51;
+	@%p16 ld.global.L1::evict_last.b32 { %r50 }, [ %rd33 + 0 ];
+	// end inline asm
+	.loc	1 58 51                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:58:51
+	add.s32 	%r57, %r5, %r10;
+	.loc	1 58 31                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:58:31
+	mul.wide.s32 	%rd40, %r57, 2;
+	add.s64 	%rd34, %rd5, %rd40;
+	.loc	1 58 65                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:58:65
+	// begin inline asm
+	mov.u32 %r52, %r51;
+	@%p16 ld.global.L1::evict_last.b32 { %r52 }, [ %rd34 + 0 ];
+	// end inline asm
+	.loc	1 59 63                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:59:63
+	// begin inline asm
+	mov.u32 %r54, %r51;
+	@%p16 ld.global.L1::evict_last.b32 { %r54 }, [ %rd35 + 0 ];
+	// end inline asm
+	.loc	1 65 25                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:65:25
+	mul.wide.s32 	%rd41, %r1, 2;
+	add.s64 	%rd36, %rd7, %rd41;
+	.loc	1 49 129                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:49:129
+	mov.b32 	{%rs1, %rs2}, %r44;
+	cvt.f32.bf16 	%f1, %rs1;
+	cvt.f32.bf16 	%f2, %rs2;
+	.loc	1 31 114                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:31:114
+	mov.b32 	{%rs3, %rs4}, %r13;
+	cvt.f32.bf16 	%f3, %rs3;
+	cvt.f32.bf16 	%f4, %rs4;
+	.loc	1 38 108                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:38:108
+	mov.b32 	{%rs5, %rs6}, %r38;
+	cvt.f32.bf16 	%f5, %rs5;
+	cvt.f32.bf16 	%f6, %rs6;
+	.loc	1 40 120                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:40:120
+	mov.b32 	{%rs7, %rs8}, %r40;
+	cvt.f32.bf16 	%f7, %rs8;
+	cvt.f32.bf16 	%f8, %rs7;
+	.loc	1 41 113                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:41:113
+	mov.b32 	{%rs9, %rs10}, %r42;
+	cvt.f32.bf16 	%f9, %rs10;
+	cvt.f32.bf16 	%f10, %rs9;
+	.loc	1 42 20                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:42:20
+	mul.f32 	%f11, %f8, %f10;
+	mul.f32 	%f12, %f7, %f9;
+	.loc	1 43 20                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:43:20
+	neg.f32 	%f13, %f12;
+	fma.rn.f32 	%f14, %f4, %f6, %f13;
+	neg.f32 	%f15, %f11;
+	fma.rn.f32 	%f16, %f3, %f5, %f15;
+	.loc	1 56 117                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:56:117
+	mov.b32 	{%rs11, %rs12}, %r50;
+	cvt.f32.bf16 	%f17, %rs11;
+	cvt.f32.bf16 	%f18, %rs12;
+	.loc	1 58 124                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:58:124
+	mov.b32 	{%rs13, %rs14}, %r52;
+	cvt.f32.bf16 	%f19, %rs14;
+	cvt.f32.bf16 	%f20, %rs13;
+	.loc	1 59 122                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:59:122
+	mov.b32 	{%rs15, %rs16}, %r54;
+	cvt.f32.bf16 	%f21, %rs16;
+	cvt.f32.bf16 	%f22, %rs15;
+	.loc	1 60 20                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:60:20
+	mul.f32 	%f23, %f20, %f22;
+	mul.f32 	%f24, %f19, %f21;
+	.loc	1 61 20                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:61:20
+	fma.rn.f32 	%f25, %f2, %f18, %f24;
+	fma.rn.f32 	%f26, %f1, %f17, %f23;
+	.loc	1 0 0                           // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:0:0
+	selp.f32 	%f27, %f16, %f26, %p7;
+	selp.f32 	%f28, %f14, %f25, %p7;
+	.loc	1 65 37                         // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:65:37
+	cvt.rn.bf16x2.f32 	%r56, %f28, %f27;
+	// begin inline asm
+	@%p6 st.global.b32 [ %rd36 + 0 ], { %r56 };
+	// end inline asm
+	.loc	1 65 4                          // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:65:4
+	ret;
+$L__BB0_1:
+	.loc	1 37 128                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:37:128
+	mov.u64 	%rd48, assertMessage_0;
+	cvta.global.u64 	%rd49, %rd48;
+	mov.u64 	%rd50, assertFile_0;
+	cvta.global.u64 	%rd51, %rd50;
+	mov.u64 	%rd52, assertFunc_0;
+	cvta.global.u64 	%rd53, %rd52;
+	{ // callseq 4, 0
+	.param .b64 param0;
+	st.param.b64 	[param0], %rd49;
+	.param .b64 param1;
+	st.param.b64 	[param1], %rd51;
+	.param .b32 param2;
+	st.param.b32 	[param2], 37;
+	.param .b64 param3;
+	st.param.b64 	[param3], %rd53;
+	.param .b64 param4;
+	st.param.b64 	[param4], 1;
+	call.uni 
+	__assertfail, 
+	(
+	param0, 
+	param1, 
+	param2, 
+	param3, 
+	param4
+	);
+	} // callseq 4
+	trap;
+$L__BB0_3:
+	.loc	1 55 129                        // czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py:55:129
+	mov.u64 	%rd42, assertMessage_1;
+	cvta.global.u64 	%rd43, %rd42;
+	mov.u64 	%rd44, assertFile_1;
+	cvta.global.u64 	%rd45, %rd44;
+	mov.u64 	%rd46, assertFunc_1;
+	cvta.global.u64 	%rd47, %rd46;
+	{ // callseq 3, 0
+	.param .b64 param0;
+	st.param.b64 	[param0], %rd43;
+	.param .b64 param1;
+	st.param.b64 	[param1], %rd45;
+	.param .b32 param2;
+	st.param.b32 	[param2], 55;
+	.param .b64 param3;
+	st.param.b64 	[param3], %rd47;
+	.param .b64 param4;
+	st.param.b64 	[param4], 1;
+	call.uni 
+	__assertfail, 
+	(
+	param0, 
+	param1, 
+	param2, 
+	param3, 
+	param4
+	);
+	} // callseq 3
+	trap;
+$L__tmp1:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/home/x/.cache/vllm/torch_compile_cache/069ce3ea2b/rank_0_0/inductor_cache/zm/czmwqln3pmd5itf5nbvnjurfzsxg24x3rxugagktrk6mefwreaah.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 0                                   // DW_CHILDREN_no
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 155                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0x94 DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 122
+.b8 109
+.b8 119
+.b8 113
+.b8 108
+.b8 110
+.b8 51
+.b8 112
+.b8 109
+.b8 100
+.b8 53
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+.b8 117
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+.b8 102
+.b8 122
+.b8 115
+.b8 120
+.b8 103
+.b8 50
+.b8 52
+.b8 120
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+.b8 114
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+.b8 97
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+.b8 107
+.b8 116
+.b8 114
+.b8 107
+.b8 54
+.b8 109
+.b8 101
+.b8 102
+.b8 119
+.b8 114
+.b8 101
+.b8 97
+.b8 97
+.b8 104
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 104
+.b8 111
+.b8 109
+.b8 101
+.b8 47
+.b8 120
+.b8 47
+.b8 46
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 118
+.b8 108
+.b8 108
+.b8 109
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 95
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 48
+.b8 54
+.b8 57
+.b8 99
+.b8 101
+.b8 51
+.b8 101
+.b8 97
+.b8 50
+.b8 98
+.b8 47
+.b8 114
+.b8 97
+.b8 110
+.b8 107
+.b8 95
+.b8 48
+.b8 95
+.b8 48
+.b8 47
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
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+.b8 111
+.b8 114
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 122
+.b8 109
+.b8 0
+	}
+	.section	.debug_macinfo	{	}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/__grp__triton_red_fused__to_copy_mean_pow_4.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_red_fused__to_copy_mean_pow_4.ttir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.ttir", "triton_red_fused__to_copy_mean_pow_4.ttgir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.ttgir", "triton_red_fused__to_copy_mean_pow_4.llir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.llir", "triton_red_fused__to_copy_mean_pow_4.ptx": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.ptx", "triton_red_fused__to_copy_mean_pow_4.cubin": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.cubin", "triton_red_fused__to_copy_mean_pow_4.json": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.json"}}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.json

@@ -0,0 +1 @@
+{"hash": "dde87391e8e537d55078ec911de8aa99b0ae8675c8e0e555a1cd93c960c9a280", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 16, "num_ctas": 1, "num_stages": 1, "num_buffers_warp_spec": 0, "num_consumer_groups": 0, "reg_dec_producer": 0, "reg_inc_consumer": 0, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/home/x/hfenv/lib/python3.12/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "triton_version": "3.3.1", "shared": 256, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "name": "triton_red_fused__to_copy_mean_pow_4"}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.llir

@@ -0,0 +1,169 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external addrspace(3) global [0 x i8], align 16
+
+define ptx_kernel void @triton_red_fused__to_copy_mean_pow_4(ptr addrspace(1) %0, ptr addrspace(1) %1, i32 %2, i32 %3, ptr addrspace(1) readnone captures(none) %4) local_unnamed_addr !dbg !6 {
+  %6 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !9
+  %7 = shl i32 %6, 6, !dbg !10
+  %8 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !11
+  %9 = lshr i32 %8, 3, !dbg !11
+  %10 = and i32 %9, 63, !dbg !11
+  %11 = or disjoint i32 %10, %7, !dbg !12
+  %12 = icmp slt i32 %11, %2, !dbg !13
+  %13 = shl i32 %8, 3, !dbg !14
+  %14 = and i32 %13, 56, !dbg !14
+  %15 = sdiv i32 %11, 8, !dbg !15
+  %16 = mul i32 %15, 8, !dbg !16
+  %.decomposed = sub i32 %11, %16, !dbg !16
+  %17 = shl nsw i32 %.decomposed, 7, !dbg !17
+  %18 = mul i32 %15, 7168, !dbg !18
+  %19 = add nsw i32 %17, 5120
+  %20 = add i32 %19, %18
+  %21 = or disjoint i32 %20, %14, !dbg !19
+  %22 = sext i32 %21 to i64, !dbg !20
+  %23 = getelementptr bfloat, ptr addrspace(1) %0, i64 %22, !dbg !20
+  %24 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.L1::evict_first.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %23, i1 %12) #3, !dbg !21
+  %25 = extractvalue { i32, i32, i32, i32 } %24, 0, !dbg !21
+  %26 = bitcast i32 %25 to <2 x bfloat>, !dbg !21
+  %27 = extractvalue { i32, i32, i32, i32 } %24, 1, !dbg !21
+  %28 = bitcast i32 %27 to <2 x bfloat>, !dbg !21
+  %29 = extractvalue { i32, i32, i32, i32 } %24, 2, !dbg !21
+  %30 = bitcast i32 %29 to <2 x bfloat>, !dbg !21
+  %31 = extractvalue { i32, i32, i32, i32 } %24, 3, !dbg !21
+  %32 = bitcast i32 %31 to <2 x bfloat>, !dbg !21
+  %33 = or disjoint i32 %14, 64, !dbg !22
+  %34 = or disjoint i32 %20, %33, !dbg !19
+  %35 = sext i32 %34 to i64, !dbg !20
+  %36 = getelementptr bfloat, ptr addrspace(1) %0, i64 %35, !dbg !20
+  %37 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, $4;\0A\09mov.u32 $1, $5;\0A\09mov.u32 $2, $6;\0A\09mov.u32 $3, $7;\0A\09@$9 ld.global.L1::evict_first.v4.b32 { $0, $1, $2, $3 }, [ $8 + 0 ];", "=r,=r,=r,=r,r,r,r,r,l,b"(i32 0, i32 0, i32 0, i32 0, ptr addrspace(1) %36, i1 %12) #3, !dbg !21
+  %38 = extractvalue { i32, i32, i32, i32 } %37, 0, !dbg !21
+  %39 = bitcast i32 %38 to <2 x bfloat>, !dbg !21
+  %40 = extractvalue { i32, i32, i32, i32 } %37, 1, !dbg !21
+  %41 = bitcast i32 %40 to <2 x bfloat>, !dbg !21
+  %42 = extractvalue { i32, i32, i32, i32 } %37, 2, !dbg !21
+  %43 = bitcast i32 %42 to <2 x bfloat>, !dbg !21
+  %44 = extractvalue { i32, i32, i32, i32 } %37, 3, !dbg !21
+  %45 = bitcast i32 %44 to <2 x bfloat>, !dbg !21
+  %46 = fpext <2 x bfloat> %26 to <2 x float>, !dbg !23
+  %47 = fmul <2 x float> %46, %46, !dbg !24
+  %48 = fpext <2 x bfloat> %39 to <2 x float>, !dbg !23
+  %49 = fmul <2 x float> %48, %48, !dbg !24
+  %50 = fadd <2 x float> %47, %49, !dbg !25
+  %51 = fpext <2 x bfloat> %28 to <2 x float>, !dbg !23
+  %52 = fmul <2 x float> %51, %51, !dbg !24
+  %53 = fpext <2 x bfloat> %41 to <2 x float>, !dbg !23
+  %54 = fmul <2 x float> %53, %53, !dbg !24
+  %55 = fadd <2 x float> %52, %54, !dbg !25
+  %56 = fpext <2 x bfloat> %30 to <2 x float>, !dbg !23
+  %57 = fmul <2 x float> %56, %56, !dbg !24
+  %58 = fpext <2 x bfloat> %43 to <2 x float>, !dbg !23
+  %59 = fmul <2 x float> %58, %58, !dbg !24
+  %60 = fadd <2 x float> %57, %59, !dbg !25
+  %61 = fpext <2 x bfloat> %32 to <2 x float>, !dbg !23
+  %62 = fmul <2 x float> %61, %61, !dbg !24
+  %63 = fpext <2 x bfloat> %45 to <2 x float>, !dbg !23
+  %64 = fmul <2 x float> %63, %63, !dbg !24
+  %65 = fadd <2 x float> %62, %64, !dbg !25
+  %66 = and i32 %8, 63, !dbg !11
+  %67 = or disjoint i32 %7, %66, !dbg !12
+  %68 = icmp slt i32 %67, %2, !dbg !13
+  %shift = shufflevector <2 x float> %50, <2 x float> poison, <2 x i32> <i32 1, i32 poison>, !dbg !26
+  %69 = fadd <2 x float> %50, %shift, !dbg !26
+  %70 = fadd <2 x float> %55, %69, !dbg !26
+  %shift10 = shufflevector <2 x float> %55, <2 x float> poison, <2 x i32> <i32 1, i32 poison>, !dbg !26
+  %71 = fadd <2 x float> %shift10, %70, !dbg !26
+  %72 = fadd <2 x float> %60, %71, !dbg !26
+  %shift11 = shufflevector <2 x float> %60, <2 x float> poison, <2 x i32> <i32 1, i32 poison>, !dbg !26
+  %73 = fadd <2 x float> %shift11, %72, !dbg !26
+  %74 = fadd <2 x float> %65, %73, !dbg !26
+  %shift12 = shufflevector <2 x float> %65, <2 x float> poison, <2 x i32> <i32 1, i32 poison>, !dbg !26
+  %75 = fadd <2 x float> %shift12, %74, !dbg !26
+  %76 = extractelement <2 x float> %75, i64 0, !dbg !26
+  %77 = select i1 %12, float %76, float 0.000000e+00, !dbg !26
+  %78 = bitcast float %77 to i32, !dbg !31
+  %79 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %78, i32 4, i32 31), !dbg !31
+  %80 = bitcast i32 %79 to float, !dbg !31
+  %81 = fadd float %77, %80, !dbg !26
+  %82 = bitcast float %81 to i32, !dbg !31
+  %83 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %82, i32 2, i32 31), !dbg !31
+  %84 = bitcast i32 %83 to float, !dbg !31
+  %85 = fadd float %81, %84, !dbg !26
+  %86 = bitcast float %85 to i32, !dbg !31
+  %87 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %86, i32 1, i32 31), !dbg !31
+  %88 = bitcast i32 %87 to float, !dbg !31
+  %89 = fadd float %85, %88, !dbg !26
+  %90 = getelementptr inbounds nuw float, ptr addrspace(3) @global_smem, i32 %10, !dbg !32
+  %91 = bitcast float %89 to <1 x i32>, !dbg !32
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %90, <1 x i32> %91, i1 true) #3, !dbg !32
+  tail call void @llvm.nvvm.barrier0(), !dbg !32
+  %92 = getelementptr inbounds nuw float, ptr addrspace(3) @global_smem, i32 %66, !dbg !32
+  %93 = load i32, ptr addrspace(3) %92, align 4, !dbg !32
+  %94 = sext i32 %67 to i64, !dbg !33
+  %95 = getelementptr float, ptr addrspace(1) %1, i64 %94, !dbg !33
+  %96 = and i32 %8, 448, !dbg !34
+  %97 = icmp eq i32 %96, 0, !dbg !34
+  %98 = and i1 %97, %68, !dbg !34
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %93, ptr addrspace(1) %95, i1 %98) #3, !dbg !34
+  ret void, !dbg !35
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #2
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { nounwind }
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!2}
+!nvvm.annotations = !{!4}
+!llvm.ident = !{!5}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!2 = distinct !DICompileUnit(language: DW_LANG_C, file: !3, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!3 = !DIFile(filename: "ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py", directory: "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty")
+!4 = !{ptr @triton_red_fused__to_copy_mean_pow_4, !"reqntidx", i32 512}
+!5 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!6 = distinct !DISubprogram(name: "triton_red_fused__to_copy_mean_pow_4", linkageName: "triton_red_fused__to_copy_mean_pow_4", scope: !3, file: !3, line: 18, type: !7, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2)
+!7 = !DISubroutineType(cc: DW_CC_normal, types: !8)
+!8 = !{}
+!9 = !DILocation(line: 22, column: 28, scope: !6)
+!10 = !DILocation(line: 22, column: 33, scope: !6)
+!11 = !DILocation(line: 23, column: 44, scope: !6)
+!12 = !DILocation(line: 23, column: 23, scope: !6)
+!13 = !DILocation(line: 24, column: 21, scope: !6)
+!14 = !DILocation(line: 25, column: 37, scope: !6)
+!15 = !DILocation(line: 28, column: 19, scope: !6)
+!16 = !DILocation(line: 27, column: 19, scope: !6)
+!17 = !DILocation(line: 37, column: 52, scope: !6)
+!18 = !DILocation(line: 37, column: 62, scope: !6)
+!19 = !DILocation(line: 37, column: 57, scope: !6)
+!20 = !DILocation(line: 37, column: 34, scope: !6)
+!21 = !DILocation(line: 37, column: 67, scope: !6)
+!22 = !DILocation(line: 32, column: 31, scope: !6)
+!23 = !DILocation(line: 37, column: 129, scope: !6)
+!24 = !DILocation(line: 39, column: 22, scope: !6)
+!25 = !DILocation(line: 41, column: 23, scope: !6)
+!26 = !DILocation(line: 256, column: 15, scope: !27, inlinedAt: !30)
+!27 = distinct !DILexicalBlockFile(scope: !29, file: !28, discriminator: 0)
+!28 = !DIFile(filename: "standard.py", directory: "/home/x/hfenv/lib/python3.12/site-packages/triton/language")
+!29 = distinct !DILexicalBlockFile(scope: !6, file: !28, discriminator: 0)
+!30 = !DILocation(line: 43, column: 25, scope: !6)
+!31 = !DILocation(line: 286, column: 36, scope: !29, inlinedAt: !30)
+!32 = !DILocation(line: 43, column: 28, scope: !6)
+!33 = !DILocation(line: 44, column: 25, scope: !6)
+!34 = !DILocation(line: 44, column: 36, scope: !6)
+!35 = !DILocation(line: 44, column: 4, scope: !6)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.ptx

@@ -0,0 +1,469 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.4
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_red_fused__to_copy_mean_pow_4 // -- Begin function triton_red_fused__to_copy_mean_pow_4
+.extern .shared .align 16 .b8 global_smem[];
+                                        // @triton_red_fused__to_copy_mean_pow_4
+.visible .entry triton_red_fused__to_copy_mean_pow_4(
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_mean_pow_4_param_0,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_mean_pow_4_param_1,
+	.param .u32 triton_red_fused__to_copy_mean_pow_4_param_2,
+	.param .u32 triton_red_fused__to_copy_mean_pow_4_param_3,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_mean_pow_4_param_4
+)
+.reqntid 512, 1, 1
+{
+	.reg .pred 	%p<7>;
+	.reg .b16 	%rs<17>;
+	.reg .b32 	%r<51>;
+	.reg .f32 	%f<47>;
+	.reg .b64 	%rd<13>;
+	.loc	1 18 0                          // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:18:0
+
+// %bb.0:
+	ld.param.u64 	%rd4, [triton_red_fused__to_copy_mean_pow_4_param_0];
+	ld.param.u64 	%rd5, [triton_red_fused__to_copy_mean_pow_4_param_1];
+$L__tmp0:
+	.loc	1 22 28                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:22:28
+	mov.u32 	%r20, %ctaid.x;
+	.loc	1 22 33                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:22:33
+	shl.b32 	%r21, %r20, 6;
+	ld.param.u32 	%r22, [triton_red_fused__to_copy_mean_pow_4_param_2];
+	.loc	1 23 44                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:23:44
+	mov.u32 	%r23, %tid.x;
+	bfe.u32 	%r24, %r23, 3, 6;
+	.loc	1 23 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:23:23
+	or.b32  	%r25, %r24, %r21;
+	.loc	1 24 21                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:24:21
+	setp.lt.s32 	%p1, %r25, %r22;
+	.loc	1 25 37                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:25:37
+	shl.b32 	%r26, %r23, 3;
+	and.b32  	%r27, %r26, 56;
+	.loc	1 28 19                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:28:19
+	bfe.s32 	%r28, %r20, 25, 1;
+	shr.u32 	%r29, %r28, 29;
+	add.s32 	%r30, %r25, %r29;
+	shr.u32 	%r31, %r30, 3;
+	.loc	1 27 19                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:27:19
+	and.b32  	%r32, %r30, 33554424;
+	sub.s32 	%r33, %r25, %r32;
+	.loc	1 37 52                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:52
+	shl.b32 	%r34, %r33, 7;
+	mad.lo.s32 	%r35, %r31, 7168, %r34;
+	add.s32 	%r36, %r35, 5120;
+	.loc	1 37 57                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:57
+	or.b32  	%r37, %r36, %r27;
+	.loc	1 37 34                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:34
+	mul.wide.s32 	%rd6, %r37, 2;
+	add.s64 	%rd1, %rd4, %rd6;
+	mov.b32 	%r5, 0;
+	.loc	1 37 67                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:67
+	// begin inline asm
+	mov.u32 %r1, %r5;
+	mov.u32 %r2, %r5;
+	mov.u32 %r3, %r5;
+	mov.u32 %r4, %r5;
+	@%p1 ld.global.L1::evict_first.v4.b32 { %r1, %r2, %r3, %r4 }, [ %rd1 + 0 ];
+	// end inline asm
+	.loc	1 37 34                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:34
+	cvt.s64.s32 	%rd7, %r36;
+	cvt.u64.u32 	%rd8, %r27;
+	or.b64  	%rd9, %rd7, %rd8;
+	shl.b64 	%rd10, %rd9, 1;
+	add.s64 	%rd11, %rd4, %rd10;
+	add.s64 	%rd2, %rd11, 128;
+	.loc	1 37 67                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:67
+	// begin inline asm
+	mov.u32 %r9, %r5;
+	mov.u32 %r10, %r5;
+	mov.u32 %r11, %r5;
+	mov.u32 %r12, %r5;
+	@%p1 ld.global.L1::evict_first.v4.b32 { %r9, %r10, %r11, %r12 }, [ %rd2 + 0 ];
+	// end inline asm
+	.loc	1 37 129                        // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:129
+	mov.b32 	{%rs1, %rs2}, %r1;
+	cvt.f32.bf16 	%f1, %rs1;
+	cvt.f32.bf16 	%f2, %rs2;
+	mov.b32 	{%rs3, %rs4}, %r9;
+	cvt.f32.bf16 	%f3, %rs4;
+	cvt.f32.bf16 	%f4, %rs3;
+	.loc	1 39 22                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:39:22
+	mul.f32 	%f5, %f4, %f4;
+	mul.f32 	%f6, %f3, %f3;
+	.loc	1 41 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:41:23
+	fma.rn.f32 	%f7, %f2, %f2, %f6;
+	fma.rn.f32 	%f8, %f1, %f1, %f5;
+	.loc	1 37 129                        // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:129
+	mov.b32 	{%rs5, %rs6}, %r2;
+	cvt.f32.bf16 	%f9, %rs5;
+	cvt.f32.bf16 	%f10, %rs6;
+	mov.b32 	{%rs7, %rs8}, %r10;
+	cvt.f32.bf16 	%f11, %rs8;
+	cvt.f32.bf16 	%f12, %rs7;
+	.loc	1 39 22                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:39:22
+	mul.f32 	%f13, %f12, %f12;
+	mul.f32 	%f14, %f11, %f11;
+	.loc	1 41 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:41:23
+	fma.rn.f32 	%f15, %f10, %f10, %f14;
+	fma.rn.f32 	%f16, %f9, %f9, %f13;
+	.loc	1 37 129                        // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:129
+	mov.b32 	{%rs9, %rs10}, %r3;
+	cvt.f32.bf16 	%f17, %rs9;
+	cvt.f32.bf16 	%f18, %rs10;
+	mov.b32 	{%rs11, %rs12}, %r11;
+	cvt.f32.bf16 	%f19, %rs12;
+	cvt.f32.bf16 	%f20, %rs11;
+	.loc	1 39 22                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:39:22
+	mul.f32 	%f21, %f20, %f20;
+	mul.f32 	%f22, %f19, %f19;
+	.loc	1 41 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:41:23
+	fma.rn.f32 	%f23, %f18, %f18, %f22;
+	fma.rn.f32 	%f24, %f17, %f17, %f21;
+	.loc	1 37 129                        // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:129
+	mov.b32 	{%rs13, %rs14}, %r4;
+	cvt.f32.bf16 	%f25, %rs13;
+	cvt.f32.bf16 	%f26, %rs14;
+	mov.b32 	{%rs15, %rs16}, %r12;
+	cvt.f32.bf16 	%f27, %rs16;
+	cvt.f32.bf16 	%f28, %rs15;
+	.loc	1 39 22                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:39:22
+	mul.f32 	%f29, %f28, %f28;
+	mul.f32 	%f30, %f27, %f27;
+	.loc	1 41 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:41:23
+	fma.rn.f32 	%f31, %f26, %f26, %f30;
+	fma.rn.f32 	%f32, %f25, %f25, %f29;
+	.loc	1 23 44                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:23:44
+	and.b32  	%r38, %r23, 63;
+	.loc	1 23 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:23:23
+	or.b32  	%r39, %r21, %r38;
+	.loc	1 24 21                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:24:21
+	setp.lt.s32 	%p5, %r39, %r22;
+$L__tmp1:
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f33, %f8, %f7;
+	add.f32 	%f34, %f16, %f33;
+	add.f32 	%f35, %f15, %f34;
+	add.f32 	%f36, %f24, %f35;
+	add.f32 	%f37, %f23, %f36;
+	add.f32 	%f38, %f32, %f37;
+	add.f32 	%f39, %f31, %f38;
+	selp.f32 	%f40, %f39, 0f00000000, %p1;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r40, %f40;
+	shfl.sync.bfly.b32	%r41, %r40, 4, 31, -1;
+	mov.b32 	%f41, %r41;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f42, %f40, %f41;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r42, %f42;
+	shfl.sync.bfly.b32	%r43, %r42, 2, 31, -1;
+	mov.b32 	%f43, %r43;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f44, %f42, %f43;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r44, %f44;
+	shfl.sync.bfly.b32	%r45, %r44, 1, 31, -1;
+	mov.b32 	%f45, %r45;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f46, %f44, %f45;
+$L__tmp2:
+	.loc	1 43 28                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:43:28
+	shl.b32 	%r46, %r24, 2;
+	mov.u32 	%r47, global_smem;
+	add.s32 	%r17, %r47, %r46;
+	mov.b32 	%r18, %f46;
+	mov.pred 	%p3, -1;
+	// begin inline asm
+	@%p3 st.shared.b32 [ %r17 + 0 ], %r18;
+	// end inline asm
+	bar.sync 	0;
+	shl.b32 	%r48, %r38, 2;
+	add.s32 	%r49, %r47, %r48;
+	ld.shared.u32 	%r19, [%r49];
+	.loc	1 44 25                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:44:25
+	mul.wide.s32 	%rd12, %r39, 4;
+	add.s64 	%rd3, %rd5, %rd12;
+	.loc	1 44 36                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:44:36
+	and.b32  	%r50, %r23, 448;
+	setp.eq.s32 	%p6, %r50, 0;
+	and.pred  	%p4, %p6, %p5;
+	// begin inline asm
+	@%p4 st.global.b32 [ %rd3 + 0 ], { %r19 };
+	// end inline asm
+	.loc	1 44 4                          // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:44:4
+	ret;
+$L__tmp3:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py"
+	.file	2 "/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 241                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xea DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 116
+.b8 121
+.b8 100
+.b8 106
+.b8 97
+.b8 55
+.b8 107
+.b8 116
+.b8 114
+.b8 101
+.b8 119
+.b8 120
+.b8 113
+.b8 101
+.b8 104
+.b8 107
+.b8 105
+.b8 122
+.b8 106
+.b8 105
+.b8 55
+.b8 113
+.b8 122
+.b8 105
+.b8 52
+.b8 119
+.b8 122
+.b8 113
+.b8 107
+.b8 106
+.b8 99
+.b8 115
+.b8 119
+.b8 106
+.b8 107
+.b8 113
+.b8 110
+.b8 120
+.b8 97
+.b8 108
+.b8 102
+.b8 101
+.b8 121
+.b8 51
+.b8 109
+.b8 111
+.b8 104
+.b8 103
+.b8 103
+.b8 111
+.b8 116
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 104
+.b8 111
+.b8 109
+.b8 101
+.b8 47
+.b8 120
+.b8 47
+.b8 46
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 118
+.b8 108
+.b8 108
+.b8 109
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 95
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 57
+.b8 48
+.b8 98
+.b8 52
+.b8 53
+.b8 98
+.b8 99
+.b8 101
+.b8 48
+.b8 50
+.b8 47
+.b8 114
+.b8 97
+.b8 110
+.b8 107
+.b8 95
+.b8 48
+.b8 95
+.b8 48
+.b8 47
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 116
+.b8 121
+.b8 0
+.b8 2                                   // Abbrev [2] 0x9f:0x27 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 114
+.b8 101
+.b8 100
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 95
+.b8 116
+.b8 111
+.b8 95
+.b8 99
+.b8 111
+.b8 112
+.b8 121
+.b8 95
+.b8 109
+.b8 101
+.b8 97
+.b8 110
+.b8 95
+.b8 112
+.b8 111
+.b8 119
+.b8 95
+.b8 52
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xc6:0x2e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 159                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xdb:0x18 DW_TAG_inlined_subroutine
+.b32 159                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 43                                  // DW_AT_call_line
+.b8 25                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.ttgir

@@ -0,0 +1,106 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 8], threadsPerWarp = [4, 8], warpsPerCTA = [16, 1], order = [1, 0]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [32, 1], warpsPerCTA = [2, 8], order = [0, 1]}>
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0)
+#loc1 = loc(unknown)
+#loc27 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":43:25)
+#loc34 = loc(callsite(#loc1 at #loc27))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 16 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_red_fused__to_copy_mean_pow_4(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg2: i32 loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg3: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<64x64xf32, #blocked> loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xbf16, #blocked> loc(#loc1)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %cst_1 = arith.constant dense<8> : tensor<64x1xi32, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<7168> : tensor<64x1xi32, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<128> : tensor<64x1xi32, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<5120> : tensor<1x64xi32, #blocked> loc(#loc1)
+    %cst_5 = arith.constant dense<128> : tensor<1x64xi32, #blocked> loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c64_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc4)
+    %3 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc4)
+    %4 = tt.expand_dims %2 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64x1xi32, #blocked> loc(#loc4)
+    %5 = tt.expand_dims %3 {axis = 1 : i32} : tensor<64xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<64x1xi32, #blocked1> loc(#loc4)
+    %6 = tt.splat %1 : i32 -> tensor<64x1xi32, #blocked> loc(#loc5)
+    %7 = tt.splat %1 : i32 -> tensor<64x1xi32, #blocked1> loc(#loc5)
+    %8 = arith.addi %6, %4 : tensor<64x1xi32, #blocked> loc(#loc5)
+    %9 = arith.addi %7, %5 : tensor<64x1xi32, #blocked1> loc(#loc5)
+    %10 = tt.splat %arg2 : i32 -> tensor<64x1xi32, #blocked> loc(#loc6)
+    %11 = tt.splat %arg2 : i32 -> tensor<64x1xi32, #blocked1> loc(#loc6)
+    %12 = arith.cmpi slt, %8, %10 : tensor<64x1xi32, #blocked> loc(#loc6)
+    %13 = arith.cmpi slt, %9, %11 : tensor<64x1xi32, #blocked1> loc(#loc6)
+    %14 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc7)
+    %15 = tt.expand_dims %14 {axis = 0 : i32} : tensor<64xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x64xi32, #blocked> loc(#loc7)
+    %16 = arith.remsi %8, %cst_1 : tensor<64x1xi32, #blocked> loc(#loc8)
+    %17 = arith.divsi %8, %cst_1 : tensor<64x1xi32, #blocked> loc(#loc9)
+    %18 = arith.muli %16, %cst_3 : tensor<64x1xi32, #blocked> loc(#loc10)
+    %19 = tt.broadcast %18 : tensor<64x1xi32, #blocked> -> tensor<64x64xi32, #blocked> loc(#loc11)
+    %20 = arith.muli %17, %cst_2 : tensor<64x1xi32, #blocked> loc(#loc12)
+    %21 = tt.broadcast %20 : tensor<64x1xi32, #blocked> -> tensor<64x64xi32, #blocked> loc(#loc13)
+    %22 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<64x64x!tt.ptr<bf16>, #blocked> loc(#loc14)
+    %23 = tt.broadcast %12 : tensor<64x1xi1, #blocked> -> tensor<64x64xi1, #blocked> loc(#loc15)
+    %24 = scf.for %arg4 = %c0_i32 to %c128_i32 step %c64_i32 iter_args(%arg5 = %cst) -> (tensor<64x64xf32, #blocked>)  : i32 {
+      %30 = tt.splat %arg4 : i32 -> tensor<1x64xi32, #blocked> loc(#loc17)
+      %31 = arith.addi %30, %15 : tensor<1x64xi32, #blocked> loc(#loc17)
+      %32 = arith.cmpi slt, %31, %cst_5 : tensor<1x64xi32, #blocked> loc(#loc18)
+      %33 = arith.addi %31, %cst_4 : tensor<1x64xi32, #blocked> loc(#loc19)
+      %34 = tt.broadcast %33 : tensor<1x64xi32, #blocked> -> tensor<64x64xi32, #blocked> loc(#loc11)
+      %35 = arith.addi %34, %19 : tensor<64x64xi32, #blocked> loc(#loc11)
+      %36 = arith.addi %35, %21 : tensor<64x64xi32, #blocked> loc(#loc13)
+      %37 = tt.addptr %22, %36 : tensor<64x64x!tt.ptr<bf16>, #blocked>, tensor<64x64xi32, #blocked> loc(#loc14)
+      %38 = tt.broadcast %32 : tensor<1x64xi1, #blocked> -> tensor<64x64xi1, #blocked> loc(#loc15)
+      %39 = arith.andi %38, %23 : tensor<64x64xi1, #blocked> loc(#loc15)
+      %40 = tt.load %37, %39, %cst_0 evictionPolicy = evict_first : tensor<64x64x!tt.ptr<bf16>, #blocked> loc(#loc20)
+      %41 = arith.extf %40 : tensor<64x64xbf16, #blocked> to tensor<64x64xf32, #blocked> loc(#loc21)
+      %42 = arith.mulf %41, %41 : tensor<64x64xf32, #blocked> loc(#loc22)
+      %43 = arith.addf %arg5, %42 : tensor<64x64xf32, #blocked> loc(#loc23)
+      %44 = arith.select %39, %43, %arg5 : tensor<64x64xi1, #blocked>, tensor<64x64xf32, #blocked> loc(#loc24)
+      scf.yield %44 : tensor<64x64xf32, #blocked> loc(#loc25)
+    } loc(#loc16)
+    %25 = "tt.reduce"(%24) <{axis = 1 : i32}> ({
+    ^bb0(%arg4: f32 loc(callsite(#loc1 at #loc27)), %arg5: f32 loc(callsite(#loc1 at #loc27))):
+      %30 = arith.addf %arg4, %arg5 : f32 loc(#loc36)
+      tt.reduce.return %30 : f32 loc(#loc33)
+    }) : (tensor<64x64xf32, #blocked>) -> tensor<64xf32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc33)
+    %26 = ttg.convert_layout %25 : tensor<64xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<64xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc29)
+    %27 = tt.expand_dims %26 {axis = 1 : i32} : tensor<64xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<64x1xf32, #blocked1> loc(#loc29)
+    %28 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<64x1x!tt.ptr<f32>, #blocked1> loc(#loc30)
+    %29 = tt.addptr %28, %9 : tensor<64x1x!tt.ptr<f32>, #blocked1>, tensor<64x1xi32, #blocked1> loc(#loc30)
+    tt.store %29, %27, %13 : tensor<64x1x!tt.ptr<f32>, #blocked1> loc(#loc31)
+    tt.return loc(#loc32)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":22:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":22:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:44)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:23)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":24:21)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":25:37)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":27:19)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":28:19)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:52)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:48)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:62)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:57)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:34)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:77)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":31:40)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":32:31)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":33:29)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:41)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:67)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:129)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":39:22)
+#loc23 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":41:23)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":42:48)
+#loc25 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":42:8)
+#loc26 = loc("/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py":286:36)
+#loc28 = loc("/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py":256:15)
+#loc29 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":43:28)
+#loc30 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:25)
+#loc31 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:36)
+#loc32 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:4)
+#loc33 = loc(callsite(#loc26 at #loc27))
+#loc35 = loc(callsite(#loc28 at #loc26))
+#loc36 = loc(callsite(#loc35 at #loc27))

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/3XUHHEPI4U35KUDY5SIR32FKTGYK5BTVZDQOKVNBZWJ4SYGJUKAA/triton_red_fused__to_copy_mean_pow_4.ttir

@@ -0,0 +1,97 @@
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0)
+#loc1 = loc(unknown)
+#loc28 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":43:25)
+#loc35 = loc(callsite(#loc1 at #loc28))
+module {
+  tt.func public @triton_red_fused__to_copy_mean_pow_4(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg2: i32 loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg3: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<64x64xbf16> loc(#loc1)
+    %c128_i32 = arith.constant 128 : i32 loc(#loc1)
+    %c0_i32 = arith.constant 0 : i32 loc(#loc1)
+    %cst_0 = arith.constant dense<7168> : tensor<64x1xi32> loc(#loc1)
+    %cst_1 = arith.constant dense<128> : tensor<64x1xi32> loc(#loc1)
+    %cst_2 = arith.constant dense<5120> : tensor<1x64xi32> loc(#loc1)
+    %cst_3 = arith.constant dense<128> : tensor<1x64xi32> loc(#loc1)
+    %cst_4 = arith.constant dense<0.000000e+00> : tensor<64x64xf32> loc(#loc1)
+    %cst_5 = arith.constant dense<8> : tensor<64x1xi32> loc(#loc1)
+    %c64_i32 = arith.constant 64 : i32 loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c64_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32> loc(#loc4)
+    %3 = tt.expand_dims %2 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32> loc(#loc5)
+    %4 = tt.splat %1 : i32 -> tensor<64x1xi32> loc(#loc6)
+    %5 = arith.addi %4, %3 : tensor<64x1xi32> loc(#loc6)
+    %6 = tt.splat %arg2 : i32 -> tensor<64x1xi32> loc(#loc7)
+    %7 = arith.cmpi slt, %5, %6 : tensor<64x1xi32> loc(#loc7)
+    %8 = tt.expand_dims %2 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32> loc(#loc8)
+    %9 = arith.remsi %5, %cst_5 : tensor<64x1xi32> loc(#loc9)
+    %10 = arith.divsi %5, %cst_5 : tensor<64x1xi32> loc(#loc10)
+    %11 = scf.for %arg4 = %c0_i32 to %c128_i32 step %c64_i32 iter_args(%arg5 = %cst_4) -> (tensor<64x64xf32>)  : i32 {
+      %16 = tt.splat %arg4 : i32 -> tensor<1x64xi32> loc(#loc12)
+      %17 = arith.addi %16, %8 : tensor<1x64xi32> loc(#loc12)
+      %18 = arith.cmpi slt, %17, %cst_3 : tensor<1x64xi32> loc(#loc13)
+      %19 = arith.addi %17, %cst_2 : tensor<1x64xi32> loc(#loc14)
+      %20 = arith.muli %9, %cst_1 : tensor<64x1xi32> loc(#loc15)
+      %21 = tt.broadcast %19 : tensor<1x64xi32> -> tensor<64x64xi32> loc(#loc16)
+      %22 = tt.broadcast %20 : tensor<64x1xi32> -> tensor<64x64xi32> loc(#loc16)
+      %23 = arith.addi %21, %22 : tensor<64x64xi32> loc(#loc16)
+      %24 = arith.muli %10, %cst_0 : tensor<64x1xi32> loc(#loc17)
+      %25 = tt.broadcast %24 : tensor<64x1xi32> -> tensor<64x64xi32> loc(#loc18)
+      %26 = arith.addi %23, %25 : tensor<64x64xi32> loc(#loc18)
+      %27 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<64x64x!tt.ptr<bf16>> loc(#loc19)
+      %28 = tt.addptr %27, %26 : tensor<64x64x!tt.ptr<bf16>>, tensor<64x64xi32> loc(#loc19)
+      %29 = tt.broadcast %18 : tensor<1x64xi1> -> tensor<64x64xi1> loc(#loc20)
+      %30 = tt.broadcast %7 : tensor<64x1xi1> -> tensor<64x64xi1> loc(#loc20)
+      %31 = arith.andi %29, %30 : tensor<64x64xi1> loc(#loc20)
+      %32 = tt.load %28, %31, %cst evictionPolicy = evict_first : tensor<64x64x!tt.ptr<bf16>> loc(#loc21)
+      %33 = arith.extf %32 : tensor<64x64xbf16> to tensor<64x64xf32> loc(#loc22)
+      %34 = arith.mulf %33, %33 : tensor<64x64xf32> loc(#loc23)
+      %35 = arith.addf %arg5, %34 : tensor<64x64xf32> loc(#loc24)
+      %36 = arith.select %31, %35, %arg5 : tensor<64x64xi1>, tensor<64x64xf32> loc(#loc25)
+      scf.yield %36 : tensor<64x64xf32> loc(#loc26)
+    } loc(#loc11)
+    %12 = "tt.reduce"(%11) <{axis = 1 : i32}> ({
+    ^bb0(%arg4: f32 loc(callsite(#loc1 at #loc28)), %arg5: f32 loc(callsite(#loc1 at #loc28))):
+      %16 = arith.addf %arg4, %arg5 : f32 loc(#loc37)
+      tt.reduce.return %16 : f32 loc(#loc34)
+    }) : (tensor<64x64xf32>) -> tensor<64xf32> loc(#loc34)
+    %13 = tt.expand_dims %12 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32> loc(#loc30)
+    %14 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<64x1x!tt.ptr<f32>> loc(#loc31)
+    %15 = tt.addptr %14, %5 : tensor<64x1x!tt.ptr<f32>>, tensor<64x1xi32> loc(#loc31)
+    tt.store %15, %13, %7 : tensor<64x1x!tt.ptr<f32>> loc(#loc32)
+    tt.return loc(#loc33)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":22:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":22:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:36)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:44)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:23)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":24:21)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":25:37)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":27:19)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":28:19)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":31:40)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":32:31)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":33:29)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:41)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:52)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:48)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:62)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:57)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:34)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:77)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:67)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:129)
+#loc23 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":39:22)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":41:23)
+#loc25 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":42:48)
+#loc26 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":42:8)
+#loc27 = loc("/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py":286:36)
+#loc29 = loc("/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py":256:15)
+#loc30 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":43:28)
+#loc31 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:25)
+#loc32 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:36)
+#loc33 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:4)
+#loc34 = loc(callsite(#loc27 at #loc28))
+#loc36 = loc(callsite(#loc29 at #loc27))
+#loc37 = loc(callsite(#loc36 at #loc28))

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/__grp__triton_poi_fused_add_mul_sub_6.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_poi_fused_add_mul_sub_6.ttir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.ttir", "triton_poi_fused_add_mul_sub_6.ttgir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.ttgir", "triton_poi_fused_add_mul_sub_6.llir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.llir", "triton_poi_fused_add_mul_sub_6.ptx": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.ptx", "triton_poi_fused_add_mul_sub_6.cubin": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.cubin", "triton_poi_fused_add_mul_sub_6.json": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.json"}}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.json

@@ -0,0 +1 @@
+{"hash": "ece5ae7118220bc210562fd087f178fd908fe39948f1908a5937051858cb1123", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 4, "num_ctas": 1, "num_stages": 1, "num_buffers_warp_spec": 0, "num_consumer_groups": 0, "reg_dec_producer": 0, "reg_inc_consumer": 0, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/home/x/hfenv/lib/python3.12/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "triton_version": "3.3.1", "shared": 0, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "name": "triton_poi_fused_add_mul_sub_6"}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.ttgir

@@ -0,0 +1,196 @@
+#blocked = #ttg.blocked<{sizePerThread = [8], threadsPerWarp = [32], warpsPerCTA = [4], order = [0]}>
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 4 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_poi_fused_add_mul_sub_6(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg3: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg4: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg5: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg6: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg7: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<1.280000e+02> : tensor<1024xf32, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<9.99999997E-7> : tensor<1024xf32, #blocked> loc(#loc1)
+    %cst_1 = arith.constant dense<128> : tensor<1024xi64, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<40960> : tensor<1024xi64, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<0> : tensor<1024xi64, #blocked> loc(#loc1)
+    %c1024_i32 = arith.constant 1024 : i32 loc(#loc1)
+    %cst_4 = arith.constant dense<64> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_5 = arith.constant dense<8> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_6 = arith.constant dense<512> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_7 = arith.constant dense<5120> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_8 = arith.constant dense<128> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_9 = arith.constant dense<7168> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_10 = arith.constant dense<5184> : tensor<1024xi32, #blocked> loc(#loc1)
+    %cst_11 = arith.constant dense<true> : tensor<1024xi1, #blocked> loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c1024_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32, #blocked> loc(#loc4)
+    %3 = tt.splat %1 : i32 -> tensor<1024xi32, #blocked> loc(#loc5)
+    %4 = arith.addi %3, %2 : tensor<1024xi32, #blocked> loc(#loc5)
+    %5 = tt.splat %arg7 : i32 -> tensor<1024xi32, #blocked> loc(#loc6)
+    %6 = arith.cmpi slt, %4, %5 : tensor<1024xi32, #blocked> loc(#loc6)
+    %7 = arith.remsi %4, %cst_4 : tensor<1024xi32, #blocked> loc(#loc7)
+    %8 = arith.divsi %4, %cst_4 : tensor<1024xi32, #blocked> loc(#loc8)
+    %9 = arith.remsi %8, %cst_5 : tensor<1024xi32, #blocked> loc(#loc9)
+    %10 = arith.divsi %4, %cst_6 : tensor<1024xi32, #blocked> loc(#loc10)
+    %11 = arith.addi %7, %cst_7 : tensor<1024xi32, #blocked> loc(#loc11)
+    %12 = arith.muli %9, %cst_8 : tensor<1024xi32, #blocked> loc(#loc12)
+    %13 = arith.addi %11, %12 : tensor<1024xi32, #blocked> loc(#loc13)
+    %14 = arith.muli %10, %cst_9 : tensor<1024xi32, #blocked> loc(#loc14)
+    %15 = arith.addi %13, %14 : tensor<1024xi32, #blocked> loc(#loc15)
+    %16 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc16)
+    %17 = tt.addptr %16, %15 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi32, #blocked> loc(#loc16)
+    %18 = tt.load %17, %6 : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc17)
+    %19 = arith.extf %18 : tensor<1024xbf16, #blocked> to tensor<1024xf32, #blocked> loc(#loc18)
+    %20 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<1024x!tt.ptr<f32>, #blocked> loc(#loc19)
+    %21 = tt.addptr %20, %8 : tensor<1024x!tt.ptr<f32>, #blocked>, tensor<1024xi32, #blocked> loc(#loc19)
+    %22 = tt.load %21, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<f32>, #blocked> loc(#loc20)
+    %23 = tt.splat %arg2 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc21)
+    %24 = tt.addptr %23, %7 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi32, #blocked> loc(#loc21)
+    %25 = tt.load %24, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc22)
+    %26 = arith.extf %25 : tensor<1024xbf16, #blocked> to tensor<1024xf32, #blocked> loc(#loc23)
+    %27 = tt.splat %arg3 : !tt.ptr<i64> -> tensor<1024x!tt.ptr<i64>, #blocked> loc(#loc24)
+    %28 = tt.addptr %27, %10 : tensor<1024x!tt.ptr<i64>, #blocked>, tensor<1024xi32, #blocked> loc(#loc24)
+    %29 = tt.load %28, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<i64>, #blocked> loc(#loc25)
+    %30 = arith.addi %7, %cst_10 : tensor<1024xi32, #blocked> loc(#loc26)
+    %31 = arith.addi %30, %12 : tensor<1024xi32, #blocked> loc(#loc27)
+    %32 = arith.addi %7, %cst_4 : tensor<1024xi32, #blocked> loc(#loc28)
+    %33 = arith.divsi %32, %cst_8 : tensor<1024xi32, #blocked> loc(#loc29)
+    %34 = arith.muli %33, %cst_8 : tensor<1024xi32, #blocked> loc(#loc30)
+    %35 = arith.addi %31, %34 : tensor<1024xi32, #blocked> loc(#loc31)
+    %36 = arith.addi %35, %14 : tensor<1024xi32, #blocked> loc(#loc32)
+    %37 = tt.addptr %16, %36 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi32, #blocked> loc(#loc33)
+    %38 = tt.load %37, %6 : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc34)
+    %39 = arith.extf %38 : tensor<1024xbf16, #blocked> to tensor<1024xf32, #blocked> loc(#loc35)
+    %40 = arith.addi %8, %33 : tensor<1024xi32, #blocked> loc(#loc36)
+    %41 = tt.addptr %20, %40 : tensor<1024x!tt.ptr<f32>, #blocked>, tensor<1024xi32, #blocked> loc(#loc37)
+    %42 = tt.load %41, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<f32>, #blocked> loc(#loc38)
+    %43 = tt.addptr %23, %32 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi32, #blocked> loc(#loc39)
+    %44 = tt.load %43, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc40)
+    %45 = arith.extf %44 : tensor<1024xbf16, #blocked> to tensor<1024xf32, #blocked> loc(#loc41)
+    %46 = arith.divf %22, %cst : tensor<1024xf32, #blocked> loc(#loc42)
+    %47 = arith.addf %46, %cst_0 : tensor<1024xf32, #blocked> loc(#loc43)
+    %48 = tt.extern_elementwise %47 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<1024xf32, #blocked>) -> tensor<1024xf32, #blocked> loc(#loc44)
+    %49 = arith.mulf %19, %48 : tensor<1024xf32, #blocked> loc(#loc45)
+    %50 = arith.mulf %49, %26 : tensor<1024xf32, #blocked> loc(#loc46)
+    %51 = arith.addi %29, %cst_2 : tensor<1024xi64, #blocked> loc(#loc47)
+    %52 = arith.cmpi slt, %29, %cst_3 : tensor<1024xi64, #blocked> loc(#loc48)
+    %53 = arith.select %52, %51, %29 : tensor<1024xi1, #blocked>, tensor<1024xi64, #blocked> loc(#loc49)
+    %54 = arith.cmpi sge, %53, %cst_3 : tensor<1024xi64, #blocked> loc(#loc50)
+    %55 = arith.cmpi slt, %53, %cst_2 : tensor<1024xi64, #blocked> loc(#loc51)
+    %56 = arith.andi %54, %55 : tensor<1024xi1, #blocked> loc(#loc52)
+    %57 = arith.xori %6, %cst_11 : tensor<1024xi1, #blocked> loc(#loc53)
+    %58 = arith.ori %56, %57 : tensor<1024xi1, #blocked> loc(#loc54)
+    tt.assert %58, "index out of bounds: 0 <= tmp16 < 40960" : tensor<1024xi1, #blocked> loc(#loc55)
+    %59 = arith.muli %53, %cst_1 : tensor<1024xi64, #blocked> loc(#loc56)
+    %60 = arith.extsi %7 : tensor<1024xi32, #blocked> to tensor<1024xi64, #blocked> loc(#loc57)
+    %61 = arith.addi %60, %59 : tensor<1024xi64, #blocked> loc(#loc57)
+    %62 = tt.splat %arg4 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc58)
+    %63 = tt.addptr %62, %61 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi64, #blocked> loc(#loc58)
+    %64 = tt.load %63, %6 : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc59)
+    %65 = arith.extf %64 : tensor<1024xbf16, #blocked> to tensor<1024xf32, #blocked> loc(#loc60)
+    %66 = arith.mulf %50, %65 : tensor<1024xf32, #blocked> loc(#loc61)
+    %67 = arith.divf %42, %cst : tensor<1024xf32, #blocked> loc(#loc62)
+    %68 = arith.addf %67, %cst_0 : tensor<1024xf32, #blocked> loc(#loc63)
+    %69 = tt.extern_elementwise %68 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<1024xf32, #blocked>) -> tensor<1024xf32, #blocked> loc(#loc64)
+    %70 = arith.mulf %39, %69 : tensor<1024xf32, #blocked> loc(#loc65)
+    %71 = arith.mulf %70, %45 : tensor<1024xf32, #blocked> loc(#loc66)
+    %72 = arith.extsi %32 : tensor<1024xi32, #blocked> to tensor<1024xi64, #blocked> loc(#loc67)
+    %73 = arith.addi %72, %59 : tensor<1024xi64, #blocked> loc(#loc67)
+    %74 = tt.addptr %62, %73 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi64, #blocked> loc(#loc68)
+    %75 = tt.load %74, %6 : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc69)
+    %76 = arith.extf %75 : tensor<1024xbf16, #blocked> to tensor<1024xf32, #blocked> loc(#loc70)
+    %77 = arith.mulf %71, %76 : tensor<1024xf32, #blocked> loc(#loc71)
+    %78 = arith.subf %66, %77 : tensor<1024xf32, #blocked> loc(#loc72)
+    %79 = arith.mulf %71, %65 : tensor<1024xf32, #blocked> loc(#loc73)
+    %80 = arith.mulf %50, %76 : tensor<1024xf32, #blocked> loc(#loc74)
+    %81 = arith.addf %79, %80 : tensor<1024xf32, #blocked> loc(#loc75)
+    %82 = arith.muli %8, %cst_8 : tensor<1024xi32, #blocked> loc(#loc76)
+    %83 = arith.addi %7, %82 : tensor<1024xi32, #blocked> loc(#loc77)
+    %84 = tt.splat %arg5 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc78)
+    %85 = tt.addptr %84, %83 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi32, #blocked> loc(#loc78)
+    %86 = arith.truncf %78 : tensor<1024xf32, #blocked> to tensor<1024xbf16, #blocked> loc(#loc79)
+    tt.store %85, %86, %6 : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc79)
+    %87 = tt.splat %arg6 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc80)
+    %88 = tt.addptr %87, %83 : tensor<1024x!tt.ptr<bf16>, #blocked>, tensor<1024xi32, #blocked> loc(#loc80)
+    %89 = arith.truncf %81 : tensor<1024xf32, #blocked> to tensor<1024xbf16, #blocked> loc(#loc81)
+    tt.store %88, %89, %6 : tensor<1024x!tt.ptr<bf16>, #blocked> loc(#loc81)
+    tt.return loc(#loc82)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc(unknown)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:36)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:23)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":21:21)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":22:19)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:21)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:27)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":24:19)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:37)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:46)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:42)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:56)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:51)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:30)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:61)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:71)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:30)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:35)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:31)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:36)
+#loc23 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:76)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:31)
+#loc25 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:36)
+#loc26 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:38)
+#loc27 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:43)
+#loc28 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:63)
+#loc29 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:70)
+#loc30 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:57)
+#loc31 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:52)
+#loc32 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:77)
+#loc33 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:31)
+#loc34 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:87)
+#loc35 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:97)
+#loc36 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:37)
+#loc37 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:31)
+#loc38 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:57)
+#loc39 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:31)
+#loc40 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:41)
+#loc41 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:81)
+#loc42 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":35:19)
+#loc43 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":37:18)
+#loc44 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":38:27)
+#loc45 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":39:18)
+#loc46 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":41:19)
+#loc47 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":43:20)
+#loc48 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":44:20)
+#loc49 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":45:35)
+#loc50 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:28)
+#loc51 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:46)
+#loc52 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:38)
+#loc53 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:58)
+#loc54 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:56)
+#loc55 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:66)
+#loc56 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:40)
+#loc57 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:36)
+#loc58 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:31)
+#loc59 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:48)
+#loc60 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:58)
+#loc61 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":48:20)
+#loc62 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":50:21)
+#loc63 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":51:20)
+#loc64 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":52:28)
+#loc65 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":53:20)
+#loc66 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":55:20)
+#loc67 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:41)
+#loc68 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:31)
+#loc69 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:53)
+#loc70 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:63)
+#loc71 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":57:20)
+#loc72 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":58:20)
+#loc73 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":59:20)
+#loc74 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":60:20)
+#loc75 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":61:20)
+#loc76 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:34)
+#loc77 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:30)
+#loc78 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:25)
+#loc79 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:46)
+#loc80 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:25)
+#loc81 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:46)
+#loc82 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:4)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/5TS244IYEIF4EECWF7IIP4LY7WII7Y4ZJDYZBCSZG4CRQWGLCERQ/triton_poi_fused_add_mul_sub_6.ttir

@@ -0,0 +1,195 @@
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)
+module {
+  tt.func public @triton_poi_fused_add_mul_sub_6(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg3: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg4: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg5: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg6: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg7: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<1024xi64> loc(#loc1)
+    %cst_0 = arith.constant dense<40960> : tensor<1024xi64> loc(#loc1)
+    %cst_1 = arith.constant dense<128> : tensor<1024xi64> loc(#loc1)
+    %cst_2 = arith.constant dense<true> : tensor<1024xi1> loc(#loc1)
+    %cst_3 = arith.constant dense<9.99999997E-7> : tensor<1024xf32> loc(#loc1)
+    %cst_4 = arith.constant dense<1.280000e+02> : tensor<1024xf32> loc(#loc1)
+    %cst_5 = arith.constant dense<5184> : tensor<1024xi32> loc(#loc1)
+    %cst_6 = arith.constant dense<7168> : tensor<1024xi32> loc(#loc1)
+    %cst_7 = arith.constant dense<128> : tensor<1024xi32> loc(#loc1)
+    %cst_8 = arith.constant dense<5120> : tensor<1024xi32> loc(#loc1)
+    %cst_9 = arith.constant dense<512> : tensor<1024xi32> loc(#loc1)
+    %cst_10 = arith.constant dense<8> : tensor<1024xi32> loc(#loc1)
+    %cst_11 = arith.constant dense<64> : tensor<1024xi32> loc(#loc1)
+    %c1024_i32 = arith.constant 1024 : i32 loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c1024_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32> loc(#loc4)
+    %3 = tt.splat %1 : i32 -> tensor<1024xi32> loc(#loc5)
+    %4 = arith.addi %3, %2 : tensor<1024xi32> loc(#loc5)
+    %5 = tt.splat %arg7 : i32 -> tensor<1024xi32> loc(#loc6)
+    %6 = arith.cmpi slt, %4, %5 : tensor<1024xi32> loc(#loc6)
+    %7 = arith.remsi %4, %cst_11 : tensor<1024xi32> loc(#loc7)
+    %8 = arith.divsi %4, %cst_11 : tensor<1024xi32> loc(#loc8)
+    %9 = arith.remsi %8, %cst_10 : tensor<1024xi32> loc(#loc9)
+    %10 = arith.divsi %4, %cst_9 : tensor<1024xi32> loc(#loc10)
+    %11 = arith.addi %7, %cst_8 : tensor<1024xi32> loc(#loc11)
+    %12 = arith.muli %9, %cst_7 : tensor<1024xi32> loc(#loc12)
+    %13 = arith.addi %11, %12 : tensor<1024xi32> loc(#loc13)
+    %14 = arith.muli %10, %cst_6 : tensor<1024xi32> loc(#loc14)
+    %15 = arith.addi %13, %14 : tensor<1024xi32> loc(#loc15)
+    %16 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>> loc(#loc16)
+    %17 = tt.addptr %16, %15 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi32> loc(#loc16)
+    %18 = tt.load %17, %6 : tensor<1024x!tt.ptr<bf16>> loc(#loc17)
+    %19 = arith.extf %18 : tensor<1024xbf16> to tensor<1024xf32> loc(#loc18)
+    %20 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<1024x!tt.ptr<f32>> loc(#loc19)
+    %21 = tt.addptr %20, %8 : tensor<1024x!tt.ptr<f32>>, tensor<1024xi32> loc(#loc19)
+    %22 = tt.load %21, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<f32>> loc(#loc20)
+    %23 = tt.splat %arg2 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>> loc(#loc21)
+    %24 = tt.addptr %23, %7 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi32> loc(#loc21)
+    %25 = tt.load %24, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<bf16>> loc(#loc22)
+    %26 = arith.extf %25 : tensor<1024xbf16> to tensor<1024xf32> loc(#loc23)
+    %27 = tt.splat %arg3 : !tt.ptr<i64> -> tensor<1024x!tt.ptr<i64>> loc(#loc24)
+    %28 = tt.addptr %27, %10 : tensor<1024x!tt.ptr<i64>>, tensor<1024xi32> loc(#loc24)
+    %29 = tt.load %28, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<i64>> loc(#loc25)
+    %30 = arith.addi %7, %cst_5 : tensor<1024xi32> loc(#loc26)
+    %31 = arith.addi %30, %12 : tensor<1024xi32> loc(#loc27)
+    %32 = arith.addi %7, %cst_11 : tensor<1024xi32> loc(#loc28)
+    %33 = arith.divsi %32, %cst_7 : tensor<1024xi32> loc(#loc29)
+    %34 = arith.muli %33, %cst_7 : tensor<1024xi32> loc(#loc30)
+    %35 = arith.addi %31, %34 : tensor<1024xi32> loc(#loc31)
+    %36 = arith.addi %35, %14 : tensor<1024xi32> loc(#loc32)
+    %37 = tt.addptr %16, %36 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi32> loc(#loc33)
+    %38 = tt.load %37, %6 : tensor<1024x!tt.ptr<bf16>> loc(#loc34)
+    %39 = arith.extf %38 : tensor<1024xbf16> to tensor<1024xf32> loc(#loc35)
+    %40 = arith.addi %8, %33 : tensor<1024xi32> loc(#loc36)
+    %41 = tt.addptr %20, %40 : tensor<1024x!tt.ptr<f32>>, tensor<1024xi32> loc(#loc37)
+    %42 = tt.load %41, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<f32>> loc(#loc38)
+    %43 = tt.addptr %23, %32 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi32> loc(#loc39)
+    %44 = tt.load %43, %6 evictionPolicy = evict_last : tensor<1024x!tt.ptr<bf16>> loc(#loc40)
+    %45 = arith.extf %44 : tensor<1024xbf16> to tensor<1024xf32> loc(#loc41)
+    %46 = arith.divf %22, %cst_4 : tensor<1024xf32> loc(#loc42)
+    %47 = arith.addf %46, %cst_3 : tensor<1024xf32> loc(#loc43)
+    %48 = tt.extern_elementwise %47 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<1024xf32>) -> tensor<1024xf32> loc(#loc44)
+    %49 = arith.mulf %19, %48 : tensor<1024xf32> loc(#loc45)
+    %50 = arith.mulf %49, %26 : tensor<1024xf32> loc(#loc46)
+    %51 = arith.addi %29, %cst_0 : tensor<1024xi64> loc(#loc47)
+    %52 = arith.cmpi slt, %29, %cst : tensor<1024xi64> loc(#loc48)
+    %53 = arith.select %52, %51, %29 : tensor<1024xi1>, tensor<1024xi64> loc(#loc49)
+    %54 = arith.cmpi sge, %53, %cst : tensor<1024xi64> loc(#loc50)
+    %55 = arith.cmpi slt, %53, %cst_0 : tensor<1024xi64> loc(#loc51)
+    %56 = arith.andi %54, %55 : tensor<1024xi1> loc(#loc52)
+    %57 = arith.xori %6, %cst_2 : tensor<1024xi1> loc(#loc53)
+    %58 = arith.ori %56, %57 : tensor<1024xi1> loc(#loc54)
+    tt.assert %58, "index out of bounds: 0 <= tmp16 < 40960" : tensor<1024xi1> loc(#loc55)
+    %59 = arith.muli %53, %cst_1 : tensor<1024xi64> loc(#loc56)
+    %60 = arith.extsi %7 : tensor<1024xi32> to tensor<1024xi64> loc(#loc57)
+    %61 = arith.addi %60, %59 : tensor<1024xi64> loc(#loc57)
+    %62 = tt.splat %arg4 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>> loc(#loc58)
+    %63 = tt.addptr %62, %61 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi64> loc(#loc58)
+    %64 = tt.load %63, %6 : tensor<1024x!tt.ptr<bf16>> loc(#loc59)
+    %65 = arith.extf %64 : tensor<1024xbf16> to tensor<1024xf32> loc(#loc60)
+    %66 = arith.mulf %50, %65 : tensor<1024xf32> loc(#loc61)
+    %67 = arith.divf %42, %cst_4 : tensor<1024xf32> loc(#loc62)
+    %68 = arith.addf %67, %cst_3 : tensor<1024xf32> loc(#loc63)
+    %69 = tt.extern_elementwise %68 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<1024xf32>) -> tensor<1024xf32> loc(#loc64)
+    %70 = arith.mulf %39, %69 : tensor<1024xf32> loc(#loc65)
+    %71 = arith.mulf %70, %45 : tensor<1024xf32> loc(#loc66)
+    %72 = arith.extsi %32 : tensor<1024xi32> to tensor<1024xi64> loc(#loc67)
+    %73 = arith.addi %72, %59 : tensor<1024xi64> loc(#loc67)
+    %74 = tt.addptr %62, %73 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi64> loc(#loc68)
+    %75 = tt.load %74, %6 : tensor<1024x!tt.ptr<bf16>> loc(#loc69)
+    %76 = arith.extf %75 : tensor<1024xbf16> to tensor<1024xf32> loc(#loc70)
+    %77 = arith.mulf %71, %76 : tensor<1024xf32> loc(#loc71)
+    %78 = arith.subf %66, %77 : tensor<1024xf32> loc(#loc72)
+    %79 = arith.mulf %71, %65 : tensor<1024xf32> loc(#loc73)
+    %80 = arith.mulf %50, %76 : tensor<1024xf32> loc(#loc74)
+    %81 = arith.addf %79, %80 : tensor<1024xf32> loc(#loc75)
+    %82 = arith.muli %8, %cst_7 : tensor<1024xi32> loc(#loc76)
+    %83 = arith.addi %7, %82 : tensor<1024xi32> loc(#loc77)
+    %84 = tt.splat %arg5 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>> loc(#loc78)
+    %85 = tt.addptr %84, %83 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi32> loc(#loc78)
+    %86 = arith.truncf %78 : tensor<1024xf32> to tensor<1024xbf16> loc(#loc79)
+    tt.store %85, %86, %6 : tensor<1024x!tt.ptr<bf16>> loc(#loc79)
+    %87 = tt.splat %arg6 : !tt.ptr<bf16> -> tensor<1024x!tt.ptr<bf16>> loc(#loc80)
+    %88 = tt.addptr %87, %83 : tensor<1024x!tt.ptr<bf16>>, tensor<1024xi32> loc(#loc80)
+    %89 = arith.truncf %81 : tensor<1024xf32> to tensor<1024xbf16> loc(#loc81)
+    tt.store %88, %89, %6 : tensor<1024x!tt.ptr<bf16>> loc(#loc81)
+    tt.return loc(#loc82)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc(unknown)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:36)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:23)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":21:21)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":22:19)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:21)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:27)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":24:19)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:37)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:46)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:42)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:56)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:51)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:30)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:61)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:71)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:30)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:35)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:31)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:36)
+#loc23 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:76)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:31)
+#loc25 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:36)
+#loc26 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:38)
+#loc27 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:43)
+#loc28 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:63)
+#loc29 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:70)
+#loc30 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:57)
+#loc31 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:52)
+#loc32 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:77)
+#loc33 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:31)
+#loc34 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:87)
+#loc35 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:97)
+#loc36 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:37)
+#loc37 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:31)
+#loc38 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:57)
+#loc39 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:31)
+#loc40 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:41)
+#loc41 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:81)
+#loc42 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":35:19)
+#loc43 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":37:18)
+#loc44 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":38:27)
+#loc45 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":39:18)
+#loc46 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":41:19)
+#loc47 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":43:20)
+#loc48 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":44:20)
+#loc49 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":45:35)
+#loc50 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:28)
+#loc51 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:46)
+#loc52 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:38)
+#loc53 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:58)
+#loc54 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:56)
+#loc55 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:66)
+#loc56 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:40)
+#loc57 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:36)
+#loc58 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:31)
+#loc59 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:48)
+#loc60 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:58)
+#loc61 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":48:20)
+#loc62 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":50:21)
+#loc63 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":51:20)
+#loc64 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":52:28)
+#loc65 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":53:20)
+#loc66 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":55:20)
+#loc67 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:41)
+#loc68 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:31)
+#loc69 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:53)
+#loc70 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:63)
+#loc71 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":57:20)
+#loc72 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":58:20)
+#loc73 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":59:20)
+#loc74 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":60:20)
+#loc75 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":61:20)
+#loc76 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:34)
+#loc77 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:30)
+#loc78 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:25)
+#loc79 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:46)
+#loc80 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:25)
+#loc81 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:46)
+#loc82 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:4)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/7HDVHUPTEOX4FHYEQOTFHD5U573A7K7C62TYWKVZQQZ4QTR7356A/triton_red_fused__to_copy_mean_pow_4.json

@@ -0,0 +1 @@
+{"hash": "f9c753d1f323afc29f0483a6538fb4eff60fabe2f6a78b2ab98433c84e3fdf7c", "target": {"backend": "cuda", "arch": 90, "warp_size": 32}, "num_warps": 8, "num_ctas": 1, "num_stages": 1, "num_buffers_warp_spec": 0, "num_consumer_groups": 0, "reg_dec_producer": 0, "reg_inc_consumer": 0, "maxnreg": null, "cluster_dims": [1, 1, 1], "ptx_version": null, "enable_fp_fusion": true, "launch_cooperative_grid": false, "supported_fp8_dtypes": ["fp8e4b15", "fp8e4nv", "fp8e5"], "deprecated_fp8_dtypes": ["fp8e4b15"], "default_dot_input_precision": "tf32", "allowed_dot_input_precisions": ["tf32", "tf32x3", "ieee"], "max_num_imprecise_acc_default": 1073741824, "extern_libs": [["libdevice", "/home/x/hfenv/lib/python3.12/site-packages/triton/backends/nvidia/lib/libdevice.10.bc"]], "debug": true, "backend_name": "cuda", "sanitize_overflow": false, "arch": "sm90", "triton_version": "3.3.1", "shared": 32, "tmem_size": 0, "global_scratch_size": 0, "global_scratch_align": 1, "name": "triton_red_fused__to_copy_mean_pow_4"}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/7HDVHUPTEOX4FHYEQOTFHD5U573A7K7C62TYWKVZQQZ4QTR7356A/triton_red_fused__to_copy_mean_pow_4.llir

@@ -0,0 +1,143 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@global_smem = external addrspace(3) global [0 x i8], align 16
+
+define ptx_kernel void @triton_red_fused__to_copy_mean_pow_4(ptr addrspace(1) %0, ptr addrspace(1) %1, i32 %2, i32 %3, ptr addrspace(1) readnone captures(none) %4) local_unnamed_addr !dbg !6 {
+  %6 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !9
+  %7 = shl i32 %6, 3, !dbg !10
+  %8 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !11
+  %9 = lshr i32 %8, 5, !dbg !11
+  %10 = and i32 %9, 7, !dbg !11
+  %11 = and i32 %8, 7, !dbg !11
+  %12 = or disjoint i32 %10, %7, !dbg !12
+  %13 = or disjoint i32 %7, %11, !dbg !12
+  %14 = icmp slt i32 %12, %2, !dbg !13
+  %15 = icmp slt i32 %13, %2, !dbg !13
+  %16 = shl i32 %8, 2, !dbg !14
+  %17 = and i32 %16, 124, !dbg !14
+  %18 = sdiv i32 %12, 8, !dbg !15
+  %19 = mul i32 %18, 8, !dbg !16
+  %.decomposed = sub i32 %12, %19, !dbg !16
+  %20 = or disjoint i32 %17, 5120, !dbg !17
+  %21 = shl nsw i32 %.decomposed, 7, !dbg !18
+  %22 = add nsw i32 %20, %21, !dbg !19
+  %23 = mul i32 %18, 7168, !dbg !20
+  %24 = add i32 %22, %23, !dbg !21
+  %25 = sext i32 %24 to i64, !dbg !22
+  %26 = getelementptr bfloat, ptr addrspace(1) %0, i64 %25, !dbg !22
+  %27 = tail call { i32, i32 } asm sideeffect "mov.u32 $0, $2;\0A\09mov.u32 $1, $3;\0A\09@$5 ld.global.L1::evict_first.v2.b32 { $0, $1 }, [ $4 + 0 ];", "=r,=r,r,r,l,b"(i32 0, i32 0, ptr addrspace(1) %26, i1 %14) #3, !dbg !23
+  %28 = extractvalue { i32, i32 } %27, 0, !dbg !23
+  %29 = bitcast i32 %28 to <2 x bfloat>, !dbg !23
+  %30 = extractvalue { i32, i32 } %27, 1, !dbg !23
+  %31 = bitcast i32 %30 to <2 x bfloat>, !dbg !23
+  %32 = extractelement <2 x bfloat> %29, i64 0, !dbg !23
+  %33 = extractelement <2 x bfloat> %29, i64 1, !dbg !23
+  %34 = extractelement <2 x bfloat> %31, i64 0, !dbg !23
+  %35 = extractelement <2 x bfloat> %31, i64 1, !dbg !23
+  %36 = fpext bfloat %32 to float, !dbg !24
+  %37 = fpext bfloat %33 to float, !dbg !24
+  %38 = fpext bfloat %34 to float, !dbg !24
+  %39 = fpext bfloat %35 to float, !dbg !24
+  %40 = fmul float %36, %36, !dbg !25
+  %41 = fmul float %37, %37, !dbg !25
+  %42 = fmul float %38, %38, !dbg !25
+  %43 = fmul float %39, %39, !dbg !25
+  %44 = fadd float %40, %41, !dbg !26
+  %45 = fadd float %42, %44, !dbg !26
+  %46 = fadd float %43, %45, !dbg !26
+  %47 = select i1 %14, float %46, float 0.000000e+00, !dbg !26
+  %48 = bitcast float %47 to i32, !dbg !31
+  %49 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %48, i32 16, i32 31), !dbg !31
+  %50 = bitcast i32 %49 to float, !dbg !31
+  %51 = fadd float %47, %50, !dbg !26
+  %52 = bitcast float %51 to i32, !dbg !31
+  %53 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %52, i32 8, i32 31), !dbg !31
+  %54 = bitcast i32 %53 to float, !dbg !31
+  %55 = fadd float %51, %54, !dbg !26
+  %56 = bitcast float %55 to i32, !dbg !31
+  %57 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %56, i32 4, i32 31), !dbg !31
+  %58 = bitcast i32 %57 to float, !dbg !31
+  %59 = fadd float %55, %58, !dbg !26
+  %60 = bitcast float %59 to i32, !dbg !31
+  %61 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %60, i32 2, i32 31), !dbg !31
+  %62 = bitcast i32 %61 to float, !dbg !31
+  %63 = fadd float %59, %62, !dbg !26
+  %64 = bitcast float %63 to i32, !dbg !31
+  %65 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %64, i32 1, i32 31), !dbg !31
+  %66 = bitcast i32 %65 to float, !dbg !31
+  %67 = fadd float %63, %66, !dbg !26
+  %68 = getelementptr inbounds nuw float, ptr addrspace(3) @global_smem, i32 %10, !dbg !32
+  %69 = bitcast float %67 to <1 x i32>, !dbg !32
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %68, <1 x i32> %69, i1 true) #3, !dbg !32
+  tail call void @llvm.nvvm.barrier0(), !dbg !32
+  %70 = getelementptr inbounds nuw float, ptr addrspace(3) @global_smem, i32 %11, !dbg !32
+  %71 = load i32, ptr addrspace(3) %70, align 4, !dbg !32
+  %72 = sext i32 %13 to i64, !dbg !33
+  %73 = getelementptr float, ptr addrspace(1) %1, i64 %72, !dbg !33
+  %74 = and i32 %8, 248, !dbg !34
+  %75 = icmp eq i32 %74, 0, !dbg !34
+  %76 = and i1 %75, %15, !dbg !34
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %71, ptr addrspace(1) %73, i1 %76) #3, !dbg !34
+  ret void, !dbg !35
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #2
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { nounwind }
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!2}
+!nvvm.annotations = !{!4}
+!llvm.ident = !{!5}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!2 = distinct !DICompileUnit(language: DW_LANG_C, file: !3, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!3 = !DIFile(filename: "ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py", directory: "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty")
+!4 = !{ptr @triton_red_fused__to_copy_mean_pow_4, !"reqntidx", i32 256}
+!5 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!6 = distinct !DISubprogram(name: "triton_red_fused__to_copy_mean_pow_4", linkageName: "triton_red_fused__to_copy_mean_pow_4", scope: !3, file: !3, line: 18, type: !7, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2)
+!7 = !DISubroutineType(cc: DW_CC_normal, types: !8)
+!8 = !{}
+!9 = !DILocation(line: 22, column: 28, scope: !6)
+!10 = !DILocation(line: 22, column: 33, scope: !6)
+!11 = !DILocation(line: 23, column: 44, scope: !6)
+!12 = !DILocation(line: 23, column: 23, scope: !6)
+!13 = !DILocation(line: 24, column: 21, scope: !6)
+!14 = !DILocation(line: 25, column: 37, scope: !6)
+!15 = !DILocation(line: 28, column: 19, scope: !6)
+!16 = !DILocation(line: 27, column: 19, scope: !6)
+!17 = !DILocation(line: 37, column: 41, scope: !6)
+!18 = !DILocation(line: 37, column: 52, scope: !6)
+!19 = !DILocation(line: 37, column: 48, scope: !6)
+!20 = !DILocation(line: 37, column: 62, scope: !6)
+!21 = !DILocation(line: 37, column: 57, scope: !6)
+!22 = !DILocation(line: 37, column: 34, scope: !6)
+!23 = !DILocation(line: 37, column: 67, scope: !6)
+!24 = !DILocation(line: 37, column: 129, scope: !6)
+!25 = !DILocation(line: 39, column: 22, scope: !6)
+!26 = !DILocation(line: 256, column: 15, scope: !27, inlinedAt: !30)
+!27 = distinct !DILexicalBlockFile(scope: !29, file: !28, discriminator: 0)
+!28 = !DIFile(filename: "standard.py", directory: "/home/x/hfenv/lib/python3.12/site-packages/triton/language")
+!29 = distinct !DILexicalBlockFile(scope: !6, file: !28, discriminator: 0)
+!30 = !DILocation(line: 43, column: 25, scope: !6)
+!31 = !DILocation(line: 286, column: 36, scope: !29, inlinedAt: !30)
+!32 = !DILocation(line: 43, column: 28, scope: !6)
+!33 = !DILocation(line: 44, column: 25, scope: !6)
+!34 = !DILocation(line: 44, column: 36, scope: !6)
+!35 = !DILocation(line: 44, column: 4, scope: !6)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/7HDVHUPTEOX4FHYEQOTFHD5U573A7K7C62TYWKVZQQZ4QTR7356A/triton_red_fused__to_copy_mean_pow_4.ptx

@@ -0,0 +1,415 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.4
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_red_fused__to_copy_mean_pow_4 // -- Begin function triton_red_fused__to_copy_mean_pow_4
+.extern .shared .align 16 .b8 global_smem[];
+                                        // @triton_red_fused__to_copy_mean_pow_4
+.visible .entry triton_red_fused__to_copy_mean_pow_4(
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_mean_pow_4_param_0,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_mean_pow_4_param_1,
+	.param .u32 triton_red_fused__to_copy_mean_pow_4_param_2,
+	.param .u32 triton_red_fused__to_copy_mean_pow_4_param_3,
+	.param .u64 .ptr .global .align 1 triton_red_fused__to_copy_mean_pow_4_param_4
+)
+.reqntid 256, 1, 1
+{
+	.reg .pred 	%p<6>;
+	.reg .b16 	%rs<5>;
+	.reg .b32 	%r<43>;
+	.reg .f32 	%f<20>;
+	.reg .b64 	%rd<7>;
+	.loc	1 18 0                          // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:18:0
+
+// %bb.0:
+	ld.param.u64 	%rd3, [triton_red_fused__to_copy_mean_pow_4_param_0];
+	ld.param.u64 	%rd4, [triton_red_fused__to_copy_mean_pow_4_param_1];
+$L__tmp0:
+	.loc	1 22 28                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:22:28
+	mov.u32 	%r8, %ctaid.x;
+	.loc	1 22 33                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:22:33
+	shl.b32 	%r9, %r8, 3;
+	ld.param.u32 	%r10, [triton_red_fused__to_copy_mean_pow_4_param_2];
+	.loc	1 23 44                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:23:44
+	mov.u32 	%r11, %tid.x;
+	bfe.u32 	%r12, %r11, 5, 3;
+	and.b32  	%r13, %r11, 7;
+	.loc	1 23 23                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:23:23
+	or.b32  	%r14, %r12, %r9;
+	or.b32  	%r15, %r9, %r13;
+	.loc	1 24 21                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:24:21
+	setp.lt.s32 	%p1, %r14, %r10;
+	setp.lt.s32 	%p4, %r15, %r10;
+	.loc	1 25 37                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:25:37
+	shl.b32 	%r16, %r11, 2;
+	and.b32  	%r17, %r16, 124;
+	.loc	1 28 19                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:28:19
+	bfe.s32 	%r18, %r8, 28, 1;
+	shr.u32 	%r19, %r18, 29;
+	add.s32 	%r20, %r14, %r19;
+	shr.u32 	%r21, %r20, 3;
+	.loc	1 27 19                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:27:19
+	and.b32  	%r22, %r20, 33554424;
+	sub.s32 	%r23, %r14, %r22;
+	.loc	1 37 52                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:52
+	shl.b32 	%r24, %r23, 7;
+	.loc	1 37 48                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:48
+	or.b32  	%r25, %r24, %r17;
+	mad.lo.s32 	%r26, %r21, 7168, %r25;
+	.loc	1 37 57                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:57
+	add.s32 	%r27, %r26, 5120;
+	.loc	1 37 34                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:34
+	mul.wide.s32 	%rd5, %r27, 2;
+	add.s64 	%rd1, %rd3, %rd5;
+	mov.b32 	%r3, 0;
+	.loc	1 37 67                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:67
+	// begin inline asm
+	mov.u32 %r1, %r3;
+	mov.u32 %r2, %r3;
+	@%p1 ld.global.L1::evict_first.v2.b32 { %r1, %r2 }, [ %rd1 + 0 ];
+	// end inline asm
+	mov.b32 	{%rs1, %rs2}, %r1;
+	mov.b32 	{%rs3, %rs4}, %r2;
+	.loc	1 37 129                        // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:37:129
+	cvt.f32.bf16 	%f1, %rs1;
+	cvt.f32.bf16 	%f2, %rs2;
+	cvt.f32.bf16 	%f3, %rs3;
+	cvt.f32.bf16 	%f4, %rs4;
+	.loc	1 39 22                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:39:22
+	mul.f32 	%f5, %f2, %f2;
+$L__tmp1:
+	.loc	2 256 15                        // standard.py:256:15
+	fma.rn.f32 	%f6, %f1, %f1, %f5;
+	fma.rn.f32 	%f7, %f3, %f3, %f6;
+	fma.rn.f32 	%f8, %f4, %f4, %f7;
+	selp.f32 	%f9, %f8, 0f00000000, %p1;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r28, %f9;
+	shfl.sync.bfly.b32	%r29, %r28, 16, 31, -1;
+	mov.b32 	%f10, %r29;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f11, %f9, %f10;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r30, %f11;
+	shfl.sync.bfly.b32	%r31, %r30, 8, 31, -1;
+	mov.b32 	%f12, %r31;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f13, %f11, %f12;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r32, %f13;
+	shfl.sync.bfly.b32	%r33, %r32, 4, 31, -1;
+	mov.b32 	%f14, %r33;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f15, %f13, %f14;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r34, %f15;
+	shfl.sync.bfly.b32	%r35, %r34, 2, 31, -1;
+	mov.b32 	%f16, %r35;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f17, %f15, %f16;
+	.loc	2 286 36                        // standard.py:286:36
+	mov.b32 	%r36, %f17;
+	shfl.sync.bfly.b32	%r37, %r36, 1, 31, -1;
+	mov.b32 	%f18, %r37;
+	.loc	2 256 15                        // standard.py:256:15
+	add.f32 	%f19, %f17, %f18;
+$L__tmp2:
+	.loc	1 43 28                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:43:28
+	shl.b32 	%r38, %r12, 2;
+	mov.u32 	%r39, global_smem;
+	add.s32 	%r5, %r39, %r38;
+	mov.b32 	%r6, %f19;
+	mov.pred 	%p2, -1;
+	// begin inline asm
+	@%p2 st.shared.b32 [ %r5 + 0 ], %r6;
+	// end inline asm
+	bar.sync 	0;
+	shl.b32 	%r40, %r13, 2;
+	add.s32 	%r41, %r39, %r40;
+	ld.shared.u32 	%r7, [%r41];
+	.loc	1 44 25                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:44:25
+	mul.wide.s32 	%rd6, %r15, 4;
+	add.s64 	%rd2, %rd4, %rd6;
+	.loc	1 44 36                         // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:44:36
+	and.b32  	%r42, %r11, 248;
+	setp.eq.s32 	%p5, %r42, 0;
+	and.pred  	%p3, %p5, %p4;
+	// begin inline asm
+	@%p3 st.global.b32 [ %rd2 + 0 ], { %r7 };
+	// end inline asm
+	.loc	1 44 4                          // ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py:44:4
+	ret;
+$L__tmp3:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py"
+	.file	2 "/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 1                                   // DW_CHILDREN_yes
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 2                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 0                                   // DW_CHILDREN_no
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 32                                  // DW_AT_inline
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 3                                   // Abbreviation Code
+.b8 46                                  // DW_TAG_subprogram
+.b8 1                                   // DW_CHILDREN_yes
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 4                                   // Abbreviation Code
+.b8 29                                  // DW_TAG_inlined_subroutine
+.b8 0                                   // DW_CHILDREN_no
+.b8 49                                  // DW_AT_abstract_origin
+.b8 19                                  // DW_FORM_ref4
+.b8 17                                  // DW_AT_low_pc
+.b8 1                                   // DW_FORM_addr
+.b8 18                                  // DW_AT_high_pc
+.b8 1                                   // DW_FORM_addr
+.b8 88                                  // DW_AT_call_file
+.b8 11                                  // DW_FORM_data1
+.b8 89                                  // DW_AT_call_line
+.b8 11                                  // DW_FORM_data1
+.b8 87                                  // DW_AT_call_column
+.b8 11                                  // DW_FORM_data1
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 241                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0xea DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 116
+.b8 121
+.b8 100
+.b8 106
+.b8 97
+.b8 55
+.b8 107
+.b8 116
+.b8 114
+.b8 101
+.b8 119
+.b8 120
+.b8 113
+.b8 101
+.b8 104
+.b8 107
+.b8 105
+.b8 122
+.b8 106
+.b8 105
+.b8 55
+.b8 113
+.b8 122
+.b8 105
+.b8 52
+.b8 119
+.b8 122
+.b8 113
+.b8 107
+.b8 106
+.b8 99
+.b8 115
+.b8 119
+.b8 106
+.b8 107
+.b8 113
+.b8 110
+.b8 120
+.b8 97
+.b8 108
+.b8 102
+.b8 101
+.b8 121
+.b8 51
+.b8 109
+.b8 111
+.b8 104
+.b8 103
+.b8 103
+.b8 111
+.b8 116
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 104
+.b8 111
+.b8 109
+.b8 101
+.b8 47
+.b8 120
+.b8 47
+.b8 46
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 118
+.b8 108
+.b8 108
+.b8 109
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 95
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 57
+.b8 48
+.b8 98
+.b8 52
+.b8 53
+.b8 98
+.b8 99
+.b8 101
+.b8 48
+.b8 50
+.b8 47
+.b8 114
+.b8 97
+.b8 110
+.b8 107
+.b8 95
+.b8 48
+.b8 95
+.b8 48
+.b8 47
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 116
+.b8 121
+.b8 0
+.b8 2                                   // Abbrev [2] 0x9f:0x27 DW_TAG_subprogram
+.b8 116                                 // DW_AT_name
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 114
+.b8 101
+.b8 100
+.b8 95
+.b8 102
+.b8 117
+.b8 115
+.b8 101
+.b8 100
+.b8 95
+.b8 95
+.b8 116
+.b8 111
+.b8 95
+.b8 99
+.b8 111
+.b8 112
+.b8 121
+.b8 95
+.b8 109
+.b8 101
+.b8 97
+.b8 110
+.b8 95
+.b8 112
+.b8 111
+.b8 119
+.b8 95
+.b8 52
+.b8 0
+.b8 1                                   // DW_AT_inline
+.b8 3                                   // Abbrev [3] 0xc6:0x2e DW_TAG_subprogram
+.b64 $L__func_begin0                    // DW_AT_low_pc
+.b64 $L__func_end0                      // DW_AT_high_pc
+.b32 159                                // DW_AT_abstract_origin
+.b8 4                                   // Abbrev [4] 0xdb:0x18 DW_TAG_inlined_subroutine
+.b32 159                                // DW_AT_abstract_origin
+.b64 $L__tmp1                           // DW_AT_low_pc
+.b64 $L__tmp2                           // DW_AT_high_pc
+.b8 1                                   // DW_AT_call_file
+.b8 43                                  // DW_AT_call_line
+.b8 25                                  // DW_AT_call_column
+.b8 0                                   // End Of Children Mark
+.b8 0                                   // End Of Children Mark
+	}
+	.section	.debug_macinfo	{	}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/7HDVHUPTEOX4FHYEQOTFHD5U573A7K7C62TYWKVZQQZ4QTR7356A/triton_red_fused__to_copy_mean_pow_4.ttgir

@@ -0,0 +1,96 @@
+#blocked = #ttg.blocked<{sizePerThread = [1, 4], threadsPerWarp = [1, 32], warpsPerCTA = [8, 1], order = [1, 0]}>
+#blocked1 = #ttg.blocked<{sizePerThread = [1, 1], threadsPerWarp = [8, 4], warpsPerCTA = [1, 8], order = [0, 1]}>
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0)
+#loc1 = loc(unknown)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":43:25)
+#loc31 = loc(callsite(#loc1 at #loc24))
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 8 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_red_fused__to_copy_mean_pow_4(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg2: i32 loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0), %arg3: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<8x128xf32, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<8x128xbf16, #blocked> loc(#loc1)
+    %c8_i32 = arith.constant 8 : i32 loc(#loc1)
+    %cst_1 = arith.constant dense<8> : tensor<8x1xi32, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<7168> : tensor<8x1xi32, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<128> : tensor<8x1xi32, #blocked> loc(#loc1)
+    %cst_4 = arith.constant dense<5120> : tensor<1x128xi32, #blocked> loc(#loc1)
+    %cst_5 = arith.constant dense<128> : tensor<1x128xi32, #blocked> loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c8_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 8 : i32, start = 0 : i32} : tensor<8xi32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc4)
+    %3 = tt.make_range {end = 8 : i32, start = 0 : i32} : tensor<8xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc4)
+    %4 = tt.expand_dims %2 {axis = 1 : i32} : tensor<8xi32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<8x1xi32, #blocked> loc(#loc4)
+    %5 = tt.expand_dims %3 {axis = 1 : i32} : tensor<8xi32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<8x1xi32, #blocked1> loc(#loc4)
+    %6 = tt.splat %1 : i32 -> tensor<8x1xi32, #blocked> loc(#loc5)
+    %7 = tt.splat %1 : i32 -> tensor<8x1xi32, #blocked1> loc(#loc5)
+    %8 = arith.addi %6, %4 : tensor<8x1xi32, #blocked> loc(#loc5)
+    %9 = arith.addi %7, %5 : tensor<8x1xi32, #blocked1> loc(#loc5)
+    %10 = tt.splat %arg2 : i32 -> tensor<8x1xi32, #blocked> loc(#loc6)
+    %11 = tt.splat %arg2 : i32 -> tensor<8x1xi32, #blocked1> loc(#loc6)
+    %12 = arith.cmpi slt, %8, %10 : tensor<8x1xi32, #blocked> loc(#loc6)
+    %13 = arith.cmpi slt, %9, %11 : tensor<8x1xi32, #blocked1> loc(#loc6)
+    %14 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 0, parent = #blocked}>> loc(#loc7)
+    %15 = tt.expand_dims %14 {axis = 0 : i32} : tensor<128xi32, #ttg.slice<{dim = 0, parent = #blocked}>> -> tensor<1x128xi32, #blocked> loc(#loc7)
+    %16 = arith.remsi %8, %cst_1 : tensor<8x1xi32, #blocked> loc(#loc8)
+    %17 = arith.divsi %8, %cst_1 : tensor<8x1xi32, #blocked> loc(#loc9)
+    %18 = arith.cmpi slt, %15, %cst_5 : tensor<1x128xi32, #blocked> loc(#loc10)
+    %19 = arith.addi %15, %cst_4 : tensor<1x128xi32, #blocked> loc(#loc11)
+    %20 = arith.muli %16, %cst_3 : tensor<8x1xi32, #blocked> loc(#loc12)
+    %21 = tt.broadcast %19 : tensor<1x128xi32, #blocked> -> tensor<8x128xi32, #blocked> loc(#loc13)
+    %22 = tt.broadcast %20 : tensor<8x1xi32, #blocked> -> tensor<8x128xi32, #blocked> loc(#loc13)
+    %23 = arith.addi %21, %22 : tensor<8x128xi32, #blocked> loc(#loc13)
+    %24 = arith.muli %17, %cst_2 : tensor<8x1xi32, #blocked> loc(#loc14)
+    %25 = tt.broadcast %24 : tensor<8x1xi32, #blocked> -> tensor<8x128xi32, #blocked> loc(#loc15)
+    %26 = arith.addi %23, %25 : tensor<8x128xi32, #blocked> loc(#loc15)
+    %27 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<8x128x!tt.ptr<bf16>, #blocked> loc(#loc16)
+    %28 = tt.addptr %27, %26 : tensor<8x128x!tt.ptr<bf16>, #blocked>, tensor<8x128xi32, #blocked> loc(#loc16)
+    %29 = tt.broadcast %18 : tensor<1x128xi1, #blocked> -> tensor<8x128xi1, #blocked> loc(#loc17)
+    %30 = tt.broadcast %12 : tensor<8x1xi1, #blocked> -> tensor<8x128xi1, #blocked> loc(#loc17)
+    %31 = arith.andi %29, %30 : tensor<8x128xi1, #blocked> loc(#loc17)
+    %32 = tt.load %28, %31, %cst_0 evictionPolicy = evict_first : tensor<8x128x!tt.ptr<bf16>, #blocked> loc(#loc18)
+    %33 = arith.extf %32 : tensor<8x128xbf16, #blocked> to tensor<8x128xf32, #blocked> loc(#loc19)
+    %34 = arith.mulf %33, %33 : tensor<8x128xf32, #blocked> loc(#loc20)
+    %35 = arith.addf %34, %cst : tensor<8x128xf32, #blocked> loc(#loc21)
+    %36 = arith.select %31, %35, %cst : tensor<8x128xi1, #blocked>, tensor<8x128xf32, #blocked> loc(#loc22)
+    %37 = "tt.reduce"(%36) <{axis = 1 : i32}> ({
+    ^bb0(%arg4: f32 loc(callsite(#loc1 at #loc24)), %arg5: f32 loc(callsite(#loc1 at #loc24))):
+      %42 = arith.addf %arg4, %arg5 : f32 loc(#loc33)
+      tt.reduce.return %42 : f32 loc(#loc30)
+    }) : (tensor<8x128xf32, #blocked>) -> tensor<8xf32, #ttg.slice<{dim = 1, parent = #blocked}>> loc(#loc30)
+    %38 = ttg.convert_layout %37 : tensor<8xf32, #ttg.slice<{dim = 1, parent = #blocked}>> -> tensor<8xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> loc(#loc26)
+    %39 = tt.expand_dims %38 {axis = 1 : i32} : tensor<8xf32, #ttg.slice<{dim = 1, parent = #blocked1}>> -> tensor<8x1xf32, #blocked1> loc(#loc26)
+    %40 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<8x1x!tt.ptr<f32>, #blocked1> loc(#loc27)
+    %41 = tt.addptr %40, %9 : tensor<8x1x!tt.ptr<f32>, #blocked1>, tensor<8x1xi32, #blocked1> loc(#loc27)
+    tt.store %41, %39, %13 : tensor<8x1x!tt.ptr<f32>, #blocked1> loc(#loc28)
+    tt.return loc(#loc29)
+  } loc(#loc)
+} loc(#loc)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":22:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":22:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:44)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":23:23)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":24:21)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":25:37)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":27:19)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":28:19)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":33:29)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:41)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:52)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:48)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:62)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:57)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:34)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:77)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:67)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":37:129)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":39:22)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":41:23)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":42:48)
+#loc23 = loc("/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py":286:36)
+#loc25 = loc("/home/x/hfenv/lib/python3.12/site-packages/triton/language/standard.py":256:15)
+#loc26 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":43:28)
+#loc27 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:25)
+#loc28 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:36)
+#loc29 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/ty/ctydja7ktrewxqehkizji7qzi4wzqkjcswjkqnxalfey3mohggot.py":44:4)
+#loc30 = loc(callsite(#loc23 at #loc24))
+#loc32 = loc(callsite(#loc25 at #loc23))
+#loc33 = loc(callsite(#loc32 at #loc24))

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/__grp__triton_poi_fused_add_mul_sub_6.json

@@ -0,0 +1 @@
+{"child_paths": {"triton_poi_fused_add_mul_sub_6.ttir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.ttir", "triton_poi_fused_add_mul_sub_6.ttgir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.ttgir", "triton_poi_fused_add_mul_sub_6.llir": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.llir", "triton_poi_fused_add_mul_sub_6.ptx": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.ptx", "triton_poi_fused_add_mul_sub_6.cubin": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.cubin", "triton_poi_fused_add_mul_sub_6.json": "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.json"}}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.llir

@@ -0,0 +1,301 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+target datalayout = "e-p3:32:32-p4:32:32-p5:32:32-p6:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64"
+
+@assertFunc_0 = internal constant [8 x i8] c"unknown\00"
+@assertFile_0 = internal constant [134 x i8] c"/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py\00"
+@assertMessage_0 = internal constant [40 x i8] c"index out of bounds: 0 <= tmp16 < 40960\00"
+@.str = private unnamed_addr constant [11 x i8] c"__CUDA_FTZ\00", align 1
+
+; Function Attrs: noreturn
+declare !dbg !6 void @__assertfail(ptr, ptr, i32, ptr, i64) local_unnamed_addr #0
+
+define ptx_kernel void @triton_poi_fused_add_mul_sub_6(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, ptr addrspace(1) %5, ptr addrspace(1) %6, i32 %7, ptr addrspace(1) readnone captures(none) %8) local_unnamed_addr !dbg !10 {
+  %10 = tail call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !11
+  %11 = shl i32 %10, 9, !dbg !12
+  %12 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !13
+  %13 = shl i32 %12, 1, !dbg !13
+  %14 = and i32 %13, 510, !dbg !13
+  %15 = or disjoint i32 %14, %11, !dbg !14
+  %16 = or disjoint i32 %15, 1, !dbg !14
+  %17 = icmp slt i32 %15, %7, !dbg !15
+  %18 = sdiv i32 %15, 64, !dbg !16
+  %19 = mul i32 %18, 64, !dbg !17
+  %.decomposed = sub i32 %15, %19, !dbg !17
+  %20 = srem i32 %16, 64, !dbg !17
+  %21 = srem i32 %18, 8, !dbg !18
+  %22 = sdiv i32 %15, 512, !dbg !19
+  %23 = shl nsw i32 %21, 7, !dbg !20
+  %24 = mul i32 %22, 7168, !dbg !21
+  %25 = add i32 %23, %24, !dbg !22
+  %26 = add i32 %25, 5120, !dbg !23
+  %27 = add i32 %26, %.decomposed, !dbg !24
+  %28 = sext i32 %27 to i64, !dbg !25
+  %29 = getelementptr bfloat, ptr addrspace(1) %0, i64 %28, !dbg !25
+  %30 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %29, i1 %17) #5, !dbg !26
+  %31 = sext i32 %18 to i64, !dbg !27
+  %32 = getelementptr float, ptr addrspace(1) %1, i64 %31, !dbg !27
+  %33 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %32, i1 %17) #5, !dbg !28
+  %34 = bitcast i32 %33 to float, !dbg !28
+  %35 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %32, i1 %17) #5, !dbg !28
+  %36 = bitcast i32 %35 to float, !dbg !28
+  %37 = sext i32 %.decomposed to i64, !dbg !29
+  %38 = getelementptr bfloat, ptr addrspace(1) %2, i64 %37, !dbg !29
+  %39 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %38, i1 %17) #5, !dbg !30
+  %40 = sext i32 %22 to i64, !dbg !31
+  %41 = getelementptr i64, ptr addrspace(1) %3, i64 %40, !dbg !31
+  %42 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %41, i1 %17) #5, !dbg !32
+  %43 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %41, i1 %17) #5, !dbg !32
+  %44 = add nsw i32 %.decomposed, 64, !dbg !33
+  %45 = add i32 %25, 5184, !dbg !34
+  %46 = add nsw i32 %45, %.decomposed, !dbg !35
+  %47 = add nsw i32 %45, %20, !dbg !35
+  %48 = sext i32 %46 to i64, !dbg !36
+  %49 = getelementptr bfloat, ptr addrspace(1) %0, i64 %48, !dbg !36
+  %50 = sext i32 %47 to i64, !dbg !36
+  %51 = getelementptr bfloat, ptr addrspace(1) %0, i64 %50, !dbg !36
+  %52 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.b16 { $0 }, [ $1 + 0 ];", "=c,l,b"(ptr addrspace(1) %49, i1 %17) #5, !dbg !37
+  %53 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.b16 { $0 }, [ $1 + 0 ];", "=c,l,b"(ptr addrspace(1) %51, i1 %17) #5, !dbg !37
+  %54 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %32, i1 %17) #5, !dbg !38
+  %55 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %32, i1 %17) #5, !dbg !38
+  %56 = zext nneg i32 %44 to i64, !dbg !39
+  %57 = getelementptr bfloat, ptr addrspace(1) %2, i64 %56, !dbg !39
+  %58 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %57, i1 %17) #5, !dbg !40
+  %59 = tail call float @llvm.nvvm.div.full(float %34, float 1.280000e+02), !dbg !41
+  %60 = tail call float @llvm.nvvm.div.full(float %36, float 1.280000e+02), !dbg !41
+  %61 = fadd float %59, 0x3EB0C6F7A0000000, !dbg !42
+  %62 = fadd float %60, 0x3EB0C6F7A0000000, !dbg !42
+  %63 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !43
+  %.not.i = icmp eq i32 %63, 0, !dbg !43
+  br i1 %.not.i, label %66, label %64, !dbg !43
+
+64:                                               ; preds = %9
+  %65 = tail call float @llvm.nvvm.rsqrt.approx.ftz.f(float %61), !dbg !43
+  br label %__nv_rsqrtf.exit, !dbg !43
+
+66:                                               ; preds = %9
+  %67 = tail call float @llvm.nvvm.rsqrt.approx.f(float %61), !dbg !43
+  br label %__nv_rsqrtf.exit, !dbg !43
+
+__nv_rsqrtf.exit:                                 ; preds = %64, %66
+  %.0.i = phi float [ %65, %64 ], [ %67, %66 ], !dbg !43
+  %68 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !43
+  %.not.i2 = icmp eq i32 %68, 0, !dbg !43
+  br i1 %.not.i2, label %71, label %69, !dbg !43
+
+69:                                               ; preds = %__nv_rsqrtf.exit
+  %70 = tail call float @llvm.nvvm.rsqrt.approx.ftz.f(float %62), !dbg !43
+  br label %__nv_rsqrtf.exit4, !dbg !43
+
+71:                                               ; preds = %__nv_rsqrtf.exit
+  %72 = tail call float @llvm.nvvm.rsqrt.approx.f(float %62), !dbg !43
+  br label %__nv_rsqrtf.exit4, !dbg !43
+
+__nv_rsqrtf.exit4:                                ; preds = %69, %71
+  %.0.i3 = phi float [ %70, %69 ], [ %72, %71 ], !dbg !43
+  %73 = add i64 %42, 40960, !dbg !44
+  %74 = icmp slt i64 %42, 0, !dbg !45
+  %75 = select i1 %74, i64 %73, i64 %42, !dbg !46
+  %76 = icmp ugt i64 %75, 40959, !dbg !47
+  %.not1 = and i1 %17, %76, !dbg !48
+  br i1 %.not1, label %77, label %78, !dbg !48
+
+77:                                               ; preds = %__nv_rsqrtf.exit4
+  tail call void @__assertfail(ptr nonnull @assertMessage_0, ptr nonnull @assertFile_0, i32 46, ptr nonnull @assertFunc_0, i64 1), !dbg !48
+  unreachable, !dbg !48
+
+78:                                               ; preds = %__nv_rsqrtf.exit4
+  %79 = bitcast i32 %55 to float, !dbg !38
+  %80 = bitcast i32 %54 to float, !dbg !38
+  tail call void @llvm.nvvm.barrier0(), !dbg !48
+  %.idx = shl i64 %75, 8, !dbg !49
+  %81 = getelementptr i8, ptr addrspace(1) %4, i64 %.idx, !dbg !49
+  %82 = getelementptr bfloat, ptr addrspace(1) %81, i64 %37, !dbg !49
+  %83 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %82, i1 %17) #5, !dbg !50
+  %84 = tail call float @llvm.nvvm.div.full(float %80, float 1.280000e+02), !dbg !51
+  %85 = tail call float @llvm.nvvm.div.full(float %79, float 1.280000e+02), !dbg !51
+  %86 = fadd float %84, 0x3EB0C6F7A0000000, !dbg !52
+  %87 = fadd float %85, 0x3EB0C6F7A0000000, !dbg !52
+  %88 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !53
+  %.not.i5 = icmp eq i32 %88, 0, !dbg !53
+  br i1 %.not.i5, label %91, label %89, !dbg !53
+
+89:                                               ; preds = %78
+  %90 = tail call float @llvm.nvvm.rsqrt.approx.ftz.f(float %86), !dbg !53
+  br label %__nv_rsqrtf.exit7, !dbg !53
+
+91:                                               ; preds = %78
+  %92 = tail call float @llvm.nvvm.rsqrt.approx.f(float %86), !dbg !53
+  br label %__nv_rsqrtf.exit7, !dbg !53
+
+__nv_rsqrtf.exit7:                                ; preds = %89, %91
+  %.0.i6 = phi float [ %90, %89 ], [ %92, %91 ], !dbg !53
+  %93 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !53
+  %.not.i8 = icmp eq i32 %93, 0, !dbg !53
+  br i1 %.not.i8, label %96, label %94, !dbg !53
+
+94:                                               ; preds = %__nv_rsqrtf.exit7
+  %95 = tail call float @llvm.nvvm.rsqrt.approx.ftz.f(float %87), !dbg !53
+  br label %__nv_rsqrtf.exit10, !dbg !53
+
+96:                                               ; preds = %__nv_rsqrtf.exit7
+  %97 = tail call float @llvm.nvvm.rsqrt.approx.f(float %87), !dbg !53
+  br label %__nv_rsqrtf.exit10, !dbg !53
+
+__nv_rsqrtf.exit10:                               ; preds = %94, %96
+  %.0.i9 = phi float [ %95, %94 ], [ %97, %96 ], !dbg !53
+  %98 = bitcast i32 %30 to <2 x bfloat>, !dbg !26
+  %99 = bitcast i32 %39 to <2 x bfloat>, !dbg !30
+  %100 = bitcast i32 %83 to <2 x bfloat>, !dbg !50
+  %101 = insertelement <2 x i16> poison, i16 %52, i64 0, !dbg !37
+  %102 = insertelement <2 x i16> %101, i16 %53, i64 1, !dbg !37
+  %103 = bitcast <2 x i16> %102 to <2 x bfloat>, !dbg !37
+  %104 = bitcast i32 %58 to <2 x bfloat>, !dbg !40
+  %105 = getelementptr bfloat, ptr addrspace(1) %81, i64 %56, !dbg !54
+  %106 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %105, i1 %17) #5, !dbg !55
+  %107 = bitcast i32 %106 to <2 x bfloat>, !dbg !55
+  %108 = shl i32 %18, 7, !dbg !56
+  %109 = add i32 %108, %.decomposed, !dbg !57
+  %110 = sext i32 %109 to i64, !dbg !58
+  %111 = getelementptr bfloat, ptr addrspace(1) %5, i64 %110, !dbg !58
+  %112 = fpext <2 x bfloat> %98 to <2 x float>, !dbg !59
+  %113 = insertelement <2 x float> poison, float %.0.i, i64 0, !dbg !60
+  %114 = insertelement <2 x float> %113, float %.0.i3, i64 1, !dbg !60
+  %115 = fmul <2 x float> %114, %112, !dbg !60
+  %116 = fpext <2 x bfloat> %99 to <2 x float>, !dbg !61
+  %117 = fmul <2 x float> %115, %116, !dbg !62
+  %118 = fpext <2 x bfloat> %100 to <2 x float>, !dbg !63
+  %119 = fmul <2 x float> %117, %118, !dbg !64
+  %120 = fpext <2 x bfloat> %103 to <2 x float>, !dbg !65
+  %121 = fpext <2 x bfloat> %104 to <2 x float>, !dbg !66
+  %122 = insertelement <2 x float> poison, float %.0.i6, i64 0, !dbg !67
+  %123 = insertelement <2 x float> %122, float %.0.i9, i64 1, !dbg !67
+  %124 = fmul <2 x float> %123, %120, !dbg !67
+  %125 = fmul <2 x float> %124, %121, !dbg !68
+  %126 = fpext <2 x bfloat> %107 to <2 x float>, !dbg !69
+  %127 = fmul <2 x float> %125, %126, !dbg !70
+  %128 = fsub <2 x float> %119, %127, !dbg !71
+  %129 = fptrunc <2 x float> %128 to <2 x bfloat>, !dbg !72
+  %130 = bitcast <2 x bfloat> %129 to i32, !dbg !72
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %130, ptr addrspace(1) %111, i1 %17) #5, !dbg !72
+  %131 = getelementptr bfloat, ptr addrspace(1) %6, i64 %110, !dbg !73
+  %132 = fmul <2 x float> %125, %118, !dbg !74
+  %133 = fmul <2 x float> %117, %126, !dbg !75
+  %134 = fadd <2 x float> %132, %133, !dbg !76
+  %135 = fptrunc <2 x float> %134 to <2 x bfloat>, !dbg !77
+  %136 = bitcast <2 x bfloat> %135 to i32, !dbg !77
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %136, ptr addrspace(1) %131, i1 %17) #5, !dbg !77
+  ret void, !dbg !78
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.div.full(float, float) #2
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #3
+
+declare i32 @__nvvm_reflect(ptr) local_unnamed_addr #4
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.rsqrt.approx.ftz.f(float) #2
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.rsqrt.approx.f(float) #2
+
+attributes #0 = { noreturn }
+attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
+attributes #3 = { convergent nocallback nounwind }
+attributes #4 = { "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #5 = { nounwind }
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!2}
+!nvvm.annotations = !{!4}
+!llvm.ident = !{!5}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!2 = distinct !DICompileUnit(language: DW_LANG_C, file: !3, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: LineTablesOnly)
+!3 = !DIFile(filename: "cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py", directory: "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz")
+!4 = !{ptr @triton_poi_fused_add_mul_sub_6, !"reqntidx", i32 256}
+!5 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!6 = !DISubprogram(name: "__assertfail", linkageName: "__assertfail", scope: !7, file: !7, type: !8, spFlags: DISPFlagOptimized)
+!7 = !DIFile(filename: "<unknown>", directory: "")
+!8 = !DISubroutineType(cc: DW_CC_normal, types: !9)
+!9 = !{}
+!10 = distinct !DISubprogram(name: "triton_poi_fused_add_mul_sub_6", linkageName: "triton_poi_fused_add_mul_sub_6", scope: !3, file: !3, line: 18, type: !8, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2)
+!11 = !DILocation(line: 19, column: 28, scope: !10)
+!12 = !DILocation(line: 19, column: 33, scope: !10)
+!13 = !DILocation(line: 20, column: 36, scope: !10)
+!14 = !DILocation(line: 20, column: 23, scope: !10)
+!15 = !DILocation(line: 21, column: 21, scope: !10)
+!16 = !DILocation(line: 23, column: 21, scope: !10)
+!17 = !DILocation(line: 22, column: 19, scope: !10)
+!18 = !DILocation(line: 23, column: 27, scope: !10)
+!19 = !DILocation(line: 24, column: 19, scope: !10)
+!20 = !DILocation(line: 26, column: 46, scope: !10)
+!21 = !DILocation(line: 26, column: 56, scope: !10)
+!22 = !DILocation(line: 26, column: 37, scope: !10)
+!23 = !DILocation(line: 26, column: 42, scope: !10)
+!24 = !DILocation(line: 26, column: 51, scope: !10)
+!25 = !DILocation(line: 26, column: 30, scope: !10)
+!26 = !DILocation(line: 26, column: 61, scope: !10)
+!27 = !DILocation(line: 27, column: 30, scope: !10)
+!28 = !DILocation(line: 27, column: 35, scope: !10)
+!29 = !DILocation(line: 28, column: 31, scope: !10)
+!30 = !DILocation(line: 28, column: 36, scope: !10)
+!31 = !DILocation(line: 29, column: 31, scope: !10)
+!32 = !DILocation(line: 29, column: 36, scope: !10)
+!33 = !DILocation(line: 30, column: 63, scope: !10)
+!34 = !DILocation(line: 30, column: 43, scope: !10)
+!35 = !DILocation(line: 30, column: 77, scope: !10)
+!36 = !DILocation(line: 30, column: 31, scope: !10)
+!37 = !DILocation(line: 30, column: 87, scope: !10)
+!38 = !DILocation(line: 31, column: 57, scope: !10)
+!39 = !DILocation(line: 32, column: 31, scope: !10)
+!40 = !DILocation(line: 32, column: 41, scope: !10)
+!41 = !DILocation(line: 35, column: 19, scope: !10)
+!42 = !DILocation(line: 37, column: 18, scope: !10)
+!43 = !DILocation(line: 38, column: 27, scope: !10)
+!44 = !DILocation(line: 43, column: 20, scope: !10)
+!45 = !DILocation(line: 44, column: 20, scope: !10)
+!46 = !DILocation(line: 45, column: 35, scope: !10)
+!47 = !DILocation(line: 46, column: 38, scope: !10)
+!48 = !DILocation(line: 46, column: 66, scope: !10)
+!49 = !DILocation(line: 47, column: 31, scope: !10)
+!50 = !DILocation(line: 47, column: 48, scope: !10)
+!51 = !DILocation(line: 50, column: 21, scope: !10)
+!52 = !DILocation(line: 51, column: 20, scope: !10)
+!53 = !DILocation(line: 52, column: 28, scope: !10)
+!54 = !DILocation(line: 56, column: 31, scope: !10)
+!55 = !DILocation(line: 56, column: 53, scope: !10)
+!56 = !DILocation(line: 62, column: 34, scope: !10)
+!57 = !DILocation(line: 62, column: 30, scope: !10)
+!58 = !DILocation(line: 62, column: 25, scope: !10)
+!59 = !DILocation(line: 26, column: 71, scope: !10)
+!60 = !DILocation(line: 39, column: 18, scope: !10)
+!61 = !DILocation(line: 28, column: 76, scope: !10)
+!62 = !DILocation(line: 41, column: 19, scope: !10)
+!63 = !DILocation(line: 47, column: 58, scope: !10)
+!64 = !DILocation(line: 48, column: 20, scope: !10)
+!65 = !DILocation(line: 30, column: 97, scope: !10)
+!66 = !DILocation(line: 32, column: 81, scope: !10)
+!67 = !DILocation(line: 53, column: 20, scope: !10)
+!68 = !DILocation(line: 55, column: 20, scope: !10)
+!69 = !DILocation(line: 56, column: 63, scope: !10)
+!70 = !DILocation(line: 57, column: 20, scope: !10)
+!71 = !DILocation(line: 58, column: 20, scope: !10)
+!72 = !DILocation(line: 62, column: 46, scope: !10)
+!73 = !DILocation(line: 63, column: 25, scope: !10)
+!74 = !DILocation(line: 59, column: 20, scope: !10)
+!75 = !DILocation(line: 60, column: 20, scope: !10)
+!76 = !DILocation(line: 61, column: 20, scope: !10)
+!77 = !DILocation(line: 63, column: 46, scope: !10)
+!78 = !DILocation(line: 63, column: 4, scope: !10)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.ptx

@@ -0,0 +1,516 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.4
+.target sm_90a
+.address_size 64
+
+	// .globl	triton_poi_fused_add_mul_sub_6 // -- Begin function triton_poi_fused_add_mul_sub_6
+.extern .func __assertfail
+(
+	.param .b64 __assertfail_param_0,
+	.param .b64 __assertfail_param_1,
+	.param .b32 __assertfail_param_2,
+	.param .b64 __assertfail_param_3,
+	.param .b64 __assertfail_param_4
+)
+.noreturn;
+.global .align 1 .b8 assertFunc_0[8] = {117, 110, 107, 110, 111, 119, 110};
+.global .align 1 .b8 assertFile_0[134] = {47, 104, 111, 109, 101, 47, 120, 47, 46, 99, 97, 99, 104, 101, 47, 118, 108, 108, 109, 47, 116, 111, 114, 99, 104, 95, 99, 111, 109, 112, 105, 108, 101, 95, 99, 97, 99, 104, 101, 47, 57, 48, 98, 52, 53, 98, 99, 101, 48, 50, 47, 114, 97, 110, 107, 95, 48, 95, 48, 47, 105, 110, 100, 117, 99, 116, 111, 114, 95, 99, 97, 99, 104, 101, 47, 110, 122, 47, 99, 110, 122, 120, 102, 112, 115, 105, 99, 107, 50, 55, 54, 107, 101, 107, 109, 55, 116, 102, 111, 119, 55, 98, 108, 119, 52, 52, 113, 117, 54, 100, 54, 104, 118, 115, 101, 120, 55, 105, 99, 104, 117, 116, 101, 51, 106, 116, 119, 109, 51, 97, 46, 112, 121};
+.global .align 1 .b8 assertMessage_0[40] = {105, 110, 100, 101, 120, 32, 111, 117, 116, 32, 111, 102, 32, 98, 111, 117, 110, 100, 115, 58, 32, 48, 32, 60, 61, 32, 116, 109, 112, 49, 54, 32, 60, 32, 52, 48, 57, 54, 48};
+.global .align 1 .b8 _$_str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90};
+                                        // @triton_poi_fused_add_mul_sub_6
+.visible .entry triton_poi_fused_add_mul_sub_6(
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_0,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_1,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_2,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_3,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_4,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_5,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_6,
+	.param .u32 triton_poi_fused_add_mul_sub_6_param_7,
+	.param .u64 .ptr .global .align 1 triton_poi_fused_add_mul_sub_6_param_8
+)
+.reqntid 256, 1, 1
+{
+	.reg .pred 	%p<20>;
+	.reg .b16 	%rs<17>;
+	.reg .b32 	%r<53>;
+	.reg .f32 	%f<49>;
+	.reg .b64 	%rd<47>;
+	.loc	1 18 0                          // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:18:0
+$L__func_begin0:
+	.loc	1 18 0                          // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:18:0
+
+// %bb.0:                               // %__nv_rsqrtf.exit
+	ld.param.u32 	%r8, [triton_poi_fused_add_mul_sub_6_param_7];
+	ld.param.u64 	%rd20, [triton_poi_fused_add_mul_sub_6_param_0];
+	ld.param.u64 	%rd21, [triton_poi_fused_add_mul_sub_6_param_1];
+$L__tmp0:
+	.loc	1 19 28                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:19:28
+	mov.u32 	%r16, %ctaid.x;
+	.loc	1 19 33                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:19:33
+	shl.b32 	%r17, %r16, 9;
+	ld.param.u64 	%rd22, [triton_poi_fused_add_mul_sub_6_param_2];
+	ld.param.u64 	%rd23, [triton_poi_fused_add_mul_sub_6_param_3];
+	.loc	1 20 36                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:20:36
+	mov.u32 	%r18, %tid.x;
+	shl.b32 	%r19, %r18, 1;
+	and.b32  	%r20, %r19, 510;
+	.loc	1 20 23                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:20:23
+	or.b32  	%r1, %r20, %r17;
+	or.b32  	%r21, %r1, 1;
+	.loc	1 21 21                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:21:21
+	setp.ge.s32 	%p12, %r1, %r8;
+	setp.lt.s32 	%p11, %r1, %r8;
+	.loc	1 23 21                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:23:21
+	bfe.s32 	%r22, %r16, 22, 1;
+	.loc	1 22 19                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:22:19
+	shr.u32 	%r23, %r22, 26;
+	.loc	1 23 21                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:23:21
+	add.s32 	%r24, %r1, %r23;
+	shr.s32 	%r2, %r24, 6;
+	.loc	1 22 19                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:22:19
+	and.b32  	%r25, %r24, -64;
+	sub.s32 	%r26, %r1, %r25;
+	add.s32 	%r27, %r21, %r23;
+	and.b32  	%r28, %r27, -64;
+	sub.s32 	%r29, %r21, %r28;
+	.loc	1 23 27                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:23:27
+	shr.u32 	%r30, %r2, 29;
+	add.s32 	%r31, %r2, %r30;
+	and.b32  	%r32, %r31, 33554424;
+	sub.s32 	%r33, %r2, %r32;
+	.loc	1 24 19                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:24:19
+	shr.u32 	%r34, %r22, 23;
+	add.s32 	%r35, %r1, %r34;
+	shr.s32 	%r36, %r35, 9;
+	.loc	1 26 46                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:46
+	shl.b32 	%r37, %r33, 7;
+	.loc	1 26 37                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:37
+	mad.lo.s32 	%r38, %r36, 7168, %r37;
+	.loc	1 26 42                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:42
+	add.s32 	%r39, %r38, %r26;
+	.loc	1 26 51                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:51
+	add.s32 	%r40, %r39, 5120;
+	.loc	1 26 30                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:30
+	mul.wide.s32 	%rd24, %r40, 2;
+	add.s64 	%rd7, %rd20, %rd24;
+	.loc	1 26 61                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:61
+	// begin inline asm
+	mov.u32 %r9, 0x0;
+	@%p11 ld.global.b32 { %r9 }, [ %rd7 + 0 ];
+	// end inline asm
+	.loc	1 27 30                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:27:30
+	mul.wide.s32 	%rd25, %r2, 4;
+	add.s64 	%rd8, %rd21, %rd25;
+	.loc	1 27 35                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:27:35
+	// begin inline asm
+	mov.u32 %r10, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r10 }, [ %rd8 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r11, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r11 }, [ %rd8 + 0 ];
+	// end inline asm
+	.loc	1 28 31                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:28:31
+	mul.wide.s32 	%rd26, %r26, 2;
+	add.s64 	%rd10, %rd22, %rd26;
+	.loc	1 28 36                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:28:36
+	// begin inline asm
+	mov.u32 %r12, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r12 }, [ %rd10 + 0 ];
+	// end inline asm
+	.loc	1 29 31                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:29:31
+	mul.wide.s32 	%rd27, %r36, 8;
+	add.s64 	%rd12, %rd23, %rd27;
+	.loc	1 29 36                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:29:36
+	// begin inline asm
+	mov.u64 %rd11, 0x0;
+	@%p11 ld.global.L1::evict_last.b64 { %rd11 }, [ %rd12 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u64 %rd13, 0x0;
+	@%p11 ld.global.L1::evict_last.b64 { %rd13 }, [ %rd12 + 0 ];
+	// end inline asm
+	.loc	1 30 63                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:63
+	add.s32 	%r41, %r26, 64;
+	.loc	1 30 43                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:43
+	add.s32 	%r42, %r38, 5184;
+	.loc	1 30 77                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:77
+	add.s32 	%r43, %r42, %r26;
+	add.s32 	%r44, %r42, %r29;
+	.loc	1 30 31                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:31
+	mul.wide.s32 	%rd28, %r43, 2;
+	add.s64 	%rd15, %rd20, %rd28;
+	mul.wide.s32 	%rd29, %r44, 2;
+	add.s64 	%rd16, %rd20, %rd29;
+	.loc	1 30 87                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:87
+	// begin inline asm
+	mov.u16 %rs3, 0x0;
+	@%p11 ld.global.b16 { %rs3 }, [ %rd15 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u16 %rs4, 0x0;
+	@%p11 ld.global.b16 { %rs4 }, [ %rd16 + 0 ];
+	// end inline asm
+	.loc	1 31 57                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:31:57
+	// begin inline asm
+	mov.u32 %r13, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r13 }, [ %rd8 + 0 ];
+	// end inline asm
+	// begin inline asm
+	mov.u32 %r14, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r14 }, [ %rd8 + 0 ];
+	// end inline asm
+	.loc	1 32 31                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:32:31
+	mul.wide.u32 	%rd30, %r41, 2;
+	add.s64 	%rd19, %rd22, %rd30;
+	.loc	1 32 41                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:32:41
+	// begin inline asm
+	mov.u32 %r15, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r15 }, [ %rd19 + 0 ];
+	// end inline asm
+	.loc	1 43 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:43:20
+	add.s64 	%rd31, %rd11, 40960;
+	.loc	1 44 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:44:20
+	setp.lt.s64 	%p13, %rd11, 0;
+	.loc	1 45 35                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:45:35
+	selp.b64 	%rd3, %rd31, %rd11, %p13;
+	.loc	1 46 38                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:46:38
+	setp.lt.u64 	%p14, %rd3, 40960;
+	.loc	1 46 66                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:46:66
+	or.pred  	%p15, %p12, %p14;
+	@%p15 bra 	$L__BB0_2;
+	bra.uni 	$L__BB0_1;
+$L__BB0_2:                              // %__nv_rsqrtf.exit7
+	.loc	1 0 66                          // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:0:66
+	ld.param.u64 	%rd6, [triton_poi_fused_add_mul_sub_6_param_6];
+	ld.param.u64 	%rd5, [triton_poi_fused_add_mul_sub_6_param_5];
+	ld.param.u64 	%rd4, [triton_poi_fused_add_mul_sub_6_param_4];
+	mov.b32 	%f3, %r10;
+	mov.b32 	%f4, %r11;
+	cvt.s64.s32 	%rd1, %r26;
+	cvt.u64.u32 	%rd2, %r41;
+	mov.f32 	%f5, 0f43000000;
+	div.full.f32 	%f6, %f3, %f5;
+	div.full.f32 	%f7, %f4, %f5;
+	add.f32 	%f8, %f6, 0f358637BD;
+	add.f32 	%f9, %f7, 0f358637BD;
+	rsqrt.approx.ftz.f32 	%f1, %f8;
+	rsqrt.approx.ftz.f32 	%f2, %f9;
+	cvt.u32.u64 	%r49, %rd1;
+	.loc	1 31 57                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:31:57
+	mov.b32 	%f10, %r14;
+	mov.b32 	%f11, %r13;
+	.loc	1 46 66                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:46:66
+	bar.sync 	0;
+	.loc	1 47 31                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:47:31
+	shl.b64 	%rd36, %rd3, 8;
+	add.s64 	%rd37, %rd4, %rd36;
+	shl.b64 	%rd38, %rd1, 1;
+	add.s64 	%rd32, %rd37, %rd38;
+	.loc	1 47 48                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:47:48
+	// begin inline asm
+	mov.u32 %r45, 0x0;
+	@%p11 ld.global.b32 { %r45 }, [ %rd32 + 0 ];
+	// end inline asm
+	.loc	1 50 21                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:50:21
+	div.full.f32 	%f13, %f11, %f5;
+	div.full.f32 	%f14, %f10, %f5;
+	.loc	1 51 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:51:20
+	add.f32 	%f15, %f13, 0f358637BD;
+	add.f32 	%f16, %f14, 0f358637BD;
+	.loc	1 52 28                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:52:28
+	rsqrt.approx.ftz.f32 	%f17, %f15;
+	rsqrt.approx.ftz.f32 	%f18, %f16;
+	.loc	1 30 87                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:87
+	mov.b32 	%r50, {%rs3, %rs4};
+	.loc	1 56 31                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:56:31
+	shl.b64 	%rd39, %rd2, 1;
+	add.s64 	%rd33, %rd37, %rd39;
+	.loc	1 56 53                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:56:53
+	// begin inline asm
+	mov.u32 %r46, 0x0;
+	@%p11 ld.global.b32 { %r46 }, [ %rd33 + 0 ];
+	// end inline asm
+	.loc	1 62 34                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:62:34
+	shl.b32 	%r51, %r2, 7;
+	.loc	1 62 30                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:62:30
+	add.s32 	%r52, %r51, %r49;
+	.loc	1 62 25                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:62:25
+	mul.wide.s32 	%rd40, %r52, 2;
+	add.s64 	%rd34, %rd5, %rd40;
+	.loc	1 26 71                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:26:71
+	mov.b32 	{%rs5, %rs6}, %r9;
+	cvt.f32.bf16 	%f19, %rs6;
+	cvt.f32.bf16 	%f20, %rs5;
+	.loc	1 39 18                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:39:18
+	mul.f32 	%f21, %f1, %f20;
+	mul.f32 	%f22, %f2, %f19;
+	.loc	1 28 76                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:28:76
+	mov.b32 	{%rs7, %rs8}, %r12;
+	cvt.f32.bf16 	%f23, %rs7;
+	cvt.f32.bf16 	%f24, %rs8;
+	.loc	1 41 19                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:41:19
+	mul.f32 	%f25, %f22, %f24;
+	mul.f32 	%f26, %f21, %f23;
+	.loc	1 47 58                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:47:58
+	mov.b32 	{%rs9, %rs10}, %r45;
+	cvt.f32.bf16 	%f27, %rs10;
+	cvt.f32.bf16 	%f28, %rs9;
+	.loc	1 30 97                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:30:97
+	mov.b32 	{%rs11, %rs12}, %r50;
+	cvt.f32.bf16 	%f29, %rs11;
+	cvt.f32.bf16 	%f30, %rs12;
+	.loc	1 32 81                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:32:81
+	mov.b32 	{%rs13, %rs14}, %r15;
+	cvt.f32.bf16 	%f31, %rs14;
+	cvt.f32.bf16 	%f32, %rs13;
+	.loc	1 53 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:53:20
+	mul.f32 	%f33, %f18, %f30;
+	mul.f32 	%f34, %f17, %f29;
+	.loc	1 55 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:55:20
+	mul.f32 	%f35, %f34, %f32;
+	mul.f32 	%f36, %f33, %f31;
+	.loc	1 56 63                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:56:63
+	mov.b32 	{%rs15, %rs16}, %r46;
+	cvt.f32.bf16 	%f37, %rs15;
+	cvt.f32.bf16 	%f38, %rs16;
+	.loc	1 57 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:57:20
+	mul.f32 	%f39, %f36, %f38;
+	mul.f32 	%f40, %f35, %f37;
+	.loc	1 58 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:58:20
+	neg.f32 	%f41, %f40;
+	fma.rn.f32 	%f42, %f26, %f28, %f41;
+	neg.f32 	%f43, %f39;
+	fma.rn.f32 	%f44, %f25, %f27, %f43;
+	.loc	1 62 46                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:62:46
+	cvt.rn.bf16x2.f32 	%r47, %f44, %f42;
+	// begin inline asm
+	@%p11 st.global.b32 [ %rd34 + 0 ], { %r47 };
+	// end inline asm
+	.loc	1 63 25                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:63:25
+	add.s64 	%rd35, %rd6, %rd40;
+	.loc	1 60 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:60:20
+	mul.f32 	%f45, %f25, %f38;
+	mul.f32 	%f46, %f26, %f37;
+	.loc	1 61 20                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:61:20
+	fma.rn.f32 	%f47, %f35, %f28, %f46;
+	fma.rn.f32 	%f48, %f36, %f27, %f45;
+	.loc	1 63 46                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:63:46
+	cvt.rn.bf16x2.f32 	%r48, %f48, %f47;
+	// begin inline asm
+	@%p11 st.global.b32 [ %rd35 + 0 ], { %r48 };
+	// end inline asm
+	.loc	1 63 4                          // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:63:4
+	ret;
+$L__BB0_1:
+	.loc	1 46 66                         // cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py:46:66
+	mov.u64 	%rd41, assertMessage_0;
+	cvta.global.u64 	%rd42, %rd41;
+	mov.u64 	%rd43, assertFile_0;
+	cvta.global.u64 	%rd44, %rd43;
+	mov.u64 	%rd45, assertFunc_0;
+	cvta.global.u64 	%rd46, %rd45;
+	{ // callseq 8, 0
+	.param .b64 param0;
+	st.param.b64 	[param0], %rd42;
+	.param .b64 param1;
+	st.param.b64 	[param1], %rd44;
+	.param .b32 param2;
+	st.param.b32 	[param2], 46;
+	.param .b64 param3;
+	st.param.b64 	[param3], %rd46;
+	.param .b64 param4;
+	st.param.b64 	[param4], 1;
+	call.uni 
+	__assertfail, 
+	(
+	param0, 
+	param1, 
+	param2, 
+	param3, 
+	param4
+	);
+	} // callseq 8
+	trap;
+$L__tmp1:
+$L__func_end0:
+                                        // -- End function
+}
+	.file	1 "/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py"
+	.section	.debug_abbrev
+	{
+.b8 1                                   // Abbreviation Code
+.b8 17                                  // DW_TAG_compile_unit
+.b8 0                                   // DW_CHILDREN_no
+.b8 37                                  // DW_AT_producer
+.b8 8                                   // DW_FORM_string
+.b8 19                                  // DW_AT_language
+.b8 5                                   // DW_FORM_data2
+.b8 3                                   // DW_AT_name
+.b8 8                                   // DW_FORM_string
+.b8 16                                  // DW_AT_stmt_list
+.b8 6                                   // DW_FORM_data4
+.b8 27                                  // DW_AT_comp_dir
+.b8 8                                   // DW_FORM_string
+.b8 0                                   // EOM(1)
+.b8 0                                   // EOM(2)
+.b8 0                                   // EOM(3)
+	}
+	.section	.debug_info
+	{
+.b32 155                                // Length of Unit
+.b8 2                                   // DWARF version number
+.b8 0
+.b32 .debug_abbrev                      // Offset Into Abbrev. Section
+.b8 8                                   // Address Size (in bytes)
+.b8 1                                   // Abbrev [1] 0xb:0x94 DW_TAG_compile_unit
+.b8 116                                 // DW_AT_producer
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2                                   // DW_AT_language
+.b8 0
+.b8 99                                  // DW_AT_name
+.b8 110
+.b8 122
+.b8 120
+.b8 102
+.b8 112
+.b8 115
+.b8 105
+.b8 99
+.b8 107
+.b8 50
+.b8 55
+.b8 54
+.b8 107
+.b8 101
+.b8 107
+.b8 109
+.b8 55
+.b8 116
+.b8 102
+.b8 111
+.b8 119
+.b8 55
+.b8 98
+.b8 108
+.b8 119
+.b8 52
+.b8 52
+.b8 113
+.b8 117
+.b8 54
+.b8 100
+.b8 54
+.b8 104
+.b8 118
+.b8 115
+.b8 101
+.b8 120
+.b8 55
+.b8 105
+.b8 99
+.b8 104
+.b8 117
+.b8 116
+.b8 101
+.b8 51
+.b8 106
+.b8 116
+.b8 119
+.b8 109
+.b8 51
+.b8 97
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line                        // DW_AT_stmt_list
+.b8 47                                  // DW_AT_comp_dir
+.b8 104
+.b8 111
+.b8 109
+.b8 101
+.b8 47
+.b8 120
+.b8 47
+.b8 46
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 118
+.b8 108
+.b8 108
+.b8 109
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 95
+.b8 99
+.b8 111
+.b8 109
+.b8 112
+.b8 105
+.b8 108
+.b8 101
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 57
+.b8 48
+.b8 98
+.b8 52
+.b8 53
+.b8 98
+.b8 99
+.b8 101
+.b8 48
+.b8 50
+.b8 47
+.b8 114
+.b8 97
+.b8 110
+.b8 107
+.b8 95
+.b8 48
+.b8 95
+.b8 48
+.b8 47
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 99
+.b8 97
+.b8 99
+.b8 104
+.b8 101
+.b8 47
+.b8 110
+.b8 122
+.b8 0
+	}
+	.section	.debug_macinfo	{	}

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.ttgir

@@ -0,0 +1,196 @@
+#blocked = #ttg.blocked<{sizePerThread = [2], threadsPerWarp = [32], warpsPerCTA = [8], order = [0]}>
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)
+module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 8 : i32, ttg.target = "cuda:90", "ttg.threads-per-warp" = 32 : i32} {
+  tt.func public @triton_poi_fused_add_mul_sub_6(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg3: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg4: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg5: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg6: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg7: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<1.280000e+02> : tensor<512xf32, #blocked> loc(#loc1)
+    %cst_0 = arith.constant dense<9.99999997E-7> : tensor<512xf32, #blocked> loc(#loc1)
+    %cst_1 = arith.constant dense<128> : tensor<512xi64, #blocked> loc(#loc1)
+    %cst_2 = arith.constant dense<40960> : tensor<512xi64, #blocked> loc(#loc1)
+    %cst_3 = arith.constant dense<0> : tensor<512xi64, #blocked> loc(#loc1)
+    %c512_i32 = arith.constant 512 : i32 loc(#loc1)
+    %cst_4 = arith.constant dense<64> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_5 = arith.constant dense<8> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_6 = arith.constant dense<512> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_7 = arith.constant dense<5120> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_8 = arith.constant dense<128> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_9 = arith.constant dense<7168> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_10 = arith.constant dense<5184> : tensor<512xi32, #blocked> loc(#loc1)
+    %cst_11 = arith.constant dense<true> : tensor<512xi1, #blocked> loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c512_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32, #blocked> loc(#loc4)
+    %3 = tt.splat %1 : i32 -> tensor<512xi32, #blocked> loc(#loc5)
+    %4 = arith.addi %3, %2 : tensor<512xi32, #blocked> loc(#loc5)
+    %5 = tt.splat %arg7 : i32 -> tensor<512xi32, #blocked> loc(#loc6)
+    %6 = arith.cmpi slt, %4, %5 : tensor<512xi32, #blocked> loc(#loc6)
+    %7 = arith.remsi %4, %cst_4 : tensor<512xi32, #blocked> loc(#loc7)
+    %8 = arith.divsi %4, %cst_4 : tensor<512xi32, #blocked> loc(#loc8)
+    %9 = arith.remsi %8, %cst_5 : tensor<512xi32, #blocked> loc(#loc9)
+    %10 = arith.divsi %4, %cst_6 : tensor<512xi32, #blocked> loc(#loc10)
+    %11 = arith.addi %7, %cst_7 : tensor<512xi32, #blocked> loc(#loc11)
+    %12 = arith.muli %9, %cst_8 : tensor<512xi32, #blocked> loc(#loc12)
+    %13 = arith.addi %11, %12 : tensor<512xi32, #blocked> loc(#loc13)
+    %14 = arith.muli %10, %cst_9 : tensor<512xi32, #blocked> loc(#loc14)
+    %15 = arith.addi %13, %14 : tensor<512xi32, #blocked> loc(#loc15)
+    %16 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc16)
+    %17 = tt.addptr %16, %15 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi32, #blocked> loc(#loc16)
+    %18 = tt.load %17, %6 : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc17)
+    %19 = arith.extf %18 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked> loc(#loc18)
+    %20 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<512x!tt.ptr<f32>, #blocked> loc(#loc19)
+    %21 = tt.addptr %20, %8 : tensor<512x!tt.ptr<f32>, #blocked>, tensor<512xi32, #blocked> loc(#loc19)
+    %22 = tt.load %21, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<f32>, #blocked> loc(#loc20)
+    %23 = tt.splat %arg2 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc21)
+    %24 = tt.addptr %23, %7 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi32, #blocked> loc(#loc21)
+    %25 = tt.load %24, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc22)
+    %26 = arith.extf %25 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked> loc(#loc23)
+    %27 = tt.splat %arg3 : !tt.ptr<i64> -> tensor<512x!tt.ptr<i64>, #blocked> loc(#loc24)
+    %28 = tt.addptr %27, %10 : tensor<512x!tt.ptr<i64>, #blocked>, tensor<512xi32, #blocked> loc(#loc24)
+    %29 = tt.load %28, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<i64>, #blocked> loc(#loc25)
+    %30 = arith.addi %7, %cst_10 : tensor<512xi32, #blocked> loc(#loc26)
+    %31 = arith.addi %30, %12 : tensor<512xi32, #blocked> loc(#loc27)
+    %32 = arith.addi %7, %cst_4 : tensor<512xi32, #blocked> loc(#loc28)
+    %33 = arith.divsi %32, %cst_8 : tensor<512xi32, #blocked> loc(#loc29)
+    %34 = arith.muli %33, %cst_8 : tensor<512xi32, #blocked> loc(#loc30)
+    %35 = arith.addi %31, %34 : tensor<512xi32, #blocked> loc(#loc31)
+    %36 = arith.addi %35, %14 : tensor<512xi32, #blocked> loc(#loc32)
+    %37 = tt.addptr %16, %36 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi32, #blocked> loc(#loc33)
+    %38 = tt.load %37, %6 : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc34)
+    %39 = arith.extf %38 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked> loc(#loc35)
+    %40 = arith.addi %8, %33 : tensor<512xi32, #blocked> loc(#loc36)
+    %41 = tt.addptr %20, %40 : tensor<512x!tt.ptr<f32>, #blocked>, tensor<512xi32, #blocked> loc(#loc37)
+    %42 = tt.load %41, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<f32>, #blocked> loc(#loc38)
+    %43 = tt.addptr %23, %32 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi32, #blocked> loc(#loc39)
+    %44 = tt.load %43, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc40)
+    %45 = arith.extf %44 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked> loc(#loc41)
+    %46 = arith.divf %22, %cst : tensor<512xf32, #blocked> loc(#loc42)
+    %47 = arith.addf %46, %cst_0 : tensor<512xf32, #blocked> loc(#loc43)
+    %48 = tt.extern_elementwise %47 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<512xf32, #blocked>) -> tensor<512xf32, #blocked> loc(#loc44)
+    %49 = arith.mulf %19, %48 : tensor<512xf32, #blocked> loc(#loc45)
+    %50 = arith.mulf %49, %26 : tensor<512xf32, #blocked> loc(#loc46)
+    %51 = arith.addi %29, %cst_2 : tensor<512xi64, #blocked> loc(#loc47)
+    %52 = arith.cmpi slt, %29, %cst_3 : tensor<512xi64, #blocked> loc(#loc48)
+    %53 = arith.select %52, %51, %29 : tensor<512xi1, #blocked>, tensor<512xi64, #blocked> loc(#loc49)
+    %54 = arith.cmpi sge, %53, %cst_3 : tensor<512xi64, #blocked> loc(#loc50)
+    %55 = arith.cmpi slt, %53, %cst_2 : tensor<512xi64, #blocked> loc(#loc51)
+    %56 = arith.andi %54, %55 : tensor<512xi1, #blocked> loc(#loc52)
+    %57 = arith.xori %6, %cst_11 : tensor<512xi1, #blocked> loc(#loc53)
+    %58 = arith.ori %56, %57 : tensor<512xi1, #blocked> loc(#loc54)
+    tt.assert %58, "index out of bounds: 0 <= tmp16 < 40960" : tensor<512xi1, #blocked> loc(#loc55)
+    %59 = arith.muli %53, %cst_1 : tensor<512xi64, #blocked> loc(#loc56)
+    %60 = arith.extsi %7 : tensor<512xi32, #blocked> to tensor<512xi64, #blocked> loc(#loc57)
+    %61 = arith.addi %60, %59 : tensor<512xi64, #blocked> loc(#loc57)
+    %62 = tt.splat %arg4 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc58)
+    %63 = tt.addptr %62, %61 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi64, #blocked> loc(#loc58)
+    %64 = tt.load %63, %6 : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc59)
+    %65 = arith.extf %64 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked> loc(#loc60)
+    %66 = arith.mulf %50, %65 : tensor<512xf32, #blocked> loc(#loc61)
+    %67 = arith.divf %42, %cst : tensor<512xf32, #blocked> loc(#loc62)
+    %68 = arith.addf %67, %cst_0 : tensor<512xf32, #blocked> loc(#loc63)
+    %69 = tt.extern_elementwise %68 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<512xf32, #blocked>) -> tensor<512xf32, #blocked> loc(#loc64)
+    %70 = arith.mulf %39, %69 : tensor<512xf32, #blocked> loc(#loc65)
+    %71 = arith.mulf %70, %45 : tensor<512xf32, #blocked> loc(#loc66)
+    %72 = arith.extsi %32 : tensor<512xi32, #blocked> to tensor<512xi64, #blocked> loc(#loc67)
+    %73 = arith.addi %72, %59 : tensor<512xi64, #blocked> loc(#loc67)
+    %74 = tt.addptr %62, %73 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi64, #blocked> loc(#loc68)
+    %75 = tt.load %74, %6 : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc69)
+    %76 = arith.extf %75 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked> loc(#loc70)
+    %77 = arith.mulf %71, %76 : tensor<512xf32, #blocked> loc(#loc71)
+    %78 = arith.subf %66, %77 : tensor<512xf32, #blocked> loc(#loc72)
+    %79 = arith.mulf %71, %65 : tensor<512xf32, #blocked> loc(#loc73)
+    %80 = arith.mulf %50, %76 : tensor<512xf32, #blocked> loc(#loc74)
+    %81 = arith.addf %79, %80 : tensor<512xf32, #blocked> loc(#loc75)
+    %82 = arith.muli %8, %cst_8 : tensor<512xi32, #blocked> loc(#loc76)
+    %83 = arith.addi %7, %82 : tensor<512xi32, #blocked> loc(#loc77)
+    %84 = tt.splat %arg5 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc78)
+    %85 = tt.addptr %84, %83 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi32, #blocked> loc(#loc78)
+    %86 = arith.truncf %78 : tensor<512xf32, #blocked> to tensor<512xbf16, #blocked> loc(#loc79)
+    tt.store %85, %86, %6 : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc79)
+    %87 = tt.splat %arg6 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc80)
+    %88 = tt.addptr %87, %83 : tensor<512x!tt.ptr<bf16>, #blocked>, tensor<512xi32, #blocked> loc(#loc80)
+    %89 = arith.truncf %81 : tensor<512xf32, #blocked> to tensor<512xbf16, #blocked> loc(#loc81)
+    tt.store %88, %89, %6 : tensor<512x!tt.ptr<bf16>, #blocked> loc(#loc81)
+    tt.return loc(#loc82)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc(unknown)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:36)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:23)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":21:21)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":22:19)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:21)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:27)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":24:19)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:37)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:46)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:42)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:56)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:51)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:30)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:61)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:71)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:30)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:35)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:31)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:36)
+#loc23 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:76)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:31)
+#loc25 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:36)
+#loc26 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:38)
+#loc27 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:43)
+#loc28 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:63)
+#loc29 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:70)
+#loc30 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:57)
+#loc31 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:52)
+#loc32 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:77)
+#loc33 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:31)
+#loc34 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:87)
+#loc35 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:97)
+#loc36 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:37)
+#loc37 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:31)
+#loc38 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:57)
+#loc39 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:31)
+#loc40 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:41)
+#loc41 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:81)
+#loc42 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":35:19)
+#loc43 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":37:18)
+#loc44 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":38:27)
+#loc45 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":39:18)
+#loc46 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":41:19)
+#loc47 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":43:20)
+#loc48 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":44:20)
+#loc49 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":45:35)
+#loc50 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:28)
+#loc51 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:46)
+#loc52 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:38)
+#loc53 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:58)
+#loc54 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:56)
+#loc55 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:66)
+#loc56 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:40)
+#loc57 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:36)
+#loc58 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:31)
+#loc59 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:48)
+#loc60 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:58)
+#loc61 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":48:20)
+#loc62 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":50:21)
+#loc63 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":51:20)
+#loc64 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":52:28)
+#loc65 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":53:20)
+#loc66 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":55:20)
+#loc67 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:41)
+#loc68 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:31)
+#loc69 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:53)
+#loc70 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:63)
+#loc71 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":57:20)
+#loc72 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":58:20)
+#loc73 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":59:20)
+#loc74 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":60:20)
+#loc75 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":61:20)
+#loc76 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:34)
+#loc77 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:30)
+#loc78 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:25)
+#loc79 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:46)
+#loc80 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:25)
+#loc81 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:46)
+#loc82 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:4)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/CUASPVXQ7OI3JPFN55O2D57GL57SRLSB6LBTAARTQDPYHVXGYBSA/triton_poi_fused_add_mul_sub_6.ttir

@@ -0,0 +1,195 @@
+#loc = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)
+module {
+  tt.func public @triton_poi_fused_add_mul_sub_6(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg1: !tt.ptr<f32> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg3: !tt.ptr<i64> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg4: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg5: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg6: !tt.ptr<bf16> {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0), %arg7: i32 {tt.divisibility = 16 : i32} loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":18:0)) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<512xi64> loc(#loc1)
+    %cst_0 = arith.constant dense<40960> : tensor<512xi64> loc(#loc1)
+    %cst_1 = arith.constant dense<128> : tensor<512xi64> loc(#loc1)
+    %cst_2 = arith.constant dense<true> : tensor<512xi1> loc(#loc1)
+    %cst_3 = arith.constant dense<9.99999997E-7> : tensor<512xf32> loc(#loc1)
+    %cst_4 = arith.constant dense<1.280000e+02> : tensor<512xf32> loc(#loc1)
+    %cst_5 = arith.constant dense<5184> : tensor<512xi32> loc(#loc1)
+    %cst_6 = arith.constant dense<7168> : tensor<512xi32> loc(#loc1)
+    %cst_7 = arith.constant dense<128> : tensor<512xi32> loc(#loc1)
+    %cst_8 = arith.constant dense<5120> : tensor<512xi32> loc(#loc1)
+    %cst_9 = arith.constant dense<512> : tensor<512xi32> loc(#loc1)
+    %cst_10 = arith.constant dense<8> : tensor<512xi32> loc(#loc1)
+    %cst_11 = arith.constant dense<64> : tensor<512xi32> loc(#loc1)
+    %c512_i32 = arith.constant 512 : i32 loc(#loc1)
+    %0 = tt.get_program_id x : i32 loc(#loc2)
+    %1 = arith.muli %0, %c512_i32 : i32 loc(#loc3)
+    %2 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32> loc(#loc4)
+    %3 = tt.splat %1 : i32 -> tensor<512xi32> loc(#loc5)
+    %4 = arith.addi %3, %2 : tensor<512xi32> loc(#loc5)
+    %5 = tt.splat %arg7 : i32 -> tensor<512xi32> loc(#loc6)
+    %6 = arith.cmpi slt, %4, %5 : tensor<512xi32> loc(#loc6)
+    %7 = arith.remsi %4, %cst_11 : tensor<512xi32> loc(#loc7)
+    %8 = arith.divsi %4, %cst_11 : tensor<512xi32> loc(#loc8)
+    %9 = arith.remsi %8, %cst_10 : tensor<512xi32> loc(#loc9)
+    %10 = arith.divsi %4, %cst_9 : tensor<512xi32> loc(#loc10)
+    %11 = arith.addi %7, %cst_8 : tensor<512xi32> loc(#loc11)
+    %12 = arith.muli %9, %cst_7 : tensor<512xi32> loc(#loc12)
+    %13 = arith.addi %11, %12 : tensor<512xi32> loc(#loc13)
+    %14 = arith.muli %10, %cst_6 : tensor<512xi32> loc(#loc14)
+    %15 = arith.addi %13, %14 : tensor<512xi32> loc(#loc15)
+    %16 = tt.splat %arg0 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>> loc(#loc16)
+    %17 = tt.addptr %16, %15 : tensor<512x!tt.ptr<bf16>>, tensor<512xi32> loc(#loc16)
+    %18 = tt.load %17, %6 : tensor<512x!tt.ptr<bf16>> loc(#loc17)
+    %19 = arith.extf %18 : tensor<512xbf16> to tensor<512xf32> loc(#loc18)
+    %20 = tt.splat %arg1 : !tt.ptr<f32> -> tensor<512x!tt.ptr<f32>> loc(#loc19)
+    %21 = tt.addptr %20, %8 : tensor<512x!tt.ptr<f32>>, tensor<512xi32> loc(#loc19)
+    %22 = tt.load %21, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<f32>> loc(#loc20)
+    %23 = tt.splat %arg2 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>> loc(#loc21)
+    %24 = tt.addptr %23, %7 : tensor<512x!tt.ptr<bf16>>, tensor<512xi32> loc(#loc21)
+    %25 = tt.load %24, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<bf16>> loc(#loc22)
+    %26 = arith.extf %25 : tensor<512xbf16> to tensor<512xf32> loc(#loc23)
+    %27 = tt.splat %arg3 : !tt.ptr<i64> -> tensor<512x!tt.ptr<i64>> loc(#loc24)
+    %28 = tt.addptr %27, %10 : tensor<512x!tt.ptr<i64>>, tensor<512xi32> loc(#loc24)
+    %29 = tt.load %28, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<i64>> loc(#loc25)
+    %30 = arith.addi %7, %cst_5 : tensor<512xi32> loc(#loc26)
+    %31 = arith.addi %30, %12 : tensor<512xi32> loc(#loc27)
+    %32 = arith.addi %7, %cst_11 : tensor<512xi32> loc(#loc28)
+    %33 = arith.divsi %32, %cst_7 : tensor<512xi32> loc(#loc29)
+    %34 = arith.muli %33, %cst_7 : tensor<512xi32> loc(#loc30)
+    %35 = arith.addi %31, %34 : tensor<512xi32> loc(#loc31)
+    %36 = arith.addi %35, %14 : tensor<512xi32> loc(#loc32)
+    %37 = tt.addptr %16, %36 : tensor<512x!tt.ptr<bf16>>, tensor<512xi32> loc(#loc33)
+    %38 = tt.load %37, %6 : tensor<512x!tt.ptr<bf16>> loc(#loc34)
+    %39 = arith.extf %38 : tensor<512xbf16> to tensor<512xf32> loc(#loc35)
+    %40 = arith.addi %8, %33 : tensor<512xi32> loc(#loc36)
+    %41 = tt.addptr %20, %40 : tensor<512x!tt.ptr<f32>>, tensor<512xi32> loc(#loc37)
+    %42 = tt.load %41, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<f32>> loc(#loc38)
+    %43 = tt.addptr %23, %32 : tensor<512x!tt.ptr<bf16>>, tensor<512xi32> loc(#loc39)
+    %44 = tt.load %43, %6 evictionPolicy = evict_last : tensor<512x!tt.ptr<bf16>> loc(#loc40)
+    %45 = arith.extf %44 : tensor<512xbf16> to tensor<512xf32> loc(#loc41)
+    %46 = arith.divf %22, %cst_4 : tensor<512xf32> loc(#loc42)
+    %47 = arith.addf %46, %cst_3 : tensor<512xf32> loc(#loc43)
+    %48 = tt.extern_elementwise %47 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<512xf32>) -> tensor<512xf32> loc(#loc44)
+    %49 = arith.mulf %19, %48 : tensor<512xf32> loc(#loc45)
+    %50 = arith.mulf %49, %26 : tensor<512xf32> loc(#loc46)
+    %51 = arith.addi %29, %cst_0 : tensor<512xi64> loc(#loc47)
+    %52 = arith.cmpi slt, %29, %cst : tensor<512xi64> loc(#loc48)
+    %53 = arith.select %52, %51, %29 : tensor<512xi1>, tensor<512xi64> loc(#loc49)
+    %54 = arith.cmpi sge, %53, %cst : tensor<512xi64> loc(#loc50)
+    %55 = arith.cmpi slt, %53, %cst_0 : tensor<512xi64> loc(#loc51)
+    %56 = arith.andi %54, %55 : tensor<512xi1> loc(#loc52)
+    %57 = arith.xori %6, %cst_2 : tensor<512xi1> loc(#loc53)
+    %58 = arith.ori %56, %57 : tensor<512xi1> loc(#loc54)
+    tt.assert %58, "index out of bounds: 0 <= tmp16 < 40960" : tensor<512xi1> loc(#loc55)
+    %59 = arith.muli %53, %cst_1 : tensor<512xi64> loc(#loc56)
+    %60 = arith.extsi %7 : tensor<512xi32> to tensor<512xi64> loc(#loc57)
+    %61 = arith.addi %60, %59 : tensor<512xi64> loc(#loc57)
+    %62 = tt.splat %arg4 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>> loc(#loc58)
+    %63 = tt.addptr %62, %61 : tensor<512x!tt.ptr<bf16>>, tensor<512xi64> loc(#loc58)
+    %64 = tt.load %63, %6 : tensor<512x!tt.ptr<bf16>> loc(#loc59)
+    %65 = arith.extf %64 : tensor<512xbf16> to tensor<512xf32> loc(#loc60)
+    %66 = arith.mulf %50, %65 : tensor<512xf32> loc(#loc61)
+    %67 = arith.divf %42, %cst_4 : tensor<512xf32> loc(#loc62)
+    %68 = arith.addf %67, %cst_3 : tensor<512xf32> loc(#loc63)
+    %69 = tt.extern_elementwise %68 {libname = "", libpath = "", pure = true, symbol = "__nv_rsqrtf"} : (tensor<512xf32>) -> tensor<512xf32> loc(#loc64)
+    %70 = arith.mulf %39, %69 : tensor<512xf32> loc(#loc65)
+    %71 = arith.mulf %70, %45 : tensor<512xf32> loc(#loc66)
+    %72 = arith.extsi %32 : tensor<512xi32> to tensor<512xi64> loc(#loc67)
+    %73 = arith.addi %72, %59 : tensor<512xi64> loc(#loc67)
+    %74 = tt.addptr %62, %73 : tensor<512x!tt.ptr<bf16>>, tensor<512xi64> loc(#loc68)
+    %75 = tt.load %74, %6 : tensor<512x!tt.ptr<bf16>> loc(#loc69)
+    %76 = arith.extf %75 : tensor<512xbf16> to tensor<512xf32> loc(#loc70)
+    %77 = arith.mulf %71, %76 : tensor<512xf32> loc(#loc71)
+    %78 = arith.subf %66, %77 : tensor<512xf32> loc(#loc72)
+    %79 = arith.mulf %71, %65 : tensor<512xf32> loc(#loc73)
+    %80 = arith.mulf %50, %76 : tensor<512xf32> loc(#loc74)
+    %81 = arith.addf %79, %80 : tensor<512xf32> loc(#loc75)
+    %82 = arith.muli %8, %cst_7 : tensor<512xi32> loc(#loc76)
+    %83 = arith.addi %7, %82 : tensor<512xi32> loc(#loc77)
+    %84 = tt.splat %arg5 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>> loc(#loc78)
+    %85 = tt.addptr %84, %83 : tensor<512x!tt.ptr<bf16>>, tensor<512xi32> loc(#loc78)
+    %86 = arith.truncf %78 : tensor<512xf32> to tensor<512xbf16> loc(#loc79)
+    tt.store %85, %86, %6 : tensor<512x!tt.ptr<bf16>> loc(#loc79)
+    %87 = tt.splat %arg6 : !tt.ptr<bf16> -> tensor<512x!tt.ptr<bf16>> loc(#loc80)
+    %88 = tt.addptr %87, %83 : tensor<512x!tt.ptr<bf16>>, tensor<512xi32> loc(#loc80)
+    %89 = arith.truncf %81 : tensor<512xf32> to tensor<512xbf16> loc(#loc81)
+    tt.store %88, %89, %6 : tensor<512x!tt.ptr<bf16>> loc(#loc81)
+    tt.return loc(#loc82)
+  } loc(#loc)
+} loc(#loc)
+#loc1 = loc(unknown)
+#loc2 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:28)
+#loc3 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":19:33)
+#loc4 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:36)
+#loc5 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":20:23)
+#loc6 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":21:21)
+#loc7 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":22:19)
+#loc8 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:21)
+#loc9 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":23:27)
+#loc10 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":24:19)
+#loc11 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:37)
+#loc12 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:46)
+#loc13 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:42)
+#loc14 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:56)
+#loc15 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:51)
+#loc16 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:30)
+#loc17 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:61)
+#loc18 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":26:71)
+#loc19 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:30)
+#loc20 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":27:35)
+#loc21 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:31)
+#loc22 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:36)
+#loc23 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":28:76)
+#loc24 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:31)
+#loc25 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":29:36)
+#loc26 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:38)
+#loc27 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:43)
+#loc28 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:63)
+#loc29 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:70)
+#loc30 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:57)
+#loc31 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:52)
+#loc32 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:77)
+#loc33 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:31)
+#loc34 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:87)
+#loc35 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":30:97)
+#loc36 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:37)
+#loc37 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:31)
+#loc38 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":31:57)
+#loc39 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:31)
+#loc40 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:41)
+#loc41 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":32:81)
+#loc42 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":35:19)
+#loc43 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":37:18)
+#loc44 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":38:27)
+#loc45 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":39:18)
+#loc46 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":41:19)
+#loc47 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":43:20)
+#loc48 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":44:20)
+#loc49 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":45:35)
+#loc50 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:28)
+#loc51 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:46)
+#loc52 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:38)
+#loc53 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:58)
+#loc54 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:56)
+#loc55 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":46:66)
+#loc56 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:40)
+#loc57 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:36)
+#loc58 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:31)
+#loc59 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:48)
+#loc60 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":47:58)
+#loc61 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":48:20)
+#loc62 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":50:21)
+#loc63 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":51:20)
+#loc64 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":52:28)
+#loc65 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":53:20)
+#loc66 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":55:20)
+#loc67 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:41)
+#loc68 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:31)
+#loc69 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:53)
+#loc70 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":56:63)
+#loc71 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":57:20)
+#loc72 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":58:20)
+#loc73 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":59:20)
+#loc74 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":60:20)
+#loc75 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":61:20)
+#loc76 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:34)
+#loc77 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:30)
+#loc78 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:25)
+#loc79 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":62:46)
+#loc80 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:25)
+#loc81 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:46)
+#loc82 = loc("/home/x/.cache/vllm/torch_compile_cache/90b45bce02/rank_0_0/inductor_cache/nz/cnzxfpsick276kekm7tfow7blw44qu6d6hvsex7ichute3jtwm3a.py":63:4)

platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/D6B7FVPYPXXUJ4C3PXEACCPD4ZWL5EA6LGYT663ZACLUNJHJ5LAQ/__grp__triton_poi_fused_add_mul_sub_5.json

@@ -0,0 +1 @@
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platform/aiml/models/vllm/torch_compile_cache/90b45bce02/rank_0_0/triton_cache/D6B7FVPYPXXUJ4C3PXEACCPD4ZWL5EA6LGYT663ZACLUNJHJ5LAQ/triton_poi_fused_add_mul_sub_5.json

@@ -0,0 +1 @@
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