sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15 values |
|---|---|---|---|---|---|
// Demangled: _exp10_64(int, double*, double*)
Function : _Z9_exp10_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
MOV.64 R8, 0x400a934f0979a371 ?trans2;
UMOV.64 UR4, 0x3fd34413509f79ff ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R5 ?trans1;
BSSY.RECONVERGENT B0, 0x8e0 ?trans1;
LEA R14, P1, R5, UR8, 0x3 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R15, R5, UR9, R4, 0x3, P1 ?trans1;
DFMA R8, R6, R8, 6.75539944105574400000e+15 &req={2} &wr=0x0 ?trans1;
FSETP.GEU.AND P0, PT, |R7|, 3.8004419803619384766, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, -6.75539944105574400000e+15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -UR4, R6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3c49dc1da994fd21 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, UR4, R12 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3caf48ad494ea3e9 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R10, -UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x40026bb1bbb55516 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, UR4, R12 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R12, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, UR4, R12 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 1 &req={0} &wr=0x0 ?trans2;
IMAD R11, R8, 0x100000, R13 &req={0} ?trans1;
MOV R10, R12 ?trans1;
@!P0 BRA 0x8d0 ?trans6;
FSETP.GEU.AND P2, PT, |R7|.reuse, 3.8160228729248046875, PT ?trans1;
DSETP.NAN.AND P0, PT, R6, R6, PT ?trans1;
ISETP.GE.AND P1, PT, R7, RZ, PT ?WAIT5_END_GROUP;
FSEL R9, RZ, +QNAN , !P1 ?WAIT6_END_GROUP;
@!P2 LEA.HI R4, R8, R8, RZ, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R6, R6 &rd=0x0 &wr=0x1 ?trans2;
@!P2 SHF.R.S32.HI R7, RZ, 0x1, R4 &req={0} ?trans1;
FSEL R11, R11, R9, P0 &req={1} ?trans1;
FSEL R10, R10, RZ, P0 ?trans1;
@!P2 MOV R6, R12 ?trans1;
@!P2 IADD3 R8, PT, PT, R8, -R7, RZ ?trans1;
@!P2 IMAD R7, R7, 0x100000, R13 ?WAIT3_END_GROUP;
@!P2 LEA R9, R8, 0x3ff00000, 0x14 ?trans1;
@!P2 MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DMUL R10, R6, R8 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B0 &req={3} ?trans5;
STG.E.64 desc[UR6][R14.64], R10 &req={1} &rd=0x1 ?trans1;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x930;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _exp10_64(int, double*, double*)
_Z9_exp10_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s38, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s38, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB42_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[2:3], 0x0
s_mov_b32 s2, 0x979a371
s_mov_b32 s8, 0x509f79ff
s_mov_b32 s10, 0xa994fd21
s_mov_b32 s12, 0x494ea3e9
s_mov_b32 s14, 0xbbb55516
s_mov_b32 s16, 0xfca7ab0c
s_mov_b32 s18, 0x6a5dcb37
s_mov_b32 s20, 0x623fde64
s_mov_b32 s22, 0x7c89e6b0
s_mov_b32 s24, 0x14761f6e
s_mov_b32 s26, 0x1852b7b0
s_mov_b32 s28, 0x11122322
s_mov_b32 s30, 0x555502a1
s_mov_b32 s34, 0x55555511
s_mov_b32 s36, 11
s_mov_b32 s3, 0x400a934f
s_mov_b32 s9, 0xbfd34413
s_mov_b32 s11, 0x3c49dc1d
s_mov_b32 s13, 0xbcaf48ad
s_mov_b32 s15, 0x40026bb1
s_mov_b32 s17, 0x3e928af3
s_mov_b32 s19, 0x3e5ade15
s_mov_b32 s21, 0x3ec71dee
s_mov_b32 s23, 0x3efa0199
s_mov_b32 s25, 0x3f2a01a0
s_mov_b32 s27, 0x3f56c16c
s_mov_b32 s29, 0x3f811111
s_mov_b32 s31, 0x3fa55555
s_mov_b32 s35, 0x3fc55555
s_mov_b32 s37, 0x3fe00000
s_waitcnt lgkmcnt(0)
s_mul_i32 s38, s0, s38
s_mov_b32 s39, 0
.LBB42_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f64 v[6:7], v[4:5], s[2:3]
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[4:5]
v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[6:7], v[6:7]
v_fma_f64 v[8:9], v[6:7], s[8:9], v[4:5]
v_cvt_i32_f64_e32 v0, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[6:7], s[10:11], v[8:9]
v_mul_f64 v[10:11], v[8:9], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[8:9], s[14:15], v[10:11]
v_fma_f64 v[10:11], v[8:9], s[18:19], s[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[34:35]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[36:37]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], 1.0
v_fma_f64 v[6:7], v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[6:7], v0
v_cndmask_b32_e32 v0, 0x7ff00000, v7, vcc_lo
s_and_b32 vcc_lo, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v4, 0, v6 :: v_dual_add_nc_u32 v1, s38, v1
v_add_co_u32 v2, vcc_lo, s6, v2
v_cndmask_b32_e64 v5, 0, v0, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_le_i32_e64 s1, s33, v1
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_or_b32 s39, s1, s39
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s39
s_cbranch_execnz .LBB42_2
.LBB42_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _exp10_64 | 2,836 | 2,334 | stackv2-00014-of-00015 |
// Demangled: _exp2_32(int, float*, float*)
Function : _Z8_exp2_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?trans1;
FSETP.GEU.AND P0, PT, R10, -126, PT &req={2} ?WAIT13_END_GROUP;
@!P0 FMUL R10, R10, 0.5 ?WAIT4_END_GROUP;
MUFU.EX2 R13, R10 &wr=0x0 ?trans2;
@!P0 FMUL R13, R13, R13 &req={0} ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans9;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _exp2_32(int, float*, float*)
_Z8_exp2_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB43_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB43_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0
v_cndmask_b32_e64 v4, 0, 0x42800000, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_f32_e32 v0, v0, v4
v_cndmask_b32_e64 v4, 1.0, 0x1f800000, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_exp_f32_e32 v0, v0
s_or_b32 s2, vcc_lo, s2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, v0, v4
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB43_2
.LBB43_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _exp2_32 | 699 | 823 | stackv2-00014-of-00015 |
// Demangled: _exp2_64(int, double*, double*)
Function : _Z8_exp2_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R5 ?trans1;
BSSY.RECONVERGENT B0, 0x860 ?trans1;
LEA R14, P1, R5, UR8, 0x3 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R15, R5, UR9, R4, 0x3, P1 ?trans1;
DADD R8, R6, 6.75539944105574400000e+15 &req={2} &wr=0x0 ?trans1;
FSETP.GEU.AND P0, PT, |R7|, 4.498046875, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, -6.75539944105574400000e+15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R6, -R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, UR4, R12 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R12, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, UR4, R12 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 1 &req={0} &wr=0x0 ?trans2;
IMAD R11, R8, 0x100000, R13 &req={0} ?trans1;
MOV R10, R12 ?trans1;
@!P0 BRA 0x850 ?trans6;
FSETP.GEU.AND P2, PT, |R7|.reuse, 4.52490234375, PT ?trans1;
DSETP.NAN.AND P0, PT, R6, R6, PT ?trans1;
ISETP.GE.AND P1, PT, R7, RZ, PT ?WAIT5_END_GROUP;
FSEL R9, RZ, +QNAN , !P1 ?WAIT6_END_GROUP;
@!P2 LEA.HI R4, R8, R8, RZ, 0x1 ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R6, R6 &rd=0x0 &wr=0x1 ?trans2;
@!P2 SHF.R.S32.HI R7, RZ, 0x1, R4 &req={0} ?trans1;
FSEL R11, R11, R9, P0 &req={1} ?trans1;
FSEL R10, R10, RZ, P0 ?trans1;
@!P2 MOV R6, R12 ?trans1;
@!P2 IADD3 R8, PT, PT, R8, -R7, RZ ?trans1;
@!P2 IMAD R7, R7, 0x100000, R13 ?WAIT3_END_GROUP;
@!P2 LEA R9, R8, 0x3ff00000, 0x14 ?trans1;
@!P2 MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DMUL R10, R6, R8 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B0 &req={3} ?trans5;
STG.E.64 desc[UR6][R14.64], R10 &req={1} &rd=0x1 ?trans1;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x8b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _exp2_64(int, double*, double*)
_Z8_exp2_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s30, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s31, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s31, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s30, v1
s_cbranch_execz .LBB44_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[2:3], 0x0
s_mov_b32 s2, 0x3b39803f
s_mov_b32 s8, 0xfefa39ef
s_mov_b32 s10, 0xfca7ab0c
s_mov_b32 s12, 0x6a5dcb37
s_mov_b32 s14, 0x623fde64
s_mov_b32 s16, 0x7c89e6b0
s_mov_b32 s18, 0x14761f6e
s_mov_b32 s20, 0x1852b7b0
s_mov_b32 s22, 0x11122322
s_mov_b32 s24, 0x555502a1
s_mov_b32 s26, 0x55555511
s_mov_b32 s28, 11
s_mov_b32 s3, 0x3c7abc9e
s_mov_b32 s9, 0x3fe62e42
s_mov_b32 s11, 0x3e928af3
s_mov_b32 s13, 0x3e5ade15
s_mov_b32 s15, 0x3ec71dee
s_mov_b32 s17, 0x3efa0199
s_mov_b32 s19, 0x3f2a01a0
s_mov_b32 s21, 0x3f56c16c
s_mov_b32 s23, 0x3f811111
s_mov_b32 s25, 0x3fa55555
s_mov_b32 s27, 0x3fc55555
s_mov_b32 s29, 0x3fe00000
s_waitcnt lgkmcnt(0)
s_mul_i32 s31, s0, s31
s_mov_b32 s33, 0
.LBB44_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_rndne_f64_e32 v[6:7], v[4:5]
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[4:5]
v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[4:5], -v[6:7]
v_cvt_i32_f64_e32 v0, v[6:7]
v_mul_f64 v[10:11], v[8:9], s[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[8:9], s[8:9], v[10:11]
v_fma_f64 v[10:11], v[8:9], s[12:13], s[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[14:15]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[18:19]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], 1.0
v_fma_f64 v[6:7], v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[6:7], v0
v_cndmask_b32_e32 v0, 0x7ff00000, v7, vcc_lo
s_and_b32 vcc_lo, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v4, 0, v6 :: v_dual_add_nc_u32 v1, s31, v1
v_add_co_u32 v2, vcc_lo, s6, v2
v_cndmask_b32_e64 v5, 0, v0, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_le_i32_e64 s1, s30, v1
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_or_b32 s33, s1, s33
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s33
s_cbranch_execnz .LBB44_2
.LBB44_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _exp2_64 | 2,659 | 2,119 | stackv2-00014-of-00015 |
// Demangled: _exp_32(int, float*, float*)
Function : _Z7_exp_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 0.96630859375, -0.0022525787353515625 &req={1} ?trans1;
MOV R13, 0x437c0000 ?WAIT4_END_GROUP;
FFMA.SAT R8, R6, R9, 0.5 &req={2} ?WAIT4_END_GROUP;
FFMA.RM R8, R8, R13, 12582913 ?WAIT4_END_GROUP;
FADD R9, R8.reuse, -12583039 ?trans1;
SHF.L.U32 R12, R8, 0x17, RZ ?WAIT3_END_GROUP;
FFMA R9, R6, 1.4426950216293334961, -R9 ?WAIT4_END_GROUP;
FFMA R10, R6, 1.925963033500011079e-08, R9 ?trans1;
IMAD.WIDE R8, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?trans2;
MUFU.EX2 R13, R10 &wr=0x0 ?trans3;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FMUL R13, R12, R13 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R13 &rd=0x1 ?trans7;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _exp_32(int, float*, float*)
_Z7_exp_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB39_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB39_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v4, 0x3fb8aa3b, v0
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
v_cmp_nlt_f32_e64 s0, 0x42b17218, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v5, 0x3fb8aa3b, v0, -v4
v_rndne_f32_e32 v6, v4
v_dual_fmac_f32 v5, 0x32a5705f, v0 :: v_dual_sub_f32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v4, v4, v5
v_cvt_i32_f32_e32 v5, v6
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_cndmask_b32_e64 v0, 0x7f800000, v4, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB39_2
.LBB39_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _exp_32 | 890 | 1,025 | stackv2-00014-of-00015 |
// Demangled: _exp_64(int, double*, double*)
Function : _Z7_exp_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R9, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
MOV.64 R4, 0x3ff71547652b82fe ?trans2;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
SHF.R.S32.HI R8, RZ, 0x1f, R9 ?trans1;
BSSY.RECONVERGENT B0, 0x7f0 ?trans1;
LEA R14, P1, R9, UR8, 0x3 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R15, R9, UR9, R8, 0x3, P1 ?trans1;
DFMA R4, R6, R4, 6.75539944105574400000e+15 &req={2} &wr=0x0 ?trans1;
FSETP.GEU.AND P0, PT, |R7|, 4.1917929649353027344, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R4, -6.75539944105574400000e+15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -UR4, R6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, -UR4, R12 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R12, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, UR4, R12 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, 1 &req={0} &wr=0x0 ?trans2;
IMAD R11, R4, 0x100000, R13 &req={0} ?trans1;
MOV R10, R12 ?trans1;
@!P0 BRA 0x7e0 ?trans6;
FSETP.GEU.AND P1, PT, |R7|, 4.2275390625, PT ?trans1;
DSETP.GEU.AND P0, PT, R6, RZ, PT ?WAIT12_END_GROUP;
@!P1 LEA.HI R5, R4, R4, RZ, 0x1 ?WAIT4_END_GROUP;
@!P1 SHF.R.S32.HI R5, RZ, 0x1, R5 ?WAIT4_END_GROUP;
@!P1 IADD3 R4, PT, PT, R4, -R5, RZ ?trans1;
@!P1 IMAD R5, R5, 0x100000, R13 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R6, +INF &rd=0x0 &wr=0x1 ?trans2;
@!P1 LEA R7, R4, 0x3ff00000, 0x14 &req={0} ?trans1;
FSEL R10, R10, RZ, P0 &req={1} ?trans1;
FSEL R11, R11, RZ, P0 ?trans1;
@!P1 MOV R4, R12 ?trans1;
@!P1 MOV R6, RZ ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DMUL R10, R4, R6 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B0 &req={3} ?trans5;
STG.E.64 desc[UR6][R14.64], R10 &req={1} &rd=0x1 ?trans1;
IADD3 R9, PT, PT, R0, R9, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _exp_64(int, double*, double*)
_Z7_exp_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s34, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s34, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB40_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[2:3], 0x0
s_mov_b32 s2, 0x652b82fe
s_mov_b32 s8, 0xfefa39ef
s_mov_b32 s10, 0x3b39803f
s_mov_b32 s12, 0xfca7ab0c
s_mov_b32 s14, 0x6a5dcb37
s_mov_b32 s16, 0x623fde64
s_mov_b32 s18, 0x7c89e6b0
s_mov_b32 s20, 0x14761f6e
s_mov_b32 s22, 0x1852b7b0
s_mov_b32 s24, 0x11122322
s_mov_b32 s26, 0x555502a1
s_mov_b32 s28, 0x55555511
s_mov_b32 s30, 11
s_mov_b32 s3, 0x3ff71547
s_mov_b32 s9, 0xbfe62e42
s_mov_b32 s11, 0xbc7abc9e
s_mov_b32 s13, 0x3e928af3
s_mov_b32 s15, 0x3e5ade15
s_mov_b32 s17, 0x3ec71dee
s_mov_b32 s19, 0x3efa0199
s_mov_b32 s21, 0x3f2a01a0
s_mov_b32 s23, 0x3f56c16c
s_mov_b32 s25, 0x3f811111
s_mov_b32 s27, 0x3fa55555
s_mov_b32 s29, 0x3fc55555
s_mov_b32 s31, 0x3fe00000
s_waitcnt lgkmcnt(0)
s_mul_i32 s34, s0, s34
s_mov_b32 s35, 0
.LBB40_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f64 v[6:7], v[4:5], s[2:3]
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[4:5]
v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[6:7], v[6:7]
v_fma_f64 v[8:9], v[6:7], s[8:9], v[4:5]
v_cvt_i32_f64_e32 v0, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[6:7], s[10:11], v[8:9]
v_fma_f64 v[10:11], v[8:9], s[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[16:17]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], 1.0
v_fma_f64 v[6:7], v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[6:7], v0
v_cndmask_b32_e32 v0, 0x7ff00000, v7, vcc_lo
s_and_b32 vcc_lo, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v4, 0, v6 :: v_dual_add_nc_u32 v1, s34, v1
v_add_co_u32 v2, vcc_lo, s6, v2
v_cndmask_b32_e64 v5, 0, v0, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_le_i32_e64 s1, s33, v1
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_or_b32 s35, s1, s35
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s35
s_cbranch_execnz .LBB40_2
.LBB40_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _exp_64 | 2,592 | 2,157 | stackv2-00014-of-00015 |
// Demangled: _expm1_32(int, float*, float*)
Function : _Z9_expm1_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R9, R9, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R6.64] &req={2} &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R7, -RZ, RZ, 0.83837890625, -4044 &req={0} ?trans2;
FMUL R10, R8.reuse, 1.4426950216293334961 &req={2} ?trans1;
FSETP.GEU.AND P0, PT, |R8|.reuse, 0.40999999642372131348, PT ?trans1;
FSETP.NEU.AND P2, PT, R8, RZ, PT ?WAIT4_END_GROUP;
FRND R10, R10 &wr=0x0 ?trans2;
FSEL R11, R10, RZ, P0 &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P1, PT, R11.reuse, 128, PT ?trans1;
FFMA R12, R11, -0.693145751953125, R8 ?WAIT4_END_GROUP;
FFMA R12, R11, -1.428606765330187045e-06, R12 ?WAIT4_END_GROUP;
FFMA R7, R12, R7, 0.0083824126049876213074 ?WAIT4_END_GROUP;
@!P1 FADD R11, R11, -1 ?trans1;
FFMA R7, R12, R7, 0.041667830199003219604 ?WAIT3_END_GROUP;
FMUL R14, R11.reuse, 0.5 ?trans1;
FSETP.GEU.AND P0, PT, R11, -126, PT ?trans1;
FFMA R7, R12, R7, 0.16666397452354431152 ?WAIT4_END_GROUP;
FSEL R14, R14, R11, !P0 ?trans1;
FFMA R7, R12, R7, 0.49999994039535522461 ?WAIT3_END_GROUP;
MUFU.EX2 R6, R14 &wr=0x0 ?trans1;
FMUL R7, R12, R7 ?WAIT4_END_GROUP;
FFMA R7, R12, R7, R12 ?trans1;
@!P0 FMUL R6, R6, R6 &req={0} ?trans1;
FSETP.GT.AND P0, PT, R11, 128, PT ?WAIT3_END_GROUP;
FADD R10, R6, -1 ?WAIT4_END_GROUP;
FFMA R6, R7, R6, R10 ?WAIT4_END_GROUP;
@!P1 FADD R6, R6, R6 ?trans1;
FSETP.GEU.AND P1, PT, R11, -25, PT ?WAIT4_END_GROUP;
FSEL R6, R6, +INF , !P0 ?WAIT5_END_GROUP;
FSEL R11, R6, -1, P1 ?trans1;
IMAD.WIDE R6, R0, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
@!P2 FADD R11, R8, R8 ?trans1;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R6.64], R11 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x320;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _expm1_32(int, float*, float*)
_Z9_expm1_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB45_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s1, 0
s_mov_b32 s3, 0x395133b1
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s9
.LBB45_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v4, 0x3fb8aa3b, v0
v_cmp_ngt_f32_e64 s0, 0xc1880000, v0
v_rndne_f32_e32 v4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fmamk_f32 v5, v4, 0xbf317218, v0
v_cvt_i32_f32_e32 v7, v4
v_cmp_eq_f32_e32 vcc_lo, 0x43000000, v4
v_fmac_f32_e32 v5, 0x3102e308, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, v7, 0x7f, vcc_lo
v_ldexp_f32 v4, 1.0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmaak_f32 v6, s3, v5, 0x3ab69700 :: v_dual_add_f32 v7, -1.0, v4
v_fmaak_f32 v6, v5, v6, 0x3c0887f9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v6, v5, v6, 0x3d2aaa81
v_fmaak_f32 v6, v5, v6, 0x3e2aaaab
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, v5, v6, 0.5
v_mul_f32_e32 v6, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v5, v6
v_fmac_f32_e32 v7, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v7, v7
v_cndmask_b32_e32 v4, v7, v4, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17217, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_cndmask_b32_e64 v0, -1.0, v4, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s1, vcc_lo, s1
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB45_2
.LBB45_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _expm1_32 | 1,412 | 1,474 | stackv2-00014-of-00015 |
// Demangled: _expm1_64(int, double*, double*)
Function : _Z9_expm1_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R4, R7, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR6][R4.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x950 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R7 ?trans1;
FSETP.GT.AND P0, PT, R5, -3.1640625, PT &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.OR P0, PT, R5, 4.1931471824645996094, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0x8a0 ?trans5;
MOV.64 R8, 0x3ff71547652b82fe ?WAIT3_END_GROUP;
IADD3 R16, PT, PT, R5, R5, RZ ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
MOV.64 R14, 0x3e5af86d8ebd13cd ?trans2;
DFMA R8, R4, R8, 6.75539944105574400000e+15 &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R16, 0x7fb3e647, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, -6.75539944105574400000e+15 &req={0} &rd=0x0 &wr=0x1 ?trans2;
SEL R8, R8, RZ, P1 &req={0} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R8.reuse, 0x400, PT ?trans1;
LEA R8, R8, 0x3ff00000, 0x14 ?WAIT5_END_GROUP;
SEL R9, R8, 0x7fe00000, P0 ?trans1;
MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -UR4, R4 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -UR4, R12 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3e21f4076acd15b6 ?trans1;
FSEL R12, R4, R12, !P1 &req={0} ?trans1;
FSEL R13, R5, R13, !P1 ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, UR4, R14 &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3e927e5092ba033d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dde6c5f9da1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01a018d034e6 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a01b3b6940 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c16c1b5dd ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8111111110f74d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa555555555554d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555557 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, 0.5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, -1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R14, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R10, R10 &req={0} &wr=0x0 ?trans2;
FSEL R13, R8, R10, !P0 &req={0} ?trans1;
FSEL R9, R9, R11, !P0 ?WAIT4_END_GROUP;
FSEL R4, R4, R13, !P1 ?trans1;
FSEL R5, R5, R9, !P1 ?trans1;
BRA 0x940 ?trans6;
ISETP.GE.AND P1, PT, R5, RZ, PT ?trans1;
MOV R9, 0x3ff00000 ?trans1;
DSETP.NAN.AND P0, PT, R4, R4, PT ?trans4;
FSEL R9, -R9, +QNAN , !P1 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, R4 &wr=0x0 ?trans2;
FSEL R4, R4, RZ, P0 &req={0} ?trans1;
FSEL R5, R5, R9, P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R8, P0, R7, UR8, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R9, R7, UR9, R6, 0x3, P0 ?trans2;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R8.64], R4 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R7, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x9c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _expm1_64(int, double*, double*)
_Z9_expm1_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s34, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s34, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB46_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s36, s[2:3], 0x0
s_mov_b32 s2, 0x652b82fe
s_mov_b32 s8, 0xfefa39ef
s_mov_b32 s10, 0x3b39803f
s_mov_b32 s12, 0x2a1b768b
s_mov_b32 s14, 0xa9d67f34
s_mov_b32 s16, 0xe0ac05b
s_mov_b32 s18, 0x1b889c29
s_mov_b32 s20, 0x197bcfd8
s_mov_b32 s22, 0x1ac1a723
s_mov_b32 s24, 0x16c18931
s_mov_b32 s26, 0x11110056
s_mov_b32 s28, 0x55555552
s_mov_b32 s30, 0x55555557
s_mov_b32 s3, 0x3ff71547
s_mov_b32 s9, 0xbfe62e42
s_mov_b32 s11, 0xbc7abc9e
s_mov_b32 s13, 0x3e5af4eb
s_mov_b32 s15, 0x3e21f32e
s_mov_b32 s17, 0x3e927e50
s_mov_b32 s19, 0x3ec71de0
s_mov_b32 s21, 0x3efa01a0
s_mov_b32 s23, 0x3f2a01a0
s_mov_b32 s25, 0x3f56c16c
s_mov_b32 s27, 0x3f811111
s_mov_b32 s29, 0x3fa55555
s_mov_b32 s31, 0x3fc55555
s_waitcnt lgkmcnt(0)
s_mul_i32 s36, s36, s34
s_mov_b32 s37, 0
s_mov_b32 s35, 0x40862e42
.LBB46_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s34, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f64 v[6:7], v[4:5], s[2:3]
v_cmp_nlt_f64_e64 s0, s[34:35], v[4:5]
v_cmp_ngt_f64_e64 s1, 0xc0428000, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[6:7], v[6:7]
v_fma_f64 v[8:9], v[6:7], s[8:9], v[4:5]
v_cvt_i32_f64_e32 v0, v[6:7]
v_cmp_eq_f64_e32 vcc_lo, 0x40900000, v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[8:9], v[6:7], s[10:11], v[8:9]
v_cndmask_b32_e64 v0, v0, 0x3ff, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ldexp_f64 v[6:7], 1.0, v0
v_fma_f64 v[10:11], v[8:9], s[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[6:7], -1.0
v_fma_f64 v[10:11], v[8:9], v[10:11], s[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[18:19]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[30:31]
v_fma_f64 v[10:11], v[8:9], v[10:11], 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[8:9], v[10:11]
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], v[8:9], v[12:13]
v_add_f64 v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v4, v6, v8 :: v_dual_add_nc_u32 v1, s36, v1
v_cndmask_b32_e32 v0, v7, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s33, v1
v_cndmask_b32_e64 v0, 0x7ff00000, v0, s0
s_and_b32 s0, s1, s0
s_or_b32 s37, vcc_lo, s37
v_cndmask_b32_e64 v4, 0, v4, s0
v_add_co_u32 v2, s0, s6, v2
v_cndmask_b32_e64 v5, 0xbff00000, v0, s1
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s37
s_cbranch_execnz .LBB46_2
.LBB46_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _expm1_64 | 2,908 | 2,472 | stackv2-00014-of-00015 |
// Demangled: _fill_32(int, float, float*)
Function : _Z8_fill_32ifPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R9, c[0x0][0x384] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R7, R7, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R2.64], R9 &req={2,0} &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _fill_32(int, float, float*)
_Z8_fill_32ifPf:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
s_add_u32 s4, s0, 16
s_addc_u32 s5, s1, 0
s_mov_b32 s7, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s6, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB93_3
s_load_b32 s7, s[4:5], 0x0
s_load_b64 s[4:5], s[0:1], 0x8
v_mov_b32_e32 v0, s3
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s7, s6
.LBB93_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v2, s0, s4, v2
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
s_or_b32 s3, vcc_lo, s3
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB93_2
.LBB93_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _fill_32 | 530 | 598 | stackv2-00014-of-00015 |
// Demangled: _fill_64(int, double, double*)
Function : _Z8_fill_64idPd
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R9, R9, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R4 &req={0} ?trans1;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R2.64], R6 &req={3,2} &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x130;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _fill_64(int, double, double*)
_Z8_fill_64idPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s6, s[0:1], 0x0
s_add_u32 s4, s0, 24
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s2, 0xffff
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s6, v1
s_cbranch_execz .LBB94_3
s_load_b128 s[0:3], s[0:1], 0x8
s_load_b32 s4, s[4:5], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
s_mul_i32 s1, s4, s7
s_mov_b32 s4, 0
.LBB94_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v5, s0, s2, v5
v_add_co_ci_u32_e64 v6, s0, s3, v6, s0
s_or_b32 s4, vcc_lo, s4
global_store_b64 v[5:6], v[3:4], off
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB94_2
.LBB94_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _fill_64 | 536 | 592 | stackv2-00014-of-00015 |
// Demangled: _floor_32(int, float*, float*)
Function : _Z9_floor_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FRND.FLOOR R13, R2 &req={2} &wr=0x0 ?trans2;
STG.E desc[UR6][R4.64], R13 &req={0} &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _floor_32(int, float*, float*)
_Z9_floor_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB47_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB47_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b32 v0, v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_floor_f32_e32 v0, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB47_2
.LBB47_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _floor_32 | 612 | 650 | stackv2-00014-of-00015 |
// Demangled: _floor_64(int, double*, double*)
Function : _Z9_floor_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x8, R10 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FRND.F64.FLOOR R4, R2 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R6.64], R4 &req={0} &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _floor_64(int, double*, double*)
_Z9_floor_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB48_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB48_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b64 v[4:5], v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_floor_f64_e32 v[4:5], v[4:5]
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB48_2
.LBB48_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _floor_64 | 621 | 662 | stackv2-00014-of-00015 |
// Demangled: _htanh_32(int, float*, float*)
Function : _Z9_htanh_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?trans1;
FSETP.GEU.AND P0, PT, R2.reuse, -1, PT &req={2} ?trans1;
FMNMX.NAN R10, R2, 1, PT ?WAIT5_END_GROUP;
FSEL R13, R10, -1, P0 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans9;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _htanh_32(int, float*, float*)
_Z9_htanh_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB4_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB4_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_nlt_f32_e32 vcc_lo, 1.0, v0
v_add_nc_u32_e32 v1, s1, v1
v_cmp_ngt_f32_e64 s0, -1.0, v0
v_cndmask_b32_e32 v4, 1.0, v0, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_cndmask_b32_e64 v0, -1.0, v4, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB4_2
.LBB4_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _htanh_32 | 665 | 753 | stackv2-00014-of-00015 |
// Demangled: _htanh_64(int, double*, double*)
Function : _Z9_htanh_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans2;
DSETP.GT.AND P0, PT, R2, 1, PT &req={2} &wr=0x0 ?trans2;
FSEL R4, R3, 1.875, !P0 &req={0} ?trans1;
FSEL R6, R2, RZ, !P0 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GEU.AND P0, PT, R2, -1, PT &wr=0x0 ?trans2;
FSEL R7, R4, -1.875, P0 &req={0} ?trans1;
FSEL R6, R6, RZ, P0 ?trans1;
IMAD.WIDE R4, R0, 0x8, R10 &req={3} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R4.64], R6 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _htanh_64(int, double*, double*)
_Z9_htanh_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB5_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s9
.LBB5_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_nlt_f64_e32 vcc_lo, 1.0, v[4:5]
v_cmp_ngt_f64_e64 s0, -1.0, v[4:5]
v_cndmask_b32_e32 v0, 0x3ff00000, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
s_and_b32 vcc_lo, s0, vcc_lo
v_dual_cndmask_b32 v4, 0, v4 :: v_dual_add_nc_u32 v1, s2, v1
v_add_co_u32 v2, vcc_lo, s6, v2
v_cndmask_b32_e64 v5, 0xbff00000, v0, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cmp_le_i32_e64 s1, s8, v1
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_or_b32 s3, s1, s3
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB5_2
.LBB5_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _htanh_64 | 776 | 830 | stackv2-00014-of-00015 |
// Demangled: _invx_32(int, float*, float*)
Function : _Z8_invx_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R8, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R3, R8, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R8, R8, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R10, R3, 0x4, R4 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R2, desc[UR6][R10.64] &req={2} &wr=0x2 ?trans1;
MOV R9, R3.reuse ?trans1;
IADD3 R3, PT, PT, R8, R3, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x200 ?trans4;
ISETP.GE.AND P3, PT, R3, UR5, PT &req={4} ?trans1;
IADD3 R0, PT, PT, R2, 0x1800000, RZ &req={2} ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x1b0 ?trans5;
MOV R10, 0x1a0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x240 &req={3} ?trans5;
BRA 0x1f0 ?trans5;
MUFU.RCP R13, R2 &wr=0x0 ?trans2;
FFMA R0, R2, R13, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R0, -R0, -RZ ?WAIT4_END_GROUP;
FFMA R13, R13, R0, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD.WIDE R10, R9, 0x4, R6 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64], R13 &rd=0x1 ?trans1;
@!P3 BRA 0xe0 ?trans5;
EXIT ?trans5;
IMAD.SHL.U32 R0, R2, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x570 ?trans4;
SHF.R.U32.HI R14, RZ, 0x18, R0 ?trans1;
MOV R0, R2 ?WAIT4_END_GROUP;
ISETP.NE.U32.AND P0, PT, R14, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x340 ?trans5;
IMAD.SHL.U32 R2, R0, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@P0 FFMA R12, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MUFU.RCP R11, R0 ?trans3;
@P0 MUFU.RCP R13, R12 &wr=0x0 ?trans2;
@P0 FFMA R2, R12, R13, -1 &req={0} ?WAIT4_END_GROUP;
@P0 FADD.FTZ R2, -R2, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R2, R13, R2, R13 ?WAIT4_END_GROUP;
@P0 FFMA R11, R2, 1.84467440737095516160e+19, RZ ?trans1;
BRA 0x560 ?trans6;
IADD3 R15, PT, PT, R14, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x550 ?trans5;
LOP3.LUT R2, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x3f800000, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
MUFU.RCP R11, R2 &wr=0x0 ?trans2;
FFMA R12, R2, R11, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R12, -R12, -RZ ?WAIT4_END_GROUP;
FFMA.RM R13, R11.reuse, R12.reuse, R11.reuse ?trans1;
FFMA.RP R12, R11, R12, R11 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 1.78813934326171875e-07 ?WAIT4_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R13.reuse, R12, PT ?trans1;
LOP3.LUT R13, R13, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.L.U32 R12, R11, R15, RZ ?trans2;
LOP3.LUT R13, R13, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R11, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R12, R12, R13, RZ, 0xc0, !PT ?trans2;
IADD3 R2, PT, PT, -R11, RZ, RZ ?trans2;
SHF.R.U32.HI R12, RZ, R15.reuse, R12 ?trans2;
LOP3.LUT P1, RZ, R2, R15, R13, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R12.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P2, RZ, R12, 0x2, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R2, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans1;
IADD3 R2, PT, PT, R14, -0xfc, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R11, RZ, R2, R13 ?WAIT8_END_GROUP;
@!P0 IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.SHL.U32 R11, R11, 0x2, RZ ?WAIT5_END_GROUP;
LOP3.LUT R11, R11, 0x80000000, R0, 0xf8, !PT ?trans1;
BRA 0x560 ?trans6;
MUFU.RCP R11, R0 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R13, R11 &req={1} ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 &req={0} ?trans5;
BRA 0x5a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _invx_32(int, float*, float*)
_Z8_invx_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB49_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB49_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v4, null, v0, v0, 1.0
v_div_scale_f32 v7, vcc_lo, 1.0, v0, 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v4, v5, 1.0
v_fmac_f32_e32 v5, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v6, v7, v5
v_fma_f32 v8, -v4, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v8, v5
v_fma_f32 v4, -v4, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f32 v4, v4, v5, v6
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_div_fixup_f32 v0, v4, v0, 1.0
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB49_2
.LBB49_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _invx_32 | 2,381 | 999 | stackv2-00014-of-00015 |
// Demangled: _invx_64(int, double*, double*)
Function : _Z8_invx_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R10, R7, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R10, desc[UR6][R10.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x310 ?trans1;
MUFU.RCP64H R9, R11 &req={2,1} &wr=0x0 ?trans1;
IADD3 R8, PT, PT, R11, 0x300402, RZ ?WAIT5_END_GROUP;
FSETP.GEU.AND P1, PT, |R8|, 5.8789094863358348022e-39, PT ?trans1;
DFMA R12, -R10, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, R12, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R9, R7.reuse &req={0} ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R12, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R14, R12 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P1 BRA 0x300 &req={1,0} ?trans5;
LOP3.LUT R6, R11, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R14, PT, PT, R6, -0x100000, RZ ?trans1;
MOV R6, 0x300 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x350 &req={3} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD.WIDE R8, R9, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R8.64], R12 &rd=0x1 ?trans1;
@!P0 BRA 0xe0 ?trans5;
EXIT ?trans5;
DSETP.GTU.AND P1, PT, |R10|, +INF , PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x920 ?trans4;
@P1 BRA 0x8f0 &req={0} ?trans5;
LOP3.LUT R8, R11, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R12, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R12, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P1 LOP3.LUT R13, R11, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P1 MOV R12, RZ ?trans1;
@P1 BRA 0x910 ?trans6;
ISETP.GE.U32.AND P1, PT, R8, 0x1000001, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x6d0 ?trans5;
IADD3 R13, PT, PT, R11, -0x3fe00000, RZ ?trans1;
MOV R12, R10 ?WAIT3_END_GROUP;
MUFU.RCP64H R15, R13 &wr=0x0 ?trans3;
DFMA R16, -R12, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R16, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R12, R16, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R14, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R10, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R14, R10, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x910 &req={1,0} ?trans5;
DMUL R10, R10, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R12, R14 ?trans1;
MUFU.RCP64H R13, R11 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R10, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R14, R12, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R12, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x910 &req={0} ?trans5;
LOP3.LUT R13, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R10, R6 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 ?trans5;
BRA 0x950;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _invx_64(int, double*, double*)
_Z8_invx_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB50_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB50_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[6:7]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
v_div_scale_f64 v[10:11], vcc_lo, 1.0, v[4:5], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[10:11], v[8:9]
v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_or_b32 s2, vcc_lo, s2
v_div_fixup_f64 v[4:5], v[6:7], v[4:5], 1.0
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB50_2
.LBB50_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _invx_64 | 2,801 | 1,129 | stackv2-00014-of-00015 |
// Demangled: _log10_32(int, float*, float*)
Function : _Z9_log10_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R9, R9, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R2 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R6.64] &req={2} &rd=0x0 &wr=0x2 ?trans1;
HFMA2 R13, -RZ, RZ, 1.5048828125, 33.21875 ?trans1;
MOV R7, 0x7f800000 &req={0} ?trans1;
FSETP.GEU.AND P0, PT, R8, 1.175494350822287508e-38, PT &req={2} ?WAIT5_END_GROUP;
FSEL R6, RZ, -23, P0 ?WAIT8_END_GROUP;
@!P0 FMUL R8, R8, 8388608 ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, R8.reuse, -0x3f2aaaab, RZ ?trans1;
ISETP.GT.U32.AND P0, PT, R8, 0x7f7fffff, PT ?WAIT3_END_GROUP;
LOP3.LUT R11, R10, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R8, -R11.reuse, RZ ?trans2;
I2FP.F32.S32 R11, R11 ?WAIT3_END_GROUP;
FADD R10, R10, -1 ?trans2;
FFMA R6, R11, 1.1920928955078125e-07, R6 ?trans2;
FFMA R13, R10, -R13, 0.14084610342979431152 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.12148627638816833496 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.13980610668659210205 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.16684235632419586182 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.20012299716472625732 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.24999669194221496582 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.33333182334899902344 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.5 ?WAIT4_END_GROUP;
FMUL R13, R10, R13 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, R10 ?WAIT4_END_GROUP;
FFMA R6, R6, 0.69314718246459960938, R13 ?trans1;
@P0 FFMA R6, R8.reuse, R7, +INF ?trans1;
FSETP.NEU.AND P0, PT, R8, RZ, PT ?WAIT3_END_GROUP;
FMUL R8, R6, 0.43429449200630187988 ?trans1;
IMAD.WIDE R6, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT3_END_GROUP;
FSEL R11, R8, -INF , P0 ?trans2;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT3_END_GROUP;
STG.E desc[UR6][R6.64], R11 &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x300;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log10_32(int, float*, float*)
_Z9_log10_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB53_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB53_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
v_cndmask_b32_e64 v5, 0, 0x411a209b, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v4
v_log_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v4, 0x3e9a209a, v0
v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v4, 0x3e9a209a, v0, -v4
v_fmac_f32_e32 v4, 0x3284fbcf, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, 0x3e9a209a, v0
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2)
v_sub_f32_e32 v0, v0, v5
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB53_2
.LBB53_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log10_32 | 1,477 | 1,062 | stackv2-00014-of-00015 |
// Demangled: _log10_64(int, double*, double*)
Function : _Z9_log10_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x8, R2 &req={1,0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xc20 ?trans1;
MOV R11, 0xfffffc01 ?trans1;
ISETP.GT.AND P0, PT, R7, 0xfffff, PT &req={2} ?trans1;
MOV.64 R8, R6 ?trans2;
MOV R10, R7 ?WAIT10_END_GROUP;
@!P0 DMUL R8, R8, 1.80143985094819840000e+16 &wr=0x0 ?trans1;
@!P0 MOV R11, 0xfffffbcb ?trans1;
@!P0 MOV R10, R9 &req={0} ?trans1;
@!P0 MOV R6, R8 ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R4, 0x7feffffe, PT ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R5 ?WAIT12_END_GROUP;
@P1 BRA 0xbc0 ?trans5;
LOP3.LUT R7, R10, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR4, 0x4330000080000000 ?trans1;
MOV R16, RZ ?trans2;
LOP3.LUT R7, R7, 0x3ff00000, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R9, PT, PT, R7, -0x100000, RZ ?WAIT5_END_GROUP;
@P0 MOV R7, R9 ?WAIT6_END_GROUP;
DADD R18, R6, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R17, R19 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R6, -1 &rd=0x1 ?trans2;
LEA.HI R6, R10, R11, RZ, 0xc &req={1} ?trans1;
MOV R7, 0x43300000 ?WAIT3_END_GROUP;
@P0 IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R18, R16, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R18, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, -UR4 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R8, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R14, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R6, UR4, R8 &req={0} ?trans1;
UMOV.64 UR4, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, UR4, R18 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R6, -UR4, R12 ?trans1;
UMOV.64 UR4, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} ?trans1;
UMOV.64 UR4, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R14, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R8, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R16, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R10, R18 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, -R8, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R8, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R18, -R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R6, UR4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xc10 &req={1,0} ?trans5;
MOV.64 R6, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R8, R8, R6, +INF &wr=0x0 ?trans2;
FSEL R12, R8, RZ, P0 &req={0} ?trans1;
FSEL R13, R9, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R8, P0, R5.reuse, UR8, 0x3 ?trans1;
UMOV.64 UR4, 0x3c695355baaafad3 ?trans2;
DMUL R6, R12, UR4 &wr=0x0 ?trans1;
LEA.HI.X R9, R5, UR9, R4, 0x3, P0 ?trans1;
UMOV.64 UR4, 0x3fdbcb7b1526e50e ?trans1;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR10, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R12, UR4, R6 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R8.64], R6 &req={0} &rd=0x1 ?trans1;
@!P0 BRA 0xe0 ?trans5;
EXIT ?trans5;
BRA 0xd00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log10_64(int, double*, double*)
_Z9_log10_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s30, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s28, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s28, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s30, v1
s_cbranch_execz .LBB54_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x55555555
s_mov_b32 s8, 0x6b47b09a
s_mov_b32 s10, 0xbf559e2b
s_mov_b32 s12, 0xd7f4df2e
s_mov_b32 s14, 0x16291751
s_mov_b32 s16, 0x9b27acf1
s_mov_b32 s18, 0x998ef7b6
s_mov_b32 s20, 0x509f79ff
s_mov_b32 s22, 0xa994fd21
s_mov_b32 s24, 0x1526e50e
s_mov_b32 s26, 0xbaaafad3
s_mov_b32 s3, 0x3fe55555
s_mov_b32 s9, 0x3fc38538
s_mov_b32 s11, 0x3fc3ab76
s_mov_b32 s13, 0x3fc7474d
s_mov_b32 s15, 0x3fcc71c0
s_mov_b32 s17, 0x3fd24924
s_mov_b32 s19, 0x3fd99999
s_mov_b32 s21, 0x3fd34413
s_mov_b32 s23, 0xbc49dc1d
s_mov_b32 s25, 0x3fdbcb7b
s_mov_b32 s27, 0x3c695355
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s28
s_mov_b32 s31, 0
s_mov_b32 s28, 0x55555780
.LBB54_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s29, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_frexp_mant_f64_e32 v[6:7], v[4:5]
v_cmp_nge_f64_e64 s0, 0, v[4:5]
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[6:7]
v_cndmask_b32_e64 v0, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ldexp_f64 v[6:7], v[6:7], v0
v_frexp_exp_i32_f64_e32 v0, v[4:5]
v_add_f64 v[8:9], v[6:7], 1.0
v_add_f64 v[14:15], v[6:7], -1.0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
v_rcp_f64_e32 v[10:11], v[8:9]
v_add_f64 v[16:17], v[8:9], -1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], -v[16:17]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[14:15], v[10:11]
v_mul_f64 v[18:19], v[8:9], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[18:19], v[6:7]
v_add_f64 v[16:17], v[14:15], -v[8:9]
v_add_f64 v[18:19], v[8:9], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[16:17]
v_add_f64 v[6:7], v[18:19], -v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[14:15], -v[8:9]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[16:17], v[6:7]
v_mul_f64 v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[12:13], v[6:7]
v_mul_f64 v[10:11], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[10:11], s[10:11], s[8:9]
v_mul_f64 v[16:17], v[8:9], v[10:11]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[18:19]
v_fma_f64 v[10:11], v[10:11], v[14:15], s[28:29]
v_ldexp_f64 v[14:15], v[8:9], 1
v_add_f64 v[8:9], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[10:11], v[16:17], v[10:11]
v_add_f64 v[6:7], v[6:7], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[14:15], v[10:11]
v_ldexp_f64 v[6:7], v[6:7], 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[12:13], -v[14:15]
v_add_f64 v[8:9], v[10:11], -v[8:9]
v_cvt_f64_i32_e32 v[10:11], v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_mul_f64 v[16:17], v[10:11], s[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[12:13], v[6:7]
v_fma_f64 v[18:19], v[10:11], s[20:21], -v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], v[8:9], -v[12:13]
v_mul_f64 v[14:15], v[8:9], s[24:25]
v_fma_f64 v[10:11], v[10:11], s[22:23], v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_fma_f64 v[12:13], v[8:9], s[24:25], -v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], s[24:25], v[12:13]
v_fma_f64 v[6:7], v[8:9], s[26:27], v[6:7]
v_add_f64 v[8:9], v[16:17], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[14:15], v[6:7]
v_add_f64 v[16:17], v[8:9], -v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[8:9], v[12:13]
v_add_f64 v[14:15], v[12:13], -v[14:15]
v_add_f64 v[10:11], v[10:11], -v[16:17]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[20:21], v[18:19], -v[8:9]
v_add_f64 v[6:7], v[6:7], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[22:23], v[18:19], -v[20:21]
v_add_f64 v[12:13], v[12:13], -v[20:21]
v_add_f64 v[14:15], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], -v[22:23]
v_add_f64 v[8:9], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[14:15], -v[10:11]
v_add_f64 v[8:9], v[14:15], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[14:15], v[14:15], -v[12:13]
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_add_f64 v[16:17], v[18:19], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], -v[14:15]
v_add_f64 v[12:13], v[16:17], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], v[10:11]
v_add_f64 v[8:9], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[6:7], v[16:17], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, v6, v4, vcc_lo
v_cndmask_b32_e32 v6, v7, v5, vcc_lo
v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v7, 0x7ff80000, v6, vcc_lo
v_cndmask_b32_e64 v6, 0, v0, s0
v_cmp_neq_f64_e64 s0, 0, v[4:5]
v_cmp_le_i32_e32 vcc_lo, s30, v1
s_or_b32 s31, vcc_lo, s31
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 0xfff00000, v7, s0
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b64 v[2:3], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s31
s_cbranch_execnz .LBB54_2
.LBB54_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log10_64 | 3,582 | 4,811 | stackv2-00014-of-00015 |
// Demangled: _log1p_32(int, float*, float*)
Function : _Z9_log1p_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R7, R7, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR6][R4.64] &req={2} &rd=0x0 &wr=0x2 ?trans1;
HFMA2 R10, -RZ, RZ, 1.625, 0 ?trans1;
MOV R11, 0x3d39bf78 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 &req={0} ?trans1;
FADD.RZ R6, R13.reuse, 1 &req={2} ?trans1;
ISETP.GE.U32.AND P0, PT, R13, 0x7f800000, PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, -0x3f400000, RZ ?trans1;
ISETP.GT.AND P2, PT, R13, -0x40800000, P0 ?WAIT3_END_GROUP;
LOP3.LUT R6, R6, 0xff800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
@P0 MOV R4, 0x7f800000 ?trans1;
IADD3 R9, PT, PT, -R6, 0x40800000, RZ ?trans2;
IADD3 R8, PT, PT, R13.reuse, -R6.reuse, RZ ?trans2;
I2FP.F32.S32 R6, R6 ?trans1;
@P0 FSETP.NEU.AND P1, PT, R13, RZ, PT ?trans1;
FFMA R9, R9, R10, -1 ?WAIT3_END_GROUP;
FMUL R6, R6, 1.1920928955078125e-07 ?trans1;
FADD R8, R8, R9 ?WAIT4_END_GROUP;
FFMA R9, R8, -R11, 0.10546888411045074463 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, -0.13229703903198242188 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, 0.14491446316242218018 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, -0.16641564667224884033 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, 0.19988867640495300293 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, -0.25000196695327758789 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, 0.33333510160446166992 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, -0.5 ?WAIT4_END_GROUP;
FMUL R9, R8, R9 ?WAIT4_END_GROUP;
FFMA R9, R8, R9, R8 ?WAIT4_END_GROUP;
FFMA R9, R6, 0.69314718246459960938, R9 ?trans1;
@P2 FFMA R9, R13, R4, +INF ?trans1;
LEA R4, P2, R0, UR8, 0x2 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R5, R0, UR9, R5, 0x2, P2 ?trans1;
@P0 FSEL R9, R9, -RZ, P1 ?trans1;
IADD3 R0, PT, PT, R7, R0, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R9 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={3} ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x340;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log1p_32(int, float*, float*)
_Z9_log1p_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB55_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s1, 0
s_mov_b32 s3, 0x3e9b6dac
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s9
.LBB55_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, 1.0, v0
v_cmp_gt_f32_e64 s0, 0x33800000, |v0|
v_frexp_mant_f32_e32 v5, v4
v_frexp_exp_i32_f32_e32 v6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v5
v_subrev_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
v_add_f32_e32 v6, -1.0, v4
v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_sub_nc_u32_e32 v7, 0, v5
v_cvt_f32_i32_e32 v5, v5
v_sub_f32_e32 v8, v6, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_ldexp_f32 v4, v4, v7
v_sub_f32_e32 v6, v0, v6
v_add_f32_e32 v8, 1.0, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v9, 1.0, v4
v_add_f32_e32 v6, v6, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v8, -1.0, v9
v_ldexp_f32 v6, v6, v7
v_add_f32_e32 v7, -1.0, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v8, v4, v8
v_add_f32_e32 v10, 1.0, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v8, v6, v8
v_sub_f32_e32 v4, v4, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v10, v9, v8
v_add_f32_e32 v4, v6, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v6, v10
v_sub_f32_e32 v9, v10, v9
v_dual_add_f32 v11, v7, v4 :: v_dual_sub_f32 v8, v8, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_sub_f32_e32 v7, v11, v7
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v12, v11, v6
v_dual_sub_f32 v4, v4, v7 :: v_dual_mul_f32 v13, v10, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, v12, v10, -v13
v_fmac_f32_e32 v9, v12, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v14, v13, v9
v_sub_f32_e32 v15, v11, v14
v_sub_f32_e32 v7, v14, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v11, v11, v15
v_sub_f32_e32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v11, v11, v14
v_add_f32_e32 v4, v4, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v7, v4
v_add_f32_e32 v7, v15, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v9, v6, v7
v_dual_sub_f32 v14, v15, v7 :: v_dual_mul_f32 v11, v10, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v10, v9, v10, -v11
v_fmac_f32_e32 v10, v9, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v8, v11, v10
v_sub_f32_e32 v13, v7, v8
v_sub_f32_e32 v11, v8, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v4, v4, v14 :: v_dual_sub_f32 v7, v7, v13
v_sub_f32_e32 v7, v7, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_f32_e32 v4, v4, v7
v_dual_add_f32 v7, v12, v9 :: v_dual_sub_f32 v8, v11, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v4, v8, v4
v_sub_f32_e32 v8, v7, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v4, v13, v4
v_sub_f32_e32 v8, v9, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v4, v6, v4
v_add_f32_e32 v4, v8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v6, v7, v4
v_mul_f32_e32 v8, v6, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fmaak_f32 v9, s3, v8, 0x3ecc95a3
v_mul_f32_e32 v10, v6, v8
v_fmaak_f32 v8, v8, v9, 0x3f2aaada
v_ldexp_f32 v9, v6, 1
v_sub_f32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v8, v10, v8
v_mul_f32_e32 v10, 0x3f317218, v5
v_dual_sub_f32 v4, v4, v6 :: v_dual_add_f32 v7, v9, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ldexp_f32 v4, v4, 1
v_sub_f32_e32 v6, v7, v9
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, 0x3f317218, v5, -v10
v_dual_sub_f32 v6, v8, v6 :: v_dual_fmac_f32 v9, 0xb102e308, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v4, v4, v6 :: v_dual_add_f32 v5, v10, v9
v_add_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v10, v5, v10
v_dual_add_f32 v8, v5, v6 :: v_dual_sub_f32 v7, v6, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v9, v9, v10
v_sub_f32_e32 v11, v8, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v4, v4, v7
v_sub_f32_e32 v12, v8, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_sub_f32 v6, v6, v11 :: v_dual_add_f32 v7, v9, v4
v_sub_f32_e32 v5, v5, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f32_e32 v5, v6, v5
v_sub_f32_e32 v6, v7, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v5, v7, v5
v_sub_f32_e32 v7, v7, v6
v_sub_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v10, v8, v5
v_dual_sub_f32 v6, v9, v7 :: v_dual_sub_f32 v7, v10, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v4, v4, v6 :: v_dual_sub_f32 v5, v5, v7
v_add_f32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v10, v4
v_cndmask_b32_e32 v4, v4, v0, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, -1.0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, 0x7fc00000, v4, vcc_lo
v_cmp_neq_f32_e32 vcc_lo, -1.0, v0
v_cndmask_b32_e32 v4, 0xff800000, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, v4, v0, s0
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s1, vcc_lo, s1
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB55_2
.LBB55_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log1p_32 | 1,516 | 4,058 | stackv2-00014-of-00015 |
// Demangled: _log1p_64(int, double*, double*)
Function : _Z9_log1p_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R6, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R6, R6, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R8, R7, 0x8, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R8, desc[UR6][R8.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x1410 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R7 ?trans1;
FSETP.GT.AND P0, PT, R9, -1.6999999284744262695, PT &req={2} ?WAIT5_END_GROUP;
FSETP.GEU.OR P0, PT, R9, 1.7916666269302368164, !P0 ?WAIT13_END_GROUP;
@P0 BRA 0x8d0 ?trans5;
DADD R10, R8, 2 &wr=0x0 ?trans1;
MOV R2, 0x1 ?trans1;
MUFU.RCP64H R3, R11 &req={0} &wr=0x0 ?trans1;
FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT ?trans1;
BSSY.RECONVERGENT B1, 0x470 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R10, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R2, R12, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R12, R2, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R8, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R12, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R14, R12 &req={0} &wr=0x0 ?trans2;
FFMA R12, RZ, R11, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R12|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x460 ?trans5;
MOV R14, 0x460 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1480 &req={4,3} ?trans5;
BSYNC.RECONVERGENT B1 &req={4,3} ?trans5;
MOV.64 R14, 0x3ed087ffceb2dc44 ?trans2;
DMUL R2, R8, -R2 &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3eb372fb2fbe14b5 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R10, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, UR4, R14 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ef3b9ff890f468c ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f17457efd51baf8 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f3c71c8de3ce825 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f6249248fa4661f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f899999999d70c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fb5555555555462 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, R14, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x1400 &req={1,0} ?trans5;
DADD R8, R8, 1 &wr=0x0 ?trans1;
MOV R10, 0xfffffc01 ?trans1;
ISETP.GT.AND P0, PT, R9, 0xfffff, PT &req={0} ?trans1;
MOV.64 R2, R8 ?WAIT12_END_GROUP;
@!P0 MOV R10, 0xfffffbcb ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DMUL R2, R2, 1.80143985094819840000e+16 &wr=0x0 ?trans2;
@!P0 MOV R9, R3 &req={0} ?trans1;
@!P0 MOV R8, R2 ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R9, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R11, 0x7feffffe, PT ?WAIT13_END_GROUP;
@P1 BRA 0x13b0 ?trans5;
LOP3.LUT R2, R9, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR4, 0x4330000080000000 ?trans1;
MOV R16, RZ ?trans2;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R2, R8 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R11, PT, PT, R3, -0x100000, RZ ?WAIT5_END_GROUP;
@P0 MOV R3, R11 ?WAIT6_END_GROUP;
DADD R18, R2, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R17, R19 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R2, -1 &rd=0x1 ?trans2;
LEA.HI R2, R9, R10, RZ, 0xc &req={1} ?trans1;
MOV R3, 0x43300000 ?WAIT3_END_GROUP;
@P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R18, R16, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R18, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R2, -UR4 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R8, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R14, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R2, UR4, R8 &req={0} ?trans1;
UMOV.64 UR4, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, UR4, R18 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R2, -UR4, R12 ?trans1;
UMOV.64 UR4, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} ?trans1;
UMOV.64 UR4, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R14, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R8, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R16, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R10, R18 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, -R8, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R8, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R18, -R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R2, UR4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R12, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x1400 &req={1,0} ?trans5;
MOV.64 R8, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R2, R2, R8, +INF &wr=0x0 ?trans2;
FSEL R8, R2, RZ, P0 &req={0} ?trans1;
FSEL R9, R3, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R2, P0, R7, UR8, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R3, R7, UR9, R0, 0x3, P0 ?trans2;
IADD3 R7, PT, PT, R6, R7, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R2.64], R8 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R7, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R15, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x1c50 ?trans1;
LOP3.LUT R22, R11.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R18, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R11|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R11, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R15, R22, PT ?trans1;
MOV R23, R15 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R12, R11, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R13, R18.reuse, 0x63400000, !P1 ?trans1;
@!P2 MOV R24, RZ ?trans1;
MOV R2, R10 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R15, R12, PT ?trans1;
MOV R12, R8 ?trans1;
LOP3.LUT R13, R13, 0x800fffff, R9, 0xf8, !PT ?trans1;
MOV R16, 0x1 ?trans2;
@!P2 SEL R19, R18, 0x63400000, !P3 ?trans1;
@!P0 DMUL R2, R10, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R17, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R22, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ?trans2;
IADD3 R26, PT, PT, R22, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R25, R19, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R12, R12, 2, -R24 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R23, R13, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, R23, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R19, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R26, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R16, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R24, -R2, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R20, R24 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1b00 &req={1,0} ?trans5;
LOP3.LUT R20, R11, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, R15.reuse, -R20.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R15, R20, PT ?trans1;
MOV R20, RZ ?WAIT3_END_GROUP;
VIMNMX.S32 R19, R19, -0x46a00000, !PT ?trans1;
SEL R18, R18, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R19, R19, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, -R18, R19, RZ ?WAIT4_END_GROUP;
IADD3 R21, PT, PT, R15, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R18, R16, R20 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R19|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1c40 ?trans5;
DFMA R2, R16, -R2, R12 &wr=0x0 ?trans1;
MOV R20, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R11, R3, 0x80000000, R11, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R21, R11, R21, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1c40 ?trans5;
IADD3 R3, PT, PT, -R15, RZ, RZ ?trans1;
MOV R2, RZ ?WAIT6_END_GROUP;
DFMA R2, R18, -R2, R16 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R15, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL.RP R16, R16, R20 &wr=0x0 ?trans2;
LOP3.LUT R11, R17, R11, RZ, 0x3c, !PT &req={0} ?trans1;
FSEL R18, R16, R18, !P0 ?WAIT4_END_GROUP;
FSEL R19, R11, R19, !P0 ?trans1;
BRA 0x1c40 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x1c20 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0x1bf0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R23, R22, PT ?trans1;
MOV.64 R18, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1c40 ?trans5;
ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ?trans1;
LOP3.LUT R19, R9, 0x80000000, R11, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R22, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R19, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R18, RZ ?trans1;
@P0 MOV R18, RZ ?WAIT3_END_GROUP;
@P0 MOV R19, R2 ?trans1;
BRA 0x1c40 ?trans6;
LOP3.LUT R19, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R18, R10 ?trans1;
BRA 0x1c40 ?trans6;
LOP3.LUT R19, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R18, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R18 ?trans1;
MOV R3, R19 ?trans2;
RET.REL.NODEC R14 0x0 ?trans5;
BRA 0x1c90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log1p_64(int, double*, double*)
_Z9_log1p_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s26, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s24, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s24, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s26, v1
s_cbranch_execz .LBB56_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x55555555
s_mov_b32 s8, 0x6b47b09a
s_mov_b32 s10, 0xbf559e2b
s_mov_b32 s12, 0xd7f4df2e
s_mov_b32 s14, 0x16291751
s_mov_b32 s16, 0x9b27acf1
s_mov_b32 s18, 0x998ef7b6
s_mov_b32 s20, 0xfefa39ef
s_mov_b32 s22, 0x3b39803f
s_mov_b32 s3, 0x3fe55555
s_mov_b32 s9, 0x3fc38538
s_mov_b32 s11, 0x3fc3ab76
s_mov_b32 s13, 0x3fc7474d
s_mov_b32 s15, 0x3fcc71c0
s_mov_b32 s17, 0x3fd24924
s_mov_b32 s19, 0x3fd99999
s_mov_b32 s21, 0x3fe62e42
s_mov_b32 s23, 0x3c7abc9e
s_mov_b32 s27, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s24
s_mov_b32 s24, 0x55555780
.LBB56_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s25, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_add_f64 v[6:7], v[4:5], 1.0
v_cmp_nge_f64_e64 s0, -1.0, v[4:5]
v_frexp_mant_f64_e32 v[8:9], v[6:7]
v_frexp_exp_i32_f64_e32 v0, v[6:7]
v_add_f64 v[10:11], v[6:7], -1.0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[8:9]
v_add_f64 v[8:9], v[10:11], -v[6:7]
v_add_f64 v[10:11], v[4:5], -v[10:11]
v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[8:9], v[8:9], 1.0
v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[4:5]
v_sub_nc_u32_e32 v14, 0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ldexp_f64 v[6:7], v[6:7], v14
v_add_f64 v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], v[6:7], 1.0
v_add_f64 v[18:19], v[6:7], -1.0
v_ldexp_f64 v[8:9], v[8:9], v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[10:11], v[12:13], -1.0
v_add_f64 v[20:21], v[18:19], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[6:7], -v[10:11]
v_add_f64 v[6:7], v[6:7], -v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[8:9], v[10:11]
v_add_f64 v[6:7], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[12:13], v[10:11]
v_add_f64 v[20:21], v[18:19], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_rcp_f64_e32 v[16:17], v[14:15]
v_add_f64 v[12:13], v[14:15], -v[12:13]
v_add_f64 v[18:19], v[20:21], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], -v[12:13]
s_waitcnt_depctr 0xfff
v_fma_f64 v[22:23], -v[14:15], v[16:17], 1.0
v_add_f64 v[6:7], v[6:7], -v[18:19]
v_fma_f64 v[16:17], v[22:23], v[16:17], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[14:15], v[16:17], 1.0
v_fma_f64 v[8:9], v[8:9], v[16:17], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[16:17], v[20:21], v[8:9]
v_mul_f64 v[22:23], v[14:15], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], v[16:17], v[14:15], -v[22:23]
v_fma_f64 v[12:13], v[16:17], v[10:11], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[24:25], v[22:23], v[12:13]
v_add_f64 v[26:27], v[20:21], -v[24:25]
v_add_f64 v[18:19], v[24:25], -v[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[20:21], v[20:21], -v[26:27]
v_add_f64 v[12:13], v[18:19], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[20:21], v[20:21], -v[24:25]
v_add_f64 v[6:7], v[6:7], v[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[12:13], v[6:7]
v_add_f64 v[12:13], v[26:27], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f64 v[18:19], v[8:9], v[12:13]
v_add_f64 v[24:25], v[26:27], -v[12:13]
v_mul_f64 v[20:21], v[14:15], v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], v[24:25]
v_fma_f64 v[14:15], v[18:19], v[14:15], -v[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[18:19], v[10:11], v[14:15]
v_add_f64 v[14:15], v[20:21], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[22:23], v[12:13], -v[14:15]
v_add_f64 v[20:21], v[14:15], -v[20:21]
v_add_f64 v[12:13], v[12:13], -v[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[20:21], -v[10:11]
v_add_f64 v[12:13], v[12:13], -v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], v[12:13]
v_add_f64 v[12:13], v[16:17], v[18:19]
v_add_f64 v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[12:13], -v[16:17]
v_add_f64 v[6:7], v[22:23], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[18:19], -v[10:11]
v_mul_f64 v[6:7], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[10:11], v[6:7]
v_add_f64 v[8:9], v[12:13], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[8:9], v[8:9]
v_fma_f64 v[14:15], v[10:11], s[10:11], s[8:9]
v_mul_f64 v[16:17], v[8:9], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[12:13]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fma_f64 v[10:11], v[10:11], v[14:15], s[24:25]
v_ldexp_f64 v[14:15], v[8:9], 1
v_add_f64 v[8:9], v[8:9], -v[12:13]
v_mul_f64 v[10:11], v[16:17], v[10:11]
v_cvt_f64_i32_e32 v[16:17], v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[6:7], v[6:7], -v[8:9]
v_add_f64 v[12:13], v[14:15], v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[18:19], v[16:17], s[20:21]
v_ldexp_f64 v[6:7], v[6:7], 1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[8:9], v[12:13], -v[14:15]
v_fma_f64 v[14:15], v[16:17], s[20:21], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[10:11], -v[8:9]
v_fma_f64 v[10:11], v[16:17], s[22:23], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[8:9], v[18:19], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[12:13], v[6:7]
v_add_f64 v[18:19], v[8:9], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[16:17], v[8:9], v[14:15]
v_add_f64 v[12:13], v[14:15], -v[12:13]
v_add_f64 v[10:11], v[10:11], -v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[20:21], v[16:17], -v[8:9]
v_add_f64 v[6:7], v[6:7], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[22:23], v[16:17], -v[20:21]
v_add_f64 v[12:13], v[14:15], -v[20:21]
v_add_f64 v[14:15], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], -v[22:23]
v_add_f64 v[8:9], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[14:15], -v[10:11]
v_add_f64 v[8:9], v[14:15], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[14:15], v[14:15], -v[12:13]
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_add_f64 v[18:19], v[16:17], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], -v[14:15]
v_add_f64 v[12:13], v[18:19], -v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], v[10:11]
v_add_f64 v[8:9], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[6:7], v[18:19], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, v6, v4, vcc_lo
v_cndmask_b32_e32 v6, v7, v5, vcc_lo
v_cmp_ngt_f64_e32 vcc_lo, -1.0, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v7, 0x7ff80000, v6, vcc_lo
v_cndmask_b32_e64 v6, 0, v0, s0
v_cmp_neq_f64_e64 s0, -1.0, v[4:5]
v_cmp_le_i32_e32 vcc_lo, s26, v1
s_or_b32 s27, vcc_lo, s27
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 0xfff00000, v7, s0
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b64 v[2:3], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s27
s_cbranch_execnz .LBB56_2
.LBB56_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log1p_64 | 8,310 | 6,025 | stackv2-00014-of-00015 |
// Demangled: _log2_32(int, float*, float*)
Function : _Z8_log2_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R9, R9, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R2 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R6.64] &req={2} &rd=0x0 &wr=0x2 ?trans1;
HFMA2 R13, -RZ, RZ, 1.443359375, -0.2030029296875 ?trans1;
MOV R7, 0x7f800000 &req={0} ?trans1;
FSETP.GEU.AND P0, PT, R8, 1.175494350822287508e-38, PT &req={2} ?WAIT5_END_GROUP;
FSEL R6, RZ, -23, P0 ?WAIT8_END_GROUP;
@!P0 FMUL R8, R8, 8388608 ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, R8.reuse, -0x3f3504f3, RZ ?trans1;
ISETP.GT.U32.AND P0, PT, R8.reuse, 0x7f7fffff, PT ?trans1;
FSETP.NEU.AND P1, PT, R8, RZ, PT ?trans2;
LOP3.LUT R11, R10, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R8, -R11.reuse, RZ ?trans2;
I2FP.F32.S32 R11, R11 ?WAIT3_END_GROUP;
FADD R10, R10, -1 ?trans2;
FFMA R6, R11, 1.1920928955078125e-07, R6 ?trans2;
FFMA R13, R10, R13, -0.16845393180847167969 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.1716887056827545166 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.17900948226451873779 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.20512372255325317383 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.24046532809734344482 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.28857114911079406738 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.36067417263984680176 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.48089820146560668945 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.72134751081466674805 ?WAIT4_END_GROUP;
FMUL R13, R10, R13 ?WAIT4_END_GROUP;
FMUL R13, R10, R13 ?WAIT4_END_GROUP;
FFMA R13, R10, 1.4426950216293334961, R13 ?WAIT4_END_GROUP;
FADD R13, R6, R13 ?trans1;
@P0 FFMA R13, R8, R7, +INF ?trans1;
IMAD.WIDE R6, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT3_END_GROUP;
FSEL R13, R13, -INF , P1 ?trans2;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT3_END_GROUP;
STG.E desc[UR6][R6.64], R13 &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x310;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log2_32(int, float*, float*)
_Z8_log2_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB57_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB57_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_mul_f32_e32 v0, v0, v4
v_cndmask_b32_e64 v4, 0, 0x42000000, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_log_f32_e32 v0, v0
s_or_b32 s2, vcc_lo, s2
s_waitcnt_depctr 0xfff
v_sub_f32_e32 v0, v0, v4
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB57_2
.LBB57_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log2_32 | 1,521 | 823 | stackv2-00014-of-00015 |
// Demangled: _log2_64(int, double*, double*)
Function : _Z8_log2_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x8, R2 &req={1,0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xc20 ?trans1;
MOV R11, 0xfffffc01 ?trans1;
ISETP.GT.AND P0, PT, R7, 0xfffff, PT &req={2} ?trans1;
MOV.64 R8, R6 ?trans2;
MOV R10, R7 ?WAIT10_END_GROUP;
@!P0 DMUL R8, R8, 1.80143985094819840000e+16 &wr=0x0 ?trans1;
@!P0 MOV R11, 0xfffffbcb ?trans1;
@!P0 MOV R10, R9 &req={0} ?trans1;
@!P0 MOV R6, R8 ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R4, 0x7feffffe, PT ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R5 ?WAIT12_END_GROUP;
@P1 BRA 0xbc0 ?trans5;
LOP3.LUT R7, R10, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR4, 0x4330000080000000 ?trans1;
MOV R16, RZ ?trans2;
LOP3.LUT R7, R7, 0x3ff00000, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R9, PT, PT, R7, -0x100000, RZ ?WAIT5_END_GROUP;
@P0 MOV R7, R9 ?WAIT6_END_GROUP;
DADD R18, R6, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R17, R19 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R6, -1 &rd=0x1 ?trans2;
LEA.HI R6, R10, R11, RZ, 0xc &req={1} ?trans1;
MOV R7, 0x43300000 ?WAIT3_END_GROUP;
@P0 IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R18, R16, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R18, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, -UR4 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R8, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R14, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R6, UR4, R8 &req={0} ?trans1;
UMOV.64 UR4, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, UR4, R18 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R6, -UR4, R12 ?trans1;
UMOV.64 UR4, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} ?trans1;
UMOV.64 UR4, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R14, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R8, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R16, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R10, R18 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, -R8, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R8, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R18, -R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R6, UR4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xc10 &req={1,0} ?trans5;
MOV.64 R6, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R8, R8, R6, +INF &wr=0x0 ?trans2;
FSEL R12, R8, RZ, P0 &req={0} ?trans1;
FSEL R13, R9, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R8, P0, R5.reuse, UR8, 0x3 ?trans1;
UMOV.64 UR4, 0x3c7777d0ffda0d24 ?trans2;
DMUL R6, R12, UR4 &wr=0x0 ?trans1;
LEA.HI.X R9, R5, UR9, R4, 0x3, P0 ?trans1;
UMOV.64 UR4, 0x3ff71547652b82fe ?trans1;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR10, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R12, UR4, R6 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R8.64], R6 &req={0} &rd=0x1 ?trans1;
@!P0 BRA 0xe0 ?trans5;
EXIT ?trans5;
BRA 0xd00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log2_64(int, double*, double*)
_Z8_log2_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s26, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s24, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s24, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s26, v1
s_cbranch_execz .LBB58_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x55555555
s_mov_b32 s8, 0x6b47b09a
s_mov_b32 s10, 0xbf559e2b
s_mov_b32 s12, 0xd7f4df2e
s_mov_b32 s14, 0x16291751
s_mov_b32 s16, 0x9b27acf1
s_mov_b32 s18, 0x998ef7b6
s_mov_b32 s20, 0x652b82fe
s_mov_b32 s22, 0xffda0d24
s_mov_b32 s3, 0x3fe55555
s_mov_b32 s9, 0x3fc38538
s_mov_b32 s11, 0x3fc3ab76
s_mov_b32 s13, 0x3fc7474d
s_mov_b32 s15, 0x3fcc71c0
s_mov_b32 s17, 0x3fd24924
s_mov_b32 s19, 0x3fd99999
s_mov_b32 s21, 0x3ff71547
s_mov_b32 s23, 0x3c7777d0
s_mov_b32 s27, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s24
s_mov_b32 s24, 0x55555780
.LBB58_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s25, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_frexp_mant_f64_e32 v[6:7], v[4:5]
v_cmp_nge_f64_e64 s0, 0, v[4:5]
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[6:7]
v_cndmask_b32_e64 v0, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ldexp_f64 v[6:7], v[6:7], v0
v_frexp_exp_i32_f64_e32 v0, v[4:5]
v_add_f64 v[8:9], v[6:7], 1.0
v_add_f64 v[14:15], v[6:7], -1.0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
v_rcp_f64_e32 v[10:11], v[8:9]
v_add_f64 v[16:17], v[8:9], -1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], -v[16:17]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[14:15], v[10:11]
v_mul_f64 v[18:19], v[8:9], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[18:19], v[6:7]
v_add_f64 v[16:17], v[14:15], -v[8:9]
v_add_f64 v[18:19], v[8:9], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[16:17]
v_add_f64 v[6:7], v[18:19], -v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[14:15], -v[8:9]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[16:17], v[6:7]
v_mul_f64 v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[12:13], v[6:7]
v_mul_f64 v[10:11], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[10:11], s[10:11], s[8:9]
v_mul_f64 v[16:17], v[8:9], v[10:11]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[18:19]
v_fma_f64 v[10:11], v[10:11], v[14:15], s[24:25]
v_ldexp_f64 v[14:15], v[8:9], 1
v_add_f64 v[8:9], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[10:11], v[16:17], v[10:11]
v_add_f64 v[6:7], v[6:7], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[14:15], v[10:11]
v_ldexp_f64 v[6:7], v[6:7], 1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[12:13], -v[14:15]
v_add_f64 v[8:9], v[10:11], -v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[8:9], v[12:13], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[8:9], -v[12:13]
v_mul_f64 v[12:13], v[8:9], s[20:21]
v_add_f64 v[6:7], v[6:7], -v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], s[20:21], -v[12:13]
v_fma_f64 v[6:7], v[6:7], s[20:21], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[6:7], v[8:9], s[22:23], v[6:7]
v_cvt_f64_i32_e32 v[8:9], v0
v_add_f64 v[10:11], v[12:13], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[10:11], v[8:9]
v_add_f64 v[12:13], v[10:11], -v[12:13]
v_add_f64 v[16:17], v[14:15], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_add_f64 v[18:19], v[16:17], -v[14:15]
v_add_f64 v[10:11], v[10:11], -v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[18:19], v[8:9]
v_add_f64 v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[6:7], v[14:15], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, v6, v4, vcc_lo
v_cndmask_b32_e32 v6, v7, v5, vcc_lo
v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v7, 0x7ff80000, v6, vcc_lo
v_cndmask_b32_e64 v6, 0, v0, s0
v_cmp_neq_f64_e64 s0, 0, v[4:5]
v_cmp_le_i32_e32 vcc_lo, s26, v1
s_or_b32 s27, vcc_lo, s27
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v7, 0xfff00000, v7, s0
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b64 v[2:3], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s27
s_cbranch_execnz .LBB58_2
.LBB58_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log2_64 | 3,583 | 4,032 | stackv2-00014-of-00015 |
// Demangled: _log_32(int, float*, float*)
Function : _Z7_log_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R9, R9, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R0, 0x4, R2 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR6][R6.64] &req={2} &rd=0x0 &wr=0x2 ?trans1;
HFMA2 R13, -RZ, RZ, 1.5048828125, 33.21875 ?trans1;
MOV R7, 0x7f800000 &req={0} ?trans1;
FSETP.GEU.AND P0, PT, R8, 1.175494350822287508e-38, PT &req={2} ?WAIT5_END_GROUP;
FSEL R6, RZ, -23, P0 ?WAIT8_END_GROUP;
@!P0 FMUL R8, R8, 8388608 ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, R8.reuse, -0x3f2aaaab, RZ ?trans1;
ISETP.GT.U32.AND P0, PT, R8.reuse, 0x7f7fffff, PT ?trans1;
FSETP.NEU.AND P1, PT, R8, RZ, PT ?trans2;
LOP3.LUT R11, R10, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R8, -R11.reuse, RZ ?trans2;
I2FP.F32.S32 R11, R11 ?WAIT3_END_GROUP;
FADD R10, R10, -1 ?trans2;
FFMA R6, R11, 1.1920928955078125e-07, R6 ?trans2;
FFMA R13, R10, -R13, 0.14084610342979431152 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.12148627638816833496 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.13980610668659210205 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.16684235632419586182 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.20012299716472625732 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.24999669194221496582 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, 0.33333182334899902344 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, -0.5 ?WAIT4_END_GROUP;
FMUL R13, R10, R13 ?WAIT4_END_GROUP;
FFMA R13, R10, R13, R10 ?WAIT4_END_GROUP;
FFMA R13, R6, 0.69314718246459960938, R13 ?trans1;
@P0 FFMA R13, R8, R7, +INF ?trans1;
IMAD.WIDE R6, R0, 0x4, R4 &req={3} ?trans1;
IADD3 R0, PT, PT, R9, R0, RZ ?WAIT3_END_GROUP;
FSEL R13, R13, -INF , P1 ?trans2;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT3_END_GROUP;
STG.E desc[UR6][R6.64], R13 &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x2f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log_32(int, float*, float*)
_Z7_log_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB51_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB51_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v4
v_log_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v4, 0x3f317217, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, 0x3f317217, v0, -v4
v_fmac_f32_e32 v5, 0x3377d1cf, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_f32_e32 v4, v4, v5
v_cndmask_b32_e64 v5, 0, 0x41b17218, vcc_lo
v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_f32_e32 v0, v0, v5
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB51_2
.LBB51_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log_32 | 1,425 | 1,070 | stackv2-00014-of-00015 |
// Demangled: _log_64(int, double*, double*)
Function : _Z7_log_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xc20 ?trans1;
MOV R11, 0xfffffc01 ?trans1;
ISETP.GT.AND P0, PT, R7, 0xfffff, PT &req={2} ?trans1;
MOV.64 R8, R6 ?trans2;
MOV R10, R7 ?WAIT10_END_GROUP;
@!P0 DMUL R8, R8, 1.80143985094819840000e+16 &wr=0x0 ?trans1;
@!P0 MOV R11, 0xfffffbcb ?trans1;
@!P0 MOV R10, R9 &req={0} ?trans1;
@!P0 MOV R6, R8 ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R4, 0x7feffffe, PT ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R5 ?WAIT12_END_GROUP;
@P1 BRA 0xbc0 ?trans5;
LOP3.LUT R7, R10, 0xfffff, RZ, 0xc0, !PT ?trans1;
UMOV.64 UR4, 0x4330000080000000 ?trans1;
MOV R16, RZ ?trans2;
LOP3.LUT R7, R7, 0x3ff00000, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, 0x3ff6a09f, PT ?WAIT13_END_GROUP;
@P0 IADD3 R9, PT, PT, R7, -0x100000, RZ ?WAIT5_END_GROUP;
@P0 MOV R7, R9 ?WAIT6_END_GROUP;
DADD R18, R6, 1 &wr=0x0 ?trans2;
MUFU.RCP64H R17, R19 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R6, -1 &rd=0x1 ?trans2;
LEA.HI R6, R10, R11, RZ, 0xc &req={1} ?trans1;
MOV R7, 0x43300000 ?WAIT3_END_GROUP;
@P0 IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R6, R6, 0x80000000, RZ, 0x3c, !PT ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R18, R16, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R18, 0x3ed0ee258b7a8b04 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, -UR4 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R8, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R14, R16, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R6, UR4, R8 &req={0} ?trans1;
UMOV.64 UR4, 0x3eb1380b3ae80f1e ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R8, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, UR4, R18 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R6, -UR4, R12 ?trans1;
UMOV.64 UR4, 0x3ef3b2669f02676f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f1745cba9ab0956 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f3c71c72d1b5154 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f624924923be72d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8999999999a3c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &req={0} ?trans1;
UMOV.64 UR4, 0x3fb5555555555554 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R14, -R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R14, -R8, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R18, UR4 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R16, R20 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R10, R18 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, -R8, R22 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R8, R18, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R14, R18, -R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R6, UR4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R12, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xc10 &req={1,0} ?trans5;
MOV.64 R6, 0x7ff0000000000000 ?WAIT3_END_GROUP;
LOP3.LUT P0, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
DFMA R8, R8, R6, +INF &wr=0x0 ?trans2;
FSEL R12, R8, RZ, P0 &req={0} ?trans1;
FSEL R13, R9, -QNAN , P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R6, P0, R5, UR8, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R7, R5, UR9, R4, 0x3, P0 ?trans2;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R6.64], R12 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R5, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0xc90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _log_64(int, double*, double*)
_Z7_log_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s26, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s24, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s24, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s26, v1
s_cbranch_execz .LBB52_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x55555555
s_mov_b32 s8, 0x6b47b09a
s_mov_b32 s10, 0xbf559e2b
s_mov_b32 s12, 0xd7f4df2e
s_mov_b32 s14, 0x16291751
s_mov_b32 s16, 0x9b27acf1
s_mov_b32 s18, 0x998ef7b6
s_mov_b32 s20, 0xfefa39ef
s_mov_b32 s22, 0x3b39803f
s_mov_b32 s3, 0x3fe55555
s_mov_b32 s9, 0x3fc38538
s_mov_b32 s11, 0x3fc3ab76
s_mov_b32 s13, 0x3fc7474d
s_mov_b32 s15, 0x3fcc71c0
s_mov_b32 s17, 0x3fd24924
s_mov_b32 s19, 0x3fd99999
s_mov_b32 s21, 0x3fe62e42
s_mov_b32 s23, 0x3c7abc9e
s_mov_b32 s27, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s24
s_mov_b32 s24, 0x55555780
.LBB52_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s25, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_frexp_mant_f64_e32 v[6:7], v[4:5]
v_cmp_nge_f64_e64 s0, 0, v[4:5]
v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[6:7]
v_cndmask_b32_e64 v0, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ldexp_f64 v[6:7], v[6:7], v0
v_frexp_exp_i32_f64_e32 v0, v[4:5]
v_add_f64 v[8:9], v[6:7], 1.0
v_add_f64 v[14:15], v[6:7], -1.0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
v_rcp_f64_e32 v[10:11], v[8:9]
v_add_f64 v[16:17], v[8:9], -1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], -v[16:17]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[14:15], v[10:11]
v_mul_f64 v[18:19], v[8:9], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
v_fma_f64 v[6:7], v[12:13], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[18:19], v[6:7]
v_add_f64 v[16:17], v[14:15], -v[8:9]
v_add_f64 v[18:19], v[8:9], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[16:17]
v_add_f64 v[6:7], v[18:19], -v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[14:15], -v[8:9]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[16:17], v[6:7]
v_mul_f64 v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[12:13], v[6:7]
v_mul_f64 v[10:11], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[10:11], s[10:11], s[8:9]
v_mul_f64 v[16:17], v[8:9], v[10:11]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], s[18:19]
v_fma_f64 v[10:11], v[10:11], v[14:15], s[24:25]
v_ldexp_f64 v[14:15], v[8:9], 1
v_add_f64 v[8:9], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_f64 v[10:11], v[16:17], v[10:11]
v_cvt_f64_i32_e32 v[16:17], v0
v_add_f64 v[6:7], v[6:7], -v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], v[14:15], v[10:11]
v_mul_f64 v[18:19], v[16:17], s[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ldexp_f64 v[6:7], v[6:7], 1
v_add_f64 v[8:9], v[12:13], -v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[16:17], s[20:21], -v[18:19]
v_add_f64 v[8:9], v[10:11], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[10:11], v[16:17], s[22:23], v[14:15]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[18:19], v[10:11]
v_add_f64 v[14:15], v[12:13], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[8:9], -v[18:19]
v_add_f64 v[16:17], v[8:9], v[14:15]
v_add_f64 v[12:13], v[14:15], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[10:11], v[10:11], -v[18:19]
v_add_f64 v[20:21], v[16:17], -v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_add_f64 v[22:23], v[16:17], -v[20:21]
v_add_f64 v[12:13], v[14:15], -v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[14:15], v[10:11], v[6:7]
v_add_f64 v[8:9], v[8:9], -v[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[8:9], v[12:13], v[8:9]
v_add_f64 v[12:13], v[14:15], -v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[14:15], v[8:9]
v_add_f64 v[14:15], v[14:15], -v[12:13]
v_add_f64 v[6:7], v[6:7], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[16:17], v[8:9]
v_add_f64 v[10:11], v[10:11], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[18:19], -v[16:17]
v_add_f64 v[6:7], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], -v[12:13]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[18:19], v[6:7]
v_cndmask_b32_e32 v0, v6, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, v7, v5, vcc_lo
v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
v_cndmask_b32_e32 v7, 0x7ff80000, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v6, 0, v0, s0
v_cmp_neq_f64_e64 s0, 0, v[4:5]
v_cmp_le_i32_e32 vcc_lo, s26, v1
s_or_b32 s27, vcc_lo, s27
v_cndmask_b32_e64 v7, 0xfff00000, v7, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b64 v[2:3], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s27
s_cbranch_execnz .LBB52_2
.LBB52_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _log_64 | 3,447 | 4,435 | stackv2-00014-of-00015 |
// Demangled: _lzorelu_32(int, float*, float*)
Function : _Z11_lzorelu_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
UMOV.64 UR8, 0x3eb0c6f7a0b5ed8d ?trans1;
F2F.F64.F32 R4, R2 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GEU.AND P0, PT, R4, UR8, PT &req={0} &rd=0x0 &wr=0x1 ?trans2;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,0} ?trans1;
FSEL R13, R2, 9.9999999747524270788e-07, P0 &req={1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _lzorelu_32(int, float*, float*)
_Z11_lzorelu_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB63_3
s_load_b32 s10, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s2, 0xa0b5ed8d
s_mov_b32 s3, 0x3eb0c6f7
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s10, s9
s_mov_b32 s9, 0
.LBB63_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
global_load_b32 v0, v[4:5], off
s_or_b32 s9, vcc_lo, s9
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ngt_f64_e64 s0, s[2:3], v[4:5]
v_cndmask_b32_e64 v0, 0x358637bd, v0, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB63_2
.LBB63_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _lzorelu_32 | 774 | 803 | stackv2-00014-of-00015 |
// Demangled: _lzorelu_64(int, double*, double*)
Function : _Z11_lzorelu_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
UMOV.64 UR8, 0x3eb0c6f7a0b5ed8d ?trans1;
IMAD.WIDE R4, R0, 0x8, R10 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?trans1;
DSETP.GEU.AND P0, PT, R2, UR8, PT &req={2} &wr=0x0 ?trans2;
FSEL R6, R2, -3.0819790611203132499e-19, P0 &req={0} ?trans1;
FSEL R7, R3, 0.34526798129081726074, P0 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R4.64], R6 &rd=0x1 ?trans9;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _lzorelu_64(int, double*, double*)
_Z11_lzorelu_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB64_3
s_load_b32 s10, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s2, 0xa0b5ed8d
s_mov_b32 s3, 0x3eb0c6f7
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s10, s9
s_mov_b32 s9, 0
.LBB64_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e64 s0, s8, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
s_or_b32 s9, s0, s9
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[4:5]
v_cndmask_b32_e32 v5, 0x3eb0c6f7, v5, vcc_lo
v_cndmask_b32_e32 v4, 0xa0b5ed8d, v4, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB64_2
.LBB64_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _lzorelu_64 | 749 | 788 | stackv2-00014-of-00015 |
// Demangled: _neg_32(int, float*, float*)
Function : _Z7_neg_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FADD R13, -R2, -RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans7;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _neg_32(int, float*, float*)
_Z7_neg_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB59_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB59_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b32 v0, v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_xor_b32_e32 v0, 0x80000000, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB59_2
.LBB59_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _neg_32 | 605 | 662 | stackv2-00014-of-00015 |
// Demangled: _neg_64(int, double*, double*)
Function : _Z7_neg_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x8, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
DADD R10, -RZ, -R2 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R4.64], R10 &req={0} &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _neg_64(int, double*, double*)
_Z7_neg_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB60_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB60_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b64 v[4:5], v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_xor_b32_e32 v5, 0x80000000, v5
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB60_2
.LBB60_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _neg_64 | 621 | 668 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_1_3_2_32_44(float*, int, int, int, float*, int, int, int)
Function : _Z26_permutedims3D_1_3_2_32_44PfiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R0, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R7, R2 ?trans1;
LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R7 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R10, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R16, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R10 &req={0} ?trans2;
IABS R21, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R19, R14 &wr=0x0 ?trans1;
IABS R24, R0 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R18, R21, R17, R18 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R18, PT ?trans1;
MUFU.RCP R19, R19 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R18, PT, PT, R18, -R21, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R18, R7, PT ?trans1;
IADD3 R17, PT, PT, R19, 0xffffffe, RZ &req={0} ?trans2;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?WAIT5_END_GROUP;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R19, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IMAD R19, R19, R14, RZ ?trans2;
@!P2 LOP3.LUT R18, RZ, R9, RZ, 0x33, !PT ?trans2;
IMAD.HI.U32 R16, R17, R19, R16 ?trans2;
IABS R21, R18 ?trans2;
IABS R19, R0 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R19 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R18.reuse, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans1;
IMAD R18, R9, R18, R15 ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R20, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R10, RZ, 0x33, !PT ?trans1;
IMAD R23, R20, R19, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R18 ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R16, R15, RZ ?trans2;
IABS R16, R8 ?trans2;
IABS R22, R21 ?WAIT3_END_GROUP;
MOV R20, R16 ?trans1;
MOV R16, RZ ?trans1;
LOP3.LUT R21, R21, R0, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R17, R23, R16 ?trans1;
MOV R17, R22 ?trans1;
I2F.RP R23, R20 &wr=0x0 ?trans1;
MOV R22, R24 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R22, R16, R22, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R19, R22, PT ?trans1;
MUFU.RCP R23, R23 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R22, PT, PT, R22, -R19.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R21, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R22, R19, PT ?trans1;
IADD3 R17, PT, PT, R23, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R0, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R19, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R14, UR9, R17 ?WAIT4_END_GROUP;
IMAD R17, R17, UR8, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x4, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E desc[UR6][R18.64], R17 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_1_3_2_32_44(float*, int, int, int, float*, int, int, int)
_Z26_permutedims3D_1_3_2_32_44PfiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB98_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v5, v6, v8
.LBB98_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v10, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v10
v_add_nc_u32_e32 v7, v10, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v8
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v8
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v7
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v9, v6, v5
v_mul_lo_u32 v9, v9, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v9
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_sub_nc_u32_e32 v9, v11, v8
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_mad_u64_u32 v[7:8], null, v9, s11, v[6:7]
v_mul_lo_u32 v6, v10, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v7, v7, s10
v_sub_nc_u32_e32 v6, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v6
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
global_load_b32 v8, v[6:7], off
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s7, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v6, s0, s2, v6
v_add_co_ci_u32_e64 v7, s0, s3, v7, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b32 v[6:7], v8, off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB98_2
.LBB98_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_1_3_2_32_44 | 3,363 | 4,075 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_1_3_2_64_44(double*, int, int, int, double*, int, int, int)
Function : _Z26_permutedims3D_1_3_2_64_44PdiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R7, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R7, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R0, R2 ?trans1;
LDC R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R0 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R8, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R11, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R11, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R8 &req={0} ?trans2;
IABS R20, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R19, R14 &wr=0x0 ?trans1;
IABS R24, R7 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R17, R20, R17, R18 ?trans1;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R17, PT ?trans1;
MUFU.RCP R19, R19 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R0, PT ?trans1;
IADD3 R17, PT, PT, R19, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R19, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IMAD R19, R19, R14, RZ ?trans2;
@!P2 LOP3.LUT R18, RZ, R9, RZ, 0x33, !PT ?trans2;
IMAD.HI.U32 R16, R17, R19, R16 ?trans2;
IABS R21, R18 ?trans2;
IABS R19, R7 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R19 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R18.reuse, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans1;
IMAD R18, R9, R18, R15 ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R20, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R8, RZ, 0x33, !PT ?trans1;
IMAD R21, R20, R19, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R18 ?WAIT5_END_GROUP;
IADD3 R22, PT, PT, -R16, R15, RZ ?trans2;
IABS R16, R10 ?trans2;
IABS R23, R22 ?WAIT3_END_GROUP;
MOV R20, R16 ?trans1;
MOV R16, RZ ?trans1;
LOP3.LUT R22, R22, R7, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
MOV R17, R23 ?trans1;
I2F.RP R21, R20 &wr=0x0 ?trans4;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R24, R16, R24, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R19, R24, PT ?trans1;
MUFU.RCP R21, R21 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R24, PT, PT, R24, -R19.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R22, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R24, R19, PT ?trans1;
IADD3 R17, PT, PT, R21, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R7, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R19, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R14, UR9, R17 ?WAIT4_END_GROUP;
IMAD R17, R17, UR8, R18 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R2 ?WAIT6_END_GROUP;
LDG.E.64 R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x8, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E.64 desc[UR6][R18.64], R16 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x830;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_1_3_2_64_44(double*, int, int, int, double*, int, int, int)
_Z26_permutedims3D_1_3_2_64_44PdiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB99_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v5, v6, v8
.LBB99_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v10, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v10
v_add_nc_u32_e32 v7, v10, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v8
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v8
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v7
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v9, v6, v5
v_mul_lo_u32 v9, v9, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v9
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_sub_nc_u32_e32 v9, v11, v8
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_mad_u64_u32 v[7:8], null, v9, s11, v[6:7]
v_mul_lo_u32 v6, v10, s4
v_lshlrev_b64 v[8:9], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v7, v7, s10
v_add_co_u32 v8, s0, s2, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
v_sub_nc_u32_e32 v6, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v6, v1, v6
v_add_nc_u32_e32 v1, s1, v1
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_add_co_u32 v6, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s7, v1
global_load_b64 v[6:7], v[6:7], off
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b64 v[8:9], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB99_2
.LBB99_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_1_3_2_64_44 | 3,351 | 4,063 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_2_1_3_32_44(float*, int, int, int, float*, int, int, int)
Function : _Z26_permutedims3D_2_1_3_32_44PfiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R0, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R7, R2 ?trans1;
LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R7 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R10, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R16, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R10 &req={0} ?trans2;
IABS R21, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R19, R14 &wr=0x0 ?trans1;
IABS R24, R0 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R18, R21, R17, R18 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R18, PT ?trans1;
MUFU.RCP R19, R19 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R18, PT, PT, R18, -R21, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R18, R7, PT ?trans1;
IADD3 R17, PT, PT, R19, 0xffffffe, RZ &req={0} ?trans2;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?WAIT5_END_GROUP;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R19, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IMAD R19, R19, R14, RZ ?trans2;
@!P2 LOP3.LUT R18, RZ, R9, RZ, 0x33, !PT ?trans2;
IMAD.HI.U32 R16, R17, R19, R16 ?trans2;
IABS R21, R18 ?trans2;
IABS R19, R0 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R19 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R18.reuse, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans1;
IMAD R18, R9, R18, R15 ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R20, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R10, RZ, 0x33, !PT ?trans1;
IMAD R23, R20, R19, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R18 ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R16, R15, RZ ?trans2;
IABS R16, R8 ?trans2;
IABS R22, R21 ?WAIT3_END_GROUP;
MOV R20, R16 ?trans1;
MOV R16, RZ ?trans1;
LOP3.LUT R21, R21, R0, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R17, R23, R16 ?trans1;
MOV R17, R22 ?trans1;
I2F.RP R23, R20 &wr=0x0 ?trans1;
MOV R22, R24 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R22, R16, R22, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R19, R22, PT ?trans1;
MUFU.RCP R23, R23 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R22, PT, PT, R22, -R19.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R21, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R22, R19, PT ?trans1;
IADD3 R17, PT, PT, R23, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R0, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R19, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R17, UR9, R18 ?WAIT4_END_GROUP;
IMAD R17, R17, UR8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x4, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E desc[UR6][R18.64], R17 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_2_1_3_32_44(float*, int, int, int, float*, int, int, int)
_Z26_permutedims3D_2_1_3_32_44PfiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB100_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v5, v6, v8
.LBB100_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v7
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v9, v6, v5
v_mul_lo_u32 v9, v9, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v9
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v7
v_mul_lo_u32 v7, v8, s4
v_mul_lo_u32 v6, v6, s11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v7, v6, v7
v_sub_nc_u32_e32 v6, v11, v10
v_add_nc_u32_e32 v9, v1, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[7:8], null, v9, s10, v[6:7]
v_ashrrev_i32_e32 v8, 31, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[7:8]
v_add_co_u32 v6, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
global_load_b32 v8, v[6:7], off
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s7, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v6, s0, s2, v6
v_add_co_ci_u32_e64 v7, s0, s3, v7, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b32 v[6:7], v8, off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB100_2
.LBB100_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_2_1_3_32_44 | 3,363 | 4,083 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_2_1_3_64_44(double*, int, int, int, double*, int, int, int)
Function : _Z26_permutedims3D_2_1_3_64_44PdiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R7, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R7, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R0, R2 ?trans1;
LDC R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R0 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R8, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R11, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R11, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R8 &req={0} ?trans2;
IABS R20, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R19, R14 &wr=0x0 ?trans1;
IABS R24, R7 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R17, R20, R17, R18 ?trans1;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R17, PT ?trans1;
MUFU.RCP R19, R19 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R0, PT ?trans1;
IADD3 R17, PT, PT, R19, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R19, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IMAD R19, R19, R14, RZ ?trans2;
@!P2 LOP3.LUT R18, RZ, R9, RZ, 0x33, !PT ?trans2;
IMAD.HI.U32 R16, R17, R19, R16 ?trans2;
IABS R21, R18 ?trans2;
IABS R19, R7 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R19 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R18.reuse, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans1;
IMAD R18, R9, R18, R15 ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R20, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R8, RZ, 0x33, !PT ?trans1;
IMAD R21, R20, R19, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R18 ?WAIT5_END_GROUP;
IADD3 R22, PT, PT, -R16, R15, RZ ?trans2;
IABS R16, R10 ?trans2;
IABS R23, R22 ?WAIT3_END_GROUP;
MOV R20, R16 ?trans1;
MOV R16, RZ ?trans1;
LOP3.LUT R22, R22, R7, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
MOV R17, R23 ?trans1;
I2F.RP R21, R20 &wr=0x0 ?trans4;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R24, R16, R24, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R19, R24, PT ?trans1;
MUFU.RCP R21, R21 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R24, PT, PT, R24, -R19.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R22, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R24, R19, PT ?trans1;
IADD3 R17, PT, PT, R21, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R7, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R19, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R17, UR9, R18 ?WAIT4_END_GROUP;
IMAD R17, R17, UR8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R2 ?WAIT6_END_GROUP;
LDG.E.64 R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x8, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E.64 desc[UR6][R18.64], R16 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x830;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_2_1_3_64_44(double*, int, int, int, double*, int, int, int)
_Z26_permutedims3D_2_1_3_64_44PdiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB101_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v5, v6, v8
.LBB101_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v7
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v9, v6, v5
v_mul_lo_u32 v9, v9, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v9
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v7
v_mul_lo_u32 v7, v8, s4
v_mul_lo_u32 v6, v6, s11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v7, v6, v7
v_sub_nc_u32_e32 v6, v11, v10
v_add_nc_u32_e32 v9, v1, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[7:8], null, v9, s10, v[6:7]
v_ashrrev_i32_e32 v8, 31, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 3, v[7:8]
v_lshlrev_b64 v[8:9], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v6, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s7, v1
v_add_co_u32 v8, s0, s2, v8
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b64 v[8:9], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB101_2
.LBB101_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_2_1_3_64_44 | 3,351 | 4,056 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_2_3_1_32_44(float*, int, int, int, float*, int, int, int)
Function : _Z26_permutedims3D_2_3_1_32_44PfiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R0, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R7, R2 ?trans1;
LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R7 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R10, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R16, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R10 &req={0} ?trans2;
IABS R19, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R20, R14 &wr=0x0 ?trans1;
IABS R24, R0 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R18, R19, R17, R18 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R18, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R18, PT, PT, R18, -R19, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R18, R7, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans2;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?WAIT5_END_GROUP;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R9, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R14, RZ ?WAIT3_END_GROUP;
IABS R18, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?WAIT4_END_GROUP;
MOV R21, R18 ?trans1;
IABS R18, R0 ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R18 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?trans1;
IADD3 R16, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R19, RZ, PT ?trans1;
IMAD R19, R9, R16, R15 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans2;
IABS R20, R8 ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R23, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R10, RZ, 0x33, !PT ?trans1;
IMAD R23, R23, R18, RZ ?WAIT4_END_GROUP;
IMAD R16, R14.reuse, R9, R19.reuse ?trans2;
IMAD R14, R14, UR9, R19 ?WAIT3_END_GROUP;
IADD3 R21, PT, PT, -R16, R15, RZ ?trans1;
MOV R16, RZ ?WAIT3_END_GROUP;
IABS R22, R21 ?trans2;
IMAD.HI.U32 R16, R17, R23, R16 ?trans1;
IADD3 R23, PT, PT, RZ, -R24, RZ ?trans2;
LOP3.LUT R21, R21, R0, RZ, 0x3c, !PT ?trans1;
MOV R17, R22 ?trans2;
I2F.RP R22, R20 &wr=0x0 ?trans3;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R17, R16, R23, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R18, R17, PT ?trans1;
MUFU.RCP R22, R22 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R18.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R21, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R18, PT ?trans1;
IADD3 R17, PT, PT, R22, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?WAIT4_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?trans2;
@!P2 LOP3.LUT R18, RZ, R0, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R21, R21, R20, RZ ?trans1;
IABS R22, R18 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R18, RZ, PT ?trans1;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R14, UR8, R17 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x4, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E desc[UR6][R18.64], R17 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x830;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_2_3_1_32_44(float*, int, int, int, float*, int, int, int)
_Z26_permutedims3D_2_3_1_32_44PfiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB102_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v5, v6, v8
.LBB102_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
v_mul_lo_u32 v8, v8, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v7
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v9, v6, v5
v_mul_lo_u32 v9, v9, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v9
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_sub_nc_u32_e32 v9, v11, v10
v_mul_lo_u32 v9, v9, s11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v8, v9, v8
v_add_nc_u32_e32 v9, v1, v8
v_subrev_nc_u32_e32 v10, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v10, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_mad_u64_u32 v[7:8], null, v9, s10, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[6:7], 2, v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
global_load_b32 v8, v[6:7], off
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s7, v1
v_add_co_u32 v6, s0, s2, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s3, v7, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b32 v[6:7], v8, off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB102_2
.LBB102_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_2_3_1_32_44 | 3,353 | 4,063 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_2_3_1_64_44(double*, int, int, int, double*, int, int, int)
Function : _Z26_permutedims3D_2_3_1_64_44PdiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R7, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R7, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R0, R2 ?trans1;
LDC R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R0 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R8, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R11, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R11, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R8 &req={0} ?trans2;
IABS R22, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R20, R14 &wr=0x0 ?trans1;
IABS R24, R7 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R17, R22, R17, R18 ?trans1;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R17, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R22, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R0, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R9, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R14, RZ ?WAIT3_END_GROUP;
IABS R18, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?WAIT4_END_GROUP;
MOV R21, R18 ?trans1;
IABS R18, R7 ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R18 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?trans1;
IADD3 R16, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R19, RZ, PT ?trans1;
IMAD R19, R9, R16, R15 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans2;
IABS R20, R10 ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R8, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R18, RZ ?WAIT4_END_GROUP;
IMAD R16, R14.reuse, R9, R19.reuse ?trans2;
IMAD R14, R14, UR9, R19 ?WAIT3_END_GROUP;
IADD3 R22, PT, PT, -R16, R15, RZ ?trans1;
MOV R16, RZ ?WAIT3_END_GROUP;
IABS R23, R22 ?trans2;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
LOP3.LUT R22, R22, R7, RZ, 0x3c, !PT ?trans1;
I2F.RP R21, R20 &wr=0x0 ?trans1;
MOV R17, R23 ?trans1;
MOV R23, R24 ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R17, R16, R23, R17 ?trans1;
MUFU.RCP R21, R21 &req={0} &wr=0x0 ?trans4;
ISETP.GT.U32.AND P1, PT, R18, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R18.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R22, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R18, PT ?trans1;
IADD3 R17, PT, PT, R21, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R18, RZ, R7, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R18 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R18, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R14, UR8, R17 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R2 ?WAIT6_END_GROUP;
LDG.E.64 R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x8, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E.64 desc[UR6][R18.64], R16 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_2_3_1_64_44(double*, int, int, int, double*, int, int, int)
_Z26_permutedims3D_2_3_1_64_44PdiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB103_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
v_mul_hi_u32 v8, v6, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
s_delay_alu instid0(VALU_DEP_4)
v_add_nc_u32_e32 v5, v6, v8
.LBB103_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
v_mul_lo_u32 v8, v8, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v7
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v9, v6, v5
v_mul_lo_u32 v9, v9, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v9
v_subrev_nc_u32_e32 v9, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v9, vcc_lo
v_sub_nc_u32_e32 v9, v11, v10
v_mul_lo_u32 v9, v9, s11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v8, v9, v8
v_add_nc_u32_e32 v9, v1, v8
v_subrev_nc_u32_e32 v10, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v10, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_mad_u64_u32 v[7:8], null, v9, s10, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[6:7], 3, v[7:8]
v_lshlrev_b64 v[8:9], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v6, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s7, v1
v_add_co_u32 v8, s0, s2, v8
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b64 v[8:9], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB103_2
.LBB103_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_2_3_1_64_44 | 3,365 | 4,036 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_3_1_2_32_44(float*, int, int, int, float*, int, int, int)
Function : _Z26_permutedims3D_3_1_2_32_44PfiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R0, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R7, R2 ?trans1;
LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R7 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R10, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R16, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R10 &req={0} ?trans2;
IABS R21, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R19, R14 &wr=0x0 ?trans1;
IABS R24, R0 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R18, R21, R17, R18 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R18, PT ?trans1;
MUFU.RCP R19, R19 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R18, PT, PT, R18, -R21, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R18, R7, PT ?trans1;
IADD3 R17, PT, PT, R19, 0xffffffe, RZ &req={0} ?trans2;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?WAIT5_END_GROUP;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R19, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IMAD R19, R19, R14, RZ ?trans2;
@!P2 LOP3.LUT R18, RZ, R9, RZ, 0x33, !PT ?trans2;
IMAD.HI.U32 R16, R17, R19, R16 ?trans2;
IABS R21, R18 ?trans2;
IABS R19, R0 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R19 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R18.reuse, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans1;
IMAD R18, R9, R18, R15 ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R20, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R10, RZ, 0x33, !PT ?trans1;
IMAD R23, R20, R19, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R18 ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R16, R15, RZ ?trans2;
IABS R16, R8 ?trans2;
IABS R22, R21 ?WAIT3_END_GROUP;
MOV R20, R16 ?trans1;
MOV R16, RZ ?trans1;
LOP3.LUT R21, R21, R0, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R17, R23, R16 ?trans1;
MOV R17, R22 ?trans1;
I2F.RP R23, R20 &wr=0x0 ?trans1;
MOV R22, R24 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R22, R16, R22, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R19, R22, PT ?trans1;
MUFU.RCP R23, R23 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R22, PT, PT, R22, -R19.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R21, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R22, R19, PT ?trans1;
IADD3 R17, PT, PT, R23, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R0, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R19, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R18, UR9, R17 ?WAIT4_END_GROUP;
IMAD R17, R17, UR8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x4, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E desc[UR6][R18.64], R17 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_3_1_2_32_44(float*, int, int, int, float*, int, int, int)
_Z26_permutedims3D_3_1_2_32_44PfiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB104_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
s_sub_i32 s17, 0, s4
v_mul_hi_u32 v8, v6, v8
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
v_add_nc_u32_e32 v5, v6, v8
.LBB104_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v9, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v9
v_xor_b32_e32 v6, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v5
v_mul_lo_u32 v7, v7, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_subrev_nc_u32_e32 v7, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_subrev_nc_u32_e32 v7, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_xor_b32_e32 v12, v6, v9
v_mad_u64_u32 v[6:7], null, s17, v8, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v7, v12, v9
v_mad_u64_u32 v[8:9], null, v6, s11, v[7:8]
v_sub_nc_u32_e32 v6, v11, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[9:10], null, v8, s10, v[6:7]
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[9:10]
v_add_co_u32 v6, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
global_load_b32 v8, v[6:7], off
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s7, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v6, s0, s2, v6
v_add_co_ci_u32_e64 v7, s0, s3, v7, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b32 v[6:7], v8, off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB104_2
.LBB104_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_3_1_2_32_44 | 3,363 | 4,046 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_3_1_2_64_44(double*, int, int, int, double*, int, int, int)
Function : _Z26_permutedims3D_3_1_2_64_44PdiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R7, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R7, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R0, R2 ?trans1;
LDC R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R0 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R8, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R11, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R11, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R8 &req={0} ?trans2;
IABS R20, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R19, R14 &wr=0x0 ?trans1;
IABS R24, R7 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R17, R20, R17, R18 ?trans1;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R17, PT ?trans1;
MUFU.RCP R19, R19 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R0, PT ?trans1;
IADD3 R17, PT, PT, R19, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R19, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IMAD R19, R19, R14, RZ ?trans2;
@!P2 LOP3.LUT R18, RZ, R9, RZ, 0x33, !PT ?trans2;
IMAD.HI.U32 R16, R17, R19, R16 ?trans2;
IABS R21, R18 ?trans2;
IABS R19, R7 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R19 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R18.reuse, RZ, PT ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans1;
IMAD R18, R9, R18, R15 ?WAIT5_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R20, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R8, RZ, 0x33, !PT ?trans1;
IMAD R21, R20, R19, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R18 ?WAIT5_END_GROUP;
IADD3 R22, PT, PT, -R16, R15, RZ ?trans2;
IABS R16, R10 ?trans2;
IABS R23, R22 ?WAIT3_END_GROUP;
MOV R20, R16 ?trans1;
MOV R16, RZ ?trans1;
LOP3.LUT R22, R22, R7, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
MOV R17, R23 ?trans1;
I2F.RP R21, R20 &wr=0x0 ?trans4;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R24, R16, R24, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R19, R24, PT ?trans1;
MUFU.RCP R21, R21 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R24, PT, PT, R24, -R19.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R22, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R24, R19, PT ?trans1;
IADD3 R17, PT, PT, R21, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R7, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R19, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R18, UR9, R17 ?WAIT4_END_GROUP;
IMAD R17, R17, UR8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R2 ?WAIT6_END_GROUP;
LDG.E.64 R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x8, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E.64 desc[UR6][R18.64], R16 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x830;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_3_1_2_64_44(double*, int, int, int, double*, int, int, int)
_Z26_permutedims3D_3_1_2_64_44PdiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB105_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
s_sub_i32 s17, 0, s4
v_mul_hi_u32 v8, v6, v8
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
v_add_nc_u32_e32 v5, v6, v8
.LBB105_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v9, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v9
v_xor_b32_e32 v6, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v5
v_mul_lo_u32 v7, v7, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_subrev_nc_u32_e32 v7, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_subrev_nc_u32_e32 v7, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v6, v7, vcc_lo
v_xor_b32_e32 v12, v6, v9
v_mad_u64_u32 v[6:7], null, s17, v8, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v7, v12, v9
v_mad_u64_u32 v[8:9], null, v6, s11, v[7:8]
v_sub_nc_u32_e32 v6, v11, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[9:10], null, v8, s10, v[6:7]
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 3, v[9:10]
v_lshlrev_b64 v[8:9], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v6, vcc_lo, s8, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s7, v1
v_add_co_u32 v8, s0, s2, v8
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b64 v[8:9], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB105_2
.LBB105_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_3_1_2_64_44 | 3,351 | 4,019 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_3_2_1_32_44(float*, int, int, int, float*, int, int, int)
Function : _Z26_permutedims3D_3_2_1_32_44PfiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R0, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R7, R2 ?trans1;
LDC R8, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R7 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R10, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R16, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R16, R7, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R10 &req={0} ?trans2;
IABS R19, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R20, R14 &wr=0x0 ?trans1;
IABS R24, R0 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R18, R19, R17, R18 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R18, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R18, PT, PT, R18, -R19, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R18, R7, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans2;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?WAIT5_END_GROUP;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R9, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R14, RZ ?WAIT3_END_GROUP;
IABS R18, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?WAIT4_END_GROUP;
MOV R21, R18 ?trans1;
IABS R18, R0 ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R18 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?trans1;
IADD3 R16, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R19, RZ, PT ?trans1;
IMAD R19, R9, R16, R15 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans2;
IABS R20, R8 ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R23, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R10, RZ, 0x33, !PT ?trans1;
IMAD R23, R23, R18, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R19 ?trans2;
IMAD R14, R19, UR9, R14 ?WAIT3_END_GROUP;
IADD3 R21, PT, PT, -R16, R15, RZ ?trans1;
MOV R16, RZ ?WAIT3_END_GROUP;
IABS R22, R21 ?trans2;
IMAD.HI.U32 R16, R17, R23, R16 ?trans1;
IADD3 R23, PT, PT, RZ, -R24, RZ ?trans2;
LOP3.LUT R21, R21, R0, RZ, 0x3c, !PT ?trans1;
MOV R17, R22 ?trans2;
I2F.RP R22, R20 &wr=0x0 ?trans3;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R17, R16, R23, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R18, R17, PT ?trans1;
MUFU.RCP R22, R22 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R18.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R21, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R18, PT ?trans1;
IADD3 R17, PT, PT, R22, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?WAIT4_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?trans2;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?trans2;
@!P2 LOP3.LUT R18, RZ, R0, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R21, R21, R20, RZ ?trans1;
IABS R22, R18 ?WAIT3_END_GROUP;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R18, RZ, PT ?trans1;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R14, UR8, R17 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x4, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E desc[UR6][R18.64], R17 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x830;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_3_2_1_32_44(float*, int, int, int, float*, int, int, int)
_Z26_permutedims3D_3_2_1_32_44PfiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB106_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
s_sub_i32 s17, 0, s4
v_mul_hi_u32 v8, v6, v8
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
v_add_nc_u32_e32 v5, v6, v8
.LBB106_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v12, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v12
v_xor_b32_e32 v6, v6, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v5
v_mul_lo_u32 v7, v7, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_subrev_nc_u32_e32 v7, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v9, v6, v7, vcc_lo
v_mad_u64_u32 v[6:7], null, s17, v8, v[1:2]
v_sub_nc_u32_e32 v7, v11, v10
v_subrev_nc_u32_e32 v13, s15, v9
v_cmp_le_u32_e32 vcc_lo, s15, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v8, v9, v13, vcc_lo
v_xor_b32_e32 v10, v8, v12
v_mad_u64_u32 v[8:9], null, v6, s11, v[7:8]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v10, v12
v_mad_u64_u32 v[9:10], null, v8, s10, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v9
v_lshlrev_b64 v[6:7], 2, v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
global_load_b32 v8, v[6:7], off
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s7, v1
v_add_co_u32 v6, s0, s2, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s0, s3, v7, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b32 v[6:7], v8, off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB106_2
.LBB106_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_3_2_1_32_44 | 3,349 | 4,035 | stackv2-00014-of-00015 |
// Demangled: _permutedims3D_3_2_1_64_44(double*, int, int, int, double*, int, int, int)
Function : _Z26_permutedims3D_3_2_1_64_44PdiiiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x3a8] &wr=0x3 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R14, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R7, R3, R2, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R6, R7, UR5, RZ &req={3} ?trans2;
IMAD R15, R14, UR4, R15 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R0, R2 ?trans1;
LDC R10, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
I2F.RP R11, R0 &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
LDC R9, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x0 ?trans7;
LDC R8, c[0x0][0x3a4] &wr=0x0 ?trans1;
MUFU.RCP R11, R11 &req={2} &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x5 ?trans2;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R11, PT, PT, RZ, -R13, RZ &req={5} ?WAIT5_END_GROUP;
IMAD R11, R11, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R13, R11, R12 ?trans1;
LOP3.LUT R13, RZ, UR5, RZ, 0x33, !PT ?WAIT3_END_GROUP;
IMAD R12, R14, UR4, RZ &req={4,3,1} ?WAIT7_END_GROUP;
IABS R18, R15 &req={1} ?trans2;
IABS R14, R8 &req={0} ?trans2;
IABS R22, R9 ?trans1;
IMAD.HI.U32 R16, R11, R18, RZ ?trans1;
I2F.RP R20, R14 &wr=0x0 ?trans1;
IABS R24, R7 ?WAIT3_END_GROUP;
IADD3 R17, PT, PT, -R16, RZ, RZ ?trans2;
IADD3 R24, PT, PT, RZ, -R24, RZ ?WAIT3_END_GROUP;
IMAD R17, R22, R17, R18 ?trans1;
LOP3.LUT R18, R15, R9, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R17, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R22, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R18, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R0, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R19, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R19, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R19, RZ, R9, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R14, RZ ?WAIT3_END_GROUP;
IABS R18, R19 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?WAIT4_END_GROUP;
MOV R21, R18 ?trans1;
IABS R18, R7 ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R16, R21, RZ ?trans1;
I2F.RP R20, R18 &wr=0x0 ?trans4;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R21, R14, R16, R21 ?trans1;
IADD3 R16, PT, PT, -R19, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R21, PT ?trans1;
MUFU.RCP R20, R20 &req={0} &wr=0x0 ?WAIT12_END_GROUP;
@!P1 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.GE.AND P1, PT, R19, RZ, PT ?trans1;
IMAD R19, R9, R16, R15 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R21, PT ?trans1;
IADD3 R17, PT, PT, R20, 0xffffffe, RZ &req={0} ?trans2;
IABS R20, R10 ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@!P2 IADD3 R21, PT, PT, R21, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?WAIT4_END_GROUP;
MOV R14, R21 ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT4_END_GROUP;
@!P1 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R14, RZ, R8, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R18, RZ ?WAIT4_END_GROUP;
IMAD R16, R14, R9, R19 ?trans2;
IMAD R14, R19, UR9, R14 ?WAIT3_END_GROUP;
IADD3 R22, PT, PT, -R16, R15, RZ ?trans1;
MOV R16, RZ ?WAIT3_END_GROUP;
IABS R23, R22 ?trans2;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
LOP3.LUT R22, R22, R7, RZ, 0x3c, !PT ?trans1;
I2F.RP R21, R20 &wr=0x0 ?trans1;
MOV R17, R23 ?trans1;
MOV R23, R24 ?WAIT4_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT4_END_GROUP;
IMAD R17, R16, R23, R17 ?trans1;
MUFU.RCP R21, R21 &req={0} &wr=0x0 ?trans4;
ISETP.GT.U32.AND P1, PT, R18, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R18.reuse, RZ ?trans2;
@!P1 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R22, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R17, R18, PT ?trans1;
IADD3 R17, PT, PT, R21, 0xffffffe, RZ &req={0} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R17, R17 &wr=0x0 ?trans6;
@P2 IADD3 R16, PT, PT, R16, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, RZ, PT ?WAIT4_END_GROUP;
MOV R18, R16 ?trans1;
MOV R16, RZ ?trans1;
IADD3 R21, PT, PT, RZ, -R17, RZ &req={0} ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R18, RZ, R7, RZ, 0x33, !PT ?trans1;
IMAD R21, R21, R20, RZ ?WAIT3_END_GROUP;
IABS R22, R18 ?trans1;
IMAD.HI.U32 R16, R17, R21, R16 ?trans1;
ISETP.GE.AND P2, PT, R18, RZ, PT ?WAIT3_END_GROUP;
MOV R17, R22 ?WAIT5_END_GROUP;
IMAD.HI.U32 R16, R16, R17, RZ ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT5_END_GROUP;
IMAD R17, R20, R16, R17 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R20, R17, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R17, PT, PT, R17, -R20, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R17, PT, PT, -R17, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R13, R17, !P0 ?WAIT5_END_GROUP;
IMAD R17, R14, UR8, R17 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R2 ?WAIT6_END_GROUP;
LDG.E.64 R16, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD.WIDE R18, R15, 0x8, R4 ?trans1;
IADD3 R15, PT, PT, R12, R15, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R15, R6, PT ?trans1;
STG.E.64 desc[UR6][R18.64], R16 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@!P1 BRA 0x1f0 ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _permutedims3D_3_2_1_64_44(double*, int, int, int, double*, int, int, int)
_Z26_permutedims3D_3_2_1_64_44PdiiiS_iii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x20
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s8, 0xffff
s_mul_i32 s8, s5, s4
v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
s_mul_i32 s7, s8, s6
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s7, v1
s_cbranch_execz .LBB107_3
s_ashr_i32 s9, s5, 31
s_ashr_i32 s12, s4, 31
s_add_i32 s11, s5, s9
s_add_i32 s10, s4, s12
s_xor_b32 s13, s11, s9
s_ashr_i32 s9, s6, 31
s_xor_b32 s5, s10, s12
s_add_i32 s10, s6, s9
s_ashr_i32 s14, s8, 31
s_xor_b32 s15, s10, s9
s_add_i32 s8, s8, s14
v_cvt_f32_u32_e32 v4, s15
v_cvt_f32_u32_e32 v0, s5
v_cvt_f32_u32_e32 v2, s13
s_xor_b32 s6, s8, s14
s_load_b32 s17, s[2:3], 0x0
v_rcp_iflag_f32_e32 v4, v4
v_cvt_f32_u32_e32 v3, s6
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_sub_i32 s2, 0, s5
s_sub_i32 s3, 0, s13
v_rcp_iflag_f32_e32 v3, v3
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v6, v4
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_u32_f32_e32 v5, v3
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v0
s_sub_i32 s2, 0, s6
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v4, s3, v2
s_sub_i32 s3, 0, s15
v_mul_lo_u32 v8, s3, v6
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x18
v_mul_hi_u32 v3, v0, v3
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s17, s16
v_mul_hi_u32 v7, v5, v7
v_mul_hi_u32 v4, v2, v4
s_mov_b32 s16, 0
s_sub_i32 s17, 0, s4
v_mul_hi_u32 v8, v6, v8
v_add_nc_u32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v3, v2, v4
v_add_nc_u32_e32 v4, v5, v7
v_add_nc_u32_e32 v5, v6, v8
.LBB107_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v1, v2
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v0
v_mul_lo_u32 v8, v7, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v8
v_add_nc_u32_e32 v8, 1, v7
v_subrev_nc_u32_e32 v9, s5, v6
v_cmp_le_u32_e32 vcc_lo, s5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v8 :: v_dual_cndmask_b32 v6, v6, v9
v_xor_b32_e32 v9, s12, v2
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s5, v6
v_cndmask_b32_e32 v6, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v9
v_sub_nc_u32_e32 v8, v6, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v8
v_add_nc_u32_e32 v7, v8, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v7, v7, v10
v_mul_hi_u32 v11, v7, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v11, v11, s13
v_sub_nc_u32_e32 v7, v7, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v11, s13, v7
v_cmp_le_u32_e32 vcc_lo, s13, v7
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v11, v7, v10
v_add_nc_u32_e32 v7, v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v7, v6
v_sub_nc_u32_e32 v9, v6, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, s4, v9, v[1:2]
v_sub_nc_u32_e32 v6, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
v_add_nc_u32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v6, v6, v7
v_xor_b32_e32 v7, s14, v7
v_mul_hi_u32 v9, v6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v12, v9, s6
v_sub_nc_u32_e32 v6, v6, v12
v_add_nc_u32_e32 v12, 1, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v13, s6, v6
v_cmp_le_u32_e32 vcc_lo, s6, v6
v_dual_cndmask_b32 v9, v9, v12 :: v_dual_cndmask_b32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, 1, v9
v_cmp_le_u32_e32 vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v9, v12, vcc_lo
v_xor_b32_e32 v6, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_ashrrev_i32_e32 v12, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, v6, v12
v_xor_b32_e32 v6, v6, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v6, v5
v_mul_lo_u32 v7, v7, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v6, v7
v_subrev_nc_u32_e32 v7, s15, v6
v_cmp_le_u32_e32 vcc_lo, s15, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v9, v6, v7, vcc_lo
v_mad_u64_u32 v[6:7], null, s17, v8, v[1:2]
v_sub_nc_u32_e32 v7, v11, v10
v_subrev_nc_u32_e32 v13, s15, v9
v_cmp_le_u32_e32 vcc_lo, s15, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v8, v9, v13, vcc_lo
v_xor_b32_e32 v10, v8, v12
v_mad_u64_u32 v[8:9], null, v6, s11, v[7:8]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v6, v10, v12
v_mad_u64_u32 v[9:10], null, v8, s10, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v10, 31, v9
v_lshlrev_b64 v[6:7], 3, v[9:10]
v_lshlrev_b64 v[8:9], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v6, vcc_lo, s8, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s7, v1
v_add_co_u32 v8, s0, s2, v8
global_load_b64 v[6:7], v[6:7], off
v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
s_or_b32 s16, vcc_lo, s16
s_waitcnt vmcnt(0)
global_store_b64 v[8:9], v[6:7], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB107_2
.LBB107_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _permutedims3D_3_2_1_64_44 | 3,361 | 4,008 | stackv2-00014-of-00015 |
// Demangled: _relu_32(int, float*, float*)
Function : _Z8_relu_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FMNMX R13, RZ, R2, !PT &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans7;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _relu_32(int, float*, float*)
_Z8_relu_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB61_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB61_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_dual_max_f32 v0, v0, v0 :: v_dual_add_nc_u32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_max_f32_e32 v0, 0, v0
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB61_2
.LBB61_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _relu_32 | 607 | 699 | stackv2-00014-of-00015 |
// Demangled: _relu_64(int, double*, double*)
Function : _Z8_relu_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 &req={1} ?trans1;
MOV R7, R3 &req={2} ?trans1;
DSETP.MAX.AND P0, P1, RZ, R2, PT &wr=0x0 ?trans1;
MOV R5, R2 ?WAIT3_END_GROUP;
FSEL R15, R4, R7, P0 &req={0} ?trans1;
@P1 LOP3.LUT R15, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
IMAD.WIDE R6, R0, 0x8, R10 &req={3} ?trans1;
SEL R4, R4, R5, P0 ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?trans2;
MOV R5, R15 ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans2;
STG.E.64 desc[UR6][R6.64], R4 &rd=0x1 ?trans11;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _relu_64(int, double*, double*)
_Z8_relu_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB62_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB62_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b64 v[4:5], v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_max_f64 v[4:5], v[4:5], v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_max_f64 v[4:5], v[4:5], 0
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB62_2
.LBB62_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _relu_64 | 759 | 700 | stackv2-00014-of-00015 |
// Demangled: _round_32(int, float*, float*)
Function : _Z9_round_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R5, -RZ, RZ, 1.75, 0 &req={1} ?WAIT5_END_GROUP;
LOP3.LUT R5, R5, 0x80000000, R2, 0xb8, !PT &req={2} ?WAIT5_END_GROUP;
FADD.RZ R10, R2, R5 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?trans2;
FRND.TRUNC R13, R10 &wr=0x0 ?trans3;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
STG.E desc[UR6][R4.64], R13 &req={0} &rd=0x1 ?WAIT12_END_GROUP;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _round_32(int, float*, float*)
_Z9_round_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB65_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB65_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_trunc_f32_e32 v4, v0
v_sub_f32_e32 v5, v0, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ge_f32_e64 s0, |v5|, 0.5
v_cndmask_b32_e64 v5, 0, 1.0, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
v_bfi_b32 v0, 0x7fffffff, v5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v0, v4, v0 :: v_dual_add_nc_u32 v1, s1, v1
v_cmp_le_i32_e32 vcc_lo, s8, v1
global_store_b32 v[2:3], v0, off
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB65_2
.LBB65_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _round_32 | 709 | 861 | stackv2-00014-of-00015 |
// Demangled: _round_64(int, double*, double*)
Function : _Z9_round_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x8, R10 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
LOP3.LUT R4, R3, 0x80000000, RZ, 0xc0, !PT &req={2} ?WAIT4_END_GROUP;
LOP3.LUT R5, R4, 0x3fe00000, RZ, 0xfc, !PT ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
DADD.RZ R4, R2, R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
FRND.F64.TRUNC R4, R4 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R6.64], R4 &req={0} &rd=0x1 ?trans1;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x1e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _round_64(int, double*, double*)
_Z9_round_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB66_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
v_mov_b32_e32 v3, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB66_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v7, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
global_load_b64 v[7:8], v[7:8], off
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_trunc_f64_e32 v[9:10], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[11:12], v[7:8], -v[9:10]
v_cmp_ge_f64_e64 s0, |v[11:12]|, 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, 0, 0x3ff00000, s0
v_bfi_b32 v4, 0x7fffffff, v0, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[7:8], v[9:10], v[3:4]
v_add_co_u32 v4, s0, s6, v5
v_add_co_ci_u32_e64 v5, s0, s7, v6, s0
global_store_b64 v[4:5], v[7:8], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB66_2
.LBB66_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _round_64 | 779 | 908 | stackv2-00014-of-00015 |
// Demangled: _sigm_32(int, float*, float*)
Function : _Z8_sigm_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R6, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R6, R6, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x470 ?trans1;
SHF.R.S32.HI R8, RZ, 0x1f, R7 ?trans1;
FSETP.GE.AND P0, PT, R9, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x2d0 ?trans5;
HFMA2 R0, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R3, 0x437c0000 ?trans1;
BSSY.RECONVERGENT B1, 0x2c0 ?trans3;
FFMA.SAT R0, R9, -R0, 0.5 ?WAIT4_END_GROUP;
FFMA.RM R0, R0, R3, 12582913 ?WAIT4_END_GROUP;
FADD R2, R0.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R0, R0, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R2, R9, -1.4426950216293334961, -R2 ?WAIT4_END_GROUP;
FFMA R2, R9, -1.925963033500011079e-08, R2 ?WAIT4_END_GROUP;
MUFU.EX2 R3, R2 &wr=0x0 ?trans2;
FFMA R9, R0, R3, 1 &req={0} ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, R9, 0x1800000, RZ ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
MOV R10, 0x250 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x4e0 &req={4,3} ?trans5;
MOV R0, R3 ?trans1;
BRA 0x2b0 ?trans6;
MUFU.RCP R0, R9 &wr=0x0 ?trans2;
FFMA R2, R9, R0, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R3, -R2, -RZ ?WAIT4_END_GROUP;
FFMA R0, R0, R3, R0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 &req={4,3} ?trans5;
BRA 0x460 ?trans5;
HFMA2 R0, -RZ, RZ, 0.96630859375, -0.0022525787353515625 ?trans1;
MOV R3, 0x437c0000 ?trans1;
BSSY.RECONVERGENT B1, 0x450 ?trans3;
FFMA.SAT R0, R9, R0, 0.5 ?WAIT4_END_GROUP;
FFMA.RM R0, R0, R3, 12582913 ?WAIT4_END_GROUP;
FADD R2, R0.reuse, -12583039 ?trans1;
IMAD.SHL.U32 R0, R0, 0x800000, RZ ?WAIT3_END_GROUP;
FFMA R2, R9, 1.4426950216293334961, -R2 ?WAIT4_END_GROUP;
FFMA R2, R9, 1.925963033500011079e-08, R2 ?WAIT4_END_GROUP;
MUFU.EX2 R3, R2 &wr=0x0 ?trans2;
FMUL R0, R0, R3 &req={0} ?WAIT4_END_GROUP;
FADD R13, R0, 1 ?WAIT4_END_GROUP;
MUFU.RCP R3, R13 &wr=0x0 ?trans1;
FCHK P0, R0, R13 &wr=0x1 ?trans1;
FFMA R10, -R13, R3, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R3, R3, R10, R3 ?WAIT4_END_GROUP;
FFMA R10, R0, R3, RZ ?WAIT4_END_GROUP;
FFMA R9, -R13, R10, R0 ?WAIT4_END_GROUP;
FFMA R3, R3, R9, R10 ?trans1;
@!P0 BRA 0x440 &req={1} ?trans6;
MOV R2, 0x430 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x830 &req={4,3} ?trans5;
MOV R3, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 &req={4,3} ?trans5;
MOV R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LEA R2, P0, R7, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R3, R7, UR9, R8, 0x2, P0 ?trans2;
IADD3 R7, PT, PT, R6, R7, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R2.64], R0 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R7, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
IMAD.SHL.U32 R0, R9, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x810 ?trans4;
SHF.R.U32.HI R11, RZ, 0x18, R0 ?trans1;
MOV R0, R9 ?WAIT4_END_GROUP;
ISETP.NE.U32.AND P0, PT, R11, RZ, PT ?WAIT13_END_GROUP;
@P0 BRA 0x5e0 ?trans5;
IMAD.SHL.U32 R2, R0, 0x2, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT13_END_GROUP;
@P0 FFMA R9, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MUFU.RCP R3, R0 ?trans3;
@P0 MUFU.RCP R2, R9 &wr=0x0 ?trans2;
@P0 FFMA R11, R9, R2, -1 &req={0} ?WAIT4_END_GROUP;
@P0 FADD.FTZ R11, -R11, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R2, R2, R11, R2 ?WAIT4_END_GROUP;
@P0 FFMA R3, R2, 1.84467440737095516160e+19, RZ ?trans1;
BRA 0x800 ?trans6;
IADD3 R13, PT, PT, R11, -0xfd, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0x7f0 ?trans5;
LOP3.LUT R2, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R2, R2, 0x3f800000, RZ, 0xfc, !PT ?WAIT4_END_GROUP;
MUFU.RCP R3, R2 &wr=0x0 ?trans2;
FFMA R9, R2, R3, -1 &req={0} ?WAIT4_END_GROUP;
FADD.FTZ R12, -R9, -RZ ?WAIT4_END_GROUP;
FFMA.RM R9, R3.reuse, R12.reuse, R3.reuse ?trans1;
FFMA.RP R12, R3, R12, R3 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 1.78813934326171875e-07 ?WAIT4_END_GROUP;
FSETP.NEU.FTZ.AND P0, PT, R9.reuse, R12, PT ?trans1;
LOP3.LUT R9, R9, 0x7fffff, RZ, 0xc0, !PT ?trans2;
SHF.L.U32 R12, R3, R13, RZ ?trans2;
LOP3.LUT R9, R9, 0x800000, RZ, 0xfc, !PT ?trans1;
SEL R3, RZ, 0xffffffff, !P0 ?WAIT3_END_GROUP;
LOP3.LUT R12, R12, R9, RZ, 0xc0, !PT ?trans2;
IADD3 R2, PT, PT, -R3, RZ, RZ ?trans2;
SHF.R.U32.HI R12, RZ, R13.reuse, R12 ?trans2;
LOP3.LUT P1, RZ, R2, R13, R9, 0xf8, !PT ?trans2;
LOP3.LUT P0, RZ, R12.reuse, 0x1, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P2, RZ, R12, 0x2, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ?trans2;
LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
SEL R2, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans1;
IADD3 R2, PT, PT, R11, -0xfc, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R3, RZ, R2, R9 ?WAIT8_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.SHL.U32 R3, R3, 0x2, RZ ?WAIT5_END_GROUP;
LOP3.LUT R3, R3, 0x80000000, R0, 0xf8, !PT ?trans1;
BRA 0x800 ?trans6;
MUFU.RCP R3, R0 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
MOV R11, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 &req={1,0} ?trans5;
SHF.R.U32.HI R9, RZ, 0x17, R13 ?trans1;
BSSY.RECONVERGENT B2, 0xea0 ?trans1;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans2;
LOP3.LUT R17, R9, 0xff, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R14, R3, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R9, R0 ?trans1;
IADD3 R15, PT, PT, R17, -0x1, RZ ?trans1;
MOV R10, R13 ?trans1;
IADD3 R12, PT, PT, R14, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, 0xfd, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R12, 0xfd, P0 ?WAIT13_END_GROUP;
@!P0 MOV R11, RZ ?trans1;
@!P0 BRA 0xa80 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?trans1;
FSETP.GTU.FTZ.AND P1, PT, |R13|, +INF , PT ?trans1;
MOV R3, R13 ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?WAIT13_END_GROUP;
@P0 BRA 0xe80 ?trans5;
LOP3.LUT P0, RZ, R10, 0x7fffffff, R9, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe60 ?trans5;
FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ?trans1;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT12_END_GROUP;
@!P1 BRA !P2, 0xe60 ?trans5;
LOP3.LUT P2, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P1, PT, P1, P2, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P1 BRA 0xe40 ?trans5;
LOP3.LUT P1, RZ, R10, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P0, P1, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BRA 0xe10 ?trans5;
ISETP.GE.AND P0, PT, R12, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R15, RZ, PT ?WAIT12_END_GROUP;
@P0 MOV R11, RZ ?trans1;
@!P0 MOV R11, 0xffffffc0 ?trans1;
@!P0 FFMA R9, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P1 FFMA R10, R3, 1.84467440737095516160e+19, RZ ?WAIT3_END_GROUP;
@!P1 IADD3 R11, PT, PT, R11, 0x40, RZ ?WAIT7_END_GROUP;
LEA R3, R17, 0xc0800000, 0x17 ?trans1;
BSSY.RECONVERGENT B3, 0xe00 ?trans3;
IADD3 R3, PT, PT, -R3, R10, RZ ?trans2;
IADD3 R10, PT, PT, R14, -0x7f, RZ ?trans2;
MUFU.RCP R12, R3 &wr=0x0 ?trans1;
FADD.FTZ R13, -R3, -RZ ?trans2;
IMAD R0, R10.reuse, -0x800000, R9 ?trans1;
IADD3 R10, PT, PT, R10, 0x7f, -R17 ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R10, R11, RZ ?trans1;
FFMA R15, R12, R13, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R14, R12, R15, R12 ?WAIT4_END_GROUP;
FFMA R9, R0, R14, RZ ?WAIT4_END_GROUP;
FFMA R12, R13, R9, R0 ?WAIT4_END_GROUP;
FFMA R15, R14, R12, R9 ?WAIT4_END_GROUP;
FFMA R12, R13, R15, R0 ?WAIT4_END_GROUP;
FFMA R9, R14, R12, R15 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R9 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R0, R10, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R13, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xde0 ?trans5;
ISETP.GT.AND P0, PT, R13, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0xdb0 ?trans5;
ISETP.GE.AND P0, PT, R13, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xdf0 ?trans5;
ISETP.GE.AND P0, PT, R13, -0x18, PT ?trans1;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xdf0 ?trans5;
FFMA.RZ R0, R14.reuse, R12.reuse, R15.reuse ?trans1;
IADD3 R11, PT, PT, R13.reuse, 0x20, RZ ?trans1;
FFMA.RM R3, R14, R12, R15 ?trans1;
ISETP.NE.AND P1, PT, R13.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R13, RZ, PT ?trans1;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R10, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R14, R12, R15 ?trans1;
IADD3 R12, PT, PT, -R13, RZ, RZ ?trans2;
SHF.L.U32 R11, R10, R11, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ?trans1;
SEL R3, R12, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R11, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R3, RZ, R3, R10 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R11, RZ, 0x1, R3 ?WAIT3_END_GROUP;
SEL R0, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R0, R0, 0x1, R11, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R0, R9, RZ, 0xfc, !PT ?trans1;
BRA 0xdf0 ?trans6;
LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xdf0 ?trans6;
IMAD R9, R10, 0x800000, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
BRA 0xe90 ?trans5;
LOP3.LUT R9, R10, 0x80000000, R9, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xe90 ?trans6;
LOP3.LUT R9, R10, 0x80000000, R9, 0x48, !PT ?trans1;
BRA 0xe90 ?trans6;
MUFU.RSQ R9, -QNAN &wr=0x0 ?trans1;
BRA 0xe90 ?trans5;
FADD.FTZ R9, R0, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 &req={0} ?trans5;
BRA 0xec0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sigm_32(int, float*, float*)
_Z8_sigm_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB67_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB67_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v5, 0xbfb8aa3b, v0
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_rndne_f32_e32 v9, v5
v_mul_f32_e32 v4, 0x3fb8aa3b, v0
v_fma_f32 v8, 0xbfb8aa3b, v0, -v5
v_sub_f32_e32 v5, v5, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_fma_f32 v6, 0x3fb8aa3b, v0, -v4
v_rndne_f32_e32 v7, v4
v_fmac_f32_e32 v8, 0xb2a5705f, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v6, 0x32a5705f, v0
v_dual_sub_f32 v4, v4, v7 :: v_dual_add_f32 v5, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v4, v4, v6
v_exp_f32_e32 v5, v5
v_cvt_i32_f32_e32 v6, v7
v_cvt_i32_f32_e32 v7, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_exp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_ldexp_f32 v5, v5, v7
v_ldexp_f32 v4, v4, v6
v_cndmask_b32_e32 v4, 0, v4, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
v_cmp_nle_f32_e32 vcc_lo, 0, v0
v_cndmask_b32_e32 v0, v5, v4, vcc_lo
v_cndmask_b32_e32 v4, 1.0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v0, 1.0, v0
v_div_scale_f32 v5, null, v0, v0, v4
v_div_scale_f32 v8, vcc_lo, v4, v0, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v5, v6, 1.0
v_fmac_f32_e32 v6, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v8, v6
v_fma_f32 v9, -v5, v7, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v9, v6
v_fma_f32 v5, -v5, v7, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_fmas_f32 v5, v5, v6, v7
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_div_fixup_f32 v0, v5, v0, v4
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB67_2
.LBB67_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sigm_32 | 5,936 | 1,922 | stackv2-00014-of-00015 |
// Demangled: _sigm_64(int, double*, double*)
Function : _Z8_sigm_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R7, 0x8, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x14e0 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R7 ?trans1;
DSETP.GE.AND P0, PT, R2, RZ, PT &req={2} &wr=0x0 ?trans2;
@!P0 BRA 0xab0 &req={0} ?trans5;
MOV.64 R8, 0x3ff71547652b82fe ?trans2;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
DADD R10, -RZ, -R2 ?trans1;
BSSY.RECONVERGENT B1, 0x860 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, -R8, 6.75539944105574400000e+15 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R8, -6.75539944105574400000e+15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, -UR4, -R2 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, -UR4, R14 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R14, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, UR4, R14 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, 1 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R12, R11 &req={0} ?trans1;
IMAD R11, R8, 0x100000, R15 &req={1} ?trans1;
MOV R10, R14 ?WAIT3_END_GROUP;
FSETP.GEU.AND P0, PT, |R12|, 4.1917929649353027344, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x850 ?trans5;
FSETP.GEU.AND P1, PT, |R12|, 4.2275390625, PT ?trans1;
DSETP.GT.AND P0, PT, R2, RZ, PT ?WAIT12_END_GROUP;
@!P1 LEA.HI R9, R8, R8, RZ, 0x1 ?WAIT4_END_GROUP;
@!P1 SHF.R.S32.HI R9, RZ, 0x1, R9 ?WAIT4_END_GROUP;
@!P1 IADD3 R8, PT, PT, R8, -R9, RZ ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, -R2, +INF &wr=0x0 ?trans2;
FSEL R11, R3, RZ, !P0 &req={0} ?trans1;
@!P1 IMAD R3, R9, 0x100000, R15 ?trans1;
FSEL R10, R2, RZ, !P0 ?trans1;
@!P1 LEA R9, R8, 0x3ff00000, 0x14 ?trans1;
@!P1 MOV R2, R14 ?trans1;
@!P1 MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DMUL R10, R2, R8 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 &req={4,3} ?trans5;
DADD R12, R10, 1 &req={1} &wr=0x1 ?trans1;
BSSY.RECONVERGENT B1, 0xa90 ?trans1;
MUFU.RCP64H R3, R13 &req={1,0} &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R13, 0x300402, RZ ?WAIT5_END_GROUP;
FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R12, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, R8, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R12, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R10, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0xa80 &req={1,0} ?trans5;
LOP3.LUT R2, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, R2, -0x100000, RZ ?trans1;
MOV R2, 0xa80 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1550 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV.64 R2, R8 ?trans2;
BRA 0x14d0 ?trans6;
MOV.64 R8, 0x3ff71547652b82fe ?trans2;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
FSETP.GEU.AND P0, PT, |R3|, 4.1917929649353027344, PT ?trans1;
BSSY.RECONVERGENT B1, 0x1190 ?trans3;
DFMA R8, R2, R8, 6.75539944105574400000e+15 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R8, -6.75539944105574400000e+15 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -UR4, R2 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, -UR4, R12 &req={0} &rd=0x0 &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R10, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, UR4, R10 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, 1 &req={0} &wr=0x0 ?trans2;
IMAD R13, R8, 0x100000, R11 &req={0} ?trans1;
MOV R12, R10 ?trans1;
@!P0 BRA 0x1180 ?trans6;
FSETP.GEU.AND P1, PT, |R3|, 4.2275390625, PT ?trans1;
DSETP.GEU.AND P0, PT, R2, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, R2, +INF &rd=0x0 &wr=0x1 ?trans2;
@!P1 LEA.HI R2, R8, R8, RZ, 0x1 &req={0} ?trans1;
FSEL R12, R12, RZ, P0 &req={1} ?trans1;
FSEL R13, R13, RZ, P0 ?trans2;
@!P1 SHF.R.S32.HI R3, RZ, 0x1, R2 ?trans1;
@!P1 MOV R2, R10 ?WAIT3_END_GROUP;
@!P1 IADD3 R8, PT, PT, R8, -R3, RZ ?trans1;
@!P1 IMAD R3, R3, 0x100000, R11 ?WAIT3_END_GROUP;
@!P1 LEA R9, R8, 0x3ff00000, 0x14 ?trans1;
@!P1 MOV R8, RZ ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DMUL R12, R2, R8 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 &req={4,3} ?trans5;
DADD R10, R12, 1 &req={1} &wr=0x1 ?trans1;
MOV R2, 0x1 &req={0} ?trans1;
MUFU.RCP64H R3, R11 &req={1} &wr=0x0 ?trans1;
FSETP.GEU.AND P1, PT, |R13|, 6.5827683646048100446e-37, PT ?trans1;
BSSY.RECONVERGENT B1, 0x14d0 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R10, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R2, R8, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R10, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R8, R2, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R2, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R8, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R14, R8 &req={0} &wr=0x0 ?trans2;
FFMA R8, RZ, R11, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R8|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x14c0 ?trans5;
MOV R8, R12 ?trans1;
MOV R9, R13 ?trans1;
MOV R14, 0x14c0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1b70 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LEA R8, P0, R7, UR8, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R9, R7, UR9, R6, 0x3, P0 ?trans2;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R8.64], R2 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R7, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
MOV R14, R12 ?trans1;
MOV R15, R13 ?trans1;
BSSY.RECONVERGENT B2, 0x1b50 ?trans5;
DSETP.GTU.AND P0, PT, |R14|, +INF , PT &wr=0x0 ?trans2;
@P0 BRA 0x1b20 &req={0} ?trans5;
LOP3.LUT R12, R13, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R12, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R8, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P0 LOP3.LUT R9, R15, 0x7ff00000, RZ, 0x3c, !PT ?trans1;
@P0 MOV R8, RZ ?trans1;
@P0 BRA 0x1b40 ?trans6;
ISETP.GE.U32.AND P0, PT, R12, 0x1000001, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1900 ?trans5;
IADD3 R9, PT, PT, R15, -0x3fe00000, RZ ?trans1;
MOV R8, R14 ?trans1;
MOV R10, R3 ?trans2;
MUFU.RCP64H R11, R9 &wr=0x0 ?trans4;
DFMA R12, -R8, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R10, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R8, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, R10, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R10, 2.2250738585072013831e-308 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R14, R10, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R12, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0x1b40 &req={1,0} ?trans5;
DMUL R10, R14, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R8, R3 ?trans1;
MUFU.RCP64H R9, R11 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, -R10, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R8, R12, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R8, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R8, 8.11296384146066816958e+31 &req={0} &wr=0x0 ?trans2;
BRA 0x1b40 &req={0} ?trans5;
LOP3.LUT R9, R15, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R8, R14 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
MOV R3, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R15, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x2350 ?trans1;
LOP3.LUT R22, R11.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R18, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R11|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R11, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R15, R22, PT ?trans1;
MOV R23, R15 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R12, R11, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R13, R18.reuse, 0x63400000, !P1 ?trans1;
@!P2 MOV R24, RZ ?trans1;
MOV R2, R10 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R15, R12, PT ?trans1;
MOV R12, R8 ?trans1;
LOP3.LUT R13, R13, 0x800fffff, R9, 0xf8, !PT ?trans1;
MOV R16, 0x1 ?trans2;
@!P2 SEL R19, R18, 0x63400000, !P3 ?trans1;
@!P0 DMUL R2, R10, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
MUFU.RCP64H R17, R3 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R22, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ?trans2;
IADD3 R26, PT, PT, R22, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R25, R19, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R12, R12, 2, -R24 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R23, R13, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, R23, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R19, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R26, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R20, R20, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R16, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R20, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R16, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R24, -R2, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R20, R24 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x2200 &req={1,0} ?trans5;
LOP3.LUT R20, R11, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R15.reuse, -R20.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R15, R20, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R15, R18, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R15, PT, PT, -R15, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R15, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R18, R16, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R19|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2340 ?trans5;
DFMA R2, R16, -R2, R12 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R11, R3, 0x80000000, R11, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R11, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x2340 ?trans5;
IADD3 R3, PT, PT, -R15, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
DMUL.RP R8, R16, R8 &wr=0x0 ?trans2;
LOP3.LUT R11, R9, R11, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R18, -R2, R16 &wr=0x0 ?trans2;
IADD3 R2, PT, PT, -R15, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R3|, R2, PT ?WAIT5_END_GROUP;
FSEL R18, R8, R18, !P0 ?trans1;
FSEL R19, R11, R19, !P0 ?trans1;
BRA 0x2340 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x2320 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0x22f0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R23, R22, PT ?trans1;
MOV.64 R18, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x2340 ?trans5;
ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ?trans1;
LOP3.LUT R19, R9, 0x80000000, R11, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R22, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R19, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R18, RZ ?trans1;
@P0 MOV R18, RZ ?WAIT3_END_GROUP;
@P0 MOV R19, R2 ?trans1;
BRA 0x2340 ?trans6;
LOP3.LUT R19, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R18, R10 ?trans1;
BRA 0x2340 ?trans6;
LOP3.LUT R19, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R18, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R18 ?trans1;
MOV R3, R19 ?trans2;
RET.REL.NODEC R14 0x0 ?trans5;
BRA 0x2390;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sigm_64(int, double*, double*)
_Z8_sigm_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s34, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s34, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB68_7
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[2:3], 0x0
s_mov_b32 s2, 0x652b82fe
s_mov_b32 s8, 0xfefa39ef
s_mov_b32 s10, 0x3b39803f
s_mov_b32 s12, 0xfca7ab0c
s_mov_b32 s14, 0x6a5dcb37
s_mov_b32 s16, 0x623fde64
s_mov_b32 s18, 0x7c89e6b0
s_mov_b32 s20, 0x14761f6e
s_mov_b32 s22, 0x1852b7b0
s_mov_b32 s24, 0x11122322
s_mov_b32 s26, 0x555502a1
s_mov_b32 s28, 0x55555511
s_mov_b32 s30, 11
s_mov_b32 s3, 0xbff71547
s_mov_b32 s9, 0xbfe62e42
s_mov_b32 s11, 0xbc7abc9e
s_mov_b32 s13, 0x3e928af3
s_mov_b32 s15, 0x3e5ade15
s_mov_b32 s17, 0x3ec71dee
s_mov_b32 s19, 0x3efa0199
s_mov_b32 s21, 0x3f2a01a0
s_mov_b32 s23, 0x3f56c16c
s_mov_b32 s25, 0x3f811111
s_mov_b32 s27, 0x3fa55555
s_mov_b32 s29, 0x3fc55555
s_mov_b32 s31, 0x3fe00000
s_waitcnt lgkmcnt(0)
s_mul_i32 s34, s0, s34
s_mov_b32 s35, 0
s_mov_b32 s1, 0x3ff71547
.LBB68_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_le_f64_e32 0, v[4:5]
s_xor_b32 s36, exec_lo, s0
s_cbranch_execz .LBB68_4
v_mul_f64 v[6:7], v[4:5], s[2:3]
v_cmp_nlt_f64_e64 s0, 0x4090cc00, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[6:7], v[6:7]
v_fma_f64 v[8:9], v[6:7], s[8:9], -v[4:5]
v_cvt_i32_f64_e32 v0, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[6:7], s[10:11], v[8:9]
v_fma_f64 v[10:11], v[8:9], s[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[16:17]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], 1.0
v_fma_f64 v[6:7], v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[6:7], v0
v_add_f64 v[6:7], v[6:7], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], 1.0
v_div_scale_f64 v[14:15], vcc_lo, 1.0, v[6:7], 1.0
v_rcp_f64_e32 v[10:11], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
v_mul_f64 v[12:13], v[14:15], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
v_cmp_ngt_f64_e32 vcc_lo, 0xc0900000, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f64 v[6:7], v[8:9], v[6:7], 1.0
v_cndmask_b32_e32 v0, 0, v7, vcc_lo
s_and_b32 vcc_lo, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0x3ff00000, v0, s0
.LBB68_4:
s_and_not1_saveexec_b32 s36, s36
s_cbranch_execz .LBB68_6
s_mov_b32 s0, s2
v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[4:5]
v_mul_f64 v[6:7], v[4:5], s[0:1]
v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[6:7], v[6:7]
v_fma_f64 v[8:9], v[6:7], s[8:9], v[4:5]
v_cvt_i32_f64_e32 v0, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[6:7], s[10:11], v[8:9]
v_fma_f64 v[10:11], v[8:9], s[14:15], s[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[16:17]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], 1.0
v_fma_f64 v[6:7], v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[6:7], v0
v_cndmask_b32_e32 v0, 0x7ff00000, v7, vcc_lo
s_and_b32 vcc_lo, s0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, 0, v6, vcc_lo
v_cndmask_b32_e64 v5, 0, v0, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[4:5], 1.0
v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[10:11], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
v_div_scale_f64 v[12:13], vcc_lo, v[4:5], v[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[14:15], v[12:13], v[10:11]
v_fma_f64 v[8:9], -v[8:9], v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[14:15]
v_div_fixup_f64 v[6:7], v[8:9], v[6:7], v[4:5]
.LBB68_6:
s_or_b32 exec_lo, exec_lo, s36
v_add_nc_u32_e32 v1, s34, v1
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
v_cmp_le_i32_e32 vcc_lo, s33, v1
global_store_b64 v[2:3], v[6:7], off
s_or_b32 s35, vcc_lo, s35
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s35
s_cbranch_execnz .LBB68_2
.LBB68_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sigm_64 | 10,534 | 4,433 | stackv2-00014-of-00015 |
// Demangled: _sign_32(int, float*, float*)
Function : _Z8_sign_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?trans1;
FSETP.LT.AND P0, PT, R2, RZ, PT &req={2} ?WAIT5_END_GROUP;
SEL R10, RZ, 0xffffffff, !P0 ?trans1;
FSETP.GT.AND P0, PT, R2, RZ, PT ?WAIT4_END_GROUP;
I2FP.F32.S32 R10, R10 ?WAIT5_END_GROUP;
FSEL R13, R10, 1, !P0 ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R13 &rd=0x1 ?trans9;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sign_32(int, float*, float*)
_Z8_sign_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB69_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB69_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0, v0
v_cmp_nlt_f32_e64 s0, 0, v0
v_cndmask_b32_e64 v4, 0, -1.0, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, 1.0, v4, s0
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB69_2
.LBB69_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sign_32 | 705 | 740 | stackv2-00014-of-00015 |
// Demangled: _sign_64(int, double*, double*)
Function : _Z8_sign_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x8, R10 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?trans1;
DSETP.GEU.AND P0, PT, R2, RZ, PT &req={2} &wr=0x0 ?trans2;
FSEL R6, RZ, -1.875, P0 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R2, RZ, PT &wr=0x0 ?trans2;
FSEL R7, R6, 1.875, !P0 &req={0} ?trans1;
MOV R6, RZ ?trans1;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R4.64], R6 &rd=0x1 ?trans9;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x1e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sign_64(int, double*, double*)
_Z8_sign_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB70_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
v_mov_b32_e32 v3, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB70_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v7, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
global_load_b64 v[7:8], v[7:8], off
s_waitcnt vmcnt(0)
v_cmp_gt_f64_e32 vcc_lo, 0, v[7:8]
v_cmp_nlt_f64_e64 s0, 0, v[7:8]
v_cndmask_b32_e64 v0, 0, 0xbff00000, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, 0x3ff00000, v0, s0
v_add_co_u32 v5, s0, s6, v5
v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
s_or_b32 s2, vcc_lo, s2
global_store_b64 v[5:6], v[3:4], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB70_2
.LBB70_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sign_64 | 746 | 777 | stackv2-00014-of-00015 |
// Demangled: _sin_32(int, float*, float*)
Function : _Z7_sin_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R2, R3, UR4, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R3, R3, UR4, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R6, R2, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR6][R6.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x820 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R2 ?trans1;
FMUL R8, R0.reuse, 0.63661974668502807617 &req={2} ?trans1;
FSETP.GE.AND P0, PT, |R0|, 105615, PT ?WAIT3_END_GROUP;
F2I.NTZ R11, R8 &wr=0x0 ?trans2;
I2FP.F32.S32 R9, R11 &req={0} ?WAIT5_END_GROUP;
FFMA R10, R9, -1.5707962512969970703, R0 ?WAIT4_END_GROUP;
FFMA R10, R9, -7.5497894158615963534e-08, R10 ?WAIT4_END_GROUP;
FFMA R9, R9, -5.3903029534742383927e-15, R10 ?trans1;
@!P0 BRA 0x810 ?trans6;
FSETP.NEU.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@!P0 FMUL R9, RZ, R0 ?trans1;
@!P0 MOV R11, RZ ?trans1;
@!P0 BRA 0x810 ?trans6;
LDCU.64 UR4, c[0x4][URZ] &wr=0x0 ?trans1;
IMAD.SHL.U32 R8, R0, 0x100, RZ ?trans2;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R6, RZ ?trans2;
MOV.64 R10, RZ ?WAIT3_END_GROUP;
LOP3.LUT R18, R8, 0x80000000, RZ, 0xfc, !PT ?trans1;
MOV.64 R8, UR4 &req={0} ?WAIT8_END_GROUP;
LDG.E.CONSTANT R19, desc[UR6][R8.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, 0x1, RZ ?trans1;
ISETP.EQ.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P2, PT, R10.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P3, PT, R10.reuse, 0x8, PT ?trans1;
ISETP.EQ.AND P4, PT, R10.reuse, 0xc, PT ?trans1;
ISETP.EQ.AND P5, PT, R10.reuse, 0x10, PT ?trans1;
ISETP.EQ.AND P6, PT, R10.reuse, 0x14, PT ?trans1;
ISETP.NE.AND P0, PT, R17, 0x6, PT ?trans1;
IADD.64 R10, R10, 0x4 ?trans2;
IADD.64 R8, R8, 0x4 &req={0} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R6, R19, R18, R6 &req={2} ?WAIT3_END_GROUP;
@P1 MOV R4, R6.reuse ?trans1;
@P2 MOV R16, R6.reuse ?trans1;
@P3 MOV R12, R6.reuse ?trans1;
@P4 MOV R13, R6.reuse ?trans1;
@P5 MOV R14, R6.reuse ?trans1;
@P6 MOV R15, R6 ?trans1;
MOV R6, R7 ?trans1;
MOV R7, RZ ?trans1;
@P0 BRA 0x230 ?trans6;
SHF.R.U32.HI R8, RZ, 0x17, R0 ?trans1;
BSSY.RECONVERGENT B1, 0x680 ?trans3;
LOP3.LUT R9, R8.reuse, 0xe0, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P5, RZ, R8, 0x1f, RZ, 0xc0, !PT ?trans2;
IADD3 R9, PT, PT, R9, -0x80, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R9, RZ, 0x5, R9 ?WAIT5_END_GROUP;
IMAD.U32 R17, R9, -0x4, RZ ?WAIT5_END_GROUP;
ISETP.EQ.AND P2, PT, R17.reuse, -0x18, PT ?trans1;
ISETP.EQ.AND P3, PT, R17.reuse, -0x14, PT ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, -0x10, PT ?trans1;
ISETP.EQ.AND P0, PT, R17.reuse, -0xc, PT ?trans1;
ISETP.EQ.AND P6, PT, R17.reuse, -0x4, PT ?trans1;
ISETP.EQ.AND P4, PT, R17, RZ, PT ?WAIT8_END_GROUP;
@P2 MOV R9, R4.reuse ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, -0x8, PT ?trans1;
@P3 MOV R10, R4 ?trans1;
@P3 MOV R9, R16 ?trans1;
ISETP.EQ.AND P3, PT, R17, 0x4, PT ?trans1;
@P1 MOV R9, R12 ?trans1;
@P0 MOV R9, R13 ?trans1;
@P1 MOV R10, R16 ?trans1;
@P0 MOV R10, R12 ?WAIT6_END_GROUP;
@P2 MOV R9, R14 ?trans1;
@P6 MOV R9, R15 ?trans1;
@P4 MOV R9, R6 ?trans1;
@P2 MOV R10, R13 ?trans1;
@P6 MOV R10, R14 ?trans1;
@P4 MOV R10, R15 ?trans1;
@P3 MOV R10, R6 ?trans1;
MOV R11, R9 ?trans1;
@!P5 BRA 0x670 ?trans6;
@P1 MOV R18, R4 ?trans1;
@P0 MOV R18, R16 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x8, PT ?trans1;
LOP3.LUT R8, R8, 0x1f, RZ, 0xc0, !PT ?trans1;
@P2 MOV R18, R12 ?trans1;
@P6 MOV R18, R13 ?trans1;
@P4 MOV R18, R14 ?trans1;
@P3 MOV R18, R15 ?trans1;
IADD3 R7, PT, PT, -R8, 0x20, RZ ?trans2;
SHF.L.U32 R11, R11, R8, RZ ?WAIT5_END_GROUP;
@P0 MOV R18, R6 ?trans1;
SHF.L.U32 R6, R10, R8, RZ ?trans2;
SHF.R.U32.HI R10, RZ, R7.reuse, R10 ?trans2;
SHF.R.U32.HI R7, RZ, R7, R18 ?trans2;
IADD3 R11, PT, PT, R11, R10, RZ ?trans2;
IADD3 R10, PT, PT, R6, R7, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IMAD.SHL.U32 R18, R11, 0x4, RZ ?trans1;
SHF.L.U32.HI R17, R10.reuse, 0x2, R11.reuse ?trans1;
IMAD.SHL.U32 R8, R10, 0x4, RZ ?trans1;
SHF.R.U32.HI R11, RZ, 0x1e, R11 ?trans1;
UMOV.64 UR4, 0x3bf921fb54442d19 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R18 ?trans1;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
LOP3.LUT R0, R17, R0, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R8, R6.reuse, R8, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R9, R6, R17, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
LEA.HI R11, R18, R11, RZ, 0x1 ?trans2;
I2F.F64.S64 R6, R8 &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R0, RZ, PT ?trans1;
IADD3 R0, PT, PT, -R11, RZ, RZ ?WAIT5_END_GROUP;
@!P0 MOV R11, R0 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R6, R6 &req={0} &wr=0x0 ?trans2;
FSEL R9, -R6, R6, !P1 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LOP3.LUT R6, R11, 0x1, RZ, 0xc0, !PT ?trans1;
HFMA2 R0, -RZ, RZ, 0.487060546875, -0.0625 ?trans2;
FMUL R7, R9, R9 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R8, 0x3effffff ?trans1;
ISETP.NE.U32.AND P0, PT, R6, 0x1, PT ?trans1;
FFMA R0, R7, R0, -0.0013887860113754868507 ?trans1;
MOV R6, 0x3d2aaabb ?trans1;
LOP3.LUT P1, RZ, R11, 0x2, RZ, 0xc0, !PT ?trans2;
FSEL R11, -R8, -0.16666662693023681641, !P0 ?trans1;
FSEL R0, R0, -0.00019574658654164522886, !P0 ?trans1;
FSEL R6, R6, 0.0083327032625675201416, !P0 ?WAIT5_END_GROUP;
FFMA R6, R7, R0, R6 ?trans1;
FSEL R0, R9, 1, P0 ?WAIT3_END_GROUP;
FFMA R11, R7.reuse, R6, R11 ?trans1;
LEA R6, P0, R2.reuse, UR4, 0x2 &req={0} ?trans1;
FFMA R7, R7, R0, RZ ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x0 ?trans3;
FFMA R11, R7, R11, R0 ?trans1;
LEA.HI.X R7, R2, UR5, R5, 0x2, P0 ?trans2;
IADD3 R2, PT, PT, R3, R2, RZ ?trans1;
@P1 FADD R11, RZ, -R11 ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R11 &rd=0x2 ?trans1;
ISETP.GE.AND P0, PT, R2, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0xb0 &req={2} ?trans5;
EXIT ?trans5;
BRA 0x9c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sin_32(int, float*, float*)
_Z7_sin_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB71_7
s_load_b32 s11, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
v_mov_b32_e32 v3, 0
s_mov_b32 s2, 0
s_mov_b32 s3, 0x7fffff
s_mov_b32 s9, 0xb94c1982
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s11, s10
s_mov_b32 s11, 0x37d75334
.LBB71_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_co_u32 v6, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
global_load_b32 v0, v[6:7], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v6, 0x7fffffff, v0
v_cmpx_ngt_f32_e64 0x48000000, |v0|
s_xor_b32 s12, exec_lo, s1
s_cbranch_execz .LBB71_4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_and_or_b32 v15, v6, s3, 0x800000
v_lshrrev_b32_e32 v12, 23, v6
v_mad_u64_u32 v[7:8], null, 0xfe5163ab, v15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v13, 0xffffff88, v12
v_cmp_lt_u32_e32 vcc_lo, 63, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mov_b32_e32 v2, v8
v_cndmask_b32_e64 v14, 0, 0xffffffc0, vcc_lo
v_mad_u64_u32 v[8:9], null, 0x3c439041, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v14, v14, v13
v_mov_b32_e32 v2, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e64 s0, 31, v14
v_mad_u64_u32 v[9:10], null, 0xdb629599, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v16, 0, 0xffffffe0, s0
v_add_nc_u32_e32 v16, v16, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_mov_b32 v2, v10 :: v_dual_cndmask_b32 v7, v9, v7
v_cmp_lt_u32_e64 s1, 31, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[10:11], null, 0xf534ddc0, v15, v[2:3]
v_mov_b32_e32 v2, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v8, v10, v8, vcc_lo
v_mad_u64_u32 v[11:12], null, 0xfc2757d1, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v7, v8, v7, s0
v_mov_b32_e32 v2, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[12:13], null, 0x4e441529, v15, v[2:3]
v_mov_b32_e32 v2, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[13:14], null, 0xa2f9836e, v15, v[2:3]
v_cndmask_b32_e64 v2, 0, 0xffffffe0, s1
v_dual_cndmask_b32 v15, v12, v10 :: v_dual_add_nc_u32 v2, v2, v16
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v13, v13, v11 :: v_dual_cndmask_b32 v12, v14, v12
v_cndmask_b32_e32 v11, v11, v9, vcc_lo
v_sub_nc_u32_e32 v14, 32, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v10, v13, v15, s0
v_cndmask_b32_e64 v12, v12, v13, s0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v13, v15, v11, s0
v_cndmask_b32_e64 v11, v11, v8, s0
v_cmp_eq_u32_e32 vcc_lo, 0, v2
v_cndmask_b32_e64 v12, v12, v10, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v10, v10, v13, s1
v_cndmask_b32_e64 v13, v13, v11, s1
v_cndmask_b32_e64 v7, v11, v7, s1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v15, v12, v10, v14
v_alignbit_b32 v9, v10, v13, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v2, v15, v12, vcc_lo
v_cndmask_b32_e32 v8, v9, v10, vcc_lo
v_alignbit_b32 v12, v13, v7, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_bfe_u32 v9, v2, 29, 1
v_alignbit_b32 v10, v2, v8, 30
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v12, v12, v13, vcc_lo
v_sub_nc_u32_e32 v11, 0, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_alignbit_b32 v8, v8, v12, 30
v_alignbit_b32 v7, v12, v7, 30
v_xor_b32_e32 v10, v10, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v8, v8, v11
v_xor_b32_e32 v7, v7, v11
v_lshrrev_b32_e32 v11, 29, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_clz_i32_u32_e32 v13, v10
v_lshlrev_b32_e32 v11, 31, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_min_u32_e32 v13, 32, v13
v_or_b32_e32 v14, 0.5, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v12, 31, v13
v_lshlrev_b32_e32 v15, 23, v13
v_alignbit_b32 v10, v10, v8, v12
v_alignbit_b32 v7, v8, v7, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v14, v14, v15
v_alignbit_b32 v8, v10, v7, 9
v_lshrrev_b32_e32 v10, 9, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_clz_i32_u32_e32 v12, v8
v_min_u32_e32 v12, 32, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v16, 31, v12
v_alignbit_b32 v7, v8, v7, v16
v_or_b32_e32 v8, v10, v14
v_add_lshl_u32 v10, v12, v13, 23
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshrrev_b32_e32 v7, 9, v7
v_mul_f32_e32 v12, 0x3fc90fda, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v7, v7, v10
v_fma_f32 v10, 0x3fc90fda, v8, -v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v7, 0x33000000, v7
v_fmac_f32_e32 v10, 0x33a22168, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_e32 v7, v7, v11
v_fmac_f32_e32 v10, 0x3fc90fda, v7
v_lshrrev_b32_e32 v7, 30, v2
s_delay_alu instid0(VALU_DEP_1)
v_dual_add_f32 v2, v12, v10 :: v_dual_add_nc_u32 v7, v9, v7
.LBB71_4:
s_and_not1_saveexec_b32 s0, s12
v_mul_f32_e64 v2, 0x3f22f983, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v7, v2
v_fma_f32 v2, 0xbfc90fda, v7, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, 0xb3a22168, v7
v_fmac_f32_e32 v2, 0xa7c234c4, v7
v_cvt_i32_f32_e32 v7, v7
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_dual_mul_f32 v8, v2, v2 :: v_dual_and_b32 v11, 1, v7
v_xor_b32_e32 v6, v6, v0
v_cmp_class_f32_e64 s0, v0, 0x1f8
v_lshlrev_b32_e32 v7, 30, v7
v_fmaak_f32 v9, s9, v8, 0x3c0881c4
v_cmp_eq_u32_e32 vcc_lo, 0, v11
v_add_nc_u32_e32 v1, s10, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_and_b32_e32 v7, 0x80000000, v7
v_fmaak_f32 v9, v8, v9, 0xbe2aaa9d
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmaak_f32 v10, s11, v8, 0xbab64f3b :: v_dual_mul_f32 v9, v8, v9
v_fmaak_f32 v10, v8, v10, 0x3d2aabf7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v2, v2, v9
v_fmaak_f32 v10, v8, v10, 0xbf000004
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v8, v8, v10, 1.0
v_cndmask_b32_e32 v2, v8, v2, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_xor3_b32 v2, v6, v7, v2
s_or_b32 s2, vcc_lo, s2
v_cndmask_b32_e64 v0, 0x7fc00000, v2, s0
v_add_co_u32 v4, s0, s6, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
global_store_b32 v[4:5], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB71_2
.LBB71_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sin_32 | 3,640 | 4,636 | stackv2-00014-of-00015 |
// Demangled: _sin_64(int, double*, double*)
Function : _Z7_sin_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x2fc] &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
IADD3 R1, PT, PT, R1, -0x30, RZ &req={0} ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
LDCU UR6, c[0x0][0x380] &wr=0x0 ?trans3;
MOV R2, R1 ?WAIT2_END_GROUP;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R5, UR4, R0 &req={1} ?trans1;
LDCU UR4, c[0x0][0x2f8] &wr=0x2 ?trans4;
ISETP.GE.AND P0, PT, R0, UR6, PT &req={0} ?trans1;
IADD.64 R22, R2, UR4 &req={2} ?WAIT12_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R2, R0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR12, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x4][0x10] &wr=0x4 ?trans1;
LDCU.64 UR10, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R3, R5, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R8, R2, 0x8, R10 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R14, desc[UR6][R8.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x4d0 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R2 &req={1} ?trans1;
ISETP.NE.AND P0, PT, R14, RZ, PT &req={2} ?trans1;
LOP3.LUT R0, R15, 0x7fffffff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ?WAIT13_END_GROUP;
@!P0 DMUL R6, RZ, R14 &rd=0x0 &wr=0x1 ?trans1;
@!P0 MOV R0, RZ ?trans1;
@!P0 BRA 0x4c0 &req={1,0} ?trans6;
UMOV.64 UR4, 0x3fe45f306dc9c883 ?trans1;
DSETP.GE.AND P0, PT, |R14|, 2.14748364800000000000e+09, PT ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R14, UR4 &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ff921fb54442d18 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2I.F64 R0, R8 &req={0} &wr=0x0 ?trans2;
STL [R1], R0 &req={0} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R6, R0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R6, -UR4, R14 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3c91a62633145c00 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R6, -UR4, R12 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x397b839a252049c0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, -UR4, R12 &req={1} &rd=0x0 &wr=0x1 ?trans2;
@!P0 BRA 0x4c0 &req={1,0} ?trans5;
BSSY.RECONVERGENT B1, 0x490 ?trans1;
MOV R0, 0x480 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x950 &req={4,3} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDL R0, [R1] &rd=0x0 &wr=0x5 ?trans1;
MOV R6, R12 ?trans1;
MOV R7, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
IMAD.SHL.U32 R26, R0, 0x40, RZ &req={5} ?trans2;
HFMA2 R27, -RZ, RZ, 0, 0 ?WAIT3_END_GROUP;
LOP3.LUT R26, R26, 0x40, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
IADD.64 R26, R26, UR8 ?WAIT6_END_GROUP;
LDG.E.64.CONSTANT R24, desc[UR6][R26.64+0x8] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R20, desc[UR6][R26.64+0x10] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R18, desc[UR6][R26.64+0x18] &wr=0x4 ?trans4;
LDG.E.64.CONSTANT R16, desc[UR6][R26.64+0x20] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R8, desc[UR6][R26.64+0x28] &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R14, desc[UR6][R26.64+0x30] &wr=0x3 ?trans1;
LOP3.LUT R4, R0, 0x1, RZ, 0xc0, !PT ?trans1;
DMUL R12, R6, R6 &wr=0x2 ?trans1;
MOV R28, 0x20fd8164 ?WAIT3_END_GROUP;
ISETP.NE.U32.AND P0, PT, R4, 0x1, PT ?trans1;
MOV R4, 0x3da8ff83 ?WAIT4_END_GROUP;
FSEL R28, R28, -8.06006814911005101289e+34, !P0 ?trans1;
FSEL R29, -R4, 0.11223486810922622681, !P0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R12, R28, R24 &req={2} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, R12, R24, R20 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R20, R18 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, R18, R16 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R16, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R8, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, R6 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R12, R8, 1 &wr=0x1 ?trans2;
FSEL R8, R8, R6, !P0 &req={1} ?trans1;
FSEL R9, R9, R7, !P0 ?trans1;
LOP3.LUT P0, RZ, R0, 0x2, RZ, 0xc0, !PT ?trans2;
LEA R12, P1, R2, UR10, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R13, R2, UR11, R5, 0x3, P1 ?trans2;
IADD3 R2, PT, PT, R3, R2, RZ ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, RZ, -R8 &wr=0x1 ?trans2;
FSEL R4, R8, R6, !P0 &req={1} ?trans1;
FSEL R5, R9, R7, !P0 ?trans1;
ISETP.GE.AND P0, PT, R2, UR12, PT ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R12.64], R4 &rd=0x1 ?trans9;
@!P0 BRA 0x160 ?trans5;
EXIT ?trans5;
SHF.R.U32.HI R4, RZ, 0x14, R15 ?trans1;
MOV R12, R14 ?trans1;
MOV R13, R15 ?trans2;
LOP3.LUT R6, R4, 0x7ff, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R6, 0x7ff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1360 ?trans5;
IADD3 R6, PT, PT, R6, -0x400, RZ ?trans1;
BSSY.RECONVERGENT B2, 0xcd0 ?trans1;
MOV.64 R24, RZ ?WAIT3_END_GROUP;
IADD3 R8, PT, PT, R1, 0x8, RZ ?trans2;
SHF.R.U32.HI R14, RZ, 0x6, R6 ?trans1;
ISETP.GE.U32.AND P0, PT, R6, 0x80, PT ?WAIT3_END_GROUP;
IADD3 R6, PT, PT, -R14.reuse, 0x13, RZ ?trans2;
IADD3 R29, PT, PT, -R14, 0xf, RZ ?WAIT3_END_GROUP;
SEL R6, R6, 0x12, P0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R29, R6, PT ?WAIT13_END_GROUP;
@P0 BRA 0xcc0 ?trans5;
LDC.64 R16, c[0x0][0x358] &wr=0x0 ?trans1;
SHF.L.U64.HI R7, R12.reuse, 0xb, R13 ?trans1;
HFMA2 R27, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R24, RZ ?trans2;
BSSY.RECONVERGENT B3, 0xcb0 ?trans1;
IMAD.SHL.U32 R9, R12, 0x800, RZ ?trans1;
IADD3 R26, PT, PT, RZ, -R14, -R6 ?trans1;
LDC.64 R18, c[0x4][0x8] &wr=0x1 ?trans1;
LOP3.LUT R7, R7, 0x80000000, RZ, 0xfc, !PT ?WAIT7_END_GROUP;
R2UR UR4, R16 &req={0} ?trans1;
IMAD.WIDE R20, R29, 0x8, R18 &req={1} ?trans1;
R2UR UR5, R17 ?WAIT13_END_GROUP;
LDG.E.64.CONSTANT R20, desc[UR4][R20.64] &wr=0x2 ?trans1;
IADD3 R26, PT, PT, R26, 0x1, RZ ?trans2;
IADD3 R29, PT, PT, R29, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R24, P2, R20, R9, R24 &req={2} ?WAIT4_END_GROUP;
IMAD R31, R20, R7, RZ ?trans2;
IMAD R28, R21.reuse, R9.reuse, RZ ?trans2;
IMAD.HI.U32 R33, R21, R9, RZ ?trans1;
IADD3 R25, P1, PT, R31, R25, RZ ?WAIT3_END_GROUP;
IMAD R31, R27.reuse, 0x8, R8 ?trans1;
IADD3 R25, P0, PT, R28, R25, RZ ?trans1;
IMAD.HI.U32 R28, R20, R7, RZ ?trans1;
IADD3 R27, PT, PT, R27, 0x1, RZ ?WAIT3_END_GROUP;
STL.64 [R31], R24 &rd=0x0 ?trans1;
IADD3.X R20, PT, PT, R28, RZ, RZ, P2, !PT ?trans1;
IMAD.HI.U32 R28, R21, R7, RZ ?WAIT3_END_GROUP;
IADD3.X R20, P1, PT, R33, R20, RZ, P1, !PT ?trans1;
IMAD R33, R21, R7, RZ ?WAIT3_END_GROUP;
IADD3.X R21, PT, PT, R28, RZ, RZ, P1, !PT ?trans1;
ISETP.NE.AND P1, PT, R26, -0xf, PT ?trans1;
IADD3.X R20, P0, PT, R33, R20, RZ, P0, !PT ?WAIT4_END_GROUP;
IADD3.X R21, PT, PT, RZ, R21, RZ, P0, !PT ?trans1;
MOV R24, R20 &req={0} ?WAIT4_END_GROUP;
MOV R25, R21 ?WAIT3_END_GROUP;
@P1 BRA 0xaf0 ?trans5;
BSYNC.RECONVERGENT B3 ?trans5;
MOV R29, R6 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
SHF.R.S32.HI R7, RZ, 0x1f, R29 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
MOV R6, R29 ?trans1;
LOP3.LUT P0, R27, R4, 0x3f, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD.64 R6, R6, R14 ?WAIT6_END_GROUP;
IMAD.U32 R21, R6, 0x8, R8 ?WAIT5_END_GROUP;
STL.64 [R21+-0x78], R24 &rd=0x0 ?trans4;
LDL.64 R16, [R1+0x18] &wr=0x2 ?trans4;
LDL.64 R6, [R1+0x20] &wr=0x3 ?trans4;
@P0 LDL.64 R8, [R1+0x10] &wr=0x4 ?trans1;
@P0 IADD3 R4, PT, PT, -R27, 0x40, RZ ?trans1;
LDCU UR4, c[0x0][0x2f8] &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x2fc] &wr=0x1 ?trans2;
@P0 SHF.R.U64 R12, R16, R4, R17 &req={2} ?WAIT2_END_GROUP;
@P0 SHF.R.U32.HI R15, RZ, R4, R17 ?trans2;
@P0 SHF.L.U32 R19, R6.reuse, R27.reuse, RZ &req={3} ?trans2;
@P0 SHF.L.U64.HI R14, R6, R27, R7 ?trans2;
@P0 LOP3.LUT R12, R19, R12, RZ, 0xfc, !PT ?trans2;
@P0 SHF.R.U64 R8, R8, R4.reuse, R9.reuse &req={4} ?trans2;
@P0 SHF.R.U32.HI R4, RZ, R4, R9 ?WAIT2_END_GROUP;
@P0 SHF.L.U64.HI R9, R16, R27, R17 ?trans1;
@P0 MOV R6, R12 ?trans1;
@P0 LOP3.LUT R15, R14, R15, RZ, 0xfc, !PT ?trans2;
@P0 LOP3.LUT R17, R4, R9, RZ, 0xfc, !PT ?trans2;
@P0 SHF.L.U32 R19, R16, R27, RZ ?trans1;
IMAD.SHL.U32 R4, R6, 0x4, RZ ?trans1;
@P0 MOV R7, R15 ?trans1;
SHF.R.U32.HI R9, RZ, 0x1e, R17 ?trans2;
@P0 LOP3.LUT R16, R8, R19, RZ, 0xfc, !PT ?WAIT2_END_GROUP;
LOP3.LUT R14, R4, R9, RZ, 0xfc, !PT ?trans2;
SHF.L.U64.HI R4, R6, 0x2, R7 ?trans1;
IMAD.SHL.U32 R18, R16.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R21, R16, 0x2, R17 &req={0} ?trans2;
LOP3.LUT R6, RZ, R14, RZ, 0x33, !PT ?trans1;
MOV R15, R4 ?trans1;
IADD3 RZ, P0, PT, RZ, -R18, RZ ?trans2;
LOP3.LUT R16, RZ, R21, RZ, 0x33, !PT ?WAIT2_END_GROUP;
ISETP.GT.S64.AND P1, PT, R14, -0x1, PT ?WAIT3_END_GROUP;
IADD3.X R17, P0, PT, RZ, R16, RZ, P0, !PT ?trans2;
LOP3.LUT R8, RZ, R4, RZ, 0x33, !PT ?trans2;
IADD3.X R6, P0, PT, RZ, R6, RZ, P0, !PT ?trans2;
IADD3 R16, PT, PT, -R18, RZ, RZ ?trans2;
IADD3.X R9, PT, PT, RZ, R8, RZ, P0, !PT ?WAIT3_END_GROUP;
@!P1 MOV R14, R6 ?trans1;
@P1 MOV R16, R18 ?trans1;
@!P1 MOV R15, R9 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
@P1 MOV R17, R21 ?WAIT3_END_GROUP;
ISETP.NE.U32.AND P0, PT, R15, RZ, PT ?WAIT5_END_GROUP;
SEL R6, R14, R15, !P0 ?WAIT6_END_GROUP;
FLO.U32 R6, R6 &wr=0x0 ?trans2;
IADD3 R8, PT, PT, -R6.reuse, 0x1f, RZ &req={0} ?trans2;
IADD3 R12, PT, PT, -R6, 0x3f, RZ ?trans2;
@P0 IADD3 R12, PT, PT, R8, RZ, RZ ?WAIT5_END_GROUP;
MOV R8, R12 ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R8, RZ, PT ?WAIT14_END_GROUP;
@P0 IADD3 R19, PT, PT, -R8, 0x40, RZ ?trans2;
@P0 SHF.L.U64.HI R18, R14, R8.reuse, R15 ?trans2;
@P0 SHF.R.U64 R12, R16, R19.reuse, R17.reuse ?trans2;
@P0 SHF.R.U32.HI R17, RZ, R19, R17 ?trans2;
@P0 SHF.L.U32 R19, R14, R8, RZ ?trans2;
@P0 LOP3.LUT R17, R17, R18, RZ, 0xfc, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R6, R12, R19, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@P0 MOV R15, R17 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
@P0 MOV R14, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R6, R15, -0x36f0255e, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R18, R14, 0x2168c235, RZ ?WAIT5_END_GROUP;
MOV R16, R19 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R16, R14, -0x36f0255e, R16 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, P0, R15, 0x2168c235, R16 ?WAIT4_END_GROUP;
IMAD R15, R15, -0x36f0255e, RZ ?trans1;
IADD3.X R6, PT, PT, R6, RZ, RZ, P0, !PT ?WAIT4_END_GROUP;
IADD3 R14, P0, PT, R15, R17, RZ ?WAIT4_END_GROUP;
IADD3.X R15, PT, PT, RZ, R6, RZ, P0, !PT ?trans2;
IADD3 RZ, P0, PT, R18, R18, RZ ?WAIT3_END_GROUP;
ISETP.GT.S64.AND P2, PT, R14, RZ, PT ?WAIT3_END_GROUP;
IADD3.X RZ, P0, PT, R16, R16, RZ, P0, !PT ?WAIT4_END_GROUP;
IADD3.X R6, P0, PT, R14, R14, RZ, P0, !PT ?WAIT4_END_GROUP;
IADD3.X R17, PT, PT, R15, R15, RZ, P0, !PT ?trans2;
LOP3.LUT P0, R12, R13, 0x80000000, RZ, 0xc0, !PT ?trans1;
@P2 MOV R14, R6 ?trans2;
@P2 MOV R15, R17 ?trans1;
SHF.R.U32.HI R13, RZ, 0x1e, R7 ?trans1;
IADD.64 R6, R22, -UR4 &req={1} ?trans2;
UMOV.64 UR4, 0x3fe0000000000000 ?trans1;
IADD.64 R16, R14, 0x1 ?WAIT2_END_GROUP;
SEL.64 R14, RZ, -0x1, !P2 ?trans2;
MOV R19, R6 ?trans1;
LEA.HI R4, R4, R13, RZ, 0x1 ?trans1;
IADD.64 R14, -R8, R14 ?WAIT3_END_GROUP;
SHF.R.U64 R16, R16, 0xa, R17.reuse ?trans2;
SHF.R.U32.HI R17, RZ, 0xa, R17 ?trans1;
IMAD.SHL.U32 R15, R14, 0x100000, RZ ?trans1;
@P0 IADD3 R4, PT, PT, -R4, RZ, RZ ?trans1;
HFMA2 R14, -RZ, RZ, 0, 0 ?trans1;
@!P1 LOP3.LUT R12, R12, 0x80000000, RZ, 0x3c, !PT ?trans1;
IADD.64 R6, R16, 0x1 ?trans2;
STL [R19], R4 &rd=0x0 ?trans3;
SHF.R.U64 R6, R6, 0x1, R7 ?WAIT2_END_GROUP;
SHF.R.U32.HI R7, RZ, 0x1, R7 ?WAIT5_END_GROUP;
IADD.64 R6, R14, R6 ?WAIT4_END_GROUP;
IADD.64 R6, R6, UR4 ?WAIT5_END_GROUP;
LOP3.LUT R13, R7, R12, RZ, 0xfc, !PT ?trans1;
MOV R12, R6 &req={0} ?WAIT7_END_GROUP;
MOV R6, R0 ?trans1;
MOV R7, 0x0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0x1390;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sin_64(int, double*, double*)
_Z7_sin_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s22, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s22, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB72_7
s_load_b32 s45, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
v_mov_b32_e32 v3, 0
s_mov_b32 s2, 0x54442d18
s_mov_b32 s8, 0x6dc9c883
s_mov_b32 s10, 0x33145c00
s_mov_b32 s12, 0x252049c0
s_mov_b32 s14, 0x9037ab78
s_mov_b32 s16, 0x46cc5e42
s_mov_b32 s18, 0xa17f65f6
s_mov_b32 s20, 0x19f4ec90
s_mov_b32 s24, 0x55555555
s_mov_b32 s26, 0xb42fdfa7
s_mov_b32 s28, 0xf9a43bb8
s_mov_b32 s30, 0x796cde01
s_mov_b32 s34, 0x19e83e5c
s_mov_b32 s36, 0x11110bb3
s_mov_b32 s44, 0
s_mov_b32 s1, 0x3ff921fb
s_mov_b32 s3, 0xbff921fb
s_waitcnt lgkmcnt(0)
s_mul_i32 s45, s45, s22
s_mov_b32 s22, 0x16c16967
s_mov_b32 s9, 0x3fe45f30
s_mov_b32 s11, 0xbc91a626
s_mov_b32 s13, 0xb97b839a
s_mov_b32 s15, 0x3e21eeb6
s_mov_b32 s17, 0xbda907db
s_mov_b32 s19, 0xbe927e4f
s_mov_b32 s21, 0x3efa01a0
s_mov_b32 s23, 0xbf56c16c
s_mov_b32 s25, 0x3fa55555
s_mov_b32 s27, 0xbe5ae600
s_mov_b32 s29, 0x3de5e0b2
s_mov_b32 s31, 0x3ec71de3
s_mov_b32 s35, 0xbf2a01a0
s_mov_b32 s37, 0x3f811111
s_mov_b32 s39, 0x3c91a626
s_mov_b32 s40, 0x33145c07
s_mov_b32 s43, 0xbfc55555
.LBB72_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s38, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_add_co_u32 v7, vcc_lo, s4, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
global_load_b64 v[7:8], v[7:8], off
s_waitcnt vmcnt(0)
v_cmpx_ngt_f64_e64 0x41d00000, |v[7:8]|
s_xor_b32 s38, exec_lo, s38
s_cbranch_execz .LBB72_4
v_ldexp_f64 v[9:10], |v[7:8]|, 0xffffff80
v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[7:8]|
v_trig_preop_f64 v[11:12], |v[7:8]|, 0
v_and_b32_e32 v0, 0x7fffffff, v8
v_trig_preop_f64 v[13:14], |v[7:8]|, 1
v_trig_preop_f64 v[23:24], |v[7:8]|, 2
s_mov_b32 s41, s39
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v9, v7, v9 :: v_dual_cndmask_b32 v10, v0, v10
v_mul_f64 v[15:16], v[11:12], v[9:10]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[17:18], v[13:14], v[9:10]
v_fma_f64 v[11:12], v[11:12], v[9:10], -v[15:16]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[13:14], v[13:14], v[9:10], -v[17:18]
v_add_f64 v[19:20], v[17:18], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[21:22], v[19:20], -v[17:18]
v_add_f64 v[27:28], v[15:16], v[19:20]
v_add_f64 v[25:26], v[19:20], -v[21:22]
v_add_f64 v[11:12], v[11:12], -v[21:22]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_ldexp_f64 v[21:22], v[27:28], -2
v_add_f64 v[15:16], v[27:28], -v[15:16]
v_add_f64 v[17:18], v[17:18], -v[25:26]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
v_add_f64 v[15:16], v[19:20], -v[15:16]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f64 v[11:12], v[11:12], v[17:18]
v_fract_f64_e32 v[17:18], v[21:22]
v_cndmask_b32_e32 v17, 0, v17, vcc_lo
v_mul_f64 v[29:30], v[23:24], v[9:10]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v18, 0, v18, vcc_lo
v_ldexp_f64 v[17:18], v[17:18], 2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[25:26], v[29:30], v[13:14]
v_fma_f64 v[9:10], v[23:24], v[9:10], -v[29:30]
v_add_f64 v[19:20], v[25:26], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[21:22], v[15:16], v[19:20]
v_add_f64 v[31:32], v[19:20], -v[25:26]
v_add_f64 v[27:28], v[21:22], v[17:18]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_add_f64 v[37:38], v[19:20], -v[31:32]
v_add_f64 v[11:12], v[11:12], -v[31:32]
v_add_f64 v[15:16], v[21:22], -v[15:16]
v_cmp_gt_f64_e32 vcc_lo, 0, v[27:28]
v_add_f64 v[27:28], v[25:26], -v[29:30]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[15:16], v[19:20], -v[15:16]
v_cndmask_b32_e64 v4, 0, 0x40100000, vcc_lo
v_add_f64 v[35:36], v[25:26], -v[27:28]
v_add_f64 v[13:14], v[13:14], -v[27:28]
v_add_f64 v[25:26], v[25:26], -v[37:38]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_f64 v[17:18], v[17:18], v[3:4]
v_add_f64 v[27:28], v[29:30], -v[35:36]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[11:12], v[11:12], v[25:26]
v_add_f64 v[33:34], v[21:22], v[17:18]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[13:14], v[13:14], v[27:28]
v_cvt_i32_f64_e32 v0, v[33:34]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[11:12], v[13:14], v[11:12]
v_cvt_f64_i32_e32 v[31:32], v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[9:10], v[9:10], v[11:12]
v_add_f64 v[17:18], v[17:18], -v[31:32]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[9:10], v[15:16], v[9:10]
v_add_f64 v[13:14], v[21:22], v[17:18]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[11:12], v[13:14], -v[17:18]
v_cmp_le_f64_e32 vcc_lo, 0.5, v[13:14]
v_add_f64 v[11:12], v[21:22], -v[11:12]
v_cndmask_b32_e64 v4, 0, 0x3ff00000, vcc_lo
v_add_co_ci_u32_e64 v0, s0, 0, v0, vcc_lo
s_mov_b32 s0, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[9:10], v[9:10], v[11:12]
v_add_f64 v[11:12], v[13:14], -v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[13:14], v[11:12], v[9:10]
v_mul_f64 v[15:16], v[13:14], s[0:1]
v_add_f64 v[11:12], v[13:14], -v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[17:18], v[13:14], s[0:1], -v[15:16]
v_add_f64 v[9:10], v[9:10], -v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[11:12], v[13:14], s[40:41], v[17:18]
v_fma_f64 v[11:12], v[9:10], s[0:1], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[9:10], v[15:16], v[11:12]
v_add_f64 v[13:14], v[9:10], -v[15:16]
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[11:12], v[11:12], -v[13:14]
.LBB72_4:
s_and_not1_saveexec_b32 s0, s38
s_cbranch_execz .LBB72_6
v_mul_f64 v[9:10], |v[7:8]|, s[8:9]
s_mov_b32 s38, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[13:14], v[9:10]
v_fma_f64 v[9:10], v[13:14], s[2:3], |v[7:8]|
v_mul_f64 v[11:12], v[13:14], s[10:11]
v_cvt_i32_f64_e32 v0, v[13:14]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[17:18], v[13:14], s[10:11], v[9:10]
v_add_f64 v[15:16], v[9:10], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[9:10], v[9:10], -v[15:16]
v_add_f64 v[15:16], v[15:16], -v[17:18]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[9:10], v[9:10], v[11:12]
v_fma_f64 v[11:12], v[13:14], s[38:39], v[11:12]
v_add_f64 v[9:10], v[15:16], v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[9:10], v[9:10], -v[11:12]
v_fma_f64 v[11:12], v[13:14], s[12:13], v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[9:10], v[17:18], v[11:12]
v_add_f64 v[15:16], v[9:10], -v[17:18]
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[11:12], v[11:12], -v[15:16]
.LBB72_6:
s_or_b32 exec_lo, exec_lo, s0
v_mul_f64 v[13:14], v[9:10], v[9:10]
s_delay_alu instid0(VALU_DEP_2)
v_mul_f64 v[23:24], v[11:12], 0.5
s_mov_b32 s42, s24
v_cmp_class_f64_e64 s0, v[7:8], 0x1f8
v_and_b32_e32 v2, 1, v0
v_lshlrev_b32_e32 v0, 30, v0
v_add_nc_u32_e32 v1, s45, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_eq_u32_e32 vcc_lo, 0, v2
v_xor_b32_e32 v0, v0, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
v_and_b32_e32 v0, 0x80000000, v0
v_fma_f64 v[15:16], v[13:14], s[28:29], s[26:27]
v_fma_f64 v[17:18], v[13:14], s[16:17], s[14:15]
v_mul_f64 v[19:20], v[13:14], 0.5
v_mul_f64 v[25:26], v[9:10], -v[13:14]
v_fma_f64 v[15:16], v[13:14], v[15:16], s[30:31]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_fma_f64 v[17:18], v[13:14], v[17:18], s[18:19]
v_add_f64 v[21:22], -v[19:20], 1.0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[15:16], v[13:14], v[15:16], s[34:35]
v_fma_f64 v[17:18], v[13:14], v[17:18], s[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[27:28], -v[21:22], 1.0
v_fma_f64 v[15:16], v[13:14], v[15:16], s[36:37]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[17:18], v[13:14], v[17:18], s[22:23]
v_add_f64 v[19:20], v[27:28], -v[19:20]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_fma_f64 v[15:16], v[25:26], v[15:16], v[23:24]
v_mul_f64 v[23:24], v[13:14], v[13:14]
v_fma_f64 v[17:18], v[13:14], v[17:18], s[24:25]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_fma_f64 v[19:20], v[9:10], -v[11:12], v[19:20]
v_fma_f64 v[11:12], v[13:14], v[15:16], -v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[13:14], v[23:24], v[17:18], v[19:20]
v_fma_f64 v[11:12], v[25:26], s[42:43], v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[13:14], v[21:22], v[13:14]
v_add_f64 v[9:10], v[9:10], -v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, v14, v10, vcc_lo
v_cndmask_b32_e32 v2, v13, v9, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s33, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v0, v4, v0
v_cndmask_b32_e64 v7, 0, v2, s0
s_or_b32 s44, vcc_lo, s44
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v8, 0x7ff80000, v0, s0
v_add_co_u32 v4, s0, s6, v5
v_add_co_ci_u32_e64 v5, s0, s7, v6, s0
global_store_b64 v[4:5], v[7:8], off
s_and_not1_b32 exec_lo, exec_lo, s44
s_cbranch_execnz .LBB72_2
.LBB72_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sin_64 | 7,139 | 6,648 | stackv2-00014-of-00015 |
// Demangled: _sinh_32(int, float*, float*)
Function : _Z8_sinh_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R0, UR4, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x350 ?trans1;
SHF.R.S32.HI R10, RZ, 0x1f, R5 ?trans1;
FSETP.GE.AND P0, PT, |R12|, 1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x2d0 ?trans5;
FMUL R4, |R12|, 1.4426950216293334961 ?trans1;
HFMA2 R7, -RZ, RZ, 3.4921875, 0 ?trans1;
MOV R9, 0x4a000000 ?WAIT4_END_GROUP;
FRND.TRUNC R4, R4 &wr=0x0 ?trans2;
FSETP.GT.AND P0, PT, |R4|, 126, PT &req={0} ?trans1;
LOP3.LUT R7, R7, 0x80000000, R4, 0xb8, !PT ?WAIT5_END_GROUP;
FSEL R7, R7, R4, P0 ?WAIT5_END_GROUP;
FFMA R6, R7, -0.69314718246459960938, |R12| ?WAIT4_END_GROUP;
FFMA R6, R7.reuse, 1.9046542121259335545e-09, R6 ?trans1;
FADD R7, R7, 12583037 ?WAIT3_END_GROUP;
FMUL R6, R6, 1.4426950216293334961 ?trans2;
SHF.L.U32 R7, R7, 0x17, RZ ?WAIT4_END_GROUP;
MUFU.EX2 R6, R6 &wr=0x0 ?trans2;
FMUL R7, R7, R6 &req={0} ?WAIT4_END_GROUP;
FMUL R4, R7.reuse, 16777216 ?trans1;
FSETP.GEU.AND P0, PT, |R7|, 1.175494350822287508e-38, PT ?WAIT5_END_GROUP;
FSEL R4, R4, R7, !P0 ?trans1;
FSEL R9, R9, 0.125, !P0 ?trans1;
FSETP.GE.AND P0, PT, |R12|, 90, PT ?WAIT4_END_GROUP;
MUFU.RCP R4, R4 &wr=0x0 ?trans2;
FMUL R8, R4, R9 &req={0} ?WAIT4_END_GROUP;
FFMA R8, R7, 2, -R8 ?WAIT5_END_GROUP;
FSEL R8, R8, +INF , !P0 ?WAIT5_END_GROUP;
LOP3.LUT R9, R8, 0x80000000, R12, 0xf8, !PT ?trans1;
BRA 0x340 ?trans6;
HFMA2 R7, -RZ, RZ, 0.389892578125, 0.0002090930938720703125 ?trans2;
FMUL R4, R12, R12 ?WAIT4_END_GROUP;
FFMA R7, R4, R7, 0.00019836159481201320887 ?WAIT4_END_GROUP;
FFMA R7, R4, R7, 0.0083333496004343032837 ?WAIT4_END_GROUP;
FFMA R7, R4, R7, 0.16666667163372039795 ?WAIT4_END_GROUP;
FMUL R7, R4, R7 ?WAIT4_END_GROUP;
FFMA R9, R12, R7, R12 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R6, P0, R5, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R7, R5, UR9, R10, 0x2, P0 ?trans2;
IADD3 R5, PT, PT, R0, R5, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R6.64], R9 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R5, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x3c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sinh_32(int, float*, float*)
_Z8_sinh_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB73_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s1, 0
s_mov_b32 s3, 0x3ab42872
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s9
.LBB73_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_add_f32_e64 v4, 0xbf317218, |v0|
v_cmp_nlt_f32_e64 vcc_lo, 0x42b2d4fc, |v0|
v_cmp_gt_f32_e64 s0, 0x39800000, |v0|
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e64 v5, v4, |v0|
v_dual_sub_f32 v6, v5, v4 :: v_dual_add_f32 v5, 0x3f317218, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e64 v6, |v0|, v6
v_sub_f32_e32 v5, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, 0x3102e308, v5
v_add_f32_e32 v6, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v4, v4, v6
v_dual_mul_f32 v7, 0x3fb8aa3b, v6 :: v_dual_add_f32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v7, v7
v_mul_f32_e32 v5, 0x35bfbc00, v7
v_fmac_f32_e32 v6, 0xbf317200, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v8, v4, v6
v_dual_sub_f32 v9, v8, v5 :: v_dual_sub_f32 v6, v6, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v8, v8, v9
v_sub_f32_e32 v5, v8, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v4, v6
v_dual_add_f32 v4, v4, v5 :: v_dual_mul_f32 v5, 0x2ea39ef3, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v6, v9, v4
v_dual_sub_f32 v8, v6, v5 :: v_dual_sub_f32 v9, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v6, v6, v8
v_add_f32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v5, v6, v5
v_add_f32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v8, v4
v_sub_f32_e32 v6, v8, v5
v_mul_f32_e32 v8, v5, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f32_e32 v4, v4, v6
v_fmaak_f32 v6, s3, v5, 0x3c091de6
v_fma_f32 v9, v5, v5, -v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f32_e32 v10, v4, v4
v_fmaak_f32 v6, v5, v6, 0x3d2aadcc
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v9, v5, v10
v_fmaak_f32 v6, v5, v6, 0x3e2aaa47
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v10, v8, v9
v_fmaak_f32 v6, v5, v6, 0x3efffffc
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v8, v10, v8
v_dual_mul_f32 v11, v6, v10 :: v_dual_sub_f32 v8, v9, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, v10, v6, -v11
v_fmac_f32_e32 v9, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v6, v11, v9
v_sub_f32_e32 v10, v6, v11
v_add_f32_e32 v8, v5, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v9, v9, v10
v_sub_f32_e32 v5, v8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_f32_e32 v5, v6, v5
v_add_f32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v4, v5
v_add_f32_e32 v5, v8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v6, 1.0, v5
v_dual_sub_f32 v8, v5, v8 :: v_dual_add_f32 v9, -1.0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_sub_f32 v4, v4, v8 :: v_dual_sub_f32 v5, v5, v9
v_add_f32_e32 v4, v4, v5
v_cvt_i32_f32_e32 v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v7, v6, v4
v_ldexp_f32 v8, v7, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v9, v8
v_sub_f32_e32 v6, v7, v6
v_sub_f32_e32 v4, v4, v6
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v6, v8, v9
v_ldexp_f32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, v9, v8, -v6
v_fmac_f32_e32 v5, v9, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v7, v6, v5
v_sub_f32_e32 v10, 1.0, v7
v_sub_f32_e32 v6, v7, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v11, 1.0, v10
v_dual_sub_f32 v5, v6, v5 :: v_dual_sub_f32 v6, v11, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v5, v6
v_add_f32_e32 v6, v10, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v9, v6
v_dual_sub_f32 v10, v10, v6 :: v_dual_mul_f32 v11, v8, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f32_e32 v5, v5, v10
v_fma_f32 v12, v7, v8, -v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v12, v7, v4
v_add_f32_e32 v13, v11, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_f32_e32 v14, v6, v13
v_sub_f32_e32 v10, v13, v11
v_sub_f32_e32 v6, v6, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v10, v10, v12
v_sub_f32_e32 v6, v6, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v5, v6
v_dual_add_f32 v6, v9, v7 :: v_dual_add_f32 v5, v10, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v10, v6, v9
v_add_f32_e32 v5, v14, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v7, v7, v10
v_mul_f32_e32 v5, v9, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v7, v5
v_add_f32_e32 v7, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ldexp_f32 v9, v7, -2
v_sub_f32_e32 v6, v7, v6
v_dual_sub_f32 v10, v8, v9 :: v_dual_sub_f32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v7, v8, v10
v_ldexp_f32 v5, v5, -2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v6, v7, v9
v_add_f32_e32 v4, v4, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v4, v4, v5
v_add_f32_e32 v4, v10, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_cndmask_b32_e64 v4, v4, |v0|, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
v_bfi_b32 v0, 0x7fffffff, v4, v0
s_or_b32 s1, vcc_lo, s1
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB73_2
.LBB73_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sinh_32 | 1,678 | 4,244 | stackv2-00014-of-00015 |
// Demangled: _sinh_64(int, double*, double*)
Function : _Z8_sinh_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R13, R0, UR4, R13 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R13, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R13, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xfe0 ?trans1;
SHF.R.S32.HI R12, RZ, 0x1f, R13 ?trans2;
LOP3.LUT R11, R7, 0x7fffffff, RZ, 0xc0, !PT &req={2} ?trans1;
MOV R4, R6 ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P0, PT, R11, 0x3fefffff, PT ?trans1;
MOV R5, R11 ?WAIT12_END_GROUP;
@P0 BRA 0x480 ?trans5;
MOV.64 R10, 0x3de611a561d87def ?trans2;
UMOV.64 UR4, 0x3d6b4c75ab274c53 ?trans1;
DMUL R2, R4, R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, UR4, R10 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3e5ae64671b18f5c ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71de3a465b1e4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a01a02899d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f811111111110a6 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555556 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R2, R10, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R10, R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R10, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BRA 0xfd0 &req={1,0} ?trans5;
MOV.64 R14, 0x3ff71547652b82fe ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R11, R11, RZ ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
MOV.64 R18, 0x3e5af86d8ebd13cd ?trans2;
BSSY.RECONVERGENT B1, 0xf40 ?trans1;
DFMA R14, R4, R14, 6.75539944105574400000e+15 &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R10.reuse, 0x7fb3e647, PT ?trans1;
ISETP.NE.AND P1, PT, R10, RZ, PT ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R14, -6.75539944105574400000e+15 &req={0} &rd=0x0 &wr=0x1 ?trans2;
IADD3 R14, PT, PT, R14, -0x1, RZ &req={0} ?WAIT5_END_GROUP;
SEL R14, R14, RZ, P0 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R2, -UR4, R4 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R2, -UR4, R16 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3e21f4076acd15b6 ?trans1;
FSEL R2, R6, R16, !P0 &req={0} ?trans1;
FSEL R3, R11, R17, !P0 ?trans1;
ISETP.NE.AND P0, PT, R14.reuse, 0x400, PT ?trans1;
LEA R14, R14, 0x3ff00000, 0x14 ?WAIT5_END_GROUP;
SEL R15, R14, 0x7fe00000, P0 ?trans1;
MOV R14, RZ ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, UR4, R18 &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3e927e5092ba033d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71dde6c5f9da1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa01a018d034e6 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a01b3b6940 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c16c1b5dd ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8111111110f74d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa555555555554d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555557 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, 0.5 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R18, R2, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R14, -0.5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R2, R18, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R18, R14, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R14, 0x3ff0000000000000 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R2, R16, R16 &req={1} &wr=0x0 ?trans2;
FSEL R19, R2, R16, !P0 &req={0} ?trans1;
@P1 FSEL R11, R3, R17, !P0 ?trans1;
MOV R2, 0x1 ?WAIT3_END_GROUP;
FSEL R10, R6, R19, !P1 ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R10, 2, R14 &wr=0x0 ?trans2;
MUFU.RCP64H R3, R17 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R16, R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R2, R14, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R16, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, R2, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R2 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, -R16, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R18, R14 &req={0} &wr=0x0 ?trans2;
FFMA R14, RZ, R17, R3 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R14|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0xf30 ?trans5;
MOV R3, R11 ?trans1;
MOV R20, 0xf30 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1060 &req={4,3} ?trans5;
BSYNC.RECONVERGENT B1 &req={4,3} ?trans5;
UMOV.64 UR4, 0x408633ce8fb9f87e ?trans1;
DADD R2, R10, R2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GE.AND P0, PT, R4, UR4, PT &wr=0x0 ?trans2;
FSEL R4, R2, RZ, !P0 &req={0} ?trans1;
FSEL R5, R3, +QNAN , !P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R2, P0, R13, UR8, 0x3 ?trans2;
LOP3.LUT R5, R5, 0x80000000, R7, 0xf8, !PT ?trans2;
LEA.HI.X R3, R13, UR9, R12, 0x3, P0 ?trans2;
IADD3 R13, PT, PT, R0, R13, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R2.64], R4 &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R13, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R3|, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R14, R17, 0x800fffff, RZ, 0xc0, !PT ?trans1;
HFMA2 R26, -RZ, RZ, 0.0045166015625, 0 ?trans1;
MOV R19, R17 ?trans1;
MOV R18, R16.reuse ?trans1;
LOP3.LUT R15, R14, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
BSSY.RECONVERGENT B2, 0x1870 ?trans1;
MOV R14, R16 ?trans1;
LOP3.LUT R21, R3, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R28, R17.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
FSETP.GEU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R16, R19, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R21.reuse, R28, PT ?trans1;
MOV R2, R10 ?trans1;
@!P2 MOV R30, RZ ?trans1;
@!P2 ISETP.GE.U32.AND P3, PT, R21, R16, PT ?trans1;
MOV R22, 0x1 ?trans1;
SEL R17, R26.reuse, 0x63400000, !P1 ?trans1;
MOV R16, R2 ?trans2;
@!P2 SEL R27, R26, 0x63400000, !P3 ?WAIT2_END_GROUP;
LOP3.LUT R17, R17, 0x800fffff, R3.reuse, 0xf8, !PT ?trans1;
@!P0 DMUL R14, R18, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
@!P2 LOP3.LUT R27, R27, 0x80000000, R3, 0xf8, !PT ?trans1;
MUFU.RCP64H R23, R15 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R28, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
@!P2 LOP3.LUT R31, R27, 0x100000, RZ, 0xfc, !PT ?trans1;
MOV R27, R21 ?trans1;
IADD3 R32, PT, PT, R28, -0x1, RZ ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R16, R16, 2, -R30 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R27, R17, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R29, PT, PT, R27, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R29, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R32, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R22, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R24, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R24, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R22, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R24, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R24, R22, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R24, -R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R22, R30, R24 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1720 &req={1,0} ?trans5;
LOP3.LUT R24, R19, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R21.reuse, -R24.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R21, R24, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R2, R2, -0x46a00000, !PT ?trans1;
SEL R21, R26, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R2, R2, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R21, PT, PT, -R21, R2, RZ ?trans1;
MOV R2, RZ ?WAIT3_END_GROUP;
IADD3 R3, PT, PT, R21, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R24, R22, R2 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R25|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1860 ?trans5;
DFMA R14, R22, -R14, R16 &wr=0x0 ?trans1;
MOV R2, RZ ?trans1;
FSETP.NEU.AND P0, PT, R15.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R19, R15, 0x80000000, R19, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R19, R3, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1860 ?trans5;
IADD3 R15, PT, PT, -R21, RZ, RZ ?trans1;
MOV R14, RZ ?trans1;
DMUL.RP R2, R22, R2 &wr=0x0 ?trans2;
LOP3.LUT R19, R3, R19, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R24, -R14, R22 &wr=0x0 ?trans2;
IADD3 R14, PT, PT, -R21, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R15|, R14, PT ?WAIT5_END_GROUP;
FSEL R24, R2, R24, !P0 ?trans1;
FSEL R25, R19, R25, !P0 ?trans1;
BRA 0x1860 ?trans6;
DSETP.NAN.AND P0, PT, R2, R2, PT &wr=0x0 ?trans2;
@P0 BRA 0x1840 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R18, R18, PT &wr=0x0 ?trans2;
@P0 BRA 0x1810 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R27, R28, PT ?trans1;
MOV.64 R24, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1860 ?trans5;
ISETP.NE.AND P0, PT, R27, 0x7ff00000, PT ?trans1;
LOP3.LUT R25, R3, 0x80000000, R19, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R28, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R25, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R24, RZ ?trans1;
@P0 MOV R24, RZ ?WAIT3_END_GROUP;
@P0 MOV R25, R2 ?trans1;
BRA 0x1860 ?trans6;
LOP3.LUT R25, R19, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R24, R18 ?trans1;
BRA 0x1860 ?trans6;
LOP3.LUT R25, R3, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R24, R2 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R24 ?trans1;
MOV R3, R25 ?trans2;
RET.REL.NODEC R20 0x0 ?trans5;
BRA 0x18b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sinh_64(int, double*, double*)
_Z8_sinh_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s40, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s40, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB74_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s42, s[2:3], 0x0
s_mov_b32 s2, 0xfefa39ef
s_mov_b32 s8, 0x3b39803f
s_mov_b32 s10, 0x652b82fe
s_mov_b32 s12, 0xf278e000
s_mov_b32 s14, 0xf97b57a0
s_mov_b32 s16, 0xfca7ab0c
s_mov_b32 s18, 0x6a5dcb37
s_mov_b32 s20, 0x623fde64
s_mov_b32 s22, 0x7c89e6b0
s_mov_b32 s24, 0x14761f6e
s_mov_b32 s26, 0x1852b7b0
s_mov_b32 s28, 0x11122322
s_mov_b32 s30, 0x555502a1
s_mov_b32 s34, 0x55555511
s_mov_b32 s36, 11
s_mov_b32 s38, 0x8fb9f87e
s_mov_b32 s3, 0xbfe62e42
s_mov_b32 s9, 0xbc7abc9e
s_mov_b32 s11, 0x3ff71547
s_mov_b32 s13, 0xbd53de6a
s_mov_b32 s15, 0xbac9cc01
s_mov_b32 s17, 0x3e928af3
s_mov_b32 s19, 0x3e5ade15
s_mov_b32 s21, 0x3ec71dee
s_mov_b32 s23, 0x3efa0199
s_mov_b32 s25, 0x3f2a01a0
s_mov_b32 s27, 0x3f56c16c
s_mov_b32 s29, 0x3f811111
s_mov_b32 s31, 0x3fa55555
s_mov_b32 s35, 0x3fc55555
s_mov_b32 s37, 0x3fe00000
s_mov_b32 s39, 0x408633ce
s_waitcnt lgkmcnt(0)
s_mul_i32 s42, s42, s40
s_mov_b32 s43, 0
s_mov_b32 s1, 0x3fe62e42
s_mov_b32 s40, 0xfefa3000
.LBB74_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s0, s2
s_mov_b32 s41, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_add_f64 v[6:7], |v[4:5]|, s[2:3]
v_cmp_nge_f64_e64 vcc_lo, |v[4:5]|, s[38:39]
v_add_f64 v[8:9], v[6:7], -|v[4:5]|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[8:9], -v[6:7]
v_add_f64 v[8:9], v[8:9], s[0:1]
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], |v[4:5]|, v[10:11]
v_add_f64 v[8:9], v[10:11], -v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], s[8:9]
v_add_f64 v[10:11], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f64 v[12:13], v[10:11], s[10:11]
v_add_f64 v[6:7], v[6:7], -v[10:11]
v_rndne_f64_e32 v[12:13], v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[8:9], v[6:7]
v_fma_f64 v[8:9], v[12:13], s[40:41], v[10:11]
v_mul_f64 v[10:11], v[12:13], s[12:13]
v_cvt_i32_f64_e32 v0, v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[6:7], v[8:9]
v_add_f64 v[16:17], v[14:15], v[10:11]
v_add_f64 v[8:9], v[8:9], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[16:17]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[14:15], v[10:11]
v_add_f64 v[6:7], v[6:7], v[8:9]
v_mul_f64 v[8:9], v[12:13], s[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[16:17], v[6:7]
v_add_f64 v[14:15], v[10:11], v[8:9]
v_add_f64 v[16:17], v[16:17], -v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], -v[14:15]
v_add_f64 v[6:7], v[6:7], v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[10:11], v[8:9]
v_add_f64 v[6:7], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[14:15], v[6:7]
v_fma_f64 v[10:11], v[8:9], s[18:19], s[16:17]
v_add_f64 v[14:15], v[14:15], -v[8:9]
v_mul_f64 v[16:17], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[20:21]
v_add_f64 v[6:7], v[6:7], v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[14:15], v[8:9], v[8:9], -v[16:17]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[22:23]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[6:7], v[6:7]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[24:25]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[8:9], v[18:19], v[14:15]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[26:27]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[16:17], v[14:15]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[28:29]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[16:17], v[18:19], -v[16:17]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[30:31]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[16:17]
v_fma_f64 v[10:11], v[8:9], v[10:11], s[34:35]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[8:9], v[10:11], s[36:37]
v_mul_f64 v[20:21], v[18:19], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[16:17], v[18:19], v[10:11], -v[20:21]
v_fma_f64 v[10:11], v[14:15], v[10:11], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[20:21], v[10:11]
v_add_f64 v[16:17], v[8:9], v[14:15]
v_add_f64 v[18:19], v[14:15], -v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[16:17], -v[8:9]
v_add_f64 v[10:11], v[10:11], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[14:15], -v[8:9]
v_add_f64 v[6:7], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[8:9], v[16:17], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[8:9], 1.0
v_add_f64 v[14:15], v[8:9], -v[16:17]
v_add_f64 v[16:17], v[10:11], -1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], -v[14:15]
v_add_f64 v[8:9], v[8:9], -v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[8:9]
v_add_f64 v[8:9], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ldexp_f64 v[12:13], v[8:9], v0
v_add_f64 v[8:9], v[8:9], -v[10:11]
v_rcp_f64_e32 v[14:15], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], -v[8:9]
v_ldexp_f64 v[6:7], v[6:7], v0
s_waitcnt_depctr 0xfff
v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[16:17], v[14:15], v[14:15]
v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[16:17], v[14:15], v[14:15]
v_mul_f64 v[8:9], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[12:13], -v[8:9]
v_fma_f64 v[14:15], v[10:11], v[6:7], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[16:17], v[8:9], v[14:15]
v_add_f64 v[18:19], -v[16:17], 1.0
v_add_f64 v[8:9], v[16:17], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[20:21], -v[18:19], 1.0
v_add_f64 v[8:9], v[8:9], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[20:21], -v[16:17]
v_add_f64 v[8:9], v[8:9], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[18:19], v[8:9]
v_mul_f64 v[16:17], v[10:11], v[14:15]
v_add_f64 v[18:19], v[18:19], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[20:21], v[12:13], v[16:17]
v_add_f64 v[8:9], v[8:9], v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[16:17], v[12:13], -v[20:21]
v_fma_f64 v[22:23], v[16:17], v[6:7], v[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[24:25], v[20:21], v[22:23]
v_add_f64 v[26:27], v[14:15], -v[24:25]
v_add_f64 v[18:19], v[24:25], -v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[26:27]
v_add_f64 v[18:19], v[18:19], -v[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[14:15], -v[24:25]
v_add_f64 v[8:9], v[8:9], v[14:15]
v_add_f64 v[14:15], v[10:11], v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[18:19], v[8:9]
v_add_f64 v[18:19], v[14:15], -v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[26:27], v[8:9]
v_add_f64 v[16:17], v[16:17], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[10:11], v[8:9]
v_add_f64 v[8:9], v[16:17], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[14:15], v[8:9]
v_ldexp_f64 v[16:17], v[10:11], -2
v_add_f64 v[10:11], v[10:11], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[12:13], -v[16:17]
v_add_f64 v[8:9], v[8:9], -v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[12:13], -v[18:19]
v_ldexp_f64 v[8:9], v[8:9], -2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[12:13], -v[16:17]
v_add_f64 v[6:7], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], -v[8:9]
v_add_f64 v[6:7], v[18:19], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, 0x7ff00000, v7, vcc_lo
v_dual_cndmask_b32 v6, 0, v6 :: v_dual_and_b32 v7, 0x7fffffff, v5
v_cmp_gt_f64_e64 vcc_lo, 0x3e400000, |v[4:5]|
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v4, v6, v4 :: v_dual_add_nc_u32 v1, s42, v1
v_cndmask_b32_e32 v0, v0, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s33, v1
v_bfi_b32 v5, 0x7fffffff, v0, v5
s_or_b32 s43, vcc_lo, s43
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s43
s_cbranch_execnz .LBB74_2
.LBB74_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sinh_64 | 7,519 | 6,678 | stackv2-00014-of-00015 |
// Demangled: _sinpi_32(int, float*, float*)
Function : _Z9_sinpi_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R9, R0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R8, R3, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R9, 0x4, R4 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R14, -RZ, RZ, 1.6015625, 24.28125 ?trans1;
MOV R16, 0x3f17acc9 ?trans1;
FADD R11, R10.reuse, R10.reuse &req={2} ?trans1;
FRND.TRUNC R17, R10 &wr=0x0 ?trans3;
FRND R13, R11 &wr=0x1 ?trans1;
FSETP.NEU.AND P2, PT, R10, R17, PT &req={0} ?trans1;
F2I.NTZ R12, R11 &wr=0x0 ?trans1;
FFMA R0, R13, -0.5, R10 &req={1} ?WAIT4_END_GROUP;
FMUL R13, R0, R0 ?trans1;
LOP3.LUT R15, R12, 0x1, RZ, 0xc0, !PT &req={0} ?WAIT3_END_GROUP;
FFMA R14, R13.reuse, R14, -1.334560394287109375 ?trans1;
FFMA R2, R13, -R16, 2.550144195556640625 ?trans1;
LOP3.LUT P1, RZ, R12, 0x2, RZ, 0xc0, !PT ?trans1;
FFMA R3, R0, R13, RZ ?trans1;
ISETP.NE.U32.AND P0, PT, R15, 0x1, PT ?trans1;
FFMA R14, R13.reuse, R14, 4.0586924552917480469 ?trans1;
FFMA R2, R13, R2, -5.1677198410034179688 ?WAIT3_END_GROUP;
FFMA R14, R13, R14, -4.9348020553588867188 ?trans1;
FFMA R3, R2, R3, RZ ?WAIT3_END_GROUP;
FFMA R13, R13, R14, 1 ?WAIT4_END_GROUP;
@P0 FFMA R13, R0, 3.1415927410125732422, R3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R8, R9, RZ ?WAIT3_END_GROUP;
@P1 FADD R13, RZ, -R13 ?trans1;
@!P2 FMUL R13, RZ, R10 ?trans1;
ISETP.GE.AND P0, PT, R9, UR5, PT ?WAIT4_END_GROUP;
STG.E desc[UR6][R2.64], R13 &rd=0x1 ?trans9;
@!P0 BRA 0xe0 ?trans5;
EXIT ?trans5;
BRA 0x2d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sinpi_32(int, float*, float*)
_Z9_sinpi_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s36, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s36, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB75_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x6fdffd2b
s_mov_b32 s8, 0xf99eb0bb
s_mov_b32 s10, 0xd5f14825
s_mov_b32 s12, 0xcdfe9424
s_mov_b32 s14, 0x67754fff
s_mov_b32 s16, 0xe625be09
s_mov_b32 s18, 0x54442d18
s_mov_b32 s20, 0xca1d4f33
s_mov_b32 s22, 0x2e21c33
s_mov_b32 s24, 0x7294bff9
s_mov_b32 s26, 0x67b90b37
s_mov_b32 s28, 0x7e3c325b
s_mov_b32 s30, 0x81b5a67
s_mov_b32 s34, 0xc9be45de
s_mov_b32 s3, 0xbf7e2fe7
s_mov_b32 s9, 0x3f3e357e
s_mov_b32 s11, 0x3fb50782
s_mov_b32 s13, 0xbfe32d2c
s_mov_b32 s15, 0x400466bc
s_mov_b32 s17, 0xc014abbc
s_mov_b32 s19, 0x400921fb
s_mov_b32 s21, 0x3f5f9c89
s_mov_b32 s23, 0xbf1b1673
s_mov_b32 s25, 0xbf9a6d1e
s_mov_b32 s27, 0x3fce1f50
s_mov_b32 s29, 0xbff55d3c
s_mov_b32 s31, 0x40103c1f
s_mov_b32 s35, 0xc013bd3c
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s36
s_mov_b32 s36, 0
.LBB75_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v0
v_mul_f64 v[6:7], |v[4:5]|, 0.5
v_and_b32_e32 v0, 0x7fffffff, v5
v_cmp_class_f64_e64 s0, v[4:5], 0x1f8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fract_f64_e32 v[8:9], v[6:7]
v_cmp_neq_f64_e32 vcc_lo, 0x7ff00000, v[6:7]
v_add_f64 v[8:9], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v6, 0, v8 :: v_dual_cndmask_b32 v7, 0, v9
v_cmp_gt_f64_e64 vcc_lo, |v[4:5]|, 1.0
v_cndmask_b32_e32 v7, v0, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v4, v6, vcc_lo
v_add_f64 v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[8:9], v[8:9]
v_fma_f64 v[6:7], v[8:9], -0.5, v[6:7]
v_cvt_i32_f64_e32 v0, v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[6:7], v[6:7]
v_fma_f64 v[12:13], v[10:11], s[8:9], s[2:3]
v_fma_f64 v[14:15], v[10:11], s[22:23], s[20:21]
v_mul_f64 v[16:17], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[10:11]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[24:25]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[12:13]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[26:27]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[14:15]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[28:29]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[16:17]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[30:31]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[12:13], v[16:17], v[12:13]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[34:35]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[6:7], v[6:7], s[18:19], v[12:13]
v_fma_f64 v[8:9], v[10:11], v[14:15], 1.0
v_and_b32_e32 v10, 1, v0
v_lshlrev_b32_e32 v0, 30, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e32 vcc_lo, 0, v10
v_xor_b32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_and_b32_e32 v0, 0x80000000, v0
v_cndmask_b32_e32 v4, v9, v7, vcc_lo
v_cndmask_b32_e32 v6, v8, v6, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s33, v1
v_xor_b32_e32 v0, v4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, 0, v6, s0
s_or_b32 s36, vcc_lo, s36
v_cndmask_b32_e64 v5, 0x7ff80000, v0, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
v_cvt_f32_f64_e32 v0, v[4:5]
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s36
s_cbranch_execnz .LBB75_2
.LBB75_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sinpi_32 | 1,252 | 2,858 | stackv2-00014-of-00015 |
// Demangled: _sinpi_64(int, double*, double*)
Function : _Z9_sinpi_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU.64 UR10, c[0x4][0x10] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R8, R7, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R8, desc[UR6][R8.64] &req={2} &wr=0x2 ?trans1;
HFMA2 R31, -RZ, RZ, 0, 0 ?trans1;
IADD3 R29, PT, PT, R9, 0x100000, RZ &req={2} ?trans1;
MOV R28, R8 ?WAIT4_END_GROUP;
F2I.S64.F64 R10, R28 &wr=0x0 ?trans2;
IMAD.SHL.U32 R30, R10, 0x40, RZ &req={0} ?WAIT5_END_GROUP;
LOP3.LUT R30, R30, 0x40, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
IADD.64 R30, R30, UR10 &req={4} ?WAIT6_END_GROUP;
LDG.E.64.CONSTANT R12, desc[UR6][R30.64+0x8] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R14, desc[UR6][R30.64+0x10] &wr=0x4 ?trans4;
LDG.E.64.CONSTANT R16, desc[UR6][R30.64+0x18] &wr=0x5 ?trans4;
LDG.E.64.CONSTANT R18, desc[UR6][R30.64+0x20] &req={3} &wr=0x3 ?trans4;
LDG.E.64.CONSTANT R20, desc[UR6][R30.64+0x28] &wr=0x2 ?trans4;
LDG.E.64.CONSTANT R22, desc[UR6][R30.64+0x30] &wr=0x2 ?trans1;
LOP3.LUT R32, R10, 0x1, RZ, 0xc0, !PT ?trans1;
HFMA2 R6, -RZ, RZ, 0.00974273681640625, -2.12192535400390625e-05 ?trans1;
MOV R33, RZ ?trans1;
MOV R11, 0x3da8ff83 ?trans1;
UMOV.64 UR8, 0x3ca1a62633145c07 ?WAIT3_END_GROUP;
ISETP.NE.U64.AND P1, PT, R32, 0x1, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
FRND.F64.TRUNC R24, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.NEU.AND P0, PT, R8, R24, PT &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
FRND.F64 R28, R28 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R28, -0.5, R8 &req={0} &rd=0x0 &wr=0x1 ?trans2;
FSEL R28, R6, -8.06006814911005101289e+34, !P1 &req={0} ?trans1;
FSEL R29, -R11, 0.11223486810922622681, !P1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R26, R24, UR8 &req={1} &wr=0x0 ?trans1;
UMOV.64 UR8, 0x400921fb54442d18 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, UR8, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R26, R24, R24 &req={0} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R28, R12 &req={2} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R12, R14 &req={4} &wr=0x5 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R12, R16 &req={5} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R12, R18 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R12, R20 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R12, R22 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R12, R24 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R26, R12, 1 &wr=0x0 ?trans2;
FSEL R14, R12, R24, !P1 &req={0} ?trans1;
FSEL R15, R13, R25, !P1 ?trans1;
LOP3.LUT P1, RZ, R10, 0x2, RZ, 0xc0, !PT ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R12, RZ, -R14 &wr=0x0 ?trans2;
FSEL R11, R14, R12, !P1 &req={0} ?trans1;
FSEL R13, R15, R13, !P1 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, RZ, R8 &wr=0x0 ?trans2;
FSEL R10, R8, R11, !P0 &req={0} ?trans1;
FSEL R11, R9, R13, !P0 ?trans1;
IMAD.WIDE R8, R7, 0x8, R4 ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
STG.E.64 desc[UR6][R8.64], R10 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R7, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sinpi_64(int, double*, double*)
_Z9_sinpi_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s36, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s36, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB76_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x6fdffd2b
s_mov_b32 s8, 0xf99eb0bb
s_mov_b32 s10, 0xd5f14825
s_mov_b32 s12, 0xcdfe9424
s_mov_b32 s14, 0x67754fff
s_mov_b32 s16, 0xe625be09
s_mov_b32 s18, 0x54442d18
s_mov_b32 s20, 0xca1d4f33
s_mov_b32 s22, 0x2e21c33
s_mov_b32 s24, 0x7294bff9
s_mov_b32 s26, 0x67b90b37
s_mov_b32 s28, 0x7e3c325b
s_mov_b32 s30, 0x81b5a67
s_mov_b32 s34, 0xc9be45de
s_mov_b32 s3, 0xbf7e2fe7
s_mov_b32 s9, 0x3f3e357e
s_mov_b32 s11, 0x3fb50782
s_mov_b32 s13, 0xbfe32d2c
s_mov_b32 s15, 0x400466bc
s_mov_b32 s17, 0xc014abbc
s_mov_b32 s19, 0x400921fb
s_mov_b32 s21, 0x3f5f9c89
s_mov_b32 s23, 0xbf1b1673
s_mov_b32 s25, 0xbf9a6d1e
s_mov_b32 s27, 0x3fce1f50
s_mov_b32 s29, 0xbff55d3c
s_mov_b32 s31, 0x40103c1f
s_mov_b32 s35, 0xc013bd3c
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s36
s_mov_b32 s36, 0
.LBB76_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f64 v[6:7], |v[4:5]|, 0.5
v_and_b32_e32 v0, 0x7fffffff, v5
v_cmp_class_f64_e64 s0, v[4:5], 0x1f8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fract_f64_e32 v[8:9], v[6:7]
v_cmp_neq_f64_e32 vcc_lo, 0x7ff00000, v[6:7]
v_add_f64 v[8:9], v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v6, 0, v8 :: v_dual_cndmask_b32 v7, 0, v9
v_cmp_gt_f64_e64 vcc_lo, |v[4:5]|, 1.0
v_cndmask_b32_e32 v7, v0, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v6, v4, v6, vcc_lo
v_add_f64 v[8:9], v[6:7], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[8:9], v[8:9]
v_fma_f64 v[6:7], v[8:9], -0.5, v[6:7]
v_cvt_i32_f64_e32 v0, v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[6:7], v[6:7]
v_fma_f64 v[12:13], v[10:11], s[8:9], s[2:3]
v_fma_f64 v[14:15], v[10:11], s[22:23], s[20:21]
v_mul_f64 v[16:17], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[10:11]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[24:25]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[12:13]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[26:27]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[14:15]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[28:29]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[16:17]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[30:31]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[12:13], v[16:17], v[12:13]
v_fma_f64 v[14:15], v[10:11], v[14:15], s[34:35]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[6:7], v[6:7], s[18:19], v[12:13]
v_fma_f64 v[8:9], v[10:11], v[14:15], 1.0
v_and_b32_e32 v10, 1, v0
v_lshlrev_b32_e32 v0, 30, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e32 vcc_lo, 0, v10
v_xor_b32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_and_b32_e32 v0, 0x80000000, v0
v_cndmask_b32_e32 v4, v9, v7, vcc_lo
v_cndmask_b32_e32 v6, v8, v6, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s33, v1
v_xor_b32_e32 v0, v4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, 0, v6, s0
s_or_b32 s36, vcc_lo, s36
v_cndmask_b32_e64 v5, 0x7ff80000, v0, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s36
s_cbranch_execnz .LBB76_2
.LBB76_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sinpi_64 | 2,561 | 2,784 | stackv2-00014-of-00015 |
// Demangled: _sqrt_32(int, float*, float*)
Function : _Z8_sqrt_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R9, R0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R8, R7, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R9, 0x4, R2 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
MOV R15, R9.reuse ?trans1;
IADD3 R9, PT, PT, R8, R9, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x210 ?trans4;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={4} ?trans1;
IADD3 R0, PT, PT, R10, -0xd000000, RZ &req={2} ?trans1;
MUFU.RSQ R13, R10 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P1, PT, R0, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x1c0 &req={0} ?trans5;
MOV R13, 0x1b0 &req={1} ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x250 &req={3} ?trans5;
BRA 0x200 ?trans5;
FMUL.FTZ R11, R10, R13 &req={1} ?trans1;
FMUL.FTZ R6, R13, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R11, R11, R10 ?WAIT4_END_GROUP;
FFMA R11, R0, R6, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD.WIDE R6, R15, 0x4, R4 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R11 &rd=0x1 ?trans1;
@!P0 BRA 0xf0 ?trans5;
EXIT ?trans5;
LOP3.LUT P1, RZ, R10, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P1 MOV R6, R10 ?trans1;
@!P1 BRA 0x390 ?trans6;
FSETP.GEU.FTZ.AND P1, PT, R10, RZ, PT ?trans1;
MOV R0, R10 ?WAIT12_END_GROUP;
@!P1 MOV R6, 0x7fffffff ?trans1;
@!P1 BRA 0x390 ?trans6;
FSETP.GTU.FTZ.AND P1, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P1 FADD.FTZ R6, R0, 1 ?trans1;
@P1 BRA 0x390 ?trans6;
FSETP.NEU.FTZ.AND P1, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P1 FFMA R7, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P1 MUFU.RSQ R6, R7 &wr=0x0 ?trans2;
@P1 FMUL.FTZ R10, R7, R6 &req={0} ?trans1;
@P1 FMUL.FTZ R12, R6, 0.5 ?trans1;
@!P1 MOV R6, R0 ?trans2;
@P1 FADD.FTZ R11, -R10, -RZ ?WAIT4_END_GROUP;
@P1 FFMA R11, R10, R11, R7 ?WAIT4_END_GROUP;
@P1 FFMA R11, R11, R12, R10 ?WAIT4_END_GROUP;
@P1 FMUL.FTZ R6, R11, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R11, R6 ?trans1;
MOV R6, R13 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0x3d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sqrt_32(int, float*, float*)
_Z8_sqrt_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB77_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB77_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v4, 0x4f800000, v0
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v4, v0
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v5, -1, v4
v_add_nc_u32_e32 v6, 1, v4
v_fma_f32 v7, -v5, v4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v8, -v6, v4, v0
v_cmp_ge_f32_e64 s0, 0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v4, v4, v5, s0
v_cmp_lt_f32_e64 s0, 0, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v4, v4, v6, s0
v_cmp_class_f32_e64 s0, v0, 0x260
v_mul_f32_e32 v5, 0x37800000, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, v4, v5, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_cndmask_b32_e64 v0, v4, v0, s0
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB77_2
.LBB77_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sqrt_32 | 1,477 | 1,169 | stackv2-00014-of-00015 |
// Demangled: _sqrt_64(int, double*, double*)
Function : _Z8_sqrt_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R0, UR4, R7 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R10, R7, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R10, desc[UR6][R10.64] &req={2} &wr=0x2 ?trans1;
MOV.64 R14, 0x3fd8000000000000 &req={1} ?trans2;
BSSY.RECONVERGENT B0, 0x410 ?trans1;
MUFU.RSQ64H R13, R11 &req={2} &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R11, -0x3500000, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R12, 0x7ca00000, PT ?trans1;
DMUL R8, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, -R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, 0.5 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R12, R8 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R14, R8, R12 &req={0} &wr=0x0 ?trans2;
IADD3 R17, PT, PT, R19, -0x100000, RZ &req={0} ?trans1;
MOV R16, R18 ?trans1;
MOV R9, R7.reuse ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R20, R10, R18 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R20, -R20, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R22, R16, R20 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@!P1 BRA 0x400 &req={1,0} ?trans5;
MOV R6, 0x400 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x450 &req={3} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD.WIDE R8, R9, 0x8, R4 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R8.64], R14 &rd=0x1 ?trans1;
@!P0 BRA 0xe0 ?trans5;
EXIT ?trans5;
ISETP.GE.U32.AND P2, PT, R12, -0x3400000, PT ?trans1;
MOV R16, R18 ?trans1;
MOV R12, R22 ?trans1;
MOV R13, R23 ?trans1;
BSSY.RECONVERGENT B1, 0x920 ?trans9;
@P2 DFMA.RM R12, R12, R16, R20 &wr=0x0 ?trans2;
@P2 IADD.64 R14, R12, 0x1 &req={0} ?WAIT2_END_GROUP;
MOV R16, R10 ?trans1;
MOV R17, R11 ?WAIT15_END_GROUP;
NOP ?WAIT14_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P2 DFMA.RP R10, -R12, R14, R16 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P2 DSETP.GT.AND P1, PT, R10, RZ, PT &req={0} &wr=0x0 ?trans2;
@P2 FSEL R10, R14, R12, P1 &req={0} ?trans1;
@P2 FSEL R11, R15, R13, P1 ?trans1;
@P2 BRA 0x910 ?trans6;
DSETP.NE.AND P1, PT, R16, RZ, PT &wr=0x0 ?trans2;
@!P1 BRA 0x900 &req={0} ?trans5;
ISETP.GE.AND P1, PT, R17, RZ, PT ?WAIT13_END_GROUP;
@!P1 MOV.64 R10, 0xfff8000000000000 ?trans2;
@!P1 BRA 0x910 ?trans6;
ISETP.GT.AND P1, PT, R17, 0x7fefffff, PT ?WAIT13_END_GROUP;
@P1 BRA 0x900 ?trans5;
DMUL R10, R16, 8.11296384146066816958e+31 &wr=0x0 ?trans1;
MOV R12, RZ ?trans1;
MUFU.RSQ64H R13, R11 &req={0} &wr=0x0 ?trans1;
MOV.64 R16, 0x3fd8000000000000 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R10, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, 0.5 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R12, R14 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R14, R12 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R12, R10, R14 &req={0} &rd=0x0 &wr=0x1 ?trans2;
IADD3 R15, PT, PT, R15, -0x100000, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R12, -R12, R10 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R14, R16, R12 &req={0} &wr=0x0 ?trans2;
IADD3 R11, PT, PT, R11, -0x3500000, RZ &req={0} ?trans1;
BRA 0x910 ?trans6;
DADD R10, R16, R16 &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R14, R10 &req={1} ?trans1;
MOV R15, R11 ?trans1;
MOV R10, R6 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R10 0x0 &req={0} ?trans5;
BRA 0x970;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _sqrt_64(int, double*, double*)
_Z8_sqrt_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB78_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB78_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[4:5]
v_cndmask_b32_e64 v0, 0, 1, vcc_lo
v_lshlrev_b32_e32 v0, 8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ldexp_f64 v[4:5], v[4:5], v0
v_cndmask_b32_e64 v0, 0, 0xffffff80, vcc_lo
v_rsq_f64_e32 v[6:7], v[4:5]
v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
s_waitcnt_depctr 0xfff
v_mul_f64 v[8:9], v[4:5], v[6:7]
v_mul_f64 v[6:7], v[6:7], 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[8:9], v[8:9], v[4:5]
v_fma_f64 v[8:9], v[10:11], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[8:9], v[8:9], v[4:5]
v_fma_f64 v[6:7], v[10:11], v[6:7], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[6:7], v0
v_dual_cndmask_b32 v4, v6, v4 :: v_dual_add_nc_u32 v1, s1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_i32_e64 s0, s8, v1
v_cndmask_b32_e32 v5, v7, v5, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
s_or_b32 s2, s0, s2
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB78_2
.LBB78_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _sqrt_64 | 2,743 | 1,365 | stackv2-00014-of-00015 |
// Demangled: _tan_32(int, float*, float*)
Function : _Z7_tan_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R3, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R0, R0, UR4, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR6][R4.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x820 ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R3 ?trans1;
FMUL R8, R7.reuse, 0.63661974668502807617 &req={2} ?trans1;
FSETP.GE.AND P0, PT, |R7|, 105615, PT ?WAIT3_END_GROUP;
F2I.NTZ R11, R8 &wr=0x0 ?trans2;
I2FP.F32.S32 R10, R11 &req={0} ?WAIT5_END_GROUP;
FFMA R9, R10, -1.5707962512969970703, R7 ?WAIT4_END_GROUP;
FFMA R9, R10, -7.5497894158615963534e-08, R9 ?WAIT4_END_GROUP;
FFMA R9, R10, -5.3903029534742383927e-15, R9 ?trans1;
@!P0 BRA 0x810 ?trans6;
FSETP.NEU.AND P0, PT, |R7|, +INF , PT ?WAIT13_END_GROUP;
@!P0 FMUL R9, RZ, R7 ?trans1;
@!P0 MOV R11, RZ ?trans1;
@!P0 BRA 0x810 ?trans6;
LDCU.64 UR4, c[0x4][URZ] &wr=0x0 ?trans1;
IMAD.SHL.U32 R8, R7, 0x100, RZ ?trans2;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV.64 R4, RZ ?trans2;
MOV.64 R10, RZ ?WAIT3_END_GROUP;
LOP3.LUT R18, R8, 0x80000000, RZ, 0xfc, !PT ?trans1;
MOV.64 R8, UR4 &req={0} ?WAIT8_END_GROUP;
LDG.E.CONSTANT R19, desc[UR6][R8.64] &rd=0x0 &wr=0x2 ?trans1;
IADD3 R17, PT, PT, R17, 0x1, RZ ?trans1;
ISETP.EQ.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.EQ.AND P2, PT, R10.reuse, 0x4, PT ?trans1;
ISETP.EQ.AND P3, PT, R10.reuse, 0x8, PT ?trans1;
ISETP.EQ.AND P4, PT, R10.reuse, 0xc, PT ?trans1;
ISETP.EQ.AND P5, PT, R10.reuse, 0x10, PT ?trans1;
ISETP.EQ.AND P6, PT, R10.reuse, 0x14, PT ?trans1;
ISETP.NE.AND P0, PT, R17, 0x6, PT ?trans1;
IADD.64 R10, R10, 0x4 ?trans2;
IADD.64 R8, R8, 0x4 &req={0} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R4, R19, R18, R4 &req={2} ?WAIT3_END_GROUP;
@P1 MOV R2, R4.reuse ?trans1;
@P2 MOV R12, R4.reuse ?trans1;
@P3 MOV R13, R4.reuse ?trans1;
@P4 MOV R14, R4.reuse ?trans1;
@P5 MOV R15, R4.reuse ?trans1;
@P6 MOV R16, R4 ?trans1;
MOV R4, R5 ?trans1;
MOV R5, RZ ?trans1;
@P0 BRA 0x230 ?trans6;
SHF.R.U32.HI R8, RZ, 0x17, R7 ?trans1;
BSSY.RECONVERGENT B1, 0x680 ?trans3;
LOP3.LUT R9, R8.reuse, 0xe0, RZ, 0xc0, !PT ?trans2;
LOP3.LUT P5, RZ, R8, 0x1f, RZ, 0xc0, !PT ?trans2;
IADD3 R9, PT, PT, R9, -0x80, RZ ?WAIT4_END_GROUP;
SHF.R.U32.HI R9, RZ, 0x5, R9 ?WAIT5_END_GROUP;
IMAD.U32 R17, R9, -0x4, RZ ?WAIT5_END_GROUP;
ISETP.EQ.AND P2, PT, R17.reuse, -0x18, PT ?trans1;
ISETP.EQ.AND P3, PT, R17.reuse, -0x14, PT ?trans1;
ISETP.EQ.AND P1, PT, R17.reuse, -0x10, PT ?trans1;
ISETP.EQ.AND P0, PT, R17.reuse, -0xc, PT ?trans1;
ISETP.EQ.AND P6, PT, R17.reuse, -0x4, PT ?trans1;
ISETP.EQ.AND P4, PT, R17, RZ, PT ?WAIT8_END_GROUP;
@P2 MOV R9, R2.reuse ?trans1;
ISETP.EQ.AND P2, PT, R17.reuse, -0x8, PT ?trans1;
@P3 MOV R10, R2 ?trans1;
@P3 MOV R9, R12 ?trans1;
ISETP.EQ.AND P3, PT, R17, 0x4, PT ?trans1;
@P1 MOV R9, R13.reuse ?trans1;
@P0 MOV R9, R14 ?trans1;
@P1 MOV R10, R12 ?trans1;
@P0 MOV R10, R13 ?WAIT6_END_GROUP;
@P2 MOV R9, R15.reuse ?trans1;
@P6 MOV R9, R16 ?trans1;
@P4 MOV R9, R4 ?trans1;
@P2 MOV R10, R14 ?trans1;
@P6 MOV R10, R15 ?trans1;
@P4 MOV R10, R16 ?trans1;
@P3 MOV R10, R4 ?trans1;
MOV R11, R9 ?trans1;
@!P5 BRA 0x670 ?trans6;
@P1 MOV R18, R2 ?trans1;
@P0 MOV R18, R12 ?trans1;
ISETP.EQ.AND P0, PT, R17, 0x8, PT ?trans1;
LOP3.LUT R8, R8, 0x1f, RZ, 0xc0, !PT ?trans1;
@P2 MOV R18, R13 ?trans1;
@P6 MOV R18, R14 ?trans1;
@P4 MOV R18, R15 ?trans1;
@P3 MOV R18, R16 ?trans1;
IADD3 R5, PT, PT, -R8, 0x20, RZ ?trans2;
SHF.L.U32 R11, R11, R8, RZ ?WAIT5_END_GROUP;
@P0 MOV R18, R4 ?trans1;
SHF.L.U32 R4, R10, R8, RZ ?trans2;
SHF.R.U32.HI R10, RZ, R5.reuse, R10 ?trans2;
SHF.R.U32.HI R5, RZ, R5, R18 ?trans2;
IADD3 R11, PT, PT, R11, R10, RZ ?trans2;
IADD3 R10, PT, PT, R4, R5, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
IMAD.SHL.U32 R18, R11, 0x4, RZ ?trans1;
ISETP.GE.AND P0, PT, R7, RZ, PT ?trans1;
IMAD.SHL.U32 R8, R10.reuse, 0x4, RZ ?trans1;
SHF.L.U32.HI R10, R10, 0x2, R11.reuse ?trans1;
UMOV.64 UR4, 0x3bf921fb54442d19 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R18 ?trans2;
SHF.R.U32.HI R11, RZ, 0x1e, R11 ?trans2;
LOP3.LUT R8, R5.reuse, R8, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R9, R5, R10, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
LOP3.LUT R7, R10, R7, RZ, 0x3c, !PT ?trans2;
I2F.F64.S64 R4, R8 &wr=0x0 ?trans1;
LEA.HI R11, R18, R11, RZ, 0x1 ?trans2;
ISETP.GE.AND P1, PT, R7, RZ, PT ?trans2;
IADD3 R7, PT, PT, -R11, RZ, RZ ?WAIT5_END_GROUP;
@!P0 MOV R11, R7 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R4, R4, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R4, R4 &req={0} &wr=0x0 ?trans2;
FSEL R9, -R4, R4, !P1 &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
HFMA2 R5, -RZ, RZ, 1.0244140625, 0 ?trans2;
FMUL R4, R9.reuse, R9 ?trans1;
FSETP.NEU.AND P0, PT, |R9|, 0.00049096695147454738617, PT ?trans1;
LOP3.LUT R11, R11, 0x1, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x0 ?trans1;
FFMA R5, R4, R5, 0.003265380859375 ?WAIT3_END_GROUP;
ISETP.NE.U32.AND P1, PT, R11, 0x1, PT ?trans1;
FFMA R5, R4, R5, 0.0242919921875 ?WAIT4_END_GROUP;
FFMA R5, R4, R5, 0.053466796875 ?WAIT4_END_GROUP;
FFMA R5, R4, R5, 0.13337790966033935547 ?WAIT4_END_GROUP;
FFMA R5, R4.reuse, R5, 0.33333230018615722656 ?trans1;
FMUL R4, R4, R9 ?WAIT4_END_GROUP;
@P0 FFMA R9, R5, R4, R9 ?trans1;
LEA R4, P0, R3.reuse, UR4, 0x2 &req={0} ?trans1;
LDCU UR4, c[0x0][0x380] &wr=0x0 ?trans3;
LEA.HI.X R5, R3, UR5, R6, 0x2, P0 ?trans1;
@!P1 MUFU.RCP R9, -R9 &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R0, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR4, PT &req={0} ?trans1;
STG.E desc[UR6][R4.64], R9 &req={1} &rd=0x0 ?WAIT12_END_GROUP;
@!P0 BRA 0xb0 ?trans5;
EXIT ?trans5;
BRA 0x980;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _tan_32(int, float*, float*)
_Z7_tan_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s10, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB79_7
s_load_b32 s11, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
v_mov_b32_e32 v3, 0
s_mov_b32 s2, 0
s_mov_b32 s3, 0x7fffff
s_mov_b32 s9, 0xbc8cedd3
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s11, s10
s_mov_b32 s11, 0x3c971480
.LBB79_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[1:2]
v_add_co_u32 v6, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
global_load_b32 v0, v[6:7], off
s_waitcnt vmcnt(0)
v_and_b32_e32 v6, 0x7fffffff, v0
v_cmpx_ngt_f32_e64 0x48000000, |v0|
s_xor_b32 s12, exec_lo, s1
s_cbranch_execz .LBB79_4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_and_or_b32 v15, v6, s3, 0x800000
v_lshrrev_b32_e32 v12, 23, v6
v_mad_u64_u32 v[7:8], null, 0xfe5163ab, v15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v13, 0xffffff88, v12
v_cmp_lt_u32_e32 vcc_lo, 63, v13
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mov_b32_e32 v2, v8
v_cndmask_b32_e64 v14, 0, 0xffffffc0, vcc_lo
v_mad_u64_u32 v[8:9], null, 0x3c439041, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v14, v14, v13
v_mov_b32_e32 v2, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e64 s0, 31, v14
v_mad_u64_u32 v[9:10], null, 0xdb629599, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v16, 0, 0xffffffe0, s0
v_add_nc_u32_e32 v16, v16, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_mov_b32 v2, v10 :: v_dual_cndmask_b32 v7, v9, v7
v_cmp_lt_u32_e64 s1, 31, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[10:11], null, 0xf534ddc0, v15, v[2:3]
v_mov_b32_e32 v2, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v8, v10, v8, vcc_lo
v_mad_u64_u32 v[11:12], null, 0xfc2757d1, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v7, v8, v7, s0
v_mov_b32_e32 v2, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[12:13], null, 0x4e441529, v15, v[2:3]
v_mov_b32_e32 v2, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[13:14], null, 0xa2f9836e, v15, v[2:3]
v_cndmask_b32_e64 v2, 0, 0xffffffe0, s1
v_dual_cndmask_b32 v15, v12, v10 :: v_dual_add_nc_u32 v2, v2, v16
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v13, v13, v11 :: v_dual_cndmask_b32 v12, v14, v12
v_cndmask_b32_e32 v11, v11, v9, vcc_lo
v_sub_nc_u32_e32 v14, 32, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v10, v13, v15, s0
v_cndmask_b32_e64 v12, v12, v13, s0
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v13, v15, v11, s0
v_cndmask_b32_e64 v11, v11, v8, s0
v_cmp_eq_u32_e32 vcc_lo, 0, v2
v_cndmask_b32_e64 v12, v12, v10, s1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v10, v10, v13, s1
v_cndmask_b32_e64 v13, v13, v11, s1
v_cndmask_b32_e64 v7, v11, v7, s1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v15, v12, v10, v14
v_alignbit_b32 v9, v10, v13, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v2, v15, v12, vcc_lo
v_cndmask_b32_e32 v8, v9, v10, vcc_lo
v_alignbit_b32 v12, v13, v7, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_bfe_u32 v9, v2, 29, 1
v_alignbit_b32 v10, v2, v8, 30
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v12, v12, v13, vcc_lo
v_sub_nc_u32_e32 v11, 0, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_alignbit_b32 v8, v8, v12, 30
v_alignbit_b32 v7, v12, v7, 30
v_xor_b32_e32 v10, v10, v11
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v8, v8, v11
v_xor_b32_e32 v7, v7, v11
v_lshrrev_b32_e32 v11, 29, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_clz_i32_u32_e32 v13, v10
v_lshlrev_b32_e32 v11, 31, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_min_u32_e32 v13, 32, v13
v_or_b32_e32 v14, 0.5, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v12, 31, v13
v_lshlrev_b32_e32 v15, 23, v13
v_alignbit_b32 v10, v10, v8, v12
v_alignbit_b32 v7, v8, v7, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v14, v14, v15
v_alignbit_b32 v8, v10, v7, 9
v_lshrrev_b32_e32 v10, 9, v10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_clz_i32_u32_e32 v12, v8
v_min_u32_e32 v12, 32, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v16, 31, v12
v_alignbit_b32 v7, v8, v7, v16
v_or_b32_e32 v8, v10, v14
v_add_lshl_u32 v10, v12, v13, 23
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshrrev_b32_e32 v7, 9, v7
v_mul_f32_e32 v12, 0x3fc90fda, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v7, v7, v10
v_fma_f32 v10, 0x3fc90fda, v8, -v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v7, 0x33000000, v7
v_fmac_f32_e32 v10, 0x33a22168, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_e32 v7, v7, v11
v_fmac_f32_e32 v10, 0x3fc90fda, v7
v_lshrrev_b32_e32 v7, 30, v2
s_delay_alu instid0(VALU_DEP_1)
v_dual_add_f32 v2, v12, v10 :: v_dual_add_nc_u32 v7, v9, v7
.LBB79_4:
s_and_not1_saveexec_b32 s0, s12
v_mul_f32_e64 v2, 0x3f22f983, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v7, v2
v_fma_f32 v2, 0xbfc90fda, v7, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v2, 0xb3a22168, v7
v_fmac_f32_e32 v2, 0xa7c234c4, v7
v_cvt_i32_f32_e32 v7, v7
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_dual_mul_f32 v8, v2, v2 :: v_dual_and_b32 v7, 1, v7
v_add_nc_u32_e32 v1, s10, v1
v_cmp_class_f32_e64 s0, v0, 0x1f8
v_fmaak_f32 v9, s11, v8, 0xbf039337
v_fmaak_f32 v10, s9, v8, 0x3ec54587
v_cmp_eq_u32_e32 vcc_lo, 0, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v9, v8, v9, 0x3f93f425
v_rcp_f32_e32 v9, v9
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v9, v10, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, v8, v9
v_fma_f32 v9, v8, v2, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_sub_f32_e32 v11, v9, v2
v_rcp_f32_e32 v10, v9
v_fma_f32 v2, v8, v2, -v11
s_waitcnt_depctr 0xfff
v_fma_f32 v8, v9, -v10, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v2, v2, -v10, v8
v_fma_f32 v2, v2, -v10, -v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v2, v2, v9, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_xor3_b32 v2, v6, v0, v2
s_or_b32 s2, vcc_lo, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v0, 0x7fc00000, v2, s0
v_add_co_u32 v4, s0, s6, v4
v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
global_store_b32 v[4:5], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB79_2
.LBB79_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _tan_32 | 3,600 | 4,686 | stackv2-00014-of-00015 |
// Demangled: _tanh_32(int, float*, float*)
Function : _Z8_tanh_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R9, R0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R8, R7, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R6, R9, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR6][R6.64] &req={2} &wr=0x2 ?trans1;
MOV R14, 0x3c80f082 ?trans1;
HFMA2 R12, -RZ, RZ, 1.875, 0 ?trans2;
FMUL R0, |R10|.reuse, 2.8853900432586669922 &req={2} ?trans1;
FMUL R13, R10.reuse, R10 ?trans1;
FSETP.GE.AND P1, PT, |R10|.reuse, 0.60000002384185791016, PT ?trans1;
FSETP.GE.AND P0, PT, |R10|, 9.010913848876953125, PT ?trans2;
FFMA R14, R13.reuse, R14, -0.052303962409496307373 ?trans1;
MUFU.EX2 R0, R0 &wr=0x0 ?trans3;
FFMA R14, R13, R14, 0.1331529766321182251 ?trans1;
FADD R11, R0, 1 &req={0} ?WAIT3_END_GROUP;
FFMA R0, R13, R14, -0.33332768082618713379 ?WAIT4_END_GROUP;
FFMA R13, R13, R0, RZ ?trans1;
MUFU.RCP R11, R11 &wr=0x0 ?trans2;
FFMA R12, R11, -2, R12 &req={0} ?WAIT5_END_GROUP;
FSEL R7, R12, 1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R11, R7, 0x80000000, R10, 0xf8, !PT ?trans1;
IMAD.WIDE R6, R9, 0x4, R4 &req={3} ?WAIT4_END_GROUP;
@!P1 FFMA R11, R10, R13, R10 ?trans1;
IADD3 R9, PT, PT, R8, R9, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R6.64], R11 &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R9, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x270;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _tanh_32(int, float*, float*)
_Z8_tanh_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB81_7
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s1, 0
s_mov_b32 s3, 0xbbbac73d
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s9
.LBB81_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v0, v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_ngt_f32_e64 s0, 0x3f200000, |v0|
s_and_saveexec_b32 s9, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s9
s_cbranch_execz .LBB81_4
v_add_f32_e64 v4, |v0|, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_f32_e32 v5, 0x3fb8aa3b, v4
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v4
v_rndne_f32_e32 v6, v5
v_fma_f32 v7, 0x3fb8aa3b, v4, -v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_f32_e32 v5, v5, v6
v_fmac_f32_e32 v7, 0x32a5705f, v4
v_cvt_i32_f32_e32 v6, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v5, v7
v_exp_f32_e32 v5, v5
s_waitcnt_depctr 0xfff
v_ldexp_f32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v4
v_cndmask_b32_e32 v4, 0x7f800000, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, 1.0, v4
v_rcp_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_fma_f32 v4, v4, -2.0, 1.0
.LBB81_4:
s_and_not1_saveexec_b32 s0, s0
v_mul_f32_e32 v4, v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v5, s3, v4, 0x3ca908c9
v_fmaak_f32 v5, v4, v5, 0xbd5c1c4e
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v5, v4, v5, 0x3e088382
v_fmaak_f32 v5, v4, v5, 0xbeaaaa99
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e64 v5, |v0|, v5
v_fma_f32 v4, v4, v5, |v0|
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v2, s0, s6, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_bfi_b32 v0, 0x7fffffff, v4, v0
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
v_cmp_le_i32_e32 vcc_lo, s8, v1
global_store_b32 v[2:3], v0, off
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB81_2
.LBB81_7:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _tanh_32 | 1,117 | 1,648 | stackv2-00014-of-00015 |
// Demangled: _tanh_64(int, double*, double*)
Function : _Z8_tanh_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R0, UR4, R9 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR10, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R4, R9, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR6][R4.64] &req={2} &wr=0x2 ?trans1;
UMOV.64 UR4, 0x3fe4f92224dd2f1a ?trans1;
BSSY.RECONVERGENT B0, 0xe40 ?trans1;
SHF.R.S32.HI R8, RZ, 0x1f, R9 ?trans2;
LOP3.LUT R7, R5, 0x7fffffff, RZ, 0xc0, !PT &req={2} ?trans1;
MOV R6, R4 ?WAIT6_END_GROUP;
DSETP.GE.AND P0, PT, R6, UR4, PT &wr=0x0 ?trans2;
@!P0 BRA 0x9b0 &req={0} ?trans5;
DADD R10, R6, R6 &wr=0x0 ?trans1;
MOV.64 R16, 0x3e928a27f89b6999 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R4, R10 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
FMUL R4, R4, 1.4426950216293334961 &req={0} ?trans1;
ISETP.GT.U32.AND P0, PT, R7, 0x40330fc1, PT ?WAIT5_END_GROUP;
FRND R4, R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT11_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R14, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, -UR4, R10 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3e5ae904a4741b81 ?trans1;
MUFU.EX2 R12, R4 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, UR4, R16 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3ec71de715ff7e07 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R12 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3efa019a6b0ac45a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2a01a017eed94f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f56c16c17f2a71b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f811111111173c4 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fa555555555211a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc5555555555540 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fe0000000000005 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R12, 1 &req={1} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R16, R12, R10 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV R12, RZ &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, -R10, 2 &req={1} &wr=0x0 ?trans2;
MUFU.RCP64H R13, R11 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R10, R12, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R12, R14, R12 &req={0} &rd=0x0 &wr=0x1 ?trans2;
MOV.64 R12, 0x4000000000000000 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, -R12, 1 &req={1} &wr=0x0 ?trans2;
FSEL R7, R15, 1.875, !P0 &req={0} ?trans1;
FSEL R4, R14, RZ, !P0 ?WAIT4_END_GROUP;
LOP3.LUT R5, R7, 0x80000000, R5, 0xf8, !PT ?trans1;
BRA 0xe30 ?trans6;
MOV.64 R10, 0x3f14359f420afc3d ?trans2;
UMOV.64 UR4, 0x3ef0bc46e2f5e964 ?trans1;
DMUL R6, R4, R4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, -UR4, R10 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f2df9f0728c5d84 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, -UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f4337d1cec4f033 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f57d6e9674335b3 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, -UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f6d6d000d7aad3d ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f8226e1f3cf1ef5 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, -UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3f9664f47ec0c8cf ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3faba1ba1b80ab40 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, -UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fc111111110fa4a ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, UR4 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR4, 0x3fd5555555555550 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, -UR4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R6, R10, RZ &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R10, R4 &req={0} &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B0 &req={4,3} ?trans5;
LEA R6, P0, R9, UR8, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R7, R9, UR9, R8, 0x3, P0 ?trans2;
IADD3 R9, PT, PT, R0, R9, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R6.64], R4 &req={1} &rd=0x1 ?trans2;
ISETP.GE.AND P0, PT, R9, UR10, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xe0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0xeb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _tanh_64(int, double*, double*)
_Z8_tanh_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s33, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s36, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s36, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB82_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s1, s[2:3], 0x0
s_mov_b32 s2, 0x652b82fe
s_mov_b32 s8, 0xfefa3000
s_mov_b32 s10, 0xf278e000
s_mov_b32 s12, 0xf97b57a0
s_mov_b32 s14, 0xfca7ab0c
s_mov_b32 s16, 0x6a5dcb37
s_mov_b32 s18, 0x623fde64
s_mov_b32 s20, 0x7c89e6b0
s_mov_b32 s22, 0x14761f6e
s_mov_b32 s24, 0x1852b7b0
s_mov_b32 s26, 0x11122322
s_mov_b32 s28, 0x555502a1
s_mov_b32 s30, 0x55555511
s_mov_b32 s34, 11
s_mov_b32 s3, 0x3ff71547
s_mov_b32 s9, 0xbfe62e42
s_mov_b32 s11, 0xbd53de6a
s_mov_b32 s13, 0xbac9cc01
s_mov_b32 s15, 0x3e928af3
s_mov_b32 s17, 0x3e5ade15
s_mov_b32 s19, 0x3ec71dee
s_mov_b32 s21, 0x3efa0199
s_mov_b32 s23, 0x3f2a01a0
s_mov_b32 s25, 0x3f56c16c
s_mov_b32 s27, 0x3f811111
s_mov_b32 s29, 0x3fa55555
s_mov_b32 s31, 0x3fc55555
s_mov_b32 s35, 0x3fe00000
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s1, s36
s_mov_b32 s36, 0
.LBB82_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v2, s0, s6, v2
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f64 v[6:7], |v[4:5]|, s[2:3]
v_cmp_nlt_f64_e64 vcc_lo, 0x40331000, |v[4:5]|
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f64_e32 v[6:7], v[6:7]
v_fma_f64 v[8:9], v[6:7], s[8:9], |v[4:5]|
v_mul_f64 v[10:11], v[6:7], s[10:11]
v_cvt_i32_f64_e32 v0, v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[12:13], v[8:9], 0
v_add_f64 v[14:15], v[12:13], v[10:11]
v_add_f64 v[8:9], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[12:13], -v[14:15]
v_add_f64 v[8:9], v[8:9], 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[12:13], v[10:11]
v_add_f64 v[8:9], v[8:9], v[10:11]
v_mul_f64 v[10:11], v[6:7], s[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[12:13], v[14:15], v[8:9]
v_add_f64 v[16:17], v[12:13], v[10:11]
v_add_f64 v[14:15], v[14:15], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[12:13], -v[16:17]
v_add_f64 v[8:9], v[8:9], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[12:13], v[10:11]
v_add_f64 v[8:9], v[8:9], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[16:17], v[8:9]
v_fma_f64 v[12:13], v[10:11], s[16:17], s[14:15]
v_add_f64 v[14:15], v[16:17], -v[10:11]
v_mul_f64 v[16:17], v[10:11], v[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[18:19]
v_add_f64 v[8:9], v[8:9], v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[14:15], v[10:11], v[10:11], -v[16:17]
v_fma_f64 v[12:13], v[10:11], v[12:13], s[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[8:9], v[8:9]
v_fma_f64 v[12:13], v[10:11], v[12:13], s[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[14:15], v[10:11], v[18:19], v[14:15]
v_fma_f64 v[12:13], v[10:11], v[12:13], s[24:25]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[16:17], v[14:15]
v_fma_f64 v[12:13], v[10:11], v[12:13], s[26:27]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[16:17], v[18:19], -v[16:17]
v_fma_f64 v[12:13], v[10:11], v[12:13], s[28:29]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[16:17]
v_fma_f64 v[12:13], v[10:11], v[12:13], s[30:31]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], v[10:11], v[12:13], s[34:35]
v_mul_f64 v[20:21], v[18:19], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[16:17], v[18:19], v[12:13], -v[20:21]
v_fma_f64 v[12:13], v[14:15], v[12:13], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[20:21], v[12:13]
v_add_f64 v[16:17], v[10:11], v[14:15]
v_add_f64 v[18:19], v[14:15], -v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[16:17], -v[10:11]
v_add_f64 v[12:13], v[12:13], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[14:15], -v[10:11]
v_add_f64 v[8:9], v[8:9], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], v[10:11]
v_add_f64 v[10:11], v[16:17], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[12:13], v[10:11], 1.0
v_add_f64 v[14:15], v[10:11], -v[16:17]
v_add_f64 v[16:17], v[12:13], -1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[8:9], -v[14:15]
v_add_f64 v[10:11], v[10:11], -v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[8:9], v[8:9], v[10:11]
v_add_f64 v[6:7], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ldexp_f64 v[10:11], v[6:7], v0
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_rcp_f64_e32 v[14:15], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[8:9], -v[6:7]
v_ldexp_f64 v[6:7], v[6:7], v0
s_waitcnt_depctr 0xfff
v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[16:17], v[14:15], v[14:15]
v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], v[16:17], v[14:15], v[14:15]
v_mul_f64 v[8:9], v[10:11], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[10:11], -v[8:9]
v_fma_f64 v[14:15], v[12:13], v[6:7], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[16:17], v[8:9], v[14:15]
v_add_f64 v[18:19], -v[16:17], 1.0
v_add_f64 v[8:9], v[16:17], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[20:21], -v[18:19], 1.0
v_add_f64 v[8:9], v[8:9], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[20:21], -v[16:17]
v_add_f64 v[8:9], v[8:9], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[18:19], v[8:9]
v_mul_f64 v[16:17], v[12:13], v[14:15]
v_add_f64 v[18:19], v[18:19], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[20:21], v[10:11], v[16:17]
v_add_f64 v[8:9], v[8:9], v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[22:23], v[16:17], v[10:11], -v[20:21]
v_fma_f64 v[22:23], v[16:17], v[6:7], v[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[24:25], v[20:21], v[22:23]
v_add_f64 v[26:27], v[14:15], -v[24:25]
v_add_f64 v[18:19], v[24:25], -v[20:21]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[14:15], -v[26:27]
v_add_f64 v[18:19], v[18:19], -v[22:23]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[14:15], -v[24:25]
v_add_f64 v[8:9], v[8:9], v[14:15]
v_add_f64 v[14:15], v[12:13], v[16:17]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[18:19], v[8:9]
v_add_f64 v[18:19], v[14:15], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[26:27], v[8:9]
v_add_f64 v[16:17], v[16:17], -v[18:19]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[8:9], v[12:13], v[8:9]
v_add_f64 v[8:9], v[16:17], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[12:13], v[14:15], v[8:9]
v_add_f64 v[16:17], v[10:11], v[12:13]
v_add_f64 v[14:15], v[12:13], -v[14:15]
v_add_f64 v[20:21], v[10:11], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[16:17], -v[10:11]
v_add_f64 v[8:9], v[8:9], -v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[10:11], v[10:11], -v[20:21]
v_add_f64 v[14:15], v[12:13], -v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[18:19], v[6:7], v[8:9]
v_add_f64 v[10:11], v[10:11], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[18:19], v[14:15]
v_add_f64 v[6:7], v[6:7], v[10:11]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[16:17], v[14:15]
v_add_f64 v[6:7], v[6:7], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[22:23], v[18:19]
v_add_f64 v[16:17], v[18:19], -v[16:17]
v_add_f64 v[14:15], v[14:15], -v[16:17]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[18:19], v[22:23], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[10:11], v[12:13], v[22:23], v[22:23]
v_add_f64 v[12:13], v[20:21], v[6:7]
v_fma_f64 v[8:9], -v[18:19], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[8:9], v[10:11], v[10:11]
v_mul_f64 v[10:11], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[22:23], v[18:19], v[10:11]
v_fma_f64 v[16:17], v[10:11], v[18:19], -v[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[10:11], v[14:15], v[16:17]
v_add_f64 v[16:17], v[22:23], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[18:19], v[12:13], -v[16:17]
v_add_f64 v[22:23], v[16:17], -v[22:23]
v_add_f64 v[24:25], v[12:13], -v[18:19]
v_add_f64 v[12:13], v[12:13], -v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[14:15], v[14:15], -v[22:23]
v_add_f64 v[16:17], v[24:25], -v[16:17]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[6:7], v[6:7], -v[12:13]
v_add_f64 v[12:13], v[16:17], -v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], v[12:13]
v_add_f64 v[6:7], v[18:19], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[6:7], v[8:9], v[6:7]
v_add_f64 v[6:7], v[10:11], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, 0x3ff00000, v7, vcc_lo
v_dual_cndmask_b32 v6, 0, v6 :: v_dual_and_b32 v7, 0x7fffffff, v5
v_cmp_gt_f64_e64 vcc_lo, 0x3e400000, |v[4:5]|
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v4, v6, v4 :: v_dual_add_nc_u32 v1, s1, v1
v_cndmask_b32_e32 v0, v0, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_i32_e32 vcc_lo, s33, v1
v_bfi_b32 v5, 0x7fffffff, v0, v5
s_or_b32 s36, vcc_lo, s36
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s36
s_cbranch_execnz .LBB82_2
.LBB82_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _tanh_64 | 4,021 | 7,428 | stackv2-00014-of-00015 |
// Demangled: _trunc_32(int, float*, float*)
Function : _Z9_trunc_32iPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R8 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FRND.TRUNC R13, R2 &req={2} &wr=0x0 ?trans2;
STG.E desc[UR6][R4.64], R13 &req={0} &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _trunc_32(int, float*, float*)
_Z9_trunc_32iPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB83_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB83_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b32 v0, v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_trunc_f32_e32 v0, v0
global_store_b32 v[2:3], v0, off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB83_2
.LBB83_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _trunc_32 | 613 | 652 | stackv2-00014-of-00015 |
// Demangled: _trunc_64(int, double*, double*)
Function : _Z9_trunc_64iPdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R10, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R13, R13, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x8, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R6, R0, 0x8, R10 &req={3,1} ?trans1;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT ?trans1;
FRND.F64.TRUNC R4, R2 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR6][R6.64], R4 &req={0} &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _trunc_64(int, double*, double*)
_Z9_trunc_64iPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s9, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB84_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s2, s9
s_mov_b32 s2, 0
.LBB84_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[1:2]
v_add_nc_u32_e32 v1, s1, v1
v_add_co_u32 v4, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v1
v_add_co_u32 v2, s0, s6, v2
global_load_b64 v[4:5], v[4:5], off
v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
s_or_b32 s2, vcc_lo, s2
s_waitcnt vmcnt(0)
v_trunc_f64_e32 v[4:5], v[4:5]
global_store_b64 v[2:3], v[4:5], off
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB84_2
.LBB84_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _trunc_64 | 622 | 664 | stackv2-00014-of-00015 |
// Demangled: _xcopy(int, int, char const*, int, char*, int)
Function : _Z6_xcopyiiPKciPci
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R9, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R4, SR_TID.X &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x2 ?trans1;
IABS R0, R9 &req={1} ?WAIT4_END_GROUP;
I2F.RP R5, R0 &wr=0x1 ?trans1;
IMAD R4, R7, UR4, R4 &req={2} ?trans1;
LDCU UR4, c[0x0][0x384] &wr=0x2 ?trans1;
MUFU.RCP R5, R5 &req={1} &wr=0x1 ?trans2;
IADD3 R2, PT, PT, R5, 0xffffffe, RZ &req={1} ?trans2;
IABS R5, R4 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x1 &wr=0x3 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R11, PT, PT, RZ, -R3, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R11, R11, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R3, R11, R2 ?trans1;
LOP3.LUT R2, R4, R9, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R3, R8, R5, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R5, R0, R6, R5 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R5, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R5, PT, PT, R5, -R0.reuse, RZ ?trans2;
@!P1 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R2, RZ, PT ?trans2;
ISETP.GE.U32.AND P0, PT, R5, R0, PT ?WAIT13_END_GROUP;
@P0 IADD3 R3, PT, PT, R3, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R5, R3 ?WAIT5_END_GROUP;
@!P1 IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R5, RZ, R9, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R3, R4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR9, c[0x0][0x384] &wr=0x3 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x4 ?trans1;
LDCU UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD R4, R7, UR4, RZ &req={1} ?trans1;
LDCU.64 UR10, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR12, c[0x0][0x398] &req={2} &wr=0x0 ?trans5;
IABS R7, R3 &req={2} ?trans2;
IABS R12, R2.reuse &req={0} ?trans1;
ISETP.GE.AND P1, PT, R3, RZ, PT ?trans2;
IMAD.HI.U32 R8, R8, R7, RZ ?trans1;
LOP3.LUT R14, RZ, R2, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R12, R8, R7 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, R7, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R7, PT, PT, R7, -R12, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, R7, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R7, PT, PT, R7, -R12, RZ ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
SEL R10, R14, R7, !P0 ?WAIT5_END_GROUP;
IMAD R6, R5, UR5, R10 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?WAIT5_END_GROUP;
IADD.64 R6, R6, UR10 &req={1} ?WAIT6_END_GROUP;
LDG.E.U8 R11, desc[UR6][R6.64] &rd=0x0 &wr=0x2 ?trans1;
I2F.RP R0, R12 &wr=0x1 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 ?trans1;
IADD3 R3, PT, PT, R4, R3, RZ ?WAIT4_END_GROUP;
IABS R7, R3 &req={0} ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x0 ?trans2;
IADD3 R13, PT, PT, R0, 0xffffffe, RZ &req={0} ?trans1;
MOV R0, R12 ?WAIT3_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R13 &wr=0x0 ?trans2;
IADD3 R15, PT, PT, RZ, -R9, RZ &req={0} ?WAIT5_END_GROUP;
IMAD R15, R15, R12, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R9, R15, R8 ?WAIT6_END_GROUP;
IMAD.HI.U32 R9, R8, R7, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R7, R12, R6, R7 ?trans2;
IMAD R6, R5, UR8, R10 ?trans1;
LOP3.LUT R5, R3, R2, RZ, 0x3c, !PT ?trans2;
ISETP.GT.U32.AND P2, PT, R0, R7, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R7, PT, PT, R7, -R12, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R5, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R7, R0, PT ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?WAIT5_END_GROUP;
IADD.64 R6, R6, UR12 ?WAIT7_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
SEL R5, R14, R9, !P0 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR9, PT &req={3} ?trans1;
STG.E.U8 desc[UR6][R6.64], R11 &req={2} &rd=0x2 ?WAIT12_END_GROUP;
@!P0 BRA 0x2b0 ?trans5;
EXIT ?trans5;
BRA 0x5b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _xcopy(int, int, char const*, int, char*, int)
_Z6_xcopyiiPKciPci:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s6, s[0:1], 0x34
s_add_u32 s4, s0, 40
s_addc_u32 s5, s1, 0
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s8, s2, 31
s_and_b32 s13, s6, 0xffff
s_add_i32 s2, s2, s8
s_mul_i32 s9, s15, s13
s_xor_b32 s2, s2, s8
v_add_nc_u32_e32 v3, s9, v0
v_cvt_f32_u32_e32 v1, s2
s_sub_i32 s6, 0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_rcp_iflag_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v3, v4
v_xor_b32_e32 v3, v3, v4
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_xor_b32_e32 v4, s8, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v1, v1
v_mul_lo_u32 v2, s6, v1
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v1, v2
v_add_nc_u32_e32 v1, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v3, v1
v_mul_lo_u32 v5, v2, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v3, v5
v_add_nc_u32_e32 v5, 1, v2
v_subrev_nc_u32_e32 v6, s2, v3
v_cmp_le_u32_e32 vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v2, v2, v5 :: v_dual_cndmask_b32 v3, v3, v6
v_add_nc_u32_e32 v5, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s2, v3
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v4
v_sub_nc_u32_e32 v2, v2, v4
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v2
s_cbranch_execz .LBB97_3
s_load_b32 s12, s[4:5], 0x0
s_clause 0x3
s_load_b64 s[4:5], s[0:1], 0x8
s_load_b32 s11, s[0:1], 0x10
s_load_b64 s[6:7], s[0:1], 0x18
s_load_b32 s1, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_add_i32 s0, s15, s12
s_mul_i32 s12, s12, s13
s_mul_i32 s13, s0, s13
.LBB97_2:
v_add_nc_u32_e32 v3, s9, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_add_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v3, v3, v4
v_mul_hi_u32 v5, v3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v5, s2
v_sub_nc_u32_e32 v3, v3, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s2, v3
v_cmp_le_u32_e32 vcc_lo, s2, v3
v_cndmask_b32_e32 v3, v3, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s2, v3
v_cmp_le_u32_e32 vcc_lo, s2, v3
v_cndmask_b32_e32 v3, v3, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v3, v3, v4
v_sub_nc_u32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v2, s11, v[3:4]
v_ashrrev_i32_e32 v5, 31, v4
v_add_co_u32 v4, vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
global_load_u8 v6, v[4:5], off
v_add_nc_u32_e32 v4, s13, v0
v_add_nc_u32_e32 v0, s12, v0
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, v4, v5
v_xor_b32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v4, v1
v_mul_lo_u32 v8, v7, s2
v_add_nc_u32_e32 v9, 1, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v4, v8
v_subrev_nc_u32_e32 v8, s2, v4
v_cmp_le_u32_e32 vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v7, v7, v9 :: v_dual_cndmask_b32 v4, v4, v8
v_xor_b32_e32 v9, s8, v5
v_add_nc_u32_e32 v8, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cmp_le_u32_e32 vcc_lo, s2, v4
v_mad_u64_u32 v[4:5], null, v2, s1, v[3:4]
v_cndmask_b32_e32 v7, v7, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v5, 31, v4
v_xor_b32_e32 v2, v7, v9
v_add_co_u32 v3, s0, s6, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v4, s0, s7, v5, s0
v_sub_nc_u32_e32 v2, v2, v9
s_delay_alu instid0(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s3, v2
s_or_b32 s10, vcc_lo, s10
s_waitcnt vmcnt(0)
global_store_b8 v[3:4], v6, off
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB97_2
.LBB97_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _xcopy | 2,324 | 2,662 | stackv2-00014-of-00015 |
// Demangled: _xfill_32(int, int, float, float*, int)
Function : _Z9_xfill_32iifPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R9, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R10, SR_TID.X &wr=0x2 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R11, c[0x0][0x360] &wr=0x2 ?trans1;
IABS R0, R9 &req={1} ?WAIT4_END_GROUP;
I2F.RP R2, R0 &wr=0x1 ?trans1;
IMAD R10, R11, UR4, R10 &req={2} ?trans1;
LDCU UR4, c[0x0][0x384] &wr=0x2 ?trans1;
MUFU.RCP R2, R2 &req={1} &wr=0x1 ?trans3;
IABS R6, R10 ?trans2;
IADD3 R5, PT, PT, R2, 0xffffffe, RZ &req={1} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R5 &wr=0x1 ?trans2;
IADD3 R3, PT, PT, RZ, -R5, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R3, R3, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R4, R5, R3, R4 ?trans1;
MOV R3, R6 ?WAIT5_END_GROUP;
IMAD.HI.U32 R2, R4, R3, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R0, R6, R3 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R0, RZ ?trans2;
@!P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, R0, PT ?trans1;
LOP3.LUT R3, R10, R9, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R3, RZ, PT ?WAIT7_END_GROUP;
@P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R7, R2 ?WAIT5_END_GROUP;
@!P1 IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R7, RZ, R9, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R5, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC R6, c[0x0][0x388] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x384] &wr=0x4 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x5 ?trans6;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IABS R14, R5 &req={0} ?trans2;
IABS R13, R10.reuse ?trans2;
I2F.RP R12, R14 &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R10, RZ, PT ?trans1;
IADD3 R10, PT, PT, R11, R10, RZ ?trans1;
IMAD.HI.U32 R4, R4, R13, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT5_END_GROUP;
IMAD R13, R14, R4, R13 ?trans1;
MUFU.RCP R12, R12 &req={0} &wr=0x0 ?trans4;
ISETP.GT.U32.AND P1, PT, R0, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R14, RZ ?trans2;
IADD3 R8, PT, PT, R12, 0xffffffe, RZ &req={0} ?trans2;
IABS R12, R10 ?trans1;
ISETP.GT.U32.AND P2, PT, R0, R13, PT ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans1;
MOV R0, R14 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 0 &req={0} ?WAIT10_END_GROUP;
@!P2 IADD3 R13, PT, PT, R13, -R14, RZ ?trans1;
ISETP.NE.AND P2, PT, R5, RZ, PT ?trans1;
IADD3 R15, PT, PT, RZ, -R9, RZ &req={1} ?trans2;
@!P0 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT3_END_GROUP;
IMAD R15, R15, R14, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R4, R9, R15, R8 ?trans1;
MOV R9, R12 ?WAIT5_END_GROUP;
IMAD.HI.U32 R12, R4, R9, RZ ?WAIT5_END_GROUP;
IADD3 R8, PT, PT, -R12, RZ, RZ ?WAIT5_END_GROUP;
IMAD R9, R14, R8, R9 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R9, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R9, PT, PT, R9, -R14, RZ ?trans2;
LOP3.LUT R14, RZ, R5.reuse, RZ, 0x33, !PT ?trans2;
@!P1 IADD3 R12, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P3, PT, R9, R0, PT ?trans1;
LOP3.LUT R9, R10, R5, RZ, 0x3c, !PT ?trans1;
SEL R8, R14, R13, !P2 ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R9, RZ, PT ?trans1;
IMAD R9, R7, UR5, R8 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R9, 0x4, R2 ?trans2;
@P3 IADD3 R12, PT, PT, R12, 0x1, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R8.64], R6 &req={3,2} &rd=0x1 ?trans3;
@!P0 IADD3 R12, PT, PT, -R12, RZ, RZ ?WAIT5_END_GROUP;
SEL R7, R14, R12, !P2 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR8, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0x2a0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x560;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _xfill_32(int, int, float, float*, int)
_Z9_xfill_32iifPfi:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s8, s[0:1], 0x2c
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_mov_b32 s11, exec_lo
s_waitcnt lgkmcnt(0)
s_ashr_i32 s7, s4, 31
s_and_b32 s10, s8, 0xffff
s_add_i32 s4, s4, s7
s_mul_i32 s8, s15, s10
s_xor_b32 s4, s4, s7
v_add_nc_u32_e32 v3, s8, v0
v_cvt_f32_u32_e32 v1, s4
s_sub_i32 s9, 0, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_rcp_iflag_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v3, v4
v_xor_b32_e32 v3, v3, v4
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_xor_b32_e32 v4, s7, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v1, v1
v_mul_lo_u32 v2, s9, v1
s_mov_b32 s9, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v1, v2
v_add_nc_u32_e32 v1, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v3, v1
v_mul_lo_u32 v5, v2, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v3, v3, v5
v_add_nc_u32_e32 v5, 1, v2
v_subrev_nc_u32_e32 v6, s4, v3
v_cmp_le_u32_e32 vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v2, v2, v5 :: v_dual_cndmask_b32 v3, v3, v6
v_add_nc_u32_e32 v5, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s4, v3
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v4
v_sub_nc_u32_e32 v2, v2, v4
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s5, v2
s_cbranch_execz .LBB95_3
s_load_b32 s11, s[2:3], 0x0
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b32 s1, s[0:1], 0x18
v_mov_b32_e32 v3, s6
s_waitcnt lgkmcnt(0)
s_add_i32 s0, s15, s11
s_mul_i32 s6, s11, s10
s_mul_i32 s10, s0, s10
.LBB95_2:
v_add_nc_u32_e32 v4, s8, v0
v_add_nc_u32_e32 v5, s10, v0
v_add_nc_u32_e32 v0, s6, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v6, 31, v4
v_ashrrev_i32_e32 v7, 31, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, v4, v6
v_add_nc_u32_e32 v5, v5, v7
v_xor_b32_e32 v8, s7, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v4, v4, v6
v_xor_b32_e32 v5, v5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v7, v4, v1
v_mul_lo_u32 v7, v7, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_nc_u32_e32 v4, v4, v7
v_mul_hi_u32 v7, v5, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v10, s4, v4
v_cmp_le_u32_e32 vcc_lo, s4, v4
v_mul_lo_u32 v9, v7, s4
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v4, v4, v10 :: v_dual_add_nc_u32 v11, 1, v7
v_cmp_le_u32_e32 vcc_lo, s4, v4
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v5, v5, v9
v_subrev_nc_u32_e32 v9, s4, v4
v_subrev_nc_u32_e32 v10, s4, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v4, v4, v9, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s4, v5
v_xor_b32_e32 v4, v4, v6
v_cndmask_b32_e32 v7, v7, v11, vcc_lo
v_cndmask_b32_e32 v5, v5, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v4, v4, v6
v_add_nc_u32_e32 v9, 1, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_u32_e32 vcc_lo, s4, v5
v_mad_u64_u32 v[5:6], null, v2, s1, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v7, v9, vcc_lo
v_xor_b32_e32 v2, v2, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_sub_nc_u32_e32 v2, v2, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[5:6]
v_cmp_le_i32_e32 vcc_lo, s5, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s0, s2, v4
v_add_co_ci_u32_e64 v5, s0, s3, v5, s0
s_or_b32 s9, vcc_lo, s9
global_store_b32 v[4:5], v3, off
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB95_2
.LBB95_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _xfill_32 | 2,185 | 2,526 | stackv2-00014-of-00015 |
// Demangled: _xfill_64(int, int, double, double*, int)
Function : _Z9_xfill_64iidPdi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R5, c[0x0][0x380] &wr=0x1 ?trans1;
S2R R8, SR_TID.X &wr=0x2 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?WAIT6_END_GROUP;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R11, c[0x0][0x360] &wr=0x2 ?trans1;
IABS R0, R5 &req={1} ?WAIT4_END_GROUP;
I2F.RP R2, R0 &wr=0x1 ?trans1;
IMAD R8, R11, UR4, R8 &req={2} ?trans1;
LDCU UR4, c[0x0][0x384] &wr=0x2 ?trans1;
MUFU.RCP R2, R2 &req={1} &wr=0x1 ?trans3;
IABS R4, R8 ?trans2;
IADD3 R7, PT, PT, R2, 0xffffffe, RZ &req={1} ?WAIT6_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R7 &wr=0x1 ?trans2;
IADD3 R3, PT, PT, RZ, -R7, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R3, R3, R0, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R7, R3, R6 ?trans1;
MOV R3, R4 ?WAIT5_END_GROUP;
IMAD.HI.U32 R2, R6, R3, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R2, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R0, R4, R3 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R0, RZ ?trans2;
@!P1 IADD3 R2, PT, PT, R2, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R3, R0, PT ?trans1;
LOP3.LUT R3, R8, R5, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R3, RZ, PT ?WAIT7_END_GROUP;
@P0 IADD3 R2, PT, PT, R2, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT4_END_GROUP;
MOV R9, R2 ?WAIT5_END_GROUP;
@!P1 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R9, RZ, R5, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R7, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R12, R9 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x384] &wr=0x4 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x5 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R9, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IABS R16, R7 &req={0} ?trans2;
IABS R13, R8.reuse ?trans2;
I2F.RP R14, R16 &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R8, RZ, PT ?trans1;
IADD3 R8, PT, PT, R9, R8, RZ ?trans1;
IMAD.HI.U32 R6, R6, R13, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R6, RZ, RZ ?WAIT5_END_GROUP;
IMAD R13, R16, R6, R13 ?trans1;
MUFU.RCP R14, R14 &req={0} &wr=0x0 ?trans4;
ISETP.GT.U32.AND P1, PT, R0, R13, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R16, RZ ?trans2;
IADD3 R10, PT, PT, R14, 0xffffffe, RZ &req={0} ?trans2;
IABS R14, R8 ?trans1;
ISETP.GT.U32.AND P2, PT, R0, R13, PT ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &rd=0x0 &wr=0x1 ?trans1;
MOV R0, R16 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 &req={0} ?WAIT10_END_GROUP;
@!P2 IADD3 R13, PT, PT, R13, -R16, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, RZ, PT ?trans1;
IADD3 R15, PT, PT, RZ, -R11, RZ &req={1} ?trans2;
@!P0 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT3_END_GROUP;
IMAD R15, R15, R16, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R6, R11, R15, R10 ?trans1;
MOV R11, R14 ?trans1;
LOP3.LUT R15, RZ, R7, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R14, R6, R11, RZ ?trans1;
SEL R13, R15, R13, !P2 ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, -R14, RZ, RZ ?WAIT5_END_GROUP;
IMAD R11, R16, R10, R11 ?trans1;
LOP3.LUT R10, R8, R7, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R0, R11, PT ?trans1;
ISETP.GE.AND P0, PT, R10, RZ, PT ?WAIT12_END_GROUP;
@!P1 IADD3 R11, PT, PT, R11, -R16, RZ ?trans2;
@!P1 IADD3 R14, PT, PT, R14, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P3, PT, R11, R0, PT ?trans1;
IMAD R11, R12, UR5, R13 &req={5} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x8, R2 &req={3} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R10.64], R4 &req={2} &rd=0x1 ?trans3;
@P3 IADD3 R14, PT, PT, R14, 0x1, RZ ?WAIT4_END_GROUP;
@!P0 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT5_END_GROUP;
SEL R12, R15, R14, !P2 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R12, UR8, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0x2b0 &req={1} ?trans5;
EXIT ?trans5;
BRA 0x570;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: _xfill_64(int, int, double, double*, int)
_Z9_xfill_64iidPdi:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s4, s[0:1], 0x2c
s_add_u32 s8, s0, 32
s_addc_u32 s9, s1, 0
s_mov_b32 s12, 0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s10, s2, 31
s_and_b32 s13, s4, 0xffff
s_add_i32 s2, s2, s10
s_mul_i32 s11, s15, s13
s_xor_b32 s2, s2, s10
v_add_nc_u32_e32 v3, s11, v0
v_cvt_f32_u32_e32 v1, s2
s_sub_i32 s4, 0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v4, 31, v3
v_rcp_iflag_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v3, v4
v_xor_b32_e32 v5, v3, v4
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_xor_b32_e32 v4, s10, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v1, v1
v_mul_lo_u32 v2, s4, v1
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v1, v2
v_add_nc_u32_e32 v3, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v1, v5, v3
v_mul_lo_u32 v2, v1, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v2, v5, v2
v_add_nc_u32_e32 v5, 1, v1
v_subrev_nc_u32_e32 v6, s2, v2
v_cmp_le_u32_e32 vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v2, v2, v6 :: v_dual_cndmask_b32 v1, v1, v5
v_cmp_le_u32_e32 vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v5, 1, v1
v_cndmask_b32_e32 v1, v1, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v1, v1, v4
v_sub_nc_u32_e32 v4, v1, v4
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v4
s_cbranch_execz .LBB96_3
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s8, s[8:9], 0x0
s_load_b32 s1, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v1, s4 :: v_dual_mov_b32 v2, s5
s_add_i32 s5, s15, s8
s_mul_i32 s4, s8, s13
s_mul_i32 s5, s5, s13
.LBB96_2:
v_add_nc_u32_e32 v5, s11, v0
v_add_nc_u32_e32 v6, s5, v0
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v7, 31, v5
v_ashrrev_i32_e32 v8, 31, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v5, v7
v_add_nc_u32_e32 v6, v6, v8
v_xor_b32_e32 v9, s10, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v5, v5, v7
v_xor_b32_e32 v6, v6, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v8, v5, v3
v_mul_lo_u32 v8, v8, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_nc_u32_e32 v5, v5, v8
v_mul_hi_u32 v8, v6, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v11, s2, v5
v_cmp_le_u32_e32 vcc_lo, s2, v5
v_mul_lo_u32 v10, v8, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v5, v5, v11 :: v_dual_add_nc_u32 v12, 1, v8
v_cmp_le_u32_e32 vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v10
v_subrev_nc_u32_e32 v10, s2, v5
v_subrev_nc_u32_e32 v11, s2, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, v5, v10, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s2, v6
v_xor_b32_e32 v5, v5, v7
v_cndmask_b32_e32 v8, v8, v12, vcc_lo
v_cndmask_b32_e32 v6, v6, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v5, v5, v7
v_add_nc_u32_e32 v10, 1, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_u32_e32 vcc_lo, s2, v6
v_mad_u64_u32 v[6:7], null, v4, s1, v[5:6]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v8, v10, vcc_lo
v_xor_b32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v7, 31, v6
v_sub_nc_u32_e32 v4, v4, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[5:6], 3, v[6:7]
v_cmp_le_i32_e32 vcc_lo, s3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v5, s0, s6, v5
v_add_co_ci_u32_e64 v6, s0, s7, v6, s0
s_or_b32 s12, vcc_lo, s12
global_store_b64 v[5:6], v[1:2], off
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB96_2
.LBB96_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| _xfill_64 | 2,217 | 2,542 | stackv2-00014-of-00015 |
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