add sglang_mla_decode_v1: MLA paged decode reference for mla_paged_decode_h16_ckv512_kpe64_ps1 (B200, with cross-architecture finding)

Summary

Adds a Triton-based MLA paged decode solution under kernel-arena for the
definition mla_paged_decode_h16_ckv512_kpe64_ps1 (DeepSeek-V3 / Kimi style,
h=16, ckv=512, kpe=64, page_size=1). The solution is a wrapper around the
sglang decode_attention_fwd_grouped Triton kernel, vendored and modified for
this signature.

• solutions/kernel-arena/mla_paged/mla_paged_decode_h16_ckv512_kpe64_ps1/sglang_mla_decode_v1.json
• traces/kernel-arena/mla_paged/mla_paged_decode_h16_ckv512_kpe64_ps1.jsonl — 47 traces, 47/47 PASSED on NVIDIA B200

Solution design

The vendored sglang Triton kernel (700+ lines, originally written for the
fused-K layout) is patched in-tree with two H100/B200-targeted modifications:

• Split-K stage 1 — main K is read directly from ckv_cache and rope K
  from kpe_cache via two separate buffers, avoiding any per-call
  gather/concat that the original fused-K layout requires.
• In-kernel base-2 lse stage 2 — the reducer writes the final base-2
  logsumexp directly, removing host-side attn_lse.fill_(-inf) and outer
  logsumexp / log(2) ops.

Combined with num_kv_splits.fill_(MAX_KV_SPLITS) (kernel masks invalid
splits internally), the per-call host overhead drops to a single Triton launch
pair plus the final reducer.

Cross-architecture finding (the interesting part)

The same kernel was benchmarked on H100 PCIe (sm90) and B200 (sm100) against
the FlashInfer baseline flashinfer_wrapper_03f7b0 to see how Triton stacks
up against hand-tuned CUDA on each generation. Both runs pair the FI baseline
and our solution side-by-side in a single benchmark invocation, so each
ratio is measured under identical hardware/driver/torch state.

Interpretation: FlashInfer's MLA path on B200 makes use of sm100-specific
optimizations (TMA improvements, wgmma extensions, the dedicated
trtllm_batch_decode_with_kv_cache_mla path). The vendored sglang Triton
kernel is sm90-era code; Triton's JIT compiles it to PTX on B200 but does not
exploit those new instructions, so the gap widens by roughly 3×. On H100, the
playing field is much more level — there our split-K + in-kernel-lse host
overhead reduction is enough to edge ahead of FlashInfer's wrapper overhead.

This PR ships the B200 traces (47 PASSED) so that the comparison against
the dataset's existing B200 baseline (traces/baseline/mla_paged/...) is
apples-to-apples.

B200 numbers in detail (47 workloads)

(On H100 the numbers flip: sglang BEATS FI on 46/47 with mean ratio 1.179× —
exact opposite. Same source code, same workloads, two different sm
generations.)

Why submit a "losing" solution?

• First Triton-based MLA decode reference in the dataset — currently the
  only non-LLM-generated, non-FlashInfer entry. Useful as a portability
  baseline for projects that cannot link the FlashInfer custom kernels.
• The cross-architecture data point itself: it demonstrates how much
  sm100-specific work the FlashInfer maintainers invested for B200, and gives
  the community a concrete number for the gap.
• The same source code wins on H100 and loses on B200 — a clean illustration
  of why cross-architecture portability claims need to be checked against the
  hardware actually in use.

Files added

solutions/kernel-arena/mla_paged/mla_paged_decode_h16_ckv512_kpe64_ps1/sglang_mla_decode_v1.json
traces/kernel-arena/mla_paged/mla_paged_decode_h16_ckv512_kpe64_ps1.jsonl   (47 PASSED, NVIDIA B200)

Environment

• B200 traces: NVIDIA B200 (sm100), NGC nvcr.io/nvidia/pytorch:24.10-py3,
  torch 2.11.0+cu130, triton 3.6.0, CUDA 13.0, flashinfer-bench (latest from PyPI).
  (FlashInfer 0.6.9 + cu130 has known sm100 incompatibility on this image; the
  baseline traces in this PR's comparison come from the dataset's existing
  traces/baseline/mla_paged/...jsonl — torch 2.8.0+cu128 / triton 3.4.0 / cuda 12.8.)
• H100 cross-architecture numbers were captured for context in a separate
  run on the same dataset; not included here to keep the PR's published
  traces self-consistent on B200.

Reproducing

flashinfer-bench run --local . \
    --definitions mla_paged_decode_h16_ckv512_kpe64_ps1 \
    --solutions flashinfer_wrapper_03f7b0 sglang_mla_decode_v1 \
    --warmup-runs 5 --iterations 20 --num-trials 1