max_stars_repo_path stringlengths 4 261 | max_stars_repo_name stringlengths 6 106 | max_stars_count int64 0 38.8k | id stringlengths 1 6 | text stringlengths 7 1.05M |
|---|---|---|---|---|
loader.asm | Diversion2k22/x86_64-decOS-MSC-KIIT | 0 | 80994 | [BITS 16]
[ORG 0x7e00]
start:
mov [DriveId],dl
mov eax,0x80000000
cpuid
cmp eax,0x80000001
jb NotSupport
mov eax,0x80000001
cpuid
test edx,(1<<29)
jz NotSupport
test edx,(1<<26)
jz NotSupport
LoadKernel:
mov si,ReadPacket
mov word[si],0x10
mov word[si+2],100
mov word[si+4],0
mov word[si+6],0x1000
mov dword[si+8],6
mov dword[si+0xc],0
mov dl,[DriveId]
mov ah,0x42
int 0x13
jc ReadError
LoadUser:
mov si,ReadPacket
mov word[si],0x10
mov word[si+2],10
mov word[si+4],0
mov word[si+6],0x2000
mov dword[si+8],106
mov dword[si+0xc],0
mov dl,[DriveId]
mov ah,0x42
int 0x13
jc ReadError
LoadUser2:
mov si,ReadPacket
mov word[si],0x10
mov word[si+2],10
mov word[si+4],0
mov word[si+6],0x3000
mov dword[si+8],116
mov dword[si+0xc],0
mov dl,[DriveId]
mov ah,0x42
int 0x13
jc ReadError
LoadUser3:
mov si,ReadPacket
mov word[si],0x10
mov word[si+2],10
mov word[si+4],0
mov word[si+6],0x4000
mov dword[si+8],126
mov dword[si+0xc],0
mov dl,[DriveId]
mov ah,0x42
int 0x13
jc ReadError
GetMemInfoStart:
mov eax,0xe820
mov edx,0x534d4150
mov ecx,20
mov dword[0x9000],0
mov edi,0x9008
xor ebx,ebx
int 0x15
jc NotSupport
GetMemInfo:
add edi,20
inc dword[0x9000]
test ebx,ebx
jz GetMemDone
mov eax,0xe820
mov edx,0x534d4150
mov ecx,20
int 0x15
jnc GetMemInfo
GetMemDone:
TestA20:
mov ax,0xffff
mov es,ax
mov word[ds:0x7c00],0xa200
cmp word[es:0x7c10],0xa200
jne SetA20LineDone
mov word[0x7c00],0xb200
cmp word[es:0x7c10],0xb200
je End
SetA20LineDone:
xor ax,ax
mov es,ax
SetVideoMode:
mov ax,3
int 0x10
cli
lgdt [Gdt32Ptr]
lidt [Idt32Ptr]
mov eax,cr0
or eax,1
mov cr0,eax
jmp 8:PMEntry
ReadError:
NotSupport:
End:
hlt
jmp End
[BITS 32]
PMEntry:
mov ax,0x10
mov ds,ax
mov es,ax
mov ss,ax
mov esp,0x7c00
cld
mov edi,0x70000
xor eax,eax
mov ecx,0x10000/4
rep stosd
mov dword[0x70000],0x71003
mov dword[0x71000],10000011b
mov eax,(0xffff800000000000>>39)
and eax,0x1ff
mov dword[0x70000+eax*8],0x72003
mov dword[0x72000],10000011b
lgdt [Gdt64Ptr]
mov eax,cr4
or eax,(1<<5)
mov cr4,eax
mov eax,0x70000
mov cr3,eax
mov ecx,0xc0000080
rdmsr
or eax,(1<<8)
wrmsr
mov eax,cr0
or eax,(1<<31)
mov cr0,eax
jmp 8:LMEntry
PEnd:
hlt
jmp PEnd
[BITS 64]
LMEntry:
mov rsp,0x7c00
cld
mov rdi,0x200000
mov rsi,0x10000
mov rcx,51200/8
rep movsq
mov rax,0xffff800000200000
jmp rax
LEnd:
hlt
jmp LEnd
DriveId: db 0
ReadPacket: times 16 db 0
Gdt32:
dq 0
Code32:
dw 0xffff
dw 0
db 0
db 0x9a
db 0xcf
db 0
Data32:
dw 0xffff
dw 0
db 0
db 0x92
db 0xcf
db 0
Gdt32Len: equ $-Gdt32
Gdt32Ptr: dw Gdt32Len-1
dd Gdt32
Idt32Ptr: dw 0
dd 0
Gdt64:
dq 0
dq 0x0020980000000000
Gdt64Len: equ $-Gdt64
Gdt64Ptr: dw Gdt64Len-1
dd Gdt64
|
test/Succeed/ProjectionLikeAndModules.agda | cruhland/agda | 1,989 | 11829 | -- {-# OPTIONS -v tc.proj.like:10 #-}
-- {-# OPTIONS -v tc.conv:10 #-}
open import Common.Level
module ProjectionLikeAndModules (A : Set) (a : A) where
record ⊤ : Set where
constructor tt
data Wrap (W : Set) : Set where
wrap : W → Wrap W
data Bool : Set where
true false : Bool
-- postulate
-- `or' should be projection like in the module parameters
if : Bool → {ℓ : Level} {B : Set ℓ} → B → B → B
if true a b = a
if false a b = b
postulate
u v : ⊤
P : {ℓ : Level} {C : Set ℓ} (c : C) -> Set
test : (y : Bool)
-> P (if y (wrap u) (wrap tt))
-> P (if y (wrap tt) (wrap v))
test y h = h
-- An internal error has occurred. Please report this as a bug.
-- Location of the error: src/full/Agda/TypeChecking/Conversion.hs:536
|
src/main/antlr4/kernel/tools/generated/grammar1.g4 | ptal/repmus | 0 | 5390 | <reponame>ptal/repmus<gh_stars>0
/*
Pour utiliser une grammaire ANTLR 4:
- installer ANTLR4 SDK depuis Help -> Marketplace...
- vérifiez que dans Widnow -> Preferences -> ANTLR4 -> Tools,
"Generate parse tree listener" est bien sélectionné.
- cliquer sur le fichier .g4 avec : click droit -> Run As -> Generate ANTLR Recognizer
(un fichier target/generated-sources/antlr4/ILPMgrammar1BaseListener est généré)
- ajouter le chemin target/generated-sources/antl4 dans les source du projet
avec cllic droit sur antlr4 -> Build Path -> Use as Source Folder
- ajouter antlr-4.4complete.jar
*/
grammar grammar1;
// Expressions
expr returns [Object rep]
: classname=IDENT '(' args+=expr? (',' args+=expr)* ')' # Builder
| '(' elems+=expr* ')' # List
| 't' # ConstTrue
| 'nil' # ConstFalse
| intConst=integerR # ConstInteger
| floatConst=floatR # ConstFloat
| stringConst=STRING # ConstString
| ratio=ratioR # ConstRatio
| '[' extras+=extraR ']' # ExtraList
;
//Rhythmic tree
rt returns [Object rep]
// RT
: '(' dur=ratioR '(' prop+=prt* ')' ')' # RTree
;
prt returns [Object rep]
// PRT
: '(' propor=integerR '(' propo+=prt* ')' ')' ('[' extras+=extraR ']')* # PRTree
| intConst=integerR ('[' extras+=extraR ']')*# PRTInteger
| floatConst=floatR ('[' extras+=extraR ']')*# PRTFloat
;
extraR returns [Object rep]
// extras
: '-grace' rythm=prt '(' midic+=integerR+ ')' after='-a'?# ExtraGrace
| '-text' text=STRING up='-up'? ('-dx' dx=integerR)? ('-dy' dy=integerR)?# ExtraText
;
integerR returns [Object rep]
// integer
: intval=INT # PositifInt
| '-' intval=INT # NegatifInt
;
floatR returns [Object rep]
// integer
: floatval=FLOAT # PositifFloat
| '-' floatval=FLOAT # NegatifFloat
;
ratioR returns [Object rep]
// ration
: intNum=integerR '/' intDen=INT# Ratio
| intConst=integerR # DurInteger
;
system returns [Object rep]
//staff
: '[' lines+=line+ ']' # StaffLines
;
line returns [Object rep]
//staff
: simple=IDENT # StaffSimple
| group= '{' lines+=line+ '}' # StaffGroup
;
// Règles lexicales.
// Identificateurs
IDENT : [a-zA-Z_] [a-zA-Z0-9_]* ;
// Constantes entières
INT : [0-9]+ ;
// Constantes flottantes
FLOAT : [0-9]* '.' [0-9]* ;
// Constantes chaînes de caractères
STRING : '"' (ESC | ~["\\])* '"';
ESC : '\\' [\\nrt"];
// Espaces
SPACE : [ \t\r\n]+ -> skip;
|
oeis/259/A259368.asm | neoneye/loda-programs | 11 | 245416 | <gh_stars>10-100
; A259368: Number of digits in n^n when written in binary.
; 1,3,5,9,12,16,20,25,29,34,39,44,49,54,59,65,70,76,81,87,93,99,105,111,117,123,129,135,141,148,154,161,167,173,180,187,193,200,207,213,220,227,234,241,248,255,262,269,276,283,290,297,304,311,318,326,333
seq $0,326299 ; a(n) = floor(n*log_2(n)).
add $0,1
|
c_projects/project1/ch1-ch3/boot_sector_3.asm | darbinreyes/subparprogrammer | 0 | 103040 | <filename>c_projects/project1/ch1-ch3/boot_sector_3.asm
;
; A boot sector program that demos addressing.
;
mov ah, 0x0e ; scrolling teletype BIOS routine.
; 1st attempt
mov al, the_secret
int 0x10 ; Does this print 'D'?
; 2nd attempt
mov al, [the_secret]
int 0x10
; 3rd attempt
mov bx, the_secret
add bx, 0x7c00
mov al, [bx]
int 0x10
; 4th attempt
mov al, [0x7c1e]
int 0x10
jmp $ ; infinite loop.
the_secret:
db 'D' ; The author uses double quotes here.
times 510-($-$$) db 0
dw 0xaa55 |
2020_3/projeto1/autogen/Grammar.g4 | lbandeira/compilers-cin | 0 | 5193 | /* nome da gramática -- deve ser o mesmo nome do arquivo .g4 e começar com letra maiúscula*/
/*
Projeto 1 de Compiladores - CIn | UFPE
Autor: RJVW - <NAME> */
grammar Grammar;
/* parser */
/* regra raiz */
file : (variable_definition ';' | function_definition) +;
TYPE_INT:'int';
TYPE_FLOAT:'float';
identifier: IDENTIFIER;
integer: INT;
floating: FLOAT;
string: STRING;
array: identifier '[' expression ']';
array_literal: '{' expression (',' expression)*'}';
variable_definition: type (identifier | array) '=' (expression | array_literal) (',' (identifier | array) '=' (expression | array_literal) )*;
type: TYPE_INT | TYPE_FLOAT;
function_definition: type identifier arguments body ;
body: '{' statement* '}' ;
arguments: '(' (type identifier)? (',' type identifier)* ')';
argumentsType: type identifier;
function_call: identifier '(' expression (',' expression )* ')' ;
variable_assignment: (identifier ('*='| '/=' | '+=' | '=' | '-=') expression) |
identifier('++'|'--');
for_loop: 'for' '(' for_initializer? ';' for_condition? ';' for_step? ')' body;
for_initializer: (variable_definition);
for_condition: (expression);
for_step: (variable_assignment);
if_statement: 'if' '(' expression ')' ( body | statement ) else_statement*;
else_statement: 'else' (body | statement);
expression:
identifier |
array |
floating |
integer |
string |
expression ( '*'| '/') expression |
expression ('+'| '-') expression |
('+'| '-') expression |
expression ('<=' | '==' | '>=' | '<'| '>' | ) expression |
'(' expression ')' |
function_call
;
statement:
( variable_assignment ';' | for_loop | if_statement | variable_definition ';' | 'return' expression?';' | expression';' ) ;
/* lexer */
fragment NUMBER : [0-9];
QUOTE: '"';
COMMENT_BLOCK: '/*' .*? '*/' -> skip;
COMMENT_LINE: '//' .*? '\n' -> skip;
LIB: '#' .*? '\n' -> skip;
WHITESPACE: [\r\t\n]+ -> skip;
INT: NUMBER+;
FLOAT: NUMBER+ '.' NUMBER+;
IDENTIFIER: [a-zA-Z_]+[a-zA-Z0-9]*;
STRING: QUOTE .*? QUOTE;
DEFAULT: .+? -> skip;
/*
MANUAL
caracteres especiais para expressões regulares {
'xyz' : os caracteres rodeados por ' ' são interpretados literalmente
\x : altera a interpretação do caracter x, se ele tiver outra (\t: tab, \(: o caracter que abre parênteses)
a(bc)d : destaca a subexpressão bc
x | y : aceita a subexpressão x ou y
[x\yz] : equivalente a ('x'|\y|'z'), tal que x, \y e z são caracteres
[x] : equivalente a 'x'
x* : aceita 0 ou mais x's
x+ : aceita 1 ou mais x's
x? : aceita 0 ou 1 x
. : aceita qualquer caracter
.* : aceita 0 ou mais caracteres diferentes de \n (guloso)
.*? : aceita 0 ou mais caracteres diferentes de \n (não-guloso)
regex -> skip : qualquer instância da expressão regular regex não é passada para o parser, sendo assim ignorada (usado em comentários, espaços em branco, ou (no caso deste exercício) diretivas de preprocessamento)
no ANTLR alguns desses caracteres especiais podem ser utilizados nas regras da gramática também
ex.:
expr ('+'|'-') expr
estabelece que os dois sinais têm a mesma precedência
'(' (expr (',' expr)*)? ')'
indica que dentro destes parênteses pode haver zero ou mais expressões separadas por vírgulas
}
regras da gramática {
nome_da_regra
: uma seqüência de regras que satisfazem esta
| outra
| e mais outra
;
NOME_DA_EXPRESSÃO_REGULAR : a_expressão_regular ;
dentro de uma regra a primeira opção tem maior precedência (útil em expressões matemáticas)
}
*/
|
session_01/01-storesum/storesum.asm | DigiOhhh/LabArchitettura2-2017-2018 | 1 | 240231 | <gh_stars>1-10
.text
.globl main
main:
addi $s1, $zero, 5
addi $s2, $zero, 7
add $s0, $s1, $s2 |
gcc-gcc-7_3_0-release/gcc/testsuite/gnat.dg/constant4_pkg.ads | best08618/asylo | 7 | 17509 | with Ada.Command_Line; use Ada.Command_Line;
with System.Multiprocessors; use System.Multiprocessors;
package Constant4_Pkg is
Max_CPUs : constant CPU := (if Argument_Count < 2 then Number_Of_CPUs
else CPU'Value (Argument (2)));
subtype Worker_Id is CPU range 1 .. Max_CPUs;
type Counter is range 0 .. 10**18;
Steals : array (Worker_Id) of Counter := (others => 0);
end Constant4_Pkg;
|
programs/oeis/085/A085913.asm | neoneye/loda | 22 | 29601 | <reponame>neoneye/loda<gh_stars>10-100
; A085913: Group the natural numbers such that the product of the terms of the n-th group is divisible by n!. (1),(2),(3,4),(5,6,7,8),(9,10,11,12),(13,14,15,16,17,18),(19,20,21,22,23,24),... Sequence contains the first term of every group.
; 1,2,3,5,9,13,19,25,33,41,51,61,73,85,99,113,129,145,163,181,201,221,243,265,289,313,339,365,393,421,451,481,513,545,579,613,649,685,723,761,801,841,883,925,969,1013,1059,1105,1153,1201,1251,1301,1353,1405
pow $0,2
sub $0,2
div $0,2
add $0,2
|
src/main/fragment/mos6502-common/vwum1=vwum1_bor_vbuaa.asm | jbrandwood/kickc | 2 | 92907 | ora {m1}
sta {m1} |
oeis/081/A081302.asm | neoneye/loda-programs | 11 | 169290 | ; A081302: Subdiagonal of square array A081297.
; Submitted by <NAME>
; 1,1,21,61,1891,9633,404713,2997541,159902271,1564345201,101406750589,1236882490845,94479649710811,1382731226210881,121677107761110993,2079381120597925237,207197254527662127511,4051708966720224576081,451009186349537222575141,9935141145103546408622125,1222022957595474996884987571,29950363121280671077674309601,4034303493621398823665372412601,108901413543857137793023386239301,15944162598515571660310927501081711,470077266951229565768257363117081393,74331635589240640265314635037018888653
mov $2,$0
mov $0,1
add $0,$2
add $2,4
mul $2,$0
add $2,2
mov $3,1
lpb $0
sub $0,1
mov $1,$3
mul $4,$2
add $3,$4
mov $4,$1
lpe
mov $0,$1
|
make_puzzle5.als | nishio/learning_alloy | 1 | 5084 | <reponame>nishio/learning_alloy
enum Person {A, B, C, D, E}
enum Bool {T, F}
enum BoolBool {TT, TF, FT, FF}
abstract sig Constrain{
by: one Person,
who: one Person
}{
by not in who
}
fact {
all disj: x, y: Constrain {
not {
x.by = y.by
x.who = y.who
(x in is_liar) <=> (y in is_liar)
}
}
}
sig is_liar extends Constrain {}
sig is_coward extends Constrain {}
pred satisfy(cs: Constrain, a, b, c, d, e: BoolBool){
let
bb = (A -> a) + (B -> b) + (C -> c) + (D -> d) + (E -> e),
b0 = bb.(TT -> T + TF -> T + FT -> F + FF -> F),
b1 = bb.(TT -> T + TF -> F + FT -> T + FF -> F)
{
// b0: Person -> Bool // 正直T 嘘つきF
// b1: Person -> Bool // 臆病T
// 嘘つきの人数を指定
#{b0.T} = 3
// 小心者の人数を指定
#{b1.T} = 3
// すべての嘘つき発言について、
// 発言者が嘘つきでないなら対象は嘘つき
all c: cs & is_liar{
(c.by.b0 = F) => (c.who.b0 = T)
}
// すべての小心者発言について、
// 発言者が嘘つきでないなら対象は臆病
all c: cs & is_coward{
(c.by.b0 = F) => (c.who.b1 = T)
}
// すべての小心な嘘つきについて
all p: b0.T & b1.T {
// 一つしか嘘をつかない:
#{c: by.p |
(c in is_liar and c.who.b0 = F) or
(c in is_coward and c.who.b1 = F)
} = 1
}
}
}
run {
all p: Person {#(by.p) > 1}
let answers = {
a, b, c, d, e: BoolBool |
satisfy[Constrain, a, b, c, d, e]}
{
one answers
}
} for 5 is_liar, 5 is_coward
|
programs/oeis/290/A290562.asm | neoneye/loda | 22 | 1096 | ; A290562: a(n) = n - cos(n*Pi/2).
; -1,1,3,3,3,5,7,7,7,9,11,11,11,13,15,15,15,17,19,19,19,21,23,23,23,25,27,27,27,29,31,31,31,33,35,35,35,37,39,39,39,41,43,43,43,45,47,47,47,49,51,51,51,53,55,55,55,57,59,59,59,61,63,63,63,65,67,67,67,69,71,71,71,73,75,75,75,77,79,79,79,81,83,83,83,85,87,87,87,89,91,91,91,93,95,95,95,97,99,99
mov $2,$0
sub $0,1
mov $1,1
pow $2,2
add $1,$2
bin $1,2
mod $1,4
add $0,$1
|
src/gdb/gdb-8.3/gdb/testsuite/gdb.ada/same_component_name/foo.adb | aps337/unum-sdk | 31 | 11916 | <gh_stars>10-100
-- Copyright 2017-2019 Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
with Pck;
use Pck;
use Pck.Middle;
use Pck.Top;
use Pck.Dyn_Middle;
use Pck.Dyn_Top;
procedure Foo is
B : Bottom_T;
M : Middle_T;
DM : Dyn_Middle_T (24);
begin
Assign (Top_T (B), 12);
Assign (B, 10.0);
Assign (M, 'V');
Assign (B, 5.0);
Assign (Dyn_Top_T (DM), 12);
Assign (DM, 'V');
end Foo;
|
oeis/014/A014720.asm | neoneye/loda-programs | 11 | 98011 | <filename>oeis/014/A014720.asm
; A014720: Squares of elements to right of central element in Pascal triangle (by row) that are not 1.
; Submitted by <NAME>
; 9,16,100,25,225,36,1225,441,49,3136,784,64,15876,7056,1296,81,44100,14400,2025,100,213444,108900,27225,3025,121,627264,245025,48400,4356,144,2944656,1656369,511225,81796,6084,169,9018009,4008004,1002001
seq $0,14411 ; Triangular array formed from elements to right of middle of rows of Pascal's triangle that are not 1.
pow $0,2
|
Transynther/x86/_processed/AVXALIGN/_ht_zr_/i9-9900K_12_0xca.log_21829_1733.asm | ljhsiun2/medusa | 9 | 105112 | <reponame>ljhsiun2/medusa
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x1332a, %r12
nop
nop
nop
nop
xor %rbp, %rbp
movups (%r12), %xmm4
vpextrq $0, %xmm4, %rsi
nop
nop
add %r13, %r13
lea addresses_D_ht+0xbbaa, %rsi
nop
sub %rcx, %rcx
mov (%rsi), %di
nop
nop
nop
add $32107, %r13
lea addresses_D_ht+0x123aa, %rsi
lea addresses_UC_ht+0x123aa, %rdi
nop
nop
nop
nop
nop
xor $3104, %rbp
mov $107, %rcx
rep movsw
nop
nop
dec %r13
lea addresses_D_ht+0x15eaa, %rsi
lea addresses_normal_ht+0xc2a, %rdi
nop
nop
nop
add $47874, %r10
mov $31, %rcx
rep movsq
nop
nop
nop
add $58748, %r12
lea addresses_UC_ht+0x16aa, %r10
nop
nop
nop
nop
inc %rbp
vmovups (%r10), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $1, %xmm0, %rcx
nop
cmp %rsi, %rsi
lea addresses_UC_ht+0x1beaa, %rsi
lea addresses_normal_ht+0x11faa, %rdi
nop
nop
cmp $57060, %rdx
mov $107, %rcx
rep movsw
nop
add %rdx, %rdx
lea addresses_normal_ht+0x432a, %rsi
nop
nop
nop
sub %rdi, %rdi
movb (%rsi), %cl
cmp $1595, %rdi
lea addresses_WC_ht+0x1bdaa, %rcx
nop
nop
cmp $33513, %rdi
mov $0x6162636465666768, %r10
movq %r10, %xmm4
vmovups %ymm4, (%rcx)
nop
nop
nop
nop
nop
dec %rsi
lea addresses_A_ht+0x193ea, %rsi
lea addresses_normal_ht+0xafaa, %rdi
clflush (%rsi)
nop
nop
nop
cmp %r10, %r10
mov $4, %rcx
rep movsb
nop
nop
nop
nop
xor $15432, %r10
lea addresses_UC_ht+0xa77a, %rsi
nop
nop
nop
add $25257, %rcx
vmovups (%rsi), %ymm1
vextracti128 $0, %ymm1, %xmm1
vpextrq $1, %xmm1, %r13
cmp $63085, %rsi
lea addresses_D_ht+0x136da, %rdi
nop
and $53478, %rdx
mov $0x6162636465666768, %r13
movq %r13, (%rdi)
sub %rcx, %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r8
push %rdi
push %rsi
// Faulty Load
lea addresses_US+0x113aa, %r10
sub $8359, %rsi
vmovntdqa (%r10), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $1, %xmm6, %rdi
lea oracles, %r8
and $0xff, %rdi
shlq $12, %rdi
mov (%r8,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %r8
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_US', 'same': False, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': True, 'type': 'addresses_US', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_A_ht', 'same': True, 'AVXalign': False, 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_D_ht', 'congruent': 10}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 11}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_D_ht', 'congruent': 8}, 'dst': {'same': True, 'type': 'addresses_normal_ht', 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': True, 'type': 'addresses_UC_ht', 'congruent': 8}, 'dst': {'same': True, 'type': 'addresses_normal_ht', 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 1, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 5}, 'dst': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 4}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 1}}
{'45': 1535, '47': 8861, '46': 6673, '00': 4760}
46 47 00 45 00 46 47 46 47 46 47 46 47 46 47 00 47 00 45 00 47 00 46 47 46 47 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 00 46 47 46 47 46 47 46 47 45 00 46 47 45 00 46 47 46 47 45 00 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 46 47 46 47 00 47 46 47 46 47 46 47 45 47 46 47 46 47 45 00 45 00 46 47 46 47 46 47 46 47 45 00 45 00 47 00 46 47 45 00 46 47 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 00 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 00 47 46 47 46 47 46 47 46 47 00 47 45 00 46 47 46 47 45 00 46 47 46 47 45 00 47 46 00 46 47 46 47 46 47 45 00 46 47 46 47 46 47 46 47 00 47 45 00 46 47 46 47 46 47 00 47 00 47 45 00 46 47 46 47 46 47 46 47 00 47 45 00 47 00 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 45 00 45 00 46 00 45 00 47 00 00 00 46 47 00 47 00 46 46 47 00 46 47 00 46 47 00 46 47 45 00 47 46 46 47 46 47 00 46 47 46 47 00 46 47 46 47 00 46 47 00 46 47 45 00 47 00 45 00 46 47 46 47 46 47 46 47 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 45 00 45 00 46 47 46 47 46 47 00 46 47 46 47 45 00 46 47 46 47 47 47 46 47 46 47 47 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 00 47 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 00 47 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 00 46 47 45 00 46 47 46 47 45 00 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 46 47 46 47 46 47 00 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 00 47 00 47 46 00 46 47 46 47 00 47 45 00 00 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 45 00 46 47 45 00 46 47 45 00 46 47 46 47 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 00 47 45 00 46 47 46 47 46 47 46 47 46 47 46 00 46 47 46 47 46 47 46 47 00 47 47 46 47 46 47 45 00 46 47 46 47 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 46 47 00 47 00 47 45 00 46 47 46 47 46 47 46 47 45 00 46 47 00 47 00 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 46 47 45 00 46 47 46 47 46 47 46 47 00 47 45 00 46 47 46 47 46 47 46 47 46 47 45 00 46 47 45 00 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 00 47 00 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 00 46 47 46 47 46 47 46 47 46 47 46 47 45 00 46 47 00 47 45 00 45 00 46 47 46 47 46 47 46 47 45 00 46 47 00 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 46 47 00 47 46 47 46 47 46 47 46 47 45
*/
|
euler4.adb | kimtg/euler-ada | 7 | 3235 | with Ada.Text_IO, Ada.Strings.Fixed;
use Ada.Text_IO;
procedure Euler4 is
function Is_Palindrome(S : String) return Boolean is
begin
for I in S'First .. S'Last / 2 loop
if S(I) /= S(S'Last - I + 1) then
return False;
end if;
end loop;
return True;
end;
function Is_Palindrome(N : Integer) return Boolean is
Temp : Integer := N;
Reversed : Integer := 0;
begin
while Temp > 0 loop
Reversed := Reversed * 10 + Temp mod 10;
Temp := Temp / 10;
end loop;
return N = Reversed;
end;
Max_P : Integer;
P : Integer;
begin
-- string
Max_P := 0;
for I in 100 .. 999 loop
for J in I .. 999 loop
P := I * J;
if Is_Palindrome(Ada.Strings.Fixed.Trim(Integer'Image(P), Ada.Strings.Left)) and then P > Max_P then
Max_P := P;
end if;
end loop;
end loop;
Put_Line(Integer'Image(Max_P));
-- math
Max_P := 0;
for I in 100 .. 999 loop
for J in I .. 999 loop
P := I * J;
if Is_Palindrome(P) and then P > Max_P then
Max_P := P;
end if;
end loop;
end loop;
Put_Line(Integer'Image(Max_P));
end;
|
FiltryGraficzne_Biblioteka/FiltryGraficzne.asm | DawidMyslak/assembler-graphic-filters | 1 | 81978 | <reponame>DawidMyslak/assembler-graphic-filters
; Autor: <NAME>
; grupa 5, sekcja 1
; Temat: Filtry graficzne
; - dolnoprzepustowy
; - gornoprzepustowy
; - krawedziowy
; - konturowy
.486
.model flat, stdcall
.code
FiltryGraficzne proc img: ptr, len: dword, wid: dword, img_dest: ptr, msk: ptr, msk_size: dword
; Deklaracje zmiennych
local sum: word ; zmienna wykorzystana do obliczeia sumy wartosci elementow maski
local r: word ; zmienna wykorzystana do przechowania wartosci skladowej r
local g: word ; zmienna wykorzystana do przechowania wartosci skladowej g
local b: word ; zmienna wykorzystana do przechowania wartosci skladowej b
local center: dword ; zmienna wykorzystana do obliczenia wartosci srodka maski
local i: dword ; zmienna wykorzystana w zagniezdzonych petlach
local j: dword ; zmienna wykorzystana w zagniezdzonych petlach
local im_tmp: dword ; zmienna wykorzystana do zapisu rejestru indeksowego obrazu zrodlowego
local imdst_tmp: dword ; zmienna wykorzystana do zapisu rejestru indeksowego obrazu docelowego
local tmp: dword ; zmienna wykorzystana do obliczen pomocniczych
pushad
; Obliczenie sumy wartosci elementow maski
mov eax, msk_size
mov ebx, msk_size
mul ebx
mov ebx, 2
mul ebx
mov ecx, eax ; ustawienie licznika petli
mov esi, msk ; zapisanie wskaznika pierwszego elementu maski
add ecx, esi ; obliczenie ostatniego elementu tablicy
assume esi:ptr word ; przypisanie rejestrowi indeksowemu rozmiaru zmiennej
xor eax, eax
loop_msk: add ax, [esi]
add esi, 2
cmp ecx, esi
ja loop_msk
mov sum, ax
.if sum == 0
mov sum, 1
.endif
; Filtracja obrazu
mov esi, img ; zapisanie wskaznika obrazu zrodlowego
mov edi, img_dest ; zapisanie wskaznika obrazu docelowego
mov ecx, len ; ustawienie licznika petli
add ecx, esi ; obliczenie ostatniego elementu tablicy
assume esi:ptr byte ; przypisanie rejestrowi indeksowemu rozmiaru zmiennej
mov eax, msk_size
mov ebx, 2
div ebx
mov center, eax ; wyznaczenie srodka maski
; Glowna petla przechodzaca po tablicy bajtow skladowych R, G, B
loop_main: mov r, 0 ; zerowanie skladowych
mov g, 0
mov b, 0
mov im_tmp, esi ; zapamietanie rejestru indeksowego obrazu zrodlowego
mov imdst_tmp, edi ; zapamietanie rejestru indeksowego obrazu docelowego
; Petla przechodzaca po masce
mov i, 0
loop_i: mov j, 0
loop_j: mov edi, msk ; zapisanie wskaznika pierwszego elementu maski
assume edi:ptr word ; przypisanie rejestrowi indeksowemu rozmiaru zmiennej
; Obliczenie nowego indeksu obrazu zrodlowego
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov eax, i
sub eax, center
mov ebx, 3
mul ebx
mov tmp, eax
mov eax, j
sub eax, center
mov ebx, wid
mul ebx
mov ebx, 3
mul ebx
add eax, tmp
mov tmp, esi
add esi, eax
; Realizacja zawijania
.if esi >= ecx
sub esi, len
.elseif esi < img
add esi, len
.endif
; Obliczenie nowego indeksu maski
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov eax, i
mov ebx, msk_size
mul ebx
add eax, j
mov ebx, 2
mul ebx
add edi, eax
; Sumowanie wartosci skladowych R, G, B
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov ax, [edi]
mov bl, [esi]
mul bx
add b, ax
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov ax, [edi]
mov bl, [esi + 1]
mul bx
add g, ax
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov ax, [edi]
mov bl, [esi + 2]
mul bx
add r, ax
; Przywrocenie wartosci rejestrow indeksowemu
mov esi, im_tmp ; przepisanie indeksu aktualnego elementu obrazu zrodlowego
; Realizacja zagniezdzonych petli
inc j
mov edx, j
cmp edx, msk_size ; porownanie z ostatnim elementem
jne loop_j
inc i
mov edx, i
cmp edx, msk_size
jne loop_i ; porownanie z ostatnim elementem
; Podzielenie wartosci R, G oraz B przez sume
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov ax, b
mov bx, sum
div bx
mov b, ax
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov ax, g
mov bx, sum
div bx
mov g, ax
xor eax, eax ; zerowanie rejestrow
xor ebx, ebx
xor edx, edx
mov ax, r
mov bx, sum
div bx
mov r, ax
; Przywrocenie wartosci rejestrow indeksowemu
mov edi, imdst_tmp ; przepisanie indeksu aktualnego elementu obazu docelowego
assume edi:ptr byte ; przypisanie rejestrowi indeksowemu rozmiaru zmiennej
; Ustawienie wartosci dla skladowej B i kontrola zakresu
xor eax, eax
mov ax, b
.if ax >= 32768
mov [edi], 0
.elseif ax > 255
mov [edi], 255
.else
mov [edi], al
.endif
; Ustawienie wartosci dla skladowej G i kontrola zakresu
xor eax, eax
mov ax, g
.if ax >= 32768
mov [edi + 1], 0
.elseif ax > 255
mov [edi + 1], 255
.else
mov [edi + 1], al
.endif
; Ustawienie wartosci dla skladowej R i kontrola zakresu
xor eax, eax
mov ax, r
.if ax >= 32768
mov [edi + 2], 0
.elseif ax > 255
mov [edi + 2], 255
.else
mov [edi + 2], al
.endif
; Realizacja glownej petli
add esi, 3 ; przesuniecie o 3 bajty
add edi, 3 ; przesuniecie o 3 bajty
cmp ecx, esi ; porownanie z ostatnim elementem
ja loop_main
popad
ret
FiltryGraficzne endp
end |
Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_17568_1066.asm | ljhsiun2/medusa | 9 | 10632 | <filename>Transynther/x86/_processed/NONE/_zr_/i7-8650U_0xd2.log_17568_1066.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0xf85c, %r12
nop
nop
nop
xor $16992, %r13
movb $0x61, (%r12)
nop
nop
cmp $8771, %rcx
lea addresses_D_ht+0x18a3c, %rsi
lea addresses_WT_ht+0xa39c, %rdi
xor $62856, %r10
mov $115, %rcx
rep movsl
nop
nop
inc %r13
lea addresses_WC_ht+0x9ea0, %rsi
lea addresses_WT_ht+0x585c, %rdi
nop
nop
nop
nop
nop
inc %r9
mov $72, %rcx
rep movsq
dec %rsi
lea addresses_A_ht+0x5f5c, %r9
nop
xor %r12, %r12
mov $0x6162636465666768, %r10
movq %r10, (%r9)
nop
sub $43685, %rsi
lea addresses_UC_ht+0x1285c, %r13
nop
nop
nop
nop
sub $63873, %rsi
mov $0x6162636465666768, %rdi
movq %rdi, (%r13)
nop
nop
nop
nop
cmp $38125, %rdi
lea addresses_WT_ht+0x7818, %rsi
lea addresses_A_ht+0x215c, %rdi
clflush (%rdi)
nop
nop
nop
inc %rbp
mov $116, %rcx
rep movsq
nop
nop
nop
nop
nop
add $50909, %r12
lea addresses_WC_ht+0x1d55a, %rsi
lea addresses_WT_ht+0x2a2c, %rdi
dec %r12
mov $39, %rcx
rep movsq
nop
nop
nop
nop
nop
and $30605, %r10
lea addresses_WT_ht+0x945c, %rsi
lea addresses_UC_ht+0x1be5c, %rdi
nop
nop
and $19764, %rbp
mov $32, %rcx
rep movsl
inc %r12
lea addresses_A_ht+0x1ed5c, %r12
nop
nop
add $57598, %rsi
mov (%r12), %r13d
nop
nop
nop
nop
sub %r12, %r12
lea addresses_WC_ht+0x8f7c, %rsi
lea addresses_A_ht+0x166fe, %rdi
inc %r13
mov $100, %rcx
rep movsb
nop
nop
nop
nop
nop
dec %r9
lea addresses_UC_ht+0x1d80, %rbp
nop
and $48824, %r9
mov $0x6162636465666768, %r12
movq %r12, %xmm4
vmovups %ymm4, (%rbp)
nop
nop
dec %r10
lea addresses_normal_ht+0x2a5c, %r9
nop
nop
inc %r13
movw $0x6162, (%r9)
nop
nop
nop
inc %rbp
lea addresses_A_ht+0xa6d8, %r12
and %rbp, %rbp
mov $0x6162636465666768, %rdi
movq %rdi, %xmm1
vmovups %ymm1, (%r12)
nop
add %r12, %r12
lea addresses_UC_ht+0x1419c, %r13
nop
nop
nop
nop
nop
xor %r9, %r9
movb $0x61, (%r13)
nop
nop
nop
nop
cmp $42601, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r8
push %rax
push %rdi
push %rdx
push %rsi
// Load
lea addresses_normal+0x12c5c, %r13
inc %rsi
vmovups (%r13), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $0, %xmm0, %r8
nop
dec %rdx
// Store
lea addresses_normal+0x715c, %rdi
nop
xor $18923, %r15
movw $0x5152, (%rdi)
xor $13777, %r8
// Faulty Load
lea addresses_WC+0x1185c, %rax
cmp $42799, %r13
movb (%rax), %r15b
lea oracles, %r8
and $0xff, %r15
shlq $12, %r15
mov (%r8,%r15,1), %r15
pop %rsi
pop %rdx
pop %rdi
pop %rax
pop %r8
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 2, 'AVXalign': True, 'NT': False, 'congruent': 7, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': True, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'00': 17568}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
thirdparty/adasdl/thin/adasdl/AdaSDL_mixer/playmus.adb | Lucretia/old_nehe_ada95 | 0 | 29308 |
--
-- PLAYMUS: Port to the Ada programming language of a test application for the
-- the SDL mixer library.
--
-- The original code was written in C by <NAME> http://www.libsdl.org.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
--
-- Ada code written by:
-- <NAME> --
-- Ponta Delgada - Azores - Portugal --
-- E-mail: <EMAIL> --
-- http://www.adapower.net/~avargas --
with System.OS_Interface;
with Interfaces.C;
with Ada.Text_IO; use Ada.Text_IO;
with Ada.Command_Line;
with Ada.Characters.Handling;
with Ada.Strings.Unbounded;
with GNAT.OS_Lib;
with Lib_C;
with SDL.Timer;
with SDL.Types; use SDL.Types;
with SDL.Audio;
with SDL.Quit;
with SDL_Mixer;
with PlayMus_Sprogs;
use PlayMus_Sprogs;
procedure PlayMus is
package C renames Interfaces.C;
use type C.int;
package CL renames Ada.Command_Line;
package US renames Ada.Strings.Unbounded;
package CH renames Ada.Characters.Handling;
package A renames SDL.Audio;
use type A.Format_Flag;
package T renames SDL.Timer;
package Mix renames SDL_Mixer;
use type Mix.Music_ptr;
argv0 : US.Unbounded_String;
-- ======================================
procedure Usage (argv0 : US.Unbounded_String) is
begin
Put_Line ("Usage: " & US.To_String (argv0)
& " [-i] [-l] [-8] [-r rate] [-b buffers] [-s] <musicfile>");
end Usage;
-- ======================================
procedure Menu is
buf : Character;
begin
Put_Line ("Available commands: (p)ause (r)esume (h)alt > ");
Get_Immediate (buf);
Put_Line ("buf is: " & buf);
case buf is
when 'p' | 'P' => Mix.PauseMusic;
when 'r' | 'R' => Mix.ResumeMusic;
when 'h' | 'H' => Mix.HaltMusic;
when others => null;
end case;
Put ("Music playing: ");
if Mix.PlayingMusic /= 0 then
Put ("yes");
else
Put ("no");
end if;
Put (" Paused: ");
if Mix.PausedMusic /= 0 then
Put_Line ("yes");
else
Put_Line ("no");
end if;
end Menu;
-- ======================================
audio_rate : C.int;
audio_format : A.Format_Flag;
audio_channels : C.int;
audio_buffers : C.int;
looping : C.int := 0;
interactive : Boolean := False;
i : Integer;
begin
-- Initialize variables
audio_rate := 22050;
audio_format := A.AUDIO_S16;
audio_channels := 2;
audio_buffers := 4096;
-- Check command line usage
i := 1;
while (i <= CL.Argument_Count)
and then (CL.Argument (i) (1) = '-') loop
if CL.Argument (i) = "-r"
and then CL.Argument_Count >= i + 1
and then CH.Is_Digit (CL.Argument (i + 1) (1)) then
i := i + 1;
declare
package int_IO is new Ada.Text_IO.Integer_IO (C.int);
use int_IO;
last : Positive;
begin
Get (CL.Argument (i), audio_rate, last);
end;
elsif CL.Argument (i) = "-b"
and then CL.Argument_Count >= i + 1
and then CH.Is_Digit (CL.Argument (i + 1) (1)) then
i := i + 1;
declare
package int_IO is new Ada.Text_IO.Integer_IO (C.int);
use int_IO;
last : Positive;
begin
Get (CL.Argument (i), audio_buffers, last);
end;
elsif CL.Argument (i) = "-m" then
audio_channels := 1;
elsif CL.Argument (i) = "-l" then
looping := -1;
elsif CL.Argument (i) = "-i" then
interactive := True;
elsif CL.Argument (i) = "-8" then
audio_format := A.AUDIO_U8;
else
Usage (US.To_Unbounded_String (CL.Command_Name));
GNAT.OS_Lib.OS_Exit (1);
end if;
i := i + 1;
end loop;
if CL.Argument_Count < i then
Usage (US.To_Unbounded_String (CL.Command_Name));
GNAT.OS_Lib.OS_Exit (1);
end if;
-- Initialize the SDL library
if SDL.Init (SDL.INIT_AUDIO) < 0 then
Put_Line ("Couldn't initialize SDL: " & Mix.Get_Error);
GNAT.OS_Lib.OS_Exit (255);
end if;
SDL.Quit.atexit (CleanUp'Access);
Lib_C.Set_Signal (System.OS_Interface.SIGINT, the_exit'Access);
Lib_C.Set_Signal (System.OS_Interface.SIGTERM, the_exit'Access);
-- Open the audio device
if Mix.OpenAudio (audio_rate, audio_format, audio_channels, audio_buffers) < 0 then
Put_Line ("Couldn't open audio: " & Mix.Get_Error);
GNAT.OS_Lib.OS_Exit (2);
else
Mix.Query_Spec (audio_rate, audio_format, audio_channels);
Put ("Opened audio at " & C.int'Image (audio_rate)
& " Hz " & A.Format_Flag'Image (audio_format and 16#FF#) & " bit ");
if audio_channels > 1 then
Put ("stereo, ");
else
Put ("mono, ");
end if;
Put_Line (C.int'Image (audio_buffers) & " bytes audio buffer");
end if;
audio_open := True;
-- Set the external music player, if any
Mix.Set_Music_CMD (GNAT.OS_Lib.Getenv ("MUSIC_CMD").all);
-- Load the requested music file
music := Mix.Load_MUS (CL.Argument (i));
if music = Mix.null_Music_ptr then
Put_Line ("Couldn't load " & CL.Argument (i) & ": " & Mix.Get_Error);
GNAT.OS_Lib.OS_Exit (2);
end if;
-- Play and then exit
Mix.FadeInMusic (music, looping, 4000);
while Mix.PlayingMusic /= 0 or Mix.PausedMusic /= 0 loop
if interactive then
Menu;
else
T.SDL_Delay (100);
end if;
end loop;
GNAT.OS_Lib.OS_Exit (0);
end PlayMus;
|
oeis/243/A243947.asm | neoneye/loda-programs | 11 | 244276 | ; A243947: Expansion of g.f. sqrt( (1+x - sqrt(1-18*x+x^2)) / (10*x*(1-18*x+x^2)) ).
; Submitted by <NAME>(w2)
; 1,11,155,2365,37555,610897,10098997,168894355,2849270515,48395044705,826479148001,14177519463191,244109912494525,4216385987238575,73024851218517275,1267712063327871245,22052786911315216595,384321597582115655825,6708530714274563938225,117270262614202848879575,2052644619954737156884745,35970909598135887577883395,631036592481365058029791775,11081099007112864941101000825,194760558097636551610299506525,3425926198640025959661962059727,60309582031189511469291562275647
mov $1,1
mov $2,1
mov $3,$0
add $3,1
add $3,$0
mov $4,1
lpb $3
mul $1,$3
sub $3,1
mul $1,$3
sub $3,1
add $5,$4
div $1,$5
mul $2,5
add $2,$1
add $4,2
lpe
mov $0,$2
|
programs/oeis/024/A024892.asm | neoneye/loda | 22 | 84669 | ; A024892: Numbers k such that 3*k+1 is prime.
; 2,4,6,10,12,14,20,22,24,26,32,34,36,42,46,50,52,54,60,64,66,70,74,76,80,90,92,94,102,104,110,112,116,122,124,126,132,136,140,144,146,152,154,162,166,174,180,182,190,192,200,202,204,206,210,214,220,224,230,236,242,244,246,250,252,256,262,270,274,276,284,286,292,294,302,306,312,322,330,332,336,340,344,346,350,354,356,362,364,372,374,376,384,390,400,404,410,412,416,426
add $0,1
seq $0,123365 ; Values of k such that A046530(k) = (k+2)/3, where A046530(k) is the number of distinct residues of cubes mod k.
div $0,6
mul $0,2
|
courses/fundamentals_of_ada/labs/radar/030_basic_types/util/radar_internals.adb | AdaCore/training_material | 15 | 16057 | with Ada.Text_IO; use Ada.Text_IO;
package body Radar_Internals is
T : Natural := 0;
procedure Time_Step (Radar_Angle : Float; Time_To_Arrival : Float;
John_Connor_Status : String)
is
E_T_A_H : Integer
:= Integer (Float'Floor (Time_To_Arrival / 3600.0));
E_T_A_M : Integer
:= Integer (Float'Floor (Time_To_Arrival / 60.0)) mod 60;
E_T_A_S : Integer
:= Integer (Float'Rounding (Time_To_Arrival)) mod 60;
begin
Put_Line ("T =" & Natural'Image(T)
& " "
& "ETA"
& Integer'Image (E_T_A_H) & "h"
& Integer'Image (E_T_A_M) & "m"
& Integer'Image (E_T_A_S) & "s"
& " "
& "<NAME> is " & John_Connor_Status);
T := T + 1;
end Time_Step;
end Radar_Internals;
|
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_1820.asm | ljhsiun2/medusa | 9 | 82644 | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r8
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x10150, %rbp
xor %r12, %r12
mov (%rbp), %eax
nop
nop
nop
nop
nop
xor $58905, %rax
lea addresses_A_ht+0xc350, %rsi
lea addresses_A_ht+0x4a58, %rdi
nop
nop
nop
nop
nop
sub %rdx, %rdx
mov $114, %rcx
rep movsb
add $15900, %rsi
lea addresses_WC_ht+0xb950, %rdx
nop
nop
nop
nop
nop
xor $12220, %r12
movb $0x61, (%rdx)
cmp %rdi, %rdi
lea addresses_A_ht+0x12b30, %rsi
lea addresses_WC_ht+0x56d0, %rdi
nop
nop
add %r8, %r8
mov $24, %rcx
rep movsl
xor %rbp, %rbp
lea addresses_UC_ht+0x1e1d0, %rbp
nop
nop
nop
nop
nop
cmp %rsi, %rsi
movl $0x61626364, (%rbp)
nop
nop
nop
xor %rbp, %rbp
lea addresses_normal_ht+0x18150, %rsi
nop
nop
nop
nop
nop
sub $7957, %rcx
movups (%rsi), %xmm1
vpextrq $1, %xmm1, %r12
nop
nop
cmp %rbp, %rbp
lea addresses_WT_ht+0x19fd0, %rsi
lea addresses_D_ht+0xb7d0, %rdi
add %rax, %rax
mov $18, %rcx
rep movsb
nop
nop
nop
dec %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r8
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %r15
push %r8
push %r9
push %rax
// Store
lea addresses_D+0x105c8, %r13
clflush (%r13)
xor %r8, %r8
mov $0x5152535455565758, %r11
movq %r11, %xmm2
vmovups %ymm2, (%r13)
// Exception!!!
mov (0), %r8
nop
inc %r13
// Store
lea addresses_WT+0x15850, %r13
nop
nop
nop
nop
nop
sub %r10, %r10
mov $0x5152535455565758, %r11
movq %r11, %xmm3
movups %xmm3, (%r13)
nop
nop
nop
nop
sub %r8, %r8
// Store
lea addresses_WT+0xd950, %r9
nop
nop
nop
nop
inc %r8
mov $0x5152535455565758, %r11
movq %r11, (%r9)
// Exception!!!
nop
nop
mov (0), %r9
nop
nop
nop
sub $23517, %r15
// Load
mov $0x5cef840000000350, %r8
nop
add %r13, %r13
vmovups (%r8), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $1, %xmm3, %rax
nop
nop
nop
nop
cmp %r15, %r15
// Store
lea addresses_PSE+0x5c50, %r9
nop
nop
nop
nop
inc %r13
mov $0x5152535455565758, %rax
movq %rax, %xmm5
vmovaps %ymm5, (%r9)
nop
nop
nop
nop
xor %rax, %rax
// Store
lea addresses_A+0x1aee8, %r10
dec %r9
mov $0x5152535455565758, %r15
movq %r15, %xmm5
vmovups %ymm5, (%r10)
nop
nop
cmp %r9, %r9
// Load
mov $0xcc4, %r9
xor %r13, %r13
movups (%r9), %xmm3
vpextrq $0, %xmm3, %r10
nop
nop
nop
inc %r13
// Store
lea addresses_WC+0xbd50, %r8
nop
nop
nop
xor $2673, %r11
movl $0x51525354, (%r8)
nop
xor $12114, %r11
// Store
lea addresses_normal+0x19950, %r9
nop
xor $57437, %rax
movw $0x5152, (%r9)
nop
nop
nop
cmp %r8, %r8
// Faulty Load
lea addresses_PSE+0xfd50, %r15
add $28115, %r9
mov (%r15), %rax
lea oracles, %r10
and $0xff, %rax
shlq $12, %rax
mov (%r10,%rax,1), %rax
pop %rax
pop %r9
pop %r8
pop %r15
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_PSE', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_D', 'congruent': 2}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_WT', 'congruent': 7}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': True, 'AVXalign': True, 'size': 8, 'type': 'addresses_WT', 'congruent': 10}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_NC', 'congruent': 9}}
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 32, 'type': 'addresses_PSE', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_A', 'congruent': 3}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_P', 'congruent': 1}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_WC', 'congruent': 11}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 2, 'type': 'addresses_normal', 'congruent': 10}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_PSE', 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_normal_ht', 'congruent': 3}}
{'dst': {'same': False, 'congruent': 2, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 1, 'type': 'addresses_WC_ht', 'congruent': 9}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 7, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_A_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_UC_ht', 'congruent': 7}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_normal_ht', 'congruent': 7}}
{'dst': {'same': False, 'congruent': 7, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'src': {'same': True, 'congruent': 6, 'type': 'addresses_WT_ht'}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
ada-python-test/obj/b__ada_module.ads | kylelk/ada-examples | 1 | 10821 | <filename>ada-python-test/obj/b__ada_module.ads
pragma Ada_95;
with System;
package ada_modulemain is
pragma Warnings (Off);
procedure ada_moduleinit;
pragma Export (C, ada_moduleinit, "ada_moduleinit");
procedure ada_modulefinal;
pragma Export (C, ada_modulefinal, "ada_modulefinal");
type Version_32 is mod 2 ** 32;
u00001 : constant Version_32 := 16#0a12e1a3#;
pragma Export (C, u00001, "ada_moduleB");
u00002 : constant Version_32 := 16#dc6c5ee8#;
pragma Export (C, u00002, "ada_moduleS");
-- BEGIN ELABORATION ORDER
-- ada%s
-- interfaces%s
-- system%s
-- system.case_util%s
-- system.case_util%b
-- system.htable%s
-- system.img_int%s
-- system.img_int%b
-- system.parameters%s
-- system.parameters%b
-- system.crtl%s
-- interfaces.c_streams%s
-- interfaces.c_streams%b
-- system.standard_library%s
-- system.exceptions_debug%s
-- system.exceptions_debug%b
-- system.storage_elements%s
-- system.storage_elements%b
-- system.stack_checking%s
-- system.stack_checking%b
-- system.string_hash%s
-- system.string_hash%b
-- system.htable%b
-- system.strings%s
-- system.strings%b
-- system.os_lib%s
-- system.traceback_entries%s
-- system.traceback_entries%b
-- ada.exceptions%s
-- system.soft_links%s
-- system.unsigned_types%s
-- system.val_llu%s
-- system.val_util%s
-- system.val_util%b
-- system.val_llu%b
-- system.wch_con%s
-- system.wch_con%b
-- system.wch_cnv%s
-- system.wch_jis%s
-- system.wch_jis%b
-- system.wch_cnv%b
-- system.wch_stw%s
-- system.wch_stw%b
-- ada.exceptions.last_chance_handler%s
-- ada.exceptions.last_chance_handler%b
-- system.exception_table%s
-- system.exception_table%b
-- ada.io_exceptions%s
-- ada.tags%s
-- ada.streams%s
-- ada.streams%b
-- interfaces.c%s
-- system.exceptions%s
-- system.exceptions%b
-- system.exceptions.machine%s
-- system.file_control_block%s
-- system.file_io%s
-- system.finalization_root%s
-- system.finalization_root%b
-- ada.finalization%s
-- ada.finalization%b
-- system.memory%s
-- system.memory%b
-- system.standard_library%b
-- system.secondary_stack%s
-- system.file_io%b
-- interfaces.c%b
-- ada.tags%b
-- system.soft_links%b
-- system.os_lib%b
-- system.secondary_stack%b
-- system.traceback%s
-- ada.exceptions%b
-- system.traceback%b
-- ada.text_io%s
-- ada.text_io%b
-- ada_module%s
-- ada_module%b
-- END ELABORATION ORDER
end ada_modulemain;
|
src/sets/finite/hlevel.agda | pcapriotti/agda-base | 20 | 13321 | <reponame>pcapriotti/agda-base
{-# OPTIONS --without-K #-}
module sets.finite.level where
open import sum
open import function.isomorphism.core
open import hott.level.core
open import hott.level.closure
open import hott.level.sets
open import sets.finite.core
finite-h2 : ∀ {i}{A : Set i} → IsFinite A → h 2 A
finite-h2 (n , fA) = iso-level (sym≅ fA) (fin-set n)
|
t_pageflt-v1.1.x86-32.asm | pageflt/r2wars-2018 | 0 | 13376 | ; r2wars 2018
; <NAME> (@t_pageflt)
mov eax, 0xc3c3c3c3
mov ebx, eax
mov ecx, eax
mov edx, eax
mov edi, 32
mov ebp, 0x3fc
mov edx, 1014
mov esp, edx
mov esi, 1015
mov [esi], 0x7ffc3960
mov [esi+4], 0xffd489fb
mov [esi+8], 0xe6
jmp esi
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1267.asm | ljhsiun2/medusa | 9 | 161617 | <filename>Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_1267.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %rcx
lea addresses_normal_ht+0xa470, %r10
nop
nop
xor $15897, %r12
vmovups (%r10), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $0, %xmm5, %rcx
nop
nop
nop
nop
nop
and $43742, %r13
pop %rcx
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r14
push %r8
push %rbx
push %rcx
// Faulty Load
lea addresses_normal+0x7870, %r11
nop
nop
add %rbx, %rbx
mov (%r11), %rcx
lea oracles, %rbx
and $0xff, %rcx
shlq $12, %rcx
mov (%rbx,%rcx,1), %rcx
pop %rcx
pop %rbx
pop %r8
pop %r14
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 32, 'AVXalign': True}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_normal', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': True, 'congruent': 10, 'NT': False, 'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
HITs/PropositionalTruncation/Properties.agda | oisdk/agda-playground | 6 | 10374 | <filename>HITs/PropositionalTruncation/Properties.agda
{-# OPTIONS --cubical --safe --postfix-projections #-}
module HITs.PropositionalTruncation.Properties where
open import HITs.PropositionalTruncation
open import Prelude
open import Data.Empty.Properties using (isProp⊥)
refute-trunc : ¬ A → ¬ ∥ A ∥
refute-trunc = rec isProp⊥
recompute : Dec A → ∥ A ∥ → A
recompute (yes p) _ = p
recompute (no ¬p) p = ⊥-elim (rec isProp⊥ ¬p p)
open import HITs.PropositionalTruncation.Sugar
bij-iso : A ↔ B → ∥ A ∥ ⇔ ∥ B ∥
bij-iso A↔B .fun = _∥$∥_ (A↔B .fun)
bij-iso A↔B .inv = _∥$∥_ (A↔B .inv)
bij-iso A↔B .rightInv x = squash _ x
bij-iso A↔B .leftInv x = squash _ x
bij-eq : A ↔ B → ∥ A ∥ ≡ ∥ B ∥
bij-eq = isoToPath ∘ bij-iso
|
Project-Einstein/src/E-Assembly/src/LCDlinha.nasm | FelixLuciano/Elements-of-Computing-Systems | 0 | 100131 | ; Arquivo: LCDQuadrado.nasm
; Curso: Elementos de Sistemas
; Criado por: <NAME>
; Data: 28/3/2018
;
; Desenhe uma linha no LCD
leaw $65535, %A
movw %A, %D
leaw $18224, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18225, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18226, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18227, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18228, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18229, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18230, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18231, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18232, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18233, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18234, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18235, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18236, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18237, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18238, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18239, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18240, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18241, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18242, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18243, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18244, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18245, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18246, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18247, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18248, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18249, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18250, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18251, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18252, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18253, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18254, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18255, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18256, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18257, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18258, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18259, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18260, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18261, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18262, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18263, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18264, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18265, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18266, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18267, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18268, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18269, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18270, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18271, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18272, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18273, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18274, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18275, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18276, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18277, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18278, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18279, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18280, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18281, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18282, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18283, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18284, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18285, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18286, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18287, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18288, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18289, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18290, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18291, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18292, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18293, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18294, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18295, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18296, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18297, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18298, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18299, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18300, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18301, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18302, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18303, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18304, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18305, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18306, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18307, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18308, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18309, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18310, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18311, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18312, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18313, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18314, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18315, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18316, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18317, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18318, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18319, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18320, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18321, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18322, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18323, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18324, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18325, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18326, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18327, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18328, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18329, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18330, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18331, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18332, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18333, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18334, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18335, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18336, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18337, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18338, %A
movw %D, (%A)
leaw $131070, %A
movw %A, %D
leaw $18339, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18340, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18341, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18342, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18343, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18344, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18345, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18346, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18347, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18348, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18349, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18350, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18351, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18352, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18353, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18354, %A
movw %D, (%A)
leaw $65535, %A
movw %A, %D
leaw $18355, %A
movw %D, (%A)
|
Transynther/x86/_processed/US/_st_sm_/i7-7700_9_0x48_notsx.log_1_1243.asm | ljhsiun2/medusa | 9 | 12504 | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %rax
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0xb63d, %rbp
nop
nop
nop
nop
sub %rax, %rax
mov (%rbp), %dx
nop
add $54839, %rax
lea addresses_D_ht+0xcb9b, %r10
nop
nop
nop
nop
and %rdi, %rdi
movl $0x61626364, (%r10)
nop
nop
nop
nop
cmp $2267, %rax
lea addresses_WT_ht+0x10b5b, %rsi
lea addresses_UC_ht+0x1eb75, %rdi
and %r11, %r11
mov $26, %rcx
rep movsb
nop
and %rsi, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r15
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
// Store
lea addresses_WC+0x439b, %rax
nop
cmp $3796, %rsi
mov $0x5152535455565758, %rdi
movq %rdi, (%rax)
nop
nop
xor %rbp, %rbp
// Load
lea addresses_UC+0x14e01, %r15
nop
nop
cmp $53814, %rbx
mov (%r15), %ax
cmp %rdi, %rdi
// Store
lea addresses_normal+0x192eb, %r15
nop
add $53808, %rbx
mov $0x5152535455565758, %rax
movq %rax, (%r15)
nop
nop
nop
dec %rax
// Store
lea addresses_D+0x1f601, %rbx
nop
inc %rax
mov $0x5152535455565758, %rdi
movq %rdi, %xmm2
vmovups %ymm2, (%rbx)
nop
nop
nop
nop
cmp $1938, %rdi
// Store
lea addresses_US+0x1769b, %rbp
clflush (%rbp)
nop
cmp %rsi, %rsi
mov $0x5152535455565758, %r15
movq %r15, (%rbp)
nop
nop
nop
cmp $32744, %rbx
// Store
lea addresses_A+0x1144d, %rbp
nop
nop
xor $7740, %rax
movw $0x5152, (%rbp)
and %rsi, %rsi
// Store
lea addresses_RW+0x1b15b, %r15
nop
nop
sub %rax, %rax
mov $0x5152535455565758, %rbx
movq %rbx, %xmm6
movups %xmm6, (%r15)
nop
nop
nop
cmp $18775, %r15
// Store
lea addresses_WT+0x2fcb, %rsi
clflush (%rsi)
nop
nop
nop
nop
cmp $22969, %rcx
mov $0x5152535455565758, %rdi
movq %rdi, %xmm1
vmovups %ymm1, (%rsi)
nop
nop
nop
add $27224, %rbx
// Store
lea addresses_D+0xf4b, %rax
and %rcx, %rcx
mov $0x5152535455565758, %r15
movq %r15, %xmm3
vmovups %ymm3, (%rax)
add $58021, %rbp
// Store
lea addresses_normal+0x1389b, %r15
clflush (%r15)
nop
nop
nop
nop
nop
xor %rbx, %rbx
mov $0x5152535455565758, %rax
movq %rax, %xmm7
movups %xmm7, (%r15)
nop
nop
nop
sub %rbp, %rbp
// Store
lea addresses_US+0x1f39b, %rdi
nop
nop
nop
nop
nop
xor %rcx, %rcx
movw $0x5152, (%rdi)
sub %rdi, %rdi
// Store
lea addresses_US+0x1ab9b, %rdi
nop
nop
dec %rbp
movl $0x51525354, (%rdi)
nop
sub $57199, %rsi
// Faulty Load
lea addresses_US+0x1f39b, %rbp
nop
cmp %rdi, %rdi
mov (%rbp), %si
lea oracles, %rbp
and $0xff, %rsi
shlq $12, %rsi
mov (%rbp,%rsi,1), %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r15
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_US', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_WC', 'congruent': 9}, 'OP': 'STOR'}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_UC', 'congruent': 1}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_normal', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_D', 'congruent': 0}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_US', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_A', 'congruent': 1}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_RW', 'congruent': 5}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_WT', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_D', 'congruent': 3}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_normal', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': True, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_US', 'congruent': 0}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_US', 'congruent': 9}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_US', 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_A_ht', 'congruent': 1}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_D_ht', 'congruent': 11}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 1, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 5, 'type': 'addresses_WT_ht'}}
{'52': 1}
52
*/
|
include/sched_h.ads | docandrew/troodon | 5 | 2915 | pragma Ada_2012;
pragma Style_Checks (Off);
with Interfaces.C; use Interfaces.C;
with bits_types_h;
limited with bits_types_struct_sched_param_h;
limited with bits_types_struct_timespec_h;
with stddef_h;
limited with bits_cpu_set_h;
package sched_h is
-- unsupported macro: sched_priority sched_priority
-- unsupported macro: CPU_SETSIZE __CPU_SETSIZE
-- arg-macro: procedure CPU_SET (cpu, cpusetp)
-- __CPU_SET_S (cpu, sizeof (cpu_set_t), cpusetp)
-- arg-macro: procedure CPU_CLR (cpu, cpusetp)
-- __CPU_CLR_S (cpu, sizeof (cpu_set_t), cpusetp)
-- arg-macro: procedure CPU_ISSET (cpu, cpusetp)
-- __CPU_ISSET_S (cpu, sizeof (cpu_set_t), cpusetp)
-- arg-macro: procedure CPU_ZERO (cpusetp)
-- __CPU_ZERO_S (sizeof (cpu_set_t), cpusetp)
-- arg-macro: procedure CPU_COUNT (cpusetp)
-- __CPU_COUNT_S (sizeof (cpu_set_t), cpusetp)
-- arg-macro: procedure CPU_SET_S (cpu, setsize, cpusetp)
-- __CPU_SET_S (cpu, setsize, cpusetp)
-- arg-macro: procedure CPU_CLR_S (cpu, setsize, cpusetp)
-- __CPU_CLR_S (cpu, setsize, cpusetp)
-- arg-macro: procedure CPU_ISSET_S (cpu, setsize, cpusetp)
-- __CPU_ISSET_S (cpu, setsize, cpusetp)
-- arg-macro: procedure CPU_ZERO_S (setsize, cpusetp)
-- __CPU_ZERO_S (setsize, cpusetp)
-- arg-macro: procedure CPU_COUNT_S (setsize, cpusetp)
-- __CPU_COUNT_S (setsize, cpusetp)
-- arg-macro: procedure CPU_EQUAL (cpusetp1, cpusetp2)
-- __CPU_EQUAL_S (sizeof (cpu_set_t), cpusetp1, cpusetp2)
-- arg-macro: procedure CPU_EQUAL_S (setsize, cpusetp1, cpusetp2)
-- __CPU_EQUAL_S (setsize, cpusetp1, cpusetp2)
-- arg-macro: procedure CPU_AND (destset, srcset1, srcset2)
-- __CPU_OP_S (sizeof (cpu_set_t), destset, srcset1, srcset2, and)
-- arg-macro: procedure CPU_OR (destset, srcset1, srcset2)
-- __CPU_OP_S (sizeof (cpu_set_t), destset, srcset1, srcset2, or)
-- arg-macro: procedure CPU_XOR (destset, srcset1, srcset2)
-- __CPU_OP_S (sizeof (cpu_set_t), destset, srcset1, srcset2, xor)
-- arg-macro: procedure CPU_AND_S (setsize, destset, srcset1, srcset2)
-- __CPU_OP_S (setsize, destset, srcset1, srcset2, and)
-- arg-macro: procedure CPU_OR_S (setsize, destset, srcset1, srcset2)
-- __CPU_OP_S (setsize, destset, srcset1, srcset2, or)
-- arg-macro: procedure CPU_XOR_S (setsize, destset, srcset1, srcset2)
-- __CPU_OP_S (setsize, destset, srcset1, srcset2, xor)
-- arg-macro: procedure CPU_ALLOC_SIZE (count)
-- __CPU_ALLOC_SIZE (count)
-- arg-macro: procedure CPU_ALLOC (count)
-- __CPU_ALLOC (count)
-- arg-macro: procedure CPU_FREE (cpuset)
-- __CPU_FREE (cpuset)
-- Definitions for POSIX 1003.1b-1993 (aka POSIX.4) scheduling interface.
-- Copyright (C) 1996-2021 Free Software Foundation, Inc.
-- This file is part of the GNU C Library.
-- The GNU C Library is free software; you can redistribute it and/or
-- modify it under the terms of the GNU Lesser General Public
-- License as published by the Free Software Foundation; either
-- version 2.1 of the License, or (at your option) any later version.
-- The GNU C Library is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- Lesser General Public License for more details.
-- You should have received a copy of the GNU Lesser General Public
-- License along with the GNU C Library; if not, see
-- <https://www.gnu.org/licenses/>.
-- Get type definitions.
-- Get system specific constant and data structure definitions.
-- Backward compatibility.
-- Set scheduling parameters for a process.
function sched_setparam (uu_pid : bits_types_h.uu_pid_t; uu_param : access constant bits_types_struct_sched_param_h.sched_param) return int -- /usr/include/sched.h:54
with Import => True,
Convention => C,
External_Name => "sched_setparam";
-- Retrieve scheduling parameters for a particular process.
function sched_getparam (uu_pid : bits_types_h.uu_pid_t; uu_param : access bits_types_struct_sched_param_h.sched_param) return int -- /usr/include/sched.h:58
with Import => True,
Convention => C,
External_Name => "sched_getparam";
-- Set scheduling algorithm and/or parameters for a process.
function sched_setscheduler
(uu_pid : bits_types_h.uu_pid_t;
uu_policy : int;
uu_param : access constant bits_types_struct_sched_param_h.sched_param) return int -- /usr/include/sched.h:61
with Import => True,
Convention => C,
External_Name => "sched_setscheduler";
-- Retrieve scheduling algorithm for a particular purpose.
function sched_getscheduler (uu_pid : bits_types_h.uu_pid_t) return int -- /usr/include/sched.h:65
with Import => True,
Convention => C,
External_Name => "sched_getscheduler";
-- Yield the processor.
function sched_yield return int -- /usr/include/sched.h:68
with Import => True,
Convention => C,
External_Name => "sched_yield";
-- Get maximum priority value for a scheduler.
function sched_get_priority_max (uu_algorithm : int) return int -- /usr/include/sched.h:71
with Import => True,
Convention => C,
External_Name => "sched_get_priority_max";
-- Get minimum priority value for a scheduler.
function sched_get_priority_min (uu_algorithm : int) return int -- /usr/include/sched.h:74
with Import => True,
Convention => C,
External_Name => "sched_get_priority_min";
-- Get the SCHED_RR interval for the named process.
function sched_rr_get_interval (uu_pid : bits_types_h.uu_pid_t; uu_t : access bits_types_struct_timespec_h.timespec) return int -- /usr/include/sched.h:77
with Import => True,
Convention => C,
External_Name => "sched_rr_get_interval";
-- Access macros for `cpu_set'.
-- Set the CPU affinity for a task
function sched_setaffinity
(uu_pid : bits_types_h.uu_pid_t;
uu_cpusetsize : stddef_h.size_t;
uu_cpuset : access constant bits_cpu_set_h.cpu_set_t) return int -- /usr/include/sched.h:121
with Import => True,
Convention => C,
External_Name => "sched_setaffinity";
-- Get the CPU affinity for a task
function sched_getaffinity
(uu_pid : bits_types_h.uu_pid_t;
uu_cpusetsize : stddef_h.size_t;
uu_cpuset : access bits_cpu_set_h.cpu_set_t) return int -- /usr/include/sched.h:125
with Import => True,
Convention => C,
External_Name => "sched_getaffinity";
end sched_h;
|
oeis/062/A062838.asm | neoneye/loda-programs | 11 | 86415 | <reponame>neoneye/loda-programs<gh_stars>10-100
; A062838: Cubes of squarefree numbers.
; Submitted by <NAME>(s1)
; 1,8,27,125,216,343,1000,1331,2197,2744,3375,4913,6859,9261,10648,12167,17576,24389,27000,29791,35937,39304,42875,50653,54872,59319,68921,74088,79507,97336,103823,132651,148877,166375,185193,195112,205379,226981,238328,274625,287496,300763,328509,343000,357911,389017,405224,456533,474552,493039,551368,571787,614125,636056,658503,704969,753571,804357,830584,857375,912673,1030301,1061208,1092727,1157625,1191016,1225043,1295029,1331000,1367631,1442897,1481544,1520875,1643032,1685159,1815848,1860867
seq $0,5117 ; Squarefree numbers: numbers that are not divisible by a square greater than 1.
pow $0,3
|
P6/data_P6_2/ALUTest136.asm | alxzzhou/BUAA_CO_2020 | 1 | 96881 | srl $0,$3,4
nor $1,$4,$3
srl $4,$4,7
xor $6,$6,$3
lw $5,12($0)
addu $3,$5,$3
lb $3,11($0)
xori $1,$5,46242
srlv $4,$3,$3
addiu $1,$6,-28248
sra $3,$3,9
sw $4,8($0)
lh $3,4($0)
sll $3,$4,25
addiu $5,$5,4415
subu $0,$5,$3
lh $5,12($0)
srav $5,$1,$3
addu $4,$3,$3
addu $3,$4,$3
lhu $3,6($0)
sltiu $4,$5,-17349
sra $0,$5,4
ori $0,$6,35094
nor $0,$3,$3
or $4,$4,$3
sllv $0,$5,$3
slt $1,$1,$3
sltu $5,$4,$3
lw $2,16($0)
and $3,$3,$3
slt $3,$0,$3
lh $5,4($0)
srav $1,$4,$3
lb $6,4($0)
srav $5,$3,$3
addu $1,$2,$3
lbu $3,1($0)
lw $4,4($0)
addu $4,$3,$3
subu $3,$3,$3
lb $1,1($0)
lh $4,4($0)
xor $4,$3,$3
addiu $6,$3,23632
subu $4,$3,$3
lh $1,16($0)
addu $3,$1,$3
sltu $3,$4,$3
or $1,$3,$3
sh $4,16($0)
addu $3,$4,$3
or $0,$3,$3
addiu $4,$4,5545
lb $4,9($0)
sltu $1,$1,$3
andi $3,$3,50193
sw $4,4($0)
nor $5,$5,$3
lw $6,0($0)
addu $6,$1,$3
lh $3,0($0)
sltiu $3,$5,22737
xori $5,$4,45633
subu $6,$6,$3
lw $4,12($0)
sw $3,4($0)
lh $6,8($0)
or $4,$5,$3
slt $4,$1,$3
xor $0,$6,$3
sltu $6,$6,$3
lw $3,0($0)
srav $4,$4,$3
slt $3,$3,$3
sra $4,$4,21
addiu $3,$4,6176
xori $3,$4,25448
srlv $3,$3,$3
sltu $1,$0,$3
ori $5,$6,2565
sllv $3,$4,$3
sllv $5,$1,$3
srav $3,$1,$3
or $3,$4,$3
lb $4,4($0)
sb $5,15($0)
sw $1,12($0)
sw $1,0($0)
addu $3,$2,$3
slti $3,$4,-15995
sh $4,14($0)
sll $3,$3,5
lbu $3,14($0)
srl $0,$4,17
sllv $0,$5,$3
sh $3,14($0)
xor $1,$4,$3
srl $3,$5,25
sltiu $3,$3,17580
sb $4,1($0)
lw $6,16($0)
xori $0,$0,46115
andi $4,$4,50655
sltiu $3,$4,20589
ori $3,$4,10268
sra $5,$2,31
sllv $0,$0,$3
slti $1,$3,27670
subu $6,$5,$3
srav $1,$4,$3
lbu $5,10($0)
ori $5,$3,12898
or $4,$4,$3
srlv $4,$3,$3
sll $5,$6,24
srl $3,$4,28
lh $0,10($0)
srav $1,$0,$3
srav $3,$0,$3
xori $0,$0,9888
sra $3,$4,16
xor $4,$4,$3
addu $0,$3,$3
slt $5,$3,$3
and $4,$4,$3
andi $3,$1,27817
srl $3,$1,23
lbu $6,2($0)
xori $5,$4,23783
sra $6,$5,18
sra $4,$3,13
sltu $3,$1,$3
andi $3,$1,58367
srlv $3,$3,$3
slt $4,$3,$3
ori $3,$3,8827
addu $3,$3,$3
sra $5,$1,13
subu $3,$2,$3
subu $4,$2,$3
lw $3,8($0)
lw $4,8($0)
addu $0,$0,$3
subu $4,$0,$3
lh $3,8($0)
sh $0,6($0)
subu $4,$4,$3
srl $3,$3,6
nor $4,$5,$3
lb $5,8($0)
sh $6,4($0)
sll $5,$4,5
ori $0,$0,7652
addu $3,$5,$3
srav $3,$3,$3
subu $3,$3,$3
sra $3,$3,31
addu $6,$4,$3
lw $3,12($0)
srav $4,$4,$3
srav $3,$5,$3
addu $1,$0,$3
nor $4,$0,$3
subu $4,$4,$3
lb $6,5($0)
andi $1,$5,59677
sra $5,$5,17
subu $3,$4,$3
xor $4,$3,$3
subu $5,$0,$3
lbu $6,13($0)
andi $5,$3,55952
sw $3,16($0)
subu $5,$1,$3
andi $4,$0,64552
sll $0,$0,9
nor $3,$3,$3
sllv $1,$3,$3
slti $5,$5,13782
sllv $0,$5,$3
xor $3,$5,$3
lh $5,0($0)
addu $5,$3,$3
and $4,$3,$3
andi $3,$1,18533
xori $0,$2,14340
subu $3,$1,$3
subu $4,$4,$3
addiu $3,$1,-19648
sllv $0,$6,$3
slti $4,$4,-11537
slt $5,$4,$3
sw $1,12($0)
lb $3,1($0)
addiu $0,$1,13119
or $4,$4,$3
sb $4,4($0)
ori $1,$4,706
sh $3,6($0)
sllv $0,$2,$3
sllv $4,$4,$3
srlv $3,$3,$3
srav $3,$4,$3
sltu $5,$1,$3
sb $4,5($0)
addu $5,$1,$3
or $1,$5,$3
addu $0,$4,$3
lw $5,8($0)
xori $5,$4,2778
lw $4,0($0)
lb $3,10($0)
slti $5,$5,3689
srlv $1,$4,$3
lh $3,8($0)
srl $3,$1,11
sb $1,3($0)
addiu $5,$5,1675
andi $5,$3,35539
addu $5,$3,$3
and $5,$3,$3
lhu $5,4($0)
andi $3,$4,2650
lh $4,4($0)
srlv $4,$4,$3
slti $1,$5,18593
xori $3,$3,5108
slti $1,$1,12681
or $4,$4,$3
sb $4,0($0)
lh $3,6($0)
addiu $1,$1,-25410
subu $1,$3,$3
subu $6,$0,$3
sw $0,0($0)
sw $4,8($0)
subu $6,$0,$3
addiu $3,$1,-12828
sw $5,16($0)
and $4,$4,$3
slt $1,$3,$3
slti $3,$1,-15125
slt $1,$1,$3
and $4,$0,$3
subu $4,$3,$3
sb $3,7($0)
lb $5,16($0)
sltiu $4,$4,31733
xor $4,$5,$3
srl $0,$4,19
sll $3,$3,30
slt $5,$5,$3
addu $3,$4,$3
sll $3,$3,26
addiu $4,$3,-5800
lbu $6,5($0)
sra $4,$4,26
lb $3,1($0)
subu $3,$3,$3
or $4,$3,$3
nor $3,$5,$3
addiu $5,$4,6328
addiu $1,$4,6199
sltiu $5,$0,-29009
srav $6,$5,$3
srl $5,$5,8
lh $4,16($0)
srav $5,$3,$3
sra $3,$5,19
addu $4,$6,$3
sll $0,$0,18
slti $0,$1,-739
addiu $6,$3,-7499
sll $1,$6,27
sra $3,$3,20
and $4,$4,$3
lhu $3,6($0)
lw $1,4($0)
subu $3,$3,$3
or $3,$1,$3
subu $6,$3,$3
ori $1,$1,54859
srl $3,$4,17
sh $0,4($0)
sltu $4,$6,$3
sh $3,12($0)
lw $5,4($0)
addu $5,$5,$3
lh $1,16($0)
lb $6,2($0)
xori $4,$4,57739
addu $3,$3,$3
ori $4,$1,1878
nor $6,$4,$3
slti $5,$0,11073
and $3,$3,$3
sllv $3,$3,$3
sh $4,4($0)
sltiu $5,$3,-4952
or $5,$5,$3
slti $1,$5,3273
subu $5,$5,$3
addiu $4,$5,24297
srl $4,$4,12
sll $1,$1,17
xori $0,$3,39544
addiu $3,$3,7336
sw $3,16($0)
sh $1,14($0)
nor $0,$4,$3
sh $5,0($0)
xori $3,$3,55072
sb $4,5($0)
sw $3,4($0)
andi $0,$0,2393
srlv $4,$4,$3
srl $4,$0,12
ori $4,$4,59990
sltu $5,$0,$3
sll $0,$1,30
sltiu $3,$1,-32046
addiu $3,$4,-31246
xor $6,$6,$3
slt $3,$3,$3
and $3,$3,$3
or $5,$4,$3
sw $4,0($0)
addu $5,$3,$3
addiu $3,$3,-7412
andi $3,$3,9814
addiu $4,$3,-1355
ori $3,$4,46709
subu $3,$3,$3
addu $6,$3,$3
andi $3,$1,23875
srlv $4,$3,$3
addu $3,$3,$3
addiu $0,$3,-23702
sb $5,13($0)
subu $1,$3,$3
lw $3,16($0)
sll $0,$1,19
lbu $4,11($0)
xori $4,$5,44196
subu $0,$1,$3
sra $3,$3,8
sll $3,$2,8
xor $4,$4,$3
nor $3,$3,$3
lw $3,12($0)
slti $1,$5,-9910
srl $0,$1,3
srav $6,$6,$3
sll $1,$3,8
ori $3,$3,57614
lw $4,16($0)
lbu $5,4($0)
sw $0,8($0)
addu $3,$0,$3
xor $4,$1,$3
sra $5,$5,23
nor $4,$4,$3
sltu $3,$0,$3
addiu $3,$5,-4369
subu $4,$3,$3
lhu $3,16($0)
addiu $0,$2,32192
slt $6,$1,$3
sh $3,8($0)
sll $6,$6,5
addiu $3,$1,26282
slt $5,$0,$3
xor $1,$3,$3
nor $5,$6,$3
addiu $4,$4,32593
lbu $3,12($0)
sh $6,0($0)
ori $4,$4,5434
ori $3,$1,5041
lh $3,12($0)
sltiu $5,$5,-14427
xori $0,$3,62664
addiu $3,$3,280
addu $6,$6,$3
sll $3,$0,29
xori $4,$3,8293
lbu $1,6($0)
ori $1,$3,17153
ori $3,$3,19862
addu $3,$6,$3
sllv $5,$3,$3
sltiu $0,$0,16436
sb $6,3($0)
addiu $4,$5,22678
ori $4,$0,48733
addiu $3,$3,-30381
slt $1,$4,$3
ori $0,$1,43562
ori $4,$6,64296
addiu $5,$1,-20276
lh $5,10($0)
subu $3,$4,$3
lhu $0,12($0)
srl $4,$1,16
sllv $3,$4,$3
lb $4,8($0)
sll $4,$1,8
sllv $3,$4,$3
sb $0,13($0)
sltiu $4,$1,-4370
xori $1,$6,4309
sb $6,16($0)
or $6,$1,$3
sltiu $4,$0,-2074
lw $4,12($0)
xor $6,$1,$3
xor $5,$3,$3
xor $5,$5,$3
addiu $3,$1,27634
addu $4,$4,$3
or $1,$4,$3
srav $0,$0,$3
lb $3,3($0)
nor $3,$5,$3
addu $1,$1,$3
subu $3,$3,$3
addiu $3,$3,-29729
sll $6,$6,8
lw $3,8($0)
srav $3,$6,$3
and $1,$1,$3
addu $3,$3,$3
addu $3,$3,$3
subu $4,$6,$3
srl $4,$3,28
lbu $3,12($0)
lb $4,14($0)
andi $1,$5,16114
slt $4,$1,$3
lhu $3,4($0)
lw $1,16($0)
srav $4,$1,$3
addiu $4,$0,-3615
srav $0,$3,$3
addu $4,$4,$3
slti $3,$3,25350
lh $5,16($0)
lw $4,0($0)
nor $5,$1,$3
or $6,$6,$3
sltiu $4,$1,-6764
lw $1,16($0)
srav $0,$3,$3
sll $5,$5,21
lb $3,12($0)
or $4,$0,$3
or $4,$3,$3
sra $3,$3,21
lbu $3,6($0)
sltu $1,$1,$3
nor $6,$5,$3
andi $6,$3,44428
ori $4,$4,52705
sltiu $1,$2,12749
sb $3,5($0)
sltiu $3,$4,-20634
lh $6,14($0)
and $1,$1,$3
lb $6,6($0)
srlv $1,$3,$3
sb $0,2($0)
lhu $1,4($0)
lhu $4,10($0)
and $3,$0,$3
addu $1,$4,$3
or $4,$4,$3
lbu $4,3($0)
lw $1,16($0)
lb $0,5($0)
addu $4,$6,$3
lh $5,14($0)
lb $1,12($0)
sw $4,16($0)
sll $6,$5,2
and $0,$3,$3
sw $6,4($0)
addiu $0,$0,-8667
sllv $3,$3,$3
xori $3,$4,20257
ori $4,$0,30115
addu $4,$3,$3
addiu $5,$5,24233
srav $5,$5,$3
and $1,$5,$3
sllv $6,$4,$3
subu $4,$4,$3
ori $3,$0,29799
sltiu $4,$6,23332
xor $0,$0,$3
sll $3,$3,23
addu $4,$3,$3
addu $3,$3,$3
addu $3,$3,$3
slt $1,$3,$3
lbu $3,9($0)
lb $1,1($0)
lh $6,0($0)
sh $1,0($0)
sltiu $6,$3,-25077
sltu $3,$2,$3
addu $4,$1,$3
addiu $5,$3,-23259
lh $3,2($0)
addiu $6,$5,-11143
slti $1,$1,22892
sll $3,$3,1
addu $4,$3,$3
nor $5,$5,$3
addu $0,$3,$3
sltu $1,$5,$3
sb $3,12($0)
sb $3,1($0)
lb $3,11($0)
lw $0,12($0)
sw $4,12($0)
xori $0,$3,35834
srlv $3,$3,$3
sltu $1,$5,$3
slt $0,$3,$3
lb $3,15($0)
subu $3,$3,$3
sll $5,$1,8
lw $1,0($0)
lh $3,0($0)
addiu $6,$0,-31721
sll $5,$1,4
addiu $3,$2,-15606
slti $5,$4,-17357
addiu $3,$4,-27704
andi $5,$4,9763
lhu $6,2($0)
lw $4,4($0)
slt $4,$3,$3
addu $3,$3,$3
sb $3,14($0)
sltiu $3,$5,18120
slt $3,$4,$3
nor $5,$5,$3
srav $4,$6,$3
lhu $5,2($0)
addiu $4,$0,17128
lb $3,1($0)
lw $4,0($0)
sltu $6,$4,$3
subu $6,$6,$3
lw $4,4($0)
xor $5,$1,$3
lh $3,0($0)
or $1,$1,$3
lhu $5,12($0)
and $1,$0,$3
sw $1,12($0)
sh $4,16($0)
addu $1,$3,$3
lb $6,2($0)
lw $3,8($0)
srl $5,$5,31
srl $3,$3,25
lbu $3,4($0)
xor $3,$1,$3
or $5,$5,$3
sltiu $3,$4,28125
addiu $4,$1,-8125
addiu $5,$2,2451
sh $3,0($0)
sb $0,15($0)
sh $4,2($0)
and $3,$0,$3
xori $1,$1,34926
lbu $1,5($0)
lbu $4,15($0)
xor $5,$5,$3
srl $3,$3,23
or $3,$1,$3
and $1,$4,$3
sll $4,$4,29
slt $3,$3,$3
sltu $5,$3,$3
or $5,$6,$3
slti $1,$1,-29375
lh $5,14($0)
sb $4,2($0)
slt $4,$1,$3
slt $5,$5,$3
lw $4,8($0)
subu $1,$2,$3
addiu $4,$3,-15200
addiu $3,$6,15874
xori $1,$3,50087
andi $1,$6,62103
lw $4,4($0)
slt $5,$4,$3
addiu $1,$1,27018
sllv $3,$1,$3
slt $3,$3,$3
addiu $5,$5,29850
nor $2,$2,$3
sh $3,14($0)
slti $4,$4,-1656
srlv $4,$3,$3
sra $4,$3,31
lb $3,13($0)
ori $3,$5,61696
sltu $6,$6,$3
and $3,$3,$3
sltu $1,$3,$3
sll $5,$6,27
or $5,$2,$3
sw $1,16($0)
subu $3,$3,$3
sb $6,4($0)
subu $4,$5,$3
lh $4,10($0)
srav $4,$6,$3
srav $0,$1,$3
lh $6,8($0)
sllv $3,$1,$3
addu $3,$0,$3
sllv $3,$1,$3
ori $1,$1,62696
slt $3,$3,$3
lh $3,0($0)
lh $4,2($0)
sw $1,16($0)
sll $1,$1,21
sllv $5,$5,$3
addiu $5,$5,22948
sw $3,12($0)
subu $0,$4,$3
andi $6,$6,39261
addu $5,$4,$3
srlv $3,$1,$3
lw $4,4($0)
sltu $0,$4,$3
or $1,$4,$3
nor $1,$1,$3
addu $4,$3,$3
addu $1,$1,$3
sw $5,12($0)
andi $5,$1,22959
sltu $5,$1,$3
addiu $4,$5,-17673
xor $4,$1,$3
addiu $1,$1,-15307
srlv $6,$3,$3
subu $3,$1,$3
lh $4,14($0)
sllv $3,$3,$3
lbu $4,14($0)
subu $1,$3,$3
lb $3,10($0)
and $0,$3,$3
sllv $4,$4,$3
addiu $6,$3,15022
ori $3,$1,7841
sra $5,$0,2
ori $1,$0,38676
addiu $6,$4,28260
sw $5,16($0)
srl $6,$3,31
srav $3,$3,$3
xor $6,$3,$3
addiu $1,$1,9486
addu $0,$5,$3
lh $6,8($0)
lhu $3,0($0)
slti $3,$3,9030
sh $5,14($0)
sw $4,8($0)
xor $4,$4,$3
lh $3,4($0)
sll $1,$3,2
andi $3,$3,35507
sh $5,14($0)
srav $1,$3,$3
xori $5,$3,57366
srav $1,$5,$3
sh $1,12($0)
sltiu $6,$1,26969
lw $4,0($0)
and $4,$6,$3
addu $1,$1,$3
sltu $0,$3,$3
srl $3,$0,14
lw $4,8($0)
lw $4,0($0)
slti $4,$3,-25762
lhu $4,16($0)
lh $6,16($0)
ori $4,$4,34899
and $1,$3,$3
addiu $0,$4,-15066
xori $5,$3,10329
lw $3,12($0)
addu $3,$3,$3
addiu $5,$6,-5010
sra $5,$1,31
nor $5,$5,$3
addu $4,$4,$3
sllv $1,$1,$3
sw $3,4($0)
ori $0,$5,20534
andi $1,$5,21361
addu $6,$4,$3
addiu $4,$1,-9852
lhu $5,2($0)
sra $3,$0,20
subu $1,$5,$3
sb $6,15($0)
sltiu $3,$1,11433
slt $4,$0,$3
slti $3,$3,30177
slti $1,$1,-31978
or $3,$4,$3
sra $4,$3,28
lb $3,2($0)
sw $4,8($0)
nor $0,$3,$3
srlv $0,$0,$3
lb $4,11($0)
addu $1,$5,$3
lh $3,10($0)
subu $6,$6,$3
addu $3,$0,$3
lbu $4,8($0)
slt $5,$3,$3
sb $4,1($0)
lbu $0,14($0)
sltu $4,$4,$3
srlv $0,$4,$3
and $4,$5,$3
lbu $5,14($0)
srlv $3,$1,$3
srl $4,$4,5
ori $5,$5,4811
lb $0,7($0)
sll $3,$0,16
ori $1,$1,14260
addu $3,$4,$3
sltiu $3,$2,12058
sw $3,16($0)
srlv $4,$2,$3
subu $6,$6,$3
srl $5,$3,25
subu $0,$0,$3
subu $6,$0,$3
sltiu $4,$4,8934
sw $5,4($0)
addu $6,$3,$3
slti $5,$0,-11704
and $3,$3,$3
subu $6,$6,$3
xori $1,$1,43851
srl $4,$4,26
sh $5,6($0)
sb $3,8($0)
lw $5,4($0)
nor $0,$3,$3
lb $6,13($0)
ori $0,$3,5699
lw $1,12($0)
srlv $3,$3,$3
lh $4,8($0)
slti $4,$0,-31617
lh $4,12($0)
addiu $3,$3,2881
addiu $3,$3,20528
and $3,$4,$3
xori $3,$1,7925
andi $3,$1,13343
lb $5,11($0)
sw $1,8($0)
slti $4,$3,8281
lbu $5,1($0)
addu $3,$3,$3
ori $5,$3,3690
sb $4,4($0)
sltiu $4,$3,-8663
srlv $6,$6,$3
and $5,$5,$3
addu $4,$3,$3
lh $1,6($0)
lb $4,12($0)
sh $0,2($0)
slt $3,$0,$3
ori $3,$3,34289
sw $1,12($0)
slt $3,$5,$3
subu $4,$3,$3
xor $3,$1,$3
lbu $5,3($0)
lw $4,8($0)
sltu $5,$0,$3
subu $5,$1,$3
srlv $1,$3,$3
sw $0,0($0)
slti $6,$6,-5342
srlv $4,$3,$3
addiu $3,$3,114
lbu $4,12($0)
sra $5,$1,27
and $4,$1,$3
srav $1,$3,$3
sltu $4,$3,$3
sw $6,0($0)
and $4,$5,$3
lh $4,14($0)
slt $3,$2,$3
sra $3,$3,16
xori $1,$3,17184
lh $5,12($0)
srl $5,$4,13
sw $4,12($0)
sb $5,16($0)
sw $4,0($0)
sh $3,10($0)
lh $4,16($0)
srl $3,$4,19
srav $3,$5,$3
srlv $4,$5,$3
ori $6,$6,34767
sw $3,8($0)
addu $1,$3,$3
slti $5,$3,-31838
addu $4,$1,$3
subu $3,$5,$3
addu $3,$3,$3
addu $1,$1,$3
lw $3,4($0)
addiu $2,$2,10342
sltu $3,$5,$3
addu $4,$3,$3
lh $3,10($0)
subu $1,$5,$3
sb $0,14($0)
slt $5,$6,$3
sb $4,2($0)
slt $4,$3,$3
lbu $3,12($0)
sra $1,$3,13
addu $3,$3,$3
and $1,$4,$3
addu $1,$0,$3
subu $5,$3,$3
addu $3,$5,$3
slt $0,$0,$3
addiu $0,$0,-26980
lbu $3,1($0)
lb $0,12($0)
lh $3,12($0)
subu $3,$1,$3
lhu $2,6($0)
addiu $3,$3,998
addu $4,$3,$3
subu $6,$4,$3
nor $3,$4,$3
addiu $3,$4,-17174
slt $0,$0,$3
lh $4,8($0)
addu $4,$1,$3
sll $3,$3,8
sll $3,$3,27
sh $1,0($0)
srl $3,$3,27
sw $4,4($0)
or $3,$6,$3
subu $4,$1,$3
or $4,$4,$3
srlv $3,$5,$3
andi $5,$5,11726
sltiu $5,$5,-3637
lb $6,1($0)
subu $6,$3,$3
addu $6,$4,$3
sw $3,8($0)
addu $3,$3,$3
lb $3,2($0)
|
programs/oeis/102/A102680.asm | neoneye/loda | 22 | 245029 | <filename>programs/oeis/102/A102680.asm
; A102680: Number of digits >= 7 in the decimal representations of all integers from 0 to n.
; 0,0,0,0,0,0,0,1,2,3,3,3,3,3,3,3,3,4,5,6,6,6,6,6,6,6,6,7,8,9,9,9,9,9,9,9,9,10,11,12,12,12,12,12,12,12,12,13,14,15,15,15,15,15,15,15,15,16,17,18,18,18,18,18,18,18,18,19,20,21,22,23,24,25,26,27,28,30,32,34,35,36,37,38,39,40,41,43,45,47,48,49,50,51,52,53,54,56,58,60
lpb $0
mov $2,$0
sub $0,1
seq $2,102679 ; Number of digits >= 7 in decimal representation of n.
add $1,$2
lpe
mov $0,$1
|
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca_notsx.log_21829_909.asm | ljhsiun2/medusa | 9 | 21602 | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r14
push %r15
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_UC_ht+0x130a5, %rsi
lea addresses_A_ht+0x1a8b5, %rdi
dec %r11
mov $45, %rcx
rep movsw
and $58235, %r15
lea addresses_A_ht+0x1b5a5, %r10
clflush (%r10)
nop
nop
and %r14, %r14
movl $0x61626364, (%r10)
nop
nop
nop
nop
nop
dec %rcx
lea addresses_WC_ht+0xe0e5, %rcx
nop
nop
nop
nop
nop
inc %r11
movl $0x61626364, (%rcx)
nop
nop
and $16678, %r14
lea addresses_A_ht+0x1dcc5, %rsi
lea addresses_normal_ht+0x2d5d, %rdi
nop
nop
nop
sub %rdx, %rdx
mov $85, %rcx
rep movsb
nop
nop
inc %r11
lea addresses_D_ht+0x7da5, %rsi
lea addresses_WT_ht+0x1a25, %rdi
clflush (%rdi)
sub %rdx, %rdx
mov $101, %rcx
rep movsw
nop
nop
xor $50180, %r15
lea addresses_normal_ht+0x14f05, %rdi
nop
nop
nop
cmp %rsi, %rsi
mov (%rdi), %rcx
nop
nop
nop
add %r11, %r11
lea addresses_D_ht+0x185f5, %rsi
lea addresses_D_ht+0x14da5, %rdi
nop
nop
nop
cmp $54830, %r11
mov $19, %rcx
rep movsl
nop
add %rsi, %rsi
lea addresses_D_ht+0x3055, %r14
nop
nop
nop
nop
and $33006, %r11
mov (%r14), %r10d
nop
nop
add %r11, %r11
lea addresses_D_ht+0xf7a5, %r14
nop
nop
sub %rcx, %rcx
mov (%r14), %r10w
nop
nop
nop
nop
nop
cmp %r11, %r11
lea addresses_normal_ht+0x9525, %r15
nop
add $64809, %rsi
movb $0x61, (%r15)
nop
nop
nop
xor %rdi, %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r15
pop %r14
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r9
push %rbp
push %rdx
// Faulty Load
lea addresses_WT+0xc5a5, %r15
xor %r9, %r9
mov (%r15), %bp
lea oracles, %rdx
and $0xff, %rbp
shlq $12, %rbp
mov (%rdx,%rbp,1), %rbp
pop %rdx
pop %rbp
pop %r9
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': False, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0, 'same': True, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 5, 'same': True, 'type': 'addresses_UC_ht'}, 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11, 'same': True, 'type': 'addresses_A_ht'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 6, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'}
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_A_ht'}, 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM'}
{'src': {'congruent': 10, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM'}
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 8, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 5, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'STOR'}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
|
list/filterList.applescript | adriannier/applescript-functions | 7 | 4590 | <reponame>adriannier/applescript-functions<filename>list/filterList.applescript
log filterList({"Alpha", "Bravo", "Charlie"}, "Alpha")
log filterList({"Alpha", "Bravo", "Charlie"}, "*l*")
log filterList({"Alpha", "Bravo", "Charlie"}, "b*")
log filterList({"Alpha", "Bravo", "Charlie"}, "*e")
log filterList({"Alpha", "Bravo", "Charlie"}, "A*a")
log filterList({"DeltaEchoFoxtrott", "Echo", "FoxtrottEcho", "EchoFoxtrott", "DeEcFox"}, "*Ec*Fo*")
log filterList({"Hello*World", "Hello**World"}, "*\\*\\**")
log "=========================== Testing negation"
log filterList({"Alpha", "Bravo", "Charlie"}, "!Alpha")
log filterList({"Alpha", "Bravo", "Charlie"}, "!*l*")
log filterList({"Alpha", "Bravo", "Charlie"}, "!b*")
log filterList({"Alpha", "Bravo", "Charlie"}, "!*e")
log filterList({"Alpha", "Bravo", "Charlie"}, "!A*a")
log filterList({"DeltaEchoFoxtrott", "Echo", "FoxtrottEcho", "EchoFoxtrott", "DeEcFox"}, "!*Ec*Fo*")
log filterList({"Hello*World", "Hello**World"}, "!*\\*\\**")
log "=========================== Testing multiple filters"
log filterList({"Alpha", "Bravo", "Charlie"}, {"!Alpha", "B*"})
log filterList({"Alpha", "Bravo", "Charlie"}, {"*a*", "*ie"})
log "=========================== Real world test"
log filterList({"ldns-1.8.1.tar.gz.sha256", "ldns-1.8.1.tar.gz.sha1", "ldns-1.8.1.tar.gz.asc", "ldns-1.8.1.tar.gz"}, {"ldns-*.tar.gz", "!ldns-snap*"})
on filterList(lst, filter)
(* Filters a list by using the provided filter(s). *)
-- Valid filter strings:
-- "pattern": is pattern
-- "*pattern*": contains pattern
-- "pattern*": starts with pattern
-- "*pattern": ends with pattern
-- "pattern1*pattern2": starts with pattern 1 and ends with pattern 2
-- "*pattern1*pattern2*": contains pattern 1 and pattern 2, pattern 2 must follow pattern 1
-- Negate filter string by prefixing with !: "!*pattern"
-- Escape regular asterisks using backslash: \\*
-- Filter can be a list of multiple filter strings
try
-- Special case: Empty list
if lst is {} then return {}
-- Handling multiple filters
if class of filter is list then
set buffer to lst
repeat with i from 1 to count of filter
if buffer is {} then exit repeat
set buffer to filterList(buffer, item i of filter)
end repeat
return buffer
end if
-- Check for negation
if filter is "!" then
error "Invalid filter"
else if filter starts with "!" then
set filter to text 2 thru -1 of filter
set filterNegation to true
else
set filterNegation to false
end if
-- Protect escaped asterisks
set prvDlmt to text item delimiters
set text item delimiters to "\\*"
set filter to text items of filter
set text item delimiters to "{{{PROTECTED_ASTERISK}}}"
set filter to filter as text
set text item delimiters to prvDlmt
-- Special case: only asterisk
if filter is "*" then
if filterNegation then
return {}
else
return lst
end if
end if
-- Determine filter type and filter string(s)
if filter starts with "*" and filter ends with "*" then
set filterType to "contains"
try
set filter to text 2 thru -2 of filter
on error
error "Invalid filter"
end try
else if filter starts with "*" then
set filterType to "ends"
try
set filter to text 2 thru -1 of filter
on error
error "Invalid filter"
end try
else if filter ends with "*" then
set filterType to "starts"
try
set filter to text 1 thru -2 of filter
on error
error "Invalid filter"
end try
else
set filterType to "is"
end if
-- Determine additional filter type
set additionalFilterType to false
if filter contains "*" then
set additionalFilterType to "surrounded"
set prvDlmt to text item delimiters
set text item delimiters to "*"
try
if (count of text items in filter) is greater than 2 then
error 1
end if
set filter2 to text item 2 of filter
set filter to text item 1 of filter
on error
set filter to false
end try
set text item delimiters to prvDlmt
if filter is false then
error "Invalid filter; this function does not support more than one asterisk in the middle"
end if
end if
-- Restore asterisks
set prvDlmt to text item delimiters
set text item delimiters to "{{{PROTECTED_ASTERISK}}}"
set filter to text items of filter
if additionalFilterType is not false then
set filter2 to text items of filter2
end if
set text item delimiters to "*"
set filter to filter as text
if additionalFilterType is not false then
set filter2 to filter2 as text
end if
set text item delimiters to prvDlmt
-- Reset buffer
set buffer to {}
-- Perform filtering
if filterType is "contains" then
if additionalFilterType is false then
if filterNegation then
repeat with i from 1 to count of lst
if item i of lst does not contain filter then set end of buffer to item i of lst
end repeat
else
repeat with i from 1 to count of lst
if item i of lst contains filter then set end of buffer to item i of lst
end repeat
end if
else if additionalFilterType is "surrounded" then
if filterNegation then
repeat with i from 1 to count of lst
set l to length of item i of lst
set offset1 to offset of filter in (item i of lst)
set offset2 to offset of filter2 in (item i of lst)
if offset1 > 1 and offset2 < (l - (length of filter2) + 1) and (offset1 + (length of filter)) < offset2 then
-- Do nothing; using negation
else
set end of buffer to item i of lst
end if
end repeat
else
repeat with i from 1 to count of lst
set l to length of item i of lst
set offset1 to offset of filter in (item i of lst)
set offset2 to offset of filter2 in (item i of lst)
if offset1 > 1 and offset2 < (l - (length of filter2) + 1) and (offset1 + (length of filter)) < offset2 then
set end of buffer to item i of lst
end if
end repeat
end if
end if
else if filterType is "starts" then
if filterNegation then
repeat with i from 1 to count of lst
if item i of lst does not start with filter then set end of buffer to item i of lst
end repeat
else
repeat with i from 1 to count of lst
if item i of lst starts with filter then set end of buffer to item i of lst
end repeat
end if
else if filterType is "ends" then
if filterNegation then
repeat with i from 1 to count of lst
if item i of lst does not end with filter then set end of buffer to item i of lst
end repeat
else
repeat with i from 1 to count of lst
if item i of lst ends with filter then set end of buffer to item i of lst
end repeat
end if
else if filterType is "is" and additionalFilterType is false then
if filterNegation then
repeat with i from 1 to count of lst
if item i of lst is not filter then set end of buffer to item i of lst
end repeat
else
repeat with i from 1 to count of lst
if item i of lst is filter then set end of buffer to item i of lst
end repeat
end if
else if additionalFilterType is "surrounded" then
repeat with i from 1 to count of lst
if item i of lst starts with filter and item i of lst ends with filter2 then
set end of buffer to item i of lst
end if
end repeat
end if
return buffer
on error eMsg number eNum
error "filterList: " & eMsg number eNum
end try
end filterList |
projects/08/FunctionCalls/NestedCall/NestedCall.asm | danibachar/Nand2Tetris | 0 | 26957 | @256
D=A
@SP
M=D
// call function: Sys.init with 0 arguments
@LABEL1
D=A
@SP
A=M
M=D
@SP
M=M+1
@LCL
D=M
@SP
A=M
M=D
@SP
M=M+1
@ARG
D=M
@SP
A=M
M=D
@SP
M=M+1
@THIS
D=M
@SP
A=M
M=D
@SP
M=M+1
@THAT
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
D=M
@5
D=D-A
@0
D=D-A
@ARG
M=D
@SP
D=M
@LCL
M=D
@Sys.init
0;JMP
(LABEL1)
// function: name Sys.init, with 0 local vars
(Sys.init)
// push constant 4000
@4000
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 0
@SP
M=M-1
@SP
A=M
D=M
@THIS
M=D
// push constant 5000
@5000
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 1
@SP
M=M-1
@SP
A=M
D=M
@THAT
M=D
// call function: Sys.main with 0 arguments
@LABEL2
D=A
@SP
A=M
M=D
@SP
M=M+1
@LCL
D=M
@SP
A=M
M=D
@SP
M=M+1
@ARG
D=M
@SP
A=M
M=D
@SP
M=M+1
@THIS
D=M
@SP
A=M
M=D
@SP
M=M+1
@THAT
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
D=M
@5
D=D-A
@0
D=D-A
@ARG
M=D
@SP
D=M
@LCL
M=D
@Sys.main
0;JMP
(LABEL2)
// pop temp 1
@SP
M=M-1
@SP
A=M
D=M
@R6
M=D
// label LOOP
(LOOP)
// goto LOOP
@LOOP
0;JMP
// function: name Sys.main, with 5 local vars
(Sys.main)
// push constant 0
@0
D=A
@SP
A=M
M=D
@SP
M=M+1
// push constant 0
@0
D=A
@SP
A=M
M=D
@SP
M=M+1
// push constant 0
@0
D=A
@SP
A=M
M=D
@SP
M=M+1
// push constant 0
@0
D=A
@SP
A=M
M=D
@SP
M=M+1
// push constant 0
@0
D=A
@SP
A=M
M=D
@SP
M=M+1
// push constant 4001
@4001
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 0
@SP
M=M-1
@SP
A=M
D=M
@THIS
M=D
// push constant 5001
@5001
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 1
@SP
M=M-1
@SP
A=M
D=M
@THAT
M=D
// push constant 200
@200
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop local 1
@SP
M=M-1
@1
D=A
@LCL
D=D+M
@R13
M=D
@SP
A=M
D=M
@R13
A=M
M=D
// push constant 40
@40
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop local 2
@SP
M=M-1
@2
D=A
@LCL
D=D+M
@R13
M=D
@SP
A=M
D=M
@R13
A=M
M=D
// push constant 6
@6
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop local 3
@SP
M=M-1
@3
D=A
@LCL
D=D+M
@R13
M=D
@SP
A=M
D=M
@R13
A=M
M=D
// push constant 123
@123
D=A
@SP
A=M
M=D
@SP
M=M+1
// call function: Sys.add12 with 1 arguments
@LABEL3
D=A
@SP
A=M
M=D
@SP
M=M+1
@LCL
D=M
@SP
A=M
M=D
@SP
M=M+1
@ARG
D=M
@SP
A=M
M=D
@SP
M=M+1
@THIS
D=M
@SP
A=M
M=D
@SP
M=M+1
@THAT
D=M
@SP
A=M
M=D
@SP
M=M+1
@SP
D=M
@5
D=D-A
@1
D=D-A
@ARG
M=D
@SP
D=M
@LCL
M=D
@Sys.add12
0;JMP
(LABEL3)
// pop temp 0
@SP
M=M-1
@SP
A=M
D=M
@R5
M=D
// push local 0
@0
D=A
@LCL
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
// push local 1
@1
D=A
@LCL
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
// push local 2
@2
D=A
@LCL
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
// push local 3
@3
D=A
@LCL
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
// push local 4
@4
D=A
@LCL
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
M=M-1
@SP
A=M
D=M
@SP
M=M-1
@SP
A=M
A=M
D=D+A
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
M=M-1
@SP
A=M
D=M
@SP
M=M-1
@SP
A=M
A=M
D=D+A
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
M=M-1
@SP
A=M
D=M
@SP
M=M-1
@SP
A=M
A=M
D=D+A
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
M=M-1
@SP
A=M
D=M
@SP
M=M-1
@SP
A=M
A=M
D=D+A
@SP
A=M
M=D
@SP
M=M+1
// Return
@LCL
D=M
@FRAME_BCK
M=D
@5
A=D-A
D=M
@RET_LABEL4
M=D
@SP
M=M-1
@0
D=A
@ARG
D=D+M
@R13
M=D
@SP
A=M
D=M
@R13
A=M
M=D
@ARG
D=M
@SP
M=D+1
@FRAME_BCK
AM=M-1
D=M
@THAT
M=D
@FRAME_BCK
AM=M-1
D=M
@THIS
M=D
@FRAME_BCK
AM=M-1
D=M
@ARG
M=D
@FRAME_BCK
AM=M-1
D=M
@LCL
M=D
@RET_LABEL4
A=M
0;JMP
// function: name Sys.add12, with 0 local vars
(Sys.add12)
// push constant 4002
@4002
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 0
@SP
M=M-1
@SP
A=M
D=M
@THIS
M=D
// push constant 5002
@5002
D=A
@SP
A=M
M=D
@SP
M=M+1
// pop pointer 1
@SP
M=M-1
@SP
A=M
D=M
@THAT
M=D
// push argument 0
@0
D=A
@ARG
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
// push constant 12
@12
D=A
@SP
A=M
M=D
@SP
M=M+1
// add
@SP
M=M-1
@SP
A=M
D=M
@SP
M=M-1
@SP
A=M
A=M
D=D+A
@SP
A=M
M=D
@SP
M=M+1
// Return
@LCL
D=M
@FRAME_BCK
M=D
@5
A=D-A
D=M
@RET_LABEL5
M=D
@SP
M=M-1
@0
D=A
@ARG
D=D+M
@R13
M=D
@SP
A=M
D=M
@R13
A=M
M=D
@ARG
D=M
@SP
M=D+1
@FRAME_BCK
AM=M-1
D=M
@THAT
M=D
@FRAME_BCK
AM=M-1
D=M
@THIS
M=D
@FRAME_BCK
AM=M-1
D=M
@ARG
M=D
@FRAME_BCK
AM=M-1
D=M
@LCL
M=D
@RET_LABEL5
A=M
0;JMP
|
LAB 5/signedNumber.asm | Mawlong/Computer-Organization-and-Architecture | 0 | 6846 | <filename>LAB 5/signedNumber.asm
#signed numbers
#refer to unsigned program
.data
.text
.globl main
main:
li $t1, 1
li $t2, 2
slt $t0, $t1, $t2
li $t2, 0xF1000000 #when MSB is F it is -ve
li $t3, 0x00000001
slt $t0, $t3, $t2 # but since slt w/o u therefore signed
li $v0, 10
syscall
|
oeis/173/A173177.asm | neoneye/loda-programs | 11 | 105521 | ; A173177: Numbers k such that 2k+3 is a prime of the form 3*A034936(m) + 4.
; Submitted by <NAME>
; 2,5,8,14,17,20,29,32,35,38,47,50,53,62,68,74,77,80,89,95,98,104,110,113,119,134,137,140,152,155,164,167,173,182,185,188,197,203,209,215,218,227,230,242,248,260,269,272,284,287,299
mov $2,$0
pow $2,2
lpb $2
add $4,6
mov $3,$4
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
mov $1,$0
max $1,0
cmp $1,$0
mul $2,$1
sub $2,1
lpe
mov $0,$4
div $0,2
add $0,2
|
oeis/004/A004996.asm | neoneye/loda-programs | 11 | 160425 | ; A004996: a(n) = 6^n/n! * Product_{k=0..n-1} (6*k - 1).
; Submitted by <NAME>
; 1,-6,-90,-1980,-50490,-1393524,-40412196,-1212365880,-37280250810,-1168114525380,-37146041907084,-1195427166827976,-38851382921909220,-1273129932671794440,-42013287778169216520,-1394841154235217988464,-46552823522600400364986,-1560888788698954600473060,-52549922552864804882593020,-1775634225207326564980248360,-60194000234528370552830419404,-2046596007973964598796234259736,-69770318453657884049871622491000,-2384324795851091167965178055562000,-81663124257899872502807348402998500
mul $0,2
mov $1,1
mov $2,1
mov $3,$0
mov $4,6
lpb $3
mul $1,$2
mul $1,$4
sub $3,2
mov $4,$2
sub $5,1
div $1,$5
sub $2,6
sub $4,$2
lpe
mov $0,$1
|
programs/oeis/061/A061742.asm | neoneye/loda | 22 | 87004 | ; A061742: a(n) is the square of the product of first n primes.
; 1,4,36,900,44100,5336100,901800900,260620460100,94083986096100,49770428644836900,41856930490307832900,40224510201185827416900,55067354465423397733736100,92568222856376731590410384100,171158644061440576710668800200900,378089444731722233953867379643788100
seq $0,2110 ; Primorial numbers (first definition): product of first n primes. Sometimes written prime(n)#.
pow $0,2
|
oeis/018/A018918.asm | neoneye/loda-programs | 11 | 243480 | <reponame>neoneye/loda-programs<gh_stars>10-100
; A018918: Define the generalized Pisot sequence T(a(0),a(1)) by: a(n+2) is the greatest integer such that a(n+2)/a(n+1) < a(n+1)/a(n). This is T(3,6).
; Submitted by <NAME>
; 3,6,11,20,36,64,113,199,350,615,1080,1896,3328,5841,10251,17990,31571,55404,97228,170624,299425,525455,922110,1618191,2839728,4983376,8745216,15346785,26931731,47261894,82938843,145547524,255418100,448227520,786584465,1380359511,2422362078,4250949111,7459895656,13091204280,22973462016,40315615409,70748973083,124155792774,217878227875,382349636060,670976837020,1177482265856,2066337330753,3626169232671,6363483400446,11167134898975,19596955630176,34390259761824,60350698792448,105908093453249
add $0,4
mul $0,2
seq $0,182097 ; Expansion of 1/(1-x^2-x^3).
sub $0,1
|
lib/ti86_crt0.asm | RC2014Z80/z88dk | 8 | 27724 | <filename>lib/ti86_crt0.asm
; Stub for the TI 86 calculator
;
; <NAME> - Dec 2000
;
; $Id: ti86_crt0.asm,v 1.34 2016-07-11 05:58:34 stefano Exp $
;
; startup =
; n - Primary shell(s); compatible shell(s)
; (Primary shell merely means it's the smallest implementation
; for that shell, that uses full capabilities of the shell)
;
; 1 - LASM (default)
; 2 - ASE, Rascal, emanon, etc.
; 3 - zap2000
; 4 - emanon
; 5 - Embedded LargeLd - !!!EXPERIMENTAL!!!
; 10 - asm() executable
;
;-----------------------------------------------------
; Some general PUBLICs and EXTERNs needed by the assembler
;-----------------------------------------------------
MODULE Ti86_crt0
EXTERN _main ; No matter what set up we have, main is
; always, always external to this file.
PUBLIC cleanup ; used by exit()
PUBLIC l_dcal ; used by calculated calls = "call (hl)"
PUBLIC cpygraph ; TI calc specific stuff
PUBLIC tidi ;
PUBLIC tiei ;
;-------------------------
; Begin of (shell) headers
;-------------------------
INCLUDE "Ti86.def" ; ROM / RAM adresses on Ti86
defc crt0 = 1
INCLUDE "zcc_opt.def" ; Receive all compiler-defines
;-----------------------------
;2 - ASE, Rascal, emanon, etc.
;-----------------------------
IF (startup=2)
DEFINE ASE
DEFINE NOT_DEFAULT_SHELL
org _asm_exec_ram-2 ;TI 86 standard asm() entry point.
defb $8e, $28
nop ;identifier of table
jp start
defw $0000 ;version number of table
defw description ;pointer to the description
description:
DEFINE NEED_name
INCLUDE "zcc_opt.def"
UNDEFINE NEED_name
IF !DEFINED_NEED_name
defm "Z88DK Small C+ Program"
ENDIF
defb $0 ; Termination zero
ENDIF
;-----------
;3 - zap2000
;-----------
IF (startup=3)
DEFINE ZAP2000
DEFINE NOT_DEFAULT_SHELL
org _asm_exec_ram-2
defb $8e, $28
nop
jp start
defw description
defw icon
description:
DEFINE NEED_name
INCLUDE "zcc_opt.def"
UNDEFINE NEED_name
IF !DEFINED_NEED_name
defm "Z88DK Small C+ Program"
ENDIF
defb $0 ; Termination zero
icon:
DEFINE NEED_icon
INCLUDE "zcc_opt.def"
UNDEFINE NEED_icon
IF !DEFINED_NEED_icon
defb @00000000 ; 8x8 icon
defb @00110010 ; C with a small '+'
defb @01000111
defb @01000010
defb @01000000
defb @00110000
defb @00000000
defb @00000000
ENDIF
ENDIF
;----------
;4 - emanon
;----------
IF (startup=4)
DEFINE EMANON
DEFINE NOT_DEFAULT_SHELL
org _asm_exec_ram-2 ;TI 86 standard asm() entry point.
defb $8e, $28
nop ;identifier of table
jp start
defw $0001 ;version number of table
defw description ;pointer to description
defw icon ;pointer to icon
description:
DEFINE NEED_name
INCLUDE "zcc_opt.def"
UNDEFINE NEED_name
IF !DEFINED_NEED_name
defm "Z88DK Small C+ Program"
ENDIF
defb $0 ; Termination zero
icon:
DEFINE NEED_icon
INCLUDE "zcc_opt.def" ; Get icon from zcc_opt.def
UNDEFINE NEED_icon
IF !DEFINED_NEED_icon
defb @00000000 ; 7x7 icon
defb @00110010
defb @01000111
defb @01000010
defb @01000000
defb @00110000
defb @00000000
ENDIF
ENDIF
;----------------------
; 10 - asm() executable
;----------------------
IF (startup=10)
DEFINE STDASM
DEFINE NOT_DEFAULT_SHELL
org _asm_exec_ram - 2
defb $8e, $28
ENDIF
;--------------------------------------------------
; 5 - Embedded LargeLd - !!!EXPERIMENTAL!!!
; - The calculator needs to be reset (memory clean)
; - This has to be the first program in memory
;--------------------------------------------------
IF (startup=5)
DEFINE NOT_DEFAULT_SHELL
org $8000+14
ld a,$42 ; (RAM_PAGE_1)
out (6),a
jp start
ENDIF
;------------------
;1 - LASM (default)
;------------------
IF !NOT_DEFAULT_SHELL
DEFINE LASM
org $801D ; "Large asm block". To be loaded with "LASM"
; You need LASM 0.8 Beta by <NAME> for this (www.ticalc.org)
; - First wipe TI86 RAM (InstLASM is simply a memory cleaner)
; - Load LargeLd
; - Load your compiled and converted .86p code
; - run asm(LargeLd
; It will run your program. Loading order is important.
defb $8e, $28
;org $801F ; Start from here if you want to use PRGM86
ret
nop ;Identifies the table
jp start
defw 1 ;Version # of Table. Release 0 has no icon (Title only)
defw description ;Absolute pointer to program description
defw icon ;foo pointer to icon
description:
DEFINE NEED_name
INCLUDE "zcc_opt.def"
UNDEFINE NEED_name
IF !DEFINED_NEED_name
defm "Z88DK Small C+ Program"
ENDIF
icon:
defb $0 ; Termination zero
ENDIF
;-------------------------------------
; End of header, begin of startup part
;-------------------------------------
start:
IF STDASM | LASM ; asm( executable
call _runindicoff ; stop anoing run-indicator
ENDIF
ld hl,0
add hl,sp
ld (start1+1),hl
IF !DEFINED_atexit ; Less stack use
ld hl,-6 ; 3 pointers (more likely value)
add hl,sp
ld sp,hl
call crt0_init_bss
ld (exitsp),sp
ELSE
ld hl,-64 ; 32 pointers (ANSI standard)
add hl,sp
ld sp,hl
call crt0_init_bss
ld (exitsp),sp
ENDIF
; Optional definition for auto MALLOC init
; it assumes we have free space between the end of
; the compiled program and the stack pointer
IF DEFINED_USING_amalloc
INCLUDE "amalloc.def"
ENDIF
; IF NONANSI
call _homeup ; Set text cursor at (0,0)
ld a,8 ; Set _winBtm back to 8, so we
ld (_winBtm),a ; can print on the last line
; ELSE
EXTERN fputc_cons
ld hl,12
push hl
call fputc_cons
pop hl
IF DEFINED_GRAYlib
INCLUDE "gray86.asm"
ENDIF
;im 2
call tidi
call _flushallmenus
call _main
cleanup: ; exit() jumps to this point
start1:
ld sp,0
IF DEFINED_GRAYlib
ld a,$3C ; Make sure video mem is active
out (0),a
ENDIF
tiei:
ld IY,_Flags
exx
ld hl,(hl1save)
ld bc,(bc1save)
ld de,(de1save)
exx
IF DEFINED_GRAYlib
im 1
ELSE
ei
ENDIF
ret
tidi:
IF DEFINED_GRAYlib
im 2
ELSE
di
ENDIF
exx
ld (hl1save),hl
ld (bc1save),bc
ld (de1save),de
exx
ret
cpygraph:
ret
;----------------------------------------
; End of startup part, routines following
;----------------------------------------
l_dcal:
jp (hl)
defc ansipixels = 128
IF !DEFINED_ansicolumns
defc DEFINED_ansicolumns = 1
defc ansicolumns = 32
ENDIF
INCLUDE "crt0_runtime_selection.asm"
INCLUDE "crt0_section.asm"
SECTION bss_crt
hl1save: defw 0
de1save: defw 0
bc1save: defw 0
SECTION code_crt_init
ld hl,$FC00
ld (base_graphics),hl
|
data/mapHeaders/saffronhouse1.asm | adhi-thirumala/EvoYellow | 16 | 241287 | SaffronHouse1_h:
db HOUSE ; tileset
db SAFFRON_HOUSE_1_HEIGHT, SAFFRON_HOUSE_1_WIDTH ; dimensions (y, x)
dw SaffronHouse1Blocks, SaffronHouse1TextPointers, SaffronHouse1Script ; blocks, texts, scripts
db $00 ; connections
dw SaffronHouse1Object ; objects
|
tlsf/src/proof/relation/tlsf-proof-relation.adb | vasil-sd/ada-tlsf | 3 | 5901 | pragma Ada_2012;
package body TLSF.Proof.Relation is
function Relate(Container : R;
From, To : Element_Type)
return R
is
Len : constant Count_Type := Length(Container);
A : constant Arrow := (From, To);
begin
if Contains(Container, A) then
return Container;
else
pragma Assert (not Contains(Container, A));
declare
New_Container : constant R := Add(Container, A);
New_Len : constant Count_Type := Length(New_Container);
begin
pragma Assert (Contains(Container => Container,
Item => A));
pragma Assert (New_Len > Len);
return New_Container;
end;
end if;
end Relate;
end TLSF.Proof.Relation;
|
api/api014.asm | yosswi414/HariboteOS_USB | 0 | 89784 | [BITS 32]
GLOBAL api_closewin
[SECTION .text]
api_closewin: ; void api_closewin(int win);
PUSH EBX
MOV EDX, 14
MOV EBX, [ESP+8] ; win
INT 0x40
POP EBX
RET
|
oeis/157/A157651.asm | neoneye/loda-programs | 11 | 15130 | <filename>oeis/157/A157651.asm
; A157651: a(n) = 100*n^2 - 49*n + 6.
; 57,308,759,1410,2261,3312,4563,6014,7665,9516,11567,13818,16269,18920,21771,24822,28073,31524,35175,39026,43077,47328,51779,56430,61281,66332,71583,77034,82685,88536,94587,100838,107289,113940,120791,127842,135093,142544,150195,158046,166097,174348,182799,191450,200301,209352,218603,228054,237705,247556,257607,267858,278309,288960,299811,310862,322113,333564,345215,357066,369117,381368,393819,406470,419321,432372,445623,459074,472725,486576,500627,514878,529329,543980,558831,573882,589133
mov $1,$0
mul $0,10
pow $0,2
add $0,57
mov $2,$1
mul $2,151
add $0,$2
|
src/02/time.asm | unlimitedbacon/kernel | 251 | 171000 | <reponame>unlimitedbacon/kernel
;; clockSupported [Time]
;; Returns whether the clock is supported.
;; Outputs:
;; A: Preserved on success; error code on failure
;; Z: Set when the clock is supported; reset otherwise
clockSupported:
#ifdef CLOCK
cp a ; set Z
#else
or 1 ; reset Z
ld a, errUnsupported
#endif
ret
;; setClock [Time]
;; Sets the internal clock.
;; Inputs:
;; HL: Lower word of a 32-bit tick value
;; DE: Upper word of a 32-bit tick value
;; Outputs:
;; A: Preserved on success, error code on failure
;; Z: Set on success, reset on failure
setClock:
#ifndef CLOCK
ld a, errUnsupported
or a
ret
#else
push af
ld a, h
out (PORT_CLOCKREG2_IN), a
ld a, l
out (PORT_CLOCKREG1_IN), a
ld a, d
out (PORT_CLOCKREG4_IN), a
ld a, e
out (PORT_CLOCKREG3_IN), a
ld a, CLOCKCONTROL_ENABLE
out (PORT_CLOCKCONTROL), a
ld a, CLOCKCONTROL_ENABLE | CLOCKCONTROL_COMMAND
out (PORT_CLOCKCONTROL), a
pop af
cp a
ret
#endif
;; getClock [Time]
;; Gets the internal clock.
;; Outputs:
;; HL: Lower word of the 32-bit tick value
;; DE: Upper word of the 32-bit tick value
;; A: Preserved on success, error code on failure
;; Z: Set on success, reset on failure
getTimeInTicks:
#ifndef CLOCK
ld a, errUnsupported
or a
ret
#else
push af
in a, (PORT_CLOCKREG2_OUT)
ld h, a
in a, (PORT_CLOCKREG1_OUT)
ld l, a
in a, (PORT_CLOCKREG4_OUT)
ld d, a
in a, (PORT_CLOCKREG3_OUT)
ld e, a
pop af
cp a
ret
#endif
;; monthLength [Time]
;; Computes the amount of days in a given month.
;; Inputs:
;; HL: The year
;; E: The month (0-11)
;; Outputs:
;; A: The amount of days in this month
monthLength:
ld a, e
cp 1
jr nz, +_ ; if not February, avoid the costly leap year computation
call isLeapYear
_: push hl \ push bc
cp 1
jr z, +_ ; if a = 1, so we have a leap year
ld hl, monthLengthNonLeap
jr ++_
_: ld hl, monthLengthLeap
_: ld b, 0
ld c, e
add hl, bc
ld a, (hl)
pop bc \ pop hl
ret
; daysBeforeMonth
; Computes the amount of days before the first day of the given month since
; 1 January.
; Inputs:
; HL: The year
; E: The month (0-11)
; Outputs:
; BC: The amount of days between 1 January and the first day of the given
; month
daysBeforeMonth:
call isLeapYear
_: push hl
cp 1
jr z, +_ ; if a = 1, so we have a leap year
ld hl, daysBeforeMonthNonLeap
jr ++_
_: ld hl, daysBeforeMonthLeap
_: ld b, 0
ld c, e
add hl, bc
add hl, bc
ld a, (hl)
ld c, a
inc hl
ld a, (hl)
ld b, a
pop hl
ret
;; isLeapYear [Time]
;; Determines whether the given year is a leap year.
;; Inputs:
;; HL: The year
;; Outputs:
;; A: 1 if it is a leap year; 0 if it is not
isLeapYear:
push bc \ push de
; divisible by 400?
ld a, h
ld c, l
ld de, 400
call divACByDE ; remainder in hl
ld a, h
cp 0
jr nz, .notDivisibleBy400
ld a, l
cp 0
jr nz, .notDivisibleBy400
pop de \ pop bc
ld a, 1
ret
.notDivisibleBy400:
; divisible by 100?
ld c, 100
push hl
call divHLByC ; remainder in a
cp 0
jr nz, .notDivisibleBy100
pop hl
pop de \ pop bc
ld a, 0
ret
.notDivisibleBy100:
pop hl
; divisible by 4?
ld c, 4
push hl
call divHLByC ; remainder in a
cp 0
jr nz, .notDivisibleBy4
pop hl
pop de \ pop bc
ld a, 1
ret
.notDivisibleBy4:
pop hl
pop de \ pop bc
ld a, 0
ret
; leapYearsSince1997
; Computes the number of leap days between 1 January of the given year and
; 1 January 1997.
; Inputs:
; HL: The year
; Outputs:
; A: The number of leap days between the given year and 1997
leapYearsSince1997:
push hl \ push bc \ push de
dec hl
ld c, 4
call divHLByC
ld d, h
ld e, l
ld c, 25
call divHLByC
ex de, hl
or a ; reset C flag
sbc hl, de
ex de, hl
ld c, 4
call divHLByC
ex de, hl
add hl, de
ld de, 484
or a ; reset C flag
sbc hl, de
ld a, l
pop de \ pop bc \ pop hl
ret
; yearDayToDate
; Returns the day and month corresponding to a given number of days since
; 1 January.
; Inputs:
; HL: The number of days since 1 January
; IX: The year (this is needed because the function needs to know whether the
; date is in a leap year)
; Outputs:
; L: The month (0-11)
; H: The day (0-30)
; DE: Garbage
yearDayToDate:
push de
ex hl, de
push ix \ pop hl
call isLeapYear
cp 1
jr z, +_ ; if a = 1, so we have a leap year
ld hl, daysBeforeMonthNonLeap
jr ++_
_: ld hl, daysBeforeMonthLeap
_: ld a, 0 ; guess for the month
.notFound:
inc a
inc hl
inc hl
; if (hl) > de, we are done
push hl
ld c, (hl) \ inc hl \ ld b, (hl) \ push bc \ pop hl ; ld hl, (hl)
call cpHLDE
pop hl
jr c, .notFound
jr z, .notFound
.found:
dec a
dec hl
dec hl
ld c, (hl) \ inc hl \ ld b, (hl) \ push bc \ pop hl ; ld hl, (hl)
ex hl, de
sbc hl, de ; carry is always unset here
ld h, l ; day
ld l, a ; month
pop de
ret
;; convertTimeFromTicks [Time]
;; Convert from ticks in seconds to time.
;; The epoch is January 1st, 1997 (a Wednesday).
;; Inputs:
;; HL: Lower word of tick value
;; DE: Upper word of tick value
;; Outputs:
;; D: Current second (0-59)
;; C: Current minute (0-59)
;; B: Current hour, from 0-23
;; H: Current day, from 0-30
;; L: Current month, from 0-11
;; IX: Current year
;; A: Day of the week, from 0-6 with 0 being Sunday
;; E: Garbage
;; Notes:
;; As of now, only the time is output correctly.
convertTimeFromTicks:
ld a, d
ld c, e
push hl \ pop ix
ld de, 60
call div32By16
; seconds
push hl
ld de, 60
call div32By16
; minutes
push hl
ld de, 24
call div32By16
; hours
push hl
; days (since epoch)
push ix
; do a guess in which year the date is and put it in de;
; our guess may be wrong: we may overestimate the year by 1
; but we will fix that later
ld de, 365
call div32By16
push ix \ pop hl
ld bc, 1997
add hl, bc
ld d, h
ld e, l
; compute the amount of days between the epoch and the
; guessed year, and put it in hl
push hl \ pop ix
ld hl, 0
call daysSinceEpoch
pop ix
; subtract hl (days between epoch and guessed year) from ix
; (amount of days from the original timestamp value) to get
; the amount of days between 1 Jan of the guessed year and
; the requested date; put it in hl
ld b, h
ld c, l
push ix \ pop hl
or a ; reset carry
sbc hl, bc
; if this overflowed, our guess for the year was wrong...
jr nc, .guessedCorrect
; ... in that case decrease the year (in de) by 1...
ex de, hl
dec hl
; ... and increase the amount of days since 1 Jan (in de)
; by the length of the year (366 if it is a leap year, 366
; otherwise)
call isLeapYear
cp 1
jr nz, .noLeapYear
ex de, hl
ld bc, 366
add hl, bc
jr +_
.noLeapYear:
ex de, hl
ld bc, 365
add hl, bc
_: ex de, hl
.guessedCorrect:
; now we have the year number in de and the number of days
; since 1 Jan of that year in hl
; figure out day and month (in h and l)
push de \ pop ix
call yearDayToDate
; hours
pop de
ld b, e
; minutes
pop de
ld c, e
; seconds
pop de
ld d, e
ret
;; convertTimeToTicks [Time]
;; Converts a time structure to seconds since epoch.
;; Inputs:
;; D: Current second (0-59)
;; C: Current minute (0-59)
;; B: Current hour (0-23)
;; H: Current day (0-30)
;; L: Current month (0-11)
;; IX: Current year
;; Outputs:
;; HL: Lower word of tick value
;; DE: Upper word of tick value
convertTimeToTicks:
; second
push de
; hour / minute
push bc
call daysSinceEpoch
; multiply by 24
ld a, 24
ld de, 0
call mul32By8 ; result in dehl
; hour / minute
pop bc
; add hours
push bc
ld c, b
ld b, 0
add hl, bc
jr nc, +_
ex de, hl
inc hl
ex de, hl
_: pop bc
; multiply by 60
ld a, 60
call mul32By8 ; result in dehl
; add minutes
ld b, 0
add hl, bc
jr nc, +_
ex de, hl
inc hl
ex de, hl
_: ; multiply by 60
ld a, 60
call mul32By8 ; result in dehl
; second
pop bc
ld c, b
ld b, 0
add hl, bc
jr nc, +_
ex de, hl
inc hl
ex de, hl
_:
ret
; daysSinceEpoch
; Computes how many days lie between the given date (exclusive) and
; 1 January 1997 (inclusive).
; Inputs:
; H: Current day (0-30)
; L: Current month (0-11)
; IX: Current year
; Outputs:
; HL: The number of days between the given date and 1 January 1997.
daysSinceEpoch:
push de \ push bc
; day / month
push hl
; year
push ix \ pop hl
; bc = amount of leap days since epoch
call leapYearsSince1997
ld b, 0
ld c, a
push bc
; hl = amount of years since epoch
ld de, 1997
or a ; reset C flag
sbc hl, de
; hl = amount of days since epoch
ex hl, de
ld bc, 365
call mul16By16 ; result in dehl
; note: we are going to multiply with 86400 later, so we can assume
; the result fits in hl only (otherwise the ticks value will be
; incorrect anyway)
pop bc
; add the leap days
add hl, bc
; day / month
pop bc
ld e, c
push bc
push hl
push ix \ pop hl
call daysBeforeMonth
pop hl
add hl, bc
pop bc
ld c, b
ld b, 0
add hl, bc
pop bc \ pop de
ret
;; getTime [Time]
;; Gets the current time.
;; Outputs:
;; D: Current second (0-59)
;; C: Current minute (0-59)
;; B: Current hour (0-23)
;; H: Current day (0-30)
;; L: Current month (0-11)
;; IX: Current year
;; A: Day of the week, from 0-6 with 0 being Sunday
getTime:
#ifndef CLOCK
ld a, errUnsupported
or a
ret
#else
call getTimeInTicks
call convertTimeFromTicks
cp a
ret
#endif
; data
; The number of days in a given month
monthLengthNonLeap:
.db 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
monthLengthLeap:
.db 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
; The number of days before a given month
daysBeforeMonthNonLeap:
.dw 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365
daysBeforeMonthLeap:
.dw 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366
|
newFile.asm | epostIt/Assembler | 0 | 26099 | .EQU cool 12345
@cool
.EQU oh_cool 7645
@oh_cool
.EQU cool 12345
@cool
.EQU cool 12345
@cool
.EQU cool 12345
@cool
.EQU cool 12345
@cool
.EQU cool 12345
@cool
.EQU cool 12345
@cool
.EQU cool 11111
.EQU cool 12345
@cool
.EQU cool 11111
.EQU cool 12345
@cool
.EQU cool 11111
.EQU cool 12345
@cool
.EQU cool 11111
.EQU cool 12345
@cool
.EQU cool 11111
.EQU cool 12345
@cool
.EQU cool 11111
.EQU cool 12345
@cool
.EQU cool 11111
@-5
@-5
@-5
@-5
@7
S = M + 1
@7
S = M + 1
@7
S = M + 1
@7
S = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
k = M + 1
@7
@9
A = M*1
@7
@9
A = M*1
@7
@9
A = M*1
@7
@9
A = M**1
@7
@9
A = m**1
@7
@9
A = m**1
@7
@9
A = m**1
@7
@9
A = m**1
@7
@9
A = M**1
@7
@9
A =
@7
@9
A = M/1
@i
M=1
@sum
M=0
(LOOP)
@i
D=M
@100
D=D-A
@END
D;JGT
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
@i
M=1
@sum
M=0
(LOOP)
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
@i
M=1
@sum
M=0
(LOOP)
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
D;
@i
D=M
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
D=M
@100
D=D-A
@END
D;
@i
D=M
@sum
M=D+M
@i
M=M+1
@LOOP
0;JMP
(END)
@END
0;JMP
(LOOP
@i
(LOOP
@i
(LOOP
@i
(LOOP
@i
(LOOP
@i
LOOP)
@i
LOOP)
@i
LOOP)
@i
LOOP)
@i
LOOP)
@i
LOOP)
@i
|
arch/ARM/Nordic/drivers/nrf51-rtc.adb | bosepchuk/Ada_Drivers_Library | 6 | 5327 | <gh_stars>1-10
------------------------------------------------------------------------------
-- --
-- Copyright (C) 2016, AdaCore --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions are --
-- met: --
-- 1. Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- 2. Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in --
-- the documentation and/or other materials provided with the --
-- distribution. --
-- 3. Neither the name of the copyright holder nor the names of its --
-- contributors may be used to endorse or promote products derived --
-- from this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT --
-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, --
-- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY --
-- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT --
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --
-- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
with NRF51_SVD.RTC; use NRF51_SVD.RTC;
package body nRF51.RTC is
-----------
-- Start --
-----------
procedure Start (This : Real_Time_Counter) is
begin
This.Periph.TASKS_START := 1;
end Start;
----------
-- Stop --
----------
procedure Stop (This : Real_Time_Counter) is
begin
This.Periph.TASKS_STOP := 1;
end Stop;
-----------
-- Clear --
-----------
procedure Clear (This : Real_Time_Counter) is
begin
This.Periph.TASKS_CLEAR := 1;
end Clear;
-------------------
-- Set_Prescaler --
-------------------
procedure Set_Prescaler
(This : Real_Time_Counter;
Prescaler : UInt12)
is
begin
This.Periph.PRESCALER.PRESCALER := Prescaler;
end Set_Prescaler;
-------------
-- Counter --
-------------
function Counter (This : Real_Time_Counter) return UInt24 is
begin
return This.Periph.COUNTER.COUNTER;
end Counter;
-----------------
-- Set_Compare --
-----------------
procedure Set_Compare
(This : Real_Time_Counter;
Compare : Compare_Channel;
Value : UInt24)
is
begin
This.Periph.CC (Integer (Compare)).COMPARE := Value;
end Set_Compare;
-----------
-- Event --
-----------
function Event
(This : Real_Time_Counter;
Evt : RTC_Events)
return Event_Type
is
begin
case Evt is
when Tick_Event =>
return Event_Type (This.Periph.EVENTS_TICK'Address);
when Overflow_Event =>
return Event_Type (This.Periph.EVENTS_OVRFLW'Address);
when Compare_0_Event =>
return Event_Type (This.Periph.EVENTS_COMPARE (0)'Address);
when Compare_1_Event =>
return Event_Type (This.Periph.EVENTS_COMPARE (1)'Address);
when Compare_2_Event =>
return Event_Type (This.Periph.EVENTS_COMPARE (2)'Address);
when Compare_3_Event =>
return Event_Type (This.Periph.EVENTS_COMPARE (3)'Address);
end case;
end Event;
------------------
-- Enable_Event --
------------------
procedure Enable_Event
(This : Real_Time_Counter;
Evt : RTC_Events)
is
begin
case Evt is
when Tick_Event =>
This.Periph.EVTEN.TICK := Enabled;
when Overflow_Event =>
This.Periph.EVTEN.OVRFLW := Enabled;
when Compare_0_Event =>
This.Periph.EVTEN.COMPARE.Arr (0) := Enabled;
when Compare_1_Event =>
This.Periph.EVTEN.COMPARE.Arr (1) := Enabled;
when Compare_2_Event =>
This.Periph.EVTEN.COMPARE.Arr (2) := Enabled;
when Compare_3_Event =>
This.Periph.EVTEN.COMPARE.Arr (3) := Enabled;
end case;
end Enable_Event;
-------------------
-- Disable_Event --
-------------------
procedure Disable_Event
(This : Real_Time_Counter;
Evt : RTC_Events)
is
begin
case Evt is
when Tick_Event =>
This.Periph.EVTEN.TICK := Disabled;
when Overflow_Event =>
This.Periph.EVTEN.OVRFLW := Disabled;
when Compare_0_Event =>
This.Periph.EVTEN.COMPARE.Arr (0) := Disabled;
when Compare_1_Event =>
This.Periph.EVTEN.COMPARE.Arr (1) := Disabled;
when Compare_2_Event =>
This.Periph.EVTEN.COMPARE.Arr (2) := Disabled;
when Compare_3_Event =>
This.Periph.EVTEN.COMPARE.Arr (3) := Disabled;
end case;
end Disable_Event;
end nRF51.RTC;
|
src/main/antlr/UimaTokenRegex.g4 | nantesnlp/uima-tokens-regex | 4 | 5072 | <filename>src/main/antlr/UimaTokenRegex.g4<gh_stars>1-10
/*******************************************************************************
* Copyright 2015-2017 - CNRS (Centre National de Recherche Scientifique)
*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*
*******************************************************************************/
grammar UimaTokenRegex;
@header {
}
ruleList
: headerBlock shortcutMatcherDeclaration* ruleDeclaration*
;
headerBlock
: typeSystemDeclaration
useDeclaration
importMatchersDeclaration* // Force matcher declarations before java matcher declarations
(externalListDeclaration | optionDeclaration)*
javaMatcherDeclaration*
;
typeSystemDeclaration
: TYPE_SYSTEM Identifier ';'
;
importMatchersDeclaration
: IMPORT_MATCHERS_FROM path ';' ;
useDeclaration
: mainUseDeclaration
( ',' secondaryUseDeclaration )*
( ',' secondaryUseDeclaration )*
';'
;
mainUseDeclaration : USE typeFullName ('as' typeShortName )? ;
secondaryUseDeclaration : typeFullName 'as' typeShortName ;
typeFullName : Identifier ;
typeShortName : Identifier ;
javaMatcherDeclaration
: JAVA_MATCHER ':' Identifier ';'
;
optionDeclaration
: SET Identifier '=' literal ';'
;
shortcutMatcherDeclaration
: MATCHER Identifier ('as' labelIdentifier)? ':' (featureMatcherDeclaration | Regex ) ';'
;
labelIdentifier
: Identifier
;
ruleDeclaration
: RULE ruleName ':' automatonDeclaration ';'
;
automatonDeclaration
: orBranchingDeclaration +
;
ruleName
: StringLiteral
;
matcherDeclaration
: ( IgnoreMatcher? Regex
| IgnoreMatcher? Identifier
| IgnoreMatcher? featureMatcherDeclaration
)
;
orBranchingDeclaration
: ( '(' automatonDeclaration ('|' automatonDeclaration)* ')'
| matcherDeclaration
) quantifierDeclaration?
;
featureMatcherDeclaration
: '[' ']'
| '[' ( expression | andexpression | orexpression ) ']'
;
//first, we try to match all first level && (e.g. && not included in some sub-expression)
andexpression
: expression (AND expression)*
;
//second, we try to match all first level || (e.g. || not included in some sub-expression)
orexpression
: expression (OR expression )*
;
expression
: atomicExpression
| '(' orexpression ')'
| '(' andexpression ')'
;
atomicExpression
: matcherIdentifier
| featureName operator literal
| featureName arrayOperator literalArray
| featureName inStringListOperator resourceIdentifier
| 'text' '==' coveredTextIgnoreCase
| 'text' '===' coveredTextExactly
| 'text' inStringListOperator coveredTextArray
| 'text' inStringListOperator resourceIdentifier
;
matcherIdentifier : Identifier ;
resourceIdentifier
: Identifier
;
externalListDeclaration
: RESOURCE resourceIdentifier ':'
(simpleListDefinition
| csvListDefinition
| tsvListDefinition
| jsonListDefinition
| yamlListDefinition)
';'
;
simpleListDefinition : 'list' '(' path ')' ;
path : StringLiteral ;
yamlListDefinition : 'yaml' '(' path ',' keypath ')' ;
jsonListDefinition : 'json' '(' path ',' keypath ')' ;
csvListDefinition : 'csv' '(' path ',' separator ',' quote ',' IntegerLiteral ')' ;
tsvListDefinition : 'tsv' '(' path (',' IntegerLiteral) ? ')' ;
quote : StringLiteral ;
separator
: StringLiteral
;
keypath
: StringLiteral
;
quantifierDeclaration
: '{' IntegerLiteral (',' IntegerLiteral)? '}'
| '*'
| '?'
| '+'
;
featureName
: (typeShortName '.' )? featureBaseName
;
featureBaseName : Identifier ;
arrayOperator
: 'in'
| 'nin'
;
inStringListOperator
: arrayOperator
| 'inIgnoreCase'
| 'ninIgnoreCase'
;
operator
: '=='
| '!='
| '<'
| '<='
| '>'
| '>='
;
IgnoreMatcher
: '~'
;
// covered text
coveredTextArray
: '[' StringLiteral (',' StringLiteral)* ']'
;
// covered text
coveredTextIgnoreCase
: StringLiteral;
// covered text
coveredTextExactly
: StringLiteral;
literalArray
: '[' literal (',' literal)* ']'
;
// Literals
literal
: StringLiteral
| IntegerLiteral
| BooleanLiteral
| FloatingPointLiteral
;
// IntegerLiteral
IntegerLiteral
: '0'
| NonZeroDigit Digit*
;
NonZeroDigit: [1-9];
Digit: [0-9];
// Boolean Literals
BooleanLiteral
: 'true'
| 'false'
;
// String Literals
StringLiteral
: '"' StringCharacters? '"'
;
fragment
StringCharacters
: StringCharacter+
;
fragment
StringCharacter
: ~["\\]
| EscapeSequence
;
fragment
EscapeSequence
: '\\' [btnfr"'\\]
;
// Floats literal
FloatingPointLiteral
: Digit+ '.' Digit+
;
// Syntactic tokens
LCURL : '{';
RCURL : '}';
LPAREN : '(';
RPAREN : ')';
LBRACK : '[';
RBRACK : ']';
SEMI : ';';
// Regex Quantifiers
QUESTION : '?';
COLON : ':';
MUL : '*';
PLUS : '+';
// Logical Operators
AND : '&';
OR : '|';
// Operators
GT : '>';
LT : '<';
EQUAL : '==';
LE : '<=';
GE : '>=';
NOTEQUAL : '!=';
IN : 'in';
//header block declaration
TYPE_SYSTEM : 'type-system';
IMPORT_MATCHERS_FROM : 'import-matchers-from';
USE : 'use';
SET : 'set';
JAVA_MATCHER : 'java-matcher';
RESOURCE : 'resource';
// Comments
LINE_COMMENT
: '#' ~[\r\n]* -> channel(HIDDEN)
;
// Matcher declaration
MATCHER : 'matcher';
// Rule declaration
RULE : 'rule';
Identifier
: IdentifierPart ('.' IdentifierPart)*
;
IdentifierPart
: FirstLetter JavaLetterOrDigit*
;
fragment
FirstLetter
: [a-zA-Z_] // these are the "java letters" below 0xFF
| // covers all characters above 0xFF which are not a surrogate
~[\u0000-\u00FF\uD800-\uDBFF]
{Character.isJavaIdentifierStart(_input.LA(-1))}?
| // covers UTF-16 surrogate pairs encodings for U+10000 to U+10FFFF
[\uD800-\uDBFF] [\uDC00-\uDFFF]
{Character.isJavaIdentifierStart(Character.toCodePoint((char)_input.LA(-2), (char)_input.LA(-1)))}?
;
fragment
JavaLetterOrDigit
: [a-zA-Z0-9$_] // these are the "java letters or digits" below 0xFF
| // covers all characters above 0xFF which are not a surrogate
~[\u0000-\u00FF\uD800-\uDBFF]
{Character.isJavaIdentifierPart(_input.LA(-1))}?
| // covers UTF-16 surrogate pairs encodings for U+10000 to U+10FFFF
[\uD800-\uDBFF] [\uDC00-\uDFFF]
{Character.isJavaIdentifierPart(Character.toCodePoint((char)_input.LA(-2), (char)_input.LA(-1)))}?
;
WS : [ \t\r\n]+ -> channel(HIDDEN) ; // skip spaces, tabs, newlines
Regex: '/' (~[/]| EscapeSequence)* '/';
|
gcc-gcc-7_3_0-release/gcc/testsuite/gnat.dg/array1.ads | best08618/asylo | 7 | 363 | with SYSTEM;
WITH array2; use array2;
package array1 is
procedure Foo (R : RIC_TYPE);
procedure Start_Timer (Q : SYSTEM.ADDRESS);
end array1;
|
src/mandel_utf.adb | shintakezou/adaplayground | 0 | 28047 | -- this is taken from https://ideone.com/a1ky4l, which comes from
-- here http://cowlark.com/2014-04-27-ada/index.html (<NAME>)
--
-- I've polished it, adapted in style, removed some comments,
-- changed other things, … but mostly it's his code.
--
with
Ada.Numerics.Elementary_Functions,
Ada.Numerics.Generic_Complex_Types,
Ada.Wide_Text_IO,
Ada.Unchecked_Deallocation;
use
Ada.Numerics.Elementary_Functions,
Ada.Wide_Text_IO;
pragma Wide_Character_Encoding (UTF8); -- -gnatW8?
procedure Mandel_UTF is
package Complex_Types is new Ada.Numerics.Generic_Complex_Types (Float);
use Complex_Types;
-- Configuration constants.
Bitmap_Size : constant := 128; -- pixels
Max_Iterations : constant := 32;
Num_Of_Threads : constant := 4;
------------------------------------------------------
-- This part replaces Given's glyphs table
subtype Brush_Levels is Integer range 0 .. 255;
type Brushes is array (Brush_Levels) of Wide_Character;
function Generate_Glyphs return Brushes is
First_Code_Point : constant := 10240;
begin
return E : Brushes do
for I in Brush_Levels'Range loop
E (I) := Wide_Character'Val (First_Code_Point + I);
end loop;
end return;
end Generate_Glyphs;
Glyphs : constant Brushes := Generate_Glyphs;
------------------------------------------------------
-- Returns the intensity of a single point in the Mandelbrot set.
function Render_Pixel (C : Complex) return Float is
Z : Complex := Complex'(0.0, 0.0);
begin
for N in Integer range 0 .. Max_Iterations loop
Z := Z*Z + C;
if (abs Z > 2.0) then
return Float (N) / Float (Max_Iterations);
end if;
end loop;
return 0.0;
end;
type Bitmap is array(Integer range <>, Integer range <>) of Float;
type Bitmap_Ref is access Bitmap;
procedure Free_Bitmap is new Ada.Unchecked_Deallocation
(Object => Bitmap, Name => Bitmap_Ref);
-- Encapsulates the multithreaded render: creates a bunch of workers
-- and a scheduler, which hands out work units to the renderers.
procedure Mandelbrot
(Data : Bitmap_Ref;
R1, I1, R2, I2 : Float)
is
Width : Integer := Data'Length (1);
Height : Integer := Data'Length (2);
Xdelta : Float := (R2-R1) / Float (Width);
Ydelta : Float := (I2-I1) / Float (Height);
task Scheduler is
-- Each worker calls this to find out what it needs to do.
entry Request_Work_Unit (Y : out Integer; I : out Float);
end;
task body Scheduler is
begin
-- Hand out each scanline in turn to tasks that want things to
-- do, then exit.
for Yy in Data'Range (2) loop
accept Request_Work_Unit (Y : out Integer;
I : out Float)
do
Y := Yy;
I := I1 + Float (Yy) * Ydelta;
end Request_Work_Unit;
end loop;
end;
-- Actually does the rendering. Each of these is self contained and will
-- keep working until there's nothing left to do, at which point it
-- exits.
task type Worker;
task body Worker is
Y : Integer;
I : Float;
C : Complex;
begin
loop
Scheduler.Request_Work_Unit (Y, I);
for X in Data'Range (1) loop
C := Complex'(R1 + Float (X) * Xdelta, I);
Data (X, Y) := Render_Pixel (C);
end loop;
end loop;
end;
-- Create some work threads (which will automatically start).
Scanlines : array (Integer range 1 .. Num_Of_Threads) of Worker;
begin
null;
end;
-- Writes the bitmap to stdout, using funky Unicode hackery to make it
-- look pretty. Sort of.
procedure Dump_Bitmap(Data : Bitmap_Ref) is
function Is_Set(X, Y : Integer) return Boolean is (Data (X, Y) > 0.0)
with Inline;
type Byte is mod 2**8;
X, Y : Integer;
B : Byte;
begin
Y := 0;
while (Y <= Data'Last (2)) loop
X := 0;
while (X < Data'Last (1)) loop
B := (if Is_Set (X+0, Y+0) then 1 else 0);
-- this looks clean but I'd like to write it in a different way;
-- maybe later... (sort of TODO)
if Is_Set (X+0, Y+1) then B := B or 2; end if;
if Is_Set (X+0, Y+2) then B := B or 4; end if;
if Is_Set (X+0, Y+3) then B := B or 64; end if;
if Is_Set (X+1, Y+0) then B := B or 8; end if;
if Is_Set (X+1, Y+1) then B := B or 16; end if;
if Is_Set (X+1, Y+2) then B := B or 32; end if;
if Is_Set (X+1, Y+3) then B := B or 128; end if;
Put (Glyphs (Byte'Pos (B)));
X := X + 2;
end loop;
New_Line;
Y := Y + 4;
end loop;
end;
Width : constant := Bitmap_Size;
Height : constant := Width;
Image : Bitmap_Ref;
begin
-- Render, print, then ~~leak~~ free a bitmap.
Image := new Bitmap (0 .. (Width - 1), 0 .. (Height - 1));
Mandelbrot (Image, -2.0, -2.0, +2.0, +2.0);
Dump_Bitmap (Image);
Free_Bitmap (Image);
end;
|
adium/ASUnitTests/CantSetWindowMinimizable.applescript | sin-ivan/AdiumPipeEvent | 0 | 174 | global HandyAdiumScripts
on run
tell application "Adium"
set m to (get minimizable of window 1)
try
set minimizable of window 1 to false
--should never get here
set minimizable of window 1 to m --restore
error
on error number num
if num is -2700 then error
end try
end tell
end run |
L6/L6.asm | Bardin08/CA_Labs | 0 | 171931 | TITLE ЛР_6
;------------------------------------------------------------------------------
; Дисципліна: Архітектура комп'ютера
; НТУУ "КПІ"
; Факультет: ФІОТ
; Курс: 1
; Група: ІТ-01
;------------------------------------------------------------------------------
; Автор: <NAME>
; Дата: 07/04/2021
;------------------------------------------------------------------------------
IDEAL
;------------------------------------------------------------------------------
MACRO M_Exit ; Exit macros
; Input: AL = Exit code
; Output: ---
mov ah, 04Ch ; DOS interruption number to exit
int 21h
ENDM
;------------------------------------------------------------------------------
MACRO M_Init ; Initiate DS and ES
mov ax, @data ; ax <- @data
mov ds, ax ; ds <- ax
mov es, ax ; es <- ax
ENDM
MODEL small
STACK 256
DATASEG
msg db "<NAME> $"
bak_int0Bh_offset DW ? ; Effective procedure address - default handler for COM1 interrupt
bak_int0Bh_seg DW ? ; Segment begin address for hardware conversion function COM1
CODESEG
PROC main
M_Init
;Stage 1. Receiving effective address and interrupt offset--------------------
mov di, 61h
call get_int_vector
; Output arguments: (bx - effective address, es - segment address )
mov [bak_int0Bh_offset], bx
mov [bak_int0Bh_seg], es
; Stage 2. Збереження стандартного обробника переривань СОМ 2 за іншим вектором
mov di, 61h ; Input parameter for set_int_vector, new interruption number
mov dx, bx ; Offset for procedure, effcetive address
call set_int_vector
; Stage 3. Set new handler for custom interruption
mov di, 61h
mov dx, OFFSET int61h
mov ax, SEG int61h
mov es, ax
call set_int_vector
int 61h ; call interruption
; Stage 4. Enroll all changes
mov di, 61h
mov dx, [bak_int0Bh_offset]
mov ax, [bak_int0Bh_seg]
mov es, ax
call set_int_vector
xor al, al ; Set al to zero
M_Exit
ENDP main
;--------------------------------------------------------------------------
PROC get_int_vector
; Purpose: Get logical address for procedure by interruption vector number
; Input: DI <- Interruption vector number
; Вихід: BX <- procedure`s effective address
; ES <- procedure`s segment address
;--------------------------------------------------------------------------
; Add registers to stack
push ax
push di
xor ax, ax ; Clean AX
mov es, ax ; Move to 0000h
shl di, 2 ; Left logical shift, same as multiply to 4
mov bx, [es:[di]] ; Write handler`s effectiva address to BX
mov ax, [es:[di + 2]] ; Write handler`s segment address to АХ
mov es, ax ; Write handler`s segment address to ES
; Restore registers
pop di
pop ax
ret ; Return from procedure
ENDP get_int_vector
;--------------------------------------------------------------------------
PROC set_int_vector
; Purpose: Set new a handler to interruption number
; Input: DI - interruption number, where the procedure will be bind
; DX - new handler effective address
; ES - new handler segment address
; Output: ---
;--------------------------------------------------------------------------
Cli ; Disable hardware interrupts
; Adding registers to stack
push ax
push di
push ds
xor ax, ax ; Clean AX
mov ds, ax ; Move to 0000h
shl di, 2 ; left logical shift, same as multiply to 4
mov [ds:[di]], dx ; Write effective address to the first half of vector
mov [ds:[di + 2]], es ; Write segment address to the second half of vector
; Restore registers
pop ds
pop di
pop ax
sti ; Enable hardware interrupts
ret
ENDP set_int_vector
;--------------------------------------------------------------------------
PROC int61h
; Purpose: New interruption (61h)
; Input: ---
; Output: ---
;--------------------------------------------------------------------------
mov ah, 09h ; print a message
mov dx, offset msg
int 21h
mov al, 20h ; exit to operation system
out 20h, al
iret ; return from interruption
ENDP int61h
END main ; Кінець коду |
agda/OList.agda | bgbianchi/sorting | 6 | 555 | <gh_stars>1-10
module OList {A : Set}(_≤_ : A → A → Set) where
open import Data.List
open import Bound.Lower A
open import Bound.Lower.Order _≤_
data OList : Bound → Set where
onil : {b : Bound}
→ OList b
:< : {b : Bound}{x : A}
→ LeB b (val x)
→ OList (val x)
→ OList b
forget : {b : Bound} → OList b → List A
forget onil = []
forget ( :< {x = x} _ xs) = x ∷ forget xs
|
programs/oeis/073/A073784.asm | jmorken/loda | 1 | 243526 | <filename>programs/oeis/073/A073784.asm
; A073784: Number of primes between successive composite numbers.
; 1,1,0,0,1,1,0,0,1,1,0,0,1,0,0,0,0,1,1,0,0,0,0,1,0,0,1,1,0,0,1,0,0,0,0,1,0,0,0,0,1,1,0,0,0,0,1,0,0,1,1,0,0,0,0,1,0,0,1,0,0,0,0,1,0,0,0,0,0,0,1,0,0,1,1,0,0,1,1,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,1,0,0,0,0,1,1,0
mov $3,2
mov $5,$0
lpb $3
mov $0,$5
sub $3,1
add $0,$3
sub $0,1
mov $6,$0
add $0,3
cal $0,65090 ; Natural numbers which are not odd primes: composites plus 1 and 2.
cal $0,230980 ; Number of primes <= n, starting at n=0.
mov $2,$3
mov $4,$0
sub $4,1
add $4,$6
lpb $2
mov $1,$4
sub $2,1
lpe
lpe
lpb $5
sub $1,$4
mov $5,0
lpe
sub $1,1
|
Cubical/Algebra/Ring/DirectProd.agda | thomas-lamiaux/cubical | 0 | 8917 | <filename>Cubical/Algebra/Ring/DirectProd.agda
{-# OPTIONS --safe #-}
module Cubical.Algebra.Ring.DirectProd where
open import Cubical.Foundations.Prelude
open import Cubical.Foundations.Equiv
open import Cubical.Foundations.Isomorphism
open import Cubical.Foundations.HLevels
open import Cubical.Data.Sigma
open import Cubical.Algebra.Ring.Base
private
variable
ℓ ℓ' ℓ'' ℓ''' : Level
module _
(A'@(A , Ar) : Ring ℓ)
(B'@(B , Br) : Ring ℓ')
where
open RingStr Ar using ()
renaming
( 0r to 0A
; 1r to 1A
; _+_ to _+A_
; -_ to -A_
; _·_ to _·A_
; +Assoc to +AAssoc
; +IdR to +AIdR
; +IdL to +AIdL
; +InvR to +AInvR
; +InvL to +AInvL
; +Comm to +AComm
; ·Assoc to ·AAssoc
; ·IdL to ·AIdL
; ·IdR to ·AIdR
; ·DistR+ to ·ADistR+
; ·DistL+ to ·ADistL+
; is-set to isSetA )
open RingStr Br using ()
renaming
( 0r to 0B
; 1r to 1B
; _+_ to _+B_
; -_ to -B_
; _·_ to _·B_
; +Assoc to +BAssoc
; +IdR to +BIdR
; +IdL to +BIdL
; +InvR to +BInvR
; +InvL to +BInvL
; +Comm to +BComm
; ·Assoc to ·BAssoc
; ·IdL to ·BIdL
; ·IdR to ·BIdR
; ·DistR+ to ·BDistR+
; ·DistL+ to ·BDistL+
; is-set to isSetB )
DirectProd-Ring : Ring (ℓ-max ℓ ℓ')
fst DirectProd-Ring = A × B
RingStr.0r (snd DirectProd-Ring) = 0A , 0B
RingStr.1r (snd DirectProd-Ring) = 1A , 1B
(snd DirectProd-Ring RingStr.+ (a , b)) (a' , b') = (a +A a') , (b +B b')
(snd DirectProd-Ring RingStr.· (a , b)) (a' , b') = (a ·A a') , (b ·B b')
(RingStr.- snd DirectProd-Ring) (a , b) = (-A a) , (-B b)
RingStr.isRing (snd DirectProd-Ring) =
makeIsRing (isSet× isSetA isSetB)
(λ x y z i → +AAssoc (fst x) (fst y) (fst z) i , +BAssoc (snd x) (snd y) (snd z) i)
(λ x i → (+AIdR (fst x) i) , (+BIdR (snd x) i))
(λ x i → (+AInvR (fst x) i) , +BInvR (snd x) i)
(λ x y i → (+AComm (fst x) (fst y) i) , (+BComm (snd x) (snd y) i))
(λ x y z i → (·AAssoc (fst x) (fst y) (fst z) i) , (·BAssoc (snd x) (snd y) (snd z) i))
(λ x i → (·AIdR (fst x) i) , (·BIdR (snd x) i))
(λ x i → (·AIdL (fst x) i) , (·BIdL (snd x) i))
(λ x y z i → (·ADistR+ (fst x) (fst y) (fst z) i) , (·BDistR+ (snd x) (snd y) (snd z) i))
(λ x y z i → (·ADistL+ (fst x) (fst y) (fst z) i) , (·BDistL+ (snd x) (snd y) (snd z) i))
module Coproduct-Equiv
{Xr@(X , Xstr) : Ring ℓ}
{Yr@(Y , Ystr) : Ring ℓ'}
{X'r@(X' , X'str) : Ring ℓ''}
{Y'r@(Y' , Y'str) : Ring ℓ'''}
where
open Iso
open IsRingHom
open RingStr
_+X×X'_ : X × X' → X × X' → X × X'
_+X×X'_ = _+_ (snd (DirectProd-Ring Xr X'r))
_+Y×Y'_ : Y × Y' → Y × Y' → Y × Y'
_+Y×Y'_ = _+_ (snd (DirectProd-Ring Yr Y'r))
_·X×X'_ : X × X' → X × X' → X × X'
_·X×X'_ = _·_ (snd (DirectProd-Ring Xr X'r))
_·Y×Y'_ : Y × Y' → Y × Y' → Y × Y'
_·Y×Y'_ = _·_ (snd (DirectProd-Ring Yr Y'r))
re×re' : (re : RingEquiv Xr Yr) → (re' : RingEquiv X'r Y'r) → (X × X') ≃ (Y × Y')
re×re' re re' = ≃-× (fst re) (fst re')
Coproduct-Equiv-12 : (re : RingEquiv Xr Yr) → (re' : RingEquiv X'r Y'r) →
RingEquiv (DirectProd-Ring Xr X'r) (DirectProd-Ring Yr Y'r)
fst (Coproduct-Equiv-12 re re') = re×re' re re'
snd (Coproduct-Equiv-12 re re') = makeIsRingHom fun-pres1 fun-pres+ fun-pres·
where
fun-pres1 : (fst (re×re' re re')) (1r Xstr , 1r X'str) ≡ (1r (Yr .snd) , 1r (Y'r .snd))
fun-pres1 = ≡-× (pres1 (snd re)) (pres1 (snd re'))
fun-pres+ : (x1 x2 : X × X') → (fst (re×re' re re')) (x1 +X×X' x2) ≡ (( (fst (re×re' re re')) x1) +Y×Y' ( (fst (re×re' re re')) x2))
fun-pres+ (x1 , x'1) (x2 , x'2) = ≡-× (pres+ (snd re) x1 x2) (pres+ (snd re') x'1 x'2)
fun-pres· : (x1 x2 : X × X') → (fst (re×re' re re')) (x1 ·X×X' x2) ≡ (( (fst (re×re' re re')) x1) ·Y×Y' ( (fst (re×re' re re')) x2))
fun-pres· (x1 , x'1) (x2 , x'2) = ≡-× (pres· (snd re) x1 x2) (pres· (snd re') x'1 x'2)
|
oeis/217/A217579.asm | neoneye/loda-programs | 11 | 104901 | ; A217579: a(1) = 1; for n > 1, a(n) = max(d*lpf(d) : d|n, d > 1), where lpf is the least prime factor function (A020639).
; Submitted by <NAME>
; 1,4,9,8,25,12,49,16,27,25,121,24,169,49,45,32,289,36,361,40,63,121,529,48,125,169,81,56,841,60,961,64,121,289,175,72,1369,361,169,80,1681,84,1849,121,135,529,2209,96,343,125,289,169,2809,108,275,112,361,841,3481,120,3721,961,189,128,325,132,4489,289,529,175,5041,144,5329,1369,225,361,539,169,6241,160,243,1681,6889,168,425,1849,841,176,7921,180,637,529,961,2209,475,192,9409,343,297,200
add $0,1
mov $1,1
mov $2,1
lpb $0
mov $3,$0
lpb $3
mov $4,$0
mod $4,$2
cmp $4,0
cmp $4,0
mov $5,$2
add $2,1
cmp $5,1
max $4,$5
sub $3,$4
lpe
mov $5,1
lpb $0
dif $0,$2
mul $5,$2
lpe
max $1,$2
mul $1,$5
lpe
mov $0,$1
|
source/streams/a-ssiona.ads | ytomino/drake | 33 | 14790 | pragma License (Unrestricted);
-- implementation unit
with Ada.Streams.Naked_Stream_IO;
with System.Native_IO;
package Ada.Streams.Stream_IO.Naked is
pragma Preelaborate;
-- handle
procedure Open (
File : in out File_Type;
Mode : File_Mode;
Handle : System.Native_IO.Handle_Type;
Name : String := "";
Form : System.Native_IO.Packed_Form := Naked_Stream_IO.Default_Form;
To_Close : Boolean := False);
function Handle (File : File_Type) return System.Native_IO.Handle_Type;
pragma Inline (Handle);
-- naked
function Non_Controlled (File : File_Type)
return not null access Naked_Stream_IO.Non_Controlled_File_Type;
pragma Inline (Non_Controlled); -- renamed
private
function Non_Controlled (File : File_Type)
return not null access Naked_Stream_IO.Non_Controlled_File_Type
renames Controlled.Reference;
end Ada.Streams.Stream_IO.Naked;
|
theorems/homotopy/EM1HSpaceAssoc.agda | AntoineAllioux/HoTT-Agda | 294 | 306 | <reponame>AntoineAllioux/HoTT-Agda
{-# OPTIONS --without-K --rewriting #-}
open import HoTT
open import homotopy.HSpace
open import homotopy.EM1HSpace
open import homotopy.EilenbergMacLane1 using (EM₁-level₁)
open import lib.types.TwoSemiCategory
open import lib.two-semi-categories.FundamentalCategory
module homotopy.EM1HSpaceAssoc where
module EM₁HSpaceAssoc {i} (G : AbGroup i) where
private
module G = AbGroup G
open EM₁HSpace G public
private
module H-⊙EM₁ = HSpaceStructure H-⊙EM₁
mult-loop-assoc : (g : G.El) (y z : EM₁ G.grp)
→ mult-loop g (mult y z) == ap (λ x' → mult x' z) (mult-loop g y)
mult-loop-assoc g y z =
EM₁-prop-elim {P = λ y → mult-loop g (mult y z) == ap (λ x' → mult x' z) (mult-loop g y)}
{{λ y → has-level-apply (has-level-apply (EM₁-level₁ G.grp) _ _) _ _}}
base' y
where
base' : mult-loop g (mult embase z) == ap (λ x' → mult x' z) (mult-loop g embase)
base' = ! (mult-emloop-β g z)
H-⊙EM₁-assoc : (x y z : EM₁ G.grp) → mult (mult x y) z == mult x (mult y z)
H-⊙EM₁-assoc x y z =
EM₁-set-elim {P = λ x → mult (mult x y) z == mult x (mult y z)}
{{λ x → has-level-apply (EM₁-level₁ G.grp) _ _}}
idp
comp'
x
where
abstract
comp' : (g : G.El) → idp == idp [ (λ x → mult (mult x y) z == mult x (mult y z)) ↓ emloop g ]
comp' g =
↓-='-in $
idp ∙' ap (λ x → mult x (mult y z)) (emloop g)
=⟨ ∙'-unit-l _ ⟩
ap (λ x → mult x (mult y z)) (emloop g)
=⟨ mult-emloop-β g (mult y z) ⟩
mult-loop g (mult y z)
=⟨ mult-loop-assoc g y z ⟩
ap (λ v → mult v z) (mult-loop g y)
=⟨ ap (ap (λ v → mult v z)) (! (mult-emloop-β g y)) ⟩
ap (λ v → mult v z) (ap (λ x → mult x y) (emloop g))
=⟨ ∘-ap (λ v → mult v z) (λ x → mult x y) (emloop g) ⟩
ap (λ x → mult (mult x y) z) (emloop g)
=⟨ ! (∙-unit-r _) ⟩
ap (λ x → mult (mult x y) z) (emloop g) ∙ idp =∎
H-EM₁-assoc-coh-unit-l : coh-unit-l H-⊙EM₁ H-⊙EM₁-assoc
H-EM₁-assoc-coh-unit-l x y = =ₛ-in idp
H-EM₁-assoc-coh-unit-r : coh-unit-r H-⊙EM₁ H-⊙EM₁-assoc
H-EM₁-assoc-coh-unit-r =
EM₁-prop-elim {P = λ x → ∀ y → P x y} {{λ x → Π-level (P-level x)}}
(EM₁-prop-elim {P = P embase} {{P-level embase}} (=ₛ-in idp))
where
P : EM₁ G.grp → EM₁ G.grp → Type i
P = coh-unit-r-eq H-⊙EM₁ H-⊙EM₁-assoc
P-level : ∀ x y → is-prop (P x y)
P-level x y = =ₛ-level (EM₁-level₁ G.grp)
H-EM₁-assoc-coh-unit-l-r-pentagon : coh-unit-l-r-pentagon H-⊙EM₁ H-⊙EM₁-assoc
H-EM₁-assoc-coh-unit-l-r-pentagon =
coh-unit-l-to-unit-l-r-pentagon H-⊙EM₁ H-⊙EM₁-assoc H-EM₁-assoc-coh-unit-l
import homotopy.Pi2HSuspCompose H-⊙EM₁ H-⊙EM₁-assoc H-EM₁-assoc-coh-unit-l-r-pentagon as Pi2EMSuspCompose
open Pi2EMSuspCompose hiding (comp-functor) public
abstract
H-EM₁-assoc-pentagon : coh-assoc-pentagon H-⊙EM₁ H-⊙EM₁-assoc
H-EM₁-assoc-pentagon w x y z =
EM₁-prop-elim {P = λ w' → P w' x y z} {{λ w' → P-level w' x y z}}
(EM₁-prop-elim {P = λ x' → P embase x' y z} {{λ x' → P-level embase x' y z}} (=ₛ-in idp) x)
w
where
P : (w x y z : EM₁ G.grp) → Type i
P = coh-assoc-pentagon-eq H-⊙EM₁ H-⊙EM₁-assoc
P-level : ∀ w x y z → is-prop (P w x y z)
P-level w x y z = =ₛ-level (EM₁-level₁ G.grp)
EM₁-2-semi-category : TwoSemiCategory lzero i
EM₁-2-semi-category = HSpace-2-semi-category H-⊙EM₁ H-⊙EM₁-assoc H-EM₁-assoc-pentagon
comp-functor :
TwoSemiFunctor
EM₁-2-semi-category
(=ₜ-fundamental-cat (Susp (EM₁ G.grp)))
comp-functor =
record
{ F₀ = λ _ → [ north ]
; F₁ = λ x → [ η x ]
; pres-comp = comp
; pres-comp-coh = comp-coh
}
-- this is *exactly* the same as
-- `Pi2EMSuspCompose.comp-functor H-EM₁-assoc-pentagon`
-- inlined but Agda chokes on this shorter definition
|
asm/codes/hijack/reset_lag_counter.asm | brikr/practice-rom-patcher | 2 | 88806 | // Lag Frame Counter Reset on L
scope LagFrameCounterReset: {
lui t0, 0x8034
lb at, 0x9C31 (t0)
addiu v0, r0, 0x0020
bne at, v0, End // D0339C31 0020
nop
sw r0, 0x9F28 (t0) // 81339F28 0000 & 81339F2A 0000
End:
}
// Automatically Reset Counter at Star Select
scope LagFrameCounterAutoReset: {
lui t0, 0x8034
lb at, 0x9EC9 (t0)
addiu v0, r0, 0x0004
bne at, v0, End // D0339EC9 0004
nop
sw r0, 0x9F28 (t0) // 81339F28 0000 & 81339F2A 0000
End:
}
// Hide BUF Text
lui t0, 0x8033
addiu v0, r0, 0x2564
sh v0, 0x4A70 (t0) // 81334A70 2564
sb r0, 0x4A72 (t0) // 80334A72 0000
|
oeis/115/A115147.asm | neoneye/loda-programs | 11 | 15972 | <filename>oeis/115/A115147.asm
; A115147: Eighth convolution of A115140.
; Submitted by <NAME>
; 1,-8,20,-16,2,0,0,0,-1,-8,-44,-208,-910,-3808,-15504,-62016,-245157,-961400,-3749460,-14567280,-56448210,-218349120,-843621600,-3257112960,-12570420330,-48507033744,-187187399448,-722477682080,-2789279908316,-10772391370048,-41620603020640,-160878516023680,-622147386185325,-2407144796004312,-9318155533853796,-36089364289846448,-139846286623154986,-542181316264981120,-2103092789933110976,-8161878718251577088,-31691044710711201662,-123110222468217351024,-478474604130676679400
mov $2,2
mul $2,$0
sub $2,9
mov $1,$2
bin $1,$0
sub $0,1
bin $2,$0
sub $1,$2
mov $0,$1
|
include/sf-graphics-texture.ads | Fabien-Chouteau/ASFML | 0 | 18158 | <gh_stars>0
--//////////////////////////////////////////////////////////
-- SFML - Simple and Fast Multimedia Library
-- Copyright (C) 2007-2018 <NAME> (<EMAIL>)
-- This software is provided 'as-is', without any express or implied warranty.
-- In no event will the authors be held liable for any damages arising from the use of this software.
-- Permission is granted to anyone to use this software for any purpose,
-- including commercial applications, and to alter it and redistribute it freely,
-- subject to the following restrictions:
-- 1. The origin of this software must not be misrepresented;
-- you must not claim that you wrote the original software.
-- If you use this software in a product, an acknowledgment
-- in the product documentation would be appreciated but is not required.
-- 2. Altered source versions must be plainly marked as such,
-- and must not be misrepresented as being the original software.
-- 3. This notice may not be removed or altered from any source distribution.
--//////////////////////////////////////////////////////////
--//////////////////////////////////////////////////////////
with Sf.Graphics.Rect;
with Sf.System.InputStream;
with Sf.System.Vector2;
with Sf.Window;
package Sf.Graphics.Texture is
--//////////////////////////////////////////////////////////
--//////////////////////////////////////////////////////////
--//////////////////////////////////////////////////////////
--/ @brief Create a new texture
--/
--/ @param width Texture width
--/ @param height Texture height
--/
--/ @return A new sfTexture object, or NULL if it failed
--/
--//////////////////////////////////////////////////////////
function create (width : sfUint32; height : sfUint32) return sfTexture_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Create a new texture from a file
--/
--/ @param filename Path of the image file to load
--/ @param area Area of the source image to load (NULL to load the entire image)
--/
--/ @return A new sfTexture object, or NULL if it failed
--/
--//////////////////////////////////////////////////////////
function createFromFile
(filename : String;
area : access constant Sf.Graphics.Rect.sfIntRect := Sf.Graphics.Rect.sfNullRectangle'Access)
return sfTexture_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Create a new texture from a file in memory
--/
--/ @param data Pointer to the file data in memory
--/ @param sizeInBytes Size of the data to load, in bytes
--/ @param area Area of the source image to load (NULL to load the entire image)
--/
--/ @return A new sfTexture object, or NULL if it failed
--/
--//////////////////////////////////////////////////////////
function createFromMemory
(data : Standard.System.Address;
sizeInBytes : sfSize_t;
area : access constant Sf.Graphics.Rect.sfIntRect := Sf.Graphics.Rect.sfNullRectangle'Access)
return sfTexture_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Create a new texture from a custom stream
--/
--/ @param stream Source stream to read from
--/ @param area Area of the source image to load (NULL to load the entire image)
--/
--/ @return A new sfTexture object, or NULL if it failed
--/
--//////////////////////////////////////////////////////////
function createFromStream
(stream : access Sf.System.InputStream.sfInputStream;
area : access constant Sf.Graphics.Rect.sfIntRect := Sf.Graphics.Rect.sfNullRectangle'Access)
return sfTexture_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Create a new texture from an image
--/
--/ @param image Image to upload to the texture
--/ @param area Area of the source image to load (NULL to load the entire image)
--/
--/ @return A new sfTexture object, or NULL if it failed
--/
--//////////////////////////////////////////////////////////
function createFromImage
(image : sfImage_Ptr;
area : access constant Sf.Graphics.Rect.sfIntRect := Sf.Graphics.Rect.sfNullRectangle'Access)
return sfTexture_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Copy an existing texture
--/
--/ @param texture Texture to copy
--/
--/ @return Copied object
--/
--//////////////////////////////////////////////////////////
function copy (texture : sfTexture_Ptr) return sfTexture_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Destroy an existing texture
--/
--/ @param texture Texture to delete
--/
--//////////////////////////////////////////////////////////
procedure destroy (texture : sfTexture_Ptr);
--//////////////////////////////////////////////////////////
--/ @brief Return the size of the texture
--/
--/ @param texture Texture to read
--/
--/ @return Size in pixels
--/
--//////////////////////////////////////////////////////////
function getSize (texture : sfTexture_Ptr) return Sf.System.Vector2.sfVector2u;
--//////////////////////////////////////////////////////////
--/ @brief Copy a texture's pixels to an image
--/
--/ @param texture Texture to copy
--/
--/ @return Image containing the texture's pixels
--/
--//////////////////////////////////////////////////////////
function copyToImage (texture : sfTexture_Ptr) return sfImage_Ptr;
--//////////////////////////////////////////////////////////
--/ @brief Update a texture from an array of pixels
--/
--/ @param texture Texture to update
--/ @param pixels Array of pixels to copy to the texture
--/ @param width Width of the pixel region contained in @a pixels
--/ @param height Height of the pixel region contained in @a pixels
--/ @param x X offset in the texture where to copy the source pixels
--/ @param y Y offset in the texture where to copy the source pixels
--/
--//////////////////////////////////////////////////////////
procedure updateFromPixels
(texture : sfTexture_Ptr;
pixels : access sfUint8;
width : sfUint32;
height : sfUint32;
x : sfUint32;
y : sfUint32);
--//////////////////////////////////////////////////////////
--/ @brief Update a texture from an image
--/
--/ @param texture Texture to update
--/ @param image Image to copy to the texture
--/ @param x X offset in the texture where to copy the source pixels
--/ @param y Y offset in the texture where to copy the source pixels
--/
--//////////////////////////////////////////////////////////
procedure updateFromImage
(texture : sfTexture_Ptr;
image : sfImage_Ptr;
x : sfUint32;
y : sfUint32);
--//////////////////////////////////////////////////////////
--/ @brief Update a texture from the contents of a window
--/
--/ @param texture Texture to update
--/ @param window Window to copy to the texture
--/ @param x X offset in the texture where to copy the source pixels
--/ @param y Y offset in the texture where to copy the source pixels
--/
--//////////////////////////////////////////////////////////
procedure updateFromWindow
(texture : sfTexture_Ptr;
window : sf.Window.sfWindow_Ptr;
x : sfUint32;
y : sfUint32);
--//////////////////////////////////////////////////////////
--/ @brief Update a texture from the contents of a render-window
--/
--/ @param texture Texture to update
--/ @param renderWindow Render-window to copy to the texture
--/ @param x X offset in the texture where to copy the source pixels
--/ @param y Y offset in the texture where to copy the source pixels
--/
--//////////////////////////////////////////////////////////
procedure updateFromRenderWindow
(texture : sfTexture_Ptr;
renderWindow : sfRenderWindow_Ptr;
x : sfUint32;
y : sfUint32);
--//////////////////////////////////////////////////////////
--/ @brief Enable or disable the smooth filter on a texture
--/
--/ @param texture The texture object
--/ @param smooth sfTrue to enable smoothing, sfFalse to disable it
--/
--//////////////////////////////////////////////////////////
procedure setSmooth (texture : sfTexture_Ptr; smooth : sfBool);
--//////////////////////////////////////////////////////////
--/ @brief Tell whether the smooth filter is enabled or not for a texture
--/
--/ @param texture The texture object
--/
--/ @return sfTrue if smoothing is enabled, sfFalse if it is disabled
--/
--//////////////////////////////////////////////////////////
function isSmooth (texture : sfTexture_Ptr) return sfBool;
--//////////////////////////////////////////////////////////
--/ @brief Enable or disable conversion from sRGB
--/
--/ When providing texture data from an image file or memory, it can
--/ either be stored in a linear color space or an sRGB color space.
--/ Most digital images account for gamma correction already, so they
--/ would need to be "uncorrected" back to linear color space before
--/ being processed by the hardware. The hardware can automatically
--/ convert it from the sRGB color space to a linear color space when
--/ it gets sampled. When the rendered image gets output to the final
--/ framebuffer, it gets converted back to sRGB.
--/
--/ After enabling or disabling sRGB conversion, make sure to reload
--/ the texture data in order for the setting to take effect.
--/
--/ This option is only useful in conjunction with an sRGB capable
--/ framebuffer. This can be requested during window creation.
--/
--/ @param sRgb True to enable sRGB conversion, false to disable it
--/
--/ @see sfTexture_isSrgb
--/
--//////////////////////////////////////////////////////////
procedure setSrgb (texture : sfTexture_Ptr; sRgb : sfBool);
--//////////////////////////////////////////////////////////
--/ @brief Tell whether the texture source is converted from sRGB or not
--/
--/ @return True if the texture source is converted from sRGB, false if not
--/
--/ @see sfTexture_setSrgb
--/
--//////////////////////////////////////////////////////////
function isSrgb (texture : sfTexture_Ptr) return sfBool;
--//////////////////////////////////////////////////////////
--/ @brief Enable or disable repeating for a texture
--/
--/ Repeating is involved when using texture coordinates
--/ outside the texture rectangle [0, 0, width, height].
--/ In this case, if repeat mode is enabled, the whole texture
--/ will be repeated as many times as needed to reach the
--/ coordinate (for example, if the X texture coordinate is
--/ 3 * width, the texture will be repeated 3 times).
--/ If repeat mode is disabled, the "extra space" will instead
--/ be filled with border pixels.
--/ Warning: on very old graphics cards, white pixels may appear
--/ when the texture is repeated. With such cards, repeat mode
--/ can be used reliably only if the texture has power-of-two
--/ dimensions (such as 256x128).
--/ Repeating is disabled by default.
--/
--/ @param texture The texture object
--/ @param repeated True to repeat the texture, false to disable repeating
--/
--//////////////////////////////////////////////////////////
procedure setRepeated (texture : sfTexture_Ptr; repeated : sfBool);
--//////////////////////////////////////////////////////////
--/ @brief Tell whether a texture is repeated or not
--/
--/ @param texture The texture object
--/
--/ @return sfTrue if repeat mode is enabled, sfFalse if it is disabled
--/
--//////////////////////////////////////////////////////////
function isRepeated (texture : sfTexture_Ptr) return sfBool;
--//////////////////////////////////////////////////////////
--/ @brief Generate a mipmap using the current texture data
--/
--/ Mipmaps are pre-computed chains of optimized textures. Each
--/ level of texture in a mipmap is generated by halving each of
--/ the previous level's dimensions. This is done until the final
--/ level has the size of 1x1. The textures generated in this process may
--/ make use of more advanced filters which might improve the visual quality
--/ of textures when they are applied to objects much smaller than they are.
--/ This is known as minification. Because fewer texels (texture elements)
--/ have to be sampled from when heavily minified, usage of mipmaps
--/ can also improve rendering performance in certain scenarios.
--/
--/ Mipmap generation relies on the necessary OpenGL extension being
--/ available. If it is unavailable or generation fails due to another
--/ reason, this function will return false. Mipmap data is only valid from
--/ the time it is generated until the next time the base level image is
--/ modified, at which point this function will have to be called again to
--/ regenerate it.
--/
--/ @return sfTrue if mipmap generation was successful, sfFalse if unsuccessful
--/
--//////////////////////////////////////////////////////////
function generateMipmap (texture : sfTexture_Ptr) return sfBool;
--//////////////////////////////////////////////////////////
--/ @brief Swap the contents of a texture with those of another
--/
--/ @param left Instance to swap from
--/ @param right Instance to swap with
--/
--//////////////////////////////////////////////////////////
procedure swap (left : sfTexture_Ptr; right : sfTexture_Ptr);
--//////////////////////////////////////////////////////////
--/ @brief Get the underlying OpenGL handle of the texture.
--/
--/ You shouldn't need to use this function, unless you have
--/ very specific stuff to implement that SFML doesn't support,
--/ or implement a temporary workaround until a bug is fixed.
--/
--/ @param texture The texture object
--/
--/ @return OpenGL handle of the texture or 0 if not yet created
--/
--//////////////////////////////////////////////////////////
function getNativeHandle (texture : sfTexture_Ptr) return sfUint32;
--//////////////////////////////////////////////////////////
--/ @brief Bind a texture for rendering
--/
--/ This function is not part of the graphics API, it mustn't be
--/ used when drawing SFML entities. It must be used only if you
--/ mix sfTexture with OpenGL code.
--/
--/ @code
--/ sfTexture *t1, *t2;
--/ ...
--/ sfTexture_bind(t1);
--/ // draw OpenGL stuff that use t1...
--/ sfTexture_bind(t2);
--/ // draw OpenGL stuff that use t2...
--/ sfTexture_bind(NULL);
--/ // draw OpenGL stuff that use no texture...
--/ @endcode
--/
--/ @param texture Pointer to the texture to bind, can be null to use no texture
--/
--//////////////////////////////////////////////////////////
procedure bind (texture : sfTexture_Ptr);
--//////////////////////////////////////////////////////////
--/ @brief Get the maximum texture size allowed
--/
--/ @return Maximum size allowed for textures, in pixels
--/
--//////////////////////////////////////////////////////////
function getMaximumSize return sfUint32;
private
pragma Import (C, create, "sfTexture_create");
pragma Import (C, createFromMemory, "sfTexture_createFromMemory");
pragma Import (C, createFromStream, "sfTexture_createFromStream");
pragma Import (C, createFromImage, "sfTexture_createFromImage");
pragma Import (C, copy, "sfTexture_copy");
pragma Import (C, destroy, "sfTexture_destroy");
pragma Import (C, getSize, "sfTexture_getSize");
pragma Import (C, copyToImage, "sfTexture_copyToImage");
pragma Import (C, updateFromPixels, "sfTexture_updateFromPixels");
pragma Import (C, updateFromImage, "sfTexture_updateFromImage");
pragma Import (C, updateFromWindow, "sfTexture_updateFromWindow");
pragma Import (C, updateFromRenderWindow, "sfTexture_updateFromRenderWindow");
pragma Import (C, setSmooth, "sfTexture_setSmooth");
pragma Import (C, isSmooth, "sfTexture_isSmooth");
pragma Import (C, setSrgb, "sfTexture_setSrgb");
pragma Import (C, isSrgb, "sfTexture_isSrgb");
pragma Import (C, setRepeated, "sfTexture_setRepeated");
pragma Import (C, isRepeated, "sfTexture_isRepeated");
pragma Import (C, generateMipmap, "sfTexture_generateMipmap");
pragma Import (C, swap, "sfTexture_swap");
pragma Import (C, getNativeHandle, "sfTexture_getNativeHandle");
pragma Import (C, bind, "sfTexture_bind");
pragma Import (C, getMaximumSize, "sfTexture_getMaximumSize");
end Sf.Graphics.Texture;
|
smsq/atari/kbd/lang.asm | olifink/smsqe | 0 | 178374 | ; base area SMSQ ATARI ST Keyboard Tables
section header
xref kbdu_tab
xref kbde_tab
xref kbdd_tab
xref kbdf_tab
xref kbdn_tab
xref kbdk_tab
xref kbes_tab
xref kbd_nsid
xref kbdf_nsid
xref smsq_end
include 'dev8_keys_qdos_sms'
include 'dev8_keys_ldm'
header_base
dc.l kbd_base-header_base ; length of header
dc.l 0 ; module length unknown
dc.l smsq_end-kbd_base ; loaded length
dc.l 0 ; checksum
dc.l 0 ; no select
dc.b 1 ; 1 level down
dc.b 0
dc.w smsq_name-*
smsq_name
dc.w 26,'SMSQ Atari Keyboard Tables'
dc.l ' '
dc.w $200a
section base
kbd_base
lea kbd_def,a1 ; link in keyboard tables
moveq #sms.lldm,d0
trap #do.sms2
rts
kbd_def
dc.w ldm.kbdt,0,1 ; USA
dc.w 6
dc.l kbd_usa-*
dc.w ldm.kbdt,0,44 ; English
dc.w 6
dc.l kbd_eng-*
dc.w ldm.kbdt,0,49 ; German
dc.w 6
dc.l kbd_deu-*
dc.w ldm.kbdt,0,33 ; French
dc.w 6
dc.l kbd_fra-*
dc.w ldm.kbdt,0,47 ; Norwegian
dc.w 6
dc.l kbd_nor-*
dc.w ldm.kbdt,0,45 ; Denmark
dc.w 6
dc.l kbd_dk-*
dc.w ldm.kbdt,0,34 ; Spain
dc.w 0
dc.l kbd_esp-*
kbd_usa dc.w 44
dc.w kbdu_tab-*,kbd_nsid-*-2
kbd_eng dc.w 44
dc.w kbde_tab-*,kbd_nsid-*-2
kbd_deu dc.w 49
dc.w kbdd_tab-*,kbd_nsid-*-2
kbd_fra dc.w 33
dc.w kbdf_tab-*,kbdf_nsid-*-2
kbd_nor dc.w 47
dc.w kbdn_tab-*,kbd_nsid-*-2
kbd_dk dc.w 45
dc.w kbdk_tab-*,kbd_nsid-*-2
kbd_esp dc.w 34
dc.w kbes_tab-*,kbd_nsid-*-2
end
|
include/sf.ads | Fabien-Chouteau/ASFML | 0 | 6956 | <filename>include/sf.ads
--//////////////////////////////////////////////////////////
-- //
-- // SFML - Simple and Fast Multimedia Library
-- // Copyright (C) 2007-2009 <NAME> (<EMAIL>)
-- //
-- // This software is provided 'as-is', without any express or implied warranty.
-- // In no event will the authors be held liable for any damages arising from the use of this software.
-- //
-- // Permission is granted to anyone to use this software for any purpose,
-- // including commercial applications, and to alter it and redistribute it freely,
-- // subject to the following restrictions:
-- //
-- // 1. The origin of this software must not be misrepresented;
-- // you must not claim that you wrote the original software.
-- // If you use this software in a product, an acknowledgment
-- // in the product documentation would be appreciated but is not required.
-- //
-- // 2. Altered source versions must be plainly marked as such,
-- // and must not be misrepresented as being the original software.
-- //
-- // 3. This notice may not be removed or altered from any source distribution.
-- //
--//////////////////////////////////////////////////////////
--//////////////////////////////////////////////////////////
-- SFML - Simple and Fast Multimedia Library
-- Copyright (C) 2007-2015 <NAME> (<EMAIL>)
-- This software is provided 'as-is', without any express or implied warranty.
-- In no event will the authors be held liable for any damages arising from the use of this software.
-- Permission is granted to anyone to use this software for any purpose,
-- including commercial applications, and to alter it and redistribute it freely,
-- subject to the following restrictions:
-- 1. The origin of this software must not be misrepresented;
-- you must not claim that you wrote the original software.
-- If you use this software in a product, an acknowledgment
-- in the product documentation would be appreciated but is not required.
-- 2. Altered source versions must be plainly marked as such,
-- and must not be misrepresented as being the original software.
-- 3. This notice may not be removed or altered from any source distribution.
--//////////////////////////////////////////////////////////
--//////////////////////////////////////////////////////////
with Interfaces.C;
with System;
with Ada.Strings.Unbounded;
--/ @image ASFML_Logo.svg
--/ @summary
--/ ASFML: Ada binding to the SFML library
--/
--/ @description
--/ Root package of all the packages provided by SFML. Direct children are the
--/ SFML modules: Audio, Graphics, Network, System and Window.
package Sf is
--//////////////////////////////////////////////////////////
-- // Define the CSFML version
--//////////////////////////////////////////////////////////
Version_Major : constant := 2;
Version_Minor : constant := 5;
Version_Patch : constant := 0;
--//////////////////////////////////////////////////////////
-- // Define a portable boolean type
--//////////////////////////////////////////////////////////
type sfBool is new Boolean;
for sfBool'Size use Interfaces.C.Int'Size;
for sfBool use (False => 0, True => 1);
sfFalse : sfBool renames False;
sfTrue : sfBool renames True;
--//////////////////////////////////////////////////////////
-- // Define portable types
--//////////////////////////////////////////////////////////
-- // 8 bits integer types
type sfInt8 is range -128 .. 127;
for sfInt8'SIZE use 8;
type sfInt8_Ptr is access all sfInt8;
pragma Convention (C, sfInt8);
pragma Convention (C, sfInt8_Ptr);
type sfUint8 is mod 256;
for sfUint8'SIZE use 8;
type sfUint8_Ptr is access all sfUint8;
pragma Convention (C, sfUint8);
pragma Convention (C, sfUint8_Ptr);
-- // 16 bits integer types
type sfInt16 is new Interfaces.Integer_16;
type sfInt16_Ptr is access all sfInt16;
pragma Convention (C, sfInt16);
pragma Convention (C, sfInt16_Ptr);
type sfUint16 is mod 2 ** sfInt16'SIZE;
type sfUint16_Ptr is access all sfUint16;
pragma Convention (C, sfUint16);
pragma Convention (C, sfUint16_Ptr);
-- // 32 bits integer types
type sfInt32 is new Integer;
type sfInt32_Ptr is access all sfInt32;
pragma Convention (C, sfInt32);
pragma Convention (C, sfInt32_Ptr);
type sfUint32 is mod 2 ** sfInt32'SIZE;
type sfUint32_Ptr is access all sfUint32;
pragma Convention (C, sfUint32);
pragma Convention (C, sfUint32_Ptr);
-- // 64 bits integer types
type sfInt64 is new Interfaces.Integer_64;
type sfInt64_Ptr is access all sfInt64;
pragma Convention (C, sfInt64);
pragma Convention (C, sfInt64_Ptr);
type sfUint64 is new Interfaces.Unsigned_64;
type sfUint64_Ptr is access all sfUint64;
pragma Convention (C, sfUint64_Ptr);
-- // size_t
type sfSize_t is mod 2 ** Standard'ADDRESS_SIZE;
type sfSize_t_Ptr is access all sfSize_t;
pragma Convention (C, sfSize_t);
pragma Convention (C, sfSize_t_Ptr);
type sfArrayOfStrings is array (sfSize_t range <>) of
Ada.Strings.Unbounded.Unbounded_String;
end Sf;
|
programs/oeis/269/A269110.asm | neoneye/loda | 22 | 172080 | ; A269110: Numbers of unit circles packed in a triangle of smallest area admitting an equilateral triangle solution.
; 1,3,5,6,9,10,14,15,20,21
lpb $0
mov $1,$0
bin $0,10051
seq $1,101881 ; Write two numbers, skip one, write two, skip two, write two, skip three ... and so on.
lpe
add $1,1
mov $0,$1
|
src/svd/sam_svd-supc.ads | Fabien-Chouteau/samd51-hal | 1 | 6239 | pragma Style_Checks (Off);
-- This spec has been automatically generated from ATSAMD51G19A.svd
pragma Restrictions (No_Elaboration_Code);
with HAL;
with System;
package SAM_SVD.SUPC is
pragma Preelaborate;
---------------
-- Registers --
---------------
-- Interrupt Enable Clear
type SUPC_INTENCLR_Register is record
-- BOD33 Ready
BOD33RDY : Boolean := False;
-- BOD33 Detection
BOD33DET : Boolean := False;
-- BOD33 Synchronization Ready
B33SRDY : Boolean := False;
-- unspecified
Reserved_3_7 : HAL.UInt5 := 16#0#;
-- Voltage Regulator Ready
VREGRDY : Boolean := False;
-- unspecified
Reserved_9_9 : HAL.Bit := 16#0#;
-- VDDCORE Ready
VCORERDY : Boolean := False;
-- unspecified
Reserved_11_31 : HAL.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_INTENCLR_Register use record
BOD33RDY at 0 range 0 .. 0;
BOD33DET at 0 range 1 .. 1;
B33SRDY at 0 range 2 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
VREGRDY at 0 range 8 .. 8;
Reserved_9_9 at 0 range 9 .. 9;
VCORERDY at 0 range 10 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
-- Interrupt Enable Set
type SUPC_INTENSET_Register is record
-- BOD33 Ready
BOD33RDY : Boolean := False;
-- BOD33 Detection
BOD33DET : Boolean := False;
-- BOD33 Synchronization Ready
B33SRDY : Boolean := False;
-- unspecified
Reserved_3_7 : HAL.UInt5 := 16#0#;
-- Voltage Regulator Ready
VREGRDY : Boolean := False;
-- unspecified
Reserved_9_9 : HAL.Bit := 16#0#;
-- VDDCORE Ready
VCORERDY : Boolean := False;
-- unspecified
Reserved_11_31 : HAL.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_INTENSET_Register use record
BOD33RDY at 0 range 0 .. 0;
BOD33DET at 0 range 1 .. 1;
B33SRDY at 0 range 2 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
VREGRDY at 0 range 8 .. 8;
Reserved_9_9 at 0 range 9 .. 9;
VCORERDY at 0 range 10 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
-- Interrupt Flag Status and Clear
type SUPC_INTFLAG_Register is record
-- BOD33 Ready
BOD33RDY : Boolean := False;
-- BOD33 Detection
BOD33DET : Boolean := False;
-- BOD33 Synchronization Ready
B33SRDY : Boolean := False;
-- unspecified
Reserved_3_7 : HAL.UInt5 := 16#0#;
-- Voltage Regulator Ready
VREGRDY : Boolean := False;
-- unspecified
Reserved_9_9 : HAL.Bit := 16#0#;
-- VDDCORE Ready
VCORERDY : Boolean := False;
-- unspecified
Reserved_11_31 : HAL.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_INTFLAG_Register use record
BOD33RDY at 0 range 0 .. 0;
BOD33DET at 0 range 1 .. 1;
B33SRDY at 0 range 2 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
VREGRDY at 0 range 8 .. 8;
Reserved_9_9 at 0 range 9 .. 9;
VCORERDY at 0 range 10 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
-- Power and Clocks Status
type SUPC_STATUS_Register is record
-- Read-only. BOD33 Ready
BOD33RDY : Boolean;
-- Read-only. BOD33 Detection
BOD33DET : Boolean;
-- Read-only. BOD33 Synchronization Ready
B33SRDY : Boolean;
-- unspecified
Reserved_3_7 : HAL.UInt5;
-- Read-only. Voltage Regulator Ready
VREGRDY : Boolean;
-- unspecified
Reserved_9_9 : HAL.Bit;
-- Read-only. VDDCORE Ready
VCORERDY : Boolean;
-- unspecified
Reserved_11_31 : HAL.UInt21;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_STATUS_Register use record
BOD33RDY at 0 range 0 .. 0;
BOD33DET at 0 range 1 .. 1;
B33SRDY at 0 range 2 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
VREGRDY at 0 range 8 .. 8;
Reserved_9_9 at 0 range 9 .. 9;
VCORERDY at 0 range 10 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
-- Action when Threshold Crossed
type BOD33_ACTIONSelect is
(-- No action
NONE,
-- The BOD33 generates a reset
RESET,
-- The BOD33 generates an interrupt
INT,
-- The BOD33 puts the device in backup sleep mode
BKUP)
with Size => 2;
for BOD33_ACTIONSelect use
(NONE => 0,
RESET => 1,
INT => 2,
BKUP => 3);
subtype SUPC_BOD33_HYST_Field is HAL.UInt4;
-- Prescaler Select
type BOD33_PSELSelect is
(-- Not divided
NODIV,
-- Divide clock by 4
DIV4,
-- Divide clock by 8
DIV8,
-- Divide clock by 16
DIV16,
-- Divide clock by 32
DIV32,
-- Divide clock by 64
DIV64,
-- Divide clock by 128
DIV128,
-- Divide clock by 256
DIV256)
with Size => 3;
for BOD33_PSELSelect use
(NODIV => 0,
DIV4 => 1,
DIV8 => 2,
DIV16 => 3,
DIV32 => 4,
DIV64 => 5,
DIV128 => 6,
DIV256 => 7);
subtype SUPC_BOD33_LEVEL_Field is HAL.UInt8;
subtype SUPC_BOD33_VBATLEVEL_Field is HAL.UInt8;
-- BOD33 Control
type SUPC_BOD33_Register is record
-- unspecified
Reserved_0_0 : HAL.Bit := 16#0#;
-- Enable
ENABLE : Boolean := False;
-- Action when Threshold Crossed
ACTION : BOD33_ACTIONSelect := SAM_SVD.SUPC.NONE;
-- Configuration in Standby mode
STDBYCFG : Boolean := False;
-- Run in Standby mode
RUNSTDBY : Boolean := False;
-- Run in Hibernate mode
RUNHIB : Boolean := False;
-- Run in Backup mode
RUNBKUP : Boolean := False;
-- Hysteresis value
HYST : SUPC_BOD33_HYST_Field := 16#0#;
-- Prescaler Select
PSEL : BOD33_PSELSelect := SAM_SVD.SUPC.NODIV;
-- unspecified
Reserved_15_15 : HAL.Bit := 16#0#;
-- Threshold Level for VDD
LEVEL : SUPC_BOD33_LEVEL_Field := 16#0#;
-- Threshold Level in battery backup sleep mode for VBAT
VBATLEVEL : SUPC_BOD33_VBATLEVEL_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_BOD33_Register use record
Reserved_0_0 at 0 range 0 .. 0;
ENABLE at 0 range 1 .. 1;
ACTION at 0 range 2 .. 3;
STDBYCFG at 0 range 4 .. 4;
RUNSTDBY at 0 range 5 .. 5;
RUNHIB at 0 range 6 .. 6;
RUNBKUP at 0 range 7 .. 7;
HYST at 0 range 8 .. 11;
PSEL at 0 range 12 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
LEVEL at 0 range 16 .. 23;
VBATLEVEL at 0 range 24 .. 31;
end record;
-- Voltage Regulator Selection
type VREG_SELSelect is
(-- LDO selection
LDO,
-- Buck selection
BUCK)
with Size => 1;
for VREG_SELSelect use
(LDO => 0,
BUCK => 1);
subtype SUPC_VREG_VSPER_Field is HAL.UInt3;
-- VREG Control
type SUPC_VREG_Register is record
-- unspecified
Reserved_0_0 : HAL.Bit := 16#0#;
-- Enable
ENABLE : Boolean := True;
-- Voltage Regulator Selection
SEL : VREG_SELSelect := SAM_SVD.SUPC.LDO;
-- unspecified
Reserved_3_6 : HAL.UInt4 := 16#0#;
-- Run in Backup mode
RUNBKUP : Boolean := False;
-- unspecified
Reserved_8_15 : HAL.UInt8 := 16#0#;
-- Voltage Scaling Enable
VSEN : Boolean := False;
-- unspecified
Reserved_17_23 : HAL.UInt7 := 16#0#;
-- Voltage Scaling Period
VSPER : SUPC_VREG_VSPER_Field := 16#0#;
-- unspecified
Reserved_27_31 : HAL.UInt5 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_VREG_Register use record
Reserved_0_0 at 0 range 0 .. 0;
ENABLE at 0 range 1 .. 1;
SEL at 0 range 2 .. 2;
Reserved_3_6 at 0 range 3 .. 6;
RUNBKUP at 0 range 7 .. 7;
Reserved_8_15 at 0 range 8 .. 15;
VSEN at 0 range 16 .. 16;
Reserved_17_23 at 0 range 17 .. 23;
VSPER at 0 range 24 .. 26;
Reserved_27_31 at 0 range 27 .. 31;
end record;
-- Voltage Reference Selection
type VREF_SELSelect is
(-- 1.0V voltage reference typical value
Val_1V0,
-- 1.1V voltage reference typical value
Val_1V1,
-- 1.2V voltage reference typical value
Val_1V2,
-- 1.25V voltage reference typical value
Val_1V25,
-- 2.0V voltage reference typical value
Val_2V0,
-- 2.2V voltage reference typical value
Val_2V2,
-- 2.4V voltage reference typical value
Val_2V4,
-- 2.5V voltage reference typical value
Val_2V5)
with Size => 4;
for VREF_SELSelect use
(Val_1V0 => 0,
Val_1V1 => 1,
Val_1V2 => 2,
Val_1V25 => 3,
Val_2V0 => 4,
Val_2V2 => 5,
Val_2V4 => 6,
Val_2V5 => 7);
-- VREF Control
type SUPC_VREF_Register is record
-- unspecified
Reserved_0_0 : HAL.Bit := 16#0#;
-- Temperature Sensor Output Enable
TSEN : Boolean := False;
-- Voltage Reference Output Enable
VREFOE : Boolean := False;
-- Temperature Sensor Selection
TSSEL : Boolean := False;
-- unspecified
Reserved_4_5 : HAL.UInt2 := 16#0#;
-- Run during Standby
RUNSTDBY : Boolean := False;
-- On Demand Contrl
ONDEMAND : Boolean := False;
-- unspecified
Reserved_8_15 : HAL.UInt8 := 16#0#;
-- Voltage Reference Selection
SEL : VREF_SELSelect := SAM_SVD.SUPC.Val_1V0;
-- unspecified
Reserved_20_31 : HAL.UInt12 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_VREF_Register use record
Reserved_0_0 at 0 range 0 .. 0;
TSEN at 0 range 1 .. 1;
VREFOE at 0 range 2 .. 2;
TSSEL at 0 range 3 .. 3;
Reserved_4_5 at 0 range 4 .. 5;
RUNSTDBY at 0 range 6 .. 6;
ONDEMAND at 0 range 7 .. 7;
Reserved_8_15 at 0 range 8 .. 15;
SEL at 0 range 16 .. 19;
Reserved_20_31 at 0 range 20 .. 31;
end record;
-- Battery Backup Configuration
type BBPS_CONFSelect is
(-- The power switch is handled by the BOD33
BOD33,
-- In Backup Domain, the backup domain is always supplied by battery backup
-- power
FORCED)
with Size => 1;
for BBPS_CONFSelect use
(BOD33 => 0,
FORCED => 1);
-- Battery Backup Power Switch
type SUPC_BBPS_Register is record
-- Battery Backup Configuration
CONF : BBPS_CONFSelect := SAM_SVD.SUPC.BOD33;
-- unspecified
Reserved_1_1 : HAL.Bit := 16#0#;
-- Wake Enable
WAKEEN : Boolean := False;
-- unspecified
Reserved_3_31 : HAL.UInt29 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_BBPS_Register use record
CONF at 0 range 0 .. 0;
Reserved_1_1 at 0 range 1 .. 1;
WAKEEN at 0 range 2 .. 2;
Reserved_3_31 at 0 range 3 .. 31;
end record;
-- SUPC_BKOUT_ENOUT array
type SUPC_BKOUT_ENOUT_Field_Array is array (0 .. 1) of Boolean
with Component_Size => 1, Size => 2;
-- Type definition for SUPC_BKOUT_ENOUT
type SUPC_BKOUT_ENOUT_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- ENOUT as a value
Val : HAL.UInt2;
when True =>
-- ENOUT as an array
Arr : SUPC_BKOUT_ENOUT_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for SUPC_BKOUT_ENOUT_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- SUPC_BKOUT_CLROUT array
type SUPC_BKOUT_CLROUT_Field_Array is array (0 .. 1) of Boolean
with Component_Size => 1, Size => 2;
-- Type definition for SUPC_BKOUT_CLROUT
type SUPC_BKOUT_CLROUT_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- CLROUT as a value
Val : HAL.UInt2;
when True =>
-- CLROUT as an array
Arr : SUPC_BKOUT_CLROUT_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for SUPC_BKOUT_CLROUT_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- SUPC_BKOUT_SETOUT array
type SUPC_BKOUT_SETOUT_Field_Array is array (0 .. 1) of Boolean
with Component_Size => 1, Size => 2;
-- Type definition for SUPC_BKOUT_SETOUT
type SUPC_BKOUT_SETOUT_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- SETOUT as a value
Val : HAL.UInt2;
when True =>
-- SETOUT as an array
Arr : SUPC_BKOUT_SETOUT_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for SUPC_BKOUT_SETOUT_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- SUPC_BKOUT_RTCTGLOUT array
type SUPC_BKOUT_RTCTGLOUT_Field_Array is array (0 .. 1) of Boolean
with Component_Size => 1, Size => 2;
-- Type definition for SUPC_BKOUT_RTCTGLOUT
type SUPC_BKOUT_RTCTGLOUT_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- RTCTGLOUT as a value
Val : HAL.UInt2;
when True =>
-- RTCTGLOUT as an array
Arr : SUPC_BKOUT_RTCTGLOUT_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for SUPC_BKOUT_RTCTGLOUT_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- Backup Output Control
type SUPC_BKOUT_Register is record
-- Enable OUT0
ENOUT : SUPC_BKOUT_ENOUT_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_2_7 : HAL.UInt6 := 16#0#;
-- Clear OUT0
CLROUT : SUPC_BKOUT_CLROUT_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_10_15 : HAL.UInt6 := 16#0#;
-- Set OUT0
SETOUT : SUPC_BKOUT_SETOUT_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_18_23 : HAL.UInt6 := 16#0#;
-- RTC Toggle OUT0
RTCTGLOUT : SUPC_BKOUT_RTCTGLOUT_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_26_31 : HAL.UInt6 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_BKOUT_Register use record
ENOUT at 0 range 0 .. 1;
Reserved_2_7 at 0 range 2 .. 7;
CLROUT at 0 range 8 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
SETOUT at 0 range 16 .. 17;
Reserved_18_23 at 0 range 18 .. 23;
RTCTGLOUT at 0 range 24 .. 25;
Reserved_26_31 at 0 range 26 .. 31;
end record;
-- SUPC_BKIN_BKIN array
type SUPC_BKIN_BKIN_Field_Array is array (0 .. 1) of Boolean
with Component_Size => 1, Size => 2;
-- Type definition for SUPC_BKIN_BKIN
type SUPC_BKIN_BKIN_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- BKIN as a value
Val : HAL.UInt2;
when True =>
-- BKIN as an array
Arr : SUPC_BKIN_BKIN_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for SUPC_BKIN_BKIN_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- Backup Input Control
type SUPC_BKIN_Register is record
-- Read-only. Backup Input 0
BKIN : SUPC_BKIN_BKIN_Field;
-- unspecified
Reserved_2_31 : HAL.UInt30;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_BKIN_Register use record
BKIN at 0 range 0 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- Supply Controller
type SUPC_Peripheral is record
-- Interrupt Enable Clear
INTENCLR : aliased SUPC_INTENCLR_Register;
-- Interrupt Enable Set
INTENSET : aliased SUPC_INTENSET_Register;
-- Interrupt Flag Status and Clear
INTFLAG : aliased SUPC_INTFLAG_Register;
-- Power and Clocks Status
STATUS : aliased SUPC_STATUS_Register;
-- BOD33 Control
BOD33 : aliased SUPC_BOD33_Register;
-- VREG Control
VREG : aliased SUPC_VREG_Register;
-- VREF Control
VREF : aliased SUPC_VREF_Register;
-- Battery Backup Power Switch
BBPS : aliased SUPC_BBPS_Register;
-- Backup Output Control
BKOUT : aliased SUPC_BKOUT_Register;
-- Backup Input Control
BKIN : aliased SUPC_BKIN_Register;
end record
with Volatile;
for SUPC_Peripheral use record
INTENCLR at 16#0# range 0 .. 31;
INTENSET at 16#4# range 0 .. 31;
INTFLAG at 16#8# range 0 .. 31;
STATUS at 16#C# range 0 .. 31;
BOD33 at 16#10# range 0 .. 31;
VREG at 16#18# range 0 .. 31;
VREF at 16#1C# range 0 .. 31;
BBPS at 16#20# range 0 .. 31;
BKOUT at 16#24# range 0 .. 31;
BKIN at 16#28# range 0 .. 31;
end record;
-- Supply Controller
SUPC_Periph : aliased SUPC_Peripheral
with Import, Address => SUPC_Base;
end SAM_SVD.SUPC;
|
Transynther/x86/_processed/NONE/_zr_/i9-9900K_12_0xa0.log_21829_250.asm | ljhsiun2/medusa | 9 | 244272 | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %r8
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0xda16, %rsi
lea addresses_UC_ht+0x1911a, %rdi
add $25119, %r10
mov $92, %rcx
rep movsb
add $28325, %r8
lea addresses_WC_ht+0x19a9a, %r15
nop
dec %rax
mov $0x6162636465666768, %rsi
movq %rsi, (%r15)
nop
sub %rax, %rax
lea addresses_WT_ht+0x15d6, %rsi
lea addresses_normal_ht+0x1a0da, %rdi
nop
nop
and $21041, %rbp
mov $111, %rcx
rep movsb
nop
nop
nop
nop
inc %r10
lea addresses_WT_ht+0x1009a, %rsi
lea addresses_D_ht+0x18f9a, %rdi
nop
nop
nop
lfence
mov $83, %rcx
rep movsq
nop
nop
nop
dec %r8
lea addresses_WC_ht+0x9b9a, %rax
nop
nop
nop
nop
inc %r15
mov $0x6162636465666768, %rdi
movq %rdi, (%rax)
nop
nop
nop
nop
nop
xor $31879, %rdi
lea addresses_WC_ht+0x787e, %r10
nop
nop
nop
nop
sub %rax, %rax
movb $0x61, (%r10)
nop
nop
nop
nop
nop
and %r10, %r10
lea addresses_A_ht+0x999a, %rsi
nop
and %r10, %r10
mov $0x6162636465666768, %rdi
movq %rdi, %xmm5
and $0xffffffffffffffc0, %rsi
vmovaps %ymm5, (%rsi)
nop
nop
nop
nop
inc %rdi
lea addresses_UC_ht+0x12642, %rbp
cmp %r8, %r8
movw $0x6162, (%rbp)
nop
cmp %rcx, %rcx
lea addresses_WT_ht+0x1d69a, %rax
nop
nop
inc %rcx
mov $0x6162636465666768, %r10
movq %r10, %xmm5
vmovups %ymm5, (%rax)
xor $26243, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r8
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r14
push %r8
push %r9
push %rsi
// Faulty Load
lea addresses_A+0x9b9a, %r9
add %r14, %r14
mov (%r9), %esi
lea oracles, %r14
and $0xff, %rsi
shlq $12, %rsi
mov (%r14,%rsi,1), %rsi
pop %rsi
pop %r9
pop %r8
pop %r14
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': True, 'size': 16}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 2, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 6, 'type': 'addresses_UC_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8}}
{'src': {'same': False, 'congruent': 1, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 5, 'type': 'addresses_normal_ht'}}
{'src': {'same': True, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_D_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 2, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 1}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_A_ht', 'AVXalign': True, 'size': 32}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 32}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
oeis/082/A082580.asm | neoneye/loda-programs | 11 | 97030 | <reponame>neoneye/loda-programs
; A082580: A sum of Lah numbers and binomial coefficients.
; Submitted by <NAME>
; 1,2,10,68,574,5732,65724,847800,12120966,189890588,3230531356,59246895512,1164225730540,24387062160008,542155626123544,12743158072837680,315624979700257350,8213507146488950700
mov $1,1
mov $2,1
mov $3,$0
add $3,1
add $3,$0
mov $0,0
mov $4,1
lpb $3
mul $1,$4
sub $3,1
mul $1,$3
sub $3,1
add $5,$4
div $1,$5
mul $2,$0
add $0,1
add $2,$1
add $4,2
lpe
mov $0,$2
|
g-regpat.ads | ytomino/gnat4drake | 0 | 20025 | <filename>g-regpat.ads
pragma License (Unrestricted);
package GNAT.Regpat is
pragma Preelaborate;
-- Constants
Expression_Error : exception;
type Regexp_Bit is (
Case_Insensitive_Bit,
Single_Line_Bit,
Multiple_Lines_Bit);
-- representation
type Regexp_Flags is array (Regexp_Bit) of Boolean;
pragma Pack (Regexp_Flags);
No_Flags : constant Regexp_Flags := (others => False);
Case_Insensitive : constant Regexp_Flags :=
(Case_Insensitive_Bit => True, others => False);
Single_Line : constant Regexp_Flags :=
(Single_Line_Bit => True, others => False);
Multiple_Lines : constant Regexp_Flags :=
(Multiple_Lines_Bit => True, others => False);
-- Match_Array
subtype Match_Count is Natural;
type Match_Location is record
First : Natural := 0;
Last : Natural := 0;
end record;
type Match_Array is array (Match_Count range <>) of Match_Location;
No_Match : constant Match_Location := (First => 0, Last => 0);
-- Pattern_Matcher Compilation
type Pattern_Matcher is null record;
function Compile (Expression : String; Flags : Regexp_Flags := No_Flags)
return Pattern_Matcher;
-- Matching a Pre-Compiled Regular Expression
function Match (
Self : Pattern_Matcher;
Data : String;
Data_First : Integer := -1;
Data_Last : Positive := Positive'Last)
return Boolean;
procedure Match (
Self : Pattern_Matcher;
Data : String;
Matches : out Match_Array;
Data_First : Integer := -1;
Data_Last : Positive := Positive'Last);
end GNAT.Regpat;
|
Binding_Zstandard/zstandard-functions-streaming_decompression.adb | jrmarino/zstd-ada | 13 | 22074 | -- This file is covered by the Internet Software Consortium (ISC) License
-- Reference: ../License.txt
package body Zstandard.Functions.Streaming_Decompression is
------------------
-- Initialize --
------------------
procedure Initialize
(mechanism : out Decompressor;
input_stream : not null access STR.Root_Stream_Type'Class)
is
use type Thin.ZSTD_DStream_ptr;
initResult : Thin.IC.size_t;
begin
mechanism.source_stream := input_stream;
mechanism.zstd_stream := Thin.ZSTD_createDStream;
if mechanism.zstd_stream = Thin.Null_DStream_pointer then
raise streaming_decompression_initialization with "ZSTD_createDStream failure";
end if;
initResult := Thin.ZSTD_initDStream (zds => mechanism.zstd_stream);
if Natural (Thin.ZSTD_isError (code => initResult)) /= 0 then
raise streaming_decompression_initialization with "ZSTD_initDStream failure";
end if;
end Initialize;
-----------------------
-- Decompress_Data --
-----------------------
procedure Decompress_Data
(mechanism : Decompressor;
complete : out Boolean;
output_data : out Output_Data_Container;
last_element : out Natural)
is
use type Thin.ZSTD_DStream_ptr;
sin_last : STR.Stream_Element_Offset := STR.Stream_Element_Offset (Recommended_Chunk_Size);
Last : STR.Stream_Element_Offset;
data_in : aliased Thin.IC.char_array := (1 .. Recommended_Chunk_Size => Thin.IC.nul);
data_out : aliased Thin.IC.char_array := (1 .. Output_container_size => Thin.IC.nul);
data_sin : STR.Stream_Element_Array (1 .. sin_last);
index : Thin.IC.size_t := data_in'First;
size_hint : Thin.IC.size_t;
inbuffer : aliased Thin.ZSTD_inBuffer_s :=
(src => Thin.ICS.To_Chars_Ptr (data_in'Unchecked_Access),
size => Recommended_Chunk_Size,
pos => 0);
outbuffer : aliased Thin.ZSTD_outBuffer_s :=
(dst => Thin.ICS.To_Chars_Ptr (data_out'Unchecked_Access),
size => Output_container_size,
pos => 0);
begin
if mechanism.zstd_stream = Thin.Null_DStream_pointer then
raise streaming_decompression_error with "Run initialize procedure first";
end if;
mechanism.source_stream.Read (Item => data_sin, Last => Last);
if Natural (Last) = 0 then
last_element := 0;
complete := True;
return;
end if;
data_in := convert_to_char_array (data_sin (1 .. Last), Recommended_Chunk_Size);
complete := (Natural (Last) /= Natural (Recommended_Chunk_Size));
size_hint := Thin.ZSTD_decompressStream (zds => mechanism.zstd_stream,
output => outbuffer'Unchecked_Access,
input => inbuffer'Unchecked_Access);
last_element := Natural (outbuffer.pos);
output_data (1 .. STR.Stream_Element_Offset (last_element)) :=
convert_to_stream_array (data_out, outbuffer.pos);
end Decompress_Data;
-------------------------------
-- convert_to_stream_array --
-------------------------------
function convert_to_stream_array
(char_data : Thin.IC.char_array;
number_characters : Thin.IC.size_t) return STR.Stream_Element_Array
is
product : STR.Stream_Element_Array (1 .. STR.Stream_Element_Offset (number_characters));
dondx : Thin.IC.size_t;
begin
for z in product'Range loop
dondx := Thin.IC.size_t (z);
product (z) := STR.Stream_Element (Character'Pos (Thin.IC.To_Ada (char_data (dondx))));
end loop;
return product;
end convert_to_stream_array;
-----------------------------
-- convert_to_char_array --
-----------------------------
function convert_to_char_array
(stream_data : STR.Stream_Element_Array;
output_array_size : Thin.IC.size_t) return Thin.IC.char_array
is
use type Thin.IC.size_t;
product : Thin.IC.char_array := (1 .. output_array_size => Thin.IC.nul);
dondx : Thin.IC.size_t := 1;
begin
for z in stream_data'Range loop
product (dondx) := Thin.IC.To_C (Character'Val (stream_data (z)));
dondx := dondx + 1;
end loop;
return product;
end convert_to_char_array;
end Zstandard.Functions.Streaming_Decompression;
|
third_party/antlr_grammars_v4/turing/turing.g4 | mikhan808/rsyntaxtextarea-antlr4-extension | 2 | 3920 | /*
BSD License
Copyright (c) 2020, <NAME>
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of Tom Everett nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
grammar turing;
program
: declarationOrStatementInMainProgram+
;
declarationOrStatementInMainProgram
: declaration
| statement
| subprogramDeclaration
;
declaration
: constantDeclaration
| variableDeclaration
| typeDeclaration
;
constantDeclaration
: ('const' id ':=' expn)
| ('const' id (':' typeSpec)? ':=' initializingValue)
;
initializingValue
: expn '(' 'init' (initializingValue (',' initializingValue)* ')')
;
variableDeclaration
: ('var' id (',' id)* ':=' expn)
| ('var' id (',' id)* ':' typeSpec (':=' initializingValue)?)
;
typeDeclaration
: 'type' id ':' typeSpec
;
typeSpec
: standardType
| subrangeType
| arrayType
| recordType
| namedType
;
standardType
: 'int'
| 'real'
| 'boolean'
| 'string' ('(' compileTimeExpn ')')?
;
subrangeType
: compileTimeExpn '..' expn
;
arrayType
: 'array' indexType (',' indexType)* 'of' typeSpec
;
indexType
: subrangeType
| namedType
;
recordType
: 'record' id (',' id)* ':' typeSpec (id (',' id)* ':' typeSpec)* 'end' 'record'
;
namedType
: id
;
subprogramDeclaration
: subprogramHeader subprogramBody
;
subprogramHeader
: 'procedure' id ('(' parameterDeclaration (',' parameterDeclaration)* ')')? 'function' id ('(' parameterDeclaration (',' parameterDeclaration)* ')')? ':' typeSpec
;
parameterDeclaration
: 'var'? id (',' id)* ':' parameterType
;
parameterType
: ':' typeSpec
| 'string' '(' '*' ')'
| 'array' compileTimeExpn '..' '*' (',' compileTimeExpn '..' '*')* 'of' typeSpec
| 'array' compileTimeExpn '..' '*' (',' compileTimeExpn '..' '*')* 'of' string '(' '*' ')'
;
subprogramBody
: declarationsAndStatements 'end' id
;
declarationsAndStatements
: declarationOrStatement*
;
declarationOrStatement
: declaration
| statement
;
statement
: (variableReference ':=' expn)
| procedureCall
| ('assert' booleanExpn)
| 'result' expn
| ifStatement
| loopStatement
| 'exit' ('when' booleanExpn)?
| caseStatement
| forStatement
| putStatement
| getStatement
| openStatement
| closeStatement
;
procedureCall
: reference
;
ifStatement
: 'if' booleanExpn 'then' declarationsAndStatements ('elsif' booleanExpn 'then' declarationsAndStatements)* ('else' declarationsAndStatements)? 'end' 'if'
;
loopStatement
: 'loop' declarationsAndStatements 'end' 'loop'
;
caseStatement
: 'case' expn 'of' 'label' compileTimeExpn (',' compileTimeExpn)* ':' declarationsAndStatements ('label' compileTimeExpn (',' compileTimeExpn)* ':' declarationsAndStatements)* ('label' ':' declarationsAndStatements)? 'end' 'case'
;
forStatement
: ('for' id ':' expn '..' expn ('by' expn)? declarationsAndStatements 'end' 'for')
| ('for' 'decreasing' id ':' expn '..' expn ('by' expn)? declarationsAndStatements 'end' 'for')
;
putStatement
: 'put' (':' streamNumber ',')? putItem (',' putItem)? ('..')?
;
putItem
: expn (':' widthExpn (':' fractionWidth (':' exponentWidth)?)?)?
| 'skip'
;
getStatement
: 'get' (':' streamNumber ',')? getItem (',' getItem)*
;
getItem
: variableReference
| 'skip' variableReference ':' '*'
| variableReference ':' widthExpn
;
openStatement
: 'open' ':' fileNumber ',' string ',' capability (',' capability)*
;
capability
: 'get'
| 'put'
;
closeStatement
: 'close' ':' fileNumber
;
streamNumber
: expn
;
widthExpn
: expn
;
fractionWidth
: expn
;
exponentWidth
: expn
;
fileNumber
: expn
;
variableReference
: reference
;
reference
: id reference_2
;
reference_2
: (componentSelector reference_2)?
;
componentSelector
: '(' expn (',' expn)* ')'
| '.' id
;
booleanExpn
: expn
;
compileTimeExpn
: expn
;
expn
: reference
| explicitConstant
| substring
| expn infixOperator expn
| prefixOperator expn
| '(' expn ')'
;
string
: ExplicitStringConstant
;
explicitConstant
: ExplicitUnsignedIntegerConstant
| ExplicitUnsignedRealConstant
| ExplicitStringConstant
| 'true'
| 'false'
;
infixOperator
: '+'
| '–'
| '*'
| '/' 'div'
| 'mod'
| '**'
| '<'
| '>'
| '='
| '<='
| '>='
| 'not='
| 'and'
| 'or'
;
prefixOperator
: '+'
| '–'
| 'not'
;
substring
: reference '(' substringPosition ('..' substringPosition)? ')'
;
substringPosition
: expn ('*' ('–' expn))
;
id
: IDENTIFIER
;
ExplicitUnsignedIntegerConstant
: ('+' | '-')? [0-9]+
;
ExplicitUnsignedRealConstant
: ('+' | '-')? ([0-9]+ '.')? [0-9]+ ('e' [0-9]+)
;
ExplicitStringConstant
: '"' ~ '"'* '"'
;
IDENTIFIER
: [a-zA-Z] [a-zA-Z_0-9]*
;
COMMENT
: '%' ~ [\r\n]* -> channel (HIDDEN)
;
WS
: [ \r\n\t]+ -> channel (HIDDEN)
;
|
loader/windows/src/x64/demote.asm | CrackerCat/hypervisor | 0 | 167479 | <filename>loader/windows/src/x64/demote.asm
; @copyright
; Copyright (C) 2020 Assured Information Security, Inc.
;
; @copyright
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; @copyright
; The above copyright notice and this permission notice shall be included in
; all copies or substantial portions of the Software.
;
; @copyright
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
enable_interrupts PROTO
disable_interrupts PROTO
demote_text SEGMENT ALIGN(1000h) 'CODE'
demote PROC
; **************************************************************************
; General Purpose Registers
; **************************************************************************
mov [r8 + 000h], rax
mov [r8 + 008h], rbx
mov [r8 + 010h], rcx
mov [r8 + 018h], r8
mov [r8 + 020h], rbp
mov [r8 + 028h], rsi
mov [r8 + 030h], rdi
mov [r8 + 038h], r8
mov [r8 + 040h], r9
mov [r8 + 048h], r10
mov [r8 + 050h], r11
mov [r8 + 058h], r12
mov [r8 + 060h], r13
mov [r8 + 068h], r14
mov [r8 + 070h], r15
lea rax, [demotion_success]
mov [r8 + 078h], rax
mov [r8 + 080h], rsp
; **************************************************************************
; Setup
; **************************************************************************
mov r13, rcx ; args
mov r14, rdx ; mk_state
mov r15, r8 ; root_vp_state
; **************************************************************************
; Flags
; **************************************************************************
pushfq
pop [r15 + 088h]
push [r14 + 088h]
popf
; **************************************************************************
; IDT
; **************************************************************************
call disable_interrupts
sidt fword ptr[r15 + 0B0h]
lidt fword ptr[r14 + 0B0h]
; **************************************************************************
; MSRs
; **************************************************************************
mov ecx, 0C0000080h ; EFER
rdmsr
mov [r15 + 240h], eax
mov [r15 + 244h], edx
mov eax, [r14 + 240h]
mov edx, [r14 + 244h]
wrmsr
mov ecx, 0C0000081h ; STAR
rdmsr
mov [r15 + 248h], eax
mov [r15 + 24Ch], edx
mov eax, [r14 + 248h]
mov edx, [r14 + 24Ch]
wrmsr
mov ecx, 0C0000082h ; LSTAR
rdmsr
mov [r15 + 250h], eax
mov [r15 + 254h], edx
mov eax, [r14 + 250h]
mov edx, [r14 + 254h]
wrmsr
mov ecx, 0C0000083h ; CSTAR
rdmsr
mov [r15 + 258h], eax
mov [r15 + 25Ch], edx
mov eax, [r14 + 258h]
mov edx, [r14 + 25Ch]
wrmsr
mov ecx, 0C0000084h ; FMASK
rdmsr
mov [r15 + 260h], eax
mov [r15 + 264h], edx
mov eax, [r14 + 260h]
mov edx, [r14 + 264h]
wrmsr
mov ecx, 0C0000100h ; FS Base
rdmsr
mov [r15 + 268h], eax
mov [r15 + 26Ch], edx
mov eax, [r14 + 268h]
mov edx, [r14 + 26Ch]
wrmsr
mov ecx, 0C0000101h ; GS Base
rdmsr
mov [r15 + 270h], eax
mov [r15 + 274h], edx
mov eax, [r14 + 270h]
mov edx, [r14 + 274h]
wrmsr
mov ecx, 0C0000102h ; Kernel GS Base
rdmsr
mov [r15 + 278h], eax
mov [r15 + 27Ch], edx
mov eax, [r14 + 278h]
mov edx, [r14 + 27Ch]
wrmsr
mov ecx, 00000174h ; SYSENTER_CS
rdmsr
mov [r15 + 280h], eax
mov [r15 + 284h], edx
mov eax, [r14 + 280h]
mov edx, [r14 + 284h]
wrmsr
mov ecx, 00000175h ; SYSENTER_ESP
rdmsr
mov [r15 + 288h], eax
mov [r15 + 28Ch], edx
mov eax, [r14 + 288h]
mov edx, [r14 + 28Ch]
wrmsr
mov ecx, 00000176h ; SYSENTER_EIP
rdmsr
mov [r15 + 290h], eax
mov [r15 + 294h], edx
mov eax, [r14 + 290h]
mov edx, [r14 + 294h]
wrmsr
mov ecx, 00000277h ; PAT
rdmsr
mov [r15 + 298h], eax
mov [r15 + 29Ch], edx
mov eax, [r14 + 298h]
mov edx, [r14 + 29Ch]
wrmsr
mov ecx, 000001D9h ; DEBUGCTL
rdmsr
mov [r15 + 2A0h], eax
mov [r15 + 2A4h], edx
mov eax, [r14 + 2A0h]
mov edx, [r14 + 2A4h]
wrmsr
; **************************************************************************
; GDT
; **************************************************************************
sgdt fword ptr[r15 + 0A0h]
lgdt fword ptr[r14 + 0A0h]
mov dx, es
mov [r15 + 0C0h], dx
mov dx, [r14 + 0C0h]
mov es, dx
mov dx, cs
mov [r15 + 0D0h], dx
mov ax, [r14 + 0D0h]
push rax
mov dx, ss
mov [r15 + 0E0h], dx
mov dx, [r14 + 0E0h]
mov ss, dx
mov dx, ds
mov [r15 + 0F0h], dx
mov dx, [r14 + 0F0h]
mov ds, dx
mov dx, fs
mov [r15 + 100h], dx
mov dx, [r14 + 100h]
mov fs, dx
mov dx, gs
mov [r15 + 110h], dx
mov dx, [r14 + 110h]
mov gs, dx
mov ecx, 000001D9h
xor rax, rax
xor rdx, rdx
mov ax, [r14 + 110h]
wrmsr
sldt dx
mov [r15 + 120h], dx
mov dx, [r14 + 120h]
lldt dx
str dx
mov [r15 + 130h], dx
mov dx, [r14 + 130h]
ltr dx
lea rax, [gdt_and_cs_loaded]
push rax
retfq
gdt_and_cs_loaded:
; **************************************************************************
; Control Registers
; **************************************************************************
mov rax, cr0
mov [r15 + 140h], rax
mov rax, [r14 + 140h]
mov cr0, rax
mov rax, cr2
mov [r15 + 150h], rax
mov rax, [r14 + 150h]
mov cr2, rax
mov rax, cr4
mov [r15 + 160h], rax
mov rax, [r14 + 160h]
mov cr4, rax
mov rax, cr3
mov [r15 + 158h], rax
mov rax, [r14 + 158h]
mov cr3, rax
mov rsp, [r14 + 080h]
; **************************************************************************
; Debug Registers
; **************************************************************************
mov rax, dr6
mov [r15 + 1F0h], rax
mov rax, [r14 + 1F0h]
mov dr6, rax
mov rax, dr7
mov [r15 + 1F8h], rax
mov rax, [r14 + 1F8h]
mov dr7, rax
; **************************************************************************
; Call Microkernel
; **************************************************************************
mov rdi, r13
push [r14 + 078h]
ret
int 3
demotion_success:
; NOTE:
; - If demotion is successful, before we return back to the loader, we
; ensure that at least one exit occurs. This is done to properly handle
; errors with the first VMExit. Specifically, if the first VMExit
; generates a failure, it needs to return to loader. The state in
; the root VP, which is what it will use to return is still the same
; at this point, so a return is safe.
push rax
push rbx
push rcx
push rdx
mov rax, 0
cpuid
pop rdx
pop rcx
pop rbx
pop rax
call enable_interrupts
ret
int 3
demote ENDP
demote_text ENDS
end
|
MIPS/Homework Assignments/Page160-Question1.asm | Enkrona/CompOrg44-345 | 0 | 166120 | <reponame>Enkrona/CompOrg44-345
.text
main:
la $a0, prompt #prompting user to input number 1
jal PromptInt
move $s0, $v0 # storing the result in $s0 for num1
la $a0, prompt2 # prompting user for number 2
jal PromptInt
move $s1, $v0 # storing the result in $s1 for num2
la $a0, prompt3 # prompting user to input number 3
jal PromptInt
move $s2, $v0 # storing the result in $s2 for num3
la $a0, prompt4 # prompting for num 4
jal PromptInt
move $s3, $v0 # storing the result in $s3 for num4
# moving all values to $a registers for subprogram usage
move $a0, $s0
move $a1, $s1
move $a2, $s2
move $a3, $s3
jal average # calls the average subprogram which will return the average in $v0
move $s7, $v0 # Moves the average to $s7 for safe keeping
# moving all values to $a registers for subprogram usage
move $a0, $s0
move $a1, $s1
move $a2, $s2
move $a3, $s3
jal largest_Num # calls the largestNum subprogram to find the largest num and return in $v0
jal end_if # ending the program and printing results
# subprogram: largest_Num
# author: <NAME>
# purpose: to find largest number in 4 numbers
# inputs: $a0-$a3
# outputs: $s6
# returns the largest value of the numbers input
# Also calls numSwapMin, numSwapMid, numSwapHigh, end_if which supplement info into the subprogram
largest_Num:
slt $t7, $a0, $a1 # checks if $a0 is less than $a1
beqz $t7, numSwapMin # if $a0 is not less than $a1 then swap the nums
move $t7, $zero # zeroes out $t7
slt $t7, $a1, $a2 # if $a1 (second num) is less than $a2 set $t7 to 1 ( a1 < a2 )
beqz $t7, numSwapMid # Since $a2 is less than $a1 we need to swap them and recheck using numSwapMid
slt $t7, $a2, $a3 # checks to see if $a2 (third num) is less than $a3 (High num)
move $s6, $a3 # if $a3 is the highest we move it out for reading
beq $t7, 1, end_if # all the nums are in correct order!
beqz $t7, numSwapHigh # Since $a3 is less than $a2 we need to swap them and recheck using numSwapHigh
# this will swap $a0, and $a1 if they are not in the correct order
numSwapMin:
move $t5, $a1 # $t5 holds a1
move $t6, $a0 # $t6 holds a0
move $a0, $t5 # move $a1 ($t5) into $a0 as the new min number
move $a1, $t6 # move $a0 ($t6) into $a1 as the new median
b largest_Num
# this will swap $a1 and $a2 if not in correct order then return to largest_Num to check and if it passes all checks then it ends
numSwapMid:
move $t5, $a2 # $t5 holds a2
move $t6, $a1 # $t6 holds a1
move $a1, $t5 # move $a1 ($t5) into $a0 as the new median number
move $a2, $t6 # move $a0 ($t6) into $a2 as the new high
b largest_Num
# this will swap $a2 and $a3, if not in correct order then return to largest_Num to check and if it passes all checks then it ends
numSwapHigh:
move $t5, $a3 # $t5 holds $a3
move $t6, $a2 # $5 holds $a2
move $a2, $t5 # moves $a3 ($t5) into $a2 as the new third number
move $a3, $t6 # moves $a2 ($t6) into $a3 as the new high number
b largest_Num # returns to largest_num to continue the sort
end_if:
la $a0, results # loads address for printing of result
move $a1, $s7 # moving average to $a1 for printing
jal PrintInt # printing average
jal PrintNewLine # for cleanliness
la $a0, resultsLarge # moving largest num string to $a0 for printing
move $a1, $s6 # overwritting old value and storing largest num in $s6
jal PrintInt
jal Exit # GAME OVER!
.data
prompt: .asciiz "Please input number 1: "
prompt2: .asciiz "Please input number 2: "
prompt3: .asciiz "Please input number 3: "
prompt4: .asciiz "Please input number 4: "
results: .asciiz " Average was: "
resultsLarge: .asciiz " Largest num was: "
.include "utils.asm" |
programs/oeis/053/A053137.asm | karttu/loda | 1 | 170808 | <gh_stars>1-10
; A053137: Binomial coefficients C(2*n+8,8).
; 1,45,495,3003,12870,43758,125970,319770,735471,1562275,3108105,5852925,10518300,18156204,30260340,48903492,76904685,118030185,177232627,260932815,377348994,536878650,752538150,1040465790,1420494075,1916797311,2558620845,3381098545,4426165368,5743572120,7392009768,9440350920,11969016345,15071474661,18855883575,23446881315,28987537150,35641470150,43595145594,53060358690,64276915527,77515521435,93080887185,111315063717,132601016340,157366449604,186087894300,219295068300,257575523205,301579589025,352025629371,409705619895,475491062970,550339251858,635299897870,731522134278,840261910995,962889794295,1100899186101,1255914977625,1429702652400,1624177854000,1841416434000,2083664995984,2353351951665,2653099105437,2985733783935,3354301527435,3762079360182,4212589656990,4709614623714,5257211409450,5859727868575,6521818990995,7248464019225,8044984271181,8917061687820,9870758125020,10912535409348,12049276177620,13288305520413,14637413449945,16104878212995,17699490469791,19430578360050,21308033477610,23342337775350,25544591422350,27926541635499,30500612508015,33279935857597,36278383117185,39510598291560,42992032003272,46738976651640,50768602708824,55098996177225,59749197232725,64739240078535,70090194034675,75824205888366,81964543530870,88535640906570,95563144300338,103073959989495,111096303286923,119659749002145,128795283347445,138535357316356,148913941562100,159966582803820,171730461788700,184244452838325,197549185007889,211687104887115,226702541072007,242641770336810,259553085535810,277486865264862,296495645312790,316634191933059,337959576966375,360531254845125,384411141510825,409663695276000,436355999662176,464557848245920,494341831545120,525783425977953,558961084927245,593956331943183,630853856117595,669741609663270,710710907732046,753856530505650,799276827593530,847073824772175,897353333100675,950225060447529,1005802725463965,1064204174039292,1125551498274060,1189971158007060,1257594104932452,1328555909343565,1402996889540169,1481062243936275,1562902185905775,1648672081403490,1738532589399450,1832649805164486,1931195406445470,2034346802568795,2142287286510943,2255206189975245,2373299041514193,2496767727736920,2625820657641720,2760672930113736,2901546504628200,3048670375199865,3202280747619525,3362621220018775,3529942966804419,3704504926004190,3886573990065702,4076425200150810,4274341943967810,4480616157184167,4695548528462715,4919448708164529,5152635520761925,5395437181005300,5648191513887780,5911246178451900,6184958895482796,6469697679132645,6765841072521345,7073778387358683,7393909947633495,7726647337415578,8072413652816370,8431643758154670,8804784546373926,9192295203757875
mul $0,2
mov $1,-9
bin $1,$0
|
Transynther/x86/_processed/US/_zr_/i7-7700_9_0xca.log_21829_168.asm | ljhsiun2/medusa | 9 | 170262 | <gh_stars>1-10
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r14
push %r15
push %r8
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0xbe55, %rdi
nop
nop
add %r8, %r8
movl $0x61626364, (%rdi)
nop
nop
nop
nop
and %r14, %r14
lea addresses_A_ht+0xc949, %rsi
dec %r9
and $0xffffffffffffffc0, %rsi
movntdqa (%rsi), %xmm7
vpextrq $1, %xmm7, %r15
nop
xor $18540, %r8
lea addresses_WC_ht+0x18de5, %rsi
nop
nop
nop
add $58617, %rcx
mov $0x6162636465666768, %r8
movq %r8, (%rsi)
nop
dec %rsi
lea addresses_WT_ht+0x330d, %r15
nop
add $43522, %r9
mov $0x6162636465666768, %rsi
movq %rsi, %xmm7
and $0xffffffffffffffc0, %r15
vmovntdq %ymm7, (%r15)
nop
nop
nop
add %r14, %r14
lea addresses_WC_ht+0x1b85, %r14
nop
nop
nop
xor %r15, %r15
mov $0x6162636465666768, %rsi
movq %rsi, (%r14)
nop
nop
nop
nop
nop
dec %rsi
lea addresses_WT_ht+0x13225, %rsi
lea addresses_WT_ht+0x1a7e5, %rdi
nop
nop
nop
xor $23638, %r11
mov $121, %rcx
rep movsl
nop
cmp $6582, %r14
lea addresses_WT_ht+0x2865, %r8
nop
nop
nop
nop
nop
cmp %rcx, %rcx
mov (%r8), %r11d
nop
nop
add %r9, %r9
lea addresses_normal_ht+0x7e85, %rsi
lea addresses_D_ht+0x1d635, %rdi
nop
nop
nop
inc %r8
mov $89, %rcx
rep movsw
nop
nop
nop
sub $9658, %r11
lea addresses_normal_ht+0xdce5, %r15
nop
nop
nop
nop
inc %r8
mov (%r15), %rsi
xor $28264, %r8
lea addresses_WT_ht+0x1164d, %rsi
lea addresses_WT_ht+0x1560f, %rdi
add %r8, %r8
mov $117, %rcx
rep movsq
nop
and $60841, %r15
lea addresses_WC_ht+0x24e5, %rsi
lea addresses_A_ht+0x10e09, %rdi
nop
nop
nop
xor %r9, %r9
mov $122, %rcx
rep movsq
nop
add %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
// Store
lea addresses_WT+0x154a5, %rsi
nop
nop
xor $29096, %rbp
mov $0x5152535455565758, %r8
movq %r8, (%rsi)
nop
nop
nop
nop
xor $42030, %r9
// Store
lea addresses_WT+0x4e45, %r8
sub %r10, %r10
movb $0x51, (%r8)
nop
nop
nop
xor %rcx, %rcx
// Faulty Load
lea addresses_US+0x1c0e5, %r8
nop
nop
nop
nop
add %rcx, %rcx
mov (%r8), %di
lea oracles, %r8
and $0xff, %rdi
shlq $12, %rdi
mov (%r8,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 2, 'NT': True, 'type': 'addresses_US'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WT'}}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_WT'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 2, 'NT': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': True, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 16, 'NT': True, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 32, 'NT': True, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 7, 'AVXalign': False, 'same': True, 'size': 8, 'NT': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 10, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 2, 'same': False, 'type': 'addresses_A_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
Transynther/x86/_processed/NC/_ht_/i9-9900K_12_0xa0.log_21829_1401.asm | ljhsiun2/medusa | 9 | 244984 | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r8
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x41f5, %rsi
lea addresses_WC_ht+0xe207, %rdi
nop
nop
and %r8, %r8
mov $106, %rcx
rep movsq
cmp %r13, %r13
lea addresses_WC_ht+0x1a813, %rcx
inc %r9
mov $0x6162636465666768, %rsi
movq %rsi, (%rcx)
add %r13, %r13
lea addresses_A_ht+0xd4f7, %r13
nop
nop
nop
nop
inc %r9
movb (%r13), %r8b
nop
sub %r8, %r8
lea addresses_A_ht+0xd4f, %r13
nop
and $53830, %rbx
mov (%r13), %di
nop
sub %r13, %r13
lea addresses_normal_ht+0xae87, %rcx
clflush (%rcx)
add $52628, %r13
mov (%rcx), %r8d
nop
nop
sub $28644, %r8
lea addresses_normal_ht+0x31b7, %rsi
cmp $12690, %r13
mov (%rsi), %cx
nop
nop
nop
sub $24486, %rcx
lea addresses_WC_ht+0xd527, %rsi
nop
nop
nop
nop
nop
inc %rcx
mov (%rsi), %r9
sub $31144, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r8
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r15
push %r8
push %r9
push %rax
push %rsi
// Faulty Load
mov $0x1ca4d10000000237, %r9
nop
nop
nop
nop
xor $55325, %r8
vmovups (%r9), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $1, %xmm5, %rax
lea oracles, %r15
and $0xff, %rax
shlq $12, %rax
mov (%r15,%rax,1), %rax
pop %rsi
pop %rax
pop %r9
pop %r8
pop %r15
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 1, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 4, 'type': 'addresses_WC_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8}}
{'src': {'NT': True, 'same': False, 'congruent': 5, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'src': {'NT': True, 'same': False, 'congruent': 2, 'type': 'addresses_A_ht', 'AVXalign': True, 'size': 2}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': True, 'congruent': 7, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'NT': True, 'same': False, 'congruent': 4, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'46': 21829}
46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46
*/
|
source/amf/uml/amf-standard_profile_l2-entities-collections.ads | svn2github/matreshka | 24 | 13533 | <gh_stars>10-100
------------------------------------------------------------------------------
-- --
-- Matreshka Project --
-- --
-- Ada Modeling Framework --
-- --
-- Runtime Library Component --
-- --
------------------------------------------------------------------------------
-- --
-- Copyright © 2011-2012, <NAME> <<EMAIL>> --
-- All rights reserved. --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions --
-- are met: --
-- --
-- * Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- --
-- * Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in the --
-- documentation and/or other materials provided with the distribution. --
-- --
-- * Neither the name of the Vadim Godunko, IE nor the names of its --
-- contributors may be used to endorse or promote products derived from --
-- this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED --
-- TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR --
-- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF --
-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING --
-- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS --
-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
-- $Revision$ $Date$
------------------------------------------------------------------------------
-- This file is generated, don't edit it.
------------------------------------------------------------------------------
with AMF.Generic_Collections;
package AMF.Standard_Profile_L2.Entities.Collections is
pragma Preelaborate;
package Standard_Profile_L2_Entity_Collections is
new AMF.Generic_Collections
(Standard_Profile_L2_Entity,
Standard_Profile_L2_Entity_Access);
type Set_Of_Standard_Profile_L2_Entity is
new Standard_Profile_L2_Entity_Collections.Set with null record;
Empty_Set_Of_Standard_Profile_L2_Entity : constant Set_Of_Standard_Profile_L2_Entity;
type Ordered_Set_Of_Standard_Profile_L2_Entity is
new Standard_Profile_L2_Entity_Collections.Ordered_Set with null record;
Empty_Ordered_Set_Of_Standard_Profile_L2_Entity : constant Ordered_Set_Of_Standard_Profile_L2_Entity;
type Bag_Of_Standard_Profile_L2_Entity is
new Standard_Profile_L2_Entity_Collections.Bag with null record;
Empty_Bag_Of_Standard_Profile_L2_Entity : constant Bag_Of_Standard_Profile_L2_Entity;
type Sequence_Of_Standard_Profile_L2_Entity is
new Standard_Profile_L2_Entity_Collections.Sequence with null record;
Empty_Sequence_Of_Standard_Profile_L2_Entity : constant Sequence_Of_Standard_Profile_L2_Entity;
private
Empty_Set_Of_Standard_Profile_L2_Entity : constant Set_Of_Standard_Profile_L2_Entity
:= (Standard_Profile_L2_Entity_Collections.Set with null record);
Empty_Ordered_Set_Of_Standard_Profile_L2_Entity : constant Ordered_Set_Of_Standard_Profile_L2_Entity
:= (Standard_Profile_L2_Entity_Collections.Ordered_Set with null record);
Empty_Bag_Of_Standard_Profile_L2_Entity : constant Bag_Of_Standard_Profile_L2_Entity
:= (Standard_Profile_L2_Entity_Collections.Bag with null record);
Empty_Sequence_Of_Standard_Profile_L2_Entity : constant Sequence_Of_Standard_Profile_L2_Entity
:= (Standard_Profile_L2_Entity_Collections.Sequence with null record);
end AMF.Standard_Profile_L2.Entities.Collections;
|
src/hud.asm | tewtal/lttphack | 0 | 102847 | pushpc
; HUD
;
; Takes care of drawing the following:
; - Link's hearts and container
; - Enemy's hearts
; ----------------
; FLOOR INDICATOR
; ----------------
; FloorIndicator quick RTL
;
; This can mess with the HUD, removing parts of it
; just replacing the STA with LDA so we can keep vanilla lag
org $0AFD48
LDA $7EC7F2 : INC
LDA $7EC834 : INC
LDA $7EC832
LDA #$250F : LDA $7EC7F4
org $0AFD9F
LDA $7EC7F2, X
org $0AFDA6
LDA $7EC832, X
; probably leave the INC $16 in
org $0AFDB5 ; change clear location of the timer
STA $7EC7AA
STA $7EC7AC
STA $7EC7EA
STA $7EC7EC
; Super Bomb/Dig Timers
org $0AFE25 : STA $7EC7AA, X
org $0AFE2C : STA $7EC7EA, X
; -------------
; HUD TEMPLATE
; -------------
; HUD Template Hijack
;
; Overrides the following
; $0DFA8E: E2 30 SEP #$30
; $0DFA90: E6 16 INC $16
org $0DFAAE
JSL hud_template_hook
; -----------------------
; UPDATE HEARTS TEMPLATE
; -----------------------
; UpdateHearts removal
;
; Since the game calls this function twice, once for containers, once for actual hearts,
; and since we do them both at the same time, we only need one call with a hook.
;
; Overriding the following:
; $0DFC26: 20 CB FD JSR HandleHearts
org $0DF195 ; remove heart refill animation
; vanilla op: STA [$00], Y
; we have to replace 2 bytes and use 6 cycles
; contents of accumulator don't matter here
; while a useless set of ops like XBA : XBA
; would work, they don't take the super minute
; difference in memory access speeds into account
; changing the STA to an LDA does, and it will do it
; perfectly
LDA [$00], Y
org $0DF19C ; ditto above
LDA [$00], Y
org $0DFC26
JSR UpdateHearts_NoHook
!HEART_LAG_EARLY_STOP = $19
; UpdateHearts Hijack
org $0DFDCB
JSL update_hearts_hook
; Mostly vanilla, but modified to not mess with hud
; in such a way to perform the same number of cycles
; with a little compensation for prac hack lag
UpdateHearts_NoHook:
LDX #$0000
.next
LDA $00
CMP.w #!HEART_LAG_EARLY_STOP+8 : BCC .lessthan1
SBC #$0008 : STA $00
LDY #$0004 : JSR .draw
INX #2
BRA .next
.lessthan1
CMP.w #!HEART_LAG_EARLY_STOP+5 : BCC .half
LDY #$0004
BRA .draw
.half
CMP.w #!HEART_LAG_EARLY_STOP+1 : BCC .empty
LDY #$0002
BRA .draw
.empty
RTS
.draw
CPX #$0014 : BCC .sameLine
LDX #$0000
; we need to save at least 4 bytes here (for the hook) without losing cycles
; vanilla bytes cycles
; LDA $07 2 4
; CLC 1 2
; ADC #$0040 3 3
; STA $07 2 4
;---------------------------
; 8 13
PHD ; 1 4
PLD ; 1 5
NOP ; 1 2
NOP ; 1 2
;---------------------------
; 4 13
; hey! we did it!
.sameLine
; we need the same number of cycles but junk code that does nothing
; vanilla bytes cycles
; LDA [$0A], Y 2 7
; TXY 1 2
; STA [$07], Y 2 7
;----------------------------
; 5 16
; vanilla bytes cycles
; JSL $BBAAAA 4 8
; NOP - 2
; RTL - 6
;----------------------------
; 4 16
; hey! we did it!
JSL WasteTimeWithHearts
RTS
; remove -LIFE- from HUD
org $0DFEC3
dw !EMPTY, !EMPTY, !EMPTY, !EMPTY, !EMPTY, !EMPTY
pullpc
; Hud Template Hook
hud_template_hook:
; Makes sure to redraw hearts.
%a8()
INC $16
RTL
WasteTimeWithHearts:
NOP ; never remove this, it's part of vanilla cycle count
RTL
heart_lag_extra:
update_hearts_hook:
%ai8()
LDA.l !ram_doorwatch_toggle : AND $1B : LSR ; set or clear clarry
LDA #$20 ; HDMA bit
BCC .noDoorWatch
LDX $10 : CPX #$0E : BEQ .noDoorWatch
CPX #$0C : BEQ .noDoorWatch
TSB $9B
JSL UpdateGlitchedWindow
BRA ++
.noDoorWatch
TRB $9B
++ %ai16()
; Enters: AI=16
; Keep AI=16 throughout (let subroutines change back/forth)
JSR hud_draw_hearts
%a16()
LDA !ram_enemy_hp_toggle : BEQ .dont_draw_enemy_hp
JSR hud_draw_enemy_hp
.dont_draw_enemy_hp
LDA !ram_misslots_toggle : BEQ .dont_update_misslots
JSR hud_draw_misslots
.dont_update_misslots
%a8()
LDA !ram_lit_rooms_toggle : BEQ .dont_update_lit_rooms
LDA #$03 : STA $045A
.dont_update_lit_rooms
LDA !ram_toggle_lanmola_cycles : BEQ .end
; Make sure we're indoors and in the boss fight room
LDA $A0 : CMP.b #$33 : BNE .end
LDA $1B : BEQ .end
LDA $0DF0 : CMP.b #$01 : BNE .lanmola2
LDA $0D80 : CMP.b #$01 : BNE .lanmola2
LDA !ram_lanmola_cycles : INC : STA !ram_lanmola_cycles+0
.lanmola2
LDA $0DF1 : CMP.b #$01 : BNE .lanmola3
LDA $0D81 : CMP.b #$01 : BNE .lanmola3
LDA !ram_lanmola_cycles+1 : INC : STA !ram_lanmola_cycles+1
.lanmola3
LDA $0DF2 : CMP.b #$01 : BNE .draw_cycles
LDA $0D82 : CMP.b #$01 : BNE .draw_cycles
LDA !ram_lanmola_cycles+2 : INC : STA !ram_lanmola_cycles+2
.draw_cycles
%a16()
JSR hud_draw_lanmola_cycles
.end
%ai16()
RTL
hud_draw_lanmola_cycles:
LDA !ram_lanmola_cycles+0 : AND #$00FF : ORA #$2010 : STA $7EC810
LDA !ram_lanmola_cycles+1 : AND #$00FF : ORA #$2010 : STA $7EC812
LDA !ram_lanmola_cycles+2 : AND #$00FF : ORA #$2010 : STA $7EC814
RTS
hud_draw_hearts:
; Assumes: X=16
; Check if we have full hp
SEP #$21
LDA !ram_equipment_maxhp : SBC !ram_equipment_curhp : CMP.b #$04
%a16()
LDA #$24A0 ; keep cycles similar
ADC #$0000 ; give us $2A41 if carry was set for not full HP
; Heart gfx
STA !POS_MEM_HEART_GFX
; Full hearts
LDA !ram_equipment_curhp : AND #$00FF : LSR #3 : JSL hex_to_dec
LDA !ram_hex2dec_second_digit : ORA #$3C90 : STA $7EC700+!POS_HEARTS
LDA !ram_hex2dec_third_digit : ORA #$3C90 : STA $7EC702+!POS_HEARTS
; Quarters
LDA !ram_equipment_curhp : AND #$0007 : ORA #$3490 : STA $7EC704+!POS_HEARTS
; Heart lag spinner
LDA $1A : AND #$000C
XBA : ASL #4
ORA #$253F
TAY
LDA.l !ram_heartlag_spinner : BEQ ++
TYA
STA !POS_MEM_HEARTLAG
BRA +
++ ; 9 cycles from STA long and BRA
; -1 cycle from taking the BEQ branch
; so let's waste 8 cycles
TYA
ORA (1,S), Y ; this is for Lui; 8 cycles in m=16
; Container gfx
+ LDA #$24A2 : STA !POS_MEM_CONTAINER_GFX
LDA #$0101 : STA !do_heart_lag
; Container
LDA !ram_equipment_maxhp : AND #$00FF : LSR #3 : JSL hex_to_dec
LDA !ram_hex2dec_second_digit : ORA #$3C90 : STA $7EC700+!POS_CONTAINERS
LDA !ram_hex2dec_third_digit : ORA #$3C90 : STA $7EC702+!POS_CONTAINERS
RTS
hud_draw_enemy_hp:
; Assumes: I=16
; Draw over Enemy Heart stuff in case theres no enemies
LDA #!EMPTY : STA !POS_MEM_ENEMY_HEART_GFX
STA $7EC700+!POS_ENEMY_HEARTS
STA $7EC702+!POS_ENEMY_HEARTS
STA $7EC704+!POS_ENEMY_HEARTS
SEP #$30
LDX #$FF
-- INX : CPX #$10 : BEQ .end
LDA $0DD0, X : CMP #$09 : BEQ ++
CMP #$0B : BNE --
++ BIT $0E60, X : BVC --
LDA $0E50, X
REP #$30
AND #$00FF
; Enemy HP should be in A
JSL hex_to_dec : LDX.w #!POS_ENEMY_HEARTS : JSL draw3_white_aligned_left_lttp
; Enemy Heart GFX
LDA #$2CA0 : STA !POS_MEM_ENEMY_HEART_GFX
.end
-- RTS
hud_draw_misslots:
; Search index / EG (03A4)
REP #$30
LDX.w #$00C8
LDA $03C4 : LSR #4 : AND #$000F : ORA #$3010 : STA $7EC708, X
LDA $03C4 : AND #$000F : ORA #$3010 : STA $7EC70A, X
LDX.w #$00CC
LDA $03A4 : LSR #4 : AND #$000F : ORA #$3810 : STA $7EC708, X
LDA $03A4 : AND #$000F : ORA #$3810 : STA $7EC70A, X
; Slots
LDX.w #$0102
LDY.w #$0000
LDA #$3C10 : STA !lowram_draw_tmp
.loop
LDA $0C4A, Y : LSR #4 : AND #$000F : ORA !lowram_draw_tmp : STA $7EC708, X
LDA $0C4A, Y : AND #$000F : ORA !lowram_draw_tmp : STA $7EC70A, X
INX #4
INY
CPY.w #$0005 : BNE .dont_update_colors
LDA #$2010 : STA !lowram_draw_tmp
; LDX.w #$182
.dont_update_colors
CPY.w #$000A : BNE .loop
; Hook timer
LDX.w #$00D0
LDY.w #$0000
.loop_2
LDA $0C5E, Y : LSR #4 : AND #$000F : ORA #$3410 : STA $7EC708, X
LDA $0C5E, Y : AND #$000F : ORA #$3410 : STA $7EC70A, X
INX #4
INY : CPY.w #$0004 : BNE .loop_2
RTS
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2_notsx.log_3_1593.asm | ljhsiun2/medusa | 9 | 174498 | .global s_prepare_buffers
s_prepare_buffers:
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
// Store
mov $0x131, %r14
and $1091, %rsi
movl $0x51525354, (%r14)
nop
nop
add %rbp, %rbp
// Store
mov $0x5c3b1e0000000af5, %rbp
nop
nop
nop
nop
sub $34673, %r13
mov $0x5152535455565758, %rdx
movq %rdx, %xmm6
movups %xmm6, (%rbp)
nop
nop
cmp $63436, %r13
// Faulty Load
lea addresses_D+0x10b75, %r13
clflush (%r13)
add $47037, %rsi
mov (%r13), %r14w
lea oracles, %rdi
and $0xff, %r14
shlq $12, %r14
mov (%rdi,%r14,1), %r14
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'36': 3}
36 36 36
*/
|
theorems/cw/CW.agda | timjb/HoTT-Agda | 294 | 14295 | <reponame>timjb/HoTT-Agda<filename>theorems/cw/CW.agda
{-# OPTIONS --without-K --rewriting #-}
{-
Adapted from Ulrik's work in Lean (released under Apache License 2.0)
https://github.com/leanprover/lean/blob/master/hott/homotopy/cellcomplex.hlean
-}
open import HoTT renaming (pt to pt⊙)
open import homotopy.DisjointlyPointedSet
module cw.CW {i} where
open import cw.Attached public
{-
Naming convention: most of them have the "cw-" prefix
-}
-- skeleton
{-
Disadvantages of alternative definitions:
[Skeleton] as a data type: No η. ([Skeleton (S n)] does not expand.)
[Skeleton] as a recursive record type: No η.
[Skeleton] as a recursive fuction giving recursive Σ types:
the current Agda sees that [Skeleton 0] and [Skeleton (S n)]
have the same head symbol [Σ] and will not invert [Skeleton]
during unification.
The following is combines a recursive funcition and a non-recursive
record type which should strike a good balance.
-}
record AttachedSkeleton n (Skel : Type (lsucc i)) (Real : Skel → Type i)
: Type (lsucc i) where
constructor attached-skeleton
field
skel : Skel
cells : hSet i
attaching : Attaching (Real skel) (fst cells) (Sphere n)
Skeleton : ℕ → Type (lsucc i)
Realizer : {n : ℕ} → Skeleton n → Type i
Skeleton O = hSet i
Skeleton (S n) = AttachedSkeleton n (Skeleton n) Realizer
Realizer {n = O} A = fst A
Realizer {n = S n} (attached-skeleton _ _ α) = Attached α
⟦_⟧ = Realizer
-- Pointedness
-- this function is needed for pointedness
cw-head : ∀ {n : ℕ} → Skeleton n → Type i
cw-head {n = O} cells = fst cells
cw-head {n = S n} (attached-skeleton skel _ _) = cw-head skel
-- this function is needed for pointedness
incl^ : ∀ {n : ℕ} (skel : Skeleton n)
→ cw-head skel → ⟦ skel ⟧
incl^ {n = O} cells a = a
incl^ {n = S n} (attached-skeleton skel _ _) a = incl (incl^ skel a)
-- disjointly pointed skeletons
record ⊙Skeleton (n : ℕ) : Type (lsucc i) where
constructor ⊙skeleton
field
skel : Skeleton n
pt : cw-head skel
pt-dec : is-separable ⊙[ cw-head skel , pt ]
⊙Realizer : {n : ℕ} → ⊙Skeleton n → Ptd i
⊙Realizer (⊙skeleton skel pt _) = ⊙[ ⟦ skel ⟧ , incl^ skel pt ]
⊙⟦_⟧ = ⊙Realizer
-- Take a prefix of a skeleton
cw-init : ∀ {n} → Skeleton (S n) → Skeleton n
cw-init (attached-skeleton skel _ _) = skel
⊙cw-init : ∀ {n} → ⊙Skeleton (S n) → ⊙Skeleton n
⊙cw-init (⊙skeleton skel pt dec) = ⊙skeleton (cw-init skel) pt dec
cw-take : ∀ {m n : ℕ} (m≤n : m ≤ n) → Skeleton n → Skeleton m
cw-take (inl idp) skel = skel
cw-take (inr ltS) skel = cw-init skel
cw-take (inr (ltSR m<n)) skel = cw-take (inr m<n) (cw-init skel)
cw-init-take : ∀ {m n : ℕ} (Sm≤n : S m ≤ n) skel
→ cw-init (cw-take Sm≤n skel) == cw-take (≤-trans lteS Sm≤n) skel
cw-init-take (inl idp) skel = idp
cw-init-take (inr ltS) skel = idp
cw-init-take (inr (ltSR lt)) skel = cw-init-take (inr lt) (cw-init skel)
⊙cw-take : ∀ {m n : ℕ} (m≤n : m ≤ n) → ⊙Skeleton n → ⊙Skeleton m
⊙cw-take (inl idp) ⊙skel = ⊙skel
⊙cw-take (inr ltS) ⊙skel = ⊙cw-init ⊙skel
⊙cw-take (inr (ltSR m<n)) ⊙skel = ⊙cw-take (inr m<n) (⊙cw-init ⊙skel)
⊙cw-head : ∀ {n : ℕ} → ⊙Skeleton n → Ptd i
⊙cw-head (⊙skeleton skel pt _) = ⊙[ cw-head skel , pt ]
⊙cw-init-take : ∀ {m n : ℕ} (Sm≤n : S m ≤ n) ⊙skel
→ ⊙cw-init (⊙cw-take Sm≤n ⊙skel) == ⊙cw-take (≤-trans lteS Sm≤n) ⊙skel
⊙cw-init-take (inl idp) ⊙skel = idp
⊙cw-init-take (inr ltS) ⊙skel = idp
⊙cw-init-take (inr (ltSR lt)) ⊙skel = ⊙cw-init-take (inr lt) (⊙cw-init ⊙skel)
-- Access the [m]th cells
cells-last : ∀ {n : ℕ} → Skeleton n → Type i
cells-last {n = O} cells = fst cells
cells-last {n = S n} (attached-skeleton _ cells _) = fst cells
⊙cells-last : ∀ {n : ℕ} → ⊙Skeleton n → Type i
⊙cells-last (⊙skeleton skel _ _) = cells-last skel
cells-nth : ∀ {m n : ℕ} (m≤n : m ≤ n) → Skeleton n → Type i
cells-nth m≤n = cells-last ∘ cw-take m≤n
⊙cells-nth : ∀ {m n : ℕ} (m≤n : m ≤ n) → ⊙Skeleton n → Type i
⊙cells-nth m≤n = ⊙cells-last ∘ ⊙cw-take m≤n
-- Access the [m]th dimensional attaching map
Realizer₋₁ : ∀ {n : ℕ} → Skeleton (S n) → Type i
Realizer₋₁ = ⟦_⟧ ∘ cw-init
⟦_⟧₋₁ = Realizer₋₁
⊙Realizer₋₁ : ∀ {n : ℕ} → ⊙Skeleton (S n) → Ptd i
⊙Realizer₋₁ = ⊙⟦_⟧ ∘ ⊙cw-init
⊙⟦_⟧₋₁ = ⊙Realizer₋₁
attaching-last : ∀ {n : ℕ} (skel : Skeleton (S n))
→ cells-last skel → (Sphere n → ⟦ skel ⟧₋₁)
attaching-last (attached-skeleton _ _ attaching) = attaching
⊙attaching-last : ∀ {n : ℕ} (⊙skel : ⊙Skeleton (S n))
→ ⊙cells-last ⊙skel → (Sphere n → de⊙ ⊙⟦ ⊙skel ⟧₋₁)
⊙attaching-last = attaching-last ∘ ⊙Skeleton.skel
attaching-nth : ∀ {m n : ℕ} (Sm≤n : S m ≤ n) (skel : Skeleton n)
→ cells-nth Sm≤n skel → (Sphere m → ⟦ cw-take Sm≤n skel ⟧₋₁)
attaching-nth Sm≤n = attaching-last ∘ cw-take Sm≤n
⊙attaching-nth : ∀ {m n : ℕ} (Sm≤n : S m ≤ n) (⊙skel : ⊙Skeleton n)
→ ⊙cells-nth Sm≤n ⊙skel → Sphere m → de⊙ ⊙⟦ ⊙cw-take Sm≤n ⊙skel ⟧₋₁
⊙attaching-nth Sm≤n = ⊙attaching-last ∘ ⊙cw-take Sm≤n
-- Access the [m]th dimensional inclusion map
cw-incl-last : ∀ {n} (skel : Skeleton (S n))
→ (⟦ skel ⟧₋₁ → ⟦ skel ⟧)
cw-incl-last _ = incl
⊙cw-incl-last : ∀ {n} (⊙skel : ⊙Skeleton (S n))
→ (⊙⟦ ⊙skel ⟧₋₁ ⊙→ ⊙⟦ ⊙skel ⟧)
⊙cw-incl-last _ = incl , idp
cw-incl-nth : ∀ {m n : ℕ} (Sm≤n : S m ≤ n) (skel : Skeleton n)
→ ⟦ cw-take Sm≤n skel ⟧₋₁ → ⟦ cw-take Sm≤n skel ⟧
cw-incl-nth Sm≤n = cw-incl-last ∘ cw-take Sm≤n
⊙cw-incl-nth : ∀ {m n : ℕ} (Sm≤n : S m ≤ n) (⊙skel : ⊙Skeleton n)
→ (⊙⟦ ⊙cw-take Sm≤n ⊙skel ⟧₋₁ ⊙→ ⊙⟦ ⊙cw-take Sm≤n ⊙skel ⟧)
⊙cw-incl-nth Sm≤n = ⊙cw-incl-last ∘ ⊙cw-take Sm≤n
cw-incl-tail : ∀ {m n : ℕ} (m≤n : m ≤ n) (skel : Skeleton n)
→ (⟦ cw-take m≤n skel ⟧ → ⟦ skel ⟧)
cw-incl-tail (inl idp) skel = idf ⟦ skel ⟧
cw-incl-tail (inr ltS) skel = cw-incl-last skel
cw-incl-tail (inr (ltSR lt)) skel =
cw-incl-last skel ∘ cw-incl-tail (inr lt) (cw-init skel)
⊙cw-incl-tail : ∀ {m n : ℕ} (m≤n : m ≤ n) (⊙skel : ⊙Skeleton n)
→ (⊙⟦ ⊙cw-take m≤n ⊙skel ⟧ ⊙→ ⊙⟦ ⊙skel ⟧)
⊙cw-incl-tail (inl idp) ⊙skel = ⊙idf ⊙⟦ ⊙skel ⟧
⊙cw-incl-tail (inr ltS) ⊙skel = ⊙cw-incl-last ⊙skel
⊙cw-incl-tail (inr (ltSR lt)) ⊙skel =
⊙cw-incl-last ⊙skel ⊙∘ ⊙cw-incl-tail (inr lt) (⊙cw-init ⊙skel)
-- Extra conditions on CW complexes
-- 1. decidable equalities
has-cells-with-dec-eq : ∀ {n} → Skeleton n → Type i
has-cells-with-dec-eq {n = O} skel = has-dec-eq (cells-last skel)
has-cells-with-dec-eq {n = S n} skel =
has-cells-with-dec-eq (cw-init skel) × has-dec-eq (cells-last skel)
⊙has-cells-with-dec-eq : ∀ {n} → ⊙Skeleton n → Type i
⊙has-cells-with-dec-eq = has-cells-with-dec-eq ∘ ⊙Skeleton.skel
cells-last-has-dec-eq : ∀ {n} (skel : Skeleton n)
→ has-cells-with-dec-eq skel → has-dec-eq (cells-last skel)
cells-last-has-dec-eq {n = O} skel dec = dec
cells-last-has-dec-eq {n = S n} skel dec = snd dec
init-has-cells-with-dec-eq : ∀ {n} (skel : Skeleton (S n))
→ has-cells-with-dec-eq skel
→ has-cells-with-dec-eq (cw-init skel)
init-has-cells-with-dec-eq skel dec = fst dec
take-has-cells-with-dec-eq : ∀ {m n} (m≤n : m ≤ n) (skel : Skeleton n)
→ has-cells-with-dec-eq skel
→ has-cells-with-dec-eq (cw-take m≤n skel)
take-has-cells-with-dec-eq (inl idp) skel dec = dec
take-has-cells-with-dec-eq (inr ltS) skel dec = init-has-cells-with-dec-eq skel dec
take-has-cells-with-dec-eq (inr (ltSR lt)) skel dec
= take-has-cells-with-dec-eq (inr lt) (cw-init skel) (init-has-cells-with-dec-eq skel dec)
cells-nth-has-dec-eq : ∀ {m n} (m≤n : m ≤ n) (skel : Skeleton n)
→ has-cells-with-dec-eq skel → has-dec-eq (cells-nth m≤n skel)
cells-nth-has-dec-eq m≤n skel dec =
cells-last-has-dec-eq (cw-take m≤n skel)
(take-has-cells-with-dec-eq m≤n skel dec)
has-cells-with-dec-eq-is-prop : ∀ {n} {skel : Skeleton n}
→ is-prop (has-cells-with-dec-eq skel)
has-cells-with-dec-eq-is-prop {n = O} = has-dec-eq-is-prop
has-cells-with-dec-eq-is-prop {n = S n} =
×-level has-cells-with-dec-eq-is-prop has-dec-eq-is-prop
-- 2. choice
has-cells-with-choice : TLevel → {n : ℕ} → Skeleton n → (j : ULevel) → Type (lmax i (lsucc j))
has-cells-with-choice t {n = O} skel j = has-choice t (cells-last skel) j
has-cells-with-choice t {n = S n} skel j =
has-cells-with-choice t (cw-init skel) j × has-choice t (cells-last skel) j
⊙has-cells-with-choice : TLevel → {n : ℕ} → ⊙Skeleton n → (j : ULevel) → Type (lmax i (lsucc j))
⊙has-cells-with-choice t ⊙skel j = has-cells-with-choice t (⊙Skeleton.skel ⊙skel) j
⊙cells-last-has-choice : {t : TLevel} {n : ℕ} (⊙skel : ⊙Skeleton n) {j : ULevel}
→ ⊙has-cells-with-choice t ⊙skel j
→ has-choice t (⊙cells-last ⊙skel) j
⊙cells-last-has-choice {n = O} ⊙skel ac = ac
⊙cells-last-has-choice {n = S n} ⊙skel ac = snd ac
⊙init-has-cells-with-choice : {t : TLevel} {n : ℕ} (⊙skel : ⊙Skeleton (S n)) {j : ULevel}
→ ⊙has-cells-with-choice t ⊙skel j
→ ⊙has-cells-with-choice t (⊙cw-init ⊙skel) j
⊙init-has-cells-with-choice ⊙skel ac = fst ac
⊙take-has-cells-with-choice : {t : TLevel} {m n : ℕ} (m≤n : m ≤ n) (⊙skel : ⊙Skeleton n) {j : ULevel}
→ ⊙has-cells-with-choice t ⊙skel j
→ ⊙has-cells-with-choice t (⊙cw-take m≤n ⊙skel) j
⊙take-has-cells-with-choice (inl idp) ⊙skel ac = ac
⊙take-has-cells-with-choice (inr ltS) ⊙skel ac = ⊙init-has-cells-with-choice ⊙skel ac
⊙take-has-cells-with-choice (inr (ltSR lt)) ⊙skel ac
= ⊙take-has-cells-with-choice (inr lt) (⊙cw-init ⊙skel) (⊙init-has-cells-with-choice ⊙skel ac)
⊙cells-nth-has-choice : {t : TLevel} {m n : ℕ} (m≤n : m ≤ n) (⊙skel : ⊙Skeleton n) {j : ULevel}
→ ⊙has-cells-with-choice t ⊙skel j
→ has-choice t (⊙cells-nth m≤n ⊙skel) j
⊙cells-nth-has-choice m≤n ⊙skel ac = ⊙cells-last-has-choice (⊙cw-take m≤n ⊙skel)
(⊙take-has-cells-with-choice m≤n ⊙skel ac)
{-
The following are not needed.
-- Dimensional lifting
cw-lift₁ : ∀ {n : ℕ} → Skeleton n → Skeleton (S n)
cw-lift₁ skel = attached-skeleton skel
(Lift Empty , Lift-level Empty-is-set)
λ{(lift ()) _}
-- This slightly stretches the naming convension
-- to two skeletons being extensionally equal.
cw-lift₁-equiv : ∀ {n} (skel : Skeleton n)
→ ⟦ cw-lift₁ skel ⟧ ≃ ⟦ skel ⟧
cw-lift₁-equiv skel = equiv to incl to-incl incl-to
where
to : ⟦ cw-lift₁ skel ⟧ → ⟦ skel ⟧
to = Attached-rec (idf ⟦ skel ⟧) (λ{(lift ())}) (λ{(lift ()) _})
to-incl : ∀ x → to (incl x) == x
to-incl _ = idp
incl-to : ∀ x → incl (to x) == x
incl-to = Attached-elim (λ _ → idp) (λ{(lift ())}) (λ{(lift ()) _})
cw-lift : ∀ {n m : ℕ} → n < m → Skeleton n → Skeleton m
cw-lift ltS = cw-lift₁
cw-lift (ltSR lt) = cw-lift₁ ∘ cw-lift lt
-}
|
Transynther/x86/_processed/AVXALIGN/_ht_st_zr_/i3-7100_9_0x84_notsx.log_21829_3090.asm | ljhsiun2/medusa | 9 | 18092 | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r8
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x7c6, %rdx
nop
nop
cmp %r13, %r13
vmovups (%rdx), %ymm2
vextracti128 $0, %ymm2, %xmm2
vpextrq $1, %xmm2, %r8
nop
nop
nop
nop
dec %rdi
lea addresses_A_ht+0x14ac6, %rsi
lea addresses_WC_ht+0x18bee, %rdi
nop
and $40640, %rax
mov $108, %rcx
rep movsl
sub $53218, %r13
lea addresses_normal_ht+0x1dc36, %rsi
clflush (%rsi)
nop
nop
nop
nop
xor %rdx, %rdx
movl $0x61626364, (%rsi)
nop
inc %rax
lea addresses_D_ht+0x14466, %rsi
lea addresses_UC_ht+0x16f86, %rdi
clflush (%rdi)
nop
nop
cmp $28813, %r12
mov $106, %rcx
rep movsb
nop
nop
nop
nop
nop
and %rax, %rax
lea addresses_UC_ht+0x13b17, %rsi
lea addresses_A_ht+0x148bc, %rdi
clflush (%rdi)
nop
nop
cmp %r8, %r8
mov $19, %rcx
rep movsl
nop
nop
and $22310, %rax
lea addresses_A_ht+0x8f42, %rsi
lea addresses_WC_ht+0x1dc56, %rdi
nop
nop
xor %r13, %r13
mov $5, %rcx
rep movsq
nop
nop
nop
nop
and %r8, %r8
lea addresses_D_ht+0x846, %rax
nop
nop
add $38829, %rdx
mov (%rax), %r8d
cmp $63775, %rdi
lea addresses_WC_ht+0x1a46, %rdi
nop
nop
nop
cmp $57176, %r12
movb (%rdi), %cl
nop
nop
nop
sub $7410, %rax
lea addresses_D_ht+0x76c6, %rsi
lea addresses_normal_ht+0x110f6, %rdi
clflush (%rdi)
nop
nop
nop
nop
cmp %rdx, %rdx
mov $3, %rcx
rep movsl
nop
cmp %r12, %r12
lea addresses_WT_ht+0x18246, %rsi
lea addresses_D_ht+0x5d05, %rdi
nop
nop
nop
nop
nop
cmp $43423, %r8
mov $58, %rcx
rep movsl
nop
nop
cmp $39970, %r13
lea addresses_normal_ht+0x1103f, %rdi
nop
nop
nop
nop
cmp $10797, %rsi
mov (%rdi), %cx
nop
nop
sub %r8, %r8
lea addresses_normal_ht+0x19946, %rsi
lea addresses_normal_ht+0xc946, %rdi
clflush (%rdi)
nop
nop
nop
nop
sub %r8, %r8
mov $70, %rcx
rep movsb
nop
nop
nop
add $16538, %r8
lea addresses_WT_ht+0x3c6f, %rsi
lea addresses_UC_ht+0x16886, %rdi
nop
cmp %r13, %r13
mov $47, %rcx
rep movsl
nop
cmp %rsi, %rsi
lea addresses_D_ht+0xf346, %r12
clflush (%r12)
nop
nop
sub $421, %rdx
movw $0x6162, (%r12)
nop
nop
nop
inc %r13
lea addresses_D_ht+0x654e, %rsi
lea addresses_UC_ht+0x11096, %rdi
nop
nop
nop
dec %r8
mov $87, %rcx
rep movsw
sub %r8, %r8
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_normal+0x7946, %rsi
lea addresses_WT+0x168c6, %rdi
nop
nop
add $39556, %rbx
mov $120, %rcx
rep movsl
nop
nop
nop
nop
xor $16654, %rsi
// Store
lea addresses_WC+0x13146, %r12
nop
nop
nop
nop
cmp $64583, %rbx
movw $0x5152, (%r12)
nop
add $8350, %rbx
// Store
lea addresses_A+0x1ecc, %r12
sub $47437, %rbx
movb $0x51, (%r12)
nop
nop
nop
nop
nop
sub $30208, %r12
// Store
lea addresses_WT+0xf6e6, %r12
nop
nop
nop
sub $17194, %rdx
mov $0x5152535455565758, %r14
movq %r14, %xmm1
movups %xmm1, (%r12)
nop
nop
sub $16961, %rsi
// Store
lea addresses_RW+0x1e3de, %r12
nop
nop
nop
nop
add $14638, %rsi
mov $0x5152535455565758, %rbx
movq %rbx, %xmm5
movups %xmm5, (%r12)
nop
nop
nop
nop
dec %rsi
// Faulty Load
lea addresses_normal+0x1f946, %rdi
nop
and $12171, %rcx
vmovntdqa (%rdi), %ymm7
vextracti128 $1, %ymm7, %xmm7
vpextrq $1, %xmm7, %rbx
lea oracles, %rdx
and $0xff, %rbx
shlq $12, %rbx
mov (%rdx,%rbx,1), %rbx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_normal', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WT', 'congruent': 7, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WC', 'same': True, 'size': 2, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A', 'same': False, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_WT', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_RW', 'same': False, 'size': 16, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_normal', 'same': True, 'size': 32, 'congruent': 0, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 4, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 4, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'same': True, 'size': 1, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': True}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 2, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'00': 39, '49': 222, '46': 10118, '45': 2426, '44': 3241, '34': 5783}
45 44 46 34 46 45 34 44 45 34 44 45 34 46 34 46 46 34 46 46 34 46 45 34 46 44 34 46 45 46 46 34 46 45 46 34 44 44 34 44 46 34 46 45 46 34 46 46 46 34 44 46 46 44 45 34 46 46 44 46 34 44 46 46 46 46 34 46 46 46 46 46 34 46 34 44 44 46 46 49 45 46 34 49 46 46 34 46 45 34 34 44 34 46 45 34 46 45 46 46 46 46 46 46 34 44 46 46 49 46 45 34 46 45 46 34 44 45 46 34 46 46 46 34 44 46 34 46 34 45 46 34 44 45 46 46 45 34 46 34 34 45 46 34 46 46 34 44 34 46 46 34 46 46 46 46 46 34 46 45 34 46 46 34 44 45 34 45 46 34 44 45 34 44 45 34 46 46 46 34 46 45 46 46 34 46 45 46 34 46 46 34 44 45 46 34 34 44 46 34 46 44 46 34 49 44 46 34 46 45 46 46 46 46 34 44 45 46 44 46 34 44 46 46 46 46 34 44 45 34 44 46 34 46 46 34 44 45 34 44 46 46 46 34 46 46 34 44 34 46 46 34 44 46 34 46 34 46 45 34 46 46 34 46 45 46 34 46 46 34 44 46 34 44 46 46 34 44 34 46 45 34 46 44 34 46 46 34 46 45 34 46 45 46 34 46 44 46 34 44 46 46 46 46 46 46 46 34 46 45 46 34 44 46 34 46 44 34 46 46 46 46 34 44 34 46 45 46 34 46 45 34 44 44 46 46 44 46 49 44 46 46 44 46 34 44 46 46 34 46 45 34 46 45 46 34 44 44 46 49 46 34 46 46 34 46 46 34 46 46 46 46 46 46 34 49 46 46 46 45 46 46 34 45 46 34 46 34 46 46 46 44 46 46 44 45 46 46 46 44 45 34 44 45 34 46 00 34 46 46 46 46 34 46 46 34 44 46 34 46 45 46 44 45 46 34 44 44 46 34 46 44 34 46 46 34 46 45 46 34 34 46 44 45 46 34 46 46 46 44 46 34 46 45 34 44 45 34 49 46 46 46 44 46 34 46 45 34 46 45 46 34 46 44 34 44 46 46 46 34 46 46 34 44 44 46 46 46 46 34 34 46 46 46 46 45 34 46 46 49 44 46 34 44 34 46 45 34 34 44 46 46 46 46 46 46 46 34 44 45 34 44 46 46 49 46 46 34 46 46 44 46 46 46 34 46 45 46 34 46 46 34 34 46 45 34 46 46 34 44 45 34 44 46 46 34 46 46 34 46 46 34 44 46 34 46 46 34 46 45 46 46 34 46 46 34 34 46 45 46 46 46 46 45 34 46 45 46 34 46 46 34 46 44 46 44 46 34 44 46 34 46 46 46 34 46 45 46 49 46 34 46 46 34 46 44 34 46 46 46 34 44 46 34 46 45 34 44 46 34 44 45 34 46 45 46 34 44 46 34 46 46 34 44 45 46 46 49 44 46 34 34 44 46 34 34 46 46 34 46 45 46 34 44 45 34 46 46 46 46 46 34 49 46 46 34 46 46 34 44 46 34 46 46 46 34 44 45 34 44 46 34 46 34 46 45 46 46 44 45 34 44 46 34 46 34 44 46 46 34 44 46 34 46 46 34 46 45 46 34 46 45 46 34 46 46 34 44 46 34 44 45 46 34 44 46 34 44 45 46 34 46 46 34 46 46 46 34 46 46 34 34 44 46 34 44 46 34 44 46 46 45 34 46 46 34 46 45 34 46 45 46 34 49 46 46 34 44 46 46 34 44 46 46 46 46 49 46 46 46 34 44 45 46 34 46 46 46 34 44 46 46 34 44 46 34 44 46 34 44 45 34 44 45 34 46 44 46 34 46 45 46 34 44 46 34 44 44 34 44 34 44 44 34 44 34 46 45 46 34 44 34 46 45 46 34 44 34 46 45 46 34 44 46 34 46 45 34 44 34 46 46 46 46 34 44 45 34 44 45 46 34 44 46 34 46 46 34 44 45 46 46 46 34 46 46 46 44 46 34 44 45 46 34 44 46 49 46 45 46 46 44 46 34 44 45 45 46 34 44 46 34 46 46 34 34 46 46 46 34 46 44 34 49 46 46 34 44 34 46 46 34 44 46 34 46 46 34 46 34 46 44 34 44 34 44 46 34 46 46 44 46 46 34 46 45 46 34 44 45 34 44 45 34 44 46 34 46 46 34 46 45 46 34 46 46 46 34 46 45 46 46 46 34 46 46 34 34 46 46 34 44 46 44 46 34 44 46 49 44
*/
|
src/main/antlr/MrParser.g4 | interair/mr-lang | 0 | 2955 | <reponame>interair/mr-lang
parser grammar MrParser;
options { tokenVocab=MrLexer; }
mrFile : lines=line+ ;
line : statement (NEWLINE | EOF) ;
statement : varDeclaration # varDeclarationStatement
| assignment # assignmentStatement
| print # printStatement
| map # mapStatement;
varDeclaration : VAR assignment ;
print : PRINT LPAREN expression RPAREN ;
lambda : ID+ LAMBDA to=expression;
map : MAP LPAREN source=expression COMMA lambda RPAREN ;
assignment : ID ASSIGN expression
| ID ASSIGN statement;
expression : left=expression operator=POWER right=expression # binaryOperation
| left=expression operator=(DIVISION|ASTERISK) right=expression # binaryOperation
| left=expression operator=(PLUS|MINUS) right=expression # binaryOperation
| LPAREN expression RPAREN # parenExpression
| LRANGE left=expression COMMA right=expression RRANGE # rangeExpression
| REDUCE LPAREN source=ID COMMA initVal=(INTLIT|DECLIT) COMMA lambda RPAREN # reduceStatement
| ID # varReference
| MINUS expression # minusExpression
| INTLIT # intLiteral
| DECLIT # decimalLiteral ;
type : INT # integer
| DECIMAL # decimal ;
|
tools/command.asm | ssbostan/zagros | 21 | 88566 |
; ======================== ZagrOS =======================
; Zagros Open Source Operating System
; <NAME> (<EMAIL>)
; Bostandoust.IR
; ======================== ZagrOS =======================
; ==================== tools_command ====================
tools_command:
push si
call endl
mov si, offset COMMAND_WELCOME
call putstr
call endl
call endl
mov si, offset COMMAND_COMMAND
call putstr
call endl
mov si, offset COMMAND_SYSINFO
call putstr
call endl
mov si, offset COMMAND_CLEAR
call putstr
call endl
mov si, offset COMMAND_REBOOT
call putstr
call endl
mov si, offset COMMAND_TIME
call putstr
call endl
mov si, offset COMMAND_DUMP
call putstr
call endl
pop si
ret
COMMAND_WELCOME db "command v.0.0.1 (25/10/2012).", 00h
COMMAND_COMMAND db " command: show this list.", 00h
COMMAND_SYSINFO db " sysinfo: show system information.", 00h
COMMAND_CLEAR db " clear: clear terminal window.", 00h
COMMAND_REBOOT db " reboot: reboot system.", 00h
COMMAND_TIME db " time: show current date and time.", 00h
COMMAND_DUMP db " dump: dump cpu registers.", 00h
; ==================== tools_command ====================
|
src/main/fragment/mos6502-common/vdum1=vdum2_band_vdum3.asm | jbrandwood/kickc | 2 | 240526 | <gh_stars>1-10
lda {m2}
and {m3}
sta {m1}
lda {m2}+1
and {m3}+1
sta {m1}+1
lda {m2}+2
and {m3}+2
sta {m1}+2
lda {m2}+3
and {m3}+3
sta {m1}+3 |
third_party/antlr_grammars_v4/xsd-regex/regexParser.g4 | mikhan808/rsyntaxtextarea-antlr4-extension | 4 | 6186 | /*
* [The "BSD license"]
* Copyright (c) 2019 PANTHEON.tech
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Parser grammar for https://www.w3.org/TR/2004/REC-xmlschema-2-20041028/#regexs.
*
* This grammar is modified in following ways:
* - charGroup definition inlines the charClassSub case
* This allows us to simplify processing, eliminating one level of nesting. It
* also makes this rule consistent with XSD 1.1 definition.
*/
parser grammar regexParser;
options { tokenVocab = regexLexer; }
// Parser root context, ensures all input is matched
root: regExp EOF
;
// Regular Expression
regExp : branch (PIPE branch)*
;
// Branch
branch : piece*
;
// Piece
piece : atom quantifier?
;
// Quantifier
quantifier : QUESTION | STAR | PLUS | StartQuantity quantity EndQuantity
;
quantity : quantRange | quantMin | QuantExact
;
quantRange : QuantExact COMMA QuantExact
;
quantMin : QuantExact COMMA
;
// Atom
atom : Char | charClass | (LPAREN regExp RPAREN)
;
// Character Class
charClass : charClassEsc | charClassExpr | WildcardEsc
;
// Character Class Expression
charClassExpr : (NegCharGroup | NestedNegCharGroup | PosCharGroup | NestedPosCharGroup) charGroup EndCharGroup
;
// Character Group
// In order to disambiguate the use of DASH's roles in Character Class Subtraction and in posCharGroup
// tail, we explicitly handle it here. ANTLR will consider the subrules in order and they completely
// disambiguate use [a--[f]], [a-[f]], [a-], [a]. We have borrowed some of the clarification from
// https://www.w3.org/TR/2012/REC-xmlschema11-2-20120405/ to make this work
charGroup : posCharGroup? DASH DASH charClassExpr
| posCharGroup DASH charClassExpr
| posCharGroup DASH?
| DASH
;
// Positive Character Group
posCharGroup : DASH? (charRange | charClassEsc)+
;
// Character Range, sans the DASH possibility
charRange : seRange | XmlChar
;
seRange : charOrEsc DASH charOrEsc
;
charOrEsc : XmlChar | SingleCharEsc
;
// Character Class Escape
charClassEsc : SingleCharEsc | NestedSingleCharEsc | MultiCharEsc | NestedMultiCharEsc | catEsc | complEsc
;
// Category Escape
catEsc : (CatEsc | NestedCatEsc) charProp EndCategory
;
complEsc : (ComplEsc | NestedComplEsc) charProp EndCategory
;
charProp : IsCategory | IsBlock
;
|
src/gnat/uintp.adb | My-Colaborations/dynamo | 15 | 4083 | <filename>src/gnat/uintp.adb
------------------------------------------------------------------------------
-- --
-- GNAT COMPILER COMPONENTS --
-- --
-- U I N T P --
-- --
-- B o d y --
-- --
-- Copyright (C) 1992-2014, Free Software Foundation, Inc. --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
-- ware Foundation; either version 3, or (at your option) any later ver- --
-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
-- or FITNESS FOR A PARTICULAR PURPOSE. --
-- --
-- As a special exception under Section 7 of GPL version 3, you are granted --
-- additional permissions described in the GCC Runtime Library Exception, --
-- version 3.1, as published by the Free Software Foundation. --
-- --
-- You should have received a copy of the GNU General Public License and --
-- a copy of the GCC Runtime Library Exception along with this program; --
-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --
-- <http://www.gnu.org/licenses/>. --
-- --
-- GNAT was originally developed by the GNAT team at New York University. --
-- Extensive contributions were provided by Ada Core Technologies Inc. --
-- --
------------------------------------------------------------------------------
with Output; use Output;
with Tree_IO; use Tree_IO;
with GNAT.HTable; use GNAT.HTable;
package body Uintp is
------------------------
-- Local Declarations --
------------------------
Uint_Int_First : Uint := Uint_0;
-- Uint value containing Int'First value, set by Initialize. The initial
-- value of Uint_0 is used for an assertion check that ensures that this
-- value is not used before it is initialized. This value is used in the
-- UI_Is_In_Int_Range predicate, and it is right that this is a host value,
-- since the issue is host representation of integer values.
Uint_Int_Last : Uint;
-- Uint value containing Int'Last value set by Initialize
UI_Power_2 : array (Int range 0 .. 64) of Uint;
-- This table is used to memoize exponentiations by powers of 2. The Nth
-- entry, if set, contains the Uint value 2 ** N. Initially UI_Power_2_Set
-- is zero and only the 0'th entry is set, the invariant being that all
-- entries in the range 0 .. UI_Power_2_Set are initialized.
UI_Power_2_Set : Nat;
-- Number of entries set in UI_Power_2;
UI_Power_10 : array (Int range 0 .. 64) of Uint;
-- This table is used to memoize exponentiations by powers of 10 in the
-- same manner as described above for UI_Power_2.
UI_Power_10_Set : Nat;
-- Number of entries set in UI_Power_10;
Uints_Min : Uint;
Udigits_Min : Int;
-- These values are used to make sure that the mark/release mechanism does
-- not destroy values saved in the U_Power tables or in the hash table used
-- by UI_From_Int. Whenever an entry is made in either of these tables,
-- Uints_Min and Udigits_Min are updated to protect the entry, and Release
-- never cuts back beyond these minimum values.
Int_0 : constant Int := 0;
Int_1 : constant Int := 1;
Int_2 : constant Int := 2;
-- These values are used in some cases where the use of numeric literals
-- would cause ambiguities (integer vs Uint).
----------------------------
-- UI_From_Int Hash Table --
----------------------------
-- UI_From_Int uses a hash table to avoid duplicating entries and wasting
-- storage. This is particularly important for complex cases of back
-- annotation.
subtype Hnum is Nat range 0 .. 1022;
function Hash_Num (F : Int) return Hnum;
-- Hashing function
package UI_Ints is new Simple_HTable (
Header_Num => Hnum,
Element => Uint,
No_Element => No_Uint,
Key => Int,
Hash => Hash_Num,
Equal => "=");
-----------------------
-- Local Subprograms --
-----------------------
function Direct (U : Uint) return Boolean;
pragma Inline (Direct);
-- Returns True if U is represented directly
function Direct_Val (U : Uint) return Int;
-- U is a Uint for is represented directly. The returned result is the
-- value represented.
function GCD (Jin, Kin : Int) return Int;
-- Compute GCD of two integers. Assumes that Jin >= Kin >= 0
procedure Image_Out
(Input : Uint;
To_Buffer : Boolean;
Format : UI_Format);
-- Common processing for UI_Image and UI_Write, To_Buffer is set True for
-- UI_Image, and false for UI_Write, and Format is copied from the Format
-- parameter to UI_Image or UI_Write.
procedure Init_Operand (UI : Uint; Vec : out UI_Vector);
pragma Inline (Init_Operand);
-- This procedure puts the value of UI into the vector in canonical
-- multiple precision format. The parameter should be of the correct size
-- as determined by a previous call to N_Digits (UI). The first digit of
-- Vec contains the sign, all other digits are always non-negative. Note
-- that the input may be directly represented, and in this case Vec will
-- contain the corresponding one or two digit value. The low bound of Vec
-- is always 1.
function Least_Sig_Digit (Arg : Uint) return Int;
pragma Inline (Least_Sig_Digit);
-- Returns the Least Significant Digit of Arg quickly. When the given Uint
-- is less than 2**15, the value returned is the input value, in this case
-- the result may be negative. It is expected that any use will mask off
-- unnecessary bits. This is used for finding Arg mod B where B is a power
-- of two. Hence the actual base is irrelevant as long as it is a power of
-- two.
procedure Most_Sig_2_Digits
(Left : Uint;
Right : Uint;
Left_Hat : out Int;
Right_Hat : out Int);
-- Returns leading two significant digits from the given pair of Uint's.
-- Mathematically: returns Left / (Base ** K) and Right / (Base ** K) where
-- K is as small as possible S.T. Right_Hat < Base * Base. It is required
-- that Left > Right for the algorithm to work.
function N_Digits (Input : Uint) return Int;
pragma Inline (N_Digits);
-- Returns number of "digits" in a Uint
procedure UI_Div_Rem
(Left, Right : Uint;
Quotient : out Uint;
Remainder : out Uint;
Discard_Quotient : Boolean := False;
Discard_Remainder : Boolean := False);
-- Compute Euclidean division of Left by Right. If Discard_Quotient is
-- False then the quotient is returned in Quotient (otherwise Quotient is
-- set to No_Uint). If Discard_Remainder is False, then the remainder is
-- returned in Remainder (otherwise Remainder is set to No_Uint).
--
-- If Discard_Quotient is True, Quotient is set to No_Uint
-- If Discard_Remainder is True, Remainder is set to No_Uint
------------
-- Direct --
------------
function Direct (U : Uint) return Boolean is
begin
return Int (U) <= Int (Uint_Direct_Last);
end Direct;
----------------
-- Direct_Val --
----------------
function Direct_Val (U : Uint) return Int is
begin
pragma Assert (Direct (U));
return Int (U) - Int (Uint_Direct_Bias);
end Direct_Val;
---------
-- GCD --
---------
function GCD (Jin, Kin : Int) return Int is
J, K, Tmp : Int;
begin
pragma Assert (Jin >= Kin);
pragma Assert (Kin >= Int_0);
J := Jin;
K := Kin;
while K /= Uint_0 loop
Tmp := J mod K;
J := K;
K := Tmp;
end loop;
return J;
end GCD;
--------------
-- Hash_Num --
--------------
function Hash_Num (F : Int) return Hnum is
begin
return Types."mod" (F, Hnum'Range_Length);
end Hash_Num;
---------------
-- Image_Out --
---------------
procedure Image_Out
(Input : Uint;
To_Buffer : Boolean;
Format : UI_Format)
is
Marks : constant Uintp.Save_Mark := Uintp.Mark;
Base : Uint;
Ainput : Uint;
Digs_Output : Natural := 0;
-- Counts digits output. In hex mode, but not in decimal mode, we
-- put an underline after every four hex digits that are output.
Exponent : Natural := 0;
-- If the number is too long to fit in the buffer, we switch to an
-- approximate output format with an exponent. This variable records
-- the exponent value.
function Better_In_Hex return Boolean;
-- Determines if it is better to generate digits in base 16 (result
-- is true) or base 10 (result is false). The choice is purely a
-- matter of convenience and aesthetics, so it does not matter which
-- value is returned from a correctness point of view.
procedure Image_Char (C : Character);
-- Internal procedure to output one character
procedure Image_Exponent (N : Natural);
-- Output non-zero exponent. Note that we only use the exponent form in
-- the buffer case, so we know that To_Buffer is true.
procedure Image_Uint (U : Uint);
-- Internal procedure to output characters of non-negative Uint
-------------------
-- Better_In_Hex --
-------------------
function Better_In_Hex return Boolean is
T16 : constant Uint := Uint_2 ** Int'(16);
A : Uint;
begin
A := UI_Abs (Input);
-- Small values up to 2**16 can always be in decimal
if A < T16 then
return False;
end if;
-- Otherwise, see if we are a power of 2 or one less than a power
-- of 2. For the moment these are the only cases printed in hex.
if A mod Uint_2 = Uint_1 then
A := A + Uint_1;
end if;
loop
if A mod T16 /= Uint_0 then
return False;
else
A := A / T16;
end if;
exit when A < T16;
end loop;
while A > Uint_2 loop
if A mod Uint_2 /= Uint_0 then
return False;
else
A := A / Uint_2;
end if;
end loop;
return True;
end Better_In_Hex;
----------------
-- Image_Char --
----------------
procedure Image_Char (C : Character) is
begin
if To_Buffer then
if UI_Image_Length + 6 > UI_Image_Max then
Exponent := Exponent + 1;
else
UI_Image_Length := UI_Image_Length + 1;
UI_Image_Buffer (UI_Image_Length) := C;
end if;
else
Write_Char (C);
end if;
end Image_Char;
--------------------
-- Image_Exponent --
--------------------
procedure Image_Exponent (N : Natural) is
begin
if N >= 10 then
Image_Exponent (N / 10);
end if;
UI_Image_Length := UI_Image_Length + 1;
UI_Image_Buffer (UI_Image_Length) :=
Character'Val (Character'Pos ('0') + N mod 10);
end Image_Exponent;
----------------
-- Image_Uint --
----------------
procedure Image_Uint (U : Uint) is
H : constant array (Int range 0 .. 15) of Character :=
"0123456789ABCDEF";
Q, R : Uint;
begin
UI_Div_Rem (U, Base, Q, R);
if Q > Uint_0 then
Image_Uint (Q);
end if;
if Digs_Output = 4 and then Base = Uint_16 then
Image_Char ('_');
Digs_Output := 0;
end if;
Image_Char (H (UI_To_Int (R)));
Digs_Output := Digs_Output + 1;
end Image_Uint;
-- Start of processing for Image_Out
begin
if Input = No_Uint then
Image_Char ('?');
return;
end if;
UI_Image_Length := 0;
if Input < Uint_0 then
Image_Char ('-');
Ainput := -Input;
else
Ainput := Input;
end if;
if Format = Hex
or else (Format = Auto and then Better_In_Hex)
then
Base := Uint_16;
Image_Char ('1');
Image_Char ('6');
Image_Char ('#');
Image_Uint (Ainput);
Image_Char ('#');
else
Base := Uint_10;
Image_Uint (Ainput);
end if;
if Exponent /= 0 then
UI_Image_Length := UI_Image_Length + 1;
UI_Image_Buffer (UI_Image_Length) := 'E';
Image_Exponent (Exponent);
end if;
Uintp.Release (Marks);
end Image_Out;
-------------------
-- Init_Operand --
-------------------
procedure Init_Operand (UI : Uint; Vec : out UI_Vector) is
Loc : Int;
pragma Assert (Vec'First = Int'(1));
begin
if Direct (UI) then
Vec (1) := Direct_Val (UI);
if Vec (1) >= Base then
Vec (2) := Vec (1) rem Base;
Vec (1) := Vec (1) / Base;
end if;
else
Loc := Uints.Table (UI).Loc;
for J in 1 .. Uints.Table (UI).Length loop
Vec (J) := Udigits.Table (Loc + J - 1);
end loop;
end if;
end Init_Operand;
----------------
-- Initialize --
----------------
procedure Initialize is
begin
Uints.Init;
Udigits.Init;
Uint_Int_First := UI_From_Int (Int'First);
Uint_Int_Last := UI_From_Int (Int'Last);
UI_Power_2 (0) := Uint_1;
UI_Power_2_Set := 0;
UI_Power_10 (0) := Uint_1;
UI_Power_10_Set := 0;
Uints_Min := Uints.Last;
Udigits_Min := Udigits.Last;
UI_Ints.Reset;
end Initialize;
---------------------
-- Least_Sig_Digit --
---------------------
function Least_Sig_Digit (Arg : Uint) return Int is
V : Int;
begin
if Direct (Arg) then
V := Direct_Val (Arg);
if V >= Base then
V := V mod Base;
end if;
-- Note that this result may be negative
return V;
else
return
Udigits.Table
(Uints.Table (Arg).Loc + Uints.Table (Arg).Length - 1);
end if;
end Least_Sig_Digit;
----------
-- Mark --
----------
function Mark return Save_Mark is
begin
return (Save_Uint => Uints.Last, Save_Udigit => Udigits.Last);
end Mark;
-----------------------
-- Most_Sig_2_Digits --
-----------------------
procedure Most_Sig_2_Digits
(Left : Uint;
Right : Uint;
Left_Hat : out Int;
Right_Hat : out Int)
is
begin
pragma Assert (Left >= Right);
if Direct (Left) then
Left_Hat := Direct_Val (Left);
Right_Hat := Direct_Val (Right);
return;
else
declare
L1 : constant Int :=
Udigits.Table (Uints.Table (Left).Loc);
L2 : constant Int :=
Udigits.Table (Uints.Table (Left).Loc + 1);
begin
-- It is not so clear what to return when Arg is negative???
Left_Hat := abs (L1) * Base + L2;
end;
end if;
declare
Length_L : constant Int := Uints.Table (Left).Length;
Length_R : Int;
R1 : Int;
R2 : Int;
T : Int;
begin
if Direct (Right) then
T := Direct_Val (Left);
R1 := abs (T / Base);
R2 := T rem Base;
Length_R := 2;
else
R1 := abs (Udigits.Table (Uints.Table (Right).Loc));
R2 := Udigits.Table (Uints.Table (Right).Loc + 1);
Length_R := Uints.Table (Right).Length;
end if;
if Length_L = Length_R then
Right_Hat := R1 * Base + R2;
elsif Length_L = Length_R + Int_1 then
Right_Hat := R1;
else
Right_Hat := 0;
end if;
end;
end Most_Sig_2_Digits;
---------------
-- N_Digits --
---------------
-- Note: N_Digits returns 1 for No_Uint
function N_Digits (Input : Uint) return Int is
begin
if Direct (Input) then
if Direct_Val (Input) >= Base then
return 2;
else
return 1;
end if;
else
return Uints.Table (Input).Length;
end if;
end N_Digits;
--------------
-- Num_Bits --
--------------
function Num_Bits (Input : Uint) return Nat is
Bits : Nat;
Num : Nat;
begin
-- Largest negative number has to be handled specially, since it is in
-- Int_Range, but we cannot take the absolute value.
if Input = Uint_Int_First then
return Int'Size;
-- For any other number in Int_Range, get absolute value of number
elsif UI_Is_In_Int_Range (Input) then
Num := abs (UI_To_Int (Input));
Bits := 0;
-- If not in Int_Range then initialize bit count for all low order
-- words, and set number to high order digit.
else
Bits := Base_Bits * (Uints.Table (Input).Length - 1);
Num := abs (Udigits.Table (Uints.Table (Input).Loc));
end if;
-- Increase bit count for remaining value in Num
while Types.">" (Num, 0) loop
Num := Num / 2;
Bits := Bits + 1;
end loop;
return Bits;
end Num_Bits;
---------
-- pid --
---------
procedure pid (Input : Uint) is
begin
UI_Write (Input, Decimal);
Write_Eol;
end pid;
---------
-- pih --
---------
procedure pih (Input : Uint) is
begin
UI_Write (Input, Hex);
Write_Eol;
end pih;
-------------
-- Release --
-------------
procedure Release (M : Save_Mark) is
begin
Uints.Set_Last (Uint'Max (M.Save_Uint, Uints_Min));
Udigits.Set_Last (Int'Max (M.Save_Udigit, Udigits_Min));
end Release;
----------------------
-- Release_And_Save --
----------------------
procedure Release_And_Save (M : Save_Mark; UI : in out Uint) is
begin
if Direct (UI) then
Release (M);
else
declare
UE_Len : constant Pos := Uints.Table (UI).Length;
UE_Loc : constant Int := Uints.Table (UI).Loc;
UD : constant Udigits.Table_Type (1 .. UE_Len) :=
Udigits.Table (UE_Loc .. UE_Loc + UE_Len - 1);
begin
Release (M);
Uints.Append ((Length => UE_Len, Loc => Udigits.Last + 1));
UI := Uints.Last;
for J in 1 .. UE_Len loop
Udigits.Append (UD (J));
end loop;
end;
end if;
end Release_And_Save;
procedure Release_And_Save (M : Save_Mark; UI1, UI2 : in out Uint) is
begin
if Direct (UI1) then
Release_And_Save (M, UI2);
elsif Direct (UI2) then
Release_And_Save (M, UI1);
else
declare
UE1_Len : constant Pos := Uints.Table (UI1).Length;
UE1_Loc : constant Int := Uints.Table (UI1).Loc;
UD1 : constant Udigits.Table_Type (1 .. UE1_Len) :=
Udigits.Table (UE1_Loc .. UE1_Loc + UE1_Len - 1);
UE2_Len : constant Pos := Uints.Table (UI2).Length;
UE2_Loc : constant Int := Uints.Table (UI2).Loc;
UD2 : constant Udigits.Table_Type (1 .. UE2_Len) :=
Udigits.Table (UE2_Loc .. UE2_Loc + UE2_Len - 1);
begin
Release (M);
Uints.Append ((Length => UE1_Len, Loc => Udigits.Last + 1));
UI1 := Uints.Last;
for J in 1 .. UE1_Len loop
Udigits.Append (UD1 (J));
end loop;
Uints.Append ((Length => UE2_Len, Loc => Udigits.Last + 1));
UI2 := Uints.Last;
for J in 1 .. UE2_Len loop
Udigits.Append (UD2 (J));
end loop;
end;
end if;
end Release_And_Save;
---------------
-- Tree_Read --
---------------
procedure Tree_Read is
begin
Uints.Tree_Read;
Udigits.Tree_Read;
Tree_Read_Int (Int (Uint_Int_First));
Tree_Read_Int (Int (Uint_Int_Last));
Tree_Read_Int (UI_Power_2_Set);
Tree_Read_Int (UI_Power_10_Set);
Tree_Read_Int (Int (Uints_Min));
Tree_Read_Int (Udigits_Min);
for J in 0 .. UI_Power_2_Set loop
Tree_Read_Int (Int (UI_Power_2 (J)));
end loop;
for J in 0 .. UI_Power_10_Set loop
Tree_Read_Int (Int (UI_Power_10 (J)));
end loop;
end Tree_Read;
----------------
-- Tree_Write --
----------------
procedure Tree_Write is
begin
Uints.Tree_Write;
Udigits.Tree_Write;
Tree_Write_Int (Int (Uint_Int_First));
Tree_Write_Int (Int (Uint_Int_Last));
Tree_Write_Int (UI_Power_2_Set);
Tree_Write_Int (UI_Power_10_Set);
Tree_Write_Int (Int (Uints_Min));
Tree_Write_Int (Udigits_Min);
for J in 0 .. UI_Power_2_Set loop
Tree_Write_Int (Int (UI_Power_2 (J)));
end loop;
for J in 0 .. UI_Power_10_Set loop
Tree_Write_Int (Int (UI_Power_10 (J)));
end loop;
end Tree_Write;
-------------
-- UI_Abs --
-------------
function UI_Abs (Right : Uint) return Uint is
begin
if Right < Uint_0 then
return -Right;
else
return Right;
end if;
end UI_Abs;
-------------
-- UI_Add --
-------------
function UI_Add (Left : Int; Right : Uint) return Uint is
begin
return UI_Add (UI_From_Int (Left), Right);
end UI_Add;
function UI_Add (Left : Uint; Right : Int) return Uint is
begin
return UI_Add (Left, UI_From_Int (Right));
end UI_Add;
function UI_Add (Left : Uint; Right : Uint) return Uint is
begin
-- Simple cases of direct operands and addition of zero
if Direct (Left) then
if Direct (Right) then
return UI_From_Int (Direct_Val (Left) + Direct_Val (Right));
elsif Int (Left) = Int (Uint_0) then
return Right;
end if;
elsif Direct (Right) and then Int (Right) = Int (Uint_0) then
return Left;
end if;
-- Otherwise full circuit is needed
declare
L_Length : constant Int := N_Digits (Left);
R_Length : constant Int := N_Digits (Right);
L_Vec : UI_Vector (1 .. L_Length);
R_Vec : UI_Vector (1 .. R_Length);
Sum_Length : Int;
Tmp_Int : Int;
Carry : Int;
Borrow : Int;
X_Bigger : Boolean := False;
Y_Bigger : Boolean := False;
Result_Neg : Boolean := False;
begin
Init_Operand (Left, L_Vec);
Init_Operand (Right, R_Vec);
-- At least one of the two operands is in multi-digit form.
-- Calculate the number of digits sufficient to hold result.
if L_Length > R_Length then
Sum_Length := L_Length + 1;
X_Bigger := True;
else
Sum_Length := R_Length + 1;
if R_Length > L_Length then
Y_Bigger := True;
end if;
end if;
-- Make copies of the absolute values of L_Vec and R_Vec into X and Y
-- both with lengths equal to the maximum possibly needed. This makes
-- looping over the digits much simpler.
declare
X : UI_Vector (1 .. Sum_Length);
Y : UI_Vector (1 .. Sum_Length);
Tmp_UI : UI_Vector (1 .. Sum_Length);
begin
for J in 1 .. Sum_Length - L_Length loop
X (J) := 0;
end loop;
X (Sum_Length - L_Length + 1) := abs L_Vec (1);
for J in 2 .. L_Length loop
X (J + (Sum_Length - L_Length)) := L_Vec (J);
end loop;
for J in 1 .. Sum_Length - R_Length loop
Y (J) := 0;
end loop;
Y (Sum_Length - R_Length + 1) := abs R_Vec (1);
for J in 2 .. R_Length loop
Y (J + (Sum_Length - R_Length)) := R_Vec (J);
end loop;
if (L_Vec (1) < Int_0) = (R_Vec (1) < Int_0) then
-- Same sign so just add
Carry := 0;
for J in reverse 1 .. Sum_Length loop
Tmp_Int := X (J) + Y (J) + Carry;
if Tmp_Int >= Base then
Tmp_Int := Tmp_Int - Base;
Carry := 1;
else
Carry := 0;
end if;
X (J) := Tmp_Int;
end loop;
return Vector_To_Uint (X, L_Vec (1) < Int_0);
else
-- Find which one has bigger magnitude
if not (X_Bigger or Y_Bigger) then
for J in L_Vec'Range loop
if abs L_Vec (J) > abs R_Vec (J) then
X_Bigger := True;
exit;
elsif abs R_Vec (J) > abs L_Vec (J) then
Y_Bigger := True;
exit;
end if;
end loop;
end if;
-- If they have identical magnitude, just return 0, else swap
-- if necessary so that X had the bigger magnitude. Determine
-- if result is negative at this time.
Result_Neg := False;
if not (X_Bigger or Y_Bigger) then
return Uint_0;
elsif Y_Bigger then
if R_Vec (1) < Int_0 then
Result_Neg := True;
end if;
Tmp_UI := X;
X := Y;
Y := Tmp_UI;
else
if L_Vec (1) < Int_0 then
Result_Neg := True;
end if;
end if;
-- Subtract Y from the bigger X
Borrow := 0;
for J in reverse 1 .. Sum_Length loop
Tmp_Int := X (J) - Y (J) + Borrow;
if Tmp_Int < Int_0 then
Tmp_Int := Tmp_Int + Base;
Borrow := -1;
else
Borrow := 0;
end if;
X (J) := Tmp_Int;
end loop;
return Vector_To_Uint (X, Result_Neg);
end if;
end;
end;
end UI_Add;
--------------------------
-- UI_Decimal_Digits_Hi --
--------------------------
function UI_Decimal_Digits_Hi (U : Uint) return Nat is
begin
-- The maximum value of a "digit" is 32767, which is 5 decimal digits,
-- so an N_Digit number could take up to 5 times this number of digits.
-- This is certainly too high for large numbers but it is not worth
-- worrying about.
return 5 * N_Digits (U);
end UI_Decimal_Digits_Hi;
--------------------------
-- UI_Decimal_Digits_Lo --
--------------------------
function UI_Decimal_Digits_Lo (U : Uint) return Nat is
begin
-- The maximum value of a "digit" is 32767, which is more than four
-- decimal digits, but not a full five digits. The easily computed
-- minimum number of decimal digits is thus 1 + 4 * the number of
-- digits. This is certainly too low for large numbers but it is not
-- worth worrying about.
return 1 + 4 * (N_Digits (U) - 1);
end UI_Decimal_Digits_Lo;
------------
-- UI_Div --
------------
function UI_Div (Left : Int; Right : Uint) return Uint is
begin
return UI_Div (UI_From_Int (Left), Right);
end UI_Div;
function UI_Div (Left : Uint; Right : Int) return Uint is
begin
return UI_Div (Left, UI_From_Int (Right));
end UI_Div;
function UI_Div (Left, Right : Uint) return Uint is
Quotient : Uint;
Remainder : Uint;
pragma Warnings (Off, Remainder);
begin
UI_Div_Rem
(Left, Right,
Quotient, Remainder,
Discard_Remainder => True);
return Quotient;
end UI_Div;
----------------
-- UI_Div_Rem --
----------------
procedure UI_Div_Rem
(Left, Right : Uint;
Quotient : out Uint;
Remainder : out Uint;
Discard_Quotient : Boolean := False;
Discard_Remainder : Boolean := False)
is
begin
pragma Assert (Right /= Uint_0);
Quotient := No_Uint;
Remainder := No_Uint;
-- Cases where both operands are represented directly
if Direct (Left) and then Direct (Right) then
declare
DV_Left : constant Int := Direct_Val (Left);
DV_Right : constant Int := Direct_Val (Right);
begin
if not Discard_Quotient then
Quotient := UI_From_Int (DV_Left / DV_Right);
end if;
if not Discard_Remainder then
Remainder := UI_From_Int (DV_Left rem DV_Right);
end if;
return;
end;
end if;
declare
L_Length : constant Int := N_Digits (Left);
R_Length : constant Int := N_Digits (Right);
Q_Length : constant Int := L_Length - R_Length + 1;
L_Vec : UI_Vector (1 .. L_Length);
R_Vec : UI_Vector (1 .. R_Length);
D : Int;
Remainder_I : Int;
Tmp_Divisor : Int;
Carry : Int;
Tmp_Int : Int;
Tmp_Dig : Int;
procedure UI_Div_Vector
(L_Vec : UI_Vector;
R_Int : Int;
Quotient : out UI_Vector;
Remainder : out Int);
pragma Inline (UI_Div_Vector);
-- Specialised variant for case where the divisor is a single digit
procedure UI_Div_Vector
(L_Vec : UI_Vector;
R_Int : Int;
Quotient : out UI_Vector;
Remainder : out Int)
is
Tmp_Int : Int;
begin
Remainder := 0;
for J in L_Vec'Range loop
Tmp_Int := Remainder * Base + abs L_Vec (J);
Quotient (Quotient'First + J - L_Vec'First) := Tmp_Int / R_Int;
Remainder := Tmp_Int rem R_Int;
end loop;
if L_Vec (L_Vec'First) < Int_0 then
Remainder := -Remainder;
end if;
end UI_Div_Vector;
-- Start of processing for UI_Div_Rem
begin
-- Result is zero if left operand is shorter than right
if L_Length < R_Length then
if not Discard_Quotient then
Quotient := Uint_0;
end if;
if not Discard_Remainder then
Remainder := Left;
end if;
return;
end if;
Init_Operand (Left, L_Vec);
Init_Operand (Right, R_Vec);
-- Case of right operand is single digit. Here we can simply divide
-- each digit of the left operand by the divisor, from most to least
-- significant, carrying the remainder to the next digit (just like
-- ordinary long division by hand).
if R_Length = Int_1 then
Tmp_Divisor := abs R_Vec (1);
declare
Quotient_V : UI_Vector (1 .. L_Length);
begin
UI_Div_Vector (L_Vec, Tmp_Divisor, Quotient_V, Remainder_I);
if not Discard_Quotient then
Quotient :=
Vector_To_Uint
(Quotient_V, (L_Vec (1) < Int_0 xor R_Vec (1) < Int_0));
end if;
if not Discard_Remainder then
Remainder := UI_From_Int (Remainder_I);
end if;
return;
end;
end if;
-- The possible simple cases have been exhausted. Now turn to the
-- algorithm D from the section of Knuth mentioned at the top of
-- this package.
Algorithm_D : declare
Dividend : UI_Vector (1 .. L_Length + 1);
Divisor : UI_Vector (1 .. R_Length);
Quotient_V : UI_Vector (1 .. Q_Length);
Divisor_Dig1 : Int;
Divisor_Dig2 : Int;
Q_Guess : Int;
R_Guess : Int;
begin
-- [ NORMALIZE ] (step D1 in the algorithm). First calculate the
-- scale d, and then multiply Left and Right (u and v in the book)
-- by d to get the dividend and divisor to work with.
D := Base / (abs R_Vec (1) + 1);
Dividend (1) := 0;
Dividend (2) := abs L_Vec (1);
for J in 3 .. L_Length + Int_1 loop
Dividend (J) := L_Vec (J - 1);
end loop;
Divisor (1) := abs R_Vec (1);
for J in Int_2 .. R_Length loop
Divisor (J) := R_Vec (J);
end loop;
if D > Int_1 then
-- Multiply Dividend by d
Carry := 0;
for J in reverse Dividend'Range loop
Tmp_Int := Dividend (J) * D + Carry;
Dividend (J) := Tmp_Int rem Base;
Carry := Tmp_Int / Base;
end loop;
-- Multiply Divisor by d
Carry := 0;
for J in reverse Divisor'Range loop
Tmp_Int := Divisor (J) * D + Carry;
Divisor (J) := Tmp_Int rem Base;
Carry := Tmp_Int / Base;
end loop;
end if;
-- Main loop of long division algorithm
Divisor_Dig1 := Divisor (1);
Divisor_Dig2 := Divisor (2);
for J in Quotient_V'Range loop
-- [ CALCULATE Q (hat) ] (step D3 in the algorithm)
-- Note: this version of step D3 is from the original published
-- algorithm, which is known to have a bug causing overflows.
-- See: http://www-cs-faculty.stanford.edu/~uno/err2-2e.ps.gz
-- and http://www-cs-faculty.stanford.edu/~uno/all2-pre.ps.gz.
-- The code below is the fixed version of this step.
Tmp_Int := Dividend (J) * Base + Dividend (J + 1);
-- Initial guess
Q_Guess := Tmp_Int / Divisor_Dig1;
R_Guess := Tmp_Int rem Divisor_Dig1;
-- Refine the guess
while Q_Guess >= Base
or else Divisor_Dig2 * Q_Guess >
R_Guess * Base + Dividend (J + 2)
loop
Q_Guess := Q_Guess - 1;
R_Guess := R_Guess + Divisor_Dig1;
exit when R_Guess >= Base;
end loop;
-- [ MULTIPLY & SUBTRACT ] (step D4). Q_Guess * Divisor is
-- subtracted from the remaining dividend.
Carry := 0;
for K in reverse Divisor'Range loop
Tmp_Int := Dividend (J + K) - Q_Guess * Divisor (K) + Carry;
Tmp_Dig := Tmp_Int rem Base;
Carry := Tmp_Int / Base;
if Tmp_Dig < Int_0 then
Tmp_Dig := Tmp_Dig + Base;
Carry := Carry - 1;
end if;
Dividend (J + K) := Tmp_Dig;
end loop;
Dividend (J) := Dividend (J) + Carry;
-- [ TEST REMAINDER ] & [ ADD BACK ] (steps D5 and D6)
-- Here there is a slight difference from the book: the last
-- carry is always added in above and below (cancelling each
-- other). In fact the dividend going negative is used as
-- the test.
-- If the Dividend went negative, then Q_Guess was off by
-- one, so it is decremented, and the divisor is added back
-- into the relevant portion of the dividend.
if Dividend (J) < Int_0 then
Q_Guess := Q_Guess - 1;
Carry := 0;
for K in reverse Divisor'Range loop
Tmp_Int := Dividend (J + K) + Divisor (K) + Carry;
if Tmp_Int >= Base then
Tmp_Int := Tmp_Int - Base;
Carry := 1;
else
Carry := 0;
end if;
Dividend (J + K) := Tmp_Int;
end loop;
Dividend (J) := Dividend (J) + Carry;
end if;
-- Finally we can get the next quotient digit
Quotient_V (J) := Q_Guess;
end loop;
-- [ UNNORMALIZE ] (step D8)
if not Discard_Quotient then
Quotient := Vector_To_Uint
(Quotient_V, (L_Vec (1) < Int_0 xor R_Vec (1) < Int_0));
end if;
if not Discard_Remainder then
declare
Remainder_V : UI_Vector (1 .. R_Length);
Discard_Int : Int;
pragma Warnings (Off, Discard_Int);
begin
UI_Div_Vector
(Dividend (Dividend'Last - R_Length + 1 .. Dividend'Last),
D,
Remainder_V, Discard_Int);
Remainder := Vector_To_Uint (Remainder_V, L_Vec (1) < Int_0);
end;
end if;
end Algorithm_D;
end;
end UI_Div_Rem;
------------
-- UI_Eq --
------------
function UI_Eq (Left : Int; Right : Uint) return Boolean is
begin
return not UI_Ne (UI_From_Int (Left), Right);
end UI_Eq;
function UI_Eq (Left : Uint; Right : Int) return Boolean is
begin
return not UI_Ne (Left, UI_From_Int (Right));
end UI_Eq;
function UI_Eq (Left : Uint; Right : Uint) return Boolean is
begin
return not UI_Ne (Left, Right);
end UI_Eq;
--------------
-- UI_Expon --
--------------
function UI_Expon (Left : Int; Right : Uint) return Uint is
begin
return UI_Expon (UI_From_Int (Left), Right);
end UI_Expon;
function UI_Expon (Left : Uint; Right : Int) return Uint is
begin
return UI_Expon (Left, UI_From_Int (Right));
end UI_Expon;
function UI_Expon (Left : Int; Right : Int) return Uint is
begin
return UI_Expon (UI_From_Int (Left), UI_From_Int (Right));
end UI_Expon;
function UI_Expon (Left : Uint; Right : Uint) return Uint is
begin
pragma Assert (Right >= Uint_0);
-- Any value raised to power of 0 is 1
if Right = Uint_0 then
return Uint_1;
-- 0 to any positive power is 0
elsif Left = Uint_0 then
return Uint_0;
-- 1 to any power is 1
elsif Left = Uint_1 then
return Uint_1;
-- Any value raised to power of 1 is that value
elsif Right = Uint_1 then
return Left;
-- Cases which can be done by table lookup
elsif Right <= Uint_64 then
-- 2 ** N for N in 2 .. 64
if Left = Uint_2 then
declare
Right_Int : constant Int := Direct_Val (Right);
begin
if Right_Int > UI_Power_2_Set then
for J in UI_Power_2_Set + Int_1 .. Right_Int loop
UI_Power_2 (J) := UI_Power_2 (J - Int_1) * Int_2;
Uints_Min := Uints.Last;
Udigits_Min := Udigits.Last;
end loop;
UI_Power_2_Set := Right_Int;
end if;
return UI_Power_2 (Right_Int);
end;
-- 10 ** N for N in 2 .. 64
elsif Left = Uint_10 then
declare
Right_Int : constant Int := Direct_Val (Right);
begin
if Right_Int > UI_Power_10_Set then
for J in UI_Power_10_Set + Int_1 .. Right_Int loop
UI_Power_10 (J) := UI_Power_10 (J - Int_1) * Int (10);
Uints_Min := Uints.Last;
Udigits_Min := Udigits.Last;
end loop;
UI_Power_10_Set := Right_Int;
end if;
return UI_Power_10 (Right_Int);
end;
end if;
end if;
-- If we fall through, then we have the general case (see Knuth 4.6.3)
declare
N : Uint := Right;
Squares : Uint := Left;
Result : Uint := Uint_1;
M : constant Uintp.Save_Mark := Uintp.Mark;
begin
loop
if (Least_Sig_Digit (N) mod Int_2) = Int_1 then
Result := Result * Squares;
end if;
N := N / Uint_2;
exit when N = Uint_0;
Squares := Squares * Squares;
end loop;
Uintp.Release_And_Save (M, Result);
return Result;
end;
end UI_Expon;
----------------
-- UI_From_CC --
----------------
function UI_From_CC (Input : Char_Code) return Uint is
begin
return UI_From_Int (Int (Input));
end UI_From_CC;
-----------------
-- UI_From_Int --
-----------------
function UI_From_Int (Input : Int) return Uint is
U : Uint;
begin
if Min_Direct <= Input and then Input <= Max_Direct then
return Uint (Int (Uint_Direct_Bias) + Input);
end if;
-- If already in the hash table, return entry
U := UI_Ints.Get (Input);
if U /= No_Uint then
return U;
end if;
-- For values of larger magnitude, compute digits into a vector and call
-- Vector_To_Uint.
declare
Max_For_Int : constant := 3;
-- Base is defined so that 3 Uint digits is sufficient to hold the
-- largest possible Int value.
V : UI_Vector (1 .. Max_For_Int);
Temp_Integer : Int := Input;
begin
for J in reverse V'Range loop
V (J) := abs (Temp_Integer rem Base);
Temp_Integer := Temp_Integer / Base;
end loop;
U := Vector_To_Uint (V, Input < Int_0);
UI_Ints.Set (Input, U);
Uints_Min := Uints.Last;
Udigits_Min := Udigits.Last;
return U;
end;
end UI_From_Int;
------------
-- UI_GCD --
------------
-- Lehmer's algorithm for GCD
-- The idea is to avoid using multiple precision arithmetic wherever
-- possible, substituting Int arithmetic instead. See Knuth volume II,
-- Algorithm L (page 329).
-- We use the same notation as Knuth (U_Hat standing for the obvious)
function UI_GCD (Uin, Vin : Uint) return Uint is
U, V : Uint;
-- Copies of Uin and Vin
U_Hat, V_Hat : Int;
-- The most Significant digits of U,V
A, B, C, D, T, Q, Den1, Den2 : Int;
Tmp_UI : Uint;
Marks : constant Uintp.Save_Mark := Uintp.Mark;
Iterations : Integer := 0;
begin
pragma Assert (Uin >= Vin);
pragma Assert (Vin >= Uint_0);
U := Uin;
V := Vin;
loop
Iterations := Iterations + 1;
if Direct (V) then
if V = Uint_0 then
return U;
else
return
UI_From_Int (GCD (Direct_Val (V), UI_To_Int (U rem V)));
end if;
end if;
Most_Sig_2_Digits (U, V, U_Hat, V_Hat);
A := 1;
B := 0;
C := 0;
D := 1;
loop
-- We might overflow and get division by zero here. This just
-- means we cannot take the single precision step
Den1 := V_Hat + C;
Den2 := V_Hat + D;
exit when Den1 = Int_0 or else Den2 = Int_0;
-- Compute Q, the trial quotient
Q := (U_Hat + A) / Den1;
exit when Q /= ((U_Hat + B) / Den2);
-- A single precision step Euclid step will give same answer as a
-- multiprecision one.
T := A - (Q * C);
A := C;
C := T;
T := B - (Q * D);
B := D;
D := T;
T := U_Hat - (Q * V_Hat);
U_Hat := V_Hat;
V_Hat := T;
end loop;
-- Take a multiprecision Euclid step
if B = Int_0 then
-- No single precision steps take a regular Euclid step
Tmp_UI := U rem V;
U := V;
V := Tmp_UI;
else
-- Use prior single precision steps to compute this Euclid step
-- For constructs such as:
-- sqrt_2: constant := 1.41421_35623_73095_04880_16887_24209_698;
-- sqrt_eps: constant long_float := long_float( 1.0 / sqrt_2)
-- ** long_float'machine_mantissa;
--
-- we spend 80% of our time working on this step. Perhaps we need
-- a special case Int / Uint dot product to speed things up. ???
-- Alternatively we could increase the single precision iterations
-- to handle Uint's of some small size ( <5 digits?). Then we
-- would have more iterations on small Uint. On the code above, we
-- only get 5 (on average) single precision iterations per large
-- iteration. ???
Tmp_UI := (UI_From_Int (A) * U) + (UI_From_Int (B) * V);
V := (UI_From_Int (C) * U) + (UI_From_Int (D) * V);
U := Tmp_UI;
end if;
-- If the operands are very different in magnitude, the loop will
-- generate large amounts of short-lived data, which it is worth
-- removing periodically.
if Iterations > 100 then
Release_And_Save (Marks, U, V);
Iterations := 0;
end if;
end loop;
end UI_GCD;
------------
-- UI_Ge --
------------
function UI_Ge (Left : Int; Right : Uint) return Boolean is
begin
return not UI_Lt (UI_From_Int (Left), Right);
end UI_Ge;
function UI_Ge (Left : Uint; Right : Int) return Boolean is
begin
return not UI_Lt (Left, UI_From_Int (Right));
end UI_Ge;
function UI_Ge (Left : Uint; Right : Uint) return Boolean is
begin
return not UI_Lt (Left, Right);
end UI_Ge;
------------
-- UI_Gt --
------------
function UI_Gt (Left : Int; Right : Uint) return Boolean is
begin
return UI_Lt (Right, UI_From_Int (Left));
end UI_Gt;
function UI_Gt (Left : Uint; Right : Int) return Boolean is
begin
return UI_Lt (UI_From_Int (Right), Left);
end UI_Gt;
function UI_Gt (Left : Uint; Right : Uint) return Boolean is
begin
return UI_Lt (Left => Right, Right => Left);
end UI_Gt;
---------------
-- UI_Image --
---------------
procedure UI_Image (Input : Uint; Format : UI_Format := Auto) is
begin
Image_Out (Input, True, Format);
end UI_Image;
function UI_Image
(Input : Uint;
Format : UI_Format := Auto) return String
is
begin
Image_Out (Input, True, Format);
return UI_Image_Buffer (1 .. UI_Image_Length);
end UI_Image;
-------------------------
-- UI_Is_In_Int_Range --
-------------------------
function UI_Is_In_Int_Range (Input : Uint) return Boolean is
begin
-- Make sure we don't get called before Initialize
pragma Assert (Uint_Int_First /= Uint_0);
if Direct (Input) then
return True;
else
return Input >= Uint_Int_First
and then Input <= Uint_Int_Last;
end if;
end UI_Is_In_Int_Range;
------------
-- UI_Le --
------------
function UI_Le (Left : Int; Right : Uint) return Boolean is
begin
return not UI_Lt (Right, UI_From_Int (Left));
end UI_Le;
function UI_Le (Left : Uint; Right : Int) return Boolean is
begin
return not UI_Lt (UI_From_Int (Right), Left);
end UI_Le;
function UI_Le (Left : Uint; Right : Uint) return Boolean is
begin
return not UI_Lt (Left => Right, Right => Left);
end UI_Le;
------------
-- UI_Lt --
------------
function UI_Lt (Left : Int; Right : Uint) return Boolean is
begin
return UI_Lt (UI_From_Int (Left), Right);
end UI_Lt;
function UI_Lt (Left : Uint; Right : Int) return Boolean is
begin
return UI_Lt (Left, UI_From_Int (Right));
end UI_Lt;
function UI_Lt (Left : Uint; Right : Uint) return Boolean is
begin
-- Quick processing for identical arguments
if Int (Left) = Int (Right) then
return False;
-- Quick processing for both arguments directly represented
elsif Direct (Left) and then Direct (Right) then
return Int (Left) < Int (Right);
-- At least one argument is more than one digit long
else
declare
L_Length : constant Int := N_Digits (Left);
R_Length : constant Int := N_Digits (Right);
L_Vec : UI_Vector (1 .. L_Length);
R_Vec : UI_Vector (1 .. R_Length);
begin
Init_Operand (Left, L_Vec);
Init_Operand (Right, R_Vec);
if L_Vec (1) < Int_0 then
-- First argument negative, second argument non-negative
if R_Vec (1) >= Int_0 then
return True;
-- Both arguments negative
else
if L_Length /= R_Length then
return L_Length > R_Length;
elsif L_Vec (1) /= R_Vec (1) then
return L_Vec (1) < R_Vec (1);
else
for J in 2 .. L_Vec'Last loop
if L_Vec (J) /= R_Vec (J) then
return L_Vec (J) > R_Vec (J);
end if;
end loop;
return False;
end if;
end if;
else
-- First argument non-negative, second argument negative
if R_Vec (1) < Int_0 then
return False;
-- Both arguments non-negative
else
if L_Length /= R_Length then
return L_Length < R_Length;
else
for J in L_Vec'Range loop
if L_Vec (J) /= R_Vec (J) then
return L_Vec (J) < R_Vec (J);
end if;
end loop;
return False;
end if;
end if;
end if;
end;
end if;
end UI_Lt;
------------
-- UI_Max --
------------
function UI_Max (Left : Int; Right : Uint) return Uint is
begin
return UI_Max (UI_From_Int (Left), Right);
end UI_Max;
function UI_Max (Left : Uint; Right : Int) return Uint is
begin
return UI_Max (Left, UI_From_Int (Right));
end UI_Max;
function UI_Max (Left : Uint; Right : Uint) return Uint is
begin
if Left >= Right then
return Left;
else
return Right;
end if;
end UI_Max;
------------
-- UI_Min --
------------
function UI_Min (Left : Int; Right : Uint) return Uint is
begin
return UI_Min (UI_From_Int (Left), Right);
end UI_Min;
function UI_Min (Left : Uint; Right : Int) return Uint is
begin
return UI_Min (Left, UI_From_Int (Right));
end UI_Min;
function UI_Min (Left : Uint; Right : Uint) return Uint is
begin
if Left <= Right then
return Left;
else
return Right;
end if;
end UI_Min;
-------------
-- UI_Mod --
-------------
function UI_Mod (Left : Int; Right : Uint) return Uint is
begin
return UI_Mod (UI_From_Int (Left), Right);
end UI_Mod;
function UI_Mod (Left : Uint; Right : Int) return Uint is
begin
return UI_Mod (Left, UI_From_Int (Right));
end UI_Mod;
function UI_Mod (Left : Uint; Right : Uint) return Uint is
Urem : constant Uint := Left rem Right;
begin
if (Left < Uint_0) = (Right < Uint_0)
or else Urem = Uint_0
then
return Urem;
else
return Right + Urem;
end if;
end UI_Mod;
-------------------------------
-- UI_Modular_Exponentiation --
-------------------------------
function UI_Modular_Exponentiation
(B : Uint;
E : Uint;
Modulo : Uint) return Uint
is
M : constant Save_Mark := Mark;
Result : Uint := Uint_1;
Base : Uint := B;
Exponent : Uint := E;
begin
while Exponent /= Uint_0 loop
if Least_Sig_Digit (Exponent) rem Int'(2) = Int'(1) then
Result := (Result * Base) rem Modulo;
end if;
Exponent := Exponent / Uint_2;
Base := (Base * Base) rem Modulo;
end loop;
Release_And_Save (M, Result);
return Result;
end UI_Modular_Exponentiation;
------------------------
-- UI_Modular_Inverse --
------------------------
function UI_Modular_Inverse (N : Uint; Modulo : Uint) return Uint is
M : constant Save_Mark := Mark;
U : Uint;
V : Uint;
Q : Uint;
R : Uint;
X : Uint;
Y : Uint;
T : Uint;
S : Int := 1;
begin
U := Modulo;
V := N;
X := Uint_1;
Y := Uint_0;
loop
UI_Div_Rem (U, V, Quotient => Q, Remainder => R);
U := V;
V := R;
T := X;
X := Y + Q * X;
Y := T;
S := -S;
exit when R = Uint_1;
end loop;
if S = Int'(-1) then
X := Modulo - X;
end if;
Release_And_Save (M, X);
return X;
end UI_Modular_Inverse;
------------
-- UI_Mul --
------------
function UI_Mul (Left : Int; Right : Uint) return Uint is
begin
return UI_Mul (UI_From_Int (Left), Right);
end UI_Mul;
function UI_Mul (Left : Uint; Right : Int) return Uint is
begin
return UI_Mul (Left, UI_From_Int (Right));
end UI_Mul;
function UI_Mul (Left : Uint; Right : Uint) return Uint is
begin
-- Case where product fits in the range of a 32-bit integer
if Int (Left) <= Int (Uint_Max_Simple_Mul)
and then
Int (Right) <= Int (Uint_Max_Simple_Mul)
then
return UI_From_Int (Direct_Val (Left) * Direct_Val (Right));
end if;
-- Otherwise we have the general case (Algorithm M in Knuth)
declare
L_Length : constant Int := N_Digits (Left);
R_Length : constant Int := N_Digits (Right);
L_Vec : UI_Vector (1 .. L_Length);
R_Vec : UI_Vector (1 .. R_Length);
Neg : Boolean;
begin
Init_Operand (Left, L_Vec);
Init_Operand (Right, R_Vec);
Neg := (L_Vec (1) < Int_0) xor (R_Vec (1) < Int_0);
L_Vec (1) := abs (L_Vec (1));
R_Vec (1) := abs (R_Vec (1));
Algorithm_M : declare
Product : UI_Vector (1 .. L_Length + R_Length);
Tmp_Sum : Int;
Carry : Int;
begin
for J in Product'Range loop
Product (J) := 0;
end loop;
for J in reverse R_Vec'Range loop
Carry := 0;
for K in reverse L_Vec'Range loop
Tmp_Sum :=
L_Vec (K) * R_Vec (J) + Product (J + K) + Carry;
Product (J + K) := Tmp_Sum rem Base;
Carry := Tmp_Sum / Base;
end loop;
Product (J) := Carry;
end loop;
return Vector_To_Uint (Product, Neg);
end Algorithm_M;
end;
end UI_Mul;
------------
-- UI_Ne --
------------
function UI_Ne (Left : Int; Right : Uint) return Boolean is
begin
return UI_Ne (UI_From_Int (Left), Right);
end UI_Ne;
function UI_Ne (Left : Uint; Right : Int) return Boolean is
begin
return UI_Ne (Left, UI_From_Int (Right));
end UI_Ne;
function UI_Ne (Left : Uint; Right : Uint) return Boolean is
begin
-- Quick processing for identical arguments. Note that this takes
-- care of the case of two No_Uint arguments.
if Int (Left) = Int (Right) then
return False;
end if;
-- See if left operand directly represented
if Direct (Left) then
-- If right operand directly represented then compare
if Direct (Right) then
return Int (Left) /= Int (Right);
-- Left operand directly represented, right not, must be unequal
else
return True;
end if;
-- Right operand directly represented, left not, must be unequal
elsif Direct (Right) then
return True;
end if;
-- Otherwise both multi-word, do comparison
declare
Size : constant Int := N_Digits (Left);
Left_Loc : Int;
Right_Loc : Int;
begin
if Size /= N_Digits (Right) then
return True;
end if;
Left_Loc := Uints.Table (Left).Loc;
Right_Loc := Uints.Table (Right).Loc;
for J in Int_0 .. Size - Int_1 loop
if Udigits.Table (Left_Loc + J) /=
Udigits.Table (Right_Loc + J)
then
return True;
end if;
end loop;
return False;
end;
end UI_Ne;
----------------
-- UI_Negate --
----------------
function UI_Negate (Right : Uint) return Uint is
begin
-- Case where input is directly represented. Note that since the range
-- of Direct values is non-symmetrical, the result may not be directly
-- represented, this is taken care of in UI_From_Int.
if Direct (Right) then
return UI_From_Int (-Direct_Val (Right));
-- Full processing for multi-digit case. Note that we cannot just copy
-- the value to the end of the table negating the first digit, since the
-- range of Direct values is non-symmetrical, so we can have a negative
-- value that is not Direct whose negation can be represented directly.
else
declare
R_Length : constant Int := N_Digits (Right);
R_Vec : UI_Vector (1 .. R_Length);
Neg : Boolean;
begin
Init_Operand (Right, R_Vec);
Neg := R_Vec (1) > Int_0;
R_Vec (1) := abs R_Vec (1);
return Vector_To_Uint (R_Vec, Neg);
end;
end if;
end UI_Negate;
-------------
-- UI_Rem --
-------------
function UI_Rem (Left : Int; Right : Uint) return Uint is
begin
return UI_Rem (UI_From_Int (Left), Right);
end UI_Rem;
function UI_Rem (Left : Uint; Right : Int) return Uint is
begin
return UI_Rem (Left, UI_From_Int (Right));
end UI_Rem;
function UI_Rem (Left, Right : Uint) return Uint is
Remainder : Uint;
Quotient : Uint;
pragma Warnings (Off, Quotient);
begin
pragma Assert (Right /= Uint_0);
if Direct (Right) and then Direct (Left) then
return UI_From_Int (Direct_Val (Left) rem Direct_Val (Right));
else
UI_Div_Rem
(Left, Right, Quotient, Remainder, Discard_Quotient => True);
return Remainder;
end if;
end UI_Rem;
------------
-- UI_Sub --
------------
function UI_Sub (Left : Int; Right : Uint) return Uint is
begin
return UI_Add (Left, -Right);
end UI_Sub;
function UI_Sub (Left : Uint; Right : Int) return Uint is
begin
return UI_Add (Left, -Right);
end UI_Sub;
function UI_Sub (Left : Uint; Right : Uint) return Uint is
begin
if Direct (Left) and then Direct (Right) then
return UI_From_Int (Direct_Val (Left) - Direct_Val (Right));
else
return UI_Add (Left, -Right);
end if;
end UI_Sub;
--------------
-- UI_To_CC --
--------------
function UI_To_CC (Input : Uint) return Char_Code is
begin
if Direct (Input) then
return Char_Code (Direct_Val (Input));
-- Case of input is more than one digit
else
declare
In_Length : constant Int := N_Digits (Input);
In_Vec : UI_Vector (1 .. In_Length);
Ret_CC : Char_Code;
begin
Init_Operand (Input, In_Vec);
-- We assume value is positive
Ret_CC := 0;
for Idx in In_Vec'Range loop
Ret_CC := Ret_CC * Char_Code (Base) +
Char_Code (abs In_Vec (Idx));
end loop;
return Ret_CC;
end;
end if;
end UI_To_CC;
----------------
-- UI_To_Int --
----------------
function UI_To_Int (Input : Uint) return Int is
pragma Assert (Input /= No_Uint);
begin
if Direct (Input) then
return Direct_Val (Input);
-- Case of input is more than one digit
else
declare
In_Length : constant Int := N_Digits (Input);
In_Vec : UI_Vector (1 .. In_Length);
Ret_Int : Int;
begin
-- Uints of more than one digit could be outside the range for
-- Ints. Caller should have checked for this if not certain.
-- Fatal error to attempt to convert from value outside Int'Range.
pragma Assert (UI_Is_In_Int_Range (Input));
-- Otherwise, proceed ahead, we are OK
Init_Operand (Input, In_Vec);
Ret_Int := 0;
-- Calculate -|Input| and then negates if value is positive. This
-- handles our current definition of Int (based on 2s complement).
-- Is it secure enough???
for Idx in In_Vec'Range loop
Ret_Int := Ret_Int * Base - abs In_Vec (Idx);
end loop;
if In_Vec (1) < Int_0 then
return Ret_Int;
else
return -Ret_Int;
end if;
end;
end if;
end UI_To_Int;
--------------
-- UI_Write --
--------------
procedure UI_Write (Input : Uint; Format : UI_Format := Auto) is
begin
Image_Out (Input, False, Format);
end UI_Write;
---------------------
-- Vector_To_Uint --
---------------------
function Vector_To_Uint
(In_Vec : UI_Vector;
Negative : Boolean)
return Uint
is
Size : Int;
Val : Int;
begin
-- The vector can contain leading zeros. These are not stored in the
-- table, so loop through the vector looking for first non-zero digit
for J in In_Vec'Range loop
if In_Vec (J) /= Int_0 then
-- The length of the value is the length of the rest of the vector
Size := In_Vec'Last - J + 1;
-- One digit value can always be represented directly
if Size = Int_1 then
if Negative then
return Uint (Int (Uint_Direct_Bias) - In_Vec (J));
else
return Uint (Int (Uint_Direct_Bias) + In_Vec (J));
end if;
-- Positive two digit values may be in direct representation range
elsif Size = Int_2 and then not Negative then
Val := In_Vec (J) * Base + In_Vec (J + 1);
if Val <= Max_Direct then
return Uint (Int (Uint_Direct_Bias) + Val);
end if;
end if;
-- The value is outside the direct representation range and must
-- therefore be stored in the table. Expand the table to contain
-- the count and digits. The index of the new table entry will be
-- returned as the result.
Uints.Append ((Length => Size, Loc => Udigits.Last + 1));
if Negative then
Val := -In_Vec (J);
else
Val := +In_Vec (J);
end if;
Udigits.Append (Val);
for K in 2 .. Size loop
Udigits.Append (In_Vec (J + K - 1));
end loop;
return Uints.Last;
end if;
end loop;
-- Dropped through loop only if vector contained all zeros
return Uint_0;
end Vector_To_Uint;
end Uintp;
|
test/Fail/Issue4450.agda | cruhland/agda | 1,989 | 5087 | -- Andreas, 2020-02-18, issue #4450 raised by Nisse
--
-- ETA pragma should be considered unsafe, since type-checking may loop.
{-# OPTIONS --safe --guardedness #-}
open import Agda.Builtin.Equality
record R : Set where
coinductive
field
force : R
open R
{-# ETA R #-}
foo : R
foo .force .force = foo
-- test : foo .force ≡ foo
-- test = refl
-- test makes type checker loop;
-- ETA with --safe is a soft error and only raised after
-- the whole file is processed.
|
src/el-functions-default.ads | jquorning/ada-el | 6 | 12525 | -----------------------------------------------------------------------
-- el-functions-default -- Default function mapper
-- Copyright (C) 2009, 2010, 2021 <NAME>
-- Written by <NAME> (<EMAIL>)
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-----------------------------------------------------------------------
-- The default function mapper allows to register
-- The expression context provides information to resolve runtime
-- information when evaluating an expression. The context provides
-- a resolver whose role is to find variables given their name.
private with Ada.Containers.Indefinite_Hashed_Maps;
private with Ada.Strings.Hash;
package EL.Functions.Default is
-- ------------------------------
-- Default Function mapper
-- ------------------------------
--
type Default_Function_Mapper is new Function_Mapper with private;
-- Find the function knowing its name.
function Get_Function (Mapper : Default_Function_Mapper;
Namespace : String;
Name : String) return Function_Access;
-- Bind a name to a function.
procedure Set_Function (Mapper : in out Default_Function_Mapper;
Namespace : in String;
Name : in String;
Func : in Function_Access);
-- Truncate the string representation represented by <b>Value</b> to
-- the length specified by <b>Size</b>.
function Truncate (Value : EL.Objects.Object;
Size : EL.Objects.Object) return EL.Objects.Object;
private
package Function_Maps is new
Ada.Containers.Indefinite_Hashed_Maps (Key_Type => String,
Element_Type => Function_Access,
Hash => Ada.Strings.Hash,
Equivalent_Keys => "=");
type Default_Function_Mapper is new Function_Mapper with record
Map : Function_Maps.Map;
end record;
end EL.Functions.Default;
|
dino/lcs/123p/1E.asm | zengfr/arcade_game_romhacking_sourcecode_top_secret_data | 6 | 4207 | copyright zengfr site:http://github.com/zengfr/romhack
00042A move.l D1, (A0)+
00042C dbra D0, $42a
0018CE add.w ($1e,A6), D0 [123p+ 18, enemy+18, item+18]
0018D2 move.w D0, ($18,A6) [123p+ 1E, enemy+1E, item+1E]
004D94 move.l D1, (A1)+
004D96 dbra D0, $4d94
00539C move.w (A0), ($1e,A6) [123p+ 18]
0053A0 rts
018CA8 move.l D0, ($1c,A6)
018CAC clr.b ($116,A6)
019140 move.w D0, ($1e,A6)
019144 move.b D0, ($25,A6)
01976C move.w D0, ($1e,A6)
019770 move.b D0, ($25,A6)
019D30 move.w D0, ($1e,A6)
019D34 move.w D0, ($16,A6)
01A9EE move.w D0, ($1e,A6)
01A9F2 move.b #$e, ($58,A6)
01AA9E move.w D0, ($1e,A6)
01AAA2 move.b #$14, ($c8,A6)
01AB3A move.w D0, ($1e,A6)
01AB3E move.b #$1, ($51,A6)
01AC02 move.w D0, ($1e,A6)
01AC06 lea ($1322,PC) ; ($1bf2a), A0
01AE70 move.w D0, ($1e,A6)
01AE74 move.w D0, ($14,A6)
01AF96 move.w D0, ($1e,A6)
01AF9A move.w #$500, ($14,A6)
01B6A4 move.w D0, ($1e,A6)
01B6A8 move.b D0, ($25,A6)
01B772 move.w D0, ($1e,A6)
01B776 lea ($78e,PC) ; ($1bf06), A0
01B8CE move.w D0, ($1e,A6)
01B8D2 lea ($63a,PC) ; ($1bf0e), A0
01B9C2 move.w D0, ($1e,A6)
01B9C6 lea ($54e,PC) ; ($1bf16), A0
01C25A move.w D0, ($1e,A6)
01C25E moveq #$2, D0
01C43A move.w D0, ($1e,A6)
01C43E moveq #$2, D0
01C60E move.w D0, ($1e,A6)
01C612 clr.w ($b6,A6)
01C790 move.w D0, ($1e,A6)
01C794 jsr $16446.l
01C9A2 move.w D0, ($1e,A6)
01C9A6 jsr $98cc.l
01CC84 move.w D0, ($1e,A6)
01CC88 moveq #$2, D0
0AAACA move.l (A0), D2
0AAACC move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAACE move.w D0, ($2,A0)
0AAAD2 cmp.l (A0), D0
0AAAD4 bne $aaafc
0AAAD8 move.l D2, (A0)+
0AAADA cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAE6 move.l (A0), D2
0AAAE8 move.w D0, (A0) [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
0AAAF4 move.l D2, (A0)+
0AAAF6 cmpa.l A0, A1 [123p+11A, 123p+11C, 123p+11E, 123p+120, 123p+122, 123p+124, 123p+126, 123p+128, 123p+12A, enemy+BC, enemy+C0, enemy+C2, enemy+C4, enemy+CC, enemy+CE, enemy+D0, enemy+D2, enemy+D4, enemy+D6, enemy+D8, enemy+DA, enemy+DE, item+86, item+88, item+8A, item+98, item+9A, item+9C, item+9E, item+A0, item+A2, item+A4, item+A6, scr1]
copyright zengfr site:http://github.com/zengfr/romhack
|
.emacs.d/elpa/wisi-3.0.1/wisitoken-productions.ads | caqg/linux-home | 0 | 16344 | <reponame>caqg/linux-home<gh_stars>0
-- Abstract :
--
-- Type and operations for building grammar productions.
--
-- Copyright (C) 2018 - 2019 Free Software Foundation, Inc.
--
-- This file is part of the WisiToken package.
--
-- The WisiToken package is free software; you can redistribute it
-- and/or modify it under terms of the GNU General Public License as
-- published by the Free Software Foundation; either version 3, or
-- (at your option) any later version. This library is distributed in
-- the hope that it will be useful, but WITHOUT ANY WARRANTY; without
-- even the implied warranty of MERCHAN- TABILITY or FITNESS FOR A
-- PARTICULAR PURPOSE.
--
-- As a special exception under Section 7 of GPL version 3, you are granted
-- additional permissions described in the GCC Runtime Library Exception,
-- version 3.1, as published by the Free Software Foundation.
pragma License (Modified_GPL);
with SAL.Gen_Unbounded_Definite_Vectors;
with WisiToken.Semantic_Checks;
with WisiToken.Syntax_Trees;
package WisiToken.Productions is
type Right_Hand_Side is record
Tokens : Token_ID_Arrays.Vector;
Action : WisiToken.Syntax_Trees.Semantic_Action;
Check : WisiToken.Semantic_Checks.Semantic_Check;
end record;
package RHS_Arrays is new SAL.Gen_Unbounded_Definite_Vectors
(Natural, Right_Hand_Side, Default_Element => (others => <>));
type Instance is record
LHS : Token_ID := Invalid_Token_ID;
RHSs : RHS_Arrays.Vector;
end record;
package Prod_Arrays is new SAL.Gen_Unbounded_Definite_Vectors
(Token_ID, Instance, Default_Element => (others => <>));
function Image
(LHS : in Token_ID;
RHS_Index : in Natural;
RHS : in Token_ID_Arrays.Vector;
Descriptor : in WisiToken.Descriptor)
return String;
-- For comments in generated code, diagnostic messages.
procedure Put (Grammar : Prod_Arrays.Vector; Descriptor : in WisiToken.Descriptor);
-- Put Image of each production to Ada.Text_IO.Current_Output.
package Line_Number_Arrays is new SAL.Gen_Unbounded_Definite_Vectors
(Natural, Line_Number_Type, Default_Element => Invalid_Line_Number);
type Prod_Source_Line_Map is record
Line : Line_Number_Type := Invalid_Line_Number;
RHS_Map : Line_Number_Arrays.Vector;
end record;
package Source_Line_Maps is new SAL.Gen_Unbounded_Definite_Vectors
(Token_ID, Prod_Source_Line_Map, Default_Element => (others => <>));
-- For line numbers of productions in source files.
end WisiToken.Productions;
|
src/base64.ads | AntonMeep/base64 | 0 | 13821 | pragma Ada_2012;
package Base64 with
Pure,
Preelaborate
is
end Base64;
|
src/Categories/Category/Finite/Fin/Instance/Triangle.agda | MirceaS/agda-categories | 0 | 3967 | <gh_stars>0
{-# OPTIONS --without-K --safe #-}
module Categories.Category.Finite.Fin.Instance.Triangle where
open import Data.Nat using (ℕ)
open import Data.Fin
open import Data.Fin.Patterns
open import Relation.Binary.PropositionalEquality as ≡
open import Categories.Category.Finite.Fin
open import Categories.Category
private
variable
a b c d : Fin 3
-- the diagram is the following:
--
-- 0
-- | \
-- | \
-- | \
-- | \
-- v v
-- 1 ---> 2
--
-- all morphisms are 0 (because there is at most one morphism between each pair of objects).
TriangleShape : FinCatShape
TriangleShape = record
{ size = 3
; ∣_⇒_∣ = morph
; hasShape = record
{ id = id
; _∘_ = _∘_
; assoc = assoc
; identityˡ = identityˡ
; identityʳ = identityʳ
}
}
where morph : Fin 3 → Fin 3 → ℕ
morph 0F 0F = 1
morph 0F 1F = 1
morph 0F 2F = 1
morph 1F 1F = 1
morph 1F 2F = 1
morph 2F 2F = 1
morph _ _ = 0
id : Fin (morph a a)
id {0F} = 0F
id {1F} = 0F
id {2F} = 0F
_∘_ : ∀ {a b c} → Fin (morph b c) → Fin (morph a b) → Fin (morph a c)
_∘_ {0F} {0F} {0F} 0F 0F = 0F
_∘_ {0F} {0F} {1F} 0F 0F = 0F
_∘_ {0F} {0F} {2F} 0F 0F = 0F
_∘_ {0F} {1F} {1F} 0F 0F = 0F
_∘_ {0F} {1F} {2F} 0F 0F = 0F
_∘_ {0F} {2F} {2F} 0F 0F = 0F
_∘_ {1F} {1F} {1F} 0F 0F = 0F
_∘_ {1F} {1F} {2F} 0F 0F = 0F
_∘_ {1F} {2F} {2F} 0F 0F = 0F
_∘_ {2F} {2F} {2F} 0F 0F = 0F
assoc : ∀ {f : Fin (morph a b)} {g : Fin (morph b c)} {h : Fin (morph c d)} →
((h ∘ g) ∘ f) ≡ (h ∘ (g ∘ f))
assoc {0F} {0F} {0F} {0F} {0F} {0F} {0F} = refl
assoc {0F} {0F} {0F} {1F} {0F} {0F} {0F} = refl
assoc {0F} {0F} {0F} {2F} {0F} {0F} {0F} = refl
assoc {0F} {0F} {1F} {1F} {0F} {0F} {0F} = refl
assoc {0F} {0F} {1F} {2F} {0F} {0F} {0F} = refl
assoc {0F} {0F} {2F} {2F} {0F} {0F} {0F} = refl
assoc {0F} {1F} {1F} {1F} {0F} {0F} {0F} = refl
assoc {0F} {1F} {1F} {2F} {0F} {0F} {0F} = refl
assoc {0F} {1F} {2F} {2F} {0F} {0F} {0F} = refl
assoc {0F} {2F} {2F} {2F} {0F} {0F} {0F} = refl
assoc {1F} {1F} {1F} {1F} {0F} {0F} {0F} = refl
assoc {1F} {1F} {1F} {2F} {0F} {0F} {0F} = refl
assoc {1F} {1F} {2F} {2F} {0F} {0F} {0F} = refl
assoc {1F} {2F} {2F} {2F} {0F} {0F} {0F} = refl
assoc {2F} {2F} {2F} {2F} {0F} {0F} {0F} = refl
identityˡ : ∀ {f : Fin (morph a b)} → (id ∘ f) ≡ f
identityˡ {0F} {0F} {0F} = refl
identityˡ {0F} {1F} {0F} = refl
identityˡ {0F} {2F} {0F} = refl
identityˡ {1F} {1F} {0F} = refl
identityˡ {1F} {2F} {0F} = refl
identityˡ {2F} {2F} {0F} = refl
identityʳ : ∀ {f : Fin (morph a b)} → (f ∘ id) ≡ f
identityʳ {0F} {0F} {0F} = refl
identityʳ {0F} {1F} {0F} = refl
identityʳ {0F} {2F} {0F} = refl
identityʳ {1F} {1F} {0F} = refl
identityʳ {1F} {2F} {0F} = refl
identityʳ {2F} {2F} {0F} = refl
Triangle : Category _ _ _
Triangle = FinCategory TriangleShape
module Triangle = Category Triangle
|
bf-interpreter-console.asm | skiwi2/AssemblyBrainfuckInterpreter | 10 | 161248 | extern _malloc, _calloc, _printf, _fdopen, _fprintf, _scanf, _getchar, _putchar
%define STDERR 2
%define NEWLINE_CODE 10
%define BF_MEMORY_CELL_AMOUNT 30000
%define BF_PROGRAM_END 255
%define JUMP_PAST_CODE 91
%define JUMP_BACK_CODE 93
section .data
format_int db "%d", 0
write_mode db "w", 0
msg_memoryamount db "Enter how much memory (in bytes) your Brainfuck program needs: ", 0
msg_bfprogram db "Enter your Brainfuck program (use Enter exclusively to continue): ", 0
bfprogram_jump_table times 43 dd bfprogram_invalidop,
dd bfprogram_memory_inc,
dd bfprogram_input,
dd bfprogram_memory_dec,
dd bfprogram_output,
times 13 dd bfprogram_invalidop,
dd bfprogram_pointer_left,
dd bfprogram_invalidop,
dd bfprogram_pointer_right,
times 28 dd bfprogram_invalidop,
dd bfprogram_jump_past,
dd bfprogram_invalidop,
dd bfprogram_jump_back,
times 34 dd bfprogram_invalidop,
times 127 dd bfprogram_invalidop, ; 128 (127 + next line) invalid ASCII characters
dd run_program_done ; if jump address is 255 (BF_PROGRAM_END), then we're done
error_outofmemory db "Fatal: The Operating System does not have enough memory available.", 0
error_programsize db "Fatal: The given Brainfuck program exceeded the given memory size.", 0
error_invalidop db "Fatal: An unsupported Brainfuck operation was found.", 0
section .bss
max_bf_program_size resd 1
bf_program resd 1
bf_program_size resd 1
bf_memory resd 1
section .text
global _main
_main:
mov ebp, esp ; save original stack pointer
;
; store Brainfuck program from console input
;
push msg_memoryamount
call _printf
add esp, 4
lea eax, [ebp - 4]
push eax
push format_int
call _scanf
add esp, 8
mov eax, [ebp - 4]
mov [max_bf_program_size], eax
inc eax ; reserve one extra byte for the BF_PROGRAM_END code
push eax
call _malloc
add esp, 4
test eax, eax
jz error_exit_outofmemory
mov [bf_program], eax
call _getchar ; consume newline
push msg_bfprogram
call _printf
add esp, 4
mov edi, [max_bf_program_size]
xor ebx, ebx
mov esi, [bf_program]
store_program_loop:
call _getchar
cmp eax, NEWLINE_CODE ; stop reading on newline
jz short store_program_done
cmp ebx, edi ; error if exceeded program size
jz error_exit_programsize
mov [esi + ebx], al
inc ebx
jmp short store_program_loop
store_program_done:
mov [esi + ebx], byte BF_PROGRAM_END ; store program end special code
mov [bf_program_size], ebx
;
; zero-initialize BF memory cells
;
push dword 1
push BF_MEMORY_CELL_AMOUNT
call _calloc
add esp, 8
test eax, eax
jz error_exit_outofmemory
mov [bf_memory], eax
;
; run the BF program
;
mov esi, eax ; current memory address
mov edi, [bf_program] ; current program address
run_program_loop:
movzx eax, byte [edi]
jmp [bfprogram_jump_table + 4*eax] ; addresses are dword, ASCII is translated to byte offsets
run_program_loop_end:
inc edi
jmp short run_program_loop
run_program_done:
jmp normal_exit
bfprogram_pointer_right:
inc esi
jmp run_program_loop_end
bfprogram_pointer_left:
dec esi
jmp run_program_loop_end
bfprogram_memory_inc:
mov al, [esi]
inc al
mov [esi], al
jmp run_program_loop_end
bfprogram_memory_dec:
mov al, [esi]
dec al
mov [esi], al
jmp run_program_loop_end
bfprogram_output:
mov al, [esi]
push eax ; safe to do because eax is 000000xxh before the prior mov
call _putchar
add esp, 4
jmp run_program_loop_end
bfprogram_input:
call _getchar
mov [esi], al
jmp run_program_loop_end
bfprogram_jump_past:
mov al, [esi]
test al, al ; check if memory cell is zero
jnz run_program_loop_end ; if not zero, move to next instruction
;
; find matching ]
;
mov ebx, 1 ; when counter reaches zero the ] is found where we need to jump past
bfprogram_jump_past_loop:
inc edi
mov al, [edi]
cmp al, JUMP_PAST_CODE
jz short bfprogram_jump_past_loop_found_jump_past
cmp al, JUMP_BACK_CODE
jz short bfprogram_jump_past_loop_found_jump_back
jmp short bfprogram_jump_past_loop
bfprogram_jump_past_loop_found_jump_past:
inc ebx
jmp short bfprogram_jump_past_loop
bfprogram_jump_past_loop_found_jump_back:
dec ebx
test ebx, ebx
jz run_program_loop_end ; jumped over matching ]
jmp short bfprogram_jump_past_loop
bfprogram_jump_back:
mov al, [esi]
test al, al ; check if memory cell is zero
jz run_program_loop_end ; if zero, move to next instruction
;
; find matching [
;
mov ebx, 1 ; when counter reaches zero the [ is found where we need to jump back to
bfprogram_jump_back_loop:
dec edi
mov al, [edi]
cmp al, JUMP_BACK_CODE
jz short bfprogram_jump_back_loop_found_jump_back
cmp al, JUMP_PAST_CODE
jz short bfprogram_jump_back_loop_found_jump_past
jmp short bfprogram_jump_back_loop
bfprogram_jump_back_loop_found_jump_back:
inc ebx
jmp short bfprogram_jump_back_loop
bfprogram_jump_back_loop_found_jump_past:
dec ebx
test ebx, ebx
jz run_program_loop_end ; jumped back to matching [
jmp short bfprogram_jump_back_loop
bfprogram_invalidop:
jmp error_exit_invalidop
error_exit_outofmemory:
push write_mode
push 2
call _fdopen
add esp, 8
push error_outofmemory
push eax
call _fprintf
add esp, 8
mov eax, -1
jmp short exit
error_exit_programsize:
push write_mode
push 2
call _fdopen
add esp, 8
push error_programsize
push eax
call _fprintf
add esp, 8
mov eax, -2
jmp short exit
error_exit_invalidop:
push write_mode
push 2
call _fdopen
add esp, 8
push error_invalidop
push eax
call _fprintf
add esp, 8
mov eax, -3
jmp short exit
normal_exit:
mov eax, 0
exit:
ret
|
grammars/verilogPreprocLexer.g4 | THofstee/hdlConvertor | 0 | 7561 | lexer grammar verilogPreprocLexer;
channels { CH_LINE_ESCAPE, CH_LINE_COMMENT, CH_COMMENT}
@lexer::members {
bool define_in_body = false;
bool define_in_def_val = false;
int define_parentesis_count = 0;
int token_id_parentesis_count = 0;
}
fragment CRLF : '\r'? '\n';
fragment LETTER: [a-zA-Z] ;
fragment ID_FIRST: LETTER | '_' ;
fragment F_DIGIT: [0-9] ;
fragment F_ID : ID_FIRST (ID_FIRST | F_DIGIT)*;
fragment ANY_WS: (WS | NEW_LINE)*;
fragment WS_ENDING_NEW_LINE: WS* CRLF;
fragment F_WS: [ \t];
fragment F_LINE_ESCAPE: '\\' CRLF;
// string with escaped newlines and '"'
STR: '"' ( (('\\' '"') | ('\\' '\r'? '\n')) | ~["\r\n])* '"';
LINE_COMMENT : '//' ~[\r\n]* CRLF -> channel(CH_LINE_COMMENT);
COMMENT : '/*' .*? '*/' -> channel(CH_COMMENT);
INCLUDE: '`include' F_WS+ -> mode(INCLUDE_MODE);
DEFINE: '`define' F_WS+ {
define_in_body = false;
} -> mode(DEFINE_MODE);
IFNDEF: '`ifndef' F_WS+ -> mode(IFDEF_MODE);
UNDEF: '`undef' F_WS+ -> mode(UNDEF_MODE);
IFDEF: '`ifdef' F_WS+ ->mode(IFDEF_MODE);
ELSIF: '`elsif' F_WS+ ->mode(IFDEF_MODE);
ELSE: '`else' ANY_WS;
ENDIF: '`endif' ANY_WS;
BEGIN_KEYWORDS: '`begin_keywords' F_WS ->mode(KEYWOORDS_MODE);
END_KEYWORDS: '`end_keywords' CRLF;
PRAGMA: '`pragma' F_WS -> mode(PRAGMA_MODE);
UNDEFINEALL: '`undefineall' WS_ENDING_NEW_LINE;
RESETALL: '`resetall' WS_ENDING_NEW_LINE;
CELLDEFINE: '`celldefine' WS_ENDING_NEW_LINE;
ENDCELLDEFINE: '`endcelldefine' WS_ENDING_NEW_LINE ;
TIMESCALE: '`timescale' F_WS+ ->mode(TIMING_SPEC_MODE);
DEFAULT_NETTYPE: '`default_nettype' F_WS+ -> mode(DEFAULT_NETTYPE_MODE);
LINE: '`line' F_WS+ -> mode(LINE_MODE) ;
UNCONNECTED_DRIVE: '`unconnected_drive' WS_ENDING_NEW_LINE;
NOUNCONNECTED_DRIVE: '`nounconnected_drive' WS_ENDING_NEW_LINE;
OTHER_MACRO_WITH_ARGS: '`' F_ID F_WS* '(' {
token_id_parentesis_count = 1;
} -> mode(MACRO_PARAMS);
OTHER_MACRO_NO_ARGS: '`' F_ID;
// used when parsing the id, param list and body of define macro
mode DEFINE_MODE;
DM_LINE_COMMENT: LINE_COMMENT {
if (define_parentesis_count == 0) {
// this define will not have any more parameter or body lines
setType(LINE_COMMENT);
setMode(DEFAULT_MODE);
} else {
skip();
}
};
DM_COMMENT: COMMENT {
if (define_in_body || define_in_def_val) {
setType(CODE);
} else {
skip();
}
};
LINE_ESCAPE: F_LINE_ESCAPE -> channel(CH_LINE_ESCAPE);
LP: '(' {
if (define_in_body || define_in_def_val) {
// is in the definition of the macro body
setType(CODE);
}
if (!define_in_body) {
define_parentesis_count++;
}
};
RP: ')' ({!define_in_body}? WS*)? {
if (define_in_body) {
// is in the definition of the macro body
setType(CODE);
} else {
define_parentesis_count--;
if (define_parentesis_count == 0) {
// is ')' in the param list
define_in_body = true;
define_in_def_val = false;
} else {
if (define_in_def_val)
setType(CODE);
}
}
};
COMMA: ',' {
if(define_in_body || define_in_def_val) {
if (define_parentesis_count == 1 && define_in_def_val) {
// not in '(' expr ')' and on end of def val spec
define_in_def_val = false;
} else {
setType(CODE);
}
}
};
EQUAL: '=' {
if(define_in_body || define_in_def_val) {
setType(CODE);
} else if (!define_in_body) {
define_in_def_val = true;;
}
};
DM_NEW_LINE: CRLF {
if (define_parentesis_count == 0) {
setMode(DEFAULT_MODE);
setType(NEW_LINE);
} else {
skip();
}
};
WS: F_WS+ {
if(define_in_body || define_in_def_val) {
setType(CODE);
} else if (define_parentesis_count == 0) {
// inside of define body
define_in_body = true;
} else {
skip();
}
};
ID: F_ID {
if (define_in_body || define_in_def_val) {
setType(CODE);
}
};
DM_STR: STR {
if (define_in_body || define_in_def_val) {
setType(CODE);
}
}; // string can appear only in bo
DM_LINE_ESCAPE : F_LINE_ESCAPE -> channel(CH_LINE_ESCAPE);
DN_NEW_LINE: CRLF -> type(NEW_LINE),mode(DEFAULT_MODE);
DN_CODE: ( ~('\\'| '\n') | ( '\\'+ ~[\n]) )+? -> type(CODE); // verything except newline or esacped newline
// used when parsing the macro argument list
mode MACRO_PARAMS;
// there has to be argument list or any non id/num value behind the macro call
MP_COMMA: ',' {
if (token_id_parentesis_count == 0) {
// this macro has not a argument and this ',' is behind it
setType(COMMA);
setMode(DEFAULT_MODE);
} else if (token_id_parentesis_count == 1) {
// this is a ',' in the arg list of macro
setType(COMMA);
} else {
// this is a comma in expression of the argument value
setType(CODE);
}
};
MP_LP: '(' {
// this is a '(' in expression of the argument
setType(CODE);
token_id_parentesis_count++;
};
MP_RP: ')' {
if (token_id_parentesis_count == 1) {
// this is a last ')' which is closing the argument list
setType(RP);
setMode(DEFAULT_MODE);
} else {
// this is ')' in arg expression
setType(CODE);
}
token_id_parentesis_count--;
};
MP_CODE: (STR | ~[,()] )+? -> type(CODE); // string or non parenthesis
mode IFDEF_MODE;
NUM: F_DIGIT+;
IFDEF_MODE_ID : F_ID -> type(ID),mode(DEFAULT_MODE);
mode UNDEF_MODE;
UNDEF_MODE_NUM: F_DIGIT+ -> type(NUM);
UNDEF_MODE_ID: F_ID -> type(ID);
UNDEF_NEW_LINE : CRLF -> type(NEW_LINE),mode(DEFAULT_MODE);
mode DEFAULT_NETTYPE_MODE;
WIRE : 'wire';
TRI : 'tri';
TRI0 : 'tri0';
TRI1 : 'tri1';
WAND : 'wand';
TRIAND : 'triand';
WOR : 'wor';
TRIOR : 'trior';
TRIREG : 'trireg';
UWIRE : 'uwire';
NONE : 'none';
DEFAULT_NETTYPE_NEW_LINE : CRLF ->type(NEW_LINE),mode(DEFAULT_MODE);
mode LINE_MODE;
LINE_MODE_NUM: F_DIGIT+ -> type(NUM);
LINE_MODE_STR: STR ->type(STR);
LINE_MODE_WS: F_WS ->skip;
LINE_MODE_NEW_LINE: CRLF ->type(NEW_LINE),mode(DEFAULT_MODE);
mode TIMING_SPEC_MODE;
Time_Identifier:
F_DIGIT+ ' '* [mnpf]? 's'
;
TIMING_SPEC_MODE_SLASH : '/';
TIMING_SPEC_MODE_WS : WS->skip;
TIMING_SPEC_MODE_NEW_LINE : CRLF ->type(NEW_LINE),mode(DEFAULT_MODE);
mode KEYWOORDS_MODE;
V18002017: '"1800-2017"' -> mode(DEFAULT_MODE);
V18002012: '"1800-2012"' -> mode(DEFAULT_MODE);
V18002009: '"1800-2009"' -> mode(DEFAULT_MODE);
V18002005: '"1800-2005"' -> mode(DEFAULT_MODE);
V13642005: '"1364-2005"' -> mode(DEFAULT_MODE);
V13642001: '"1364-2001"' -> mode(DEFAULT_MODE);
V13642001noconfig: '"1364-2001-noconfig"' -> mode(DEFAULT_MODE);
V13641995: '"1364-1995"' -> mode(DEFAULT_MODE);
mode INCLUDE_MODE;
INCLUDE_MODE_STR
: STR ->type(STR),mode(DEFAULT_MODE)
;
INCLUDE_MODE_StringLiteral_chevrons
: '<' ( ~('\\'|'>') )* '>' ->mode(DEFAULT_MODE)
;
INCLUDE_MODE_WS : WS ->skip;
mode PRAGMA_MODE;
PRAGMA_WS : WS+ -> skip;
PRAGMA_NUM: F_DIGIT+ -> type(NUM);
PRAGMA_ID : ID_FIRST (ID_FIRST | F_DIGIT)* ->type(ID);
PRAGMA_STR: STR ->type(STR);
PRAGMA_COMMA : ',' ->type(COMMA);
PRAGMA_EQUAL: '=' ->type(EQUAL);
PRAGMA_LP: '(' -> type(LP);
PRAGMA_RP: ')' -> type(RP);
PRAGMA_NEW_LINE : CRLF ->type(NEW_LINE),mode(DEFAULT_MODE);
mode DEFAULT_MODE;
CODE: ~('`' | '\n' )+;
NEW_LINE: CRLF;
|
bb-runtimes/arm/sam/samg55/svd/i-sam-sysc.ads | JCGobbi/Nucleo-STM32G474RE | 0 | 23168 | <reponame>JCGobbi/Nucleo-STM32G474RE
--
-- Copyright (C) 2017, AdaCore
--
-- This spec has been automatically generated from ATSAMG55J19.svd
pragma Ada_2012;
pragma Style_Checks (Off);
with System;
package Interfaces.SAM.SYSC is
pragma Preelaborate;
pragma No_Elaboration_Code_All;
---------------
-- Registers --
---------------
-- General Purpose Backup Register
-- General Purpose Backup Register
type GPBR_GPBR_Registers is array (0 .. 7) of Interfaces.SAM.UInt32
with Volatile;
-- System Reset Key
type CR_KEY_Field is
(
-- Reset value for the field
Cr_Key_Field_Reset,
-- Writing any other value in this field aborts the write operation.
Passwd)
with Size => 8;
for CR_KEY_Field use
(Cr_Key_Field_Reset => 0,
Passwd => <PASSWORD>);
-- Control Register
type RSTC_CR_Register is record
-- Write-only. Processor Reset
PROCRST : Boolean := False;
-- unspecified
Reserved_1_1 : Interfaces.SAM.Bit := 16#0#;
-- Write-only. Peripheral Reset
PERRST : Boolean := False;
-- Write-only. External Reset
EXTRST : Boolean := False;
-- unspecified
Reserved_4_23 : Interfaces.SAM.UInt20 := 16#0#;
-- Write-only. System Reset Key
KEY : CR_KEY_Field := Cr_Key_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RSTC_CR_Register use record
PROCRST at 0 range 0 .. 0;
Reserved_1_1 at 0 range 1 .. 1;
PERRST at 0 range 2 .. 2;
EXTRST at 0 range 3 .. 3;
Reserved_4_23 at 0 range 4 .. 23;
KEY at 0 range 24 .. 31;
end record;
-- Reset Type
type SR_RSTTYP_Field is
(
-- First power-up reset
General_Rst,
-- Return from Backup Mode
Backup_Rst,
-- Watchdog fault occurred
Wdt_Rst,
-- Processor reset required by the software
Soft_Rst,
-- NRST pin detected low
User_Rst,
-- Slow Crystal Failure Detection fault occured
Slck_Xtal_Rst)
with Size => 3;
for SR_RSTTYP_Field use
(General_Rst => 0,
Backup_Rst => 1,
Wdt_Rst => 2,
Soft_Rst => 3,
User_Rst => 4,
Slck_Xtal_Rst => 7);
-- Status Register
type RSTC_SR_Register is record
-- Read-only. User Reset Status
URSTS : Boolean;
-- unspecified
Reserved_1_7 : Interfaces.SAM.UInt7;
-- Read-only. Reset Type
RSTTYP : SR_RSTTYP_Field;
-- unspecified
Reserved_11_15 : Interfaces.SAM.UInt5;
-- Read-only. NRST Pin Level
NRSTL : Boolean;
-- Read-only. Software Reset Command in Progress
SRCMP : Boolean;
-- unspecified
Reserved_18_31 : Interfaces.SAM.UInt14;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RSTC_SR_Register use record
URSTS at 0 range 0 .. 0;
Reserved_1_7 at 0 range 1 .. 7;
RSTTYP at 0 range 8 .. 10;
Reserved_11_15 at 0 range 11 .. 15;
NRSTL at 0 range 16 .. 16;
SRCMP at 0 range 17 .. 17;
Reserved_18_31 at 0 range 18 .. 31;
end record;
subtype RSTC_MR_ERSTL_Field is Interfaces.SAM.UInt4;
-- Write Access Password
type MR_KEY_Field is
(
-- Reset value for the field
Mr_Key_Field_Reset,
-- Writing any other value in this field aborts the write
-- operation.Always reads as 0.
Passwd)
with Size => 8;
for MR_KEY_Field use
(Mr_Key_Field_Reset => 0,
Passwd => <PASSWORD>);
-- Mode Register
type RSTC_MR_Register is record
-- User Reset Enable
URSTEN : Boolean := True;
-- Slow Clock Switching
SCKSW : Boolean := False;
-- unspecified
Reserved_2_3 : Interfaces.SAM.UInt2 := 16#0#;
-- User Reset Interrupt Enable
URSTIEN : Boolean := False;
-- unspecified
Reserved_5_7 : Interfaces.SAM.UInt3 := 16#0#;
-- External Reset Length
ERSTL : RSTC_MR_ERSTL_Field := 16#0#;
-- unspecified
Reserved_12_23 : Interfaces.SAM.UInt12 := 16#0#;
-- Write Access Password
KEY : MR_KEY_Field := Mr_Key_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RSTC_MR_Register use record
URSTEN at 0 range 0 .. 0;
SCKSW at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
URSTIEN at 0 range 4 .. 4;
Reserved_5_7 at 0 range 5 .. 7;
ERSTL at 0 range 8 .. 11;
Reserved_12_23 at 0 range 12 .. 23;
KEY at 0 range 24 .. 31;
end record;
-- Time Event Selection
type CR_TIMEVSEL_Field is
(
-- Minute change
Minute,
-- Hour change
Hour,
-- Every day at midnight
Midnight,
-- Every day at noon
Noon)
with Size => 2;
for CR_TIMEVSEL_Field use
(Minute => 0,
Hour => 1,
Midnight => 2,
Noon => 3);
-- Calendar Event Selection
type CR_CALEVSEL_Field is
(
-- Week change (every Monday at time 00:00:00)
Week,
-- Month change (every 01 of each month at time 00:00:00)
Month,
-- Year change (every January 1 at time 00:00:00)
Year)
with Size => 2;
for CR_CALEVSEL_Field use
(Week => 0,
Month => 1,
Year => 2);
-- Control Register
type RTC_CR_Register is record
-- Update Request Time Register
UPDTIM : Boolean := False;
-- Update Request Calendar Register
UPDCAL : Boolean := False;
-- unspecified
Reserved_2_7 : Interfaces.SAM.UInt6 := 16#0#;
-- Time Event Selection
TIMEVSEL : CR_TIMEVSEL_Field := Interfaces.SAM.SYSC.Minute;
-- unspecified
Reserved_10_15 : Interfaces.SAM.UInt6 := 16#0#;
-- Calendar Event Selection
CALEVSEL : CR_CALEVSEL_Field := Interfaces.SAM.SYSC.Week;
-- unspecified
Reserved_18_31 : Interfaces.SAM.UInt14 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_CR_Register use record
UPDTIM at 0 range 0 .. 0;
UPDCAL at 0 range 1 .. 1;
Reserved_2_7 at 0 range 2 .. 7;
TIMEVSEL at 0 range 8 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
CALEVSEL at 0 range 16 .. 17;
Reserved_18_31 at 0 range 18 .. 31;
end record;
subtype RTC_MR_CORRECTION_Field is Interfaces.SAM.UInt7;
-- All ADC Channel Trigger Event Source Selection
type MR_OUT0_Field is
(
-- No waveform, stuck at '0'
No_Wave,
-- 1 Hz square wave
Freq1Hz,
-- 32 Hz square wave
Freq32Hz,
-- 64 Hz square wave
Freq64Hz,
-- 512 Hz square wave
Freq512Hz,
-- Output is a copy of the alarm flag
Alarm_Flag)
with Size => 3;
for MR_OUT0_Field use
(No_Wave => 0,
Freq1Hz => 1,
Freq32Hz => 2,
Freq64Hz => 3,
Freq512Hz => 4,
Alarm_Flag => 6);
-- ADC Last Channel Trigger Event Source Selection
type MR_OUT1_Field is
(
-- No waveform, stuck at '0'
No_Wave,
-- 1 Hz square wave
Freq1Hz,
-- 32 Hz square wave
Freq32Hz,
-- 64 Hz square wave
Freq64Hz,
-- 512 Hz square wave
Freq512Hz,
-- Output is a copy of the alarm flag
Alarm_Flag)
with Size => 3;
for MR_OUT1_Field use
(No_Wave => 0,
Freq1Hz => 1,
Freq32Hz => 2,
Freq64Hz => 3,
Freq512Hz => 4,
Alarm_Flag => 6);
-- Mode Register
type RTC_MR_Register is record
-- 12-/24-hour Mode
HRMOD : Boolean := False;
-- PERSIAN Calendar
PERSIAN : Boolean := False;
-- unspecified
Reserved_2_3 : Interfaces.SAM.UInt2 := 16#0#;
-- NEGative PPM Correction
NEGPPM : Boolean := False;
-- unspecified
Reserved_5_7 : Interfaces.SAM.UInt3 := 16#0#;
-- Slow Clock Correction
CORRECTION : RTC_MR_CORRECTION_Field := 16#0#;
-- HIGH PPM Correction
HIGHPPM : Boolean := False;
-- All ADC Channel Trigger Event Source Selection
OUT0 : MR_OUT0_Field := Interfaces.SAM.SYSC.No_Wave;
-- unspecified
Reserved_19_19 : Interfaces.SAM.Bit := 16#0#;
-- ADC Last Channel Trigger Event Source Selection
OUT1 : MR_OUT1_Field := Interfaces.SAM.SYSC.No_Wave;
-- unspecified
Reserved_23_31 : Interfaces.SAM.UInt9 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_MR_Register use record
HRMOD at 0 range 0 .. 0;
PERSIAN at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
NEGPPM at 0 range 4 .. 4;
Reserved_5_7 at 0 range 5 .. 7;
CORRECTION at 0 range 8 .. 14;
HIGHPPM at 0 range 15 .. 15;
OUT0 at 0 range 16 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
OUT1 at 0 range 20 .. 22;
Reserved_23_31 at 0 range 23 .. 31;
end record;
subtype RTC_TIMR_SEC_Field is Interfaces.SAM.UInt7;
subtype RTC_TIMR_MIN_Field is Interfaces.SAM.UInt7;
subtype RTC_TIMR_HOUR_Field is Interfaces.SAM.UInt6;
-- Time Register
type RTC_TIMR_Register is record
-- Current Second
SEC : RTC_TIMR_SEC_Field := 16#0#;
-- unspecified
Reserved_7_7 : Interfaces.SAM.Bit := 16#0#;
-- Current Minute
MIN : RTC_TIMR_MIN_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.SAM.Bit := 16#0#;
-- Current Hour
HOUR : RTC_TIMR_HOUR_Field := 16#0#;
-- Ante Meridiem Post Meridiem Indicator
AMPM : Boolean := False;
-- unspecified
Reserved_23_31 : Interfaces.SAM.UInt9 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_TIMR_Register use record
SEC at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
MIN at 0 range 8 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
HOUR at 0 range 16 .. 21;
AMPM at 0 range 22 .. 22;
Reserved_23_31 at 0 range 23 .. 31;
end record;
subtype RTC_CALR_CENT_Field is Interfaces.SAM.UInt7;
subtype RTC_CALR_YEAR_Field is Interfaces.SAM.Byte;
subtype RTC_CALR_MONTH_Field is Interfaces.SAM.UInt5;
subtype RTC_CALR_DAY_Field is Interfaces.SAM.UInt3;
subtype RTC_CALR_DATE_Field is Interfaces.SAM.UInt6;
-- Calendar Register
type RTC_CALR_Register is record
-- Current Century
CENT : RTC_CALR_CENT_Field := 16#20#;
-- unspecified
Reserved_7_7 : Interfaces.SAM.Bit := 16#0#;
-- Current Year
YEAR : RTC_CALR_YEAR_Field := 16#10#;
-- Current Month
MONTH : RTC_CALR_MONTH_Field := 16#1#;
-- Current Day in Current Week
DAY : RTC_CALR_DAY_Field := 16#5#;
-- Current Day in Current Month
DATE : RTC_CALR_DATE_Field := 16#1#;
-- unspecified
Reserved_30_31 : Interfaces.SAM.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_CALR_Register use record
CENT at 0 range 0 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
YEAR at 0 range 8 .. 15;
MONTH at 0 range 16 .. 20;
DAY at 0 range 21 .. 23;
DATE at 0 range 24 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype RTC_TIMALR_SEC_Field is Interfaces.SAM.UInt7;
subtype RTC_TIMALR_MIN_Field is Interfaces.SAM.UInt7;
subtype RTC_TIMALR_HOUR_Field is Interfaces.SAM.UInt6;
-- Time Alarm Register
type RTC_TIMALR_Register is record
-- Second Alarm
SEC : RTC_TIMALR_SEC_Field := 16#0#;
-- Second Alarm Enable
SECEN : Boolean := False;
-- Minute Alarm
MIN : RTC_TIMALR_MIN_Field := 16#0#;
-- Minute Alarm Enable
MINEN : Boolean := False;
-- Hour Alarm
HOUR : RTC_TIMALR_HOUR_Field := 16#0#;
-- AM/PM Indicator
AMPM : Boolean := False;
-- Hour Alarm Enable
HOUREN : Boolean := False;
-- unspecified
Reserved_24_31 : Interfaces.SAM.Byte := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_TIMALR_Register use record
SEC at 0 range 0 .. 6;
SECEN at 0 range 7 .. 7;
MIN at 0 range 8 .. 14;
MINEN at 0 range 15 .. 15;
HOUR at 0 range 16 .. 21;
AMPM at 0 range 22 .. 22;
HOUREN at 0 range 23 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
subtype RTC_CALALR_MONTH_Field is Interfaces.SAM.UInt5;
subtype RTC_CALALR_DATE_Field is Interfaces.SAM.UInt6;
-- Calendar Alarm Register
type RTC_CALALR_Register is record
-- unspecified
Reserved_0_15 : Interfaces.SAM.UInt16 := 16#0#;
-- Month Alarm
MONTH : RTC_CALALR_MONTH_Field := 16#1#;
-- unspecified
Reserved_21_22 : Interfaces.SAM.UInt2 := 16#0#;
-- Month Alarm Enable
MTHEN : Boolean := False;
-- Date Alarm
DATE : RTC_CALALR_DATE_Field := 16#1#;
-- unspecified
Reserved_30_30 : Interfaces.SAM.Bit := 16#0#;
-- Date Alarm Enable
DATEEN : Boolean := False;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_CALALR_Register use record
Reserved_0_15 at 0 range 0 .. 15;
MONTH at 0 range 16 .. 20;
Reserved_21_22 at 0 range 21 .. 22;
MTHEN at 0 range 23 .. 23;
DATE at 0 range 24 .. 29;
Reserved_30_30 at 0 range 30 .. 30;
DATEEN at 0 range 31 .. 31;
end record;
-- Acknowledge for Update
type SR_ACKUPD_Field is
(
-- Time and calendar registers cannot be updated.
Freerun,
-- Time and calendar registers can be updated.
Update)
with Size => 1;
for SR_ACKUPD_Field use
(Freerun => 0,
Update => 1);
-- Alarm Flag
type SR_ALARM_Field is
(
-- No alarm matching condition occurred.
No_Alarmevent,
-- An alarm matching condition has occurred.
Alarmevent)
with Size => 1;
for SR_ALARM_Field use
(No_Alarmevent => 0,
Alarmevent => 1);
-- Second Event
type SR_SEC_Field is
(
-- No second event has occurred since the last clear.
No_Secevent,
-- At least one second event has occurred since the last clear.
Secevent)
with Size => 1;
for SR_SEC_Field use
(No_Secevent => 0,
Secevent => 1);
-- Time Event
type SR_TIMEV_Field is
(
-- No time event has occurred since the last clear.
No_Timevent,
-- At least one time event has occurred since the last clear.
Timevent)
with Size => 1;
for SR_TIMEV_Field use
(No_Timevent => 0,
Timevent => 1);
-- Calendar Event
type SR_CALEV_Field is
(
-- No calendar event has occurred since the last clear.
No_Calevent,
-- At least one calendar event has occurred since the last clear.
Calevent)
with Size => 1;
for SR_CALEV_Field use
(No_Calevent => 0,
Calevent => 1);
-- Time and/or Date Free Running Error
type SR_TDERR_Field is
(
-- The internal free running counters are carrying valid values since
-- the last read of the Status Register (RTC_SR).
Correct,
-- The internal free running counters have been corrupted (invalid date
-- or time, non-BCD values) since the last read and/or they are still
-- invalid.
Err_Timedate)
with Size => 1;
for SR_TDERR_Field use
(Correct => 0,
Err_Timedate => 1);
-- Status Register
type RTC_SR_Register is record
-- Read-only. Acknowledge for Update
ACKUPD : SR_ACKUPD_Field;
-- Read-only. Alarm Flag
ALARM : SR_ALARM_Field;
-- Read-only. Second Event
SEC : SR_SEC_Field;
-- Read-only. Time Event
TIMEV : SR_TIMEV_Field;
-- Read-only. Calendar Event
CALEV : SR_CALEV_Field;
-- Read-only. Time and/or Date Free Running Error
TDERR : SR_TDERR_Field;
-- unspecified
Reserved_6_31 : Interfaces.SAM.UInt26;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_SR_Register use record
ACKUPD at 0 range 0 .. 0;
ALARM at 0 range 1 .. 1;
SEC at 0 range 2 .. 2;
TIMEV at 0 range 3 .. 3;
CALEV at 0 range 4 .. 4;
TDERR at 0 range 5 .. 5;
Reserved_6_31 at 0 range 6 .. 31;
end record;
-- Status Clear Command Register
type RTC_SCCR_Register is record
-- Write-only. Acknowledge Clear
ACKCLR : Boolean := False;
-- Write-only. Alarm Clear
ALRCLR : Boolean := False;
-- Write-only. Second Clear
SECCLR : Boolean := False;
-- Write-only. Time Clear
TIMCLR : Boolean := False;
-- Write-only. Calendar Clear
CALCLR : Boolean := False;
-- Write-only. Time and/or Date Free Running Error Clear
TDERRCLR : Boolean := False;
-- unspecified
Reserved_6_31 : Interfaces.SAM.UInt26 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_SCCR_Register use record
ACKCLR at 0 range 0 .. 0;
ALRCLR at 0 range 1 .. 1;
SECCLR at 0 range 2 .. 2;
TIMCLR at 0 range 3 .. 3;
CALCLR at 0 range 4 .. 4;
TDERRCLR at 0 range 5 .. 5;
Reserved_6_31 at 0 range 6 .. 31;
end record;
-- Interrupt Enable Register
type RTC_IER_Register is record
-- Write-only. Acknowledge Update Interrupt Enable
ACKEN : Boolean := False;
-- Write-only. Alarm Interrupt Enable
ALREN : Boolean := False;
-- Write-only. Second Event Interrupt Enable
SECEN : Boolean := False;
-- Write-only. Time Event Interrupt Enable
TIMEN : Boolean := False;
-- Write-only. Calendar Event Interrupt Enable
CALEN : Boolean := False;
-- Write-only. Time and/or Date Error Interrupt Enable
TDERREN : Boolean := False;
-- unspecified
Reserved_6_31 : Interfaces.SAM.UInt26 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_IER_Register use record
ACKEN at 0 range 0 .. 0;
ALREN at 0 range 1 .. 1;
SECEN at 0 range 2 .. 2;
TIMEN at 0 range 3 .. 3;
CALEN at 0 range 4 .. 4;
TDERREN at 0 range 5 .. 5;
Reserved_6_31 at 0 range 6 .. 31;
end record;
-- Interrupt Disable Register
type RTC_IDR_Register is record
-- Write-only. Acknowledge Update Interrupt Disable
ACKDIS : Boolean := False;
-- Write-only. Alarm Interrupt Disable
ALRDIS : Boolean := False;
-- Write-only. Second Event Interrupt Disable
SECDIS : Boolean := False;
-- Write-only. Time Event Interrupt Disable
TIMDIS : Boolean := False;
-- Write-only. Calendar Event Interrupt Disable
CALDIS : Boolean := False;
-- Write-only. Time and/or Date Error Interrupt Disable
TDERRDIS : Boolean := False;
-- unspecified
Reserved_6_31 : Interfaces.SAM.UInt26 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_IDR_Register use record
ACKDIS at 0 range 0 .. 0;
ALRDIS at 0 range 1 .. 1;
SECDIS at 0 range 2 .. 2;
TIMDIS at 0 range 3 .. 3;
CALDIS at 0 range 4 .. 4;
TDERRDIS at 0 range 5 .. 5;
Reserved_6_31 at 0 range 6 .. 31;
end record;
-- Interrupt Mask Register
type RTC_IMR_Register is record
-- Read-only. Acknowledge Update Interrupt Mask
ACK : Boolean;
-- Read-only. Alarm Interrupt Mask
ALR : Boolean;
-- Read-only. Second Event Interrupt Mask
SEC : Boolean;
-- Read-only. Time Event Interrupt Mask
TIM : Boolean;
-- Read-only. Calendar Event Interrupt Mask
CAL : Boolean;
-- unspecified
Reserved_5_31 : Interfaces.SAM.UInt27;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_IMR_Register use record
ACK at 0 range 0 .. 0;
ALR at 0 range 1 .. 1;
SEC at 0 range 2 .. 2;
TIM at 0 range 3 .. 3;
CAL at 0 range 4 .. 4;
Reserved_5_31 at 0 range 5 .. 31;
end record;
-- Valid Entry Register
type RTC_VER_Register is record
-- Read-only. Non-valid Time
NVTIM : Boolean;
-- Read-only. Non-valid Calendar
NVCAL : Boolean;
-- Read-only. Non-valid Time Alarm
NVTIMALR : Boolean;
-- Read-only. Non-valid Calendar Alarm
NVCALALR : Boolean;
-- unspecified
Reserved_4_31 : Interfaces.SAM.UInt28;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_VER_Register use record
NVTIM at 0 range 0 .. 0;
NVCAL at 0 range 1 .. 1;
NVTIMALR at 0 range 2 .. 2;
NVCALALR at 0 range 3 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
subtype RTC_MSR_MS_Field is Interfaces.SAM.UInt10;
-- Milliseconds Register
type RTC_MSR_Register is record
-- Read-only. Number of 1/1024 seconds elapsed within 1 second
MS : RTC_MSR_MS_Field;
-- unspecified
Reserved_10_31 : Interfaces.SAM.UInt22;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_MSR_Register use record
MS at 0 range 0 .. 9;
Reserved_10_31 at 0 range 10 .. 31;
end record;
-- Write Protection Key
type WPMR_WPKEY_Field is
(
-- Reset value for the field
Wpmr_Wpkey_Field_Reset,
-- Writing any other value in this field aborts the write operation of
-- the WPEN bit.Always reads as 0.
Passwd)
with Size => 24;
for WPMR_WPKEY_Field use
(Wpmr_Wpkey_Field_Reset => 0,
Passwd => <PASSWORD>);
-- Write Protection Mode Register
type RTC_WPMR_Register is record
-- Write Protection Enable
WPEN : Boolean := False;
-- unspecified
Reserved_1_7 : Interfaces.SAM.UInt7 := 16#0#;
-- Write Protection Key
WPKEY : WPMR_WPKEY_Field := Wpmr_Wpkey_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTC_WPMR_Register use record
WPEN at 0 range 0 .. 0;
Reserved_1_7 at 0 range 1 .. 7;
WPKEY at 0 range 8 .. 31;
end record;
subtype RTT_MR_RTPRES_Field is Interfaces.SAM.UInt16;
-- Mode Register
type RTT_MR_Register is record
-- Real-time Timer Prescaler Value
RTPRES : RTT_MR_RTPRES_Field := 16#8000#;
-- Alarm Interrupt Enable
ALMIEN : Boolean := False;
-- Real-time Timer Increment Interrupt Enable
RTTINCIEN : Boolean := False;
-- Real-time Timer Restart
RTTRST : Boolean := False;
-- unspecified
Reserved_19_19 : Interfaces.SAM.Bit := 16#0#;
-- Real-time Timer Disable
RTTDIS : Boolean := False;
-- RTTINC2 Alarm Enable
INC2AEN : Boolean := False;
-- Trigger Event Alarm Enable
EVAEN : Boolean := False;
-- unspecified
Reserved_23_23 : Interfaces.SAM.Bit := 16#0#;
-- Real-Time Clock 1Hz Clock Selection
RTC1HZ : Boolean := False;
-- unspecified
Reserved_25_31 : Interfaces.SAM.UInt7 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTT_MR_Register use record
RTPRES at 0 range 0 .. 15;
ALMIEN at 0 range 16 .. 16;
RTTINCIEN at 0 range 17 .. 17;
RTTRST at 0 range 18 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
RTTDIS at 0 range 20 .. 20;
INC2AEN at 0 range 21 .. 21;
EVAEN at 0 range 22 .. 22;
Reserved_23_23 at 0 range 23 .. 23;
RTC1HZ at 0 range 24 .. 24;
Reserved_25_31 at 0 range 25 .. 31;
end record;
-- RTT_SR_RTTINC array
type RTT_SR_RTTINC_Field_Array is array (1 .. 2) of Boolean
with Component_Size => 1, Size => 2;
-- Type definition for RTT_SR_RTTINC
type RTT_SR_RTTINC_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- RTTINC as a value
Val : Interfaces.SAM.UInt2;
when True =>
-- RTTINC as an array
Arr : RTT_SR_RTTINC_Field_Array;
end case;
end record
with Unchecked_Union, Size => 2;
for RTT_SR_RTTINC_Field use record
Val at 0 range 0 .. 1;
Arr at 0 range 0 .. 1;
end record;
-- Status Register
type RTT_SR_Register is record
-- Read-only. Real-time Alarm Status
ALMS : Boolean;
-- Read-only. Prescaler Roll-over Status
RTTINC : RTT_SR_RTTINC_Field;
-- unspecified
Reserved_3_31 : Interfaces.SAM.UInt29;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTT_SR_Register use record
ALMS at 0 range 0 .. 0;
RTTINC at 0 range 1 .. 2;
Reserved_3_31 at 0 range 3 .. 31;
end record;
-- Selection of the 32-bit Counter Modulo to generate RTTINC2 flag
type MODR_SELINC2_Field is
(
-- The RTTINC2 flag never rises
No_Rttinc2,
-- The RTTINC2 flag is set when CRTV modulo 64 equals 0
Mod64,
-- The RTTINC2 flag is set when CRTV modulo 128 equals 0
Mod128,
-- The RTTINC2 flag is set when CRTV modulo 256 equals 0
Mod256,
-- The RTTINC2 flag is set when CRTV modulo 512 equals 0
Mod512,
-- The RTTINC2 flag is set when CRTV modulo 1024 equals 0.Example: If
-- RTPRES=32 then RTTINC2 flag rises once per second if the slow clock
-- is 32.768 kHz.
Mod1024,
-- The RTTINC2 flag is set when CRTV modulo 2048 equals 0
Mod2048,
-- The RTTINC2 flag is set when CRTV modulo 4096 equals 0
Mod4096)
with Size => 3;
for MODR_SELINC2_Field use
(No_Rttinc2 => 0,
Mod64 => 1,
Mod128 => 2,
Mod256 => 3,
Mod512 => 4,
Mod1024 => 5,
Mod2048 => 6,
Mod4096 => 7);
-- Selection of the 32-bit Counter Modulo to generate the trigger event
type MODR_SELTRGEV_Field is
(
-- No event generated
No_Event,
-- Event occurs when CRTV modulo 2 equals 0
Mod2,
-- Event occurs when CRTV modulo 4 equals 0
Mod4,
-- Event occurs when CRTV modulo 8 equals 0
Mod8,
-- Event occurs when CRTV modulo 16 equals 0
Mod16,
-- Event occurs when CRTV modulo 32 equals 0
Mod32,
-- Event occurs when CRTV modulo 64 equals 0
Mod64,
-- Event occurs when CRTV modulo 128 equals 0
Mod128)
with Size => 3;
for MODR_SELTRGEV_Field use
(No_Event => 0,
Mod2 => 1,
Mod4 => 2,
Mod8 => 3,
Mod16 => 4,
Mod32 => 5,
Mod64 => 6,
Mod128 => 7);
-- Modulo Selection Register
type RTT_MODR_Register is record
-- Selection of the 32-bit Counter Modulo to generate RTTINC2 flag
SELINC2 : MODR_SELINC2_Field := Interfaces.SAM.SYSC.No_Rttinc2;
-- unspecified
Reserved_3_7 : Interfaces.SAM.UInt5 := 16#0#;
-- Selection of the 32-bit Counter Modulo to generate the trigger event
SELTRGEV : MODR_SELTRGEV_Field := Interfaces.SAM.SYSC.No_Event;
-- unspecified
Reserved_11_31 : Interfaces.SAM.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for RTT_MODR_Register use record
SELINC2 at 0 range 0 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
SELTRGEV at 0 range 8 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
-- Voltage Regulator Off
type CR_VROFF_Field is
(
-- No effect.
No_Effect,
-- If KEY is correct, asserts the system reset signal and stops the
-- voltage regulator.
Stop_Vreg)
with Size => 1;
for CR_VROFF_Field use
(No_Effect => 0,
Stop_Vreg => 1);
-- Crystal Oscillator Select
type CR_XTALSEL_Field is
(
-- No effect.
No_Effect,
-- If KEY is correct, switches the slow clock on the crystal oscillator
-- output.
Crystal_Sel)
with Size => 1;
for CR_XTALSEL_Field use
(No_Effect => 0,
Crystal_Sel => 1);
-- Supply Controller Control Register
type SUPC_CR_Register is record
-- unspecified
Reserved_0_1 : Interfaces.SAM.UInt2 := 16#0#;
-- Write-only. Voltage Regulator Off
VROFF : CR_VROFF_Field := Interfaces.SAM.SYSC.No_Effect;
-- Write-only. Crystal Oscillator Select
XTALSEL : CR_XTALSEL_Field := Interfaces.SAM.SYSC.No_Effect;
-- unspecified
Reserved_4_23 : Interfaces.SAM.UInt20 := 16#0#;
-- Write-only. Password
KEY : CR_KEY_Field := Cr_Key_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_CR_Register use record
Reserved_0_1 at 0 range 0 .. 1;
VROFF at 0 range 2 .. 2;
XTALSEL at 0 range 3 .. 3;
Reserved_4_23 at 0 range 4 .. 23;
KEY at 0 range 24 .. 31;
end record;
subtype SUPC_SMMR_SMTH_Field is Interfaces.SAM.UInt4;
-- Supply Monitor Sampling Period
type SMMR_SMSMPL_Field is
(
-- Supply Monitor disabled
Smd,
-- Continuous Supply Monitor
Csm,
-- Supply Monitor enables one SLCK period every 32 SLCK periods
SMMR_SMSMPL_Field_32Slck,
-- Supply Monitor enables one SLCK period every 256 SLCK periods
SMMR_SMSMPL_Field_256Slck,
-- Supply Monitor enables one SLCK period every 2,048 SLCK periods
SMMR_SMSMPL_Field_2048Slck)
with Size => 3;
for SMMR_SMSMPL_Field use
(Smd => 0,
Csm => 1,
SMMR_SMSMPL_Field_32Slck => 2,
SMMR_SMSMPL_Field_256Slck => 3,
SMMR_SMSMPL_Field_2048Slck => 4);
-- Supply Monitor Reset Enable
type SMMR_SMRSTEN_Field is
(
-- The core reset signal vddcore_nreset is not affected when a supply
-- monitor detection occurs.
Not_Enable,
-- The core reset signal vddcore_nreset is asserted when a supply
-- monitor detection occurs.
Enable)
with Size => 1;
for SMMR_SMRSTEN_Field use
(Not_Enable => 0,
Enable => 1);
-- Supply Monitor Interrupt Enable
type SMMR_SMIEN_Field is
(
-- The SUPC interrupt signal is not affected when a supply monitor
-- detection occurs.
Not_Enable,
-- The SUPC interrupt signal is asserted when a supply monitor detection
-- occurs.
Enable)
with Size => 1;
for SMMR_SMIEN_Field use
(Not_Enable => 0,
Enable => 1);
-- Supply Controller Supply Monitor Mode Register
type SUPC_SMMR_Register is record
-- Supply Monitor Threshold
SMTH : SUPC_SMMR_SMTH_Field := 16#0#;
-- unspecified
Reserved_4_7 : Interfaces.SAM.UInt4 := 16#0#;
-- Supply Monitor Sampling Period
SMSMPL : SMMR_SMSMPL_Field := Interfaces.SAM.SYSC.Smd;
-- unspecified
Reserved_11_11 : Interfaces.SAM.Bit := 16#0#;
-- Supply Monitor Reset Enable
SMRSTEN : SMMR_SMRSTEN_Field := Interfaces.SAM.SYSC.Not_Enable;
-- Supply Monitor Interrupt Enable
SMIEN : SMMR_SMIEN_Field := Interfaces.SAM.SYSC.Not_Enable;
-- unspecified
Reserved_14_31 : Interfaces.SAM.UInt18 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_SMMR_Register use record
SMTH at 0 range 0 .. 3;
Reserved_4_7 at 0 range 4 .. 7;
SMSMPL at 0 range 8 .. 10;
Reserved_11_11 at 0 range 11 .. 11;
SMRSTEN at 0 range 12 .. 12;
SMIEN at 0 range 13 .. 13;
Reserved_14_31 at 0 range 14 .. 31;
end record;
-- POR Core Reset Enable
type MR_BODRSTEN_Field is
(
-- The core reset signal vddcore_nreset is not affected when a brownout
-- detection occurs.
Not_Enable,
-- The core reset signal vddcore_nreset is asserted when a brownout
-- detection occurs.
Enable)
with Size => 1;
for MR_BODRSTEN_Field use
(Not_Enable => 0,
Enable => 1);
-- POR Core Disable
type MR_BODDIS_Field is
(
-- The core brownout detector is enabled.
Enable,
-- The core brownout detector is disabled.
Disable)
with Size => 1;
for MR_BODDIS_Field use
(Enable => 0,
Disable => 1);
-- Oscillator Bypass
type MR_OSCBYPASS_Field is
(
-- No effect. Clock selection depends on XTALSEL value.
No_Effect,
-- The 32 kHz crystal oscillator is selected and put in bypass mode.
Bypass)
with Size => 1;
for MR_OSCBYPASS_Field use
(No_Effect => 0,
Bypass => 1);
-- Cache Data SRAM Power Switch
type MR_CDPSWITCH_Field is
(
-- The cache data SRAM is not powered.
Off,
-- The cache data SRAM is powered.
On)
with Size => 1;
for MR_CDPSWITCH_Field use
(Off => 0,
On => 1);
-- Cache Tag SRAM Power Switch
type MR_CTPSWITCH_Field is
(
-- The cache tag SRAM is not powered.
Off,
-- The cache tag SRAM is powered.
On)
with Size => 1;
for MR_CTPSWITCH_Field use
(Off => 0,
On => 1);
-- Supply Controller Mode Register
type SUPC_MR_Register is record
-- unspecified
Reserved_0_11 : Interfaces.SAM.UInt12 := 16#A00#;
-- POR Core Reset Enable
BODRSTEN : MR_BODRSTEN_Field := Interfaces.SAM.SYSC.Enable;
-- POR Core Disable
BODDIS : MR_BODDIS_Field := Interfaces.SAM.SYSC.Enable;
-- unspecified
Reserved_14_19 : Interfaces.SAM.UInt6 := 16#1#;
-- Oscillator Bypass
OSCBYPASS : MR_OSCBYPASS_Field := Interfaces.SAM.SYSC.No_Effect;
-- Cache Data SRAM Power Switch
CDPSWITCH : MR_CDPSWITCH_Field := Interfaces.SAM.SYSC.On;
-- Cache Tag SRAM Power Switch
CTPSWITCH : MR_CTPSWITCH_Field := Interfaces.SAM.SYSC.On;
-- This bit must always be set to 1.
ONE : Boolean := True;
-- Password Key
KEY : MR_KEY_Field := Mr_Key_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_MR_Register use record
Reserved_0_11 at 0 range 0 .. 11;
BODRSTEN at 0 range 12 .. 12;
BODDIS at 0 range 13 .. 13;
Reserved_14_19 at 0 range 14 .. 19;
OSCBYPASS at 0 range 20 .. 20;
CDPSWITCH at 0 range 21 .. 21;
CTPSWITCH at 0 range 22 .. 22;
ONE at 0 range 23 .. 23;
KEY at 0 range 24 .. 31;
end record;
-- Supply Monitor Wake-up Enable
type WUMR_SMEN_Field is
(
-- The supply monitor detection has no wake-up effect.
Not_Enable,
-- The supply monitor detection forces the wake-up of the core power
-- supply.
Enable)
with Size => 1;
for WUMR_SMEN_Field use
(Not_Enable => 0,
Enable => 1);
-- Real-time Timer Wake-up Enable
type WUMR_RTTEN_Field is
(
-- Reset value for the field
Wumr_Rtten_Field_Reset,
-- The RTT alarm signal forces the wake-up of the core power supply.
Enable)
with Size => 1;
for WUMR_RTTEN_Field use
(Wumr_Rtten_Field_Reset => 0,
Enable => 1);
-- Real-time Clock Wake-up Enable
type WUMR_RTCEN_Field is
(
-- Reset value for the field
Wumr_Rtcen_Field_Reset,
-- The RTC alarm signal forces the wake-up of the core power supply.
Enable)
with Size => 1;
for WUMR_RTCEN_Field use
(Wumr_Rtcen_Field_Reset => 0,
Enable => 1);
-- Wake-up Inputs Debouncer Period
type WUMR_WKUPDBC_Field is
(
-- Immediate, no debouncing, detected active at least on one Slow Clock
-- edge.
Immediate,
-- WKUPx shall be in its active state for at least 3 SLCK periods
WUMR_WKUPDBC_Field_3_Sclk,
-- WKUPx shall be in its active state for at least 32 SLCK periods
WUMR_WKUPDBC_Field_32_Sclk,
-- WKUPx shall be in its active state for at least 512 SLCK periods
WUMR_WKUPDBC_Field_512_Sclk,
-- WKUPx shall be in its active state for at least 4,096 SLCK periods
WUMR_WKUPDBC_Field_4096_Sclk,
-- WKUPx shall be in its active state for at least 32,768 SLCK periods
WUMR_WKUPDBC_Field_32768_Sclk)
with Size => 3;
for WUMR_WKUPDBC_Field use
(Immediate => 0,
WUMR_WKUPDBC_Field_3_Sclk => 1,
WUMR_WKUPDBC_Field_32_Sclk => 2,
WUMR_WKUPDBC_Field_512_Sclk => 3,
WUMR_WKUPDBC_Field_4096_Sclk => 4,
WUMR_WKUPDBC_Field_32768_Sclk => 5);
-- Supply Controller Wake-up Mode Register
type SUPC_WUMR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.SAM.Bit := 16#0#;
-- Supply Monitor Wake-up Enable
SMEN : WUMR_SMEN_Field := Interfaces.SAM.SYSC.Not_Enable;
-- Real-time Timer Wake-up Enable
RTTEN : WUMR_RTTEN_Field := Wumr_Rtten_Field_Reset;
-- Real-time Clock Wake-up Enable
RTCEN : WUMR_RTCEN_Field := Wumr_Rtcen_Field_Reset;
-- unspecified
Reserved_4_11 : Interfaces.SAM.Byte := 16#0#;
-- Wake-up Inputs Debouncer Period
WKUPDBC : WUMR_WKUPDBC_Field := Interfaces.SAM.SYSC.Immediate;
-- unspecified
Reserved_15_31 : Interfaces.SAM.UInt17 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_WUMR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
SMEN at 0 range 1 .. 1;
RTTEN at 0 range 2 .. 2;
RTCEN at 0 range 3 .. 3;
Reserved_4_11 at 0 range 4 .. 11;
WKUPDBC at 0 range 12 .. 14;
Reserved_15_31 at 0 range 15 .. 31;
end record;
-- Wake-up Input Enable 0
type WUIR_WKUPEN0_Field is
(
-- The corresponding wake-up input has no wake-up effect.
Disable,
-- The corresponding wake-up input forces the wake-up of the core power
-- supply.
Enable)
with Size => 1;
for WUIR_WKUPEN0_Field use
(Disable => 0,
Enable => 1);
-- SUPC_WUIR_WKUPEN array
type SUPC_WUIR_WKUPEN_Field_Array is array (0 .. 15) of WUIR_WKUPEN0_Field
with Component_Size => 1, Size => 16;
-- Type definition for SUPC_WUIR_WKUPEN
type SUPC_WUIR_WKUPEN_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- WKUPEN as a value
Val : Interfaces.SAM.UInt16;
when True =>
-- WKUPEN as an array
Arr : SUPC_WUIR_WKUPEN_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for SUPC_WUIR_WKUPEN_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- Wake-up Input Type 0
type WUIR_WKUPT0_Field is
(
-- A low level for a period defined by WKUPDBC on the corresponding
-- wake-up input forces the wake-up of the core power supply.
Low,
-- A high level for a period defined by WKUPDBC on the corresponding
-- wake-up input forces the wake-up of the core power supply.
High)
with Size => 1;
for WUIR_WKUPT0_Field use
(Low => 0,
High => 1);
-- SUPC_WUIR_WKUPT array
type SUPC_WUIR_WKUPT_Field_Array is array (0 .. 15) of WUIR_WKUPT0_Field
with Component_Size => 1, Size => 16;
-- Type definition for SUPC_WUIR_WKUPT
type SUPC_WUIR_WKUPT_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- WKUPT as a value
Val : Interfaces.SAM.UInt16;
when True =>
-- WKUPT as an array
Arr : SUPC_WUIR_WKUPT_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for SUPC_WUIR_WKUPT_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- Supply Controller Wake-up Inputs Register
type SUPC_WUIR_Register is record
-- Wake-up Input Enable 0
WKUPEN : SUPC_WUIR_WKUPEN_Field := (As_Array => False, Val => 16#0#);
-- Wake-up Input Type 0
WKUPT : SUPC_WUIR_WKUPT_Field := (As_Array => False, Val => 16#0#);
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_WUIR_Register use record
WKUPEN at 0 range 0 .. 15;
WKUPT at 0 range 16 .. 31;
end record;
-- WKUP Wake-up Status
type SR_WKUPS_Field is
(
-- No wake-up due to the assertion of the WKUP pins has occurred since
-- the last read of SUPC_SR.
No,
-- At least one wake-up due to the assertion of the WKUP pins has
-- occurred since the last read of SUPC_SR.
Present)
with Size => 1;
for SR_WKUPS_Field use
(No => 0,
Present => 1);
-- Brownout Detector Reset Status
type SR_BODRSTS_Field is
(
-- No core brownout rising edge event has been detected since the last
-- read of the SUPC_SR.
No,
-- At least one brownout output rising edge event has been detected
-- since the last read of the SUPC_SR.
Present)
with Size => 1;
for SR_BODRSTS_Field use
(No => 0,
Present => 1);
-- Supply Monitor Reset Status
type SR_SMRSTS_Field is
(
-- No supply monitor detection has generated a core reset since the last
-- read of the SUPC_SR.
No,
-- At least one supply monitor detection has generated a core reset
-- since the last read of the SUPC_SR.
Present)
with Size => 1;
for SR_SMRSTS_Field use
(No => 0,
Present => 1);
-- Supply Monitor Status
type SR_SMS_Field is
(
-- No supply monitor detection since the last read of SUPC_SR.
No,
-- At least one supply monitor detection since the last read of SUPC_SR.
Present)
with Size => 1;
for SR_SMS_Field use
(No => 0,
Present => 1);
-- Supply Monitor Output Status
type SR_SMOS_Field is
(
-- The supply monitor detected VDDIO higher than its threshold at its
-- last measurement.
High,
-- The supply monitor detected VDDIO lower than its threshold at its
-- last measurement.
Low)
with Size => 1;
for SR_SMOS_Field use
(High => 0,
Low => 1);
-- 32-kHz Oscillator Selection Status
type SR_OSCSEL_Field is
(
-- The slow clock SLCK is generated by the embedded 32 kHz RC
-- oscillator.
Rc,
-- The slow clock SLCK is generated by the 32 kHz crystal oscillator.
Cryst)
with Size => 1;
for SR_OSCSEL_Field use
(Rc => 0,
Cryst => 1);
-- WKUP Input Status 0
type SR_WKUPIS0_Field is
(
-- The corresponding wake-up input is disabled, or was inactive at the
-- time the debouncer triggered a wake-up event.
Disabled,
-- The corresponding wake-up input was active at the time the debouncer
-- triggered a wake-up event.
Enabled)
with Size => 1;
for SR_WKUPIS0_Field use
(Disabled => 0,
Enabled => 1);
-- SUPC_SR_WKUPIS array
type SUPC_SR_WKUPIS_Field_Array is array (0 .. 15) of SR_WKUPIS0_Field
with Component_Size => 1, Size => 16;
-- Type definition for SUPC_SR_WKUPIS
type SUPC_SR_WKUPIS_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- WKUPIS as a value
Val : Interfaces.SAM.UInt16;
when True =>
-- WKUPIS as an array
Arr : SUPC_SR_WKUPIS_Field_Array;
end case;
end record
with Unchecked_Union, Size => 16;
for SUPC_SR_WKUPIS_Field use record
Val at 0 range 0 .. 15;
Arr at 0 range 0 .. 15;
end record;
-- Supply Controller Status Register
type SUPC_SR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.SAM.Bit;
-- Read-only. WKUP Wake-up Status
WKUPS : SR_WKUPS_Field;
-- unspecified
Reserved_2_2 : Interfaces.SAM.Bit;
-- Read-only. Brownout Detector Reset Status
BODRSTS : SR_BODRSTS_Field;
-- Read-only. Supply Monitor Reset Status
SMRSTS : SR_SMRSTS_Field;
-- Read-only. Supply Monitor Status
SMS : SR_SMS_Field;
-- Read-only. Supply Monitor Output Status
SMOS : SR_SMOS_Field;
-- Read-only. 32-kHz Oscillator Selection Status
OSCSEL : SR_OSCSEL_Field;
-- unspecified
Reserved_8_15 : Interfaces.SAM.Byte;
-- Read-only. WKUP Input Status 0
WKUPIS : SUPC_SR_WKUPIS_Field;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_SR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
WKUPS at 0 range 1 .. 1;
Reserved_2_2 at 0 range 2 .. 2;
BODRSTS at 0 range 3 .. 3;
SMRSTS at 0 range 4 .. 4;
SMS at 0 range 5 .. 5;
SMOS at 0 range 6 .. 6;
OSCSEL at 0 range 7 .. 7;
Reserved_8_15 at 0 range 8 .. 15;
WKUPIS at 0 range 16 .. 31;
end record;
-- Low Power Value Selection
type PWMR_LPOWERS_Field is
(
-- The trimming value applied to the regulator when the device is in
-- wait mode. This value is factory-defined.
Factory,
-- The trimming value applied to the regulator is defined by the value
-- programmed in the LPOWERx bits.
User)
with Size => 1;
for PWMR_LPOWERS_Field use
(Factory => 0,
User => 1);
-- SUPC_PWMR_LPOWER array
type SUPC_PWMR_LPOWER_Field_Array is array (0 .. 3) of Boolean
with Component_Size => 1, Size => 4;
-- Type definition for SUPC_PWMR_LPOWER
type SUPC_PWMR_LPOWER_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- LPOWER as a value
Val : Interfaces.SAM.UInt4;
when True =>
-- LPOWER as an array
Arr : SUPC_PWMR_LPOWER_Field_Array;
end case;
end record
with Unchecked_Union, Size => 4;
for SUPC_PWMR_LPOWER_Field use record
Val at 0 range 0 .. 3;
Arr at 0 range 0 .. 3;
end record;
-- Start-up Time when Resuming from Wait Mode
type PWMR_STUPTIME_Field is
(
-- Fast start-up.
Fast,
-- Slow start-up.
Slow)
with Size => 1;
for PWMR_STUPTIME_Field use
(Fast => 0,
Slow => 1);
-- Enhanced Custom Power Value Selection
type PWMR_ECPWRS_Field is
(
-- The trimming value applied to the regulator when the device is in
-- active mode. This value is factory-defined.
Factory,
-- The trimming value applied to the regulator is defined by the value
-- programmed in ECPWRx bits.
User)
with Size => 1;
for PWMR_ECPWRS_Field use
(Factory => 0,
User => 1);
-- SUPC_PWMR_ECPWR array
type SUPC_PWMR_ECPWR_Field_Array is array (0 .. 3) of Boolean
with Component_Size => 1, Size => 4;
-- Type definition for SUPC_PWMR_ECPWR
type SUPC_PWMR_ECPWR_Field
(As_Array : Boolean := False)
is record
case As_Array is
when False =>
-- ECPWR as a value
Val : Interfaces.SAM.UInt4;
when True =>
-- ECPWR as an array
Arr : SUPC_PWMR_ECPWR_Field_Array;
end case;
end record
with Unchecked_Union, Size => 4;
for SUPC_PWMR_ECPWR_Field use record
Val at 0 range 0 .. 3;
Arr at 0 range 0 .. 3;
end record;
-- SRAM Power Control
type PWMR_SRAM0ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM0ON_Field use
(Off => 0,
On => 1);
-- SRAM Power Control
type PWMR_SRAM1ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM1ON_Field use
(Off => 0,
On => 1);
-- SRAM Power Control
type PWMR_SRAM2ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM2ON_Field use
(Off => 0,
On => 1);
-- SRAM Power Control
type PWMR_SRAM3ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM3ON_Field use
(Off => 0,
On => 1);
-- SRAM Power Control
type PWMR_SRAM4ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM4ON_Field use
(Off => 0,
On => 1);
-- SRAM Power Control
type PWMR_SRAM5ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM5ON_Field use
(Off => 0,
On => 1);
-- SRAM Power Control
type PWMR_SRAM6ON_Field is
(
-- SRAMx is not powered.
Off,
-- SRAMx is powered.
On)
with Size => 1;
for PWMR_SRAM6ON_Field use
(Off => 0,
On => 1);
-- Dual-port RAM Power Control
type PWMR_DPRAMON_Field is
(
-- USB dual-port RAM is not powered.
Off,
-- USB dual-port RAM is powered.
On)
with Size => 1;
for PWMR_DPRAMON_Field use
(Off => 0,
On => 1);
-- Password Key
type PWMR_KEY_Field is
(
-- Reset value for the field
Pwmr_Key_Field_Reset,
-- Writing any other value in this field aborts the write
-- operation.Always reads as 0.
Passwd)
with Size => 8;
for PWMR_KEY_Field use
(Pwmr_Key_Field_Reset => 0,
Passwd => 90);
-- Supply Controller Power Mode Register
type SUPC_PWMR_Register is record
-- Low Power Value Selection
LPOWERS : PWMR_LPOWERS_Field := Interfaces.SAM.SYSC.Factory;
-- Low Power Value
LPOWER : SUPC_PWMR_LPOWER_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_5_6 : Interfaces.SAM.UInt2 := 16#0#;
-- Start-up Time when Resuming from Wait Mode
STUPTIME : PWMR_STUPTIME_Field := Interfaces.SAM.SYSC.Fast;
-- Enhanced Custom Power Value Selection
ECPWRS : PWMR_ECPWRS_Field := Interfaces.SAM.SYSC.Factory;
-- Enhanced Custom Power Value
ECPWR : SUPC_PWMR_ECPWR_Field :=
(As_Array => False, Val => 16#0#);
-- unspecified
Reserved_13_15 : Interfaces.SAM.UInt3 := 16#0#;
-- SRAM Power Control
SRAM0ON : PWMR_SRAM0ON_Field := Interfaces.SAM.SYSC.Off;
-- SRAM Power Control
SRAM1ON : PWMR_SRAM1ON_Field := Interfaces.SAM.SYSC.Off;
-- SRAM Power Control
SRAM2ON : PWMR_SRAM2ON_Field := Interfaces.SAM.SYSC.Off;
-- SRAM Power Control
SRAM3ON : PWMR_SRAM3ON_Field := Interfaces.SAM.SYSC.Off;
-- SRAM Power Control
SRAM4ON : PWMR_SRAM4ON_Field := Interfaces.SAM.SYSC.Off;
-- SRAM Power Control
SRAM5ON : PWMR_SRAM5ON_Field := Interfaces.SAM.SYSC.Off;
-- SRAM Power Control
SRAM6ON : PWMR_SRAM6ON_Field := Interfaces.SAM.SYSC.Off;
-- Dual-port RAM Power Control
DPRAMON : PWMR_DPRAMON_Field := Interfaces.SAM.SYSC.Off;
-- Password Key
KEY : PWMR_KEY_Field := Pwmr_Key_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for SUPC_PWMR_Register use record
LPOWERS at 0 range 0 .. 0;
LPOWER at 0 range 1 .. 4;
Reserved_5_6 at 0 range 5 .. 6;
STUPTIME at 0 range 7 .. 7;
ECPWRS at 0 range 8 .. 8;
ECPWR at 0 range 9 .. 12;
Reserved_13_15 at 0 range 13 .. 15;
SRAM0ON at 0 range 16 .. 16;
SRAM1ON at 0 range 17 .. 17;
SRAM2ON at 0 range 18 .. 18;
SRAM3ON at 0 range 19 .. 19;
SRAM4ON at 0 range 20 .. 20;
SRAM5ON at 0 range 21 .. 21;
SRAM6ON at 0 range 22 .. 22;
DPRAMON at 0 range 23 .. 23;
KEY at 0 range 24 .. 31;
end record;
-- Control Register
type WDT_CR_Register is record
-- Write-only. Watchdog Restart
WDRSTT : Boolean := False;
-- unspecified
Reserved_1_23 : Interfaces.SAM.UInt23 := 16#0#;
-- Write-only. Password.
KEY : CR_KEY_Field := Cr_Key_Field_Reset;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for WDT_CR_Register use record
WDRSTT at 0 range 0 .. 0;
Reserved_1_23 at 0 range 1 .. 23;
KEY at 0 range 24 .. 31;
end record;
subtype WDT_MR_WDV_Field is Interfaces.SAM.UInt12;
subtype WDT_MR_WDD_Field is Interfaces.SAM.UInt12;
-- Mode Register
type WDT_MR_Register is record
-- Watchdog Counter Value
WDV : WDT_MR_WDV_Field := 16#FFF#;
-- Watchdog Fault Interrupt Enable
WDFIEN : Boolean := False;
-- Watchdog Reset Enable
WDRSTEN : Boolean := True;
-- Watchdog Reset Processor
WDRPROC : Boolean := False;
-- Watchdog Disable
WDDIS : Boolean := False;
-- Watchdog Delta Value
WDD : WDT_MR_WDD_Field := 16#FFF#;
-- Watchdog Debug Halt
WDDBGHLT : Boolean := True;
-- Watchdog Idle Halt
WDIDLEHLT : Boolean := True;
-- unspecified
Reserved_30_31 : Interfaces.SAM.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for WDT_MR_Register use record
WDV at 0 range 0 .. 11;
WDFIEN at 0 range 12 .. 12;
WDRSTEN at 0 range 13 .. 13;
WDRPROC at 0 range 14 .. 14;
WDDIS at 0 range 15 .. 15;
WDD at 0 range 16 .. 27;
WDDBGHLT at 0 range 28 .. 28;
WDIDLEHLT at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
-- Status Register
type WDT_SR_Register is record
-- Read-only. Watchdog Underflow
WDUNF : Boolean;
-- Read-only. Watchdog Error
WDERR : Boolean;
-- unspecified
Reserved_2_31 : Interfaces.SAM.UInt30;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for WDT_SR_Register use record
WDUNF at 0 range 0 .. 0;
WDERR at 0 range 1 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- General Purpose Backup Registers
type GPBR_Peripheral is record
-- General Purpose Backup Register
GPBR : aliased GPBR_GPBR_Registers;
end record
with Volatile;
for GPBR_Peripheral use record
GPBR at 0 range 0 .. 255;
end record;
-- General Purpose Backup Registers
GPBR_Periph : aliased GPBR_Peripheral
with Import, Address => System'To_Address (16#400E1490#);
-- Reset Controller
type RSTC_Peripheral is record
-- Control Register
CR : aliased RSTC_CR_Register;
-- Status Register
SR : aliased RSTC_SR_Register;
-- Mode Register
MR : aliased RSTC_MR_Register;
end record
with Volatile;
for RSTC_Peripheral use record
CR at 16#0# range 0 .. 31;
SR at 16#4# range 0 .. 31;
MR at 16#8# range 0 .. 31;
end record;
-- Reset Controller
RSTC_Periph : aliased RSTC_Peripheral
with Import, Address => System'To_Address (16#400E1400#);
-- Real-time Clock
type RTC_Peripheral is record
-- Control Register
CR : aliased RTC_CR_Register;
-- Mode Register
MR : aliased RTC_MR_Register;
-- Time Register
TIMR : aliased RTC_TIMR_Register;
-- Calendar Register
CALR : aliased RTC_CALR_Register;
-- Time Alarm Register
TIMALR : aliased RTC_TIMALR_Register;
-- Calendar Alarm Register
CALALR : aliased RTC_CALALR_Register;
-- Status Register
SR : aliased RTC_SR_Register;
-- Status Clear Command Register
SCCR : aliased RTC_SCCR_Register;
-- Interrupt Enable Register
IER : aliased RTC_IER_Register;
-- Interrupt Disable Register
IDR : aliased RTC_IDR_Register;
-- Interrupt Mask Register
IMR : aliased RTC_IMR_Register;
-- Valid Entry Register
VER : aliased RTC_VER_Register;
-- Milliseconds Register
MSR : aliased RTC_MSR_Register;
-- Write Protection Mode Register
WPMR : aliased RTC_WPMR_Register;
end record
with Volatile;
for RTC_Peripheral use record
CR at 16#0# range 0 .. 31;
MR at 16#4# range 0 .. 31;
TIMR at 16#8# range 0 .. 31;
CALR at 16#C# range 0 .. 31;
TIMALR at 16#10# range 0 .. 31;
CALALR at 16#14# range 0 .. 31;
SR at 16#18# range 0 .. 31;
SCCR at 16#1C# range 0 .. 31;
IER at 16#20# range 0 .. 31;
IDR at 16#24# range 0 .. 31;
IMR at 16#28# range 0 .. 31;
VER at 16#2C# range 0 .. 31;
MSR at 16#D0# range 0 .. 31;
WPMR at 16#E4# range 0 .. 31;
end record;
-- Real-time Clock
RTC_Periph : aliased RTC_Peripheral
with Import, Address => System'To_Address (16#400E1460#);
-- Real-time Timer
type RTT_Peripheral is record
-- Mode Register
MR : aliased RTT_MR_Register;
-- Alarm Register
AR : aliased Interfaces.SAM.UInt32;
-- Value Register
VR : aliased Interfaces.SAM.UInt32;
-- Status Register
SR : aliased RTT_SR_Register;
-- Modulo Selection Register
MODR : aliased RTT_MODR_Register;
end record
with Volatile;
for RTT_Peripheral use record
MR at 16#0# range 0 .. 31;
AR at 16#4# range 0 .. 31;
VR at 16#8# range 0 .. 31;
SR at 16#C# range 0 .. 31;
MODR at 16#10# range 0 .. 31;
end record;
-- Real-time Timer
RTT_Periph : aliased RTT_Peripheral
with Import, Address => System'To_Address (16#400E1430#);
-- Supply Controller
type SUPC_Peripheral is record
-- Supply Controller Control Register
CR : aliased SUPC_CR_Register;
-- Supply Controller Supply Monitor Mode Register
SMMR : aliased SUPC_SMMR_Register;
-- Supply Controller Mode Register
MR : aliased SUPC_MR_Register;
-- Supply Controller Wake-up Mode Register
WUMR : aliased SUPC_WUMR_Register;
-- Supply Controller Wake-up Inputs Register
WUIR : aliased SUPC_WUIR_Register;
-- Supply Controller Status Register
SR : aliased SUPC_SR_Register;
-- Supply Controller Power Mode Register
PWMR : aliased SUPC_PWMR_Register;
end record
with Volatile;
for SUPC_Peripheral use record
CR at 16#0# range 0 .. 31;
SMMR at 16#4# range 0 .. 31;
MR at 16#8# range 0 .. 31;
WUMR at 16#C# range 0 .. 31;
WUIR at 16#10# range 0 .. 31;
SR at 16#14# range 0 .. 31;
PWMR at 16#1C# range 0 .. 31;
end record;
-- Supply Controller
SUPC_Periph : aliased SUPC_Peripheral
with Import, Address => System'To_Address (16#400E1410#);
-- Watchdog Timer
type WDT_Peripheral is record
-- Control Register
CR : aliased WDT_CR_Register;
-- Mode Register
MR : aliased WDT_MR_Register;
-- Status Register
SR : aliased WDT_SR_Register;
end record
with Volatile;
for WDT_Peripheral use record
CR at 16#0# range 0 .. 31;
MR at 16#4# range 0 .. 31;
SR at 16#8# range 0 .. 31;
end record;
-- Watchdog Timer
WDT_Periph : aliased WDT_Peripheral
with Import, Address => System'To_Address (16#400E1450#);
end Interfaces.SAM.SYSC;
|
data/mapObjects/mtmoon1.asm | adhi-thirumala/EvoYellow | 16 | 4465 | MtMoon1Object:
db $3 ; border block
db $5 ; warps
db $23, $e, $1, $ff
db $23, $f, $1, $ff
db $5, $5, $0, MT_MOON_2
db $b, $11, $2, MT_MOON_2
db $f, $19, $3, MT_MOON_2
db $1 ; signs
db $17, $f, $e ; MtMoon1Text14
db $d ; objects e number of
object SPRITE_HIKER, $5, $6, STAY, DOWN, $1, OPP_HIKER, $1
object SPRITE_BUG_CATCHER, $c, $10, STAY, RIGHT, $2, OPP_YOUNGSTER, $3
object SPRITE_LASS, $1e, $4, STAY, DOWN, $3, OPP_LASS, $5
object SPRITE_BLACK_HAIR_BOY_2, $18, $1f, STAY, UP, $4, OPP_SUPER_NERD, $1
object SPRITE_LASS, $10, $17, STAY, DOWN, $5, OPP_LASS, $6
object SPRITE_BUG_CATCHER, $7, $16, STAY, DOWN, $6, OPP_BUG_CATCHER, $7
object SPRITE_OAK, $1e, $1b, STAY, RIGHT, $7, OPP_PROF_OAK, $1 ;bug catcher $8
object SPRITE_BALL, $2, $14, STAY, NONE, $8, POTION
object SPRITE_BALL, $2, $2, STAY, NONE, $9, MOON_STONE
object SPRITE_BALL, $23, $1f, STAY, NONE, $a, RARE_CANDY
object SPRITE_BALL, $24, $17, STAY, NONE, $b, ESCAPE_ROPE
object SPRITE_BALL, $14, $21, STAY, NONE, $c, POTION
object SPRITE_BALL, $5, $20, STAY, NONE, $d, TM_12
;object SPRITE_OAK, $4, $19, STAY, DOWN, $e, OPP_PROF_OAK, $1
; warp-to
EVENT_DISP MT_MOON_1_WIDTH, $23, $e
EVENT_DISP MT_MOON_1_WIDTH, $23, $f
EVENT_DISP MT_MOON_1_WIDTH, $5, $5 ; MT_MOON_2
EVENT_DISP MT_MOON_1_WIDTH, $b, $11 ; MT_MOON_2
EVENT_DISP MT_MOON_1_WIDTH, $f, $19 ; MT_MOON_2
|
Ada/problem_21/problem_21.ads | PyllrNL/Project_Euler_Solutions | 0 | 10958 | <reponame>PyllrNL/Project_Euler_Solutions
with Test_Solution; use Test_Solution;
with Ada.Text_IO; use Ada.Text_IO;
with Ada.Numerics.Elementary_Functions;
package problem_21 is
type Int64 is range -2**63 .. 2**63 - 1;
function Solution_1 return Int64;
procedure Test_Solution_1;
function Get_Solutions return Solution_Case;
end problem_21;
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