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programs/oeis/158/A158737.asm
karttu/loda
1
247903
; A158737: a(n) = 1296*n^2 - 36. ; 1260,5148,11628,20700,32364,46620,63468,82908,104940,129564,156780,186588,218988,253980,291564,331740,374508,419868,467820,518364,571500,627228,685548,746460,809964,876060,944748,1016028,1089900,1166364,1245420,1327068,1411308,1498140,1587564,1679580,1774188,1871388,1971180,2073564,2178540,2286108,2396268,2509020,2624364,2742300,2862828,2985948,3111660,3239964,3370860,3504348,3640428,3779100,3920364,4064220,4210668,4359708,4511340,4665564,4822380,4981788,5143788,5308380,5475564,5645340,5817708,5992668,6170220,6350364,6533100,6718428,6906348,7096860,7289964,7485660,7683948,7884828,8088300,8294364,8503020,8714268,8928108,9144540,9363564,9585180,9809388,10036188,10265580,10497564,10732140,10969308,11209068,11451420,11696364,11943900,12194028,12446748,12702060,12959964,13220460,13483548,13749228,14017500,14288364,14561820,14837868,15116508,15397740,15681564,15967980,16256988,16548588,16842780,17139564,17438940,17740908,18045468,18352620,18662364,18974700,19289628,19607148,19927260,20249964,20575260,20903148,21233628,21566700,21902364,22240620,22581468,22924908,23270940,23619564,23970780,24324588,24680988,25039980,25401564,25765740,26132508,26501868,26873820,27248364,27625500,28005228,28387548,28772460,29159964,29550060,29942748,30338028,30735900,31136364,31539420,31945068,32353308,32764140,33177564,33593580,34012188,34433388,34857180,35283564,35712540,36144108,36578268,37015020,37454364,37896300,38340828,38787948,39237660,39689964,40144860,40602348,41062428,41525100,41990364,42458220,42928668,43401708,43877340,44355564,44836380,45319788,45805788,46294380,46785564,47279340,47775708,48274668,48776220,49280364,49787100,50296428,50808348,51322860,51839964,52359660,52881948,53406828,53934300,54464364,54997020,55532268,56070108,56610540,57153564,57699180,58247388,58798188,59351580,59907564,60466140,61027308,61591068,62157420,62726364,63297900,63872028,64448748,65028060,65609964,66194460,66781548,67371228,67963500,68558364,69155820,69755868,70358508,70963740,71571564,72181980,72794988,73410588,74028780,74649564,75272940,75898908,76527468,77158620,77792364,78428700,79067628,79709148,80353260,80999964 mov $1,2 add $1,$0 mul $1,$0 mul $1,1296 add $1,1260
Classes/date/current date/class of (current date).applescript
looking-for-a-job/applescript-examples
1
2127
#!/usr/bin/osascript class of (current date) --> date
source/torrent-shutdown.adb
reznikmm/torrent
4
29501
<reponame>reznikmm/torrent -- Copyright (c) 2020 <NAME> <<EMAIL>> -- -- SPDX-License-Identifier: MIT -- License-Filename: LICENSE ------------------------------------------------------------- package body Torrent.Shutdown is protected body Signal is entry Wait_SIGINT when SIGINT_Triggered is begin SIGINT_Triggered := False; end Wait_SIGINT; procedure Handle is begin SIGINT_Triggered := True; end Handle; end Signal; end Torrent.Shutdown;
Cubical/Algebra/Group/Exact.agda
FernandoLarrain/cubical
1
9484
<filename>Cubical/Algebra/Group/Exact.agda {-# OPTIONS --safe #-} module Cubical.Algebra.Group.Exact where open import Cubical.Foundations.Prelude open import Cubical.Foundations.Equiv open import Cubical.Algebra.Group.Base open import Cubical.Algebra.Group.Morphisms open import Cubical.Algebra.Group.MorphismProperties open import Cubical.HITs.PropositionalTruncation renaming (rec to pRec) open import Cubical.Algebra.Group.GroupPath open import Cubical.Algebra.Group.Instances.Unit -- TODO : Define exact sequences -- (perhaps short, finite, ℕ-indexed and ℤ-indexed) SES→isEquiv : ∀ {ℓ ℓ'} {L R : Group ℓ-zero} → {G : Group ℓ} {H : Group ℓ'} → Unit ≡ L → Unit ≡ R → (lhom : GroupHom L G) (midhom : GroupHom G H) (rhom : GroupHom H R) → ((x : _) → isInKer midhom x → isInIm lhom x) → ((x : _) → isInKer rhom x → isInIm midhom x) → isEquiv (fst midhom) SES→isEquiv {R = R} {G = G} {H = H} = J (λ L _ → Unit ≡ R → (lhom : GroupHom L G) (midhom : GroupHom G H) (rhom : GroupHom H R) → ((x : fst G) → isInKer midhom x → isInIm lhom x) → ((x : fst H) → isInKer rhom x → isInIm midhom x) → isEquiv (fst midhom)) ((J (λ R _ → (lhom : GroupHom Unit G) (midhom : GroupHom G H) (rhom : GroupHom H R) → ((x : fst G) → isInKer midhom x → isInIm lhom x) → ((x : _) → isInKer rhom x → isInIm midhom x) → isEquiv (fst midhom)) main)) where main : (lhom : GroupHom Unit G) (midhom : GroupHom G H) (rhom : GroupHom H Unit) → ((x : fst G) → isInKer midhom x → isInIm lhom x) → ((x : fst H) → isInKer rhom x → isInIm midhom x) → isEquiv (fst midhom) main lhom midhom rhom lexact rexact = BijectionIsoToGroupEquiv {G = G} {H = H} bijIso' .fst .snd where bijIso' : BijectionIso G H BijectionIso.fun bijIso' = midhom BijectionIso.inj bijIso' x inker = pRec (GroupStr.is-set (snd G) _ _) (λ s → sym (snd s) ∙ IsGroupHom.pres1 (snd lhom)) (lexact _ inker) BijectionIso.surj bijIso' x = rexact x refl
SVD2ada/svd/stm32_svd-fdcan.ads
JCGobbi/Nucleo-STM32H743ZI
0
9347
<gh_stars>0 pragma Style_Checks (Off); -- This spec has been automatically generated from STM32H743x.svd pragma Restrictions (No_Elaboration_Code); with HAL; with System; package STM32_SVD.FDCAN is pragma Preelaborate; --------------- -- Registers -- --------------- subtype CREL_DAY_Field is HAL.UInt8; subtype CREL_MON_Field is HAL.UInt8; subtype CREL_YEAR_Field is HAL.UInt4; subtype CREL_SUBSTEP_Field is HAL.UInt4; subtype CREL_STEP_Field is HAL.UInt4; subtype CREL_REL_Field is HAL.UInt4; -- Clock Calibration Unit Core Release Register type CREL_Register is record -- Time Stamp Day DAY : CREL_DAY_Field := 16#0#; -- Time Stamp Month MON : CREL_MON_Field := 16#0#; -- Time Stamp Year YEAR : CREL_YEAR_Field := 16#0#; -- Sub-step of Core Release SUBSTEP : CREL_SUBSTEP_Field := 16#0#; -- Step of Core Release STEP : CREL_STEP_Field := 16#0#; -- Core Release REL : CREL_REL_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for CREL_Register use record DAY at 0 range 0 .. 7; MON at 0 range 8 .. 15; YEAR at 0 range 16 .. 19; SUBSTEP at 0 range 20 .. 23; STEP at 0 range 24 .. 27; REL at 0 range 28 .. 31; end record; subtype CCFG_TQBT_Field is HAL.UInt5; subtype CCFG_OCPM_Field is HAL.UInt8; subtype CCFG_CDIV_Field is HAL.UInt4; -- Calibration Configuration Register type CCFG_Register is record -- Time Quanta per Bit Time TQBT : CCFG_TQBT_Field := 16#0#; -- unspecified Reserved_5_5 : HAL.Bit := 16#0#; -- Bypass Clock Calibration BCC : Boolean := False; -- Calibration Field Length CFL : Boolean := False; -- Oscillator Clock Periods Minimum OCPM : CCFG_OCPM_Field := 16#0#; -- Clock Divider CDIV : CCFG_CDIV_Field := 16#0#; -- unspecified Reserved_20_30 : HAL.UInt11 := 16#0#; -- Software Reset SWR : Boolean := False; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for CCFG_Register use record TQBT at 0 range 0 .. 4; Reserved_5_5 at 0 range 5 .. 5; BCC at 0 range 6 .. 6; CFL at 0 range 7 .. 7; OCPM at 0 range 8 .. 15; CDIV at 0 range 16 .. 19; Reserved_20_30 at 0 range 20 .. 30; SWR at 0 range 31 .. 31; end record; subtype CSTAT_OCPC_Field is HAL.UInt18; subtype CSTAT_TQC_Field is HAL.UInt11; subtype CSTAT_CALS_Field is HAL.UInt2; -- Calibration Status Register type CSTAT_Register is record -- Oscillator Clock Period Counter OCPC : CSTAT_OCPC_Field := 16#0#; -- Time Quanta Counter TQC : CSTAT_TQC_Field := 16#0#; -- unspecified Reserved_29_29 : HAL.Bit := 16#0#; -- Calibration State CALS : CSTAT_CALS_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for CSTAT_Register use record OCPC at 0 range 0 .. 17; TQC at 0 range 18 .. 28; Reserved_29_29 at 0 range 29 .. 29; CALS at 0 range 30 .. 31; end record; subtype CWD_WDC_Field is HAL.UInt16; subtype CWD_WDV_Field is HAL.UInt16; -- Calibration Watchdog Register type CWD_Register is record -- WDC WDC : CWD_WDC_Field := 16#0#; -- WDV WDV : CWD_WDV_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for CWD_Register use record WDC at 0 range 0 .. 15; WDV at 0 range 16 .. 31; end record; -- Clock Calibration Unit Interrupt Register type IR_Register is record -- Calibration Watchdog Event CWE : Boolean := False; -- Calibration State Changed CSC : Boolean := False; -- unspecified Reserved_2_31 : HAL.UInt30 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for IR_Register use record CWE at 0 range 0 .. 0; CSC at 0 range 1 .. 1; Reserved_2_31 at 0 range 2 .. 31; end record; -- Clock Calibration Unit Interrupt Enable Register type IE_Register is record -- Calibration Watchdog Event Enable CWEE : Boolean := False; -- Calibration State Changed Enable CSCE : Boolean := False; -- unspecified Reserved_2_31 : HAL.UInt30 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for IE_Register use record CWEE at 0 range 0 .. 0; CSCE at 0 range 1 .. 1; Reserved_2_31 at 0 range 2 .. 31; end record; subtype FDCAN_CREL_DAY_Field is HAL.UInt8; subtype FDCAN_CREL_MON_Field is HAL.UInt8; subtype FDCAN_CREL_YEAR_Field is HAL.UInt4; subtype FDCAN_CREL_SUBSTEP_Field is HAL.UInt4; subtype FDCAN_CREL_STEP_Field is HAL.UInt4; subtype FDCAN_CREL_REL_Field is HAL.UInt4; -- FDCAN Core Release Register type FDCAN_CREL_Register is record -- Read-only. Timestamp Day DAY : FDCAN_CREL_DAY_Field; -- Read-only. Timestamp Month MON : FDCAN_CREL_MON_Field; -- Read-only. Timestamp Year YEAR : FDCAN_CREL_YEAR_Field; -- Read-only. Sub-step of Core release SUBSTEP : FDCAN_CREL_SUBSTEP_Field; -- Read-only. Step of Core release STEP : FDCAN_CREL_STEP_Field; -- Read-only. Core release REL : FDCAN_CREL_REL_Field; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_CREL_Register use record DAY at 0 range 0 .. 7; MON at 0 range 8 .. 15; YEAR at 0 range 16 .. 19; SUBSTEP at 0 range 20 .. 23; STEP at 0 range 24 .. 27; REL at 0 range 28 .. 31; end record; subtype FDCAN_DBTP_DSJW_Field is HAL.UInt4; subtype FDCAN_DBTP_DTSEG2_Field is HAL.UInt4; subtype FDCAN_DBTP_DTSEG1_Field is HAL.UInt5; subtype FDCAN_DBTP_DBRP_Field is HAL.UInt5; -- FDCAN Data Bit Timing and Prescaler Register type FDCAN_DBTP_Register is record -- Read-only. Synchronization Jump Width DSJW : FDCAN_DBTP_DSJW_Field; -- Read-only. Data time segment after sample point DTSEG2 : FDCAN_DBTP_DTSEG2_Field; -- Read-only. Data time segment after sample point DTSEG1 : FDCAN_DBTP_DTSEG1_Field; -- unspecified Reserved_13_15 : HAL.UInt3; -- Read-only. Data BIt Rate Prescaler DBRP : FDCAN_DBTP_DBRP_Field; -- unspecified Reserved_21_22 : HAL.UInt2; -- Read-only. Transceiver Delay Compensation TDC : Boolean; -- unspecified Reserved_24_31 : HAL.UInt8; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_DBTP_Register use record DSJW at 0 range 0 .. 3; DTSEG2 at 0 range 4 .. 7; DTSEG1 at 0 range 8 .. 12; Reserved_13_15 at 0 range 13 .. 15; DBRP at 0 range 16 .. 20; Reserved_21_22 at 0 range 21 .. 22; TDC at 0 range 23 .. 23; Reserved_24_31 at 0 range 24 .. 31; end record; subtype FDCAN_TEST_TX_Field is HAL.UInt2; -- FDCAN Test Register type FDCAN_TEST_Register is record -- unspecified Reserved_0_3 : HAL.UInt4; -- Read-only. Loop Back mode LBCK : Boolean; -- Read-only. Loop Back mode TX : FDCAN_TEST_TX_Field; -- Read-only. Control of Transmit Pin RX : Boolean; -- unspecified Reserved_8_31 : HAL.UInt24; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TEST_Register use record Reserved_0_3 at 0 range 0 .. 3; LBCK at 0 range 4 .. 4; TX at 0 range 5 .. 6; RX at 0 range 7 .. 7; Reserved_8_31 at 0 range 8 .. 31; end record; subtype FDCAN_RWD_WDC_Field is HAL.UInt8; subtype FDCAN_RWD_WDV_Field is HAL.UInt8; -- FDCAN RAM Watchdog Register type FDCAN_RWD_Register is record -- Read-only. Watchdog configuration WDC : FDCAN_RWD_WDC_Field; -- Read-only. Watchdog value WDV : FDCAN_RWD_WDV_Field; -- unspecified Reserved_16_31 : HAL.UInt16; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RWD_Register use record WDC at 0 range 0 .. 7; WDV at 0 range 8 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; -- FDCAN CC Control Register type FDCAN_CCCR_Register is record -- Initialization INIT : Boolean := False; -- Configuration Change Enable CCE : Boolean := False; -- ASM Restricted Operation Mode ASM : Boolean := False; -- Clock Stop Acknowledge CSA : Boolean := False; -- Clock Stop Request CSR : Boolean := False; -- Bus Monitoring Mode MON : Boolean := False; -- Disable Automatic Retransmission DAR : Boolean := False; -- Test Mode Enable TEST : Boolean := False; -- FD Operation Enable FDOE : Boolean := False; -- FDCAN Bit Rate Switching BSE : Boolean := False; -- unspecified Reserved_10_11 : HAL.UInt2 := 16#0#; -- Protocol Exception Handling Disable PXHD : Boolean := False; -- Edge Filtering during Bus Integration EFBI : Boolean := False; -- TXP TXP : Boolean := False; -- Non ISO Operation NISO : Boolean := False; -- unspecified Reserved_16_31 : HAL.UInt16 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_CCCR_Register use record INIT at 0 range 0 .. 0; CCE at 0 range 1 .. 1; ASM at 0 range 2 .. 2; CSA at 0 range 3 .. 3; CSR at 0 range 4 .. 4; MON at 0 range 5 .. 5; DAR at 0 range 6 .. 6; TEST at 0 range 7 .. 7; FDOE at 0 range 8 .. 8; BSE at 0 range 9 .. 9; Reserved_10_11 at 0 range 10 .. 11; PXHD at 0 range 12 .. 12; EFBI at 0 range 13 .. 13; TXP at 0 range 14 .. 14; NISO at 0 range 15 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; subtype FDCAN_NBTP_TSEG2_Field is HAL.UInt7; subtype FDCAN_NBTP_NTSEG1_Field is HAL.UInt8; subtype FDCAN_NBTP_NBRP_Field is HAL.UInt9; subtype FDCAN_NBTP_NSJW_Field is HAL.UInt7; -- FDCAN Nominal Bit Timing and Prescaler Register type FDCAN_NBTP_Register is record -- Nominal Time segment after sample point TSEG2 : FDCAN_NBTP_TSEG2_Field := 16#0#; -- unspecified Reserved_7_7 : HAL.Bit := 16#0#; -- Nominal Time segment before sample point NTSEG1 : FDCAN_NBTP_NTSEG1_Field := 16#0#; -- Bit Rate Prescaler NBRP : FDCAN_NBTP_NBRP_Field := 16#0#; -- NSJW: Nominal (Re)Synchronization Jump Width NSJW : FDCAN_NBTP_NSJW_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_NBTP_Register use record TSEG2 at 0 range 0 .. 6; Reserved_7_7 at 0 range 7 .. 7; NTSEG1 at 0 range 8 .. 15; NBRP at 0 range 16 .. 24; NSJW at 0 range 25 .. 31; end record; subtype FDCAN_TSCC_TSS_Field is HAL.UInt2; subtype FDCAN_TSCC_TCP_Field is HAL.UInt4; -- FDCAN Timestamp Counter Configuration Register type FDCAN_TSCC_Register is record -- Timestamp Select TSS : FDCAN_TSCC_TSS_Field := 16#0#; -- unspecified Reserved_2_15 : HAL.UInt14 := 16#0#; -- Timestamp Counter Prescaler TCP : FDCAN_TSCC_TCP_Field := 16#0#; -- unspecified Reserved_20_31 : HAL.UInt12 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TSCC_Register use record TSS at 0 range 0 .. 1; Reserved_2_15 at 0 range 2 .. 15; TCP at 0 range 16 .. 19; Reserved_20_31 at 0 range 20 .. 31; end record; subtype FDCAN_TSCV_TSC_Field is HAL.UInt16; -- FDCAN Timestamp Counter Value Register type FDCAN_TSCV_Register is record -- Timestamp Counter TSC : FDCAN_TSCV_TSC_Field := 16#0#; -- unspecified Reserved_16_31 : HAL.UInt16 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TSCV_Register use record TSC at 0 range 0 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; subtype FDCAN_TOCC_TOS_Field is HAL.UInt2; subtype FDCAN_TOCC_TOP_Field is HAL.UInt16; -- FDCAN Timeout Counter Configuration Register type FDCAN_TOCC_Register is record -- Enable Timeout Counter ETOC : Boolean := False; -- Timeout Select TOS : FDCAN_TOCC_TOS_Field := 16#0#; -- unspecified Reserved_3_15 : HAL.UInt13 := 16#0#; -- Timeout Period TOP : FDCAN_TOCC_TOP_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TOCC_Register use record ETOC at 0 range 0 .. 0; TOS at 0 range 1 .. 2; Reserved_3_15 at 0 range 3 .. 15; TOP at 0 range 16 .. 31; end record; subtype FDCAN_TOCV_TOC_Field is HAL.UInt16; -- FDCAN Timeout Counter Value Register type FDCAN_TOCV_Register is record -- Timeout Counter TOC : FDCAN_TOCV_TOC_Field := 16#0#; -- unspecified Reserved_16_31 : HAL.UInt16 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TOCV_Register use record TOC at 0 range 0 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; subtype FDCAN_ECR_TEC_Field is HAL.UInt8; subtype FDCAN_ECR_TREC_Field is HAL.UInt7; subtype FDCAN_ECR_CEL_Field is HAL.UInt8; -- FDCAN Error Counter Register type FDCAN_ECR_Register is record -- Transmit Error Counter TEC : FDCAN_ECR_TEC_Field := 16#0#; -- Receive Error Counter TREC : FDCAN_ECR_TREC_Field := 16#0#; -- Receive Error Passive RP : Boolean := False; -- AN Error Logging CEL : FDCAN_ECR_CEL_Field := 16#0#; -- unspecified Reserved_24_31 : HAL.UInt8 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_ECR_Register use record TEC at 0 range 0 .. 7; TREC at 0 range 8 .. 14; RP at 0 range 15 .. 15; CEL at 0 range 16 .. 23; Reserved_24_31 at 0 range 24 .. 31; end record; subtype FDCAN_PSR_LEC_Field is HAL.UInt3; subtype FDCAN_PSR_ACT_Field is HAL.UInt2; subtype FDCAN_PSR_DLEC_Field is HAL.UInt3; subtype FDCAN_PSR_TDCV_Field is HAL.UInt7; -- FDCAN Protocol Status Register type FDCAN_PSR_Register is record -- Last Error Code LEC : FDCAN_PSR_LEC_Field := 16#0#; -- Activity ACT : FDCAN_PSR_ACT_Field := 16#0#; -- Error Passive EP : Boolean := False; -- Warning Status EW : Boolean := False; -- Bus_Off Status BO : Boolean := False; -- Data Last Error Code DLEC : FDCAN_PSR_DLEC_Field := 16#0#; -- ESI flag of last received FDCAN Message RESI : Boolean := False; -- BRS flag of last received FDCAN Message RBRS : Boolean := False; -- Received FDCAN Message REDL : Boolean := False; -- Protocol Exception Event PXE : Boolean := False; -- unspecified Reserved_15_15 : HAL.Bit := 16#0#; -- Transmitter Delay Compensation Value TDCV : FDCAN_PSR_TDCV_Field := 16#0#; -- unspecified Reserved_23_31 : HAL.UInt9 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_PSR_Register use record LEC at 0 range 0 .. 2; ACT at 0 range 3 .. 4; EP at 0 range 5 .. 5; EW at 0 range 6 .. 6; BO at 0 range 7 .. 7; DLEC at 0 range 8 .. 10; RESI at 0 range 11 .. 11; RBRS at 0 range 12 .. 12; REDL at 0 range 13 .. 13; PXE at 0 range 14 .. 14; Reserved_15_15 at 0 range 15 .. 15; TDCV at 0 range 16 .. 22; Reserved_23_31 at 0 range 23 .. 31; end record; subtype FDCAN_TDCR_TDCF_Field is HAL.UInt7; subtype FDCAN_TDCR_TDCO_Field is HAL.UInt7; -- FDCAN Transmitter Delay Compensation Register type FDCAN_TDCR_Register is record -- Read-only. Transmitter Delay Compensation Filter Window Length TDCF : FDCAN_TDCR_TDCF_Field; -- unspecified Reserved_7_7 : HAL.Bit; -- Read-only. Transmitter Delay Compensation Offset TDCO : FDCAN_TDCR_TDCO_Field; -- unspecified Reserved_15_31 : HAL.UInt17; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TDCR_Register use record TDCF at 0 range 0 .. 6; Reserved_7_7 at 0 range 7 .. 7; TDCO at 0 range 8 .. 14; Reserved_15_31 at 0 range 15 .. 31; end record; -- FDCAN Interrupt Register type FDCAN_IR_Register is record -- Read-only. Rx FIFO 0 New Message RF0N : Boolean; -- Read-only. Rx FIFO 0 Full RF0W : Boolean; -- Read-only. Rx FIFO 0 Full RF0F : Boolean; -- Read-only. Rx FIFO 0 Message Lost RF0L : Boolean; -- Read-only. Rx FIFO 1 New Message RF1N : Boolean; -- Read-only. Rx FIFO 1 Watermark Reached RF1W : Boolean; -- Read-only. Rx FIFO 1 Watermark Reached RF1F : Boolean; -- Read-only. Rx FIFO 1 Message Lost RF1L : Boolean; -- Read-only. High Priority Message HPM : Boolean; -- Read-only. Transmission Completed TC : Boolean; -- Read-only. Transmission Cancellation Finished TCF : Boolean; -- Read-only. Tx FIFO Empty TEF : Boolean; -- Read-only. Tx Event FIFO New Entry TEFN : Boolean; -- Read-only. Tx Event FIFO Watermark Reached TEFW : Boolean; -- Read-only. Tx Event FIFO Full TEFF : Boolean; -- Read-only. Tx Event FIFO Element Lost TEFL : Boolean; -- Read-only. Timestamp Wraparound TSW : Boolean; -- Read-only. Message RAM Access Failure MRAF : Boolean; -- Read-only. Timeout Occurred TOO : Boolean; -- Read-only. Message stored to Dedicated Rx Buffer DRX : Boolean; -- unspecified Reserved_20_21 : HAL.UInt2; -- Read-only. Error Logging Overflow ELO : Boolean; -- Read-only. Error Passive EP : Boolean; -- Read-only. Warning Status EW : Boolean; -- Read-only. Bus_Off Status BO : Boolean; -- Read-only. Watchdog Interrupt WDI : Boolean; -- Read-only. Protocol Error in Arbitration Phase (Nominal Bit Time is -- used) PEA : Boolean; -- Read-only. Protocol Error in Data Phase (Data Bit Time is used) PED : Boolean; -- Read-only. Access to Reserved Address ARA : Boolean; -- unspecified Reserved_30_31 : HAL.UInt2; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_IR_Register use record RF0N at 0 range 0 .. 0; RF0W at 0 range 1 .. 1; RF0F at 0 range 2 .. 2; RF0L at 0 range 3 .. 3; RF1N at 0 range 4 .. 4; RF1W at 0 range 5 .. 5; RF1F at 0 range 6 .. 6; RF1L at 0 range 7 .. 7; HPM at 0 range 8 .. 8; TC at 0 range 9 .. 9; TCF at 0 range 10 .. 10; TEF at 0 range 11 .. 11; TEFN at 0 range 12 .. 12; TEFW at 0 range 13 .. 13; TEFF at 0 range 14 .. 14; TEFL at 0 range 15 .. 15; TSW at 0 range 16 .. 16; MRAF at 0 range 17 .. 17; TOO at 0 range 18 .. 18; DRX at 0 range 19 .. 19; Reserved_20_21 at 0 range 20 .. 21; ELO at 0 range 22 .. 22; EP at 0 range 23 .. 23; EW at 0 range 24 .. 24; BO at 0 range 25 .. 25; WDI at 0 range 26 .. 26; PEA at 0 range 27 .. 27; PED at 0 range 28 .. 28; ARA at 0 range 29 .. 29; Reserved_30_31 at 0 range 30 .. 31; end record; -- FDCAN Interrupt Enable Register type FDCAN_IE_Register is record -- Read-only. Rx FIFO 0 New Message Enable RF0NE : Boolean; -- Read-only. Rx FIFO 0 Full Enable RF0WE : Boolean; -- Read-only. Rx FIFO 0 Full Enable RF0FE : Boolean; -- Read-only. Rx FIFO 0 Message Lost Enable RF0LE : Boolean; -- Read-only. Rx FIFO 1 New Message Enable RF1NE : Boolean; -- Read-only. Rx FIFO 1 Watermark Reached Enable RF1WE : Boolean; -- Read-only. Rx FIFO 1 Watermark Reached Enable RF1FE : Boolean; -- Read-only. Rx FIFO 1 Message Lost Enable RF1LE : Boolean; -- Read-only. High Priority Message Enable HPME : Boolean; -- Read-only. Transmission Completed Enable TCE : Boolean; -- Read-only. Transmission Cancellation Finished Enable TCFE : Boolean; -- Read-only. Tx FIFO Empty Enable TEFE : Boolean; -- Read-only. Tx Event FIFO New Entry Enable TEFNE : Boolean; -- Read-only. Tx Event FIFO Watermark Reached Enable TEFWE : Boolean; -- Read-only. Tx Event FIFO Full Enable TEFFE : Boolean; -- Read-only. Tx Event FIFO Element Lost Enable TEFLE : Boolean; -- Read-only. Timestamp Wraparound Enable TSWE : Boolean; -- Read-only. Message RAM Access Failure Enable MRAFE : Boolean; -- Read-only. Timeout Occurred Enable TOOE : Boolean; -- Read-only. Message stored to Dedicated Rx Buffer Enable DRXE : Boolean; -- Read-only. Bit Error Corrected Interrupt Enable BECE : Boolean; -- Read-only. Bit Error Uncorrected Interrupt Enable BEUE : Boolean; -- Read-only. Error Logging Overflow Enable ELOE : Boolean; -- Read-only. Error Passive Enable EPE : Boolean; -- Read-only. Warning Status Enable EWE : Boolean; -- Read-only. Bus_Off Status Enable BOE : Boolean; -- Read-only. Watchdog Interrupt Enable WDIE : Boolean; -- Read-only. Protocol Error in Arbitration Phase Enable PEAE : Boolean; -- Read-only. Protocol Error in Data Phase Enable PEDE : Boolean; -- Read-only. Access to Reserved Address Enable ARAE : Boolean; -- unspecified Reserved_30_31 : HAL.UInt2; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_IE_Register use record RF0NE at 0 range 0 .. 0; RF0WE at 0 range 1 .. 1; RF0FE at 0 range 2 .. 2; RF0LE at 0 range 3 .. 3; RF1NE at 0 range 4 .. 4; RF1WE at 0 range 5 .. 5; RF1FE at 0 range 6 .. 6; RF1LE at 0 range 7 .. 7; HPME at 0 range 8 .. 8; TCE at 0 range 9 .. 9; TCFE at 0 range 10 .. 10; TEFE at 0 range 11 .. 11; TEFNE at 0 range 12 .. 12; TEFWE at 0 range 13 .. 13; TEFFE at 0 range 14 .. 14; TEFLE at 0 range 15 .. 15; TSWE at 0 range 16 .. 16; MRAFE at 0 range 17 .. 17; TOOE at 0 range 18 .. 18; DRXE at 0 range 19 .. 19; BECE at 0 range 20 .. 20; BEUE at 0 range 21 .. 21; ELOE at 0 range 22 .. 22; EPE at 0 range 23 .. 23; EWE at 0 range 24 .. 24; BOE at 0 range 25 .. 25; WDIE at 0 range 26 .. 26; PEAE at 0 range 27 .. 27; PEDE at 0 range 28 .. 28; ARAE at 0 range 29 .. 29; Reserved_30_31 at 0 range 30 .. 31; end record; -- FDCAN Interrupt Line Select Register type FDCAN_ILS_Register is record -- Read-only. Rx FIFO 0 New Message Interrupt Line RF0NL : Boolean; -- Read-only. Rx FIFO 0 Watermark Reached Interrupt Line RF0WL : Boolean; -- Read-only. Rx FIFO 0 Full Interrupt Line RF0FL : Boolean; -- Read-only. Rx FIFO 0 Message Lost Interrupt Line RF0LL : Boolean; -- Read-only. Rx FIFO 1 New Message Interrupt Line RF1NL : Boolean; -- Read-only. Rx FIFO 1 Watermark Reached Interrupt Line RF1WL : Boolean; -- Read-only. Rx FIFO 1 Full Interrupt Line RF1FL : Boolean; -- Read-only. Rx FIFO 1 Message Lost Interrupt Line RF1LL : Boolean; -- Read-only. High Priority Message Interrupt Line HPML : Boolean; -- Read-only. Transmission Completed Interrupt Line TCL : Boolean; -- Read-only. Transmission Cancellation Finished Interrupt Line TCFL : Boolean; -- Read-only. Tx FIFO Empty Interrupt Line TEFL : Boolean; -- Read-only. Tx Event FIFO New Entry Interrupt Line TEFNL : Boolean; -- Read-only. Tx Event FIFO Watermark Reached Interrupt Line TEFWL : Boolean; -- Read-only. Tx Event FIFO Full Interrupt Line TEFFL : Boolean; -- Read-only. Tx Event FIFO Element Lost Interrupt Line TEFLL : Boolean; -- Read-only. Timestamp Wraparound Interrupt Line TSWL : Boolean; -- Read-only. Message RAM Access Failure Interrupt Line MRAFL : Boolean; -- Read-only. Timeout Occurred Interrupt Line TOOL : Boolean; -- Read-only. Message stored to Dedicated Rx Buffer Interrupt Line DRXL : Boolean; -- Read-only. Bit Error Corrected Interrupt Line BECL : Boolean; -- Read-only. Bit Error Uncorrected Interrupt Line BEUL : Boolean; -- Read-only. Error Logging Overflow Interrupt Line ELOL : Boolean; -- Read-only. Error Passive Interrupt Line EPL : Boolean; -- Read-only. Warning Status Interrupt Line EWL : Boolean; -- Read-only. Bus_Off Status BOL : Boolean; -- Read-only. Watchdog Interrupt Line WDIL : Boolean; -- Read-only. Protocol Error in Arbitration Phase Line PEAL : Boolean; -- Read-only. Protocol Error in Data Phase Line PEDL : Boolean; -- Read-only. Access to Reserved Address Line ARAL : Boolean; -- unspecified Reserved_30_31 : HAL.UInt2; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_ILS_Register use record RF0NL at 0 range 0 .. 0; RF0WL at 0 range 1 .. 1; RF0FL at 0 range 2 .. 2; RF0LL at 0 range 3 .. 3; RF1NL at 0 range 4 .. 4; RF1WL at 0 range 5 .. 5; RF1FL at 0 range 6 .. 6; RF1LL at 0 range 7 .. 7; HPML at 0 range 8 .. 8; TCL at 0 range 9 .. 9; TCFL at 0 range 10 .. 10; TEFL at 0 range 11 .. 11; TEFNL at 0 range 12 .. 12; TEFWL at 0 range 13 .. 13; TEFFL at 0 range 14 .. 14; TEFLL at 0 range 15 .. 15; TSWL at 0 range 16 .. 16; MRAFL at 0 range 17 .. 17; TOOL at 0 range 18 .. 18; DRXL at 0 range 19 .. 19; BECL at 0 range 20 .. 20; BEUL at 0 range 21 .. 21; ELOL at 0 range 22 .. 22; EPL at 0 range 23 .. 23; EWL at 0 range 24 .. 24; BOL at 0 range 25 .. 25; WDIL at 0 range 26 .. 26; PEAL at 0 range 27 .. 27; PEDL at 0 range 28 .. 28; ARAL at 0 range 29 .. 29; Reserved_30_31 at 0 range 30 .. 31; end record; -- FDCAN_ILE_EINT array type FDCAN_ILE_EINT_Field_Array is array (0 .. 1) of Boolean with Component_Size => 1, Size => 2; -- Type definition for FDCAN_ILE_EINT type FDCAN_ILE_EINT_Field (As_Array : Boolean := False) is record case As_Array is when False => -- EINT as a value Val : HAL.UInt2; when True => -- EINT as an array Arr : FDCAN_ILE_EINT_Field_Array; end case; end record with Unchecked_Union, Size => 2; for FDCAN_ILE_EINT_Field use record Val at 0 range 0 .. 1; Arr at 0 range 0 .. 1; end record; -- FDCAN Interrupt Line Enable Register type FDCAN_ILE_Register is record -- Enable Interrupt Line 0 EINT : FDCAN_ILE_EINT_Field := (As_Array => False, Val => 16#0#); -- unspecified Reserved_2_31 : HAL.UInt30 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_ILE_Register use record EINT at 0 range 0 .. 1; Reserved_2_31 at 0 range 2 .. 31; end record; subtype FDCAN_GFC_ANFE_Field is HAL.UInt2; subtype FDCAN_GFC_ANFS_Field is HAL.UInt2; -- FDCAN Global Filter Configuration Register type FDCAN_GFC_Register is record -- Reject Remote Frames Extended RRFE : Boolean := False; -- Reject Remote Frames Standard RRFS : Boolean := False; -- Accept Non-matching Frames Extended ANFE : FDCAN_GFC_ANFE_Field := 16#0#; -- Accept Non-matching Frames Standard ANFS : FDCAN_GFC_ANFS_Field := 16#0#; -- unspecified Reserved_6_31 : HAL.UInt26 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_GFC_Register use record RRFE at 0 range 0 .. 0; RRFS at 0 range 1 .. 1; ANFE at 0 range 2 .. 3; ANFS at 0 range 4 .. 5; Reserved_6_31 at 0 range 6 .. 31; end record; subtype FDCAN_SIDFC_FLSSA_Field is HAL.UInt14; subtype FDCAN_SIDFC_LSS_Field is HAL.UInt8; -- FDCAN Standard ID Filter Configuration Register type FDCAN_SIDFC_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Filter List Standard Start Address FLSSA : FDCAN_SIDFC_FLSSA_Field := 16#0#; -- List Size Standard LSS : FDCAN_SIDFC_LSS_Field := 16#0#; -- unspecified Reserved_24_31 : HAL.UInt8 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_SIDFC_Register use record Reserved_0_1 at 0 range 0 .. 1; FLSSA at 0 range 2 .. 15; LSS at 0 range 16 .. 23; Reserved_24_31 at 0 range 24 .. 31; end record; subtype FDCAN_XIDFC_FLESA_Field is HAL.UInt14; subtype FDCAN_XIDFC_LSE_Field is HAL.UInt8; -- FDCAN Extended ID Filter Configuration Register type FDCAN_XIDFC_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Filter List Standard Start Address FLESA : FDCAN_XIDFC_FLESA_Field := 16#0#; -- List Size Extended LSE : FDCAN_XIDFC_LSE_Field := 16#0#; -- unspecified Reserved_24_31 : HAL.UInt8 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_XIDFC_Register use record Reserved_0_1 at 0 range 0 .. 1; FLESA at 0 range 2 .. 15; LSE at 0 range 16 .. 23; Reserved_24_31 at 0 range 24 .. 31; end record; subtype FDCAN_XIDAM_EIDM_Field is HAL.UInt29; -- FDCAN Extended ID and Mask Register type FDCAN_XIDAM_Register is record -- Extended ID Mask EIDM : FDCAN_XIDAM_EIDM_Field := 16#0#; -- unspecified Reserved_29_31 : HAL.UInt3 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_XIDAM_Register use record EIDM at 0 range 0 .. 28; Reserved_29_31 at 0 range 29 .. 31; end record; subtype FDCAN_HPMS_BIDX_Field is HAL.UInt6; subtype FDCAN_HPMS_MSI_Field is HAL.UInt2; subtype FDCAN_HPMS_FIDX_Field is HAL.UInt7; -- FDCAN High Priority Message Status Register type FDCAN_HPMS_Register is record -- Read-only. Buffer Index BIDX : FDCAN_HPMS_BIDX_Field; -- Read-only. Message Storage Indicator MSI : FDCAN_HPMS_MSI_Field; -- Read-only. Filter Index FIDX : FDCAN_HPMS_FIDX_Field; -- Read-only. Filter List FLST : Boolean; -- unspecified Reserved_16_31 : HAL.UInt16; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_HPMS_Register use record BIDX at 0 range 0 .. 5; MSI at 0 range 6 .. 7; FIDX at 0 range 8 .. 14; FLST at 0 range 15 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; -- FDCAN_NDAT1_ND array type FDCAN_NDAT1_ND_Field_Array is array (0 .. 31) of Boolean with Component_Size => 1, Size => 32; -- FDCAN New Data 1 Register type FDCAN_NDAT1_Register (As_Array : Boolean := False) is record case As_Array is when False => -- ND as a value Val : HAL.UInt32; when True => -- ND as an array Arr : FDCAN_NDAT1_ND_Field_Array; end case; end record with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_NDAT1_Register use record Val at 0 range 0 .. 31; Arr at 0 range 0 .. 31; end record; -- FDCAN_NDAT2_ND array type FDCAN_NDAT2_ND_Field_Array is array (32 .. 63) of Boolean with Component_Size => 1, Size => 32; -- FDCAN New Data 2 Register type FDCAN_NDAT2_Register (As_Array : Boolean := False) is record case As_Array is when False => -- ND as a value Val : HAL.UInt32; when True => -- ND as an array Arr : FDCAN_NDAT2_ND_Field_Array; end case; end record with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_NDAT2_Register use record Val at 0 range 0 .. 31; Arr at 0 range 0 .. 31; end record; subtype FDCAN_RXF0C_F0SA_Field is HAL.UInt14; subtype FDCAN_RXF0C_F0S_Field is HAL.UInt8; subtype FDCAN_RXF0C_F0WM_Field is HAL.UInt8; -- FDCAN Rx FIFO 0 Configuration Register type FDCAN_RXF0C_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Rx FIFO 0 Start Address F0SA : FDCAN_RXF0C_F0SA_Field := 16#0#; -- Rx FIFO 0 Size F0S : FDCAN_RXF0C_F0S_Field := 16#0#; -- FIFO 0 Watermark F0WM : FDCAN_RXF0C_F0WM_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXF0C_Register use record Reserved_0_1 at 0 range 0 .. 1; F0SA at 0 range 2 .. 15; F0S at 0 range 16 .. 23; F0WM at 0 range 24 .. 31; end record; subtype FDCAN_RXF0S_F0FL_Field is HAL.UInt7; subtype FDCAN_RXF0S_F0G_Field is HAL.UInt6; subtype FDCAN_RXF0S_F0P_Field is HAL.UInt6; -- FDCAN Rx FIFO 0 Status Register type FDCAN_RXF0S_Register is record -- Rx FIFO 0 Fill Level F0FL : FDCAN_RXF0S_F0FL_Field := 16#0#; -- unspecified Reserved_7_7 : HAL.Bit := 16#0#; -- Rx FIFO 0 Get Index F0G : FDCAN_RXF0S_F0G_Field := 16#0#; -- unspecified Reserved_14_15 : HAL.UInt2 := 16#0#; -- Rx FIFO 0 Put Index F0P : FDCAN_RXF0S_F0P_Field := 16#0#; -- unspecified Reserved_22_23 : HAL.UInt2 := 16#0#; -- Rx FIFO 0 Full F0F : Boolean := False; -- Rx FIFO 0 Message Lost RF0L : Boolean := False; -- unspecified Reserved_26_31 : HAL.UInt6 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXF0S_Register use record F0FL at 0 range 0 .. 6; Reserved_7_7 at 0 range 7 .. 7; F0G at 0 range 8 .. 13; Reserved_14_15 at 0 range 14 .. 15; F0P at 0 range 16 .. 21; Reserved_22_23 at 0 range 22 .. 23; F0F at 0 range 24 .. 24; RF0L at 0 range 25 .. 25; Reserved_26_31 at 0 range 26 .. 31; end record; subtype FDCAN_RXF0A_FA01_Field is HAL.UInt6; -- CAN Rx FIFO 0 Acknowledge Register type FDCAN_RXF0A_Register is record -- Rx FIFO 0 Acknowledge Index FA01 : FDCAN_RXF0A_FA01_Field := 16#0#; -- unspecified Reserved_6_31 : HAL.UInt26 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXF0A_Register use record FA01 at 0 range 0 .. 5; Reserved_6_31 at 0 range 6 .. 31; end record; subtype FDCAN_RXBC_RBSA_Field is HAL.UInt14; -- FDCAN Rx Buffer Configuration Register type FDCAN_RXBC_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Rx Buffer Start Address RBSA : FDCAN_RXBC_RBSA_Field := 16#0#; -- unspecified Reserved_16_31 : HAL.UInt16 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXBC_Register use record Reserved_0_1 at 0 range 0 .. 1; RBSA at 0 range 2 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; subtype FDCAN_RXF1C_F1SA_Field is HAL.UInt14; subtype FDCAN_RXF1C_F1S_Field is HAL.UInt7; subtype FDCAN_RXF1C_F1WM_Field is HAL.UInt7; -- FDCAN Rx FIFO 1 Configuration Register type FDCAN_RXF1C_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Rx FIFO 1 Start Address F1SA : FDCAN_RXF1C_F1SA_Field := 16#0#; -- Rx FIFO 1 Size F1S : FDCAN_RXF1C_F1S_Field := 16#0#; -- unspecified Reserved_23_23 : HAL.Bit := 16#0#; -- Rx FIFO 1 Watermark F1WM : FDCAN_RXF1C_F1WM_Field := 16#0#; -- unspecified Reserved_31_31 : HAL.Bit := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXF1C_Register use record Reserved_0_1 at 0 range 0 .. 1; F1SA at 0 range 2 .. 15; F1S at 0 range 16 .. 22; Reserved_23_23 at 0 range 23 .. 23; F1WM at 0 range 24 .. 30; Reserved_31_31 at 0 range 31 .. 31; end record; subtype FDCAN_RXF1S_F1FL_Field is HAL.UInt7; subtype FDCAN_RXF1S_F1GI_Field is HAL.UInt7; subtype FDCAN_RXF1S_F1PI_Field is HAL.UInt7; subtype FDCAN_RXF1S_DMS_Field is HAL.UInt2; -- FDCAN Rx FIFO 1 Status Register type FDCAN_RXF1S_Register is record -- Rx FIFO 1 Fill Level F1FL : FDCAN_RXF1S_F1FL_Field := 16#0#; -- unspecified Reserved_7_7 : HAL.Bit := 16#0#; -- Rx FIFO 1 Get Index F1GI : FDCAN_RXF1S_F1GI_Field := 16#0#; -- unspecified Reserved_15_15 : HAL.Bit := 16#0#; -- Rx FIFO 1 Put Index F1PI : FDCAN_RXF1S_F1PI_Field := 16#0#; -- unspecified Reserved_23_23 : HAL.Bit := 16#0#; -- Rx FIFO 1 Full F1F : Boolean := False; -- Rx FIFO 1 Message Lost RF1L : Boolean := False; -- unspecified Reserved_26_29 : HAL.UInt4 := 16#0#; -- Debug Message Status DMS : FDCAN_RXF1S_DMS_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXF1S_Register use record F1FL at 0 range 0 .. 6; Reserved_7_7 at 0 range 7 .. 7; F1GI at 0 range 8 .. 14; Reserved_15_15 at 0 range 15 .. 15; F1PI at 0 range 16 .. 22; Reserved_23_23 at 0 range 23 .. 23; F1F at 0 range 24 .. 24; RF1L at 0 range 25 .. 25; Reserved_26_29 at 0 range 26 .. 29; DMS at 0 range 30 .. 31; end record; subtype FDCAN_RXF1A_F1AI_Field is HAL.UInt6; -- FDCAN Rx FIFO 1 Acknowledge Register type FDCAN_RXF1A_Register is record -- Rx FIFO 1 Acknowledge Index F1AI : FDCAN_RXF1A_F1AI_Field := 16#0#; -- unspecified Reserved_6_31 : HAL.UInt26 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXF1A_Register use record F1AI at 0 range 0 .. 5; Reserved_6_31 at 0 range 6 .. 31; end record; subtype FDCAN_RXESC_F0DS_Field is HAL.UInt3; subtype FDCAN_RXESC_F1DS_Field is HAL.UInt3; subtype FDCAN_RXESC_RBDS_Field is HAL.UInt3; -- FDCAN Rx Buffer Element Size Configuration Register type FDCAN_RXESC_Register is record -- Rx FIFO 1 Data Field Size: F0DS : FDCAN_RXESC_F0DS_Field := 16#0#; -- unspecified Reserved_3_3 : HAL.Bit := 16#0#; -- Rx FIFO 0 Data Field Size: F1DS : FDCAN_RXESC_F1DS_Field := 16#0#; -- unspecified Reserved_7_7 : HAL.Bit := 16#0#; -- Rx Buffer Data Field Size: RBDS : FDCAN_RXESC_RBDS_Field := 16#0#; -- unspecified Reserved_11_31 : HAL.UInt21 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_RXESC_Register use record F0DS at 0 range 0 .. 2; Reserved_3_3 at 0 range 3 .. 3; F1DS at 0 range 4 .. 6; Reserved_7_7 at 0 range 7 .. 7; RBDS at 0 range 8 .. 10; Reserved_11_31 at 0 range 11 .. 31; end record; subtype FDCAN_TXBC_TBSA_Field is HAL.UInt14; subtype FDCAN_TXBC_NDTB_Field is HAL.UInt6; subtype FDCAN_TXBC_TFQS_Field is HAL.UInt6; -- FDCAN Tx Buffer Configuration Register type FDCAN_TXBC_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Tx Buffers Start Address TBSA : FDCAN_TXBC_TBSA_Field := 16#0#; -- Number of Dedicated Transmit Buffers NDTB : FDCAN_TXBC_NDTB_Field := 16#0#; -- unspecified Reserved_22_23 : HAL.UInt2 := 16#0#; -- Transmit FIFO/Queue Size TFQS : FDCAN_TXBC_TFQS_Field := 16#0#; -- Tx FIFO/Queue Mode TFQM : Boolean := False; -- unspecified Reserved_31_31 : HAL.Bit := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TXBC_Register use record Reserved_0_1 at 0 range 0 .. 1; TBSA at 0 range 2 .. 15; NDTB at 0 range 16 .. 21; Reserved_22_23 at 0 range 22 .. 23; TFQS at 0 range 24 .. 29; TFQM at 0 range 30 .. 30; Reserved_31_31 at 0 range 31 .. 31; end record; subtype FDCAN_TXFQS_TFFL_Field is HAL.UInt6; subtype FDCAN_TXFQS_TFGI_Field is HAL.UInt5; subtype FDCAN_TXFQS_TFQPI_Field is HAL.UInt5; -- FDCAN Tx FIFO/Queue Status Register type FDCAN_TXFQS_Register is record -- Read-only. Tx FIFO Free Level TFFL : FDCAN_TXFQS_TFFL_Field; -- unspecified Reserved_6_7 : HAL.UInt2; -- Read-only. TFGI TFGI : FDCAN_TXFQS_TFGI_Field; -- unspecified Reserved_13_15 : HAL.UInt3; -- Read-only. Tx FIFO/Queue Put Index TFQPI : FDCAN_TXFQS_TFQPI_Field; -- Read-only. Tx FIFO/Queue Full TFQF : Boolean; -- unspecified Reserved_22_31 : HAL.UInt10; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TXFQS_Register use record TFFL at 0 range 0 .. 5; Reserved_6_7 at 0 range 6 .. 7; TFGI at 0 range 8 .. 12; Reserved_13_15 at 0 range 13 .. 15; TFQPI at 0 range 16 .. 20; TFQF at 0 range 21 .. 21; Reserved_22_31 at 0 range 22 .. 31; end record; subtype FDCAN_TXESC_TBDS_Field is HAL.UInt3; -- FDCAN Tx Buffer Element Size Configuration Register type FDCAN_TXESC_Register is record -- Tx Buffer Data Field Size: TBDS : FDCAN_TXESC_TBDS_Field := 16#0#; -- unspecified Reserved_3_31 : HAL.UInt29 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TXESC_Register use record TBDS at 0 range 0 .. 2; Reserved_3_31 at 0 range 3 .. 31; end record; subtype FDCAN_TXEFC_EFSA_Field is HAL.UInt14; subtype FDCAN_TXEFC_EFS_Field is HAL.UInt6; subtype FDCAN_TXEFC_EFWM_Field is HAL.UInt6; -- FDCAN Tx Event FIFO Configuration Register type FDCAN_TXEFC_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Event FIFO Start Address EFSA : FDCAN_TXEFC_EFSA_Field := 16#0#; -- Event FIFO Size EFS : FDCAN_TXEFC_EFS_Field := 16#0#; -- unspecified Reserved_22_23 : HAL.UInt2 := 16#0#; -- Event FIFO Watermark EFWM : FDCAN_TXEFC_EFWM_Field := 16#0#; -- unspecified Reserved_30_31 : HAL.UInt2 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TXEFC_Register use record Reserved_0_1 at 0 range 0 .. 1; EFSA at 0 range 2 .. 15; EFS at 0 range 16 .. 21; Reserved_22_23 at 0 range 22 .. 23; EFWM at 0 range 24 .. 29; Reserved_30_31 at 0 range 30 .. 31; end record; subtype FDCAN_TXEFS_EFFL_Field is HAL.UInt6; subtype FDCAN_TXEFS_EFGI_Field is HAL.UInt5; -- FDCAN Tx Event FIFO Status Register type FDCAN_TXEFS_Register is record -- Event FIFO Fill Level EFFL : FDCAN_TXEFS_EFFL_Field := 16#0#; -- unspecified Reserved_6_7 : HAL.UInt2 := 16#0#; -- Event FIFO Get Index. EFGI : FDCAN_TXEFS_EFGI_Field := 16#0#; -- unspecified Reserved_13_23 : HAL.UInt11 := 16#0#; -- Event FIFO Full. EFF : Boolean := False; -- Tx Event FIFO Element Lost. TEFL : Boolean := False; -- unspecified Reserved_26_31 : HAL.UInt6 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TXEFS_Register use record EFFL at 0 range 0 .. 5; Reserved_6_7 at 0 range 6 .. 7; EFGI at 0 range 8 .. 12; Reserved_13_23 at 0 range 13 .. 23; EFF at 0 range 24 .. 24; TEFL at 0 range 25 .. 25; Reserved_26_31 at 0 range 26 .. 31; end record; subtype FDCAN_TXEFA_EFAI_Field is HAL.UInt5; -- FDCAN Tx Event FIFO Acknowledge Register type FDCAN_TXEFA_Register is record -- Event FIFO Acknowledge Index EFAI : FDCAN_TXEFA_EFAI_Field := 16#0#; -- unspecified Reserved_5_31 : HAL.UInt27 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TXEFA_Register use record EFAI at 0 range 0 .. 4; Reserved_5_31 at 0 range 5 .. 31; end record; subtype FDCAN_TTTMC_TMSA_Field is HAL.UInt14; subtype FDCAN_TTTMC_TME_Field is HAL.UInt7; -- FDCAN TT Trigger Memory Configuration Register type FDCAN_TTTMC_Register is record -- unspecified Reserved_0_1 : HAL.UInt2 := 16#0#; -- Trigger Memory Start Address TMSA : FDCAN_TTTMC_TMSA_Field := 16#0#; -- Trigger Memory Elements TME : FDCAN_TTTMC_TME_Field := 16#0#; -- unspecified Reserved_23_31 : HAL.UInt9 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTTMC_Register use record Reserved_0_1 at 0 range 0 .. 1; TMSA at 0 range 2 .. 15; TME at 0 range 16 .. 22; Reserved_23_31 at 0 range 23 .. 31; end record; subtype FDCAN_TTRMC_RID_Field is HAL.UInt29; -- FDCAN TT Reference Message Configuration Register type FDCAN_TTRMC_Register is record -- Reference Identifier. RID : FDCAN_TTRMC_RID_Field := 16#0#; -- unspecified Reserved_29_29 : HAL.Bit := 16#0#; -- Extended Identifier XTD : Boolean := False; -- Reference Message Payload Select RMPS : Boolean := False; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTRMC_Register use record RID at 0 range 0 .. 28; Reserved_29_29 at 0 range 29 .. 29; XTD at 0 range 30 .. 30; RMPS at 0 range 31 .. 31; end record; subtype FDCAN_TTOCF_OM_Field is HAL.UInt2; subtype FDCAN_TTOCF_LDSDL_Field is HAL.UInt3; subtype FDCAN_TTOCF_IRTO_Field is HAL.UInt7; subtype FDCAN_TTOCF_AWL_Field is HAL.UInt8; -- FDCAN TT Operation Configuration Register type FDCAN_TTOCF_Register is record -- Operation Mode OM : FDCAN_TTOCF_OM_Field := 16#0#; -- unspecified Reserved_2_2 : HAL.Bit := 16#0#; -- Gap Enable GEN : Boolean := False; -- Time Master TM : Boolean := False; -- LD of Synchronization Deviation Limit LDSDL : FDCAN_TTOCF_LDSDL_Field := 16#0#; -- Initial Reference Trigger Offset IRTO : FDCAN_TTOCF_IRTO_Field := 16#0#; -- Enable External Clock Synchronization EECS : Boolean := False; -- Application Watchdog Limit AWL : FDCAN_TTOCF_AWL_Field := 16#0#; -- Enable Global Time Filtering EGTF : Boolean := False; -- Enable Clock Calibration ECC : Boolean := False; -- Event Trigger Polarity EVTP : Boolean := False; -- unspecified Reserved_27_31 : HAL.UInt5 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTOCF_Register use record OM at 0 range 0 .. 1; Reserved_2_2 at 0 range 2 .. 2; GEN at 0 range 3 .. 3; TM at 0 range 4 .. 4; LDSDL at 0 range 5 .. 7; IRTO at 0 range 8 .. 14; EECS at 0 range 15 .. 15; AWL at 0 range 16 .. 23; EGTF at 0 range 24 .. 24; ECC at 0 range 25 .. 25; EVTP at 0 range 26 .. 26; Reserved_27_31 at 0 range 27 .. 31; end record; subtype FDCAN_TTMLM_CCM_Field is HAL.UInt6; subtype FDCAN_TTMLM_CSS_Field is HAL.UInt2; subtype FDCAN_TTMLM_TXEW_Field is HAL.UInt4; subtype FDCAN_TTMLM_ENTT_Field is HAL.UInt12; -- FDCAN TT Matrix Limits Register type FDCAN_TTMLM_Register is record -- Cycle Count Max CCM : FDCAN_TTMLM_CCM_Field := 16#0#; -- Cycle Start Synchronization CSS : FDCAN_TTMLM_CSS_Field := 16#0#; -- Tx Enable Window TXEW : FDCAN_TTMLM_TXEW_Field := 16#0#; -- unspecified Reserved_12_15 : HAL.UInt4 := 16#0#; -- Expected Number of Tx Triggers ENTT : FDCAN_TTMLM_ENTT_Field := 16#0#; -- unspecified Reserved_28_31 : HAL.UInt4 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTMLM_Register use record CCM at 0 range 0 .. 5; CSS at 0 range 6 .. 7; TXEW at 0 range 8 .. 11; Reserved_12_15 at 0 range 12 .. 15; ENTT at 0 range 16 .. 27; Reserved_28_31 at 0 range 28 .. 31; end record; subtype FDCAN_TURCF_NCL_Field is HAL.UInt16; subtype FDCAN_TURCF_DC_Field is HAL.UInt14; -- FDCAN TUR Configuration Register type FDCAN_TURCF_Register is record -- Numerator Configuration Low. NCL : FDCAN_TURCF_NCL_Field := 16#0#; -- Denominator Configuration. DC : FDCAN_TURCF_DC_Field := 16#0#; -- unspecified Reserved_30_30 : HAL.Bit := 16#0#; -- Enable Local Time ELT : Boolean := False; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TURCF_Register use record NCL at 0 range 0 .. 15; DC at 0 range 16 .. 29; Reserved_30_30 at 0 range 30 .. 30; ELT at 0 range 31 .. 31; end record; subtype FDCAN_TTOCN_SWS_Field is HAL.UInt2; subtype FDCAN_TTOCN_TMC_Field is HAL.UInt2; -- FDCAN TT Operation Control Register type FDCAN_TTOCN_Register is record -- Set Global time SGT : Boolean := False; -- External Clock Synchronization ECS : Boolean := False; -- Stop Watch Polarity SWP : Boolean := False; -- Stop Watch Source. SWS : FDCAN_TTOCN_SWS_Field := 16#0#; -- Register Time Mark Interrupt Pulse Enable RTIE : Boolean := False; -- Register Time Mark Compare TMC : FDCAN_TTOCN_TMC_Field := 16#0#; -- Trigger Time Mark Interrupt Pulse Enable TTIE : Boolean := False; -- Gap Control Select GCS : Boolean := False; -- Finish Gap. FGP : Boolean := False; -- Time Mark Gap TMG : Boolean := False; -- Next is Gap NIG : Boolean := False; -- External Synchronization Control ESCN : Boolean := False; -- unspecified Reserved_14_14 : HAL.Bit := 16#0#; -- TT Operation Control Register Locked LCKC : Boolean := False; -- unspecified Reserved_16_31 : HAL.UInt16 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTOCN_Register use record SGT at 0 range 0 .. 0; ECS at 0 range 1 .. 1; SWP at 0 range 2 .. 2; SWS at 0 range 3 .. 4; RTIE at 0 range 5 .. 5; TMC at 0 range 6 .. 7; TTIE at 0 range 8 .. 8; GCS at 0 range 9 .. 9; FGP at 0 range 10 .. 10; TMG at 0 range 11 .. 11; NIG at 0 range 12 .. 12; ESCN at 0 range 13 .. 13; Reserved_14_14 at 0 range 14 .. 14; LCKC at 0 range 15 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; subtype CAN_TTGTP_NCL_Field is HAL.UInt16; subtype CAN_TTGTP_CTP_Field is HAL.UInt16; -- FDCAN TT Global Time Preset Register type CAN_TTGTP_Register is record -- Time Preset NCL : CAN_TTGTP_NCL_Field := 16#0#; -- Cycle Time Target Phase CTP : CAN_TTGTP_CTP_Field := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for CAN_TTGTP_Register use record NCL at 0 range 0 .. 15; CTP at 0 range 16 .. 31; end record; subtype FDCAN_TTTMK_TM_Field is HAL.UInt16; subtype FDCAN_TTTMK_TICC_Field is HAL.UInt7; -- FDCAN TT Time Mark Register type FDCAN_TTTMK_Register is record -- Time Mark TM : FDCAN_TTTMK_TM_Field := 16#0#; -- Time Mark Cycle Code TICC : FDCAN_TTTMK_TICC_Field := 16#0#; -- unspecified Reserved_23_30 : HAL.UInt8 := 16#0#; -- TT Time Mark Register Locked LCKM : Boolean := False; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTTMK_Register use record TM at 0 range 0 .. 15; TICC at 0 range 16 .. 22; Reserved_23_30 at 0 range 23 .. 30; LCKM at 0 range 31 .. 31; end record; -- FDCAN_TTIR_SE array type FDCAN_TTIR_SE_Field_Array is array (1 .. 2) of Boolean with Component_Size => 1, Size => 2; -- Type definition for FDCAN_TTIR_SE type FDCAN_TTIR_SE_Field (As_Array : Boolean := False) is record case As_Array is when False => -- SE as a value Val : HAL.UInt2; when True => -- SE as an array Arr : FDCAN_TTIR_SE_Field_Array; end case; end record with Unchecked_Union, Size => 2; for FDCAN_TTIR_SE_Field use record Val at 0 range 0 .. 1; Arr at 0 range 0 .. 1; end record; -- FDCAN TT Interrupt Register type FDCAN_TTIR_Register is record -- Start of Basic Cycle SBC : Boolean := False; -- Start of Matrix Cycle SMC : Boolean := False; -- Change of Synchronization Mode CSM : Boolean := False; -- Start of Gap SOG : Boolean := False; -- Register Time Mark Interrupt. RTMI : Boolean := False; -- Trigger Time Mark Event Internal TTMI : Boolean := False; -- Stop Watch Event SWE : Boolean := False; -- Global Time Wrap GTW : Boolean := False; -- Global Time Discontinuity GTD : Boolean := False; -- Global Time Error GTE : Boolean := False; -- Tx Count Underflow TXU : Boolean := False; -- Tx Count Overflow TXO : Boolean := False; -- Scheduling Error 1 SE : FDCAN_TTIR_SE_Field := (As_Array => False, Val => 16#0#); -- Error Level Changed. ELC : Boolean := False; -- Initialization Watch Trigger IWTG : Boolean := False; -- Watch Trigger WT : Boolean := False; -- Application Watchdog AW : Boolean := False; -- Configuration Error CER : Boolean := False; -- unspecified Reserved_19_31 : HAL.UInt13 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTIR_Register use record SBC at 0 range 0 .. 0; SMC at 0 range 1 .. 1; CSM at 0 range 2 .. 2; SOG at 0 range 3 .. 3; RTMI at 0 range 4 .. 4; TTMI at 0 range 5 .. 5; SWE at 0 range 6 .. 6; GTW at 0 range 7 .. 7; GTD at 0 range 8 .. 8; GTE at 0 range 9 .. 9; TXU at 0 range 10 .. 10; TXO at 0 range 11 .. 11; SE at 0 range 12 .. 13; ELC at 0 range 14 .. 14; IWTG at 0 range 15 .. 15; WT at 0 range 16 .. 16; AW at 0 range 17 .. 17; CER at 0 range 18 .. 18; Reserved_19_31 at 0 range 19 .. 31; end record; -- FDCAN TT Interrupt Enable Register type FDCAN_TTIE_Register is record -- Start of Basic Cycle Interrupt Enable SBCE : Boolean := False; -- Start of Matrix Cycle Interrupt Enable SMCE : Boolean := False; -- Change of Synchronization Mode Interrupt Enable CSME : Boolean := False; -- Start of Gap Interrupt Enable SOGE : Boolean := False; -- Register Time Mark Interrupt Enable RTMIE : Boolean := False; -- Trigger Time Mark Event Internal Interrupt Enable TTMIE : Boolean := False; -- Stop Watch Event Interrupt Enable SWEE : Boolean := False; -- Global Time Wrap Interrupt Enable GTWE : Boolean := False; -- Global Time Discontinuity Interrupt Enable GTDE : Boolean := False; -- Global Time Error Interrupt Enable GTEE : Boolean := False; -- Tx Count Underflow Interrupt Enable TXUE : Boolean := False; -- Tx Count Overflow Interrupt Enable TXOE : Boolean := False; -- Scheduling Error 1 Interrupt Enable SE1E : Boolean := False; -- Scheduling Error 2 Interrupt Enable SE2E : Boolean := False; -- Change Error Level Interrupt Enable ELCE : Boolean := False; -- Initialization Watch Trigger Interrupt Enable IWTGE : Boolean := False; -- Watch Trigger Interrupt Enable WTE : Boolean := False; -- Application Watchdog Interrupt Enable AWE : Boolean := False; -- Configuration Error Interrupt Enable CERE : Boolean := False; -- unspecified Reserved_19_31 : HAL.UInt13 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTIE_Register use record SBCE at 0 range 0 .. 0; SMCE at 0 range 1 .. 1; CSME at 0 range 2 .. 2; SOGE at 0 range 3 .. 3; RTMIE at 0 range 4 .. 4; TTMIE at 0 range 5 .. 5; SWEE at 0 range 6 .. 6; GTWE at 0 range 7 .. 7; GTDE at 0 range 8 .. 8; GTEE at 0 range 9 .. 9; TXUE at 0 range 10 .. 10; TXOE at 0 range 11 .. 11; SE1E at 0 range 12 .. 12; SE2E at 0 range 13 .. 13; ELCE at 0 range 14 .. 14; IWTGE at 0 range 15 .. 15; WTE at 0 range 16 .. 16; AWE at 0 range 17 .. 17; CERE at 0 range 18 .. 18; Reserved_19_31 at 0 range 19 .. 31; end record; -- FDCAN TT Interrupt Line Select Register type FDCAN_TTILS_Register is record -- Start of Basic Cycle Interrupt Line SBCL : Boolean := False; -- Start of Matrix Cycle Interrupt Line SMCL : Boolean := False; -- Change of Synchronization Mode Interrupt Line CSML : Boolean := False; -- Start of Gap Interrupt Line SOGL : Boolean := False; -- Register Time Mark Interrupt Line RTMIL : Boolean := False; -- Trigger Time Mark Event Internal Interrupt Line TTMIL : Boolean := False; -- Stop Watch Event Interrupt Line SWEL : Boolean := False; -- Global Time Wrap Interrupt Line GTWL : Boolean := False; -- Global Time Discontinuity Interrupt Line GTDL : Boolean := False; -- Global Time Error Interrupt Line GTEL : Boolean := False; -- Tx Count Underflow Interrupt Line TXUL : Boolean := False; -- Tx Count Overflow Interrupt Line TXOL : Boolean := False; -- Scheduling Error 1 Interrupt Line SE1L : Boolean := False; -- Scheduling Error 2 Interrupt Line SE2L : Boolean := False; -- Change Error Level Interrupt Line ELCL : Boolean := False; -- Initialization Watch Trigger Interrupt Line IWTGL : Boolean := False; -- Watch Trigger Interrupt Line WTL : Boolean := False; -- Application Watchdog Interrupt Line AWL : Boolean := False; -- Configuration Error Interrupt Line CERL : Boolean := False; -- unspecified Reserved_19_31 : HAL.UInt13 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTILS_Register use record SBCL at 0 range 0 .. 0; SMCL at 0 range 1 .. 1; CSML at 0 range 2 .. 2; SOGL at 0 range 3 .. 3; RTMIL at 0 range 4 .. 4; TTMIL at 0 range 5 .. 5; SWEL at 0 range 6 .. 6; GTWL at 0 range 7 .. 7; GTDL at 0 range 8 .. 8; GTEL at 0 range 9 .. 9; TXUL at 0 range 10 .. 10; TXOL at 0 range 11 .. 11; SE1L at 0 range 12 .. 12; SE2L at 0 range 13 .. 13; ELCL at 0 range 14 .. 14; IWTGL at 0 range 15 .. 15; WTL at 0 range 16 .. 16; AWL at 0 range 17 .. 17; CERL at 0 range 18 .. 18; Reserved_19_31 at 0 range 19 .. 31; end record; subtype FDCAN_TTOST_EL_Field is HAL.UInt2; subtype FDCAN_TTOST_MS_Field is HAL.UInt2; subtype FDCAN_TTOST_SYS_Field is HAL.UInt2; subtype FDCAN_TTOST_RTO_Field is HAL.UInt8; subtype FDCAN_TTOST_TMP_Field is HAL.UInt3; -- FDCAN TT Operation Status Register type FDCAN_TTOST_Register is record -- Error Level EL : FDCAN_TTOST_EL_Field := 16#0#; -- Master State. MS : FDCAN_TTOST_MS_Field := 16#0#; -- Synchronization State SYS : FDCAN_TTOST_SYS_Field := 16#0#; -- Quality of Global Time Phase GTP : Boolean := False; -- Quality of Clock Speed QCS : Boolean := False; -- Reference Trigger Offset RTO : FDCAN_TTOST_RTO_Field := 16#0#; -- unspecified Reserved_16_21 : HAL.UInt6 := 16#0#; -- Wait for Global Time Discontinuity WGTD : Boolean := False; -- Gap Finished Indicator. GFI : Boolean := False; -- Time Master Priority TMP : FDCAN_TTOST_TMP_Field := 16#0#; -- Gap Started Indicator. GSI : Boolean := False; -- Wait for Event WFE : Boolean := False; -- Application Watchdog Event AWE : Boolean := False; -- Wait for External Clock Synchronization WECS : Boolean := False; -- Schedule Phase Lock SPL : Boolean := False; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTOST_Register use record EL at 0 range 0 .. 1; MS at 0 range 2 .. 3; SYS at 0 range 4 .. 5; GTP at 0 range 6 .. 6; QCS at 0 range 7 .. 7; RTO at 0 range 8 .. 15; Reserved_16_21 at 0 range 16 .. 21; WGTD at 0 range 22 .. 22; GFI at 0 range 23 .. 23; TMP at 0 range 24 .. 26; GSI at 0 range 27 .. 27; WFE at 0 range 28 .. 28; AWE at 0 range 29 .. 29; WECS at 0 range 30 .. 30; SPL at 0 range 31 .. 31; end record; subtype FDCAN_TURNA_NAV_Field is HAL.UInt18; -- FDCAN TUR Numerator Actual Register type FDCAN_TURNA_Register is record -- Read-only. Numerator Actual Value NAV : FDCAN_TURNA_NAV_Field; -- unspecified Reserved_18_31 : HAL.UInt14; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TURNA_Register use record NAV at 0 range 0 .. 17; Reserved_18_31 at 0 range 18 .. 31; end record; subtype FDCAN_TTLGT_LT_Field is HAL.UInt16; subtype FDCAN_TTLGT_GT_Field is HAL.UInt16; -- FDCAN TT Local and Global Time Register type FDCAN_TTLGT_Register is record -- Read-only. Local Time LT : FDCAN_TTLGT_LT_Field; -- Read-only. Global Time GT : FDCAN_TTLGT_GT_Field; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTLGT_Register use record LT at 0 range 0 .. 15; GT at 0 range 16 .. 31; end record; subtype FDCAN_TTCTC_CT_Field is HAL.UInt16; subtype FDCAN_TTCTC_CC_Field is HAL.UInt6; -- FDCAN TT Cycle Time and Count Register type FDCAN_TTCTC_Register is record -- Read-only. Cycle Time CT : FDCAN_TTCTC_CT_Field; -- Read-only. Cycle Count CC : FDCAN_TTCTC_CC_Field; -- unspecified Reserved_22_31 : HAL.UInt10; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTCTC_Register use record CT at 0 range 0 .. 15; CC at 0 range 16 .. 21; Reserved_22_31 at 0 range 22 .. 31; end record; subtype FDCAN_TTCPT_CT_Field is HAL.UInt6; subtype FDCAN_TTCPT_SWV_Field is HAL.UInt16; -- FDCAN TT Capture Time Register type FDCAN_TTCPT_Register is record -- Read-only. Cycle Count Value CT : FDCAN_TTCPT_CT_Field; -- unspecified Reserved_6_15 : HAL.UInt10; -- Read-only. Stop Watch Value SWV : FDCAN_TTCPT_SWV_Field; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTCPT_Register use record CT at 0 range 0 .. 5; Reserved_6_15 at 0 range 6 .. 15; SWV at 0 range 16 .. 31; end record; subtype FDCAN_TTCSM_CSM_Field is HAL.UInt16; -- FDCAN TT Cycle Sync Mark Register type FDCAN_TTCSM_Register is record -- Read-only. Cycle Sync Mark CSM : FDCAN_TTCSM_CSM_Field; -- unspecified Reserved_16_31 : HAL.UInt16; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTCSM_Register use record CSM at 0 range 0 .. 15; Reserved_16_31 at 0 range 16 .. 31; end record; subtype FDCAN_TTTS_SWTDEL_Field is HAL.UInt2; subtype FDCAN_TTTS_EVTSEL_Field is HAL.UInt2; -- FDCAN TT Trigger Select Register type FDCAN_TTTS_Register is record -- Stop watch trigger input selection SWTDEL : FDCAN_TTTS_SWTDEL_Field := 16#0#; -- unspecified Reserved_2_3 : HAL.UInt2 := 16#0#; -- Event trigger input selection EVTSEL : FDCAN_TTTS_EVTSEL_Field := 16#0#; -- unspecified Reserved_6_31 : HAL.UInt26 := 16#0#; end record with Volatile_Full_Access, Object_Size => 32, Bit_Order => System.Low_Order_First; for FDCAN_TTTS_Register use record SWTDEL at 0 range 0 .. 1; Reserved_2_3 at 0 range 2 .. 3; EVTSEL at 0 range 4 .. 5; Reserved_6_31 at 0 range 6 .. 31; end record; ----------------- -- Peripherals -- ----------------- -- CCU registers type CAN_CCU_Peripheral is record -- Clock Calibration Unit Core Release Register CREL : aliased CREL_Register; -- Calibration Configuration Register CCFG : aliased CCFG_Register; -- Calibration Status Register CSTAT : aliased CSTAT_Register; -- Calibration Watchdog Register CWD : aliased CWD_Register; -- Clock Calibration Unit Interrupt Register IR : aliased IR_Register; -- Clock Calibration Unit Interrupt Enable Register IE : aliased IE_Register; end record with Volatile; for CAN_CCU_Peripheral use record CREL at 16#0# range 0 .. 31; CCFG at 16#4# range 0 .. 31; CSTAT at 16#8# range 0 .. 31; CWD at 16#C# range 0 .. 31; IR at 16#10# range 0 .. 31; IE at 16#14# range 0 .. 31; end record; -- CCU registers CAN_CCU_Periph : aliased CAN_CCU_Peripheral with Import, Address => CAN_CCU_Base; -- FDCAN1 type FDCAN_Peripheral is record -- FDCAN Core Release Register FDCAN_CREL : aliased FDCAN_CREL_Register; -- FDCAN Core Release Register FDCAN_ENDN : aliased HAL.UInt32; -- FDCAN Data Bit Timing and Prescaler Register FDCAN_DBTP : aliased FDCAN_DBTP_Register; -- FDCAN Test Register FDCAN_TEST : aliased FDCAN_TEST_Register; -- FDCAN RAM Watchdog Register FDCAN_RWD : aliased FDCAN_RWD_Register; -- FDCAN CC Control Register FDCAN_CCCR : aliased FDCAN_CCCR_Register; -- FDCAN Nominal Bit Timing and Prescaler Register FDCAN_NBTP : aliased FDCAN_NBTP_Register; -- FDCAN Timestamp Counter Configuration Register FDCAN_TSCC : aliased FDCAN_TSCC_Register; -- FDCAN Timestamp Counter Value Register FDCAN_TSCV : aliased FDCAN_TSCV_Register; -- FDCAN Timeout Counter Configuration Register FDCAN_TOCC : aliased FDCAN_TOCC_Register; -- FDCAN Timeout Counter Value Register FDCAN_TOCV : aliased FDCAN_TOCV_Register; -- FDCAN Error Counter Register FDCAN_ECR : aliased FDCAN_ECR_Register; -- FDCAN Protocol Status Register FDCAN_PSR : aliased FDCAN_PSR_Register; -- FDCAN Transmitter Delay Compensation Register FDCAN_TDCR : aliased FDCAN_TDCR_Register; -- FDCAN Interrupt Register FDCAN_IR : aliased FDCAN_IR_Register; -- FDCAN Interrupt Enable Register FDCAN_IE : aliased FDCAN_IE_Register; -- FDCAN Interrupt Line Select Register FDCAN_ILS : aliased FDCAN_ILS_Register; -- FDCAN Interrupt Line Enable Register FDCAN_ILE : aliased FDCAN_ILE_Register; -- FDCAN Global Filter Configuration Register FDCAN_GFC : aliased FDCAN_GFC_Register; -- FDCAN Standard ID Filter Configuration Register FDCAN_SIDFC : aliased FDCAN_SIDFC_Register; -- FDCAN Extended ID Filter Configuration Register FDCAN_XIDFC : aliased FDCAN_XIDFC_Register; -- FDCAN Extended ID and Mask Register FDCAN_XIDAM : aliased FDCAN_XIDAM_Register; -- FDCAN High Priority Message Status Register FDCAN_HPMS : aliased FDCAN_HPMS_Register; -- FDCAN New Data 1 Register FDCAN_NDAT1 : aliased FDCAN_NDAT1_Register; -- FDCAN New Data 2 Register FDCAN_NDAT2 : aliased FDCAN_NDAT2_Register; -- FDCAN Rx FIFO 0 Configuration Register FDCAN_RXF0C : aliased FDCAN_RXF0C_Register; -- FDCAN Rx FIFO 0 Status Register FDCAN_RXF0S : aliased FDCAN_RXF0S_Register; -- CAN Rx FIFO 0 Acknowledge Register FDCAN_RXF0A : aliased FDCAN_RXF0A_Register; -- FDCAN Rx Buffer Configuration Register FDCAN_RXBC : aliased FDCAN_RXBC_Register; -- FDCAN Rx FIFO 1 Configuration Register FDCAN_RXF1C : aliased FDCAN_RXF1C_Register; -- FDCAN Rx FIFO 1 Status Register FDCAN_RXF1S : aliased FDCAN_RXF1S_Register; -- FDCAN Rx FIFO 1 Acknowledge Register FDCAN_RXF1A : aliased FDCAN_RXF1A_Register; -- FDCAN Rx Buffer Element Size Configuration Register FDCAN_RXESC : aliased FDCAN_RXESC_Register; -- FDCAN Tx Buffer Configuration Register FDCAN_TXBC : aliased FDCAN_TXBC_Register; -- FDCAN Tx FIFO/Queue Status Register FDCAN_TXFQS : aliased FDCAN_TXFQS_Register; -- FDCAN Tx Buffer Element Size Configuration Register FDCAN_TXESC : aliased FDCAN_TXESC_Register; -- FDCAN Tx Buffer Request Pending Register FDCAN_TXBRP : aliased HAL.UInt32; -- FDCAN Tx Buffer Add Request Register FDCAN_TXBAR : aliased HAL.UInt32; -- FDCAN Tx Buffer Cancellation Request Register FDCAN_TXBCR : aliased HAL.UInt32; -- FDCAN Tx Buffer Transmission Occurred Register FDCAN_TXBTO : aliased HAL.UInt32; -- FDCAN Tx Buffer Cancellation Finished Register FDCAN_TXBCF : aliased HAL.UInt32; -- FDCAN Tx Buffer Transmission Interrupt Enable Register FDCAN_TXBTIE : aliased HAL.UInt32; -- FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register FDCAN_TXBCIE : aliased HAL.UInt32; -- FDCAN Tx Event FIFO Configuration Register FDCAN_TXEFC : aliased FDCAN_TXEFC_Register; -- FDCAN Tx Event FIFO Status Register FDCAN_TXEFS : aliased FDCAN_TXEFS_Register; -- FDCAN Tx Event FIFO Acknowledge Register FDCAN_TXEFA : aliased FDCAN_TXEFA_Register; -- FDCAN TT Trigger Memory Configuration Register FDCAN_TTTMC : aliased FDCAN_TTTMC_Register; -- FDCAN TT Reference Message Configuration Register FDCAN_TTRMC : aliased FDCAN_TTRMC_Register; -- FDCAN TT Operation Configuration Register FDCAN_TTOCF : aliased FDCAN_TTOCF_Register; -- FDCAN TT Matrix Limits Register FDCAN_TTMLM : aliased FDCAN_TTMLM_Register; -- FDCAN TUR Configuration Register FDCAN_TURCF : aliased FDCAN_TURCF_Register; -- FDCAN TT Operation Control Register FDCAN_TTOCN : aliased FDCAN_TTOCN_Register; -- FDCAN TT Global Time Preset Register CAN_TTGTP : aliased CAN_TTGTP_Register; -- FDCAN TT Time Mark Register FDCAN_TTTMK : aliased FDCAN_TTTMK_Register; -- FDCAN TT Interrupt Register FDCAN_TTIR : aliased FDCAN_TTIR_Register; -- FDCAN TT Interrupt Enable Register FDCAN_TTIE : aliased FDCAN_TTIE_Register; -- FDCAN TT Interrupt Line Select Register FDCAN_TTILS : aliased FDCAN_TTILS_Register; -- FDCAN TT Operation Status Register FDCAN_TTOST : aliased FDCAN_TTOST_Register; -- FDCAN TUR Numerator Actual Register FDCAN_TURNA : aliased FDCAN_TURNA_Register; -- FDCAN TT Local and Global Time Register FDCAN_TTLGT : aliased FDCAN_TTLGT_Register; -- FDCAN TT Cycle Time and Count Register FDCAN_TTCTC : aliased FDCAN_TTCTC_Register; -- FDCAN TT Capture Time Register FDCAN_TTCPT : aliased FDCAN_TTCPT_Register; -- FDCAN TT Cycle Sync Mark Register FDCAN_TTCSM : aliased FDCAN_TTCSM_Register; -- FDCAN TT Trigger Select Register FDCAN_TTTS : aliased FDCAN_TTTS_Register; end record with Volatile; for FDCAN_Peripheral use record FDCAN_CREL at 16#0# range 0 .. 31; FDCAN_ENDN at 16#4# range 0 .. 31; FDCAN_DBTP at 16#C# range 0 .. 31; FDCAN_TEST at 16#10# range 0 .. 31; FDCAN_RWD at 16#14# range 0 .. 31; FDCAN_CCCR at 16#18# range 0 .. 31; FDCAN_NBTP at 16#1C# range 0 .. 31; FDCAN_TSCC at 16#20# range 0 .. 31; FDCAN_TSCV at 16#24# range 0 .. 31; FDCAN_TOCC at 16#28# range 0 .. 31; FDCAN_TOCV at 16#2C# range 0 .. 31; FDCAN_ECR at 16#40# range 0 .. 31; FDCAN_PSR at 16#44# range 0 .. 31; FDCAN_TDCR at 16#48# range 0 .. 31; FDCAN_IR at 16#50# range 0 .. 31; FDCAN_IE at 16#54# range 0 .. 31; FDCAN_ILS at 16#58# range 0 .. 31; FDCAN_ILE at 16#5C# range 0 .. 31; FDCAN_GFC at 16#80# range 0 .. 31; FDCAN_SIDFC at 16#84# range 0 .. 31; FDCAN_XIDFC at 16#88# range 0 .. 31; FDCAN_XIDAM at 16#90# range 0 .. 31; FDCAN_HPMS at 16#94# range 0 .. 31; FDCAN_NDAT1 at 16#98# range 0 .. 31; FDCAN_NDAT2 at 16#9C# range 0 .. 31; FDCAN_RXF0C at 16#A0# range 0 .. 31; FDCAN_RXF0S at 16#A4# range 0 .. 31; FDCAN_RXF0A at 16#A8# range 0 .. 31; FDCAN_RXBC at 16#AC# range 0 .. 31; FDCAN_RXF1C at 16#B0# range 0 .. 31; FDCAN_RXF1S at 16#B4# range 0 .. 31; FDCAN_RXF1A at 16#B8# range 0 .. 31; FDCAN_RXESC at 16#BC# range 0 .. 31; FDCAN_TXBC at 16#C0# range 0 .. 31; FDCAN_TXFQS at 16#C4# range 0 .. 31; FDCAN_TXESC at 16#C8# range 0 .. 31; FDCAN_TXBRP at 16#CC# range 0 .. 31; FDCAN_TXBAR at 16#D0# range 0 .. 31; FDCAN_TXBCR at 16#D4# range 0 .. 31; FDCAN_TXBTO at 16#D8# range 0 .. 31; FDCAN_TXBCF at 16#DC# range 0 .. 31; FDCAN_TXBTIE at 16#E0# range 0 .. 31; FDCAN_TXBCIE at 16#E4# range 0 .. 31; FDCAN_TXEFC at 16#F0# range 0 .. 31; FDCAN_TXEFS at 16#F4# range 0 .. 31; FDCAN_TXEFA at 16#F8# range 0 .. 31; FDCAN_TTTMC at 16#100# range 0 .. 31; FDCAN_TTRMC at 16#104# range 0 .. 31; FDCAN_TTOCF at 16#108# range 0 .. 31; FDCAN_TTMLM at 16#10C# range 0 .. 31; FDCAN_TURCF at 16#110# range 0 .. 31; FDCAN_TTOCN at 16#114# range 0 .. 31; CAN_TTGTP at 16#118# range 0 .. 31; FDCAN_TTTMK at 16#11C# range 0 .. 31; FDCAN_TTIR at 16#120# range 0 .. 31; FDCAN_TTIE at 16#124# range 0 .. 31; FDCAN_TTILS at 16#128# range 0 .. 31; FDCAN_TTOST at 16#12C# range 0 .. 31; FDCAN_TURNA at 16#130# range 0 .. 31; FDCAN_TTLGT at 16#134# range 0 .. 31; FDCAN_TTCTC at 16#138# range 0 .. 31; FDCAN_TTCPT at 16#13C# range 0 .. 31; FDCAN_TTCSM at 16#140# range 0 .. 31; FDCAN_TTTS at 16#300# range 0 .. 31; end record; -- FDCAN1 FDCAN1_Periph : aliased FDCAN_Peripheral with Import, Address => FDCAN1_Base; -- FDCAN1 FDCAN2_Periph : aliased FDCAN_Peripheral with Import, Address => FDCAN2_Base; end STM32_SVD.FDCAN;
Ficha 2 - Tratamento de dados de 8, 16 e 32 bits/02c.asm
FEUP-MIEIC/MPCP
0
95714
<filename>Ficha 2 - Tratamento de dados de 8, 16 e 32 bits/02c.asm include mpcp.inc .data bseq SBYTE -5,-4,-3,-2,-1,0,1,2,3,127, 127 msg BYTE "0- BYTE", 13, 10, "1- WORD", 13, 10,"2- DWORD", 13, 10, "Resposta: %d", 13, 10, 0 .code main PROC C mov ESI, OFFSET bseq mov ECX, LENGTHOF bseq xor EAX, EAX ciclo: jecxz isBYTE movsx EBX, BYTE PTR [ESI] add EAX, EBX add ESI, TYPE bseq loop ciclo isBYTE: cmp EAX, -128 jl isWORD cmp EAX, 127 jg isWORD ; se não, está dentro da gama BYTE mov EBX, 0 jmp fim isWORD: cmp EAX, -32768 jl isDWORD cmp EAX, 32767 jg isDWORD ; se não, está dentro da gama WORD mov EBX, 1 jmp fim isDWORD: mov EBX, 2 fim: invoke printf, OFFSET msg, EBX invoke _getch invoke ExitProcess, 0 main ENDP end
programs/oeis/313/A313786.asm
karttu/loda
0
242572
<filename>programs/oeis/313/A313786.asm ; A313786: Coordination sequence Gal.4.128.2 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings. ; 1,5,10,15,21,26,32,36,43,46,54,56,65,66,76,76,87,86,98,96,109,106,120,116,131,126,142,136,153,146,164,156,175,166,186,176,197,186,208,196,219,206,230,216,241,226,252,236,263,246 mov $2,$0 mov $3,2 mov $5,$0 mov $8,$0 mov $11,$0 lpb $2,1 mod $5,2 mov $4,$5 mov $6,$8 mov $7,$2 lpb $5,1 trn $5,$2 mov $7,1 lpe lpb $6,1 mov $2,$4 add $4,$6 sub $6,$2 mov $10,$7 sub $10,1 mov $3,$10 trn $6,2 lpe sub $2,1 lpe div $3,2 add $3,25 mov $1,$3 sub $1,25 mov $9,$11 mul $9,5 add $1,$9
rplugin/python3/denite/lib/music2.applescript
skrby1/unite-itunes
0
4325
<reponame>skrby1/unite-itunes on run argv as text set v_argv to replaceText(argv, "@wq@", "\"") --display dialog v_argv set l_props to {} set v_mode to "" tell application "Music" set shuffle enabled to false if 2nd character of v_argv is not "|" set l_props to tracks of playlist v_argv set v_mode to "playlist" else if 1st character of v_argv is "n" set v_sw to setSW(v_argv) of me --set l_props to tracks whose (artist contains v_sw or album artist contains v_sw) set l_props to search playlist 1 for v_sw only artists set v_mode to "name" else if 1st character of v_argv is "a" set v_sw to setSW(v_argv) of me --set l_props to tracks whose album contains v_sw set l_props to search playlist 1 for v_sw only albums set v_mode to "album" else if 1st character of v_argv is "t" set v_sw to setSW(v_argv) of me --set l_props to tracks whose name contains v_sw set l_props to search playlist 1 for v_sw only names set v_mode to "title" else if 1st character of v_argv is "y" set v_sw to setSW(v_argv) of me set l_props to tracks whose year = v_sw as integer and media kind of it is song set v_mode to "year" else if 1st character of v_argv is ">" or 1st character of v_argv is "<" then set v_sw to setSW(v_argv) of me set v_td to AppleScript's text item delimiters set AppleScript's text item delimiters to "-" set l_t to text items of v_sw set AppleScript's text item delimiters to v_td set l_props to tracks whose duration >= (item 1 of l_t as number) * 60.0 and duration of it <= (item 2 of l_t as number) * 60.0 and media kind of it is song set v_mode to "time" end if set v_temp to "" set v_sartist to "" set l_data to "" set v_flag to 0 repeat with i in l_props set v_s to "" if class of i is shared track then if date added of i is missing value then set v_s to "[S] " else set v_s to "[s] " end if end if if compilation of i then set v_s to v_s & "[c] " if album artist of i is not "" then set v_sartist to album artist of i else set v_sartist to artist of i end if else set v_sartist to artist of i end if set v_temp to v_s & name of i & tab & album of i & tab & artist of i & tab & (track number of i) as text & tab & (id of i) as text & tab & v_argv & tab & (duration of i) as text & tab & v_sartist & tab & (disc number of i) as text & tab & v_mode if v_flag = 0 then set l_data to v_temp set v_flag to 1 else set l_data to l_data & return & v_temp end if end repeat l_data end tell end run on setSW(sw) set v_temp to text 3 thru end of sw set v_td to AppleScript's text item delimiters set AppleScript's text item delimiters to "_" set l_temp to text items of v_temp set AppleScript's text item delimiters to " " set v_temp to l_temp as string set AppleScript's text item delimiters to v_td return v_temp end on replaceText(theText, serchStr, replaceStr) set tmp to AppleScript's text item delimiters set AppleScript's text item delimiters to serchStr set theList to every text item of theText set AppleScript's text item delimiters to replaceStr set theText to theList as string set AppleScript's text item delimiters to tmp return theText end
test/Compiler/simple/Issue5420.agda
cruhland/agda
1,989
4382
<reponame>cruhland/agda open import Agda.Builtin.IO open import Agda.Builtin.Reflection open import Agda.Builtin.String open import Agda.Builtin.Unit _>>=_ : {A B : Set} → TC A → (A → TC B) → TC B _>>=_ = λ x f → bindTC x f postulate putStr : String → IO ⊤ {-# FOREIGN GHC import qualified Data.Text.IO #-} {-# COMPILE GHC putStr = Data.Text.IO.putStr #-} {-# COMPILE JS putStr = function (x) { return function(cb) { process.stdout.write(x); cb(0); }; } #-} main : IO ⊤ main = putStr "Success\n"
threadtest1.asm
shahendahamdy/xv6-threads
0
11561
_threadtest1: file format elf32-i386 Disassembly of section .text: 00000000 <main>: exit(); } int main(int argc, char *argv[]) { 0: f3 0f 1e fb endbr32 4: 8d 4c 24 04 lea 0x4(%esp),%ecx 8: 83 e4 f0 and $0xfffffff0,%esp b: ff 71 fc pushl -0x4(%ecx) e: 55 push %ebp f: 89 e5 mov %esp,%ebp 11: 51 push %ecx 12: 83 ec 10 sub $0x10,%esp lock_init(L); 15: ff 35 20 0c 00 00 pushl 0xc20 1b: e8 f0 02 00 00 call 310 <lock_init> printf(1, "----------------\n"); 20: 58 pop %eax 21: 5a pop %edx 22: 68 8b 08 00 00 push $0x88b 27: 6a 01 push $0x1 29: e8 82 06 00 00 call 6b0 <printf> lock_acquire(L); 2e: 59 pop %ecx 2f: ff 35 20 0c 00 00 pushl 0xc20 35: e8 f6 02 00 00 call 330 <lock_acquire> thread_create(&print, NULL,NULL); 3a: 83 c4 0c add $0xc,%esp 3d: 6a 00 push $0x0 3f: 6a 00 push $0x0 41: 68 70 00 00 00 push $0x70 46: e8 c5 04 00 00 call 510 <thread_create> lock_release(L); 4b: 58 pop %eax 4c: ff 35 20 0c 00 00 pushl 0xc20 52: e8 f9 02 00 00 call 350 <lock_release> thread_join(); 57: e8 94 02 00 00 call 2f0 <thread_join> printf(1, "EXITING \n"); 5c: 58 pop %eax 5d: 5a pop %edx 5e: 68 9d 08 00 00 push $0x89d 63: 6a 01 push $0x1 65: e8 46 06 00 00 call 6b0 <printf> exit(); 6a: e8 ce 04 00 00 call 53d <exit> 6f: 90 nop 00000070 <print>: void print(){ 70: f3 0f 1e fb endbr32 74: 55 push %ebp 75: 89 e5 mov %esp,%ebp 77: 83 ec 10 sub $0x10,%esp printf(1,"====Threads======\n"); 7a: 68 78 08 00 00 push $0x878 7f: 6a 01 push $0x1 81: e8 2a 06 00 00 call 6b0 <printf> exit(); 86: e8 b2 04 00 00 call 53d <exit> 8b: 66 90 xchg %ax,%ax 8d: 66 90 xchg %ax,%ax 8f: 90 nop 00000090 <strcpy>: }; char* strcpy(char *s, const char *t) { 90: f3 0f 1e fb endbr32 94: 55 push %ebp char *os; os = s; while((*s++ = *t++) != 0) 95: 31 c0 xor %eax,%eax { 97: 89 e5 mov %esp,%ebp 99: 53 push %ebx 9a: 8b 4d 08 mov 0x8(%ebp),%ecx 9d: 8b 5d 0c mov 0xc(%ebp),%ebx while((*s++ = *t++) != 0) a0: 0f b6 14 03 movzbl (%ebx,%eax,1),%edx a4: 88 14 01 mov %dl,(%ecx,%eax,1) a7: 83 c0 01 add $0x1,%eax aa: 84 d2 test %dl,%dl ac: 75 f2 jne a0 <strcpy+0x10> ; return os; } ae: 89 c8 mov %ecx,%eax b0: 5b pop %ebx b1: 5d pop %ebp b2: c3 ret b3: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi ba: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 000000c0 <strcmp>: int strcmp(const char *p, const char *q) { c0: f3 0f 1e fb endbr32 c4: 55 push %ebp c5: 89 e5 mov %esp,%ebp c7: 53 push %ebx c8: 8b 4d 08 mov 0x8(%ebp),%ecx cb: 8b 55 0c mov 0xc(%ebp),%edx while(*p && *p == *q) ce: 0f b6 01 movzbl (%ecx),%eax d1: 0f b6 1a movzbl (%edx),%ebx d4: 84 c0 test %al,%al d6: 75 19 jne f1 <strcmp+0x31> d8: eb 26 jmp 100 <strcmp+0x40> da: 8d b6 00 00 00 00 lea 0x0(%esi),%esi e0: 0f b6 41 01 movzbl 0x1(%ecx),%eax p++, q++; e4: 83 c1 01 add $0x1,%ecx e7: 83 c2 01 add $0x1,%edx while(*p && *p == *q) ea: 0f b6 1a movzbl (%edx),%ebx ed: 84 c0 test %al,%al ef: 74 0f je 100 <strcmp+0x40> f1: 38 d8 cmp %bl,%al f3: 74 eb je e0 <strcmp+0x20> return (uchar)*p - (uchar)*q; f5: 29 d8 sub %ebx,%eax } f7: 5b pop %ebx f8: 5d pop %ebp f9: c3 ret fa: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 100: 31 c0 xor %eax,%eax return (uchar)*p - (uchar)*q; 102: 29 d8 sub %ebx,%eax } 104: 5b pop %ebx 105: 5d pop %ebp 106: c3 ret 107: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 10e: 66 90 xchg %ax,%ax 00000110 <strlen>: uint strlen(const char *s) { 110: f3 0f 1e fb endbr32 114: 55 push %ebp 115: 89 e5 mov %esp,%ebp 117: 8b 55 08 mov 0x8(%ebp),%edx int n; for(n = 0; s[n]; n++) 11a: 80 3a 00 cmpb $0x0,(%edx) 11d: 74 21 je 140 <strlen+0x30> 11f: 31 c0 xor %eax,%eax 121: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 128: 83 c0 01 add $0x1,%eax 12b: 80 3c 02 00 cmpb $0x0,(%edx,%eax,1) 12f: 89 c1 mov %eax,%ecx 131: 75 f5 jne 128 <strlen+0x18> ; return n; } 133: 89 c8 mov %ecx,%eax 135: 5d pop %ebp 136: c3 ret 137: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 13e: 66 90 xchg %ax,%ax for(n = 0; s[n]; n++) 140: 31 c9 xor %ecx,%ecx } 142: 5d pop %ebp 143: 89 c8 mov %ecx,%eax 145: c3 ret 146: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 14d: 8d 76 00 lea 0x0(%esi),%esi 00000150 <memset>: void* memset(void *dst, int c, uint n) { 150: f3 0f 1e fb endbr32 154: 55 push %ebp 155: 89 e5 mov %esp,%ebp 157: 57 push %edi 158: 8b 55 08 mov 0x8(%ebp),%edx } static inline void stosb(void *addr, int data, int cnt) { asm volatile("cld; rep stosb" : 15b: 8b 4d 10 mov 0x10(%ebp),%ecx 15e: 8b 45 0c mov 0xc(%ebp),%eax 161: 89 d7 mov %edx,%edi 163: fc cld 164: f3 aa rep stos %al,%es:(%edi) stosb(dst, c, n); return dst; } 166: 89 d0 mov %edx,%eax 168: 5f pop %edi 169: 5d pop %ebp 16a: c3 ret 16b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 16f: 90 nop 00000170 <strchr>: char* strchr(const char *s, char c) { 170: f3 0f 1e fb endbr32 174: 55 push %ebp 175: 89 e5 mov %esp,%ebp 177: 8b 45 08 mov 0x8(%ebp),%eax 17a: 0f b6 4d 0c movzbl 0xc(%ebp),%ecx for(; *s; s++) 17e: 0f b6 10 movzbl (%eax),%edx 181: 84 d2 test %dl,%dl 183: 75 16 jne 19b <strchr+0x2b> 185: eb 21 jmp 1a8 <strchr+0x38> 187: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 18e: 66 90 xchg %ax,%ax 190: 0f b6 50 01 movzbl 0x1(%eax),%edx 194: 83 c0 01 add $0x1,%eax 197: 84 d2 test %dl,%dl 199: 74 0d je 1a8 <strchr+0x38> if(*s == c) 19b: 38 d1 cmp %dl,%cl 19d: 75 f1 jne 190 <strchr+0x20> return (char*)s; return 0; } 19f: 5d pop %ebp 1a0: c3 ret 1a1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi return 0; 1a8: 31 c0 xor %eax,%eax } 1aa: 5d pop %ebp 1ab: c3 ret 1ac: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 000001b0 <gets>: char* gets(char *buf, int max) { 1b0: f3 0f 1e fb endbr32 1b4: 55 push %ebp 1b5: 89 e5 mov %esp,%ebp 1b7: 57 push %edi 1b8: 56 push %esi int i, cc; char c; for(i=0; i+1 < max; ){ 1b9: 31 f6 xor %esi,%esi { 1bb: 53 push %ebx 1bc: 89 f3 mov %esi,%ebx 1be: 83 ec 1c sub $0x1c,%esp 1c1: 8b 7d 08 mov 0x8(%ebp),%edi for(i=0; i+1 < max; ){ 1c4: eb 33 jmp 1f9 <gets+0x49> 1c6: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 1cd: 8d 76 00 lea 0x0(%esi),%esi cc = read(0, &c, 1); 1d0: 83 ec 04 sub $0x4,%esp 1d3: 8d 45 e7 lea -0x19(%ebp),%eax 1d6: 6a 01 push $0x1 1d8: 50 push %eax 1d9: 6a 00 push $0x0 1db: e8 75 03 00 00 call 555 <read> if(cc < 1) 1e0: 83 c4 10 add $0x10,%esp 1e3: 85 c0 test %eax,%eax 1e5: 7e 1c jle 203 <gets+0x53> break; buf[i++] = c; 1e7: 0f b6 45 e7 movzbl -0x19(%ebp),%eax 1eb: 83 c7 01 add $0x1,%edi 1ee: 88 47 ff mov %al,-0x1(%edi) if(c == '\n' || c == '\r') 1f1: 3c 0a cmp $0xa,%al 1f3: 74 23 je 218 <gets+0x68> 1f5: 3c 0d cmp $0xd,%al 1f7: 74 1f je 218 <gets+0x68> for(i=0; i+1 < max; ){ 1f9: 83 c3 01 add $0x1,%ebx 1fc: 89 fe mov %edi,%esi 1fe: 3b 5d 0c cmp 0xc(%ebp),%ebx 201: 7c cd jl 1d0 <gets+0x20> 203: 89 f3 mov %esi,%ebx break; } buf[i] = '\0'; return buf; } 205: 8b 45 08 mov 0x8(%ebp),%eax buf[i] = '\0'; 208: c6 03 00 movb $0x0,(%ebx) } 20b: 8d 65 f4 lea -0xc(%ebp),%esp 20e: 5b pop %ebx 20f: 5e pop %esi 210: 5f pop %edi 211: 5d pop %ebp 212: c3 ret 213: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 217: 90 nop 218: 8b 75 08 mov 0x8(%ebp),%esi 21b: 8b 45 08 mov 0x8(%ebp),%eax 21e: 01 de add %ebx,%esi 220: 89 f3 mov %esi,%ebx buf[i] = '\0'; 222: c6 03 00 movb $0x0,(%ebx) } 225: 8d 65 f4 lea -0xc(%ebp),%esp 228: 5b pop %ebx 229: 5e pop %esi 22a: 5f pop %edi 22b: 5d pop %ebp 22c: c3 ret 22d: 8d 76 00 lea 0x0(%esi),%esi 00000230 <stat>: int stat(const char *n, struct stat *st) { 230: f3 0f 1e fb endbr32 234: 55 push %ebp 235: 89 e5 mov %esp,%ebp 237: 56 push %esi 238: 53 push %ebx int fd; int r; fd = open(n, O_RDONLY); 239: 83 ec 08 sub $0x8,%esp 23c: 6a 00 push $0x0 23e: ff 75 08 pushl 0x8(%ebp) 241: e8 37 03 00 00 call 57d <open> if(fd < 0) 246: 83 c4 10 add $0x10,%esp 249: 85 c0 test %eax,%eax 24b: 78 2b js 278 <stat+0x48> return -1; r = fstat(fd, st); 24d: 83 ec 08 sub $0x8,%esp 250: ff 75 0c pushl 0xc(%ebp) 253: 89 c3 mov %eax,%ebx 255: 50 push %eax 256: e8 3a 03 00 00 call 595 <fstat> close(fd); 25b: 89 1c 24 mov %ebx,(%esp) r = fstat(fd, st); 25e: 89 c6 mov %eax,%esi close(fd); 260: e8 00 03 00 00 call 565 <close> return r; 265: 83 c4 10 add $0x10,%esp } 268: 8d 65 f8 lea -0x8(%ebp),%esp 26b: 89 f0 mov %esi,%eax 26d: 5b pop %ebx 26e: 5e pop %esi 26f: 5d pop %ebp 270: c3 ret 271: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi return -1; 278: be ff ff ff ff mov $0xffffffff,%esi 27d: eb e9 jmp 268 <stat+0x38> 27f: 90 nop 00000280 <atoi>: int atoi(const char *s) { 280: f3 0f 1e fb endbr32 284: 55 push %ebp 285: 89 e5 mov %esp,%ebp 287: 53 push %ebx 288: 8b 55 08 mov 0x8(%ebp),%edx int n; n = 0; while('0' <= *s && *s <= '9') 28b: 0f be 02 movsbl (%edx),%eax 28e: 8d 48 d0 lea -0x30(%eax),%ecx 291: 80 f9 09 cmp $0x9,%cl n = 0; 294: b9 00 00 00 00 mov $0x0,%ecx while('0' <= *s && *s <= '9') 299: 77 1a ja 2b5 <atoi+0x35> 29b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 29f: 90 nop n = n*10 + *s++ - '0'; 2a0: 83 c2 01 add $0x1,%edx 2a3: 8d 0c 89 lea (%ecx,%ecx,4),%ecx 2a6: 8d 4c 48 d0 lea -0x30(%eax,%ecx,2),%ecx while('0' <= *s && *s <= '9') 2aa: 0f be 02 movsbl (%edx),%eax 2ad: 8d 58 d0 lea -0x30(%eax),%ebx 2b0: 80 fb 09 cmp $0x9,%bl 2b3: 76 eb jbe 2a0 <atoi+0x20> return n; } 2b5: 89 c8 mov %ecx,%eax 2b7: 5b pop %ebx 2b8: 5d pop %ebp 2b9: c3 ret 2ba: 8d b6 00 00 00 00 lea 0x0(%esi),%esi 000002c0 <memmove>: void* memmove(void *vdst, const void *vsrc, int n) { 2c0: f3 0f 1e fb endbr32 2c4: 55 push %ebp 2c5: 89 e5 mov %esp,%ebp 2c7: 57 push %edi 2c8: 8b 45 10 mov 0x10(%ebp),%eax 2cb: 8b 55 08 mov 0x8(%ebp),%edx 2ce: 56 push %esi 2cf: 8b 75 0c mov 0xc(%ebp),%esi char *dst; const char *src; dst = vdst; src = vsrc; while(n-- > 0) 2d2: 85 c0 test %eax,%eax 2d4: 7e 0f jle 2e5 <memmove+0x25> 2d6: 01 d0 add %edx,%eax dst = vdst; 2d8: 89 d7 mov %edx,%edi 2da: 8d b6 00 00 00 00 lea 0x0(%esi),%esi *dst++ = *src++; 2e0: a4 movsb %ds:(%esi),%es:(%edi) while(n-- > 0) 2e1: 39 f8 cmp %edi,%eax 2e3: 75 fb jne 2e0 <memmove+0x20> return vdst; } 2e5: 5e pop %esi 2e6: 89 d0 mov %edx,%eax 2e8: 5f pop %edi 2e9: 5d pop %ebp 2ea: c3 ret 2eb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 2ef: 90 nop 000002f0 <thread_join>: void* stack; stack =malloc(4096); //pgsize return clone(start_routine,arg1,arg2,stack); } int thread_join() { 2f0: f3 0f 1e fb endbr32 2f4: 55 push %ebp 2f5: 89 e5 mov %esp,%ebp 2f7: 83 ec 24 sub $0x24,%esp void * stackPtr; int x = join(&stackPtr); 2fa: 8d 45 f4 lea -0xc(%ebp),%eax 2fd: 50 push %eax 2fe: e8 f2 02 00 00 call 5f5 <join> return x; } 303: c9 leave 304: c3 ret 305: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 30c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 00000310 <lock_init>: void lock_init(struct lock_t *lk){ 310: f3 0f 1e fb endbr32 314: 55 push %ebp 315: 89 e5 mov %esp,%ebp lk->locked=0; //intialize as unnlocked 317: 8b 45 08 mov 0x8(%ebp),%eax 31a: c7 00 00 00 00 00 movl $0x0,(%eax) } 320: 5d pop %ebp 321: c3 ret 322: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 329: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 00000330 <lock_acquire>: void lock_acquire(struct lock_t *lk){ 330: f3 0f 1e fb endbr32 334: 55 push %ebp xchg(volatile uint *addr, uint newval) { uint result; // The + in "+m" denotes a read-modify-write operand. asm volatile("lock; xchgl %0, %1" : 335: b9 01 00 00 00 mov $0x1,%ecx 33a: 89 e5 mov %esp,%ebp 33c: 8b 55 08 mov 0x8(%ebp),%edx 33f: 90 nop 340: 89 c8 mov %ecx,%eax 342: f0 87 02 lock xchg %eax,(%edx) while(xchg(&lk->locked,1) != 0); 345: 85 c0 test %eax,%eax 347: 75 f7 jne 340 <lock_acquire+0x10> } 349: 5d pop %ebp 34a: c3 ret 34b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 34f: 90 nop 00000350 <lock_release>: void lock_release(struct lock_t *lk){ 350: f3 0f 1e fb endbr32 354: 55 push %ebp 355: 31 c0 xor %eax,%eax 357: 89 e5 mov %esp,%ebp 359: 8b 55 08 mov 0x8(%ebp),%edx 35c: f0 87 02 lock xchg %eax,(%edx) xchg(&lk->locked,0) ; } 35f: 5d pop %ebp 360: c3 ret 361: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 368: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 36f: 90 nop 00000370 <free>: static Header base; static Header *freep; void free(void *ap) { 370: f3 0f 1e fb endbr32 374: 55 push %ebp Header *bp, *p; bp = (Header*)ap - 1; for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 375: a1 14 0c 00 00 mov 0xc14,%eax { 37a: 89 e5 mov %esp,%ebp 37c: 57 push %edi 37d: 56 push %esi 37e: 53 push %ebx 37f: 8b 5d 08 mov 0x8(%ebp),%ebx 382: 8b 10 mov (%eax),%edx bp = (Header*)ap - 1; 384: 8d 4b f8 lea -0x8(%ebx),%ecx for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 387: 39 c8 cmp %ecx,%eax 389: 73 15 jae 3a0 <free+0x30> 38b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 38f: 90 nop 390: 39 d1 cmp %edx,%ecx 392: 72 14 jb 3a8 <free+0x38> if(p >= p->s.ptr && (bp > p || bp < p->s.ptr)) 394: 39 d0 cmp %edx,%eax 396: 73 10 jae 3a8 <free+0x38> { 398: 89 d0 mov %edx,%eax for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 39a: 8b 10 mov (%eax),%edx 39c: 39 c8 cmp %ecx,%eax 39e: 72 f0 jb 390 <free+0x20> if(p >= p->s.ptr && (bp > p || bp < p->s.ptr)) 3a0: 39 d0 cmp %edx,%eax 3a2: 72 f4 jb 398 <free+0x28> 3a4: 39 d1 cmp %edx,%ecx 3a6: 73 f0 jae 398 <free+0x28> break; if(bp + bp->s.size == p->s.ptr){ 3a8: 8b 73 fc mov -0x4(%ebx),%esi 3ab: 8d 3c f1 lea (%ecx,%esi,8),%edi 3ae: 39 fa cmp %edi,%edx 3b0: 74 1e je 3d0 <free+0x60> bp->s.size += p->s.ptr->s.size; bp->s.ptr = p->s.ptr->s.ptr; } else bp->s.ptr = p->s.ptr; 3b2: 89 53 f8 mov %edx,-0x8(%ebx) if(p + p->s.size == bp){ 3b5: 8b 50 04 mov 0x4(%eax),%edx 3b8: 8d 34 d0 lea (%eax,%edx,8),%esi 3bb: 39 f1 cmp %esi,%ecx 3bd: 74 28 je 3e7 <free+0x77> p->s.size += bp->s.size; p->s.ptr = bp->s.ptr; } else p->s.ptr = bp; 3bf: 89 08 mov %ecx,(%eax) freep = p; } 3c1: 5b pop %ebx freep = p; 3c2: a3 14 0c 00 00 mov %eax,0xc14 } 3c7: 5e pop %esi 3c8: 5f pop %edi 3c9: 5d pop %ebp 3ca: c3 ret 3cb: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 3cf: 90 nop bp->s.size += p->s.ptr->s.size; 3d0: 03 72 04 add 0x4(%edx),%esi 3d3: 89 73 fc mov %esi,-0x4(%ebx) bp->s.ptr = p->s.ptr->s.ptr; 3d6: 8b 10 mov (%eax),%edx 3d8: 8b 12 mov (%edx),%edx 3da: 89 53 f8 mov %edx,-0x8(%ebx) if(p + p->s.size == bp){ 3dd: 8b 50 04 mov 0x4(%eax),%edx 3e0: 8d 34 d0 lea (%eax,%edx,8),%esi 3e3: 39 f1 cmp %esi,%ecx 3e5: 75 d8 jne 3bf <free+0x4f> p->s.size += bp->s.size; 3e7: 03 53 fc add -0x4(%ebx),%edx freep = p; 3ea: a3 14 0c 00 00 mov %eax,0xc14 p->s.size += bp->s.size; 3ef: 89 50 04 mov %edx,0x4(%eax) p->s.ptr = bp->s.ptr; 3f2: 8b 53 f8 mov -0x8(%ebx),%edx 3f5: 89 10 mov %edx,(%eax) } 3f7: 5b pop %ebx 3f8: 5e pop %esi 3f9: 5f pop %edi 3fa: 5d pop %ebp 3fb: c3 ret 3fc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 00000400 <malloc>: return freep; } void* malloc(uint nbytes) { 400: f3 0f 1e fb endbr32 404: 55 push %ebp 405: 89 e5 mov %esp,%ebp 407: 57 push %edi 408: 56 push %esi 409: 53 push %ebx 40a: 83 ec 1c sub $0x1c,%esp Header *p, *prevp; uint nunits; nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1; 40d: 8b 45 08 mov 0x8(%ebp),%eax if((prevp = freep) == 0){ 410: 8b 3d 14 0c 00 00 mov 0xc14,%edi nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1; 416: 8d 70 07 lea 0x7(%eax),%esi 419: c1 ee 03 shr $0x3,%esi 41c: 83 c6 01 add $0x1,%esi if((prevp = freep) == 0){ 41f: 85 ff test %edi,%edi 421: 0f 84 a9 00 00 00 je 4d0 <malloc+0xd0> base.s.ptr = freep = prevp = &base; base.s.size = 0; } for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 427: 8b 07 mov (%edi),%eax if(p->s.size >= nunits){ 429: 8b 48 04 mov 0x4(%eax),%ecx 42c: 39 f1 cmp %esi,%ecx 42e: 73 6d jae 49d <malloc+0x9d> 430: 81 fe 00 10 00 00 cmp $0x1000,%esi 436: bb 00 10 00 00 mov $0x1000,%ebx 43b: 0f 43 de cmovae %esi,%ebx p = sbrk(nu * sizeof(Header)); 43e: 8d 0c dd 00 00 00 00 lea 0x0(,%ebx,8),%ecx 445: 89 4d e4 mov %ecx,-0x1c(%ebp) 448: eb 17 jmp 461 <malloc+0x61> 44a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 450: 8b 10 mov (%eax),%edx if(p->s.size >= nunits){ 452: 8b 4a 04 mov 0x4(%edx),%ecx 455: 39 f1 cmp %esi,%ecx 457: 73 4f jae 4a8 <malloc+0xa8> 459: 8b 3d 14 0c 00 00 mov 0xc14,%edi 45f: 89 d0 mov %edx,%eax p->s.size = nunits; } freep = prevp; return (void*)(p + 1); } if(p == freep) 461: 39 c7 cmp %eax,%edi 463: 75 eb jne 450 <malloc+0x50> p = sbrk(nu * sizeof(Header)); 465: 83 ec 0c sub $0xc,%esp 468: ff 75 e4 pushl -0x1c(%ebp) 46b: e8 65 01 00 00 call 5d5 <sbrk> if(p == (char*)-1) 470: 83 c4 10 add $0x10,%esp 473: 83 f8 ff cmp $0xffffffff,%eax 476: 74 1b je 493 <malloc+0x93> hp->s.size = nu; 478: 89 58 04 mov %ebx,0x4(%eax) free((void*)(hp + 1)); 47b: 83 ec 0c sub $0xc,%esp 47e: 83 c0 08 add $0x8,%eax 481: 50 push %eax 482: e8 e9 fe ff ff call 370 <free> return freep; 487: a1 14 0c 00 00 mov 0xc14,%eax if((p = morecore(nunits)) == 0) 48c: 83 c4 10 add $0x10,%esp 48f: 85 c0 test %eax,%eax 491: 75 bd jne 450 <malloc+0x50> return 0; } } 493: 8d 65 f4 lea -0xc(%ebp),%esp return 0; 496: 31 c0 xor %eax,%eax } 498: 5b pop %ebx 499: 5e pop %esi 49a: 5f pop %edi 49b: 5d pop %ebp 49c: c3 ret if(p->s.size >= nunits){ 49d: 89 c2 mov %eax,%edx 49f: 89 f8 mov %edi,%eax 4a1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi if(p->s.size == nunits) 4a8: 39 ce cmp %ecx,%esi 4aa: 74 54 je 500 <malloc+0x100> p->s.size -= nunits; 4ac: 29 f1 sub %esi,%ecx 4ae: 89 4a 04 mov %ecx,0x4(%edx) p += p->s.size; 4b1: 8d 14 ca lea (%edx,%ecx,8),%edx p->s.size = nunits; 4b4: 89 72 04 mov %esi,0x4(%edx) freep = prevp; 4b7: a3 14 0c 00 00 mov %eax,0xc14 } 4bc: 8d 65 f4 lea -0xc(%ebp),%esp return (void*)(p + 1); 4bf: 8d 42 08 lea 0x8(%edx),%eax } 4c2: 5b pop %ebx 4c3: 5e pop %esi 4c4: 5f pop %edi 4c5: 5d pop %ebp 4c6: c3 ret 4c7: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 4ce: 66 90 xchg %ax,%ax base.s.ptr = freep = prevp = &base; 4d0: c7 05 14 0c 00 00 18 movl $0xc18,0xc14 4d7: 0c 00 00 base.s.size = 0; 4da: bf 18 0c 00 00 mov $0xc18,%edi base.s.ptr = freep = prevp = &base; 4df: c7 05 18 0c 00 00 18 movl $0xc18,0xc18 4e6: 0c 00 00 for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 4e9: 89 f8 mov %edi,%eax base.s.size = 0; 4eb: c7 05 1c 0c 00 00 00 movl $0x0,0xc1c 4f2: 00 00 00 if(p->s.size >= nunits){ 4f5: e9 36 ff ff ff jmp 430 <malloc+0x30> 4fa: 8d b6 00 00 00 00 lea 0x0(%esi),%esi prevp->s.ptr = p->s.ptr; 500: 8b 0a mov (%edx),%ecx 502: 89 08 mov %ecx,(%eax) 504: eb b1 jmp 4b7 <malloc+0xb7> 506: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 50d: 8d 76 00 lea 0x0(%esi),%esi 00000510 <thread_create>: { 510: f3 0f 1e fb endbr32 514: 55 push %ebp 515: 89 e5 mov %esp,%ebp 517: 83 ec 14 sub $0x14,%esp stack =malloc(4096); //pgsize 51a: 68 00 10 00 00 push $0x1000 51f: e8 dc fe ff ff call 400 <malloc> return clone(start_routine,arg1,arg2,stack); 524: 50 push %eax 525: ff 75 10 pushl 0x10(%ebp) 528: ff 75 0c pushl 0xc(%ebp) 52b: ff 75 08 pushl 0x8(%ebp) 52e: e8 ba 00 00 00 call 5ed <clone> } 533: c9 leave 534: c3 ret 00000535 <fork>: name: \ movl $SYS_ ## name, %eax; \ int $T_SYSCALL; \ ret SYSCALL(fork) 535: b8 01 00 00 00 mov $0x1,%eax 53a: cd 40 int $0x40 53c: c3 ret 0000053d <exit>: SYSCALL(exit) 53d: b8 02 00 00 00 mov $0x2,%eax 542: cd 40 int $0x40 544: c3 ret 00000545 <wait>: SYSCALL(wait) 545: b8 03 00 00 00 mov $0x3,%eax 54a: cd 40 int $0x40 54c: c3 ret 0000054d <pipe>: SYSCALL(pipe) 54d: b8 04 00 00 00 mov $0x4,%eax 552: cd 40 int $0x40 554: c3 ret 00000555 <read>: SYSCALL(read) 555: b8 05 00 00 00 mov $0x5,%eax 55a: cd 40 int $0x40 55c: c3 ret 0000055d <write>: SYSCALL(write) 55d: b8 10 00 00 00 mov $0x10,%eax 562: cd 40 int $0x40 564: c3 ret 00000565 <close>: SYSCALL(close) 565: b8 15 00 00 00 mov $0x15,%eax 56a: cd 40 int $0x40 56c: c3 ret 0000056d <kill>: SYSCALL(kill) 56d: b8 06 00 00 00 mov $0x6,%eax 572: cd 40 int $0x40 574: c3 ret 00000575 <exec>: SYSCALL(exec) 575: b8 07 00 00 00 mov $0x7,%eax 57a: cd 40 int $0x40 57c: c3 ret 0000057d <open>: SYSCALL(open) 57d: b8 0f 00 00 00 mov $0xf,%eax 582: cd 40 int $0x40 584: c3 ret 00000585 <mknod>: SYSCALL(mknod) 585: b8 11 00 00 00 mov $0x11,%eax 58a: cd 40 int $0x40 58c: c3 ret 0000058d <unlink>: SYSCALL(unlink) 58d: b8 12 00 00 00 mov $0x12,%eax 592: cd 40 int $0x40 594: c3 ret 00000595 <fstat>: SYSCALL(fstat) 595: b8 08 00 00 00 mov $0x8,%eax 59a: cd 40 int $0x40 59c: c3 ret 0000059d <link>: SYSCALL(link) 59d: b8 13 00 00 00 mov $0x13,%eax 5a2: cd 40 int $0x40 5a4: c3 ret 000005a5 <mkdir>: SYSCALL(mkdir) 5a5: b8 14 00 00 00 mov $0x14,%eax 5aa: cd 40 int $0x40 5ac: c3 ret 000005ad <chdir>: SYSCALL(chdir) 5ad: b8 09 00 00 00 mov $0x9,%eax 5b2: cd 40 int $0x40 5b4: c3 ret 000005b5 <dup>: SYSCALL(dup) 5b5: b8 0a 00 00 00 mov $0xa,%eax 5ba: cd 40 int $0x40 5bc: c3 ret 000005bd <getpid>: SYSCALL(getpid) 5bd: b8 0b 00 00 00 mov $0xb,%eax 5c2: cd 40 int $0x40 5c4: c3 ret 000005c5 <getyear>: SYSCALL(getyear) 5c5: b8 16 00 00 00 mov $0x16,%eax 5ca: cd 40 int $0x40 5cc: c3 ret 000005cd <getreadcount>: SYSCALL(getreadcount) 5cd: b8 17 00 00 00 mov $0x17,%eax 5d2: cd 40 int $0x40 5d4: c3 ret 000005d5 <sbrk>: SYSCALL(sbrk) 5d5: b8 0c 00 00 00 mov $0xc,%eax 5da: cd 40 int $0x40 5dc: c3 ret 000005dd <sleep>: SYSCALL(sleep) 5dd: b8 0d 00 00 00 mov $0xd,%eax 5e2: cd 40 int $0x40 5e4: c3 ret 000005e5 <uptime>: SYSCALL(uptime) 5e5: b8 0e 00 00 00 mov $0xe,%eax 5ea: cd 40 int $0x40 5ec: c3 ret 000005ed <clone>: SYSCALL(clone) 5ed: b8 18 00 00 00 mov $0x18,%eax 5f2: cd 40 int $0x40 5f4: c3 ret 000005f5 <join>: SYSCALL(join) 5f5: b8 19 00 00 00 mov $0x19,%eax 5fa: cd 40 int $0x40 5fc: c3 ret 5fd: 66 90 xchg %ax,%ax 5ff: 90 nop 00000600 <printint>: write(fd, &c, 1); } static void printint(int fd, int xx, int base, int sgn) { 600: 55 push %ebp 601: 89 e5 mov %esp,%ebp 603: 57 push %edi 604: 56 push %esi 605: 53 push %ebx 606: 83 ec 3c sub $0x3c,%esp 609: 89 4d c4 mov %ecx,-0x3c(%ebp) uint x; neg = 0; if(sgn && xx < 0){ neg = 1; x = -xx; 60c: 89 d1 mov %edx,%ecx { 60e: 89 45 b8 mov %eax,-0x48(%ebp) if(sgn && xx < 0){ 611: 85 d2 test %edx,%edx 613: 0f 89 7f 00 00 00 jns 698 <printint+0x98> 619: f6 45 08 01 testb $0x1,0x8(%ebp) 61d: 74 79 je 698 <printint+0x98> neg = 1; 61f: c7 45 bc 01 00 00 00 movl $0x1,-0x44(%ebp) x = -xx; 626: f7 d9 neg %ecx } else { x = xx; } i = 0; 628: 31 db xor %ebx,%ebx 62a: 8d 75 d7 lea -0x29(%ebp),%esi 62d: 8d 76 00 lea 0x0(%esi),%esi do{ buf[i++] = digits[x % base]; 630: 89 c8 mov %ecx,%eax 632: 31 d2 xor %edx,%edx 634: 89 cf mov %ecx,%edi 636: f7 75 c4 divl -0x3c(%ebp) 639: 0f b6 92 b0 08 00 00 movzbl 0x8b0(%edx),%edx 640: 89 45 c0 mov %eax,-0x40(%ebp) 643: 89 d8 mov %ebx,%eax 645: 8d 5b 01 lea 0x1(%ebx),%ebx }while((x /= base) != 0); 648: 8b 4d c0 mov -0x40(%ebp),%ecx buf[i++] = digits[x % base]; 64b: 88 14 1e mov %dl,(%esi,%ebx,1) }while((x /= base) != 0); 64e: 39 7d c4 cmp %edi,-0x3c(%ebp) 651: 76 dd jbe 630 <printint+0x30> if(neg) 653: 8b 4d bc mov -0x44(%ebp),%ecx 656: 85 c9 test %ecx,%ecx 658: 74 0c je 666 <printint+0x66> buf[i++] = '-'; 65a: c6 44 1d d8 2d movb $0x2d,-0x28(%ebp,%ebx,1) buf[i++] = digits[x % base]; 65f: 89 d8 mov %ebx,%eax buf[i++] = '-'; 661: ba 2d 00 00 00 mov $0x2d,%edx while(--i >= 0) 666: 8b 7d b8 mov -0x48(%ebp),%edi 669: 8d 5c 05 d7 lea -0x29(%ebp,%eax,1),%ebx 66d: eb 07 jmp 676 <printint+0x76> 66f: 90 nop 670: 0f b6 13 movzbl (%ebx),%edx 673: 83 eb 01 sub $0x1,%ebx write(fd, &c, 1); 676: 83 ec 04 sub $0x4,%esp 679: 88 55 d7 mov %dl,-0x29(%ebp) 67c: 6a 01 push $0x1 67e: 56 push %esi 67f: 57 push %edi 680: e8 d8 fe ff ff call 55d <write> while(--i >= 0) 685: 83 c4 10 add $0x10,%esp 688: 39 de cmp %ebx,%esi 68a: 75 e4 jne 670 <printint+0x70> putc(fd, buf[i]); } 68c: 8d 65 f4 lea -0xc(%ebp),%esp 68f: 5b pop %ebx 690: 5e pop %esi 691: 5f pop %edi 692: 5d pop %ebp 693: c3 ret 694: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi neg = 0; 698: c7 45 bc 00 00 00 00 movl $0x0,-0x44(%ebp) 69f: eb 87 jmp 628 <printint+0x28> 6a1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 6a8: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 6af: 90 nop 000006b0 <printf>: // Print to the given fd. Only understands %d, %x, %p, %s. void printf(int fd, const char *fmt, ...) { 6b0: f3 0f 1e fb endbr32 6b4: 55 push %ebp 6b5: 89 e5 mov %esp,%ebp 6b7: 57 push %edi 6b8: 56 push %esi 6b9: 53 push %ebx 6ba: 83 ec 2c sub $0x2c,%esp int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 6bd: 8b 75 0c mov 0xc(%ebp),%esi 6c0: 0f b6 1e movzbl (%esi),%ebx 6c3: 84 db test %bl,%bl 6c5: 0f 84 b4 00 00 00 je 77f <printf+0xcf> ap = (uint*)(void*)&fmt + 1; 6cb: 8d 45 10 lea 0x10(%ebp),%eax 6ce: 83 c6 01 add $0x1,%esi write(fd, &c, 1); 6d1: 8d 7d e7 lea -0x19(%ebp),%edi state = 0; 6d4: 31 d2 xor %edx,%edx ap = (uint*)(void*)&fmt + 1; 6d6: 89 45 d0 mov %eax,-0x30(%ebp) 6d9: eb 33 jmp 70e <printf+0x5e> 6db: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 6df: 90 nop 6e0: 89 55 d4 mov %edx,-0x2c(%ebp) c = fmt[i] & 0xff; if(state == 0){ if(c == '%'){ state = '%'; 6e3: ba 25 00 00 00 mov $0x25,%edx if(c == '%'){ 6e8: 83 f8 25 cmp $0x25,%eax 6eb: 74 17 je 704 <printf+0x54> write(fd, &c, 1); 6ed: 83 ec 04 sub $0x4,%esp 6f0: 88 5d e7 mov %bl,-0x19(%ebp) 6f3: 6a 01 push $0x1 6f5: 57 push %edi 6f6: ff 75 08 pushl 0x8(%ebp) 6f9: e8 5f fe ff ff call 55d <write> 6fe: 8b 55 d4 mov -0x2c(%ebp),%edx } else { putc(fd, c); 701: 83 c4 10 add $0x10,%esp for(i = 0; fmt[i]; i++){ 704: 0f b6 1e movzbl (%esi),%ebx 707: 83 c6 01 add $0x1,%esi 70a: 84 db test %bl,%bl 70c: 74 71 je 77f <printf+0xcf> c = fmt[i] & 0xff; 70e: 0f be cb movsbl %bl,%ecx 711: 0f b6 c3 movzbl %bl,%eax if(state == 0){ 714: 85 d2 test %edx,%edx 716: 74 c8 je 6e0 <printf+0x30> } } else if(state == '%'){ 718: 83 fa 25 cmp $0x25,%edx 71b: 75 e7 jne 704 <printf+0x54> if(c == 'd'){ 71d: 83 f8 64 cmp $0x64,%eax 720: 0f 84 9a 00 00 00 je 7c0 <printf+0x110> printint(fd, *ap, 10, 1); ap++; } else if(c == 'x' || c == 'p'){ 726: 81 e1 f7 00 00 00 and $0xf7,%ecx 72c: 83 f9 70 cmp $0x70,%ecx 72f: 74 5f je 790 <printf+0xe0> printint(fd, *ap, 16, 0); ap++; } else if(c == 's'){ 731: 83 f8 73 cmp $0x73,%eax 734: 0f 84 d6 00 00 00 je 810 <printf+0x160> s = "(null)"; while(*s != 0){ putc(fd, *s); s++; } } else if(c == 'c'){ 73a: 83 f8 63 cmp $0x63,%eax 73d: 0f 84 8d 00 00 00 je 7d0 <printf+0x120> putc(fd, *ap); ap++; } else if(c == '%'){ 743: 83 f8 25 cmp $0x25,%eax 746: 0f 84 b4 00 00 00 je 800 <printf+0x150> write(fd, &c, 1); 74c: 83 ec 04 sub $0x4,%esp 74f: c6 45 e7 25 movb $0x25,-0x19(%ebp) 753: 6a 01 push $0x1 755: 57 push %edi 756: ff 75 08 pushl 0x8(%ebp) 759: e8 ff fd ff ff call 55d <write> putc(fd, c); } else { // Unknown % sequence. Print it to draw attention. putc(fd, '%'); putc(fd, c); 75e: 88 5d e7 mov %bl,-0x19(%ebp) write(fd, &c, 1); 761: 83 c4 0c add $0xc,%esp 764: 6a 01 push $0x1 766: 83 c6 01 add $0x1,%esi 769: 57 push %edi 76a: ff 75 08 pushl 0x8(%ebp) 76d: e8 eb fd ff ff call 55d <write> for(i = 0; fmt[i]; i++){ 772: 0f b6 5e ff movzbl -0x1(%esi),%ebx putc(fd, c); 776: 83 c4 10 add $0x10,%esp } state = 0; 779: 31 d2 xor %edx,%edx for(i = 0; fmt[i]; i++){ 77b: 84 db test %bl,%bl 77d: 75 8f jne 70e <printf+0x5e> } } } 77f: 8d 65 f4 lea -0xc(%ebp),%esp 782: 5b pop %ebx 783: 5e pop %esi 784: 5f pop %edi 785: 5d pop %ebp 786: c3 ret 787: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 78e: 66 90 xchg %ax,%ax printint(fd, *ap, 16, 0); 790: 83 ec 0c sub $0xc,%esp 793: b9 10 00 00 00 mov $0x10,%ecx 798: 6a 00 push $0x0 79a: 8b 5d d0 mov -0x30(%ebp),%ebx 79d: 8b 45 08 mov 0x8(%ebp),%eax 7a0: 8b 13 mov (%ebx),%edx 7a2: e8 59 fe ff ff call 600 <printint> ap++; 7a7: 89 d8 mov %ebx,%eax 7a9: 83 c4 10 add $0x10,%esp state = 0; 7ac: 31 d2 xor %edx,%edx ap++; 7ae: 83 c0 04 add $0x4,%eax 7b1: 89 45 d0 mov %eax,-0x30(%ebp) 7b4: e9 4b ff ff ff jmp 704 <printf+0x54> 7b9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi printint(fd, *ap, 10, 1); 7c0: 83 ec 0c sub $0xc,%esp 7c3: b9 0a 00 00 00 mov $0xa,%ecx 7c8: 6a 01 push $0x1 7ca: eb ce jmp 79a <printf+0xea> 7cc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi putc(fd, *ap); 7d0: 8b 5d d0 mov -0x30(%ebp),%ebx write(fd, &c, 1); 7d3: 83 ec 04 sub $0x4,%esp putc(fd, *ap); 7d6: 8b 03 mov (%ebx),%eax write(fd, &c, 1); 7d8: 6a 01 push $0x1 ap++; 7da: 83 c3 04 add $0x4,%ebx write(fd, &c, 1); 7dd: 57 push %edi 7de: ff 75 08 pushl 0x8(%ebp) putc(fd, *ap); 7e1: 88 45 e7 mov %al,-0x19(%ebp) write(fd, &c, 1); 7e4: e8 74 fd ff ff call 55d <write> ap++; 7e9: 89 5d d0 mov %ebx,-0x30(%ebp) 7ec: 83 c4 10 add $0x10,%esp state = 0; 7ef: 31 d2 xor %edx,%edx 7f1: e9 0e ff ff ff jmp 704 <printf+0x54> 7f6: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 7fd: 8d 76 00 lea 0x0(%esi),%esi putc(fd, c); 800: 88 5d e7 mov %bl,-0x19(%ebp) write(fd, &c, 1); 803: 83 ec 04 sub $0x4,%esp 806: e9 59 ff ff ff jmp 764 <printf+0xb4> 80b: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 80f: 90 nop s = (char*)*ap; 810: 8b 45 d0 mov -0x30(%ebp),%eax 813: 8b 18 mov (%eax),%ebx ap++; 815: 83 c0 04 add $0x4,%eax 818: 89 45 d0 mov %eax,-0x30(%ebp) if(s == 0) 81b: 85 db test %ebx,%ebx 81d: 74 17 je 836 <printf+0x186> while(*s != 0){ 81f: 0f b6 03 movzbl (%ebx),%eax state = 0; 822: 31 d2 xor %edx,%edx while(*s != 0){ 824: 84 c0 test %al,%al 826: 0f 84 d8 fe ff ff je 704 <printf+0x54> 82c: 89 75 d4 mov %esi,-0x2c(%ebp) 82f: 89 de mov %ebx,%esi 831: 8b 5d 08 mov 0x8(%ebp),%ebx 834: eb 1a jmp 850 <printf+0x1a0> s = "(null)"; 836: bb a8 08 00 00 mov $0x8a8,%ebx while(*s != 0){ 83b: 89 75 d4 mov %esi,-0x2c(%ebp) 83e: b8 28 00 00 00 mov $0x28,%eax 843: 89 de mov %ebx,%esi 845: 8b 5d 08 mov 0x8(%ebp),%ebx 848: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 84f: 90 nop write(fd, &c, 1); 850: 83 ec 04 sub $0x4,%esp s++; 853: 83 c6 01 add $0x1,%esi 856: 88 45 e7 mov %al,-0x19(%ebp) write(fd, &c, 1); 859: 6a 01 push $0x1 85b: 57 push %edi 85c: 53 push %ebx 85d: e8 fb fc ff ff call 55d <write> while(*s != 0){ 862: 0f b6 06 movzbl (%esi),%eax 865: 83 c4 10 add $0x10,%esp 868: 84 c0 test %al,%al 86a: 75 e4 jne 850 <printf+0x1a0> 86c: 8b 75 d4 mov -0x2c(%ebp),%esi state = 0; 86f: 31 d2 xor %edx,%edx 871: e9 8e fe ff ff jmp 704 <printf+0x54>
Sources/Globe_3d/models/dreadnought.ads
ForYouEyesOnly/Space-Convoy
1
27246
<reponame>ForYouEyesOnly/Space-Convoy -- * Output of max2ada.ms, a GMax / 3D Studio Max script for exporting to GLOBE_3D -- -- * Copy and paste these lines from the Listener into a -- text editor, and save the package as an .ada file. -- * Alternatively, use the GMaxSLGRAB.exe tool. -- * For GNAT, you must save the specification as an .ads file -- and the body as an .adb file, or run gnatchop on the whole .ada file. -- Title : Dreadnought -- Subject : Dreadnought class Heavy Cruiser : a space cruiser inspired by Sulaco from Aliens. -- Author : Xenodroid -- File name : dreadnought_g3d.gmax -- File path : C:\Ada\GL\3dmodels\dreadnought\ with GLOBE_3D; package Dreadnought is procedure Create ( object : in out GLOBE_3D.p_Object_3D; scale : GLOBE_3D.Real; centre : GLOBE_3D.Point_3D; alum_001, grumnoir, tole_001, alum_002 : GLOBE_3D.Image_ID ); end Dreadnought;
msp430-gcc-tics/msp430-gcc-7.3.1.24-source-full/gcc/gcc/testsuite/gnat.dg/prot3.adb
TUDSSL/TICS
7
18855
-- { dg-do run } with Prot3_Pkg; use Prot3_Pkg; procedure Prot3 is begin P.Foo (4); end;
libsrc/target/sos/sos/sos_file_callee.asm
ahjelm/z88dk
640
171322
; ; S-OS specific routines ; by <NAME>, 2013 ; ; Set the current S-OS file name and type ; ; ; int sos_file(char *name,type) ; ; ; $Id: sos_file_callee.asm,v 1.5 2016-06-19 20:58:00 dom Exp $ ; SECTION code_clib PUBLIC sos_file_callee PUBLIC _sos_file_callee PUBLIC asm_sos_file sos_file_callee: _sos_file_callee: pop bc pop hl pop de push bc ; enter : dl = *name ; l = type .asm_sos_file ;jr asmentry ld a,l call $1fa3 ld hl,0 ; return code, nothing (yet) implemented ret
language/grammar/Javel.g4
bjansen/javel
0
2672
<reponame>bjansen/javel grammar Javel; program : statement* EOF ; statement : methodCall ';' ; methodCall : IDENTIFIER arguments ; arguments : '()' ; PAREN : '()'; IDENTIFIER : [a-z]+; WS : [ \t\r\n]+ -> skip;
scripts/launch/mac/launch_iTerm.scpt
Yourrrrlove/flat
0
4398
<filename>scripts/launch/mac/launch_iTerm.scpt tell application "iTerm" activate set W to create window with default profile tell W's current session split vertically with default profile end tell set T to W's current tab set ProjectRoot to "$(dirname $(dirname $(dirname $(dirname " & (POSIX path of (path to me)) & "))))" write T's session 1 text "pnpm --filter renderer-app start" write T's session 2 text "pnpm --filter flat start" end tell
alloy/if_multiple_statements.als
koko1996/EECS-4302-Project
0
1176
<reponame>koko1996/EECS-4302-Project sig num { arg1: Int, //x arg2: Int, //y arg3: Int //z } fun multipleStatementConditional (v : num) : num { {res : num | res.arg1 = ((v.arg2 < v.arg3) => v.arg1.add[1] else v.arg1.add[3]) and res.arg2 = ((v.arg2 < v.arg3) => v.arg2.add[1] else v.arg2) and res.arg3 = ((v.arg2 < v.arg3) => v.arg3 else v.arg3.add[5]) } } pred multipleStatementConditionalEnsure [prevals, postvals : num] { multipleStatementConditional[prevals] = postvals } assert mulState { all v: num | v.arg2 < v.arg3 => multipleStatementConditionalEnsure[v, {post: num | post.arg1 = v.arg1.add[1] and post.arg2 = v.arg2.add[1] and post.arg3 = v.arg3}] else multipleStatementConditionalEnsure[v, {post: num | post.arg1 = v.arg1.add[3] and post.arg2 = v.arg2 and post.arg3 = v.arg3.add[5]}] } check mulState
programs/oeis/107/A107443.asm
karttu/loda
1
95865
; A107443: G.f. (3*x^2+1)/((1-x)*(2*x^2+x+1)*(2*x^2-x+1)). ; 1,1,1,1,-3,-3,9,9,-11,-11,1,1,45,45,-135,-135,229,229,-143,-143,-483,-483,2025,2025,-4139,-4139,4321,4321,3597,3597,-28071,-28071,69829,69829,-97199,-97199,12285,12285,351945,351945,-1104971,-1104971,1907137,1907137,-1301523,-1301523,-3723975,-3723975 div $0,2 cal $0,174565 ; Expansion of (1+3*x)/((1-x)*(1+3*x+4*x^2)). mov $1,$0
alloy4fun_models/trashltl/models/7/7iBdnN4JFEpo3t6WM.als
Kaixi26/org.alloytools.alloy
0
3141
open main pred id7iBdnN4JFEpo3t6WM_prop8 { always all f: File.link | eventually f in Trash } pred __repair { id7iBdnN4JFEpo3t6WM_prop8 } check __repair { id7iBdnN4JFEpo3t6WM_prop8 <=> prop8o }
src/mail-parsers.ads
stcarrez/ada-mail
2
9695
----------------------------------------------------------------------- -- mail-parsers -- Parse mail content -- Copyright (C) 2020 <NAME> -- Written by <NAME> (<EMAIL>) -- -- Licensed under the Apache License, Version 2.0 (the "License"); -- you may not use this file except in compliance with the License. -- You may obtain a copy of the License at -- -- http://www.apache.org/licenses/LICENSE-2.0 -- -- Unless required by applicable law or agreed to in writing, software -- distributed under the License is distributed on an "AS IS" BASIS, -- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -- See the License for the specific language governing permissions and -- limitations under the License. ----------------------------------------------------------------------- with Ada.Strings.Unbounded; with Util.Streams; private with Util.Streams.Buffered; package Mail.Parsers is type Processor is limited interface; procedure New_Mail (Handler : in out Processor) is abstract; procedure Read_Header (Handler : in out Processor; Name : in String; Content : in String) is abstract; procedure Read_Body (Handler : in out Processor; Line : in String) is abstract; type Parser_Type is tagged limited private; procedure Parse (Parser : in out Parser_Type; Stream : in Util.Streams.Input_Stream_Access; Process : access Processor'Class); private MAX_LENGTH : constant := 998 + 2; type Parser_State is (IN_START, IN_FROM, IN_HEADER, IN_BODY, IN_BODY_QUOTED_PRINTABLE, IN_BODY_PART); type Parser_Type is tagged limited record Has_Pending : Boolean := False; Is_Eof : Boolean := False; Pending : Character; Reader : Util.Streams.Buffered.Input_Buffer_Stream; Line : String (1 .. MAX_LENGTH); Length : Natural := 0; State : Parser_State := IN_START; Content_Type : Ada.Strings.Unbounded.Unbounded_String; Content_Encoding : Ada.Strings.Unbounded.Unbounded_String; Boundary : Ada.Strings.Unbounded.Unbounded_String; end record; procedure Read_Line (Parser : in out Parser_Type); procedure Parse_From (Parser : in out Parser_Type); procedure Parse_Header (Parser : in out Parser_Type; Process : access Processor'Class); procedure Parse_Body (Parser : in out Parser_Type; Process : access Processor'Class); procedure Parse_Body_Part (Parser : in out Parser_Type; Process : access Processor'Class); procedure Set_State (Parser : in out Parser_Type; State : in Parser_State); function Get_Boundary (Parser : in Parser_Type) return String; end Mail.Parsers;
programs/oeis/040/A040314.asm
karttu/loda
1
171760
; A040314: Continued fraction for sqrt(333). ; 18,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36,4,36 sub $0,1 mod $0,2 mul $0,11 add $0,2 pow $0,2 mov $1,$0 sub $1,2 div $1,10 mul $1,2 add $1,4
commands/apps/sidenotes/sidenotes-create-note.applescript
daviddzhou/script-commands
3,305
4524
#!/usr/bin/osascript # Dependency: Requires SideNotes (https://apptorium.com/sidenotes) # Required parameters: # @raycast.schemaVersion 1 # @raycast.title SideNotes create # @raycast.mode silent # @raycast.packageName SideNotes # Optional parameters: # @raycast.packageName SideNotes # @raycast.icon images/sidenotes.png # @raycast.argument1 { "type": "text", "placeholder": "Note", "optional": true } # @raycast.argument2 { "type": "text", "placeholder": "Folder", "optional": true } # Documentation: # @raycast.description Create a new note within the selected or the first SideNotes folder. # @raycast.author <NAME> # @raycast.authorURL https://github.com/MarcelBochtler on run argv if application "SideNotes" is not running then log "SideNotes is not running" return end if tell application "SideNotes" set note_content to item 1 of argv set folder_name to item 2 of argv # Create a folder if none exist if (count of folders) is 0 then if folder_name is "" then make new folder with properties {name:note_content} else make new folder with properties {name:folder_name} end if end if set folder_index to my index_of_folder(folder_name, folders) if folder_index is -1 then # Folder not found. Create one if the name is given. # Otherwise create the note in the current or the first folder. if folder_name is not "" then set target_folder to make new folder with properties {name:folder_name} else if current folder is missing value then set target_folder to first folder else set target_folder to current folder end if end if else set target_folder to item folder_index of folders end if set created_note to make new note in target_folder at 1 with properties {text:note_content} open folder target_folder note created_note log "Note created in folder " & (name of target_folder) end tell end run on index_of_folder(folder_name, folder_list) repeat with i from 1 to the count of folder_list if name of item i of folder_list is folder_name then return i end repeat return -1 end index_of_folder
Transynther/x86/_processed/NC/_zr_/i9-9900K_12_0xa0.log_21829_812.asm
ljhsiun2/medusa
9
80093
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r12 push %r9 push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_WT_ht+0x6c72, %r10 nop dec %rbp mov (%r10), %edi nop nop nop nop and %r12, %r12 lea addresses_A_ht+0x1225e, %rsi nop nop nop nop nop cmp %rbx, %rbx movl $0x61626364, (%rsi) xor $62198, %rbx lea addresses_UC_ht+0xce5c, %r12 nop nop nop cmp $32428, %rbx mov $0x6162636465666768, %rdi movq %rdi, %xmm2 vmovups %ymm2, (%r12) nop xor %r12, %r12 lea addresses_WT_ht+0x96de, %rsi lea addresses_WC_ht+0xe1de, %rdi clflush (%rsi) nop nop nop nop nop add $54867, %r9 mov $75, %rcx rep movsq nop xor %r9, %r9 lea addresses_WC_ht+0x14a1e, %r10 and $58032, %rsi mov $0x6162636465666768, %rdi movq %rdi, %xmm0 vmovups %ymm0, (%r10) nop nop and %r9, %r9 lea addresses_normal_ht+0xa7de, %rsi nop nop nop nop nop cmp $29638, %rcx and $0xffffffffffffffc0, %rsi vmovntdqa (%rsi), %ymm7 vextracti128 $1, %ymm7, %xmm7 vpextrq $0, %xmm7, %r9 nop nop nop nop sub $9354, %rbp lea addresses_UC_ht+0x1c1de, %r10 nop nop nop sub %rbx, %rbx mov (%r10), %ecx nop nop nop nop nop cmp %rdi, %rdi lea addresses_normal_ht+0x1eb5e, %rbx nop nop and $17723, %rsi movb (%rbx), %r9b nop nop sub $20019, %r12 lea addresses_D_ht+0xcc1e, %rdi clflush (%rdi) nop nop nop add %r9, %r9 vmovups (%rdi), %ymm3 vextracti128 $1, %ymm3, %xmm3 vpextrq $1, %xmm3, %r12 sub $4874, %r9 lea addresses_WC_ht+0x1c63e, %rsi lea addresses_D_ht+0x1b7de, %rdi nop nop nop nop nop cmp %r12, %r12 mov $52, %rcx rep movsl nop nop nop nop nop sub $42324, %rsi lea addresses_A_ht+0xc1de, %r9 nop nop nop nop xor $22790, %r10 movw $0x6162, (%r9) nop nop nop nop inc %rbx pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %r9 pop %r12 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r13 push %r8 push %rcx push %rdi push %rsi // Store mov $0xf9e, %rcx nop nop nop nop nop and $13211, %r10 mov $0x5152535455565758, %rdi movq %rdi, (%rcx) nop nop nop nop nop xor %r11, %r11 // Store mov $0x421b7e0000000aae, %rsi nop nop nop nop nop dec %rcx mov $0x5152535455565758, %r10 movq %r10, (%rsi) nop nop nop nop nop sub $60895, %r10 // Load mov $0x6af889000000071e, %rcx nop nop nop sub %rsi, %rsi movups (%rcx), %xmm3 vpextrq $1, %xmm3, %r11 // Exception!!! nop nop nop mov (0), %r10 nop nop nop nop cmp %r10, %r10 // Store lea addresses_US+0x469a, %r8 nop nop nop nop add $34666, %rdi movb $0x51, (%r8) nop add %r8, %r8 // Load lea addresses_RW+0x45de, %r10 nop nop xor $8442, %r13 vmovups (%r10), %ymm3 vextracti128 $1, %ymm3, %xmm3 vpextrq $1, %xmm3, %rdi nop add $2238, %rcx // Store lea addresses_A+0x1edfe, %rdi nop nop nop nop nop xor %rcx, %rcx movw $0x5152, (%rdi) nop nop nop cmp $38641, %rcx // Store lea addresses_WC+0x99de, %r8 nop cmp $26770, %rcx mov $0x5152535455565758, %r13 movq %r13, %xmm0 movups %xmm0, (%r8) nop nop add %r13, %r13 // Faulty Load mov $0x3b797c00000001de, %rsi nop nop nop nop sub %rcx, %rcx mov (%rsi), %r8 lea oracles, %rdi and $0xff, %r8 shlq $12, %r8 mov (%rdi,%r8,1), %r8 pop %rsi pop %rdi pop %rcx pop %r8 pop %r13 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': True, 'size': 1}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 5, 'type': 'addresses_P', 'AVXalign': False, 'size': 8}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_NC', 'AVXalign': False, 'size': 8}} {'src': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_NC', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_US', 'AVXalign': False, 'size': 1}} {'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_RW', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_A', 'AVXalign': False, 'size': 2}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_WC', 'AVXalign': False, 'size': 16}} [Faulty Load] {'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 4}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 32}} {'src': {'same': True, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32}} {'src': {'NT': True, 'same': False, 'congruent': 8, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'} {'src': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_UC_ht', 'AVXalign': True, 'size': 4}, 'OP': 'LOAD'} {'src': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'} {'src': {'NT': False, 'same': False, 'congruent': 5, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'} {'src': {'same': False, 'congruent': 5, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_D_ht'}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 2}} {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
examples/echo/echo_example.adb
SALLYPEMDAS/DW1000
9
10276
<reponame>SALLYPEMDAS/DW1000 ------------------------------------------------------------------------------- -- Copyright (c) 2016 <NAME> -- -- Permission is hereby granted, free of charge, to any person obtaining a -- copy of this software and associated documentation files (the "Software"), -- to deal in the Software without restriction, including without limitation -- the rights to use, copy, modify, merge, publish, distribute, sublicense, -- and/or sell copies of the Software, and to permit persons to whom the -- Software is furnished to do so, subject to the following conditions: -- -- The above copyright notice and this permission notice shall be included in -- all copies or substantial portions of the Software. -- -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -- DEALINGS IN THE SOFTWARE. ------------------------------------------------------------------------------- with Ada.Real_Time; use Ada.Real_Time; with DecaDriver; use DecaDriver; with DW1000.BSP; with DW1000.Driver; use DW1000.Driver; with DW1000.System_Time; use DW1000.System_Time; with DW1000.Types; with Tx_Power; -- This example continuously waits for a packet to be received, and then -- re-transmits the received packet after a 500 ms delay. procedure Echo_Example with SPARK_Mode, Global => (Input => Ada.Real_Time.Clock_Time, In_Out => (DW1000.BSP.Device_State, DecaDriver.Driver, DecaDriver.Tx_Complete_Flag)), Depends => (DecaDriver.Driver =>+ (DW1000.BSP.Device_State, DecaDriver.Driver), DW1000.BSP.Device_State =>+ (DecaDriver.Driver), DecaDriver.Tx_Complete_Flag =>+ (DecaDriver.Driver, DW1000.BSP.Device_State), null => Ada.Real_Time.Clock_Time) is Rx_Packet : DW1000.Types.Byte_Array (1 .. 127) := (others => 0); Rx_Packet_Length : DecaDriver.Frame_Length_Number; Rx_Frame_Info : DecaDriver.Frame_Info_Type; Rx_Status : DecaDriver.Rx_Status_Type; Rx_Overrun : Boolean; Rx_Timestamp : DW1000.System_Time.Fine_System_Time; Tx_Timestamp : DW1000.System_Time.Fine_System_Time; Tx_Result : DW1000.Driver.Result_Type; begin -- Driver must be initialized once before it is used. DecaDriver.Driver.Initialize (Load_Antenna_Delay => True, Load_XTAL_Trim => True, Load_UCode_From_ROM => True); -- Configure the DW1000 DecaDriver.Driver.Configure (DecaDriver.Configuration_Type' (Channel => 1, PRF => PRF_64MHz, Tx_Preamble_Length => PLEN_1024, Rx_PAC => PAC_8, Tx_Preamble_Code => 9, Rx_Preamble_Code => 9, Use_Nonstandard_SFD => False, Data_Rate => Data_Rate_110k, PHR_Mode => Standard_Frames, SFD_Timeout => 1024 + 64 + 1)); -- Configure the transmit power for the PRF and channel chosen. -- We use the reference values for the EVB1000 in this example. DW1000.Driver.Configure_Tx_Power (Tx_Power.Manual_Tx_Power_Table (1, PRF_64MHz)); -- Enable the LEDs controlled by the DW1000. DW1000.Driver.Configure_LEDs (Tx_LED_Enable => True, -- Enable transmit LED Rx_LED_Enable => True, -- Enable receive LED Rx_OK_LED_Enable => False, SFD_LED_Enable => False, Test_Flash => True); -- Flash both LEDs once -- In this example we only want to receive valid packets without errors, -- so configure the DW1000 to automatically re-enable the receiver when -- errors occur. The driver will not be notified of receiver errors whilst -- this is enabled. DW1000.Driver.Set_Auto_Rx_Reenable (Enable => True); DecaDriver.Driver.Start_Rx_Immediate; -- Continuously receive packets, and echo them back after a 500 ms delay. loop DecaDriver.Driver.Rx_Wait (Frame => Rx_Packet, Length => Rx_Packet_Length, Frame_Info => Rx_Frame_Info, Status => Rx_Status, Overrun => Rx_Overrun); if Rx_Status = No_Error then -- Limit frame length Rx_Packet_Length := Frame_Length_Number'Min (Rx_Packet_Length, Rx_Packet'Length); -- Get the timestamp at which the packet was received. Rx_Timestamp := DecaDriver.Receive_Timestamp (Rx_Frame_Info); -- We want to send the packet 0.5 seconds after it was received. Tx_Timestamp := System_Time_Offset (Rx_Timestamp, 0.5); -- Configure the transmitter to transmit the packet -- at the delayed time. DW1000.Driver.Set_Delayed_Tx_Rx_Time (Coarse_System_Time (Tx_Timestamp)); -- Load the packet into the transmitter DW1000.Driver.Set_Tx_Data (Data => Rx_Packet (1 .. Rx_Packet_Length), Offset => 0); -- Tell the driver the length of the packet and its position in the -- transmit buffer. DW1000.Driver.Set_Tx_Frame_Length (Length => Rx_Packet_Length, Offset => 0); -- Transmit the delayed packet, and enable the receiver after the -- packet is sent. DecaDriver.Driver.Start_Tx_Delayed (Rx_After_Tx => True, Result => Tx_Result); -- If the target transmit time has already passed (e.g. because we -- took too long to configure the transmitter, etc...) then don't -- transmit and just wait for another packet if Tx_Result /= Success then DecaDriver.Driver.Start_Rx_Immediate; end if; end if; end loop; end Echo_Example;
iAlloy-dataset-master/mutant_version_set/bempl/v1/bempl.als
jringert/alloy-diff
1
1863
module unknown //JOR//open util/integer [] as integer sig Room {} one sig secure_lab extends Room {} abstract sig Person { owns: (set Key) } sig Employee extends Person {} sig Researcher extends Person {} sig Key { authorized: (one Employee), opened_by: (one Room) } pred CanEnter[p: Person,r: Room] { (r in ((p.owns).opened_by)) } fact fact_1 { (no (Employee.owns)) } assert no_thief_in_seclab { (all p: (one Person) { ((CanEnter[p,secure_lab]) => (p in Researcher)) }) } run CanEnter for 80 check no_thief_in_seclab for 120
Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48_notsx.log_21829_1180.asm
ljhsiun2/medusa
9
21305
<gh_stars>1-10 .global s_prepare_buffers s_prepare_buffers: ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r8 push %r9 push %rbp push %rdx push %rsi // Store mov $0xe66, %rsi clflush (%rsi) nop nop inc %r9 movb $0x51, (%rsi) nop nop nop nop nop dec %rdx // Store lea addresses_WC+0x11aa2, %r13 clflush (%r13) nop nop nop nop dec %rbp mov $0x5152535455565758, %r8 movq %r8, %xmm6 movntdq %xmm6, (%r13) nop nop nop nop nop sub %r9, %r9 // Store mov $0x4509510000000466, %r9 clflush (%r9) nop nop dec %r10 mov $0x5152535455565758, %r8 movq %r8, (%r9) nop inc %rsi // Store lea addresses_D+0x10366, %rdx sub $11311, %r9 mov $0x5152535455565758, %r8 movq %r8, %xmm5 movups %xmm5, (%rdx) nop nop nop nop nop add $63929, %r9 // Faulty Load lea addresses_US+0x8666, %r8 nop nop nop nop and %r9, %r9 movb (%r8), %r10b lea oracles, %r8 and $0xff, %r10 shlq $12, %r10 mov (%r8,%r10,1), %r10 pop %rsi pop %rdx pop %rbp pop %r9 pop %r8 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_US', 'congruent': 0}} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_P', 'congruent': 9}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 16, 'type': 'addresses_WC', 'congruent': 1}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_NC', 'congruent': 5}, 'OP': 'STOR'} {'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_D', 'congruent': 8}, 'OP': 'STOR'} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_US', 'congruent': 0}} <gen_prepare_buffer> {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
exercise1.asm
astrellon/moss
0
104987
<filename>exercise1.asm main: ; Set register 0 to 5 MOV r0 5 ; Set register 1 to 8 MOV r1 8 ; Add registers 0 and 1 and store the result in register 2 ADD r2 r0 r1 ; Outputting result to screen INFO r2
programs/oeis/272/A272100.asm
neoneye/loda
22
174994
<reponame>neoneye/loda ; A272100: Integers n that are the sum of three nonzero squares while n*(n+1) is not. ; 12,19,44,51,76,83,108,115,140,147,172,179,204,211,236,243,268,275,300,307,332,339,364,371,396,403,428,435,460,467,492,499,524,531,556,563,588,595,620,627,652,659,684,691,716,723,748,755,780,787,812,819,844,851,876,883,908,915,940,947,972,979,1004,1011,1036,1043,1068,1075,1100,1107,1132,1139,1164,1171,1196,1203,1228,1235,1260,1267,1292,1299,1324,1331,1356,1363,1388,1395,1420,1427,1452,1459,1484,1491,1516,1523,1548,1555,1580,1587 mov $3,$0 gcd $0,2 mov $1,9 mul $1,$0 sub $1,6 mov $2,$3 mul $2,16 add $1,$2 mov $0,$1
test/Succeed/InstanceMetaType.agda
shlevy/agda
1,989
6386
<reponame>shlevy/agda module InstanceMetaType where ⟨⟩ : {A : Set} {{a : A}} → A ⟨⟩ {{a}} = a postulate A : Set instance a : A f : (a : A) → Set test₁ : Set test₁ = f ⟨⟩ postulate B : Set b : B g : (b : B) → Set instance b' : _ b' = b test₂ : Set test₂ = g ⟨⟩
src/softwareConstants.asm
joeldipops/SuperTestBoy
1
90890
IF !DEF(SOFTWARE_CONSTANTS_INCLUDED) SOFTWARE_CONSTANTS_INCLUDED SET 1 BG_PALETTE EQU %11100100 FG_PALETTE EQU %11000110 TILE_SIZE EQU 16 INPUT_THROTTLE EQU 4 START EQU %10000000 SELECT EQU %01000000 A_BTN EQU %00100000 B_BTN EQU %00010000 DOWN EQU %00001000 UP EQU %00000100 LEFT EQU %00000010 RIGHT EQU %00000001 ; Tile pointers RSRESET LIGHTEST RB 1 LIGHT RB 1 DARK RB 1 DARKEST RB 1 GRID RB 1 CURSOR EQU DARKEST ; Will have a proper image at some point. ; Program states RSRESET INIT_STATE RB 1 MAIN_MENU_STATE RB 1 JOYPAD_TEST_STATE RB 1 SGB_TEST_STATE RB 1 AUDIO_TEST_STATE RB 1 PIXEL_TEST_STATE RB 1 MLT_REQ_STATE RB 1 PALPQ_STATE RB 1 MASK_EN_STATE RB 1 MASKED_EN_STATE RB 1 PALPQ_COLOUR_STATE RB 1 PALPQ_NIBBLE_STATE RB 1 MAX_STATE RB 0 MAX_MENU_DEPTH EQU 6 ; Layout Constants MARGIN_LEFT EQU 8 MENU_MARGIN_LEFT EQU 16 MENU_MARGIN_TOP EQU 16 ; Software Addresses stackFloor EQU $ffff ; Might change to DFFF when actually start using the stack runDma EQU $ff80 ENDC
gameboy/memory.asm
systemoflevers/gb-twitter
0
94208
<gh_stars>0 INCLUDE "hardware.inc" SECTION "Memory", ROM0 clearOAM:: ;; Modifies: ;; hl ;; a ld hl, $FE00 .write_loop: ld [hl], 0 ; Can't use hli since that needs a? inc hl ;; Only check the low address byte (l). ;; OAM is $FE00 - $FE9F so the high byte (h) is always $FE. ld a, l cp $A0 ; 1 past $9F. jr nz, .write_loop ret memcpy:: ;; Args: ;; b: number of bytes ;; hl: destination ;; de: source ;; Modifies: ;; a xor a ; set a to 0 cp b ret z .loop ld a, [de] inc de ld [hli], a dec b jr nz, .loop ret
mano-machine-assembler/add_two_numbers.asm
ahodieb/course-projects
0
89317
ORG 100 /Origin of program is location 0 , LDA A /Load operand from location A , ADD B /Add operand from location B STA C /Store sum in location C HLT /Halt computer A, DEC 83 /Decimal operand B, DEC -23 /Decimal operand C, DEC 9 /Sum stored in location C END
ada/original_2008/ada-gui/agar-gui-widget-textbox.adb
auzkok/libagar
286
13951
<gh_stars>100-1000 package body agar.gui.widget.textbox is package cbinds is function allocate (parent : widget_access_t; flags : flags_t; label : cs.chars_ptr) return textbox_access_t; pragma import (c, allocate, "AG_TextboxNewS"); procedure set_static (textbox : textbox_access_t; enable : c.int); pragma import (c, set_static, "agar_gui_widget_textbox_set_static"); procedure set_password (textbox : textbox_access_t; enable : c.int); pragma import (c, set_password, "agar_gui_widget_textbox_set_password"); procedure set_float_only (textbox : textbox_access_t; enable : c.int); pragma import (c, set_float_only, "agar_gui_widget_textbox_set_float_only"); procedure set_integer_only (textbox : textbox_access_t; enable : c.int); pragma import (c, set_integer_only, "agar_gui_widget_textbox_set_integer_only"); procedure set_label (textbox : textbox_access_t; text : cs.chars_ptr); pragma import (c, set_label, "AG_TextboxSetLabelS"); procedure size_hint (textbox : textbox_access_t; text : cs.chars_ptr); pragma import (c, size_hint, "agar_gui_widget_textbox_size_hint"); procedure size_hint_pixels (textbox : textbox_access_t; width : c.unsigned; height : c.unsigned); pragma import (c, size_hint_pixels, "agar_gui_widget_textbox_size_hint_pixels"); function map_position (textbox : textbox_access_t; x : c.int; y : c.int; pos : access c.int; absolute : c.int) return c.int; pragma import (c, map_position, "agar_gui_widget_textbox_map_position"); function move_cursor (textbox : textbox_access_t; x : c.int; y : c.int; absolute : c.int) return c.int; pragma import (c, move_cursor, "agar_gui_widget_textbox_move_cursor"); function get_cursor_position (textbox : textbox_access_t) return c.int; pragma import (c, get_cursor_position, "agar_gui_widget_textbox_get_cursor_pos"); function set_cursor_position (textbox : textbox_access_t; position : c.int) return c.int; pragma import (c, set_cursor_position, "agar_gui_widget_textbox_set_cursor_pos"); procedure set_string (textbox : textbox_access_t; text : cs.chars_ptr); pragma import (c, set_string, "agar_gui_widget_textbox_set_string"); procedure set_string_ucs4 (textbox : textbox_access_t; text : access c.char32_t); pragma import (c, set_string_ucs4, "agar_gui_widget_textbox_set_string_ucs4"); function get_integer (textbox : textbox_access_t) return c.int; pragma import (c, get_integer, "agar_gui_widget_textbox_int"); function get_float (textbox : textbox_access_t) return c.c_float; pragma import (c, get_float, "agar_gui_widget_textbox_float"); function get_long_float (textbox : textbox_access_t) return c.double; pragma import (c, get_long_float, "agar_gui_widget_textbox_double"); end cbinds; function allocate (parent : widget_access_t; flags : flags_t; label : string) return textbox_access_t is c_label : aliased c.char_array := c.to_c (label); begin return cbinds.allocate (parent => parent, flags => flags, label => cs.to_chars_ptr (c_label'unchecked_access)); end allocate; procedure set_static (textbox : textbox_access_t; enable : boolean) is begin if enable then cbinds.set_static (textbox, 1); else cbinds.set_static (textbox, 0); end if; end set_static; procedure set_password (textbox : textbox_access_t; enable : boolean) is begin if enable then cbinds.set_password (textbox, 1); else cbinds.set_password (textbox, 0); end if; end set_password; procedure set_float_only (textbox : textbox_access_t; enable : boolean) is begin if enable then cbinds.set_float_only (textbox, 1); else cbinds.set_float_only (textbox, 0); end if; end set_float_only; procedure set_integer_only (textbox : textbox_access_t; enable : boolean) is begin if enable then cbinds.set_integer_only (textbox, 1); else cbinds.set_integer_only (textbox, 0); end if; end set_integer_only; procedure set_label (textbox : textbox_access_t; text : string) is c_text : aliased c.char_array := c.to_c (text); begin cbinds.set_label (textbox => textbox, text => cs.to_chars_ptr (c_text'unchecked_access)); end set_label; procedure size_hint (textbox : textbox_access_t; text : string) is c_text : aliased c.char_array := c.to_c (text); begin cbinds.size_hint (textbox => textbox, text => cs.to_chars_ptr (c_text'unchecked_access)); end size_hint; procedure size_hint_pixels (textbox : textbox_access_t; width : positive; height : positive) is begin cbinds.size_hint_pixels (textbox => textbox, width => c.unsigned (width), height => c.unsigned (height)); end size_hint_pixels; procedure map_position (textbox : textbox_access_t; x : integer; y : integer; index : out natural; pos : out cursor_pos_t; absolute : boolean) is c_abs : c.int := 0; c_pos : aliased c.int; c_ind : c.int; begin if absolute then c_abs := 1; end if; c_ind := cbinds.map_position (textbox => textbox, x => c.int (x), y => c.int (y), pos => c_pos'unchecked_access, absolute => c_abs); index := natural (c_ind); pos := cursor_pos_t'val (c_pos); end map_position; function move_cursor (textbox : textbox_access_t; x : integer; y : integer; absolute : boolean) return integer is begin if absolute then return integer (cbinds.move_cursor (textbox => textbox, x => c.int (x), y => c.int (y), absolute => 1)); else return integer (cbinds.move_cursor (textbox => textbox, x => c.int (x), y => c.int (y), absolute => 0)); end if; end move_cursor; function get_cursor_position (textbox : textbox_access_t) return integer is begin return integer (cbinds.get_cursor_position (textbox)); end get_cursor_position; function set_cursor_position (textbox : textbox_access_t; position : integer) return integer is begin return integer (cbinds.set_cursor_position (textbox => textbox, position => c.int (position))); end set_cursor_position; -- text manipulation procedure set_string (textbox : textbox_access_t; text : string) is ca_text : aliased c.char_array := c.to_c (text); begin cbinds.set_string (textbox, cs.to_chars_ptr (ca_text'unchecked_access)); end set_string; procedure set_string_ucs4 (textbox : textbox_access_t; text : wide_wide_string) is ca_text : aliased c.char32_array := c.to_c (text); begin cbinds.set_string_ucs4 (textbox, ca_text(ca_text'first)'unchecked_access); end set_string_ucs4; function get_integer (textbox : textbox_access_t) return integer is begin return integer (cbinds.get_integer (textbox)); end get_integer; function get_float (textbox : textbox_access_t) return float is begin return float (cbinds.get_float (textbox)); end get_float; function get_long_float (textbox : textbox_access_t) return long_float is begin return long_float (cbinds.get_long_float (textbox)); end get_long_float; function widget (textbox : textbox_access_t) return widget_access_t is begin return textbox.widget'access; end widget; end agar.gui.widget.textbox;
projects/project08/src/translations/goto.asm
lemmingapex/ElementsOfComputingSystems
15
10299
<reponame>lemmingapex/ElementsOfComputingSystems // goto @%%LABEL%% 0;JMP
programs/oeis/008/A008487.asm
neoneye/loda
22
25163
; A008487: Expansion of (1-x^5) / (1-x)^5. ; 1,5,15,35,70,125,205,315,460,645,875,1155,1490,1885,2345,2875,3480,4165,4935,5795,6750,7805,8965,10235,11620,13125,14755,16515,18410,20445,22625,24955,27440,30085,32895,35875,39030,42365,45885,49595,53500,57605,61915,66435,71170,76125,81305,86715,92360,98245,104375,110755,117390,124285,131445,138875,146580,154565,162835,171395,180250,189405,198865,208635,218720,229125,239855,250915,262310,274045,286125,298555,311340,324485,337995,351875,366130,380765,395785,411195,427000,443205,459815,476835,494270,512125,530405,549115,568260,587845,607875,628355,649290,670685,692545,714875,737680,760965,784735,808995 mov $1,$0 mov $3,$0 mov $4,2 lpb $1 add $3,2 add $3,$2 add $2,4 add $2,$1 sub $1,1 sub $2,4 add $4,$0 sub $4,1 add $3,$4 lpe add $1,$3 trn $1,1 add $1,1 trn $0,$1 add $0,$1
iod/iob/smsq.asm
olifink/smsqe
0
2827
; SMSQ - Set Printer Aborted Message V2.00  1994 <NAME> section iou xdef iob_smsq iob_smsq xdef iob_ptab include 'dev8_keys_qdos_sms' include 'dev8_keys_msg8' ;+++ ; This routine sets the printer aborted message ; ; a1 r message ;-- iob_ptab move.w #msg8.abrt,a1 moveq #sms.mptr,d0 trap #do.sms2 rts end
Arch/x86/Boot/entry.asm
MalteDoemer/YeetOS2
0
99387
bits 32 extern load_start extern load_end extern bss_end global start section .mboot ; Multiboot stuff MBOOT_PAGE_ALIGN equ 1 MBOOT_MEM_INFO equ 2 MBOOT_USE_ADDRS equ 1 << 16 MBOOT_HEADER_MAGIC equ 0x1BADB002 MBOOT_HEADER_FLAGS equ MBOOT_PAGE_ALIGN | MBOOT_MEM_INFO | MBOOT_USE_ADDRS MBOOT_CHECKSUM equ -(MBOOT_HEADER_MAGIC + MBOOT_HEADER_FLAGS) ; The virtual address of the kernel KERNEL_BASE equ 0xC0000000 ; Multiboot header for grub ; It is important to use the physical address mboot_header: dd MBOOT_HEADER_MAGIC dd MBOOT_HEADER_FLAGS dd MBOOT_CHECKSUM dd mboot_header dd load_start dd load_end dd bss_end dd start align 4*1024,db 0xFF boot_page_dir: dd 0x00000083 times ((KERNEL_BASE >> 22) - 1) dd 0 dd 0x00000083 dd 0x00400083 times (1024 - (KERNEL_BASE >> 22) - 2) dd 0 start: cli cld ; tell the MMU where to find the page directory mov ecx, boot_page_dir mov cr3, ecx ; set PSE bit in CR4 to enable 4MiB pages. mov ecx, cr4 or ecx, 0x00000010 mov cr4, ecx ; set PG bit in CR0 to enable paging mov ecx, cr0 or ecx, 0x80000000 mov cr0, ecx ; jump into higher half Yey jmp up section .text ;extern multiboot_ptr ;extern multiboot_sig extern kernel_main global do_it do_it: push ebp mov ebp, esp mov esp, ebp pop ebp ret up: ; delete the identety mapped entry mov dword [boot_page_dir + KERNEL_BASE], 0 invlpg [0] init: mov esp, kernel_stack_top mov ebp, esp ; correct mboot structure for higher half add ebx, KERNEL_BASE ; store the pointer to mboot structure ; mov dword [multiboot_ptr], ebx ; store the multiboot signature ; mov dword [multiboot_sig], eax call kernel_main .halt: hlt jmp .halt section .bss kernel_stack: resb 1024 * 4 kernel_stack_top:
Control Statements/tell/iCal/calendars/todos/iterate.applescript
looking-for-a-job/applescript-examples
1
4309
#!/usr/loca/bin/osascript tell application "iCal" repeat with t in every todo of every calendar properties of t end repeat end tell
programs/oeis/138/A138118.asm
neoneye/loda
22
87465
<reponame>neoneye/loda ; A138118: Concatenation of 2n-1 digits 1 and n digits 0. ; 10,11100,11111000,11111110000,11111111100000,11111111111000000,11111111111110000000,11111111111111100000000,11111111111111111000000000,11111111111111111110000000000 seq $0,147590 ; Numbers whose binary representation is the concatenation of 2n-1 digits 1 and n-1 digits 0. seq $0,7088 ; The binary numbers (or binary words, or binary vectors, or binary expansion of n): numbers written in base 2. mul $0,10
tests/src/tests.adb
mhatzl/spark_unbound
8
20648
with AUnit.Reporter.Text; with AUnit.Run; with Unbound_Array_Suite; with Safe_Alloc_Suite; with GNAT.OS_Lib; with Text_IO; with Spark_Unbound; procedure Tests is use type AUnit.Status; Reporter : AUnit.Reporter.Text.Text_Reporter; function Unbound_Array_Test_Runner is new AUnit.Run.Test_Runner_With_Status(Unbound_Array_Suite.Suite); function Safe_Alloc_Test_Runner is new AUnit.Run.Test_Runner_With_Status(Safe_Alloc_Suite.Suite); begin -- Run Unbound_Array tests if Unbound_Array_Test_Runner(Reporter) /= AUnit.Success then GNAT.OS_Lib.OS_Exit(1); end if; -- Run Safe_Alloc tests if Safe_Alloc_Test_Runner(Reporter) /= AUnit.Success then GNAT.OS_Lib.OS_Exit(1); end if; end Tests;
BasicILP/Syntax/DyadicGentzenNormalForm.agda
mietek/hilbert-gentzen
29
569
-- Basic intuitionistic logic of proofs, without ∨, ⊥, or +. -- Gentzen-style formalisation of syntax with context pairs. -- Normal forms and neutrals. module BasicILP.Syntax.DyadicGentzenNormalForm where open import BasicILP.Syntax.DyadicGentzen public -- Derivations. mutual -- Normal forms, or introductions. infix 3 _⊢ⁿᶠ_ data _⊢ⁿᶠ_ : Cx² Ty Box → Ty → Set where neⁿᶠ : ∀ {A Γ Δ} → Γ ⁏ Δ ⊢ⁿᵉ A → Γ ⁏ Δ ⊢ⁿᶠ A lamⁿᶠ : ∀ {A B Γ Δ} → Γ , A ⁏ Δ ⊢ⁿᶠ B → Γ ⁏ Δ ⊢ⁿᶠ A ▻ B boxⁿᶠ : ∀ {Ψ Ω A Γ Δ} → (x : Ψ ⁏ Ω ⊢ A) → Γ ⁏ Δ ⊢ⁿᶠ [ Ψ ⁏ Ω ⊢ x ] A pairⁿᶠ : ∀ {A B Γ Δ} → Γ ⁏ Δ ⊢ⁿᶠ A → Γ ⁏ Δ ⊢ⁿᶠ B → Γ ⁏ Δ ⊢ⁿᶠ A ∧ B unitⁿᶠ : ∀ {Γ Δ} → Γ ⁏ Δ ⊢ⁿᶠ ⊤ -- Neutrals, or eliminations. infix 3 _⊢ⁿᵉ_ data _⊢ⁿᵉ_ : Cx² Ty Box → Ty → Set where varⁿᵉ : ∀ {A Γ Δ} → A ∈ Γ → Γ ⁏ Δ ⊢ⁿᵉ A appⁿᵉ : ∀ {A B Γ Δ} → Γ ⁏ Δ ⊢ⁿᵉ A ▻ B → Γ ⁏ Δ ⊢ⁿᶠ A → Γ ⁏ Δ ⊢ⁿᵉ B mvarⁿᵉ : ∀ {Ψ Ω A x Γ Δ} → [ Ψ ⁏ Ω ⊢ x ] A ∈ Δ → {{_ : Γ ⁏ Δ ⊢⋆ⁿᶠ Ψ}} → {{_ : Γ ⁏ Δ ⊢⍟ⁿᶠ Ω}} → Γ ⁏ Δ ⊢ⁿᵉ A unboxⁿᵉ : ∀ {Ψ Ω A C x Γ Δ} → Γ ⁏ Δ ⊢ⁿᵉ [ Ψ ⁏ Ω ⊢ x ] A → Γ ⁏ Δ , [ Ψ ⁏ Ω ⊢ x ] A ⊢ⁿᶠ C → Γ ⁏ Δ ⊢ⁿᵉ C fstⁿᵉ : ∀ {A B Γ Δ} → Γ ⁏ Δ ⊢ⁿᵉ A ∧ B → Γ ⁏ Δ ⊢ⁿᵉ A sndⁿᵉ : ∀ {A B Γ Δ} → Γ ⁏ Δ ⊢ⁿᵉ A ∧ B → Γ ⁏ Δ ⊢ⁿᵉ B infix 3 _⊢⋆ⁿᶠ_ _⊢⋆ⁿᶠ_ : Cx² Ty Box → Cx Ty → Set Γ ⁏ Δ ⊢⋆ⁿᶠ ∅ = 𝟙 Γ ⁏ Δ ⊢⋆ⁿᶠ Ξ , A = Γ ⁏ Δ ⊢⋆ⁿᶠ Ξ × Γ ⁏ Δ ⊢ⁿᶠ A infix 3 _⊢⍟ⁿᶠ_ _⊢⍟ⁿᶠ_ : Cx² Ty Box → Cx Box → Set Γ ⁏ Δ ⊢⍟ⁿᶠ ∅ = 𝟙 Γ ⁏ Δ ⊢⍟ⁿᶠ Ξ , [ Ψ ⁏ Ω ⊢ x ] A = Γ ⁏ Δ ⊢⍟ⁿᶠ Ξ × Γ ⁏ Δ ⊢ⁿᶠ [ Ψ ⁏ Ω ⊢ x ] A infix 3 _⊢⋆ⁿᵉ_ _⊢⋆ⁿᵉ_ : Cx² Ty Box → Cx Ty → Set Γ ⁏ Δ ⊢⋆ⁿᵉ ∅ = 𝟙 Γ ⁏ Δ ⊢⋆ⁿᵉ Ξ , A = Γ ⁏ Δ ⊢⋆ⁿᵉ Ξ × Γ ⁏ Δ ⊢ⁿᵉ A infix 3 _⊢⍟ⁿᵉ_ _⊢⍟ⁿᵉ_ : Cx² Ty Box → Cx Box → Set Γ ⁏ Δ ⊢⍟ⁿᵉ ∅ = 𝟙 Γ ⁏ Δ ⊢⍟ⁿᵉ Ξ , [ Ψ ⁏ Ω ⊢ x ] A = Γ ⁏ Δ ⊢⍟ⁿᵉ Ξ × Γ ⁏ Δ ⊢ⁿᵉ [ Ψ ⁏ Ω ⊢ x ] A -- Translation to simple terms. mutual nf→tm : ∀ {A Γ Δ} → Γ ⁏ Δ ⊢ⁿᶠ A → Γ ⁏ Δ ⊢ A nf→tm (neⁿᶠ t) = ne→tm t nf→tm (lamⁿᶠ t) = lam (nf→tm t) nf→tm (boxⁿᶠ t) = box t nf→tm (pairⁿᶠ t u) = pair (nf→tm t) (nf→tm u) nf→tm unitⁿᶠ = unit ne→tm : ∀ {A Γ Δ} → Γ ⁏ Δ ⊢ⁿᵉ A → Γ ⁏ Δ ⊢ A ne→tm (varⁿᵉ i) = var i ne→tm (appⁿᵉ t u) = app (ne→tm t) (nf→tm u) ne→tm (mvarⁿᵉ i {{ts}} {{us}}) = mvar i {{nf→tm⋆ ts}} {{nf→tm⍟ us}} ne→tm (unboxⁿᵉ t u) = unbox (ne→tm t) (nf→tm u) ne→tm (fstⁿᵉ t) = fst (ne→tm t) ne→tm (sndⁿᵉ t) = snd (ne→tm t) nf→tm⋆ : ∀ {Ξ Γ Δ} → Γ ⁏ Δ ⊢⋆ⁿᶠ Ξ → Γ ⁏ Δ ⊢⋆ Ξ nf→tm⋆ {∅} ∙ = ∙ nf→tm⋆ {Ξ , A} (ts , t) = nf→tm⋆ ts , nf→tm t nf→tm⍟ : ∀ {Ξ Γ Δ} → Γ ⁏ Δ ⊢⍟ⁿᶠ Ξ → Γ ⁏ Δ ⊢⍟ Ξ nf→tm⍟ {∅} ∙ = ∙ nf→tm⍟ {Ξ , _} (ts , t) = nf→tm⍟ ts , nf→tm t ne→tm⋆ : ∀ {Ξ Γ Δ} → Γ ⁏ Δ ⊢⋆ⁿᵉ Ξ → Γ ⁏ Δ ⊢⋆ Ξ ne→tm⋆ {∅} ∙ = ∙ ne→tm⋆ {Ξ , A} (ts , t) = ne→tm⋆ ts , ne→tm t ne→tm⍟ : ∀ {Ξ Γ Δ} → Γ ⁏ Δ ⊢⍟ⁿᵉ Ξ → Γ ⁏ Δ ⊢⍟ Ξ ne→tm⍟ {∅} ∙ = ∙ ne→tm⍟ {Ξ , _} (ts , t) = ne→tm⍟ ts , ne→tm t -- Monotonicity with respect to context inclusion. mutual mono⊢ⁿᶠ : ∀ {A Γ Γ′ Δ} → Γ ⊆ Γ′ → Γ ⁏ Δ ⊢ⁿᶠ A → Γ′ ⁏ Δ ⊢ⁿᶠ A mono⊢ⁿᶠ η (neⁿᶠ t) = neⁿᶠ (mono⊢ⁿᵉ η t) mono⊢ⁿᶠ η (lamⁿᶠ t) = lamⁿᶠ (mono⊢ⁿᶠ (keep η) t) mono⊢ⁿᶠ η (boxⁿᶠ t) = boxⁿᶠ t mono⊢ⁿᶠ η (pairⁿᶠ t u) = pairⁿᶠ (mono⊢ⁿᶠ η t) (mono⊢ⁿᶠ η u) mono⊢ⁿᶠ η unitⁿᶠ = unitⁿᶠ mono⊢ⁿᵉ : ∀ {A Γ Γ′ Δ} → Γ ⊆ Γ′ → Γ ⁏ Δ ⊢ⁿᵉ A → Γ′ ⁏ Δ ⊢ⁿᵉ A mono⊢ⁿᵉ η (varⁿᵉ i) = varⁿᵉ (mono∈ η i) mono⊢ⁿᵉ η (appⁿᵉ t u) = appⁿᵉ (mono⊢ⁿᵉ η t) (mono⊢ⁿᶠ η u) mono⊢ⁿᵉ η (mvarⁿᵉ i {{ts}} {{us}}) = mvarⁿᵉ i {{mono⊢⋆ⁿᶠ η ts}} {{mono⊢⍟ⁿᶠ η us}} mono⊢ⁿᵉ η (unboxⁿᵉ t u) = unboxⁿᵉ (mono⊢ⁿᵉ η t) (mono⊢ⁿᶠ η u) mono⊢ⁿᵉ η (fstⁿᵉ t) = fstⁿᵉ (mono⊢ⁿᵉ η t) mono⊢ⁿᵉ η (sndⁿᵉ t) = sndⁿᵉ (mono⊢ⁿᵉ η t) mono⊢⋆ⁿᶠ : ∀ {Ξ Γ Γ′ Δ} → Γ ⊆ Γ′ → Γ ⁏ Δ ⊢⋆ⁿᶠ Ξ → Γ′ ⁏ Δ ⊢⋆ⁿᶠ Ξ mono⊢⋆ⁿᶠ {∅} η ∙ = ∙ mono⊢⋆ⁿᶠ {Ξ , A} η (ts , t) = mono⊢⋆ⁿᶠ η ts , mono⊢ⁿᶠ η t mono⊢⍟ⁿᶠ : ∀ {Ξ Γ Γ′ Δ} → Γ ⊆ Γ′ → Γ ⁏ Δ ⊢⍟ⁿᶠ Ξ → Γ′ ⁏ Δ ⊢⍟ⁿᶠ Ξ mono⊢⍟ⁿᶠ {∅} η ∙ = ∙ mono⊢⍟ⁿᶠ {Ξ , _} η (ts , t) = mono⊢⍟ⁿᶠ η ts , mono⊢ⁿᶠ η t mono⊢⋆ⁿᵉ : ∀ {Ξ Γ Γ′ Δ} → Γ ⊆ Γ′ → Γ ⁏ Δ ⊢⋆ⁿᵉ Ξ → Γ′ ⁏ Δ ⊢⋆ⁿᵉ Ξ mono⊢⋆ⁿᵉ {∅} η ∙ = ∙ mono⊢⋆ⁿᵉ {Ξ , A} η (ts , t) = mono⊢⋆ⁿᵉ η ts , mono⊢ⁿᵉ η t mono⊢⍟ⁿᵉ : ∀ {Ξ Γ Γ′ Δ} → Γ ⊆ Γ′ → Γ ⁏ Δ ⊢⍟ⁿᵉ Ξ → Γ′ ⁏ Δ ⊢⍟ⁿᵉ Ξ mono⊢⍟ⁿᵉ {∅} η ∙ = ∙ mono⊢⍟ⁿᵉ {Ξ , _} η (ts , t) = mono⊢⍟ⁿᵉ η ts , mono⊢ⁿᵉ η t -- Monotonicity with respect to modal context inclusion. mutual mmono⊢ⁿᶠ : ∀ {A Γ Δ Δ′} → Δ ⊆ Δ′ → Γ ⁏ Δ ⊢ⁿᶠ A → Γ ⁏ Δ′ ⊢ⁿᶠ A mmono⊢ⁿᶠ θ (neⁿᶠ t) = neⁿᶠ (mmono⊢ⁿᵉ θ t) mmono⊢ⁿᶠ θ (lamⁿᶠ t) = lamⁿᶠ (mmono⊢ⁿᶠ θ t) mmono⊢ⁿᶠ θ (boxⁿᶠ t) = boxⁿᶠ t mmono⊢ⁿᶠ θ (pairⁿᶠ t u) = pairⁿᶠ (mmono⊢ⁿᶠ θ t) (mmono⊢ⁿᶠ θ u) mmono⊢ⁿᶠ θ unitⁿᶠ = unitⁿᶠ mmono⊢ⁿᵉ : ∀ {A Γ Δ Δ′} → Δ ⊆ Δ′ → Γ ⁏ Δ ⊢ⁿᵉ A → Γ ⁏ Δ′ ⊢ⁿᵉ A mmono⊢ⁿᵉ θ (varⁿᵉ i) = varⁿᵉ i mmono⊢ⁿᵉ θ (appⁿᵉ t u) = appⁿᵉ (mmono⊢ⁿᵉ θ t) (mmono⊢ⁿᶠ θ u) mmono⊢ⁿᵉ θ (mvarⁿᵉ i {{ts}} {{us}}) = mvarⁿᵉ (mono∈ θ i) {{mmono⊢⋆ⁿᶠ θ ts}} {{mmono⊢⍟ⁿᶠ θ us}} mmono⊢ⁿᵉ θ (unboxⁿᵉ t u) = unboxⁿᵉ (mmono⊢ⁿᵉ θ t) (mmono⊢ⁿᶠ (keep θ) u) mmono⊢ⁿᵉ θ (fstⁿᵉ t) = fstⁿᵉ (mmono⊢ⁿᵉ θ t) mmono⊢ⁿᵉ θ (sndⁿᵉ t) = sndⁿᵉ (mmono⊢ⁿᵉ θ t) mmono⊢⋆ⁿᶠ : ∀ {Ξ Γ Δ Δ′} → Δ ⊆ Δ′ → Γ ⁏ Δ ⊢⋆ⁿᶠ Ξ → Γ ⁏ Δ′ ⊢⋆ⁿᶠ Ξ mmono⊢⋆ⁿᶠ {∅} θ ∙ = ∙ mmono⊢⋆ⁿᶠ {Ξ , A} θ (ts , t) = mmono⊢⋆ⁿᶠ θ ts , mmono⊢ⁿᶠ θ t mmono⊢⍟ⁿᶠ : ∀ {Ξ Γ Δ Δ′} → Δ ⊆ Δ′ → Γ ⁏ Δ ⊢⍟ⁿᶠ Ξ → Γ ⁏ Δ′ ⊢⍟ⁿᶠ Ξ mmono⊢⍟ⁿᶠ {∅} θ ∙ = ∙ mmono⊢⍟ⁿᶠ {Ξ , _} θ (ts , t) = mmono⊢⍟ⁿᶠ θ ts , mmono⊢ⁿᶠ θ t mmono⊢⋆ⁿᵉ : ∀ {Ξ Γ Δ Δ′} → Δ ⊆ Δ′ → Γ ⁏ Δ ⊢⋆ⁿᵉ Ξ → Γ ⁏ Δ′ ⊢⋆ⁿᵉ Ξ mmono⊢⋆ⁿᵉ {∅} θ ∙ = ∙ mmono⊢⋆ⁿᵉ {Ξ , A} θ (ts , t) = mmono⊢⋆ⁿᵉ θ ts , mmono⊢ⁿᵉ θ t mmono⊢⍟ⁿᵉ : ∀ {Ξ Γ Δ Δ′} → Δ ⊆ Δ′ → Γ ⁏ Δ ⊢⍟ⁿᵉ Ξ → Γ ⁏ Δ′ ⊢⍟ⁿᵉ Ξ mmono⊢⍟ⁿᵉ {∅} θ ∙ = ∙ mmono⊢⍟ⁿᵉ {Ξ , _} θ (ts , t) = mmono⊢⍟ⁿᵉ θ ts , mmono⊢ⁿᵉ θ t -- Monotonicity using context pairs. mono²⊢ⁿᶠ : ∀ {A Π Π′} → Π ⊆² Π′ → Π ⊢ⁿᶠ A → Π′ ⊢ⁿᶠ A mono²⊢ⁿᶠ (η , θ) = mono⊢ⁿᶠ η ∘ mmono⊢ⁿᶠ θ mono²⊢ⁿᵉ : ∀ {A Π Π′} → Π ⊆² Π′ → Π ⊢ⁿᵉ A → Π′ ⊢ⁿᵉ A mono²⊢ⁿᵉ (η , θ) = mono⊢ⁿᵉ η ∘ mmono⊢ⁿᵉ θ -- Generalised reflexivity. refl⊢⋆ⁿᵉ : ∀ {Γ Ψ Δ} → {{_ : Ψ ⊆ Γ}} → Γ ⁏ Δ ⊢⋆ⁿᵉ Ψ refl⊢⋆ⁿᵉ {∅} {{done}} = ∙ refl⊢⋆ⁿᵉ {Γ , A} {{skip η}} = mono⊢⋆ⁿᵉ weak⊆ (refl⊢⋆ⁿᵉ {{η}}) refl⊢⋆ⁿᵉ {Γ , A} {{keep η}} = mono⊢⋆ⁿᵉ weak⊆ (refl⊢⋆ⁿᵉ {{η}}) , varⁿᵉ top
oeis/092/A092775.asm
neoneye/loda-programs
11
94578
<reponame>neoneye/loda-programs ; A092775: (prime(prime(n))^4-1)/120. ; Submitted by <NAME>(s2) ; 122,696,7696,23548,100978,167926,395486,1176318,2167872,5063110,8555214,11090528,16517662,28111688,49061162,53452066,100030106,129395024,151176056,215474680,287559576,376376462,559358038,746050214,837244558,989398298,1072817980 add $0,2 seq $0,6450 ; Prime-indexed primes: primes with prime subscripts. pow $0,4 div $0,120
Transynther/x86/_processed/AVXALIGN/_st_/i9-9900K_12_0xa0_notsx.log_21829_1174.asm
ljhsiun2/medusa
9
87684
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r11 push %r15 push %r9 push %rbp push %rcx push %rdi push %rdx push %rsi lea addresses_normal_ht+0x164be, %r11 clflush (%r11) nop nop nop xor %r10, %r10 movups (%r11), %xmm3 vpextrq $0, %xmm3, %rdx nop dec %r15 lea addresses_normal_ht+0x90c6, %r11 nop nop add %rdi, %rdi movb $0x61, (%r11) nop nop nop and %rdi, %rdi lea addresses_WC_ht+0x4e98, %r10 nop nop nop nop nop xor %r9, %r9 movw $0x6162, (%r10) nop nop nop nop add %r10, %r10 lea addresses_UC_ht+0x283e, %r11 add %rdx, %rdx mov (%r11), %ebp nop nop nop nop and %rbp, %rbp lea addresses_normal_ht+0x100be, %rbp inc %rdx movb $0x61, (%rbp) nop add %rbp, %rbp lea addresses_UC_ht+0x40be, %rsi lea addresses_WC_ht+0xf382, %rdi nop nop nop xor $27317, %rdx mov $51, %rcx rep movsb nop nop add %r15, %r15 lea addresses_A_ht+0x130be, %rsi lea addresses_D_ht+0x9ade, %rdi clflush (%rsi) nop nop nop nop cmp %r10, %r10 mov $23, %rcx rep movsq cmp $12595, %rcx lea addresses_D_ht+0x1e95e, %rsi lea addresses_WC_ht+0x94de, %rdi nop nop nop nop nop cmp %r9, %r9 mov $98, %rcx rep movsq nop nop nop lfence lea addresses_A_ht+0x142b6, %r10 and $5516, %rcx movb $0x61, (%r10) nop nop nop dec %r15 lea addresses_normal_ht+0xb942, %rsi lea addresses_normal_ht+0x1b4be, %rdi inc %r9 mov $98, %rcx rep movsb nop nop add $37209, %rsi lea addresses_WT_ht+0x1dbbe, %r9 clflush (%r9) nop nop nop nop nop add $49637, %rcx movl $0x61626364, (%r9) nop nop inc %rdi lea addresses_WC_ht+0x10b2, %rdi clflush (%rdi) nop nop nop nop nop sub %r9, %r9 mov $0x6162636465666768, %r10 movq %r10, (%rdi) nop nop nop nop nop dec %rdi lea addresses_WC_ht+0x19cbe, %rsi nop nop nop sub $54200, %r10 mov $0x6162636465666768, %rdi movq %rdi, %xmm3 movups %xmm3, (%rsi) nop nop nop nop nop sub $54539, %rbp lea addresses_WT_ht+0x1bdbe, %rsi nop nop nop nop cmp %r15, %r15 mov $0x6162636465666768, %r9 movq %r9, %xmm1 and $0xffffffffffffffc0, %rsi vmovaps %ymm1, (%rsi) nop nop nop nop inc %rdi lea addresses_normal_ht+0x110ae, %r11 nop nop nop nop nop inc %r10 movw $0x6162, (%r11) cmp %r15, %r15 pop %rsi pop %rdx pop %rdi pop %rcx pop %rbp pop %r9 pop %r15 pop %r11 pop %r10 ret .global s_faulty_load s_faulty_load: push %r11 push %r9 push %rax push %rbp push %rbx // Faulty Load lea addresses_D+0x108be, %rax nop nop nop nop nop sub %rbx, %rbx mov (%rax), %rbp lea oracles, %rax and $0xff, %rbp shlq $12, %rbp mov (%rax,%rbp,1), %rbp pop %rbx pop %rbp pop %rax pop %r9 pop %r11 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'} [Faulty Load] {'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 8, 'NT': True, 'same': True, 'congruent': 0}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 3}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 1}} {'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 3}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': True, 'size': 1, 'NT': True, 'same': False, 'congruent': 11}} {'src': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}} {'src': {'type': 'addresses_A_ht', 'congruent': 9, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}} {'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 3}} {'src': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 4}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 0}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 10}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': True, 'size': 32, 'NT': False, 'same': False, 'congruent': 7}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 3}} {'36': 21829} 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 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maps/outside/objects.asm
RevolutionSoftware/Juego
1
19978
;start of brushes .dw grass .dw path .dw path_corner1 .dw path_corner2 .dw path_corner3 .dw path_corner4 .dw path_round1 .dw flower .dw tree_topleft .dw tree_topright .dw tree_topleft_forest .dw tree_topright_forest .dw tree_bottom_left .dw tree_bottomright .dw sign_item .dw wall_vert .dw wall_horiz .dw wall_bottom_left_corner .dw wall_bottom_right_corner .dw wall_top_left_corner .dw wall_top_right_corner .dw house_new_left .dw house_new_right .dw door_pretty .dw door_old_books .dw house_old_left_sign .dw house_old_right .dw roof_left .dw roof_right .dw roof_bookshop .dw roof_item_shop .dw roof_weapon_shop .dw sign_hanging_libros .dw sign_weapon .dw arch_bottom_left .dw arch_bottom_middle .dw arch_bottom_right .dw arch_top_left .dw arch_top_middle .dw arch_top_right grass: .db %00000000 .db 0 path: .db %00000000 .db 1 path_corner1: .db %00000000 .db 2 path_corner2: .db %00000000 .db 3 path_corner3: .db %00000000 .db 4 path_corner4: .db %00000000 .db 5 path_round1: .db %00000000 .db 6 flower: .db %00000000 .db 7 tree_topleft: .db %00001100 .db 8 .db 11 .db 0 tree_topright: .db %00001100 .db 9 .db 12 .db 0 tree_topleft_forest: .db %00001110 .db 10 .db 18 .db 4 tree_topright_forest: .db %00001110 .db 11 .db 18 .db 4 tree_bottom_left: .db %00000110 .db 12 .db 9 .db 2 tree_bottomright: .db %00000110 .db 13 .db 10 .db 2 sign_item: .db %10000110 .db 14 .db -1 .db 14 .db TEXT \ .dw text2 wall_vert: .db %00000010 .db 15 wall_horiz: .db %00000110 .db 16 .db 15 .db 6 wall_bottom_left_corner: .db %00000010 .db 17 wall_bottom_right_corner: .db %00000010 .db 18 wall_top_left_corner: .db %00000110 .db 19 .db 16 .db 6 wall_top_right_corner: .db %00000110 .db 20 .db 17 .db 6 house_new_left: .db %00000010 .db 21 house_new_right: .db %00000010 .db 22 door_pretty: .db %00000010 .db 23 door_old_books: .db %01000010 .db 24 .db MAP,5,7,2 house_old_left_sign: .db %00000010 .db 25 house_old_right: .db %00000010 .db 26 roof_left: .db %00000110 .db 27 .db 5 .db 1 roof_right: .db %00000110 .db 28 .db 6 .db 10 roof_bookshop: .db %00000110 .db 29 .db 18 .db 0 roof_item_shop: .db %00000110 .db 30 .db 18 .db 0 roof_weapon_shop: .db %00000110 .db 31 .db 18 .db 0 sign_hanging_libros: .db %10000110 .db 32 .db -1 .db 14 .db TEXT \ .dw text1 sign_weapon: .db %10000110 .db 14 .db 7 .db 14 .db TEXT \ .dw text0 arch_bottom_left: .db %00000110 .db 33 .db 19 .db 6 arch_bottom_middle: .db %00000100 .db 34 .db 20 .db 0 arch_bottom_right: .db %00000110 .db 35 .db 21 .db 6 arch_top_left: .db %00001100 .db 36 .db 22 .db 0 arch_top_middle: .db %00001100 .db 37 .db 23 .db 0 arch_top_right: .db %00001100 .db 38 .db 24 .db 0
src/dds-request_reply-requester-impl.ads
persan/dds-requestreply
0
25239
<filename>src/dds-request_reply-requester-impl.ads -- ---------------------------------------------------------------------------- -- Note this is an implementation package and is subject to change att any time. -- ---------------------------------------------------------------------------- with DDS.ReadCondition; with DDS.Request_Reply.Impl; private package DDS.Request_Reply.Requester.Impl is type Ref is abstract limited new DDS.Request_Reply.Impl.Ref and DDS.Request_Reply.Requester.Ref with record null; end record; type Ref_Access is access all Ref'Class; function Touch_Samples (Self : not null access Ref; Max_Count : DDS.Integer; Read_Condition : DDS.ReadCondition.Ref_Access) return Integer; function Wait_For_Any_Sample (Self : not null access Ref; Max_Wait : DDS.Duration_T; Min_Sample_Count : DDS.Integer) return DDS.ReturnCode_T; end DDS.Request_Reply.Requester.Impl;
oeis/073/A073094.asm
neoneye/loda-programs
11
100834
; A073094: Final digit of C(2k,k) when not equal to zero. ; Submitted by <NAME> ; 2,6,2,4,2,6,2,6,2,4,2,4,8,4,2,4,2,6,2,6,2,4,2,6,2,6,2,4,2,4,8,4,2,4,2,4,8,4,8,6,8,4,8,4,2,4,2,4,8,4,2,4,2,6,2,6,2,4,2,6,2,6,2,4,2,4,8,4,2,4,2,6,2,6,2,4,2,6,2,6,2,4,2,4,8,4,2,4,2,4,8,4,8,6,8,4,8,4,2,4 add $0,1 seq $0,62756 ; Number of 1's in ternary (base-3) expansion of n. mod $0,4 mul $0,6 pow $0,3 add $0,6 mod $0,10
testAsmScripts/instructionTests/jumping.asm
rystills/MIPS-sandbox
4
27915
<reponame>rystills/MIPS-sandbox #~~~JUMP TEST~~~ #init registers addi $s6, $zero, 5 addi $s7, $zero, 3 addi $s1, $zero, 0 #increment s0 from 0 to 5 func1: addi $s0, $zero, 0 loop1: addi $s0, $s0, 1 bne $s0, $s6, loop1 #increment s1 from 0 to 3 addi $s1, $s1, 1 BEQ $s1, $s7, end J func1 end:
out/aaa_08tuple.adb
FardaleM/metalang
22
27336
<reponame>FardaleM/metalang with ada.text_io, ada.Integer_text_IO, Ada.Text_IO.Text_Streams, Ada.Strings.Fixed, Interfaces.C; use ada.text_io, ada.Integer_text_IO, Ada.Strings, Ada.Strings.Fixed, Interfaces.C; procedure aaa_08tuple is type stringptr is access all char_array; procedure PString(s : stringptr) is begin String'Write (Text_Streams.Stream (Current_Output), To_Ada(s.all)); end; procedure PInt(i : in Integer) is begin String'Write (Text_Streams.Stream (Current_Output), Trim(Integer'Image(i), Left)); end; procedure SkipSpaces is C : Character; Eol : Boolean; begin loop Look_Ahead(C, Eol); exit when Eol or C /= ' '; Get(C); end loop; end; type tuple_int_int; type tuple_int_int_PTR is access tuple_int_int; type tuple_int_int is record tuple_int_int_field_0 : Integer; tuple_int_int_field_1 : Integer; end record; type toto; type toto_PTR is access toto; type toto is record foo : tuple_int_int_PTR; bar : Integer; end record; t : toto_PTR; f : tuple_int_int_PTR; e : tuple_int_int_PTR; d : Integer; c : Integer; bar_0 : Integer; b : Integer; a : Integer; begin Get(bar_0); SkipSpaces; Get(c); SkipSpaces; Get(d); SkipSpaces; e := new tuple_int_int; e.tuple_int_int_field_0 := c; e.tuple_int_int_field_1 := d; t := new toto; t.foo := e; t.bar := bar_0; f := t.foo; a := f.tuple_int_int_field_0; b := f.tuple_int_int_field_1; PInt(a); PString(new char_array'( To_C(" "))); PInt(b); PString(new char_array'( To_C(" "))); PInt(t.bar); PString(new char_array'( To_C("" & Character'Val(10)))); end;
software/tritiled22/src/tritiled22_barebones.asm
kontakt/tritiled
60
104562
<gh_stars>10-100 ;;; ;;; tritiled22_barebones.asm : PIC12F1571 code for CR2032 LED glow marker ;;; ;;; extended lifetime version: > 5 years operation expected from CR2032 cell ;;; 31.5 Hz flash rate results in noticable flicker LIST P=12LF1571 #include <p12lf1571.inc> ERRORLEVEL -302 ;;; ;;; OSCTUNE_VAL: set to fine-tune current draw for compensating for ;;; component tolerances ;;; -.32 = slowest frequency (highest LED power) ;;; .0 = factory-calibrated frequency ;;; +.31 = highest frequency (lowest LED power) OSCTUNE_VAL equ +.31 ;;; ;;; I/O pin configuration ;;; GATE_DRIVE_A equ 4 GATE_DRIVE_B equ 5 __CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF & _BOREN_OFF & _CLKOUTEN_OFF __CONFIG _CONFIG2, _WRT_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_HI & _LPBOREN_OFF & _LVP_ON ORG 0 RESET_VEC: BANKSEL OSCTUNE movlw OSCTUNE_VAL & 0x3f movwf OSCTUNE BANKSEL ANSELA movlw b'00000000' ; all digital I/O movwf ANSELA BANKSEL LATA clrf LATA BANKSEL TRISA ;; set gate driver lines as output movlw ((0xff ^ (1 << GATE_DRIVE_A)) ^ (1 << GATE_DRIVE_B)) movwf TRISA BANKSEL OSCCON movlw b'00111011' ; 500 kHz MF osc movwf OSCCON BANKSEL WDTCON movlw b'00001011' ; WDT 32ms timeout movwf WDTCON BANKSEL LATA movlw (1 << GATE_DRIVE_A) | (1 << GATE_DRIVE_B) MAIN_LOOP: movwf LATA ;start inductor ramp-up clrf LATA ;end inductor ramp-up sleep goto MAIN_LOOP ;; fill remainder of program memory with reset instructions fill (reset), 0x0400-$ END
libsrc/_DEVELOPMENT/math/float/math32/z80/h32_coeff_atanf.asm
Frodevan/z88dk
640
4988
; ; feilipu, 2019 May ; ; This Source Code Form is subject to the terms of the Mozilla Public ; License, v. 2.0. If a copy of the MPL was not distributed with this ; file, You can obtain one at http://mozilla.org/MPL/2.0/. ; ;------------------------------------------------------------------------- ; Coefficients for atanf() ;------------------------------------------------------------------------- ; ; Approximation of f(x) = atan(x) ; with weight function g(x) = atan(x) ; on interval [ 0, 1 ] ; with a polynomial of degree 7. ; ; float f(float x) ; { ; float u = +5.3387679e-2f; ; u = u * x + -2.2568632e-1f; ; u = u * x + +3.2087456e-1f; ; u = u * x + -3.4700353e-2f; ; u = u * x + -3.2812673e-1f; ; u = u * x + -3.5815786e-4f; ; u = u * x + +1.0000081e+0f; ; return u * x + 4.2012834e-19f; ; } ; ;------------------------------------------------------------------------- SECTION rodata_fp_math32 PUBLIC _m32_coeff_atan ._m32_coeff_atan DEFQ 0x00000000; +4.2012834e-19 or approximately 0.0 DEFQ 0x3F800000; +1.0000081e+0 or approximately 1.0 DEFQ 0xB9BBC722; -3.5815786e-4 DEFQ 0xBEA8003A; -3.2812673e-1 DEFQ 0xBD0E21F5; -3.4700353e-2 DEFQ 0x3EA449AC; +3.2087456e-1 DEFQ 0xBE671A51; -2.2568632e-1 DEFQ 0x3D5AAD0A; +5.3387679e-2
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_362.asm
ljhsiun2/medusa
9
243803
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r11 push %r14 push %r15 push %rcx push %rdi push %rsi lea addresses_D_ht+0x1b598, %rsi lea addresses_UC_ht+0x4386, %rdi clflush (%rsi) nop nop nop nop nop cmp %r10, %r10 mov $108, %rcx rep movsb nop nop nop and $64217, %r11 lea addresses_normal_ht+0x15eaa, %r14 nop nop nop nop dec %rsi movups (%r14), %xmm3 vpextrq $0, %xmm3, %rcx nop nop cmp $16293, %r10 lea addresses_normal_ht+0x1df7a, %r11 nop nop nop add $11796, %r15 mov $0x6162636465666768, %rdi movq %rdi, %xmm7 vmovups %ymm7, (%r11) nop nop dec %r10 lea addresses_D_ht+0x197ea, %rdi nop nop nop nop cmp %r11, %r11 vmovups (%rdi), %ymm0 vextracti128 $0, %ymm0, %xmm0 vpextrq $1, %xmm0, %r10 nop nop nop nop xor %r14, %r14 pop %rsi pop %rdi pop %rcx pop %r15 pop %r14 pop %r11 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r12 push %r14 push %rax push %rdi push %rsi // Store mov $0xafa, %rax nop cmp %r10, %r10 mov $0x5152535455565758, %r12 movq %r12, %xmm5 movups %xmm5, (%rax) nop nop nop nop sub $9819, %r14 // Faulty Load lea addresses_WT+0xbeaa, %rsi nop nop sub %r11, %r11 mov (%rsi), %r12 lea oracles, %rdi and $0xff, %r12 shlq $12, %r12 mov (%rdi,%r12,1), %r12 pop %rsi pop %rdi pop %rax pop %r14 pop %r12 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_WT', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_P', 'size': 16, 'AVXalign': False}} [Faulty Load] {'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_WT', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}} {'src': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_normal_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_normal_ht', 'size': 32, 'AVXalign': False}} {'src': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_D_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'} {'39': 21829} 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 */
src/Partiality-monad/Inductive/Omega-continuous.agda
nad/partiality-monad
2
5038
<filename>src/Partiality-monad/Inductive/Omega-continuous.agda ------------------------------------------------------------------------ -- ω-continuous functions ------------------------------------------------------------------------ {-# OPTIONS --erased-cubical --safe #-} module Partiality-monad.Inductive.Omega-continuous where open import Equality.Propositional open import Prelude open import Bijection equality-with-J using (_↔_) import Partiality-algebra.Omega-continuous as O open import Partiality-monad.Inductive -- Definition of ω-continuous functions. [_⊥→_⊥] : ∀ {a b} → Type a → Type b → Type (a ⊔ b) [ A ⊥→ B ⊥] = O.[ partiality-algebra A ⟶ partiality-algebra B ] module [_⊥→_⊥] {a b} {A : Type a} {B : Type b} (f : [ A ⊥→ B ⊥]) = O.[_⟶_] f open [_⊥→_⊥] -- Identity. idω : ∀ {a} {A : Type a} → [ A ⊥→ A ⊥] idω = O.idω -- Composition. infixr 40 _∘ω_ _∘ω_ : ∀ {a b c} {A : Type a} {B : Type b} {C : Type c} → [ B ⊥→ C ⊥] → [ A ⊥→ B ⊥] → [ A ⊥→ C ⊥] _∘ω_ = O._∘ω_ -- Equality characterisation lemma for ω-continuous functions. equality-characterisation-continuous : ∀ {a b} {A : Type a} {B : Type b} {f g : [ A ⊥→ B ⊥]} → (∀ x → function f x ≡ function g x) ↔ f ≡ g equality-characterisation-continuous = O.equality-characterisation-continuous -- Composition is associative. ∘ω-assoc : ∀ {a b c d} {A : Type a} {B : Type b} {C : Type c} {D : Type d} (f : [ C ⊥→ D ⊥]) (g : [ B ⊥→ C ⊥]) (h : [ A ⊥→ B ⊥]) → f ∘ω (g ∘ω h) ≡ (f ∘ω g) ∘ω h ∘ω-assoc = O.∘ω-assoc
libsrc/_DEVELOPMENT/math/float/math48/z80/am48_double64u.asm
jpoikela/z88dk
640
172939
SECTION code_clib SECTION code_fp_math48 PUBLIC am48_double64u EXTERN am48_double32u am48_double64u: ; 64-bit unsigned long to double ; ; enter : dehl'dehl = 64-bit unsigned long long n ; ; exit : AC'= (double)(n) ; ; uses : af, bc, de, hl, bc', de', hl' exx ld a,d or e or h or l exx jp z, am48_double32u ; if top 32 bits are zero ld c,$80 + 64 ; c = exponent coarse_loop: ld a,d exx inc d dec d jr nz, fine_adjust ld d,e ld e,h ld h,l ld l,a exx ld d,e ld e,h ld h,l ld l,0 ld a,c sub 8 ld c,a jr coarse_loop fine_adjust: bit 7,d exx jr nz, normalized fine_loop: dec c add hl,hl rl e rl d exx adc hl,hl rl e rl d exx jp p, fine_loop normalized: ; dehl'dehl = normalized mantissa ; c = exponent ld b,d push bc exx ld b,d ld c,e ex de,hl pop hl res 7,b exx ret
private/shell/win16/shell16/cpuspeed.asm
King0987654/windows2000
11
89772
<filename>private/shell/win16/shell16/cpuspeed.asm ;--------------------------------------------------------------------------- ; ; Module: cpuspeed.asm ; ; Purpose: ; Computes the CPU speed using the 8254 and the NOP instruction. ; ; Development Team: ; <NAME> ; ; History: Date Author Comment ; 8/13/92 BryanW Wrote it ; ;--------------------------------------------------------------------------- ; ; Written by Microsoft Product Support Service, Windows Developer Support. ; Copyright (c) 1992 Microsoft Corporation. All Rights Reserved. ; ;--------------------------------------------------------------------------- NAME CPUSPEED .286p ;------------------------------------------------------------------------- .xlist ; suspend listing ?PLM=1 ; support Pascal calling ?WIN=1 ; support Windows memM=1 ; medium model include CMacros.Inc include Windows.Inc .list ;------------------------------------------------------------------------- ;------------------------------------------------------------------------- ; local definitions ;------------------------------------------------------------------------- Timer1_Ctl_Port equ 43h Timer1_Ctr2 equ 42h System_Port_B equ 61h ; SC1 SC0 RW1 RW0 M2 M1 M0 BCD Ctr2_Access equ 10110100b ; 1 0 1 1 0 1 0 0 ; Counter 2 (Speaker tone) ; Read/Write LSB first, then MSB ; Rate generator (count down) ; Binary counter ; SC1 SC0 RW1 RW0 D3 D2 D1 D0 Ctr2_Latch equ 10000000b ; 1 0 0 0 X X X X ; Counter 2 (Speaker tone) ; Counter latch command assumes DS, NOTHING ;------------------------------------------------------------------------- ; segment definition ;------------------------------------------------------------------------- createSeg CPUSPEED, CPUSPEED, PARA, PUBLIC, CODE sBegin CPUSPEED assumes CS, CPUSPEED ;------------------------------------------------------------------------ ; DWORD ComputeCPUSpeed, <PUBLIC, FAR> ; ; Description: ; ; ; Parameters: ; ; ; ; History: Date Author Comment ; 8/13/92 BryanW Wrote it. ; ;------------------------------------------------------------------------ cProc ComputeCPUSpeed, <PUBLIC, FAR> LocalW wTicks cBegin mov dx, System_Port_B ; turn off speaker in al, dx ; & timer 2... and al, 0fch out dx, al mov dx, Timer1_Ctl_Port mov al, Ctr2_Access out dx, al mov dx, Timer1_Ctr2 xor al, al out dx, al ; reset counter nop out dx, al pushf cli mov dx, System_Port_B ; enable input in al, dx ; to timer 1 / ctr 2 mov bl, al or al, 1 out dx, al ; db 250 dup (0f8h) ; clc dw 250 dup (0ad4h) ; aam mov al, bl out dx, al pop ax cmp ah, 2 jz SHORT @F sti @@: mov dx, Timer1_Ctr2 in al, dx ; al <- LSB mov ah, al nop in al, dx ; al <- MSB xchg al, ah ; order AX neg ax mov dx, 250 * 15 cEnd sEnd CPUSPEED end ;--------------------------------------------------------------------------- ; End of File: cpuspeed.asm ;--------------------------------------------------------------------------- 
src/vulkan-math/gentype/vulkan-math-genbtype.ads
zrmyers/VulkanAda
1
11482
-------------------------------------------------------------------------------- -- MIT License -- -- Copyright (c) 2020 <NAME> -- -- Permission is hereby granted, free of charge, to any person obtaining a copy -- of this software and associated documentation files (the "Software"), to deal -- in the Software without restriction, including without limitation the rights -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -- copies of the Software, and to permit persons to whom the Software is -- furnished to do so, subject to the following conditions: -- -- The above copyright notice and this permission notice shall be included in all -- copies or substantial portions of the Software. -- -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -- SOFTWARE. -------------------------------------------------------------------------------- with Vulkan.Math.GenType; -------------------------------------------------------------------------------- --< @group Vulkan Math GenType -------------------------------------------------------------------------------- --< @summary --< This package describes any length vector of Vkm_Bool type. --< --< @description --< Provides an instantiation of the generic GenType package with a Base_Type of --< Vkm_Bool. This is used to provide the Vkm_GenBType subtype for the Vulkan Math --< library. -------------------------------------------------------------------------------- package Vulkan.Math.GenBType is pragma Preelaborate; pragma Pure; --< @private --< An instance of the generic GenType package, with Vkm_Bool as the Base_Type. package GBT is new Vulkan.Math.GenType( Base_Type => Vkm_Bool, Default_Value => false, Image => Vkm_Bool'Image, Unary_Minus => "-", Multiply => "*"); --< A subtype of the instantiated Vkm_GenType that represents the GenBType --< described in the GLSL specification. subtype Vkm_GenBType is GBT.Vkm_GenType; end Vulkan.Math.GenBType;
Assembler/AssemblyCode/SAR.asm
KPU-RISC/KPU
8
243768
<reponame>KPU-RISC/KPU MOV D, 10001000b ; -120d SAR D ; -60d ; Write register D to the Output Port OUTB D SAR D ; -30d ; Write register D to the Output Port OUTB D SAR D ; -15d ; Write register D to the Output Port OUTB D HLT
programs/count_255_0_stop.asm
blurpy/8-bit-computer-emulator
12
9949
<reponame>blurpy/8-bit-computer-emulator SUB 15 ; Put the value from memory location 15 in the B-register, and store A-B in the A-register OUT ; Output the value of the A-register JZ 4 ; Jump to instruction 4 if the A-register is 0 JMP 0 ; Jump to instruction 0 HLT ; Halt the computer ORG 15 ; Change memory location to 15 DB 1 ; Define a byte with the value 1 at memory location 15
3-mid/impact/source/3d/collision/shapes/impact-d3-collision-margin.ads
charlie5/lace
20
6836
<gh_stars>10-100 package impact.d3.collision.Margin is CONVEX_DISTANCE_MARGIN : constant := 0.04; -- -- The CONVEX_DISTANCE_MARGIN is a default collision margin for convex collision shapes derived from impact.d3.Shape.convex.internal. -- -- This collision margin is used by Gjk and some other algorithms -- Note that when creating small objects, you need to make sure to set a smaller collision margin, using the 'setMargin' API end impact.d3.collision.Margin;
tests/src/missing-aunit-assertions.adb
TNO/Rejuvenation-Ada
1
28960
with AUnit.Assertions; use AUnit.Assertions; package body Missing.AUnit.Assertions is procedure Generic_Assert (Actual, Expected : Element_T; Message : String; Source : String := GNAT.Source_Info.File; Line : Natural := GNAT.Source_Info.Line) is begin Assert (Condition => Actual = Expected, Message => Message & ASCII.LF & "Actual : " & Element_T'Image (Actual) & ASCII.LF & "Expected : " & Element_T'Image (Expected), Source => Source, Line => Line); end Generic_Assert; end Missing.AUnit.Assertions;
source/nodes/program-nodes-record_definitions.adb
optikos/oasis
0
10001
<filename>source/nodes/program-nodes-record_definitions.adb -- Copyright (c) 2019 <NAME> <<EMAIL>> -- -- SPDX-License-Identifier: MIT -- License-Filename: LICENSE ------------------------------------------------------------- package body Program.Nodes.Record_Definitions is function Create (Record_Token : not null Program.Lexical_Elements.Lexical_Element_Access; Components : not null Program.Element_Vectors.Element_Vector_Access; End_Token : not null Program.Lexical_Elements.Lexical_Element_Access; Record_Token_2 : not null Program.Lexical_Elements.Lexical_Element_Access) return Record_Definition is begin return Result : Record_Definition := (Record_Token => Record_Token, Components => Components, End_Token => End_Token, Record_Token_2 => Record_Token_2, Enclosing_Element => null) do Initialize (Result); end return; end Create; function Create (Components : not null Program.Element_Vectors .Element_Vector_Access; Is_Part_Of_Implicit : Boolean := False; Is_Part_Of_Inherited : Boolean := False; Is_Part_Of_Instance : Boolean := False) return Implicit_Record_Definition is begin return Result : Implicit_Record_Definition := (Components => Components, Is_Part_Of_Implicit => Is_Part_Of_Implicit, Is_Part_Of_Inherited => Is_Part_Of_Inherited, Is_Part_Of_Instance => Is_Part_Of_Instance, Enclosing_Element => null) do Initialize (Result); end return; end Create; overriding function Components (Self : Base_Record_Definition) return not null Program.Element_Vectors.Element_Vector_Access is begin return Self.Components; end Components; overriding function Record_Token (Self : Record_Definition) return not null Program.Lexical_Elements.Lexical_Element_Access is begin return Self.Record_Token; end Record_Token; overriding function End_Token (Self : Record_Definition) return not null Program.Lexical_Elements.Lexical_Element_Access is begin return Self.End_Token; end End_Token; overriding function Record_Token_2 (Self : Record_Definition) return not null Program.Lexical_Elements.Lexical_Element_Access is begin return Self.Record_Token_2; end Record_Token_2; overriding function Is_Part_Of_Implicit (Self : Implicit_Record_Definition) return Boolean is begin return Self.Is_Part_Of_Implicit; end Is_Part_Of_Implicit; overriding function Is_Part_Of_Inherited (Self : Implicit_Record_Definition) return Boolean is begin return Self.Is_Part_Of_Inherited; end Is_Part_Of_Inherited; overriding function Is_Part_Of_Instance (Self : Implicit_Record_Definition) return Boolean is begin return Self.Is_Part_Of_Instance; end Is_Part_Of_Instance; procedure Initialize (Self : aliased in out Base_Record_Definition'Class) is begin for Item in Self.Components.Each_Element loop Set_Enclosing_Element (Item.Element, Self'Unchecked_Access); end loop; null; end Initialize; overriding function Is_Record_Definition_Element (Self : Base_Record_Definition) return Boolean is pragma Unreferenced (Self); begin return True; end Is_Record_Definition_Element; overriding function Is_Definition_Element (Self : Base_Record_Definition) return Boolean is pragma Unreferenced (Self); begin return True; end Is_Definition_Element; overriding procedure Visit (Self : not null access Base_Record_Definition; Visitor : in out Program.Element_Visitors.Element_Visitor'Class) is begin Visitor.Record_Definition (Self); end Visit; overriding function To_Record_Definition_Text (Self : aliased in out Record_Definition) return Program.Elements.Record_Definitions .Record_Definition_Text_Access is begin return Self'Unchecked_Access; end To_Record_Definition_Text; overriding function To_Record_Definition_Text (Self : aliased in out Implicit_Record_Definition) return Program.Elements.Record_Definitions .Record_Definition_Text_Access is pragma Unreferenced (Self); begin return null; end To_Record_Definition_Text; end Program.Nodes.Record_Definitions;
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_488.asm
ljhsiun2/medusa
9
98837
<reponame>ljhsiun2/medusa .global s_prepare_buffers s_prepare_buffers: push %r14 push %r9 push %rbx push %rcx push %rdi push %rsi lea addresses_A_ht+0x3334, %rbx nop nop nop cmp %r14, %r14 movw $0x6162, (%rbx) nop nop nop xor %rdi, %rdi lea addresses_WC_ht+0x19eb4, %rsi lea addresses_WC_ht+0xf034, %rdi nop nop nop nop cmp %r9, %r9 mov $27, %rcx rep movsq nop nop nop nop nop add $27901, %rcx pop %rsi pop %rdi pop %rcx pop %rbx pop %r9 pop %r14 ret .global s_faulty_load s_faulty_load: push %r11 push %r13 push %r9 push %rax push %rbx push %rdx push %rsi // Store lea addresses_PSE+0x14962, %rax nop nop nop nop nop cmp $20369, %r11 movb $0x51, (%rax) nop nop cmp %rdx, %rdx // Faulty Load lea addresses_RW+0x3034, %r9 dec %r13 movups (%r9), %xmm1 vpextrq $0, %xmm1, %rax lea oracles, %r11 and $0xff, %rax shlq $12, %rax mov (%r11,%rax,1), %rax pop %rsi pop %rdx pop %rbx pop %rax pop %r9 pop %r13 pop %r11 ret /* <gen_faulty_load> [REF] {'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_RW', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_PSE', 'AVXalign': True, 'size': 1}} [Faulty Load] {'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_RW', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'} <gen_prepare_buffer> {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 2}} {'src': {'same': False, 'congruent': 7, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 11, 'type': 'addresses_WC_ht'}} {'32': 21829} 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 */
oeis/068/A068203.asm
neoneye/loda-programs
11
11967
; A068203: Chebyshev T-polynomials T(n,15) with Diophantine property. ; Submitted by <NAME> ; 1,15,449,13455,403201,12082575,362074049,10850138895,325142092801,9743412645135,291977237261249,8749573705192335,262195233918508801,7857107443850071695,235451028081583642049,7055673735003659189775,211434761022028192051201,6335987156925842102346255,189868179946753234878336449,5689709411245671204247747215,170501414157423382892554080001,5109352715311455815572374652815,153110080045186251084278685504449,4588193048640276076712788190480655,137492681379163096050299367028915201 mov $3,1 lpb $0 sub $0,1 mul $1,28 add $3,$1 add $2,$3 mov $1,$2 add $3,2 lpe mov $0,$1 mul $0,14 add $0,1
out/Combinatory/Equality.agda
JoeyEremondi/agda-soas
39
3925
<reponame>JoeyEremondi/agda-soas<gh_stars>10-100 {- This second-order equational theory was created from the following second-order syntax description: syntax Combinatory | CL type * : 0-ary term app : * * -> * | _$_ l20 i : * k : * s : * theory (IA) x |> app (i, x) = x (KA) x y |> app (app(k, x), y) = x (SA) x y z |> app (app (app (s, x), y), z) = app (app(x, z), app(y, z)) -} module Combinatory.Equality where open import SOAS.Common open import SOAS.Context open import SOAS.Variable open import SOAS.Families.Core open import SOAS.Families.Build open import SOAS.ContextMaps.Inductive open import Combinatory.Signature open import Combinatory.Syntax open import SOAS.Metatheory.SecondOrder.Metasubstitution CL:Syn open import SOAS.Metatheory.SecondOrder.Equality CL:Syn private variable α β γ τ : *T Γ Δ Π : Ctx infix 1 _▹_⊢_≋ₐ_ -- Axioms of equality data _▹_⊢_≋ₐ_ : ∀ 𝔐 Γ {α} → (𝔐 ▷ CL) α Γ → (𝔐 ▷ CL) α Γ → Set where IA : ⁅ * ⁆̣ ▹ ∅ ⊢ I $ 𝔞 ≋ₐ 𝔞 KA : ⁅ * ⁆ ⁅ * ⁆̣ ▹ ∅ ⊢ (K $ 𝔞) $ 𝔟 ≋ₐ 𝔞 SA : ⁅ * ⁆ ⁅ * ⁆ ⁅ * ⁆̣ ▹ ∅ ⊢ ((S $ 𝔞) $ 𝔟) $ 𝔠 ≋ₐ (𝔞 $ 𝔠) $ (𝔟 $ 𝔠) open EqLogic _▹_⊢_≋ₐ_ open ≋-Reasoning
Data/List/Mapping/StringMap.agda
oisdk/agda-playground
6
2504
<reponame>oisdk/agda-playground<filename>Data/List/Mapping/StringMap.agda {-# OPTIONS --cubical --safe #-} module Data.List.Mapping.StringMap where open import Data.String using (String; stringOrd) open import Data.List.Mapping stringOrd public open import Prelude open import Data.Maybe -- example : Record (∅ [ "name" ]︓ String [ "age" ]︓ ℕ [ "occ" ]︓ Bool) -- example = -- ∅ [ "age" ]≔ 30 -- [ "occ" ]≔ true -- [ "name" ]≔ "Jo"
test/Fail/Invalid-name-part.agda
shlevy/agda
1,989
12340
<filename>test/Fail/Invalid-name-part.agda postulate _→_ : Set
programs/oeis/104/A104249.asm
neoneye/loda
22
160340
<gh_stars>10-100 ; A104249: a(n) = (3*n^2 + n + 2)/2. ; 1,3,8,16,27,41,58,78,101,127,156,188,223,261,302,346,393,443,496,552,611,673,738,806,877,951,1028,1108,1191,1277,1366,1458,1553,1651,1752,1856,1963,2073,2186,2302,2421,2543,2668,2796,2927,3061,3198,3338,3481,3627,3776,3928,4083,4241,4402,4566,4733,4903,5076,5252,5431,5613,5798,5986,6177,6371,6568,6768,6971,7177,7386,7598,7813,8031,8252,8476,8703,8933,9166,9402,9641,9883,10128,10376,10627,10881,11138,11398,11661,11927,12196,12468,12743,13021,13302,13586,13873,14163,14456,14752 mul $0,-3 bin $0,2 div $0,3 add $0,1
tests/test.adb
Lucretia/jni
3
23054
-- with Ada.Characters.Latin_1; with Interfaces.C; use Interfaces.C; with Interfaces.C.Strings; use Interfaces.C.Strings; with JNI; use JNI; with System; with Text_IO; use Text_IO; procedure Test is -- package L1 renames Ada.Characters.Latin_1; VM : Java_VM_Ptr_Ptr; Env : Env_Ptr_Ptr; Options : aliased VM_Option_Arrays (0 .. 0) := (0 => (Option_String => New_String ("-verbose:jni"), Extra_Info => System.Null_Address)); Args : aliased VM_Init_Args := (Version => JNI_VERSION_1_8, Total_Options => Options'Length, Options => Options (0)'Unchecked_Access, Ignore_Unrecognised => True); Java_System_Class_Name : chars_ptr := New_String ("java/lang/System"); Java_Out_Name : chars_ptr := New_String ("out"); Java_Out_Name_Sig : chars_ptr := New_String ("Ljava/io/PrintStream;"); Java_PrintStream_Class_Name : chars_ptr := New_String ("java/io/PrintStream"); Java_Println_Name : chars_ptr := New_String ("println"); Java_Println_Name_Sig : chars_ptr := New_String ("(Ljava/lang/String;)V"); Java_Message_Unicode_C : aliased char16_array := To_C ("Hello from Java"); Java_Message_Unicode : jchar_Array_Ptr.Pointer := Java_Message_Unicode_C (0)'Unchecked_Access; Java_System_Class : jclass; Java_Out_Field_ID : JNI.jfieldID; Java_Out_Object : JNI.jobject; Java_PrintStream_Class : jclass; Java_Println_Method_ID : JNI.jmethodID; Java_Message : jstring; Java_Println_Args : aliased jobject_Arrays (0 .. 0); Result : jint := JNI.Create_Java_VM (VM, Env, Args'Unchecked_Access); use type jint; begin if Result /= JNI_OK then Put_Line ("Error! Cannot create Java VM."); else -- Get the System class. Java_System_Class := Env.all.Find_Class (Env, Java_System_Class_Name); -- Get the out static field. Java_Out_Field_ID := Env.all.Get_Static_Field_ID (Env, Java_System_Class, Java_Out_Name, Java_Out_Name_Sig); Java_Out_Object := Env.all.Get_Static_Object_Field (Env, Java_System_Class, Java_Out_Field_ID); -- Get the PrintStream class. Java_PrintStream_Class := Env.all.Find_Class (Env, Java_PrintStream_Class_Name); -- Get the println(String) method. Java_Println_Method_ID := Env.all.Get_Method_ID (Env, Java_PrintStream_Class, Java_Println_Name, Java_Println_Name_Sig); -- Invoke println. Java_Message := Env.all.New_String (Env, Java_Message_Unicode, Java_Message_Unicode_C'Length); Java_Println_Args (0) := Java_Message; Env.all.Call_Void_Method_A (Env, Java_Out_Object, Java_Println_Method_ID, Java_Println_Args (0)'Unchecked_Access); end if; -- Free all the C strings allocated. for S of Options loop Free (S.Option_String); end loop; Free (Java_System_Class_Name); Free (Java_Out_Name); Free (Java_Out_Name_Sig); Free (Java_PrintStream_Class_Name); Free (Java_Println_Name); Free (Java_Println_Name_Sig); -- Free (Java_Message_Unicode); if VM.all.Destroy_Java_VM (VM) /= JNI_OK then Put_Line ("Error! Cannot destroy Java VM."); end if; end Test;
tagml/src/main/antlr4/nl/knaw/huc/di/tag/tagml/grammar/TAGMLLexer.g4
rhdekker/alexandria-markup
0
276
<reponame>rhdekker/alexandria-markup /* * Grammar for the TAGML overlapping markup language format * @author: <NAME> * @author: <NAME> * */ lexer grammar TAGMLLexer; // default mode DEFAULT_NamespaceOpener // : '[!ns ' NamespaceIdentifier WS NamespaceURI ']' : '[!ns ' -> pushMode(INSIDE_NAMESPACE) ; DEFAULT_Comment : Comment -> skip ; DEFAULT_BeginOpenMarkup // [ moves into markup tag : LEFT_SQUARE_BRACKET -> pushMode(INSIDE_MARKUP_OPENER) ; DEFAULT_BeginTextVariation : TextVariationStartTag -> pushMode(INSIDE_TEXT_VARIATION) ; DEFAULT_BeginCloseMarkup : TagCloseStartChar -> pushMode(INSIDE_MARKUP_CLOSER) ; DEFAULT_Text // match any 16 bit char other than { (start close tag) and [ (start open tag) : ( ~[[<\\] | REGULAR_TEXT_ESCAPE_CHARACTER )+ ; NAME : NameStartChar NameChar* ; // ----------------- Everything INSIDE of a MARKUP OPENER --------------------- mode INSIDE_NAMESPACE; IN_NamespaceIdentifier : NameChar+ ; IN_WS : WS -> skip ; IN_NamespaceURI : ('http://' | 'https://') ( NameChar | '/' | '.' )+ ; IN_NamespaceCloser : ']' -> popMode ; // ----------------- Everything INSIDE of a MARKUP OPENER --------------------- mode INSIDE_MARKUP_OPENER; IMO_Comment : Comment -> skip ; IMO_Prefix : Optional | Resume ; IMO_Suffix : TILDE ( NAME | DIGIT+ ) ; IMO_NameOpenMarkup : NAME ; IMO_WS : WS -> skip, pushMode(ANNOTATIONS) ; IMO_EndMilestoneMarkup : RIGHT_SQUARE_BRACKET -> popMode ; IMO_EndOpenMarkup : TagOpenEndChar -> popMode ; // ----------------- Everything after the markup name ------------- mode ANNOTATIONS; A_Ref : '->' -> pushMode(INSIDE_REF_VALUE) ; A_IdAnnotation : ':id' ; A_AnnotationName : NAME ; A_WS : WS -> skip ; A_EQ : '=' -> pushMode(ANNOTATION_VALUE) ; A_EndOpenMarkup : TagOpenEndChar -> popMode, popMode ; A_EndMilestoneMarkup : RIGHT_SQUARE_BRACKET -> popMode, popMode ; // ----------------- Everything after the = in an annotation ------------- mode ANNOTATION_VALUE; AV_WS : WS -> skip ; AV_StringValue : ( '"' ( ~["] | SINGLE_QUOTED_TEXT_ESCAPE_CHARACTER )+ '"' | '\'' ( ~['] | DOUBLE_QUOTED_TEXT_ESCAPE_CHARACTER )+ '\'' ) -> popMode ; AV_NumberValue : DIGIT+ ( '.' DIGIT+ )? -> popMode ; AV_TRUE : T R U E -> popMode ; AV_FALSE : F A L S E -> popMode ; AV_IdValue : NAME -> popMode ; AV_MixedContentOpener : '[>' -> pushMode(INSIDE_MIXED_CONTENT) ; AV_ObjectOpener : '{' -> pushMode(INSIDE_OBJECT) ; AV_ListOpener : LEFT_SQUARE_BRACKET -> pushMode(INSIDE_LIST), pushMode(ANNOTATION_VALUE) ; // ----------------- Everything after the -> in an annotation ------------- mode INSIDE_REF_VALUE; RV_RefValue : NAME -> popMode ; // ----------------- Everything INSIDE of | | ------------- mode INSIDE_MIXED_CONTENT; IMX_Comment : Comment -> skip ; IMX_BeginOpenMarkup // [ moves into markup tag : LEFT_SQUARE_BRACKET -> pushMode(INSIDE_MARKUP_OPENER) ; IMX_BeginTextVariation : TextVariationStartTag -> pushMode(INSIDE_TEXT_VARIATION) ; IMX_BeginCloseMarkup : TagCloseStartChar -> pushMode(INSIDE_MARKUP_CLOSER) ; IMX_Text : ( ~[[<\\] | REGULAR_TEXT_ESCAPE_CHARACTER )+ ; IMX_MixedContentCloser : '<]' -> popMode, popMode // back to INSIDE_MARKUP_OPENER ; // ----------------- Everything INSIDE of { } ------------- mode INSIDE_OBJECT; IO_WS : WS -> skip ; IO_IdAnnotation : ':id' ; IO_AnnotationName : NAME ; IO_EQ : '=' -> pushMode(ANNOTATION_VALUE) ; IO_ObjectCloser : '}' -> popMode, popMode // back to INSIDE_MARKUP_OPENER ; // ----------------- Everything INSIDE of [ ] ------------- mode INSIDE_LIST; IL_WS : WS -> skip ; IL_COMMA : COMMA -> pushMode(ANNOTATION_VALUE) ; IL_ListCloser : RIGHT_SQUARE_BRACKET -> popMode, popMode // back to INSIDE_MARKUP_OPENER ; // ----------------- Everything INSIDE of a MARKUP CLOSER ------------- mode INSIDE_MARKUP_CLOSER; IMC_Prefix : Optional | Suspend ; IMC_NameCloseMarkup : NAME ; IMC_Suffix : TILDE ( NAME | DIGIT+ ) ; IMC_WS : WS -> skip ; IMC_EndCloseMarkup : RIGHT_SQUARE_BRACKET -> popMode // back to DEFAULT ; // ----------------- Everything INSIDE of a TEXT VARIATION ------------- mode INSIDE_TEXT_VARIATION; ITV_Comment : Comment -> skip ; ITV_Text : ( ~[<[|] | TEXT_VARIATION_ESCAPE_CHARACTER )+ ; ITV_BeginOpenMarkup // [ moves into markup tag : LEFT_SQUARE_BRACKET -> pushMode(INSIDE_MARKUP_OPENER) ; ITV_BeginTextVariation : TextVariationStartTag -> pushMode(INSIDE_TEXT_VARIATION) ; ITV_BeginCloseMarkup : TagCloseStartChar -> pushMode(INSIDE_MARKUP_CLOSER) ; ITV_EndTextVariation : TextVariationEndTag -> popMode ; // ----------------- lots of repeated stuff -------------------------- Comment : '[! ' .*? ' !]' ; TagOpenEndChar : '>' ; TagCloseStartChar : '<' ; TextVariationStartTag : '<|' ; TextVariationEndTag : '|>' ; TextVariationSeparator : PIPE ; PIPE : '|' ; Optional : '?' ; Resume : '+' ; Suspend : '-' ; TILDE : '~' ; LIST_OPENER : LEFT_SQUARE_BRACKET ; LIST_CLOSER : RIGHT_SQUARE_BRACKET ; DOT : '.' ; COMMA : ',' ; LEFT_SQUARE_BRACKET : '[' ; RIGHT_SQUARE_BRACKET : ']' ; DIGIT : [0-9] ; REGULAR_TEXT_ESCAPE_CHARACTER : '\\<' | '\\[' | ESCAPE_CHARACTER ; TEXT_VARIATION_ESCAPE_CHARACTER : REGULAR_TEXT_ESCAPE_CHARACTER | '\\|' ; COMMENT_ESCAPE_CHARACTER : ESCAPE_CHARACTER | '\\!' ; SINGLE_QUOTED_TEXT_ESCAPE_CHARACTER : ESCAPE_CHARACTER | '\\\'' ; DOUBLE_QUOTED_TEXT_ESCAPE_CHARACTER : ESCAPE_CHARACTER | '\\"' ; fragment ESCAPE_CHARACTER : '\\\\'; fragment A : [Aa]; fragment B : [Bb]; fragment C : [Cc]; fragment D : [Dd]; fragment E : [Ee]; fragment F : [Ff]; fragment G : [Gg]; fragment H : [Hh]; fragment I : [Ii]; fragment J : [Jj]; fragment K : [Kk]; fragment L : [Ll]; fragment M : [Mm]; fragment N : [Nn]; fragment O : [Oo]; fragment P : [Pp]; fragment Q : [Qq]; fragment R : [Rr]; fragment S : [Ss]; fragment T : [Tt]; fragment U : [Uu]; fragment V : [Vv]; fragment W : [Ww]; fragment X : [Xx]; fragment Y : [Yy]; fragment Z : [Zz]; fragment NameChar : NameStartChar | '_' | DIGIT | '\u00B7' | '\u0300'..'\u036F' | '\u203F'..'\u2040' ; fragment NameStartChar : [:a-zA-Z] | '\u2070'..'\u218F' | '\u2C00'..'\u2FEF' | '\u3001'..'\uD7FF' | '\uF900'..'\uFDCF' | '\uFDF0'..'\uFFFD' ; WS : [ \t\r\n]+ ; //UNEXPECTED_CHAR // Throw unexpected token exception // : . // ;
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_2464_925.asm
ljhsiun2/medusa
9
177900
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r13 push %r15 push %r9 push %rbp push %rcx push %rdi push %rsi lea addresses_A_ht+0x1ce2a, %rsi lea addresses_D_ht+0xf318, %rdi nop nop nop cmp %rbp, %rbp mov $55, %rcx rep movsl nop nop inc %r15 lea addresses_normal_ht+0x15d18, %rsi lea addresses_UC_ht+0x13318, %rdi clflush (%rdi) nop nop nop nop and %r13, %r13 mov $71, %rcx rep movsl nop nop nop nop nop and $38828, %rdi lea addresses_normal_ht+0xa718, %r15 sub $34507, %r9 movl $0x61626364, (%r15) nop add $5184, %r13 lea addresses_D_ht+0x1a100, %rsi lea addresses_normal_ht+0x15118, %rdi nop nop nop nop nop cmp $25285, %r11 mov $121, %rcx rep movsb nop nop sub %r13, %r13 lea addresses_WC_ht+0x1d718, %rbp nop nop nop inc %r13 movw $0x6162, (%rbp) nop nop nop nop xor %r13, %r13 lea addresses_WC_ht+0x3f18, %r11 cmp %rcx, %rcx and $0xffffffffffffffc0, %r11 movaps (%r11), %xmm1 vpextrq $0, %xmm1, %rbp dec %rcx lea addresses_WT_ht+0x7ae8, %r13 nop add $2636, %rcx movb $0x61, (%r13) cmp $63258, %rbp lea addresses_WT_ht+0x3f18, %r11 xor $13467, %rdi movl $0x61626364, (%r11) nop nop and $27365, %rdi lea addresses_D_ht+0x6318, %rcx nop nop inc %rdi vmovups (%rcx), %ymm6 vextracti128 $0, %ymm6, %xmm6 vpextrq $0, %xmm6, %r13 nop add %rcx, %rcx pop %rsi pop %rdi pop %rcx pop %rbp pop %r9 pop %r15 pop %r13 pop %r11 ret .global s_faulty_load s_faulty_load: push %r11 push %r12 push %r15 push %r9 push %rax push %rcx push %rdi // Store lea addresses_WT+0x1b0, %r12 nop nop nop nop add $23574, %r9 mov $0x5152535455565758, %rax movq %rax, %xmm4 vmovups %ymm4, (%r12) cmp %rdi, %rdi // Store lea addresses_WC+0x1da18, %rcx clflush (%rcx) nop nop nop and %r9, %r9 movw $0x5152, (%rcx) nop nop nop nop nop sub $63078, %rcx // Load lea addresses_normal+0x1d318, %rax xor %r15, %r15 vmovups (%rax), %ymm3 vextracti128 $1, %ymm3, %xmm3 vpextrq $1, %xmm3, %rdi nop inc %rcx // Faulty Load lea addresses_normal+0x1d318, %r11 nop nop nop nop nop and %rax, %rax movups (%r11), %xmm7 vpextrq $0, %xmm7, %r15 lea oracles, %r12 and $0xff, %r15 shlq $12, %r15 mov (%r12,%r15,1), %r15 pop %rdi pop %rcx pop %rax pop %r9 pop %r15 pop %r12 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': True, 'NT': False, 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} {'34': 2464} 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 */
source/strings/a-snmcfo.adb
ytomino/drake
33
28111
<filename>source/strings/a-snmcfo.adb pragma Check_Policy (Validate => Disable); -- with Ada.Strings.Naked_Maps.Debug; with Ada.UCD.Case_Folding; with System.Once; with System.Reference_Counting; package body Ada.Strings.Naked_Maps.Case_Folding is use type UCD.Difference_Base; use type UCD.UCS_4; procedure Decode ( Mapping : in out Character_Mapping_Data; I : in out Positive; Table : UCD.Map_16x1_Type); procedure Decode ( Mapping : in out Character_Mapping_Data; I : in out Positive; Table : UCD.Map_16x1_Type) is begin for J in Table'Range loop declare F : UCD.Map_16x1_Item_Type renames Table (J); begin Mapping.From (I) := Character_Type'Val (F.Code); Mapping.To (I) := Character_Type'Val (F.Mapping); end; I := I + 1; end loop; end Decode; procedure Decode ( Mapping : in out Character_Mapping_Data; I : in out Positive; Table : UCD.Case_Folding.Compressed_Type; Offset : UCD.Difference_Base); procedure Decode ( Mapping : in out Character_Mapping_Data; I : in out Positive; Table : UCD.Case_Folding.Compressed_Type; Offset : UCD.Difference_Base) is begin for J in Table'Range loop declare F : UCD.Case_Folding.Compressed_Item_Type renames Table (J); From : Character_Type := Character_Type'Val (UCD.Difference_Base (F.Start) + Offset); To : Character_Type := Character_Type'Val (Character_Type'Pos (From) + F.Diff); begin for K in 1 .. F.Length loop Mapping.From (I) := From; Mapping.To (I) := To; From := Character_Type'Succ (From); To := Character_Type'Succ (To); I := I + 1; end loop; end; end loop; end Decode; type Character_Mapping_Access_With_Pool is access Character_Mapping_Data; Mapping : Character_Mapping_Access_With_Pool; Mapping_Flag : aliased System.Once.Flag := 0; procedure Mapping_Init; procedure Mapping_Init is begin Mapping := new Character_Mapping_Data'( Length => UCD.Case_Folding.C_Total + UCD.Case_Folding.S_Total, Reference_Count => System.Reference_Counting.Static, From => <>, To => <>); declare I : Positive := Mapping.From'First; begin -- 16#0041# .. Decode ( Mapping.all, I, UCD.Case_Folding.C_Table_XXXXx1_Compressed, Offset => 0); -- 16#00B5# .. Decode ( Mapping.all, I, UCD.Case_Folding.C_Table_XXXXx1); -- 16#1E9E# .. Decode ( Mapping.all, I, UCD.Case_Folding.S_Table_XXXXx1); -- 16#1F88# .. Decode ( Mapping.all, I, UCD.Case_Folding.S_Table_XXXXx1_Compressed, Offset => 0); -- 16#10400# .. Decode ( Mapping.all, I, UCD.Case_Folding.C_Table_1XXXXx1_Compressed, Offset => 16#10000#); pragma Assert (I = Mapping.From'Last + 1); end; Sort (Mapping.From, Mapping.To); pragma Check (Validate, Debug.Valid (Mapping.all)); end Mapping_Init; -- implementation function Case_Folding_Map return not null Character_Mapping_Access is begin System.Once.Initialize (Mapping_Flag'Access, Mapping_Init'Access); return Character_Mapping_Access (Mapping); end Case_Folding_Map; end Ada.Strings.Naked_Maps.Case_Folding;
libsrc/_DEVELOPMENT/math/float/am9511/lam32/c/sccz80/atanh.asm
ahjelm/z88dk
640
85301
SECTION code_fp_am9511 PUBLIC atanh EXTERN cam32_sccz80_atanh defc atanh = cam32_sccz80_atanh ; SDCC bridge for Classic IF __CLASSIC PUBLIC _atanh EXTERN cam32_sdcc_atanh defc _atanh = cam32_sdcc_atanh ENDIF
tools/scitools/conf/understand/ada/ada05/a-calend.ads
brucegua/moocos
1
18728
------------------------------------------------------------------------------ -- -- -- GNAT RUN-TIME COMPONENTS -- -- -- -- A D A . C A L E N D A R -- -- -- -- S p e c -- -- -- -- Copyright (C) 1992-2006, Free Software Foundation, Inc. -- -- -- -- This specification is derived from the Ada Reference Manual for use with -- -- GNAT. The copyright notice above, and the license provisions that follow -- -- apply solely to the contents of the part following the private keyword. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- -- ware Foundation; either version 2, or (at your option) any later ver- -- -- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- -- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- -- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- -- for more details. You should have received a copy of the GNU General -- -- Public License distributed with GNAT; see file COPYING. If not, write -- -- to the Free Software Foundation, 51 Franklin Street, Fifth Floor, -- -- Boston, MA 02110-1301, USA. -- -- -- -- -- -- -- -- -- -- -- GNAT was originally developed by the GNAT team at New York University. -- -- Extensive contributions were provided by Ada Core Technologies Inc. -- -- -- ------------------------------------------------------------------------------ package Ada.Calendar is type Time is private; -- Declarations representing limits of allowed local time values. Note that -- these do NOT constrain the possible stored values of time which may well -- permit a larger range of times (this is explicitly allowed in Ada 95). subtype Year_Number is Integer range 1901 .. 2099; subtype Month_Number is Integer range 1 .. 12; subtype Day_Number is Integer range 1 .. 31; subtype Day_Duration is Duration range 0.0 .. 86_400.0; function Clock return Time; function Year (Date : Time) return Year_Number; function Month (Date : Time) return Month_Number; function Day (Date : Time) return Day_Number; function Seconds (Date : Time) return Day_Duration; procedure Split (Date : Time; Year : out Year_Number; Month : out Month_Number; Day : out Day_Number; Seconds : out Day_Duration); function Time_Of (Year : Year_Number; Month : Month_Number; Day : Day_Number; Seconds : Day_Duration := 0.0) return Time; -- GNAT Note: Normally when procedure Split is called on a Time value -- result of a call to function Time_Of, the out parameters of procedure -- Split are identical to the in parameters of function Time_Of. However, -- when a non-existent time of day is specified, the values for Seconds -- may or may not be different. This may happen when Daylight Saving Time -- (DST) is in effect, on the day when switching to DST, if Seconds -- specifies a time of day in the hour that does not exist. For example, -- in New York: -- -- Time_Of (Year => 1998, Month => 4, Day => 5, Seconds => 10740.0) -- -- will return a Time value T. If Split is called on T, the resulting -- Seconds may be 14340.0 (3:59:00) instead of 10740.0 (2:59:00 being -- a time that not exist). function "+" (Left : Time; Right : Duration) return Time; function "+" (Left : Duration; Right : Time) return Time; function "-" (Left : Time; Right : Duration) return Time; function "-" (Left : Time; Right : Time) return Duration; function "<" (Left, Right : Time) return Boolean; function "<=" (Left, Right : Time) return Boolean; function ">" (Left, Right : Time) return Boolean; function ">=" (Left, Right : Time) return Boolean; Time_Error : exception; private pragma Inline (Clock); pragma Inline (Year); pragma Inline (Month); pragma Inline (Day); pragma Inline ("+"); pragma Inline ("-"); pragma Inline ("<"); pragma Inline ("<="); pragma Inline (">"); pragma Inline (">="); -- Time is represented as a signed duration from the base point which is -- what Unix calls the EPOCH (i.e. 12 midnight (24:00:00), Dec 31st, 1969, -- or if you prefer 0:00:00 on Jan 1st, 1970). Since Ada allows dates -- before this EPOCH value, the stored duration value may be negative. -- The time value stored is typically a GMT value, as provided in standard -- Unix environments. If this is the case then Split and Time_Of perform -- required conversions to and from local times. The range of times that -- can be stored in Time values depends on the declaration of the type -- Duration, which must at least cover the required Ada range represented -- by the declaration of Year_Number, but may be larger (we take full -- advantage of the new permission in Ada 95 to store time values outside -- the range that would be acceptable to Split). The Duration type is a -- real value representing a time interval in seconds. type Time is new Duration; -- The following package provides handling of leap seconds. It is -- used by Ada.Calendar.Arithmetic and Ada.Calendar.Formatting, both -- Ada 2005 children of Ada.Calendar. package Leap_Sec_Ops is After_Last_Leap : constant Time := Time'Last; -- Bigger by far than any leap second value. Not within range of -- Ada.Calendar specified dates. procedure Cumulative_Leap_Secs (Start_Date : Time; End_Date : Time; Leaps_Between : out Duration; Next_Leap_Sec : out Time); -- Leaps_Between is the sum of the leap seconds that have occured -- on or after Start_Date and before (strictly before) End_Date. -- Next_Leap_Sec represents the next leap second occurence on or -- after End_Date. If there are no leaps seconds after End_Date, -- After_Last_Leap is returned. This does not provide info about -- the next leap second (pos/neg or ?). After_Last_Leap can be used -- as End_Date to count all the leap seconds that have occured on -- or after Start_Date. -- Important Notes: any fractional parts of Start_Date and End_Date -- are discarded before the calculations are done. For instance: if -- 113 seconds is a leap second (it isn't) and 113.5 is input as an -- End_Date, the leap second at 113 will not be counted in -- Leaps_Between, but it will be returned as Next_Leap_Sec. Thus, if -- the caller wants to know if the End_Date is a leap second, the -- comparison should be: -- End_Date >= Next_Leap_Sec; -- After_Last_Leap is designed so that this comparison works without -- having to first check if Next_Leap_Sec is a valid leap second. function All_Leap_Seconds return Duration; -- Returns the sum off all of the leap seoncds. end Leap_Sec_Ops; procedure Split_W_Offset (Date : Time; Year : out Year_Number; Month : out Month_Number; Day : out Day_Number; Seconds : out Day_Duration; Offset : out Long_Integer); -- Split_W_Offset has the same spec as Split with the addition of an -- offset value which give the offset of the local time zone from UTC -- at the input Date. This value comes for free during the implementation -- of Split and is needed by UTC_Time_Offset. The returned Offset time -- is straight from the C tm struct and is in seconds. end Ada.Calendar;
alloy4fun_models/trashltl/models/1/jmTQFvTJwHnnaQMJ6.als
Kaixi26/org.alloytools.alloy
0
1929
<filename>alloy4fun_models/trashltl/models/1/jmTQFvTJwHnnaQMJ6.als open main pred idjmTQFvTJwHnnaQMJ6_prop2 { no File until some File } pred __repair { idjmTQFvTJwHnnaQMJ6_prop2 } check __repair { idjmTQFvTJwHnnaQMJ6_prop2 <=> prop2o }
Agda/abelian-groups.agda
UlrikBuchholtz/HoTT-Intro
333
13799
{-# OPTIONS --without-K --exact-split #-} module abelian-groups where import 17-number-theory open 17-number-theory public is-abelian-Group : {l : Level} (G : Group l) → UU l is-abelian-Group G = (x y : type-Group G) → Id (mul-Group G x y) (mul-Group G y x) Ab : (l : Level) → UU (lsuc l) Ab l = Σ (Group l) is-abelian-Group group-Ab : {l : Level} (A : Ab l) → Group l group-Ab A = pr1 A set-Ab : {l : Level} (A : Ab l) → UU-Set l set-Ab A = set-Group (group-Ab A) type-Ab : {l : Level} (A : Ab l) → UU l type-Ab A = type-Group (group-Ab A) is-set-type-Ab : {l : Level} (A : Ab l) → is-set (type-Ab A) is-set-type-Ab A = is-set-type-Group (group-Ab A) associative-add-Ab : {l : Level} (A : Ab l) → has-associative-bin-op (set-Ab A) associative-add-Ab A = associative-mul-Group (group-Ab A) add-Ab : {l : Level} (A : Ab l) → type-Ab A → type-Ab A → type-Ab A add-Ab A = mul-Group (group-Ab A) is-associative-add-Ab : {l : Level} (A : Ab l) (x y z : type-Ab A) → Id (add-Ab A (add-Ab A x y) z) (add-Ab A x (add-Ab A y z)) is-associative-add-Ab A = is-associative-mul-Group (group-Ab A) semi-group-Ab : {l : Level} (A : Ab l) → Semi-Group l semi-group-Ab A = semi-group-Group (group-Ab A) is-group-Ab : {l : Level} (A : Ab l) → is-group (semi-group-Ab A) is-group-Ab A = is-group-Group (group-Ab A) has-zero-Ab : {l : Level} (A : Ab l) → is-unital (semi-group-Ab A) has-zero-Ab A = is-unital-Group (group-Ab A) zero-Ab : {l : Level} (A : Ab l) → type-Ab A zero-Ab A = unit-Group (group-Ab A) left-zero-law-Ab : {l : Level} (A : Ab l) → (x : type-Ab A) → Id (add-Ab A (zero-Ab A) x) x left-zero-law-Ab A = left-unit-law-Group (group-Ab A) right-zero-law-Ab : {l : Level} (A : Ab l) → (x : type-Ab A) → Id (add-Ab A x (zero-Ab A)) x right-zero-law-Ab A = right-unit-law-Group (group-Ab A) has-negatives-Ab : {l : Level} (A : Ab l) → is-group' (semi-group-Ab A) (has-zero-Ab A) has-negatives-Ab A = has-inverses-Group (group-Ab A) neg-Ab : {l : Level} (A : Ab l) → type-Ab A → type-Ab A neg-Ab A = inv-Group (group-Ab A) left-negative-law-Ab : {l : Level} (A : Ab l) (x : type-Ab A) → Id (add-Ab A (neg-Ab A x) x) (zero-Ab A) left-negative-law-Ab A = left-inverse-law-Group (group-Ab A) right-negative-law-Ab : {l : Level} (A : Ab l) (x : type-Ab A) → Id (add-Ab A x (neg-Ab A x)) (zero-Ab A) right-negative-law-Ab A = right-inverse-law-Group (group-Ab A) is-commutative-add-Ab : {l : Level} (A : Ab l) (x y : type-Ab A) → Id (add-Ab A x y) (add-Ab A y x) is-commutative-add-Ab A = pr2 A {- So far the basic interface of abelian groups. -} is-prop-is-abelian-Group : {l : Level} (G : Group l) → is-prop (is-abelian-Group G) is-prop-is-abelian-Group G = is-prop-Π (λ x → is-prop-Π (λ y → is-set-type-Group G _ _)) {- Homomorphisms of abelian groups -} preserves-add : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → (type-Ab A → type-Ab B) → UU (l1 ⊔ l2) preserves-add A B = preserves-mul (semi-group-Ab A) (semi-group-Ab B) hom-Ab : {l1 l2 : Level} → Ab l1 → Ab l2 → UU (l1 ⊔ l2) hom-Ab A B = hom-Group (group-Ab A) (group-Ab B) map-hom-Ab : {l1 l2 : Level} (A : Ab l1) (B : Ab l2) → hom-Ab A B → type-Ab A → type-Ab B map-hom-Ab A B = map-hom-Group (group-Ab A) (group-Ab B) preserves-add-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → ( f : hom-Ab A B) → preserves-add A B (map-hom-Ab A B f) preserves-add-Ab A B f = preserves-mul-hom-Group (group-Ab A) (group-Ab B) f {- We characterize the identity type of the abelian group homomorphisms. -} htpy-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) ( f g : hom-Ab A B) → UU (l1 ⊔ l2) htpy-hom-Ab A B f g = htpy-hom-Group (group-Ab A) (group-Ab B) f g reflexive-htpy-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → ( f : hom-Ab A B) → htpy-hom-Ab A B f f reflexive-htpy-hom-Ab A B f = reflexive-htpy-hom-Group (group-Ab A) (group-Ab B) f htpy-hom-Ab-eq : {l1 l2 : Level} (A : Ab l1) (B : Ab l2) → (f g : hom-Ab A B) → Id f g → htpy-hom-Ab A B f g htpy-hom-Ab-eq A B f g = htpy-hom-Group-eq (group-Ab A) (group-Ab B) f g abstract is-contr-total-htpy-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → ( f : hom-Ab A B) → is-contr (Σ (hom-Ab A B) (htpy-hom-Ab A B f)) is-contr-total-htpy-hom-Ab A B f = is-contr-total-htpy-hom-Group (group-Ab A) (group-Ab B) f abstract is-equiv-htpy-hom-Ab-eq : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → ( f g : hom-Ab A B) → is-equiv (htpy-hom-Ab-eq A B f g) is-equiv-htpy-hom-Ab-eq A B f g = is-equiv-htpy-hom-Group-eq (group-Ab A) (group-Ab B) f g eq-htpy-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → { f g : hom-Ab A B} → htpy-hom-Ab A B f g → Id f g eq-htpy-hom-Ab A B = eq-htpy-hom-Group (group-Ab A) (group-Ab B) is-set-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → is-set (hom-Ab A B) is-set-hom-Ab A B = is-set-hom-Group (group-Ab A) (group-Ab B) preserves-add-id : {l : Level} (A : Ab l) → preserves-add A A id preserves-add-id A = preserves-mul-id (semi-group-Ab A) id-hom-Ab : { l1 : Level} (A : Ab l1) → hom-Ab A A id-hom-Ab A = id-Group (group-Ab A) comp-hom-Ab : { l1 l2 l3 : Level} (A : Ab l1) (B : Ab l2) (C : Ab l3) → ( hom-Ab B C) → (hom-Ab A B) → (hom-Ab A C) comp-hom-Ab A B C = comp-Group (group-Ab A) (group-Ab B) (group-Ab C) is-associative-comp-hom-Ab : { l1 l2 l3 l4 : Level} (A : Ab l1) (B : Ab l2) (C : Ab l3) (D : Ab l4) → ( h : hom-Ab C D) (g : hom-Ab B C) (f : hom-Ab A B) → Id (comp-hom-Ab A B D (comp-hom-Ab B C D h g) f) (comp-hom-Ab A C D h (comp-hom-Ab A B C g f)) is-associative-comp-hom-Ab A B C D = associative-Semi-Group ( semi-group-Ab A) ( semi-group-Ab B) ( semi-group-Ab C) ( semi-group-Ab D) left-unit-law-comp-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) ( f : hom-Ab A B) → Id (comp-hom-Ab A B B (id-hom-Ab B) f) f left-unit-law-comp-hom-Ab A B = left-unit-law-Semi-Group (semi-group-Ab A) (semi-group-Ab B) right-unit-law-comp-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) ( f : hom-Ab A B) → Id (comp-hom-Ab A A B f (id-hom-Ab A)) f right-unit-law-comp-hom-Ab A B = right-unit-law-Semi-Group (semi-group-Ab A) (semi-group-Ab B) {- Isomorphisms of abelian groups -} is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → ( f : hom-Ab A B) → UU (l1 ⊔ l2) is-iso-hom-Ab A B = is-iso-hom-Semi-Group (semi-group-Ab A) (semi-group-Ab B) inv-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → is-iso-hom-Ab A B f → hom-Ab B A inv-is-iso-hom-Ab A B f = pr1 map-inv-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → is-iso-hom-Ab A B f → type-Ab B → type-Ab A map-inv-is-iso-hom-Ab A B f is-iso-f = map-hom-Ab B A (inv-is-iso-hom-Ab A B f is-iso-f) is-sec-inv-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → ( is-iso-f : is-iso-hom-Ab A B f) → Id (comp-hom-Ab B A B f (inv-is-iso-hom-Ab A B f is-iso-f)) (id-hom-Ab B) is-sec-inv-is-iso-hom-Ab A B f is-iso-f = pr1 (pr2 is-iso-f) is-sec-map-inv-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → ( is-iso-f : is-iso-hom-Ab A B f) → ( (map-hom-Ab A B f) ∘ (map-hom-Ab B A (inv-is-iso-hom-Ab A B f is-iso-f))) ~ id is-sec-map-inv-is-iso-hom-Ab A B f is-iso-f = htpy-hom-Ab-eq B B ( comp-hom-Ab B A B f (inv-is-iso-hom-Ab A B f is-iso-f)) ( id-hom-Ab B) ( is-sec-inv-is-iso-hom-Ab A B f is-iso-f) is-retr-inv-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → ( is-iso-f : is-iso-hom-Ab A B f) → Id (comp-hom-Ab A B A (inv-is-iso-hom-Ab A B f is-iso-f) f) (id-hom-Ab A) is-retr-inv-is-iso-hom-Ab A B f is-iso-f = pr2 (pr2 is-iso-f) is-retr-map-inv-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → ( is-iso-f : is-iso-hom-Ab A B f) → ( (map-inv-is-iso-hom-Ab A B f is-iso-f) ∘ (map-hom-Ab A B f)) ~ id is-retr-map-inv-is-iso-hom-Ab A B f is-iso-f = htpy-hom-Ab-eq A A ( comp-hom-Ab A B A (inv-is-iso-hom-Ab A B f is-iso-f) f) ( id-hom-Ab A) ( is-retr-inv-is-iso-hom-Ab A B f is-iso-f) is-prop-is-iso-hom-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) (f : hom-Ab A B) → is-prop (is-iso-hom-Ab A B f) is-prop-is-iso-hom-Ab A B f = is-prop-is-iso-hom-Semi-Group (semi-group-Ab A) (semi-group-Ab B) f iso-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → UU (l1 ⊔ l2) iso-Ab A B = Σ (hom-Ab A B) (is-iso-hom-Ab A B) hom-iso-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → iso-Ab A B → hom-Ab A B hom-iso-Ab A B = pr1 is-iso-hom-iso-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → ( f : iso-Ab A B) → is-iso-hom-Ab A B (hom-iso-Ab A B f) is-iso-hom-iso-Ab A B = pr2 inv-hom-iso-Ab : { l1 l2 : Level} (A : Ab l1) (B : Ab l2) → iso-Ab A B → hom-Ab B A inv-hom-iso-Ab A B f = inv-is-iso-hom-Ab A B ( hom-iso-Ab A B f) ( is-iso-hom-iso-Ab A B f) id-iso-Ab : {l1 : Level} (A : Ab l1) → iso-Ab A A id-iso-Ab A = iso-id-Group (group-Ab A) iso-eq-Ab : { l1 : Level} (A B : Ab l1) → Id A B → iso-Ab A B iso-eq-Ab A .A refl = id-iso-Ab A abstract equiv-iso-eq-Ab' : {l1 : Level} (A B : Ab l1) → Id A B ≃ iso-Ab A B equiv-iso-eq-Ab' A B = ( equiv-iso-eq-Group' (group-Ab A) (group-Ab B)) ∘e ( equiv-ap-pr1-is-subtype is-prop-is-abelian-Group {A} {B}) abstract is-contr-total-iso-Ab : { l1 : Level} (A : Ab l1) → is-contr (Σ (Ab l1) (iso-Ab A)) is-contr-total-iso-Ab {l1} A = is-contr-equiv' ( Σ (Ab l1) (Id A)) ( equiv-tot (equiv-iso-eq-Ab' A)) ( is-contr-total-path A) is-equiv-iso-eq-Ab : { l1 : Level} (A B : Ab l1) → is-equiv (iso-eq-Ab A B) is-equiv-iso-eq-Ab A = fundamental-theorem-id A ( id-iso-Ab A) ( is-contr-total-iso-Ab A) ( iso-eq-Ab A) eq-iso-Ab : { l1 : Level} (A B : Ab l1) → iso-Ab A B → Id A B eq-iso-Ab A B = inv-is-equiv (is-equiv-iso-eq-Ab A B)
programs/oeis/082/A082462.asm
neoneye/loda
22
21099
<reponame>neoneye/loda ; A082462: Let chi(k) = 1 if prime(k+1) - prime(k) = 2, = 0 otherwise; sequence gives a(n) = sum_{k <= n} chi(k). ; 0,1,2,2,3,3,4,4,4,5,5,5,6,6,6,6,7,7,7,8,8,8,8,8,8,9,9,10,10,10,10,10,11,11,12,12,12,12,12,12,13,13,14,14,15,15,15,15,16,16,16,17,17,17,17,17,18,18,18,19,19,19,19,20,20,20,20,20,21,21,21,21,21,21,21,21,21,21 seq $0,48974 ; Odd numbers that are the sum of 2 primes. sub $0,4 seq $0,71538 ; Number of twin prime pairs (p, p+2) with p <= n.
Mac-Audio-Toggle.scpt
manchaware/Mac-Audio-Toggle
1
4286
<reponame>manchaware/Mac-Audio-Toggle<filename>Mac-Audio-Toggle.scpt launch application "System Preferences" #Toggle channel output. Tried to run both settings from a single block, but unsuccessful tell application "System Preferences" reveal anchor "Hearing" of pane id "com.apple.preference.universalaccess" end tell tell application "System Events" set monoStereoCheckbox to checkbox 2 of group 1 of window "Accessibility" of process "System Preferences" if (get value of monoStereoCheckbox) as boolean is true then set ddMessage to "Reverting to STEREO Audio" else set ddMessage to "Switching to MONO Audio" end if tell monoStereoCheckbox to click end tell #Toggle channel balance tell application "System Preferences" reveal anchor "output" of pane id "com.apple.preference.sound" end tell tell application "System Events" set balanceSlider to slider 1 of group 1 of tab group 1 of window 1 of process "System Preferences" if (get value of balanceSlider) is 0.5 then #0=left, 1=right, 0.5=L/R balanced set value of balanceSlider to 0 else set value of balanceSlider to 0.5 end if end tell
oeis/180/A180191.asm
neoneye/loda-programs
11
103929
<reponame>neoneye/loda-programs ; A180191: Number of permutations of [n] having at least one succession. A succession of a permutation p is a position i such that p(i+1)-p(i) = 1. ; Submitted by <NAME> ; 0,1,3,13,67,411,2921,23633,214551,2160343,23897269,288102189,3760013027,52816397219,794536751217,12744659120521,217140271564591,3916221952414383,74539067188152941,1493136645424092773,31400620285465593339,691708660911435955579,15928094508218077922857,382687764956844990928449,9576704549392180551148487,249222568495502033000354951,6734715604661188357771940901,188720399567861744153435633053,5476897378676399274116808129811,164419083514127421646185137490003,5100244291399177930289485176464609 mov $2,1 mov $4,1 lpb $0 mul $1,$0 mul $2,$0 sub $0,1 add $1,$4 mov $3,$4 mov $4,$2 add $2,$3 lpe mov $0,$1
oeis/131/A131114.asm
neoneye/loda-programs
11
167954
; A131114: T(n,k) = 6*binomial(n,k) - 5*I(n,k), where I is the identity matrix; triangle T read by rows (n >= 0 and 0 <= k <= n). ; Submitted by <NAME>(s2) ; 1,6,1,6,12,1,6,18,18,1,6,24,36,24,1,6,30,60,60,30,1,6,36,90,120,90,36,1,6,42,126,210,210,126,42,1,6,48,168,336,420,336,168,48,1,6,54,216,504,756,756,504,216,54,1,6,60,270,720,1260,1512,1260,720,270,60,1,6,66,330,990,1980,2772,2772,1980,990,330,66,1,6,72,396,1320,2970,4752,5544,4752,2970,1320,396,72,1,6,78,468,1716,4290,7722,10296,10296,7722 add $0,1 seq $0,198321 ; Triangle T(n,k), read by rows, given by (0,1,0,0,0,0,0,0,0,0,0,...) DELTA (1,1,-1,1,0,0,0,0,0,0,0,...) where DELTA is the operator defined in A084938. mul $0,6 max $0,1
src/test/resources/library/random.asm
xCubeArrow/Cubelang
0
162213
; Uses the https://en.wikipedia.org/wiki/Linear_congruential_generator with m=2^31, a=75, c=74 randomI32: mov eax, 75 imul eax, edi add eax, 74 ; Modulo of 2^31 movsx rdx, eax imul rdx, rdx, 838860819 shr rdx, 32 sar edx, 22 mov ecx, eax sar ecx, 31 sub edx, ecx imul edx, edx, 21474836 sub eax, edx ret
programs/oeis/068/A068503.asm
neoneye/loda
22
29362
<reponame>neoneye/loda ; A068503: Highest power of 3 dividing prime(n)-1. ; 1,1,1,3,1,3,1,9,1,1,3,9,1,3,1,1,1,3,3,1,9,3,1,1,3,1,3,1,27,1,9,1,1,3,1,3,3,81,1,1,1,9,1,3,1,9,3,3,1,3,1,1,3,1,1,1,1,27,3,1,3,1,9,1,3,1,3,3,1,3,1,1,3,3,27,1,1,9,1,3,1,3,1,27,3,1,1,3,1,3,1,1,243,1,3,1,1,1,9,27 seq $0,6093 ; a(n) = prime(n) - 1. mov $1,1 add $2,$0 lpb $2 mul $1,3 dif $2,3 lpe mov $0,$1
libsrc/games/bit_beep_callee.asm
UnivEngineer/z88dk
1
89844
; $Id: bit_beep_callee.asm $ ; ; 1 bit sound functions ; ; void bit_beep(int duration, int period); ; SECTION code_clib PUBLIC bit_beep_callee PUBLIC _bit_beep_callee EXTERN beeper EXTERN bit_open_di EXTERN bit_close_ei ; ; Stub by <NAME> - 13/01/2021 ; .bit_beep_callee ._bit_beep_callee call bit_open_di pop bc pop hl pop de push bc call beeper jp bit_close_ei
Compiler/Project(C-Compiler)/TestCases/testcase4.asm
mheidari98/_IUT
1
164438
<reponame>mheidari98/_IUT<gh_stars>1-10 .data backn: .asciiz "\n" .text .globl main func: addi $sp, $sp , -32 sw $s0, 0($sp) sw $s1, 4($sp) sw $s2, 8($sp) sw $s3, 12($sp) sw $s4, 16($sp) sw $s5, 20($sp) sw $s6, 24($sp) sw $s7, 28($sp) add $t0, $a0 , $a1 move $v0, $t0 lw $s0, 0($sp) lw $s1, 4($sp) lw $s2, 8($sp) lw $s3, 12($sp) lw $s4, 16($sp) lw $s5, 20($sp) lw $s6, 24($sp) lw $s7, 28($sp) addi $sp, $sp , 32 jr $ra main: addi $a0, $zero , 3 addi $a1, $zero , 7 jal func move $s0, $v0 move $a0, $s0 li $v0, 1 syscall li $v0, 10 syscall
external/source/exploits/CVE-2020-9850/payload/stage0.asm
OsmanDere/metasploit-framework
26,932
81517
BITS 64 mov rbp, [rsp + 0x28] add rbp, 0x10 ; rsi = argv[0] (stage1_arr) mov rax, [rbp] ; esi = stage1_arr.length mov esi, [rax + 0x18] mov edi, 0 mov edx, 7 mov ecx, 0x1802 mov r8d, -1 mov r9, 0 push rbx push rcx push rbp push r10 push r12 push r13 push r14 push r15 mov eax, 20000C5h mov r10, rcx syscall pop r15 pop r14 pop r13 pop r12 pop r10 pop rbp pop rcx pop rbx push rax mov rdi, rax ; rsi = argv[0] (stage1_arr) mov rax, [rbp] ; ecx = stage1_arr.length mov ecx, [rax + 0x18] ; rsi = stage1_arr.vector mov rsi, [rax + 0x10] cld rep movsb ret
gcc-gcc-7_3_0-release/gcc/ada/sem_cat.adb
best08618/asylo
7
22882
------------------------------------------------------------------------------ -- -- -- GNAT COMPILER COMPONENTS -- -- -- -- S E M _ C A T -- -- -- -- B o d y -- -- -- -- Copyright (C) 1992-2016, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- -- ware Foundation; either version 3, or (at your option) any later ver- -- -- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- -- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- -- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- -- for more details. You should have received a copy of the GNU General -- -- Public License distributed with GNAT; see file COPYING3. If not, go to -- -- http://www.gnu.org/licenses for a complete copy of the license. -- -- -- -- GNAT was originally developed by the GNAT team at New York University. -- -- Extensive contributions were provided by Ada Core Technologies Inc. -- -- -- ------------------------------------------------------------------------------ with Atree; use Atree; with Debug; use Debug; with Einfo; use Einfo; with Elists; use Elists; with Errout; use Errout; with Exp_Disp; use Exp_Disp; with Fname; use Fname; with Lib; use Lib; with Namet; use Namet; with Nlists; use Nlists; with Opt; use Opt; with Sem; use Sem; with Sem_Attr; use Sem_Attr; with Sem_Aux; use Sem_Aux; with Sem_Dist; use Sem_Dist; with Sem_Eval; use Sem_Eval; with Sem_Util; use Sem_Util; with Sinfo; use Sinfo; with Snames; use Snames; with Stand; use Stand; package body Sem_Cat is ----------------------- -- Local Subprograms -- ----------------------- procedure Check_Categorization_Dependencies (Unit_Entity : Entity_Id; Depended_Entity : Entity_Id; Info_Node : Node_Id; Is_Subunit : Boolean); -- This procedure checks that the categorization of a lib unit and that -- of the depended unit satisfy dependency restrictions. -- The depended_entity can be the entity in a with_clause item, in which -- case Info_Node denotes that item. The depended_entity can also be the -- parent unit of a child unit, in which case Info_Node is the declaration -- of the child unit. The error message is posted on Info_Node, and is -- specialized if Is_Subunit is true. procedure Check_Non_Static_Default_Expr (Type_Def : Node_Id; Obj_Decl : Node_Id); -- Iterate through the component list of a record definition, check -- that no component is declared with a nonstatic default value. -- If a nonstatic default exists, report an error on Obj_Decl. function Has_Read_Write_Attributes (E : Entity_Id) return Boolean; -- Return True if entity has attribute definition clauses for Read and -- Write attributes that are visible at some place. function Is_Non_Remote_Access_Type (E : Entity_Id) return Boolean; -- Returns true if the entity is a type whose full view is a non-remote -- access type, for the purpose of enforcing E.2.2(8) rules. function Has_Non_Remote_Access (Typ : Entity_Id) return Boolean; -- Return true if Typ or the type of any of its subcomponents is a non -- remote access type and doesn't have user-defined stream attributes. function No_External_Streaming (E : Entity_Id) return Boolean; -- Return True if the entity or one of its subcomponents does not support -- external streaming. function In_RCI_Declaration return Boolean; function In_RT_Declaration return Boolean; -- Determine if current scope is within the declaration of a Remote Call -- Interface or Remote Types unit, for semantic checking purposes. function In_Package_Declaration return Boolean; -- Shared supporting routine for In_RCI_Declaration and In_RT_Declaration function In_Shared_Passive_Unit return Boolean; -- Determines if current scope is within a Shared Passive compilation unit function Static_Discriminant_Expr (L : List_Id) return Boolean; -- Iterate through the list of discriminants to check if any of them -- contains non-static default expression, which is a violation in -- a preelaborated library unit. procedure Validate_Remote_Access_Object_Type_Declaration (T : Entity_Id); -- Check validity of declaration if RCI or RT unit. It should not contain -- the declaration of an access-to-object type unless it is a general -- access type that designates a class-wide limited private type. There are -- also constraints about the primitive subprograms of the class-wide type. -- RM E.2 (9, 13, 14) procedure Validate_RACW_Primitive (Subp : Entity_Id; RACW : Entity_Id); -- Check legality of the declaration of primitive Subp of the designated -- type of the given RACW type. --------------------------------------- -- Check_Categorization_Dependencies -- --------------------------------------- procedure Check_Categorization_Dependencies (Unit_Entity : Entity_Id; Depended_Entity : Entity_Id; Info_Node : Node_Id; Is_Subunit : Boolean) is N : constant Node_Id := Info_Node; Err : Boolean; -- Here we define an enumeration type to represent categorization types, -- ordered so that a unit with a given categorization can only WITH -- units with lower or equal categorization type. type Categorization is (Pure, Shared_Passive, Remote_Types, Remote_Call_Interface, Normal); function Get_Categorization (E : Entity_Id) return Categorization; -- Check categorization flags from entity, and return in the form -- of the lowest value of the Categorization type that applies to E. ------------------------ -- Get_Categorization -- ------------------------ function Get_Categorization (E : Entity_Id) return Categorization is begin -- Get the lowest categorization that corresponds to E. Note that -- nothing prevents several (different) categorization pragmas -- to apply to the same library unit, in which case the unit has -- all associated categories, so we need to be careful here to -- check pragmas in proper Categorization order in order to -- return the lowest applicable value. -- Ignore Pure specification if set by pragma Pure_Function if Is_Pure (E) and then not (Has_Pragma_Pure_Function (E) and not Has_Pragma_Pure (E)) then return Pure; elsif Is_Shared_Passive (E) then return Shared_Passive; elsif Is_Remote_Types (E) then return Remote_Types; elsif Is_Remote_Call_Interface (E) then return Remote_Call_Interface; else return Normal; end if; end Get_Categorization; Unit_Category : Categorization; With_Category : Categorization; -- Start of processing for Check_Categorization_Dependencies begin -- Intrinsic subprograms are preelaborated, so do not impose any -- categorization dependencies. Also, ignore categorization -- dependencies when compilation switch -gnatdu is used. if Is_Intrinsic_Subprogram (Depended_Entity) or else Debug_Flag_U then return; end if; -- First check 10.2.1 (11/1) rules on preelaborate packages if Is_Preelaborated (Unit_Entity) and then not Is_Preelaborated (Depended_Entity) and then not Is_Pure (Depended_Entity) then Err := True; else Err := False; end if; -- Check categorization rules of RM E.2(5) Unit_Category := Get_Categorization (Unit_Entity); With_Category := Get_Categorization (Depended_Entity); if With_Category > Unit_Category then -- Special case: Remote_Types and Remote_Call_Interface are allowed -- to WITH anything in the package body, per (RM E.2(5)). if (Unit_Category = Remote_Types or else Unit_Category = Remote_Call_Interface) and then In_Package_Body (Unit_Entity) then null; -- Special case: Remote_Types and Remote_Call_Interface declarations -- can depend on a preelaborated unit via a private with_clause, per -- AI05-0206. elsif (Unit_Category = Remote_Types or else Unit_Category = Remote_Call_Interface) and then Nkind (N) = N_With_Clause and then Private_Present (N) and then Is_Preelaborated (Depended_Entity) then null; -- All other cases, we do have an error else Err := True; end if; end if; -- Here if we have an error if Err then -- These messages are warnings in GNAT mode or if the -gnateP switch -- was set. Otherwise these are real errors for real illegalities. -- The reason we suppress these errors in GNAT mode is that the run- -- time has several instances of violations of the categorization -- errors (e.g. Pure units withing Preelaborate units. All these -- violations are harmless in the cases where we intend them, and -- we suppress the warnings with Warnings (Off). In cases where we -- do not intend the violation, warnings are errors in GNAT mode -- anyway, so we will still get an error. Error_Msg_Warn := Treat_Categorization_Errors_As_Warnings or GNAT_Mode; -- Don't give error if main unit is not an internal unit, and the -- unit generating the message is an internal unit. This is the -- situation in which such messages would be ignored in any case, -- so it is convenient not to generate them (since it causes -- annoying interference with debugging). if Is_Internal_File_Name (Unit_File_Name (Current_Sem_Unit)) and then not Is_Internal_File_Name (Unit_File_Name (Main_Unit)) then return; -- Dependence of Remote_Types or Remote_Call_Interface declaration -- on a preelaborated unit with a normal with_clause. elsif (Unit_Category = Remote_Types or else Unit_Category = Remote_Call_Interface) and then Is_Preelaborated (Depended_Entity) then Error_Msg_NE ("<<must use private with clause for preelaborated unit& ", N, Depended_Entity); -- Subunit case elsif Is_Subunit then Error_Msg_NE ("<subunit cannot depend on& " & "(parent has wrong categorization)", N, Depended_Entity); -- Normal unit, not subunit else Error_Msg_NE ("<<cannot depend on& " & "(wrong categorization)", N, Depended_Entity); end if; -- Add further explanation for Pure/Preelaborate common cases if Unit_Category = Pure then Error_Msg_NE ("\<<pure unit cannot depend on non-pure unit", N, Depended_Entity); elsif Is_Preelaborated (Unit_Entity) and then not Is_Preelaborated (Depended_Entity) and then not Is_Pure (Depended_Entity) then Error_Msg_NE ("\<<preelaborated unit cannot depend on " & "non-preelaborated unit", N, Depended_Entity); end if; end if; end Check_Categorization_Dependencies; ----------------------------------- -- Check_Non_Static_Default_Expr -- ----------------------------------- procedure Check_Non_Static_Default_Expr (Type_Def : Node_Id; Obj_Decl : Node_Id) is Recdef : Node_Id; Component_Decl : Node_Id; begin if Nkind (Type_Def) = N_Derived_Type_Definition then Recdef := Record_Extension_Part (Type_Def); if No (Recdef) then return; end if; else Recdef := Type_Def; end if; -- Check that component declarations do not involve: -- a. a non-static default expression, where the object is -- declared to be default initialized. -- b. a dynamic Itype (discriminants and constraints) if Null_Present (Recdef) then return; else Component_Decl := First (Component_Items (Component_List (Recdef))); end if; while Present (Component_Decl) and then Nkind (Component_Decl) = N_Component_Declaration loop if Present (Expression (Component_Decl)) and then Nkind (Expression (Component_Decl)) /= N_Null and then not Is_OK_Static_Expression (Expression (Component_Decl)) then Error_Msg_Sloc := Sloc (Component_Decl); Error_Msg_F ("object in preelaborated unit has non-static default#", Obj_Decl); -- Fix this later ??? -- elsif Has_Dynamic_Itype (Component_Decl) then -- Error_Msg_N -- ("dynamic type discriminant," & -- " constraint in preelaborated unit", -- Component_Decl); end if; Next (Component_Decl); end loop; end Check_Non_Static_Default_Expr; --------------------------- -- Has_Non_Remote_Access -- --------------------------- function Has_Non_Remote_Access (Typ : Entity_Id) return Boolean is Component : Entity_Id; Comp_Type : Entity_Id; U_Typ : constant Entity_Id := Underlying_Type (Typ); begin if No (U_Typ) then return False; elsif Has_Read_Write_Attributes (Typ) or else Has_Read_Write_Attributes (U_Typ) then return False; elsif Is_Non_Remote_Access_Type (U_Typ) then return True; end if; if Is_Record_Type (U_Typ) then Component := First_Entity (U_Typ); while Present (Component) loop if not Is_Tag (Component) then Comp_Type := Etype (Component); if Has_Non_Remote_Access (Comp_Type) then return True; end if; end if; Next_Entity (Component); end loop; elsif Is_Array_Type (U_Typ) then return Has_Non_Remote_Access (Component_Type (U_Typ)); end if; return False; end Has_Non_Remote_Access; ------------------------------- -- Has_Read_Write_Attributes -- ------------------------------- function Has_Read_Write_Attributes (E : Entity_Id) return Boolean is begin return True and then Has_Stream_Attribute_Definition (E, TSS_Stream_Read, At_Any_Place => True) and then Has_Stream_Attribute_Definition (E, TSS_Stream_Write, At_Any_Place => True); end Has_Read_Write_Attributes; ------------------------------------- -- Has_Stream_Attribute_Definition -- ------------------------------------- function Has_Stream_Attribute_Definition (Typ : Entity_Id; Nam : TSS_Name_Type; At_Any_Place : Boolean := False) return Boolean is Rep_Item : Node_Id; Real_Rep : Node_Id; -- The stream operation may be specified by an attribute definition -- clause in the source, or by an aspect that generates such an -- attribute definition. For an aspect, the generated attribute -- definition may be placed at the freeze point of the full view of -- the type, but the aspect specification makes the operation visible -- to a client wherever the partial view is visible. begin -- We start from the declaration node and then loop until the end of -- the list until we find the requested attribute definition clause. -- In Ada 2005 mode, clauses are ignored if they are not currently -- visible (this is tested using the corresponding Entity, which is -- inserted by the expander at the point where the clause occurs), -- unless At_Any_Place is true. Rep_Item := First_Rep_Item (Typ); while Present (Rep_Item) loop Real_Rep := Rep_Item; -- If the representation item is an aspect specification, retrieve -- the corresponding pragma or attribute definition. if Nkind (Rep_Item) = N_Aspect_Specification then Real_Rep := Aspect_Rep_Item (Rep_Item); end if; if Nkind (Real_Rep) = N_Attribute_Definition_Clause then case Chars (Real_Rep) is when Name_Read => exit when Nam = TSS_Stream_Read; when Name_Write => exit when Nam = TSS_Stream_Write; when Name_Input => exit when Nam = TSS_Stream_Input; when Name_Output => exit when Nam = TSS_Stream_Output; when others => null; end case; end if; Next_Rep_Item (Rep_Item); end loop; -- If not found, and the type is derived from a private view, check -- for a stream attribute inherited from parent. Any specified stream -- attributes will be attached to the derived type's underlying type -- rather the derived type entity itself (which is itself private). if No (Rep_Item) and then Is_Private_Type (Typ) and then Is_Derived_Type (Typ) and then Present (Full_View (Typ)) then return Has_Stream_Attribute_Definition (Underlying_Type (Typ), Nam, At_Any_Place); -- Otherwise, if At_Any_Place is true, return True if the attribute is -- available at any place; if it is false, return True only if the -- attribute is currently visible. else return Present (Rep_Item) and then (Ada_Version < Ada_2005 or else At_Any_Place or else not Is_Hidden (Entity (Rep_Item))); end if; end Has_Stream_Attribute_Definition; ---------------------------- -- In_Package_Declaration -- ---------------------------- function In_Package_Declaration return Boolean is Unit_Kind : constant Node_Kind := Nkind (Unit (Cunit (Current_Sem_Unit))); begin -- There are no restrictions on the body of an RCI or RT unit return Is_Package_Or_Generic_Package (Current_Scope) and then Unit_Kind /= N_Package_Body and then not In_Package_Body (Current_Scope) and then not In_Instance; end In_Package_Declaration; --------------------------- -- In_Preelaborated_Unit -- --------------------------- function In_Preelaborated_Unit return Boolean is Unit_Entity : Entity_Id := Current_Scope; Unit_Kind : constant Node_Kind := Nkind (Unit (Cunit (Current_Sem_Unit))); begin -- If evaluating actuals for a child unit instantiation, then ignore -- the preelaboration status of the parent; use the child instead. if Is_Compilation_Unit (Unit_Entity) and then Unit_Kind in N_Generic_Instantiation and then not In_Same_Source_Unit (Unit_Entity, Cunit (Current_Sem_Unit)) then Unit_Entity := Cunit_Entity (Current_Sem_Unit); end if; -- There are no constraints on the body of Remote_Call_Interface or -- Remote_Types packages. return (Unit_Entity /= Standard_Standard) and then (Is_Preelaborated (Unit_Entity) or else Is_Pure (Unit_Entity) or else Is_Shared_Passive (Unit_Entity) or else ((Is_Remote_Types (Unit_Entity) or else Is_Remote_Call_Interface (Unit_Entity)) and then Ekind (Unit_Entity) = E_Package and then Unit_Kind /= N_Package_Body and then not In_Package_Body (Unit_Entity) and then not In_Instance)); end In_Preelaborated_Unit; ------------------ -- In_Pure_Unit -- ------------------ function In_Pure_Unit return Boolean is begin return Is_Pure (Current_Scope); end In_Pure_Unit; ------------------------ -- In_RCI_Declaration -- ------------------------ function In_RCI_Declaration return Boolean is begin return Is_Remote_Call_Interface (Current_Scope) and then In_Package_Declaration; end In_RCI_Declaration; ----------------------- -- In_RT_Declaration -- ----------------------- function In_RT_Declaration return Boolean is begin return Is_Remote_Types (Current_Scope) and then In_Package_Declaration; end In_RT_Declaration; ---------------------------- -- In_Shared_Passive_Unit -- ---------------------------- function In_Shared_Passive_Unit return Boolean is Unit_Entity : constant Entity_Id := Current_Scope; begin return Is_Shared_Passive (Unit_Entity); end In_Shared_Passive_Unit; --------------------------------------- -- In_Subprogram_Task_Protected_Unit -- --------------------------------------- function In_Subprogram_Task_Protected_Unit return Boolean is E : Entity_Id; begin -- The following is to verify that a declaration is inside -- subprogram, generic subprogram, task unit, protected unit. -- Used to validate if a lib. unit is Pure. RM 10.2.1(16). -- Use scope chain to check successively outer scopes E := Current_Scope; loop if Is_Subprogram_Or_Generic_Subprogram (E) or else Is_Concurrent_Type (E) then return True; elsif E = Standard_Standard then return False; end if; E := Scope (E); end loop; end In_Subprogram_Task_Protected_Unit; ------------------------------- -- Is_Non_Remote_Access_Type -- ------------------------------- function Is_Non_Remote_Access_Type (E : Entity_Id) return Boolean is U_E : constant Entity_Id := Underlying_Type (Base_Type (E)); -- Use full view of base type to handle subtypes properly. begin if No (U_E) then -- This case arises for the case of a generic formal type, in which -- case E.2.2(8) rules will be enforced at instantiation time. return False; end if; return Is_Access_Type (U_E) and then not Is_Remote_Access_To_Class_Wide_Type (U_E) and then not Is_Remote_Access_To_Subprogram_Type (U_E); end Is_Non_Remote_Access_Type; --------------------------- -- No_External_Streaming -- --------------------------- function No_External_Streaming (E : Entity_Id) return Boolean is U_E : constant Entity_Id := Underlying_Type (E); begin if No (U_E) then return False; elsif Has_Read_Write_Attributes (E) then -- Note: availability of stream attributes is tested on E, not U_E. -- There may be stream attributes defined on U_E that are not visible -- at the place where support of external streaming is tested. return False; elsif Has_Non_Remote_Access (U_E) then return True; end if; return Is_Limited_Type (E); end No_External_Streaming; ------------------------------------- -- Set_Categorization_From_Pragmas -- ------------------------------------- procedure Set_Categorization_From_Pragmas (N : Node_Id) is P : constant Node_Id := Parent (N); S : constant Entity_Id := Current_Scope; procedure Set_Parents (Visibility : Boolean); -- If this is a child instance, the parents are not immediately -- visible during analysis. Make them momentarily visible so that -- the argument of the pragma can be resolved properly, and reset -- afterwards. ----------------- -- Set_Parents -- ----------------- procedure Set_Parents (Visibility : Boolean) is Par : Entity_Id; begin Par := Scope (S); while Present (Par) and then Par /= Standard_Standard loop Set_Is_Immediately_Visible (Par, Visibility); Par := Scope (Par); end loop; end Set_Parents; -- Start of processing for Set_Categorization_From_Pragmas begin -- Deal with categorization pragmas in Pragmas of Compilation_Unit. -- The purpose is to set categorization flags before analyzing the -- unit itself, so as to diagnose violations of categorization as -- we process each declaration, even though the pragma appears after -- the unit. if Nkind (P) /= N_Compilation_Unit then return; end if; declare PN : Node_Id; begin if Is_Child_Unit (S) and then Is_Generic_Instance (S) then Set_Parents (True); end if; PN := First (Pragmas_After (Aux_Decls_Node (P))); while Present (PN) loop -- Skip implicit types that may have been introduced by -- previous analysis. if Nkind (PN) = N_Pragma then case Get_Pragma_Id (PN) is when Pragma_All_Calls_Remote | Pragma_Preelaborate | Pragma_Pure | Pragma_Remote_Call_Interface | Pragma_Remote_Types | Pragma_Shared_Passive => Analyze (PN); when others => null; end case; end if; Next (PN); end loop; if Is_Child_Unit (S) and then Is_Generic_Instance (S) then Set_Parents (False); end if; end; end Set_Categorization_From_Pragmas; ----------------------------------- -- Set_Categorization_From_Scope -- ----------------------------------- procedure Set_Categorization_From_Scope (E : Entity_Id; Scop : Entity_Id) is Declaration : Node_Id := Empty; Specification : Node_Id := Empty; begin -- Do not modify the purity of an internally generated entity if it has -- been explicitly marked as pure for optimization purposes. if not Has_Pragma_Pure_Function (E) then Set_Is_Pure (E, Is_Pure (Scop) and then Is_Library_Level_Entity (E)); end if; if not Is_Remote_Call_Interface (E) then if Ekind (E) in Subprogram_Kind then Declaration := Unit_Declaration_Node (E); if Nkind_In (Declaration, N_Subprogram_Body, N_Subprogram_Renaming_Declaration) then Specification := Corresponding_Spec (Declaration); end if; end if; -- A subprogram body or renaming-as-body is a remote call interface -- if it serves as the completion of a subprogram declaration that -- is a remote call interface. if Nkind (Specification) in N_Entity then Set_Is_Remote_Call_Interface (E, Is_Remote_Call_Interface (Specification)); -- A subprogram declaration is a remote call interface when it is -- declared within the visible part of, or declared by, a library -- unit declaration that is a remote call interface. else Set_Is_Remote_Call_Interface (E, Is_Remote_Call_Interface (Scop) and then not (In_Private_Part (Scop) or else In_Package_Body (Scop))); end if; end if; Set_Is_Remote_Types (E, Is_Remote_Types (Scop) and then not (In_Private_Part (Scop) or else In_Package_Body (Scop))); end Set_Categorization_From_Scope; ------------------------------ -- Static_Discriminant_Expr -- ------------------------------ -- We need to accommodate a Why_Not_Static call somehow here ??? function Static_Discriminant_Expr (L : List_Id) return Boolean is Discriminant_Spec : Node_Id; begin Discriminant_Spec := First (L); while Present (Discriminant_Spec) loop if Present (Expression (Discriminant_Spec)) and then not Is_OK_Static_Expression (Expression (Discriminant_Spec)) then return False; end if; Next (Discriminant_Spec); end loop; return True; end Static_Discriminant_Expr; -------------------------------------- -- Validate_Access_Type_Declaration -- -------------------------------------- procedure Validate_Access_Type_Declaration (T : Entity_Id; N : Node_Id) is Def : constant Node_Id := Type_Definition (N); begin case Nkind (Def) is -- Access to subprogram case when N_Access_To_Subprogram_Definition => -- A pure library_item must not contain the declaration of a -- named access type, except within a subprogram, generic -- subprogram, task unit, or protected unit (RM 10.2.1(16)). -- This test is skipped in Ada 2005 (see AI-366) if Ada_Version < Ada_2005 and then Comes_From_Source (T) and then In_Pure_Unit and then not In_Subprogram_Task_Protected_Unit then Error_Msg_N ("named access type not allowed in pure unit", T); end if; -- Access to object case when N_Access_To_Object_Definition => if Comes_From_Source (T) and then In_Pure_Unit and then not In_Subprogram_Task_Protected_Unit then -- We can't give the message yet, since the type is not frozen -- and in Ada 2005 mode, access types are allowed in pure units -- if the type has no storage pool (see AI-366). So we set a -- flag which will be checked at freeze time. Set_Is_Pure_Unit_Access_Type (T); end if; -- Check for RCI or RT unit type declaration: declaration of an -- access-to-object type is illegal unless it is a general access -- type that designates a class-wide limited private type. -- Note that constraints on the primitive subprograms of the -- designated tagged type are not enforced here but in -- Validate_RACW_Primitives, which is done separately because the -- designated type might not be frozen (and therefore its -- primitive operations might not be completely known) at the -- point of the RACW declaration. Validate_Remote_Access_Object_Type_Declaration (T); -- Check for shared passive unit type declaration. It should -- not contain the declaration of access to class wide type, -- access to task type and access to protected type with entry. Validate_SP_Access_Object_Type_Decl (T); when others => null; end case; -- Set categorization flag from package on entity as well, to allow -- easy checks later on for required validations of RCI or RT units. -- This is only done for entities that are in the original source. if Comes_From_Source (T) and then not (In_Package_Body (Scope (T)) or else In_Private_Part (Scope (T))) then Set_Is_Remote_Call_Interface (T, Is_Remote_Call_Interface (Scope (T))); Set_Is_Remote_Types (T, Is_Remote_Types (Scope (T))); end if; end Validate_Access_Type_Declaration; ---------------------------- -- Validate_Ancestor_Part -- ---------------------------- procedure Validate_Ancestor_Part (N : Node_Id) is A : constant Node_Id := Ancestor_Part (N); T : constant Entity_Id := Entity (A); begin if In_Preelaborated_Unit and then not In_Subprogram_Or_Concurrent_Unit and then (not Inside_A_Generic or else Present (Enclosing_Generic_Body (N))) then -- If the type is private, it must have the Ada 2005 pragma -- Has_Preelaborable_Initialization. -- The check is omitted within predefined units. This is probably -- obsolete code to fix the Ada 95 weakness in this area ??? if Is_Private_Type (T) and then not Has_Pragma_Preelab_Init (T) and then not Is_Internal_File_Name (Unit_File_Name (Get_Source_Unit (N))) then Error_Msg_N ("private ancestor type not allowed in preelaborated unit", A); elsif Is_Record_Type (T) then if Nkind (Parent (T)) = N_Full_Type_Declaration then Check_Non_Static_Default_Expr (Type_Definition (Parent (T)), A); end if; end if; end if; end Validate_Ancestor_Part; ---------------------------------------- -- Validate_Categorization_Dependency -- ---------------------------------------- procedure Validate_Categorization_Dependency (N : Node_Id; E : Entity_Id) is K : constant Node_Kind := Nkind (N); P : Node_Id := Parent (N); U : Entity_Id := E; Is_Subunit : constant Boolean := Nkind (P) = N_Subunit; begin -- Only validate library units and subunits. For subunits, checks -- concerning withed units apply to the parent compilation unit. if Is_Subunit then P := Parent (P); U := Scope (E); while Present (U) and then not Is_Compilation_Unit (U) and then not Is_Child_Unit (U) loop U := Scope (U); end loop; end if; if Nkind (P) /= N_Compilation_Unit then return; end if; -- Body of RCI unit does not need validation if Is_Remote_Call_Interface (E) and then Nkind_In (N, N_Package_Body, N_Subprogram_Body) then return; end if; -- Ada 2005 (AI-50217): Process explicit non-limited with_clauses declare Item : Node_Id; Entity_Of_Withed : Entity_Id; begin Item := First (Context_Items (P)); while Present (Item) loop if Nkind (Item) = N_With_Clause and then not (Implicit_With (Item) or else Limited_Present (Item) -- Skip if error already posted on the WITH clause (in -- which case the Name attribute may be invalid). In -- particular, this fixes the problem of hanging in the -- presence of a WITH clause on a child that is an -- illegal generic instantiation. or else Error_Posted (Item)) and then not (Try_Semantics -- Skip processing malformed trees and then Nkind (Name (Item)) not in N_Has_Entity) then Entity_Of_Withed := Entity (Name (Item)); Check_Categorization_Dependencies (U, Entity_Of_Withed, Item, Is_Subunit); end if; Next (Item); end loop; end; -- Child depends on parent; therefore parent should also be categorized -- and satisfy the dependency hierarchy. -- Check if N is a child spec if (K in N_Generic_Declaration or else K in N_Generic_Instantiation or else K in N_Generic_Renaming_Declaration or else K = N_Package_Declaration or else K = N_Package_Renaming_Declaration or else K = N_Subprogram_Declaration or else K = N_Subprogram_Renaming_Declaration) and then Present (Parent_Spec (N)) then Check_Categorization_Dependencies (E, Scope (E), N, False); -- Verify that public child of an RCI library unit must also be an -- RCI library unit (RM E.2.3(15)). if Is_Remote_Call_Interface (Scope (E)) and then not Private_Present (P) and then not Is_Remote_Call_Interface (E) then Error_Msg_N ("public child of rci unit must also be rci unit", N); end if; end if; end Validate_Categorization_Dependency; -------------------------------- -- Validate_Controlled_Object -- -------------------------------- procedure Validate_Controlled_Object (E : Entity_Id) is begin -- Don't need this check in Ada 2005 mode, where this is all taken -- care of by the mechanism for Preelaborable Initialization. if Ada_Version >= Ada_2005 then return; end if; -- For now, never apply this check for internal GNAT units, since we -- have a number of cases in the library where we are stuck with objects -- of this type, and the RM requires Preelaborate. -- For similar reasons, we only do this check for source entities, since -- we generate entities of this type in some situations. -- Note that the 10.2.1(9) restrictions are not relevant to us anyway. -- We have to enforce them for RM compatibility, but we have no trouble -- accepting these objects and doing the right thing. Note that there is -- no requirement that Preelaborate not actually generate any code. if In_Preelaborated_Unit and then not Debug_Flag_PP and then Comes_From_Source (E) and then not Is_Internal_File_Name (Unit_File_Name (Get_Source_Unit (E))) and then (not Inside_A_Generic or else Present (Enclosing_Generic_Body (E))) and then not Is_Protected_Type (Etype (E)) then Error_Msg_N ("library level controlled object not allowed in " & "preelaborated unit", E); end if; end Validate_Controlled_Object; -------------------------------------- -- Validate_Null_Statement_Sequence -- -------------------------------------- procedure Validate_Null_Statement_Sequence (N : Node_Id) is Item : Node_Id; begin if In_Preelaborated_Unit then Item := First (Statements (Handled_Statement_Sequence (N))); while Present (Item) loop if Nkind (Item) /= N_Label and then Nkind (Item) /= N_Null_Statement then -- In GNAT mode, this is a warning, allowing the run-time -- to judiciously bypass this error condition. Error_Msg_Warn := GNAT_Mode; Error_Msg_N ("<<statements not allowed in preelaborated unit", Item); exit; end if; Next (Item); end loop; end if; end Validate_Null_Statement_Sequence; --------------------------------- -- Validate_Object_Declaration -- --------------------------------- procedure Validate_Object_Declaration (N : Node_Id) is Id : constant Entity_Id := Defining_Identifier (N); E : constant Node_Id := Expression (N); Odf : constant Node_Id := Object_Definition (N); T : constant Entity_Id := Etype (Id); begin -- Verify that any access to subprogram object does not have in its -- subprogram profile access type parameters or limited parameters -- without Read and Write attributes (E.2.3(13)). Validate_RCI_Subprogram_Declaration (N); -- Check that if we are in preelaborated elaboration code, then we -- do not have an instance of a default initialized private, task or -- protected object declaration which would violate (RM 10.2.1(9)). -- Note that constants are never default initialized (and the test -- below also filters out deferred constants). A variable is default -- initialized if it does *not* have an initialization expression. -- Filter out cases that are not declaration of a variable from source if Nkind (N) /= N_Object_Declaration or else Constant_Present (N) or else not Comes_From_Source (Id) then return; end if; -- Exclude generic specs from the checks (this will get rechecked -- on instantiations). if Inside_A_Generic and then No (Enclosing_Generic_Body (Id)) then return; end if; -- Required checks for declaration that is in a preelaborated package -- and is not within some subprogram. if In_Preelaborated_Unit and then not In_Subprogram_Or_Concurrent_Unit then -- Check for default initialized variable case. Note that in -- accordance with (RM B.1(24)) imported objects are not subject to -- default initialization. -- If the initialization does not come from source and is an -- aggregate, it is a static initialization that replaces an -- implicit call, and must be treated as such. if Present (E) and then (Comes_From_Source (E) or else Nkind (E) /= N_Aggregate) then null; elsif Is_Imported (Id) then null; else declare Ent : Entity_Id := T; begin -- An array whose component type is a record with nonstatic -- default expressions is a violation, so we get the array's -- component type. if Is_Array_Type (Ent) then declare Comp_Type : Entity_Id; begin Comp_Type := Component_Type (Ent); while Is_Array_Type (Comp_Type) loop Comp_Type := Component_Type (Comp_Type); end loop; Ent := Comp_Type; end; end if; -- Object decl. that is of record type and has no default expr. -- should check if there is any non-static default expression -- in component decl. of the record type decl. if Is_Record_Type (Ent) then if Nkind (Parent (Ent)) = N_Full_Type_Declaration then Check_Non_Static_Default_Expr (Type_Definition (Parent (Ent)), N); elsif Nkind (Odf) = N_Subtype_Indication and then not Is_Array_Type (T) and then not Is_Private_Type (T) then Check_Non_Static_Default_Expr (Type_Definition (Parent (Entity (Subtype_Mark (Odf)))), N); end if; end if; -- Check for invalid use of private object. Note that Ada 2005 -- AI-161 modifies the rules for Ada 2005, including the use of -- the new pragma Preelaborable_Initialization. if Is_Private_Type (Ent) or else Depends_On_Private (Ent) then -- Case where type has preelaborable initialization which -- means that a pragma Preelaborable_Initialization was -- given for the private type. if Relaxed_RM_Semantics then -- In relaxed mode, do not issue these messages, this -- is basically similar to the GNAT_Mode test below. null; elsif Has_Preelaborable_Initialization (Ent) then -- But for the predefined units, we will ignore this -- status unless we are in Ada 2005 mode since we want -- Ada 95 compatible behavior, in which the entities -- marked with this pragma in the predefined library are -- not treated specially. if Ada_Version < Ada_2005 then Error_Msg_N ("private object not allowed in preelaborated unit", N); Error_Msg_N ("\(would be legal in Ada 2005 mode)", N); end if; -- Type does not have preelaborable initialization else -- We allow this when compiling in GNAT mode to make life -- easier for some cases where it would otherwise be hard -- to be exactly valid Ada. if not GNAT_Mode then Error_Msg_N ("private object not allowed in preelaborated unit", N); -- Add a message if it would help to provide a pragma -- Preelaborable_Initialization on the type of the -- object (which would make it legal in Ada 2005). -- If the type has no full view (generic type, or -- previous error), the warning does not apply. if Is_Private_Type (Ent) and then Present (Full_View (Ent)) and then Has_Preelaborable_Initialization (Full_View (Ent)) then Error_Msg_Sloc := Sloc (Ent); if Ada_Version >= Ada_2005 then Error_Msg_NE ("\would be legal if pragma Preelaborable_" & "Initialization given for & #", N, Ent); else Error_Msg_NE ("\would be legal in Ada 2005 if pragma " & "Preelaborable_Initialization given for & #", N, Ent); end if; end if; end if; end if; -- Access to Task or Protected type elsif Is_Entity_Name (Odf) and then Present (Etype (Odf)) and then Is_Access_Type (Etype (Odf)) then Ent := Designated_Type (Etype (Odf)); elsif Is_Entity_Name (Odf) then Ent := Entity (Odf); elsif Nkind (Odf) = N_Subtype_Indication then Ent := Etype (Subtype_Mark (Odf)); elsif Nkind (Odf) = N_Constrained_Array_Definition then Ent := Component_Type (T); end if; if Is_Task_Type (Ent) or else (Is_Protected_Type (Ent) and then Has_Entries (Ent)) then Error_Msg_N ("concurrent object not allowed in preelaborated unit", N); return; end if; end; end if; -- Non-static discriminants not allowed in preelaborated unit. -- Objects of a controlled type with a user-defined Initialize -- are forbidden as well. if Is_Record_Type (Etype (Id)) then declare ET : constant Entity_Id := Etype (Id); EE : constant Entity_Id := Etype (Etype (Id)); PEE : Node_Id; begin if Has_Discriminants (ET) and then Present (EE) then PEE := Parent (EE); if Nkind (PEE) = N_Full_Type_Declaration and then not Static_Discriminant_Expr (Discriminant_Specifications (PEE)) then Error_Msg_N ("non-static discriminant in preelaborated unit", PEE); end if; end if; -- For controlled type or type with controlled component, check -- preelaboration flag, as there may be a non-null Initialize -- primitive. For language versions earlier than Ada 2005, -- there is no notion of preelaborable initialization, and -- Validate_Controlled_Object is used to enforce rules for -- controlled objects. if (Is_Controlled (ET) or else Has_Controlled_Component (ET)) and then Ada_Version >= Ada_2005 and then not Has_Preelaborable_Initialization (ET) then Error_Msg_NE ("controlled type& does not have" & " preelaborable initialization", N, ET); end if; end; end if; end if; -- A pure library_item must not contain the declaration of any variable -- except within a subprogram, generic subprogram, task unit, or -- protected unit (RM 10.2.1(16)). if In_Pure_Unit and then not In_Subprogram_Task_Protected_Unit then Error_Msg_N ("declaration of variable not allowed in pure unit", N); elsif not In_Private_Part (Id) then -- The visible part of an RCI library unit must not contain the -- declaration of a variable (RM E.1.3(9)). if In_RCI_Declaration then Error_Msg_N ("visible variable not allowed in 'R'C'I unit", N); -- The visible part of a Shared Passive library unit must not contain -- the declaration of a variable (RM E.2.2(7)). elsif In_RT_Declaration then Error_Msg_N ("visible variable not allowed in remote types unit", N); end if; end if; end Validate_Object_Declaration; ----------------------------- -- Validate_RACW_Primitive -- ----------------------------- procedure Validate_RACW_Primitive (Subp : Entity_Id; RACW : Entity_Id) is procedure Illegal_Remote_Subp (Msg : String; N : Node_Id); -- Diagnose illegality on N. If RACW is present, report the error on it -- rather than on N. ------------------------- -- Illegal_Remote_Subp -- ------------------------- procedure Illegal_Remote_Subp (Msg : String; N : Node_Id) is begin if Present (RACW) then if not Error_Posted (RACW) then Error_Msg_N ("illegal remote access to class-wide type&", RACW); end if; Error_Msg_Sloc := Sloc (N); Error_Msg_NE ("\\" & Msg & " in primitive& #", RACW, Subp); else Error_Msg_NE (Msg & " in remote subprogram&", N, Subp); end if; end Illegal_Remote_Subp; Rtyp : Entity_Id; Param : Node_Id; Param_Spec : Node_Id; Param_Type : Entity_Id; -- Start of processing for Validate_RACW_Primitive begin -- Check return type if Ekind (Subp) = E_Function then Rtyp := Etype (Subp); -- AI05-0101 (Binding Interpretation): The result type of a remote -- function must either support external streaming or be a -- controlling access result type. if Has_Controlling_Result (Subp) then null; elsif Ekind (Rtyp) = E_Anonymous_Access_Type then Illegal_Remote_Subp ("anonymous access result", Rtyp); elsif Is_Limited_Type (Rtyp) then if No (TSS (Rtyp, TSS_Stream_Read)) or else No (TSS (Rtyp, TSS_Stream_Write)) then Illegal_Remote_Subp ("limited return type must have Read and Write attributes", Parent (Subp)); Explain_Limited_Type (Rtyp, Parent (Subp)); end if; -- Check that the return type supports external streaming elsif No_External_Streaming (Rtyp) and then not Error_Posted (Rtyp) then Illegal_Remote_Subp ("return type containing non-remote access " & "must have Read and Write attributes", Parent (Subp)); end if; end if; Param := First_Formal (Subp); while Present (Param) loop -- Now find out if this parameter is a controlling parameter Param_Spec := Parent (Param); Param_Type := Etype (Param); if Is_Controlling_Formal (Param) then -- It is a controlling parameter, so specific checks below do not -- apply. null; elsif Ekind_In (Param_Type, E_Anonymous_Access_Type, E_Anonymous_Access_Subprogram_Type) then -- From RM E.2.2(14), no anonymous access parameter other than -- controlling ones may be used (because an anonymous access -- type never supports external streaming). Illegal_Remote_Subp ("non-controlling access parameter", Param_Spec); elsif No_External_Streaming (Param_Type) and then not Error_Posted (Param_Type) then Illegal_Remote_Subp ("formal parameter in remote subprogram must " & "support external streaming", Param_Spec); end if; -- Check next parameter in this subprogram Next_Formal (Param); end loop; end Validate_RACW_Primitive; ------------------------------ -- Validate_RACW_Primitives -- ------------------------------ procedure Validate_RACW_Primitives (T : Entity_Id) is Desig_Type : Entity_Id; Primitive_Subprograms : Elist_Id; Subprogram_Elmt : Elmt_Id; Subprogram : Entity_Id; begin Desig_Type := Etype (Designated_Type (T)); -- No action needed for concurrent types if Is_Concurrent_Type (Desig_Type) then return; end if; Primitive_Subprograms := Primitive_Operations (Desig_Type); Subprogram_Elmt := First_Elmt (Primitive_Subprograms); while Subprogram_Elmt /= No_Elmt loop Subprogram := Node (Subprogram_Elmt); if Is_Predefined_Dispatching_Operation (Subprogram) or else Is_Hidden (Subprogram) then goto Next_Subprogram; end if; Validate_RACW_Primitive (Subp => Subprogram, RACW => T); <<Next_Subprogram>> Next_Elmt (Subprogram_Elmt); end loop; end Validate_RACW_Primitives; ------------------------------- -- Validate_RCI_Declarations -- ------------------------------- procedure Validate_RCI_Declarations (P : Entity_Id) is E : Entity_Id; begin E := First_Entity (P); while Present (E) loop if Comes_From_Source (E) then if Is_Limited_Type (E) then Error_Msg_N ("limited type not allowed in rci unit", Parent (E)); Explain_Limited_Type (E, Parent (E)); elsif Ekind_In (E, E_Generic_Function, E_Generic_Package, E_Generic_Procedure) then Error_Msg_N ("generic declaration not allowed in rci unit", Parent (E)); elsif (Ekind (E) = E_Function or else Ekind (E) = E_Procedure) and then Has_Pragma_Inline (E) then Error_Msg_N ("inlined subprogram not allowed in rci unit", Parent (E)); -- Inner packages that are renamings need not be checked. Generic -- RCI packages are subject to the checks, but entities that come -- from formal packages are not part of the visible declarations -- of the package and are not checked. elsif Ekind (E) = E_Package then if Present (Renamed_Entity (E)) then null; elsif Ekind (P) /= E_Generic_Package or else List_Containing (Unit_Declaration_Node (E)) /= Generic_Formal_Declarations (Unit_Declaration_Node (P)) then Validate_RCI_Declarations (E); end if; end if; end if; Next_Entity (E); end loop; end Validate_RCI_Declarations; ----------------------------------------- -- Validate_RCI_Subprogram_Declaration -- ----------------------------------------- procedure Validate_RCI_Subprogram_Declaration (N : Node_Id) is K : constant Node_Kind := Nkind (N); Profile : List_Id; Id : constant Entity_Id := Defining_Entity (N); Param_Spec : Node_Id; Param_Type : Entity_Id; Error_Node : Node_Id := N; begin -- This procedure enforces rules on subprogram and access to subprogram -- declarations in RCI units. These rules do not apply to expander -- generated routines, which are not remote subprograms. It is called: -- 1. from Analyze_Subprogram_Declaration. -- 2. from Validate_Object_Declaration (access to subprogram). if not (Comes_From_Source (N) and then In_RCI_Declaration and then not In_Private_Part (Scope (Id))) then return; end if; if K = N_Subprogram_Declaration then Profile := Parameter_Specifications (Specification (N)); else pragma Assert (K = N_Object_Declaration); -- The above assertion is dubious, the visible declarations of an -- RCI unit never contain an object declaration, this should be an -- ACCESS-to-object declaration??? if Nkind (Id) = N_Defining_Identifier and then Nkind (Parent (Etype (Id))) = N_Full_Type_Declaration and then Ekind (Etype (Id)) = E_Access_Subprogram_Type then Profile := Parameter_Specifications (Type_Definition (Parent (Etype (Id)))); else return; end if; end if; -- Iterate through the parameter specification list, checking that -- no access parameter and no limited type parameter in the list. -- RM E.2.3(14). if Present (Profile) then Param_Spec := First (Profile); while Present (Param_Spec) loop Param_Type := Etype (Defining_Identifier (Param_Spec)); if Ekind (Param_Type) = E_Anonymous_Access_Type then if K = N_Subprogram_Declaration then Error_Node := Param_Spec; end if; -- Report error only if declaration is in source program if Comes_From_Source (Id) then Error_Msg_N ("subprogram in 'R'C'I unit cannot have access parameter", Error_Node); end if; -- For a limited private type parameter, we check only the private -- declaration and ignore full type declaration, unless this is -- the only declaration for the type, e.g., as a limited record. elsif No_External_Streaming (Param_Type) then if K = N_Subprogram_Declaration then Error_Node := Param_Spec; end if; Error_Msg_NE ("formal of remote subprogram& " & "must support external streaming", Error_Node, Id); if Is_Limited_Type (Param_Type) then Explain_Limited_Type (Param_Type, Error_Node); end if; end if; Next (Param_Spec); end loop; end if; if Ekind (Id) = E_Function and then Ekind (Etype (Id)) = E_Anonymous_Access_Type and then Comes_From_Source (Id) then Error_Msg_N ("function in 'R'C'I unit cannot have access result", Error_Node); end if; end Validate_RCI_Subprogram_Declaration; ---------------------------------------------------- -- Validate_Remote_Access_Object_Type_Declaration -- ---------------------------------------------------- procedure Validate_Remote_Access_Object_Type_Declaration (T : Entity_Id) is Direct_Designated_Type : Entity_Id; Desig_Type : Entity_Id; begin -- We are called from Analyze_Full_Type_Declaration, and the Nkind of -- the given node is N_Access_To_Object_Definition. if not Comes_From_Source (T) or else (not In_RCI_Declaration and then not In_RT_Declaration) then return; end if; -- An access definition in the private part of a package is not a -- remote access type. Restrictions related to external streaming -- support for non-remote access types are enforced elsewhere. Note -- that In_Private_Part is never set on type entities: check flag -- on enclosing scope. if In_Private_Part (Scope (T)) then return; end if; -- Check RCI or RT unit type declaration. It may not contain the -- declaration of an access-to-object type unless it is a general access -- type that designates a class-wide limited private type or subtype. -- There are also constraints on the primitive subprograms of the -- class-wide type (RM E.2.2(14), see Validate_RACW_Primitives). if Ekind (T) /= E_General_Access_Type or else not Is_Class_Wide_Type (Designated_Type (T)) then if In_RCI_Declaration then Error_Msg_N ("error in access type in Remote_Call_Interface unit", T); else Error_Msg_N ("error in access type in Remote_Types unit", T); end if; Error_Msg_N ("\must be general access to class-wide type", T); return; end if; Direct_Designated_Type := Designated_Type (T); Desig_Type := Etype (Direct_Designated_Type); -- Why is this check not in Validate_Remote_Access_To_Class_Wide_Type??? if not Is_Valid_Remote_Object_Type (Desig_Type) then Error_Msg_N ("error in designated type of remote access to class-wide type", T); Error_Msg_N ("\must be tagged limited private or private extension", T); return; end if; end Validate_Remote_Access_Object_Type_Declaration; ----------------------------------------------- -- Validate_Remote_Access_To_Class_Wide_Type -- ----------------------------------------------- procedure Validate_Remote_Access_To_Class_Wide_Type (N : Node_Id) is K : constant Node_Kind := Nkind (N); PK : constant Node_Kind := Nkind (Parent (N)); E : Entity_Id; begin -- This subprogram enforces the checks in (RM E.2.2(8)) for certain uses -- of class-wide limited private types. -- Storage_Pool and Storage_Size are not defined for such types -- -- The expected type of allocator must not be such a type. -- The actual parameter of generic instantiation must not be such a -- type if the formal parameter is of an access type. -- On entry, there are several cases: -- 1. called from sem_attr Analyze_Attribute where attribute name is -- either Storage_Pool or Storage_Size. -- 2. called from exp_ch4 Expand_N_Allocator -- 3. called from sem_ch4 Analyze_Explicit_Dereference -- 4. called from sem_res Resolve_Actuals if K = N_Attribute_Reference then E := Etype (Prefix (N)); if Is_Remote_Access_To_Class_Wide_Type (E) then Error_Msg_N ("incorrect attribute of remote operand", N); return; end if; elsif K = N_Allocator then E := Etype (N); if Is_Remote_Access_To_Class_Wide_Type (E) then Error_Msg_N ("incorrect expected remote type of allocator", N); return; end if; -- This subprogram also enforces the checks in E.2.2(13). A value of -- such type must not be dereferenced unless as controlling operand of -- a dispatching call. Explicit dereferences not coming from source are -- exempted from this checking because the expander produces them in -- some cases (such as for tag checks on dispatching calls with multiple -- controlling operands). However we do check in the case of an implicit -- dereference that is expanded to an explicit dereference (hence the -- test of whether Original_Node (N) comes from source). elsif K = N_Explicit_Dereference and then Comes_From_Source (Original_Node (N)) then E := Etype (Prefix (N)); -- If the class-wide type is not a remote one, the restrictions -- do not apply. if not Is_Remote_Access_To_Class_Wide_Type (E) then return; end if; -- If we have a true dereference that comes from source and that -- is a controlling argument for a dispatching call, accept it. if Is_Actual_Parameter (N) and then Is_Controlling_Actual (N) then return; end if; -- If we are just within a procedure or function call and the -- dereference has not been analyzed, return because this procedure -- will be called again from sem_res Resolve_Actuals. The same can -- apply in the case of dereference that is the prefix of a selected -- component, which can be a call given in prefixed form. if (Is_Actual_Parameter (N) or else PK = N_Selected_Component) and then not Analyzed (N) then return; end if; -- We must allow expanded code to generate a reference to the tag of -- the designated object (may be either the actual tag, or the stub -- tag in the case of a remote object). if PK = N_Selected_Component and then Is_Tag (Entity (Selector_Name (Parent (N)))) then return; end if; Error_Msg_N ("invalid dereference of a remote access-to-class-wide value", N); end if; end Validate_Remote_Access_To_Class_Wide_Type; ------------------------------------------ -- Validate_Remote_Type_Type_Conversion -- ------------------------------------------ procedure Validate_Remote_Type_Type_Conversion (N : Node_Id) is S : constant Entity_Id := Etype (N); E : constant Entity_Id := Etype (Expression (N)); begin -- This test is required in the case where a conversion appears inside a -- normal package, it does not necessarily have to be inside an RCI, -- Remote_Types unit (RM E.2.2(9,12)). if Is_Remote_Access_To_Subprogram_Type (E) and then not Is_Remote_Access_To_Subprogram_Type (S) then Error_Msg_N ("incorrect conversion of remote operand to local type", N); return; elsif not Is_Remote_Access_To_Subprogram_Type (E) and then Is_Remote_Access_To_Subprogram_Type (S) then Error_Msg_N ("incorrect conversion of local operand to remote type", N); return; elsif Is_Remote_Access_To_Class_Wide_Type (E) and then not Is_Remote_Access_To_Class_Wide_Type (S) then Error_Msg_N ("incorrect conversion of remote operand to local type", N); return; end if; -- If a local access type is converted into a RACW type, then the -- current unit has a pointer that may now be exported to another -- partition. if Is_Remote_Access_To_Class_Wide_Type (S) and then not Is_Remote_Access_To_Class_Wide_Type (E) then Set_Has_RACW (Current_Sem_Unit); end if; end Validate_Remote_Type_Type_Conversion; ------------------------------- -- Validate_RT_RAT_Component -- ------------------------------- procedure Validate_RT_RAT_Component (N : Node_Id) is Spec : constant Node_Id := Specification (N); Name_U : constant Entity_Id := Defining_Entity (Spec); Typ : Entity_Id; U_Typ : Entity_Id; First_Priv_Ent : constant Entity_Id := First_Private_Entity (Name_U); function Stream_Attributes_Available (Typ : Entity_Id) return Boolean; -- True if any stream attribute is available for Typ --------------------------------- -- Stream_Attributes_Available -- --------------------------------- function Stream_Attributes_Available (Typ : Entity_Id) return Boolean is begin return Stream_Attribute_Available (Typ, TSS_Stream_Read) or else Stream_Attribute_Available (Typ, TSS_Stream_Write) or else Stream_Attribute_Available (Typ, TSS_Stream_Input) or else Stream_Attribute_Available (Typ, TSS_Stream_Output); end Stream_Attributes_Available; -- Start of processing for Validate_RT_RAT_Component begin if not Is_Remote_Types (Name_U) then return; end if; Typ := First_Entity (Name_U); while Present (Typ) and then Typ /= First_Priv_Ent loop U_Typ := Underlying_Type (Base_Type (Typ)); if No (U_Typ) then U_Typ := Typ; end if; if Comes_From_Source (Typ) and then Is_Type (Typ) then -- Check that the type can be meaningfully transmitted to another -- partition (E.2.2(8)). if (Ada_Version < Ada_2005 and then Has_Non_Remote_Access (U_Typ)) or else (Stream_Attributes_Available (Typ) and then No_External_Streaming (U_Typ)) then if Is_Non_Remote_Access_Type (Typ) then Error_Msg_N ("error in non-remote access type", U_Typ); else Error_Msg_N ("error in record type containing a component of a " & "non-remote access type", U_Typ); end if; if Ada_Version >= Ada_2005 then Error_Msg_N ("\must have visible Read and Write attribute " & "definition clauses (RM E.2.2(8))", U_Typ); else Error_Msg_N ("\must have Read and Write attribute " & "definition clauses (RM E.2.2(8))", U_Typ); end if; end if; end if; Next_Entity (Typ); end loop; end Validate_RT_RAT_Component; ----------------------------------------- -- Validate_SP_Access_Object_Type_Decl -- ----------------------------------------- procedure Validate_SP_Access_Object_Type_Decl (T : Entity_Id) is Direct_Designated_Type : Entity_Id; function Has_Entry_Declarations (E : Entity_Id) return Boolean; -- Return true if the protected type designated by T has entry -- declarations. ---------------------------- -- Has_Entry_Declarations -- ---------------------------- function Has_Entry_Declarations (E : Entity_Id) return Boolean is Ety : Entity_Id; begin if Nkind (Parent (E)) = N_Protected_Type_Declaration then Ety := First_Entity (E); while Present (Ety) loop if Ekind (Ety) = E_Entry then return True; end if; Next_Entity (Ety); end loop; end if; return False; end Has_Entry_Declarations; -- Start of processing for Validate_SP_Access_Object_Type_Decl begin -- We are called from Sem_Ch3.Analyze_Full_Type_Declaration, and the -- Nkind of the given entity is N_Access_To_Object_Definition. if not Comes_From_Source (T) or else not In_Shared_Passive_Unit or else In_Subprogram_Task_Protected_Unit then return; end if; -- Check Shared Passive unit. It should not contain the declaration -- of an access-to-object type whose designated type is a class-wide -- type, task type or protected type with entry (RM E.2.1(7)). Direct_Designated_Type := Designated_Type (T); if Ekind (Direct_Designated_Type) = E_Class_Wide_Type then Error_Msg_N ("invalid access-to-class-wide type in shared passive unit", T); return; elsif Ekind (Direct_Designated_Type) in Task_Kind then Error_Msg_N ("invalid access-to-task type in shared passive unit", T); return; elsif Ekind (Direct_Designated_Type) in Protected_Kind and then Has_Entry_Declarations (Direct_Designated_Type) then Error_Msg_N ("invalid access-to-protected type in shared passive unit", T); return; end if; end Validate_SP_Access_Object_Type_Decl; --------------------------------- -- Validate_Static_Object_Name -- --------------------------------- procedure Validate_Static_Object_Name (N : Node_Id) is E : Entity_Id; Val : Node_Id; function Is_Primary (N : Node_Id) return Boolean; -- Determine whether node is syntactically a primary in an expression -- This function should probably be somewhere else ??? -- -- Also it does not do what it says, e.g if N is a binary operator -- whose parent is a binary operator, Is_Primary returns True ??? ---------------- -- Is_Primary -- ---------------- function Is_Primary (N : Node_Id) return Boolean is K : constant Node_Kind := Nkind (Parent (N)); begin case K is when N_Aggregate | N_Component_Association | N_Index_Or_Discriminant_Constraint | N_Membership_Test | N_Op => return True; when N_Attribute_Reference => declare Attr : constant Name_Id := Attribute_Name (Parent (N)); begin return Attr /= Name_Address and then Attr /= Name_Access and then Attr /= Name_Unchecked_Access and then Attr /= Name_Unrestricted_Access; end; when N_Indexed_Component => return N /= Prefix (Parent (N)) or else Is_Primary (Parent (N)); when N_Qualified_Expression | N_Type_Conversion => return Is_Primary (Parent (N)); when N_Assignment_Statement | N_Object_Declaration => return N = Expression (Parent (N)); when N_Selected_Component => return Is_Primary (Parent (N)); when others => return False; end case; end Is_Primary; -- Start of processing for Validate_Static_Object_Name begin if not In_Preelaborated_Unit or else not Comes_From_Source (N) or else In_Subprogram_Or_Concurrent_Unit or else Ekind (Current_Scope) = E_Block then return; -- Filter out cases where primary is default in a component declaration, -- discriminant specification, or actual in a record type initialization -- call. -- Initialization call of internal types elsif Nkind (Parent (N)) = N_Procedure_Call_Statement then if Present (Parent (Parent (N))) and then Nkind (Parent (Parent (N))) = N_Freeze_Entity then return; end if; if Nkind (Name (Parent (N))) = N_Identifier and then not Comes_From_Source (Entity (Name (Parent (N)))) then return; end if; end if; -- Error if the name is a primary in an expression. The parent must not -- be an operator, or a selected component or an indexed component that -- is itself a primary. Entities that are actuals do not need to be -- checked, because the call itself will be diagnosed. Entities in a -- generic unit or within a preanalyzed expression are not checked: -- only their use in executable code matters. if Is_Primary (N) and then (not Inside_A_Generic or else Present (Enclosing_Generic_Body (N))) and then not In_Spec_Expression then if Ekind (Entity (N)) = E_Variable or else Ekind (Entity (N)) in Formal_Object_Kind then Flag_Non_Static_Expr ("non-static object name in preelaborated unit", N); -- Give an error for a reference to a nonstatic constant, unless the -- constant is in another GNAT library unit that is preelaborable. elsif Ekind (Entity (N)) = E_Constant and then not Is_Static_Expression (N) then E := Entity (N); Val := Constant_Value (E); if Is_Internal_File_Name (Unit_File_Name (Get_Source_Unit (N))) and then Enclosing_Comp_Unit_Node (N) /= Enclosing_Comp_Unit_Node (E) and then (Is_Preelaborated (Scope (E)) or else Is_Pure (Scope (E)) or else (Present (Renamed_Object (E)) and then Is_Entity_Name (Renamed_Object (E)) and then (Is_Preelaborated (Scope (Renamed_Object (E))) or else Is_Pure (Scope (Renamed_Object (E)))))) then null; -- If the value of the constant is a local variable that renames -- an aggregate, this is in itself legal. The aggregate may be -- expanded into a loop, but this does not affect preelaborability -- in itself. If some aggregate components are non-static, that is -- to say if they involve non static primaries, they will be -- flagged when analyzed. elsif Present (Val) and then Is_Entity_Name (Val) and then Is_Array_Type (Etype (Val)) and then not Comes_From_Source (Val) and then Nkind (Original_Node (Val)) = N_Aggregate then null; -- This is the error case else -- In GNAT mode or Relaxed RM Semantic mode, this is just a -- warning, to allow it to be judiciously turned off. -- Otherwise it is a real error. if GNAT_Mode or Relaxed_RM_Semantics then Error_Msg_N ("??non-static constant in preelaborated unit", N); else Flag_Non_Static_Expr ("non-static constant in preelaborated unit", N); end if; end if; end if; end if; end Validate_Static_Object_Name; end Sem_Cat;
tests/emra/PRED_MODE/asm_for_rb/PR05_rb.asm
ilebedev/stacktool
1
246075
<gh_stars>1-10 push 0; push 0; st; push 0; push 1; st; push 0; push 0; sethi 0x0200; st; push 0; push 0; sethi 0x0400; st; push 0; push 0; drop 0; push 0; pull_cp 1; push 10; cmp_ugt; bz 47; pull_cp 0; push 2; cmp_ugt; bz 24; push 0; sethi 0x0200; pull_cp 0; ld; push 1; add; tuck 1; st; pull_cp 1; push 5; cmp_ule; bz 9; push 0; sethi 0x0400; pull_cp 0; ld; push 1; add; tuck 1; st; push 1; add; j_pc -26; push 0; pull_cp 0; ld; push 1; add; tuck 1; st; push 1; pull_cp 0; ld; push 1; add; tuck 1; st; pull 1; push 1; add; tuck 1 j_pc -51; drop 1; drop 0; halt;
Python/examples/scram.asm
tomxp411/8080Asm
0
21402
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; ; NAME: scram.asm ; AUTHOR: <NAME> ("The Ubuntourist") <<EMAIL>> ; LASTMOD: 2021.01.11 (kjc) ; ; DESCRIPTION: ; ; Set to Clear all RAM (SCRAM) ; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Code segment ORG 0000h ; Set the location counter to 0 (hex) LXI H,AFTER ; Point to first byte after the end of the program LOOP: MVI M,00h ; Move zero into memory location INX H ; Point to next memory location JMP LOOP ; You go back, Jack, and do it again, wheels turnin'... AFTER: EQU $ ; Define constant AFTER as current location counter END ; End
programs/oeis/004/A004346.asm
neoneye/loda
22
6514
<reponame>neoneye/loda ; A004346: Binomial coefficient C(5n,n-4). ; 1,25,435,6545,91390,1221759,15890700,202927725,2558620845,31966749880,396704524216,4898229264825,60246643120300,738799683460650,9038619861406740,110375347398090219,1345860629046814650 mov $1,5 mul $1,$0 add $1,20 bin $1,$0 mov $0,$1
Working Disassembly/General/Sprites/Shields/Anim - Shield S2.asm
TeamASM-Blur/Sonic-3-Blue-Balls-Edition
0
160261
<reponame>TeamASM-Blur/Sonic-3-Blue-Balls-Edition dc.w byte_18A36-Ani_Shield_S2 byte_18A36: dc.b 0, 5, 0, 5, 1, 5, 2, 5, 3, 5, 4, $FF
programs/oeis/010/A010079.asm
karttu/loda
0
174844
; A010079: Coordination sequence for net formed by holes in D_4 lattice. ; 1,16,104,344,792,1528,2632,4152,6200,8792,12072,16024,20824,26424,33032,40568,49272,59032,70120,82392,96152,111224,127944,146104,166072,187608,211112,236312,263640,292792,324232,357624,393464,431384,471912,514648,560152,607992,658760,711992,768312,827224,889384,954264,1022552,1093688,1168392,1246072,1327480,1411992,1500392,1592024,1687704,1786744,1889992,1996728,2107832,2222552,2341800,2464792,2592472,2724024,2860424,3000824,3146232,3295768,3450472,3609432,3773720,3942392,4116552,4295224,4479544,4668504,4863272,5062808,5268312,5478712,5695240,5916792,6144632,6377624,6617064,6861784,7113112,7369848,7633352,7902392,8178360,8459992,8748712,9043224,9344984,9652664,9967752,10288888,10617592,10952472,11295080,11643992,12000792,12364024,12735304,13113144,13499192,13891928,14293032,14700952,15117400,15540792,15972872,16412024,16860024,17315224,17779432,18250968,18731672,19219832,19717320,20222392,20736952,21259224,21791144,22330904,22880472,23438008,24005512,24581112,25166840,25760792,26365032,26977624,27600664,28232184,28874312,29525048,30186552,30856792,31537960,32227992,32929112,33639224,34360584,35091064,35832952,36584088,37346792,38118872,38902680,39695992,40501192,41316024,42142904,42979544,43828392,44687128,45558232,46439352,47333000,48236792,49153272,50080024,51019624,51969624,52932632,53906168,54892872,55890232,56900920,57922392,58957352,60003224,61062744,62133304,63217672,64313208,65422712,66543512,67678440,68824792,69985432,71157624,72344264,73542584,74755512,75980248,77219752,78471192,79737560,81015992,82309512,83615224,84936184,86269464,87618152,88979288,90355992,91745272,93150280,94567992,96001592,97448024,98910504,100385944,101877592,103382328,104903432,106437752,107988600,109552792,111133672,112728024,114339224,115964024,117605832,119261368,120934072,122620632,124324520,126042392,127777752,129527224,131294344,133075704,134874872,136688408,138519912,140365912,142230040,144108792,146005832,147917624,149847864,151792984,153756712,155735448,157732952,159745592,161777160,163823992,165889912,167971224,170071784,172187864,174323352,176474488,178645192,180831672,183037880,185259992 mov $4,$0 mov $5,$0 lpb $0,1 mov $2,1 sub $4,1 add $2,$4 clr $4,1 sub $2,1 mov $0,$2 gcd $0,2 sub $2,1 mul $2,4 add $4,4 lpe pow $2,$0 mov $1,$2 mov $3,$5 mul $3,4 add $1,$3 mov $6,$5 mul $6,$5 mul $6,$5 mov $3,$6 mul $3,12 add $1,$3
ugbc/src/hw/6502/mob.asm
spotlessmind1975/ugbasic
10
19636
; /***************************************************************************** ; * ugBASIC - an isomorphic BASIC language compiler for retrocomputers * ; ***************************************************************************** ; * Copyright 2021-2022 <NAME> (<EMAIL>) ; * ; * Licensed under the Apache License, Version 2.0 (the "License"); ; * you may not use this file eXcept in compliance with the License. ; * You may obtain a copy of the License at ; * ; * http://www.apache.org/licenses/LICENSE-2.0 ; * ; * Unless required by applicable law or agreed to in writing, software ; * distributed under the License is distributed on an "AS IS" BASIS, ; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either eXpress or implied. ; * See the License for the specific language governing permissions and ; * limitations under the License. ; *---------------------------------------------------------------------------- ; * Concesso in licenza secondo i termini della Licenza Apache, versione 2.0 ; * (la "Licenza"); è proibito usare questo file se non in conformità alla ; * Licenza. Una copia della Licenza è disponibile all'indirizzo: ; * ; * http://www.apache.org/licenses/LICENSE-2.0 ; * ; * Se non richiesto dalla legislazione vigente o concordato per iscritto, ; * il software distribuito nei termini della Licenza è distribuito ; * "COSì COM'è", SENZA GARANZIE O CONDIZIONI DI ALCUN TIPO, esplicite o ; * implicite. Consultare la Licenza per il testo specifico che regola le ; * autorizzazioni e le limitazioni previste dalla medesima. ; ****************************************************************************/ ;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ;* * ;* MOVABLE OBJECTS UNDER 6502 (generic algorithms) * ;* * ;* by <NAME> * ;* * ;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * MOB_COUNT = $10 MOBI: .byte 0 MOBX: .word 0 MOBY: .word 0 MOBW: .word 0 MOBH: .word 0 MOBADDR = $03 MOBSIZE: .word 0 MOBLASTX: .byte 0 MOBCOUNT: .byte 0 ; Generic initialization ; MOBINIT(X:indeX,X,y,w,h,draw) MOBINIT: STX MOBI ; Initialize status LDA #$0 STA MOBDESCRIPTORS_S,X ; Initialize position LDA MOBX STA MOBDESCRIPTORS_XL,X STA MOBDESCRIPTORS_PXL,X LDA MOBX+1 STA MOBDESCRIPTORS_XH,X STA MOBDESCRIPTORS_PXH,X LDA MOBY STA MOBDESCRIPTORS_YL,X STA MOBDESCRIPTORS_PYL,X LDA MOBY+1 STA MOBDESCRIPTORS_YH,X STA MOBDESCRIPTORS_PYH,X ; Initialize size LDA MOBW STA MOBDESCRIPTORS_W,X LDA MOBH STA MOBDESCRIPTORS_H,X ; Save address of the given data. ; Note that specific chipset ; initialization can easily override this. LDA MOBADDR STA MOBDESCRIPTORS_DL,X LDA MOBADDR+1 STA MOBDESCRIPTORS_DH,X ; Initialize to 0 the space for saving ; background (again, this is a chipset specific ; initialization routine). LDA #$0 STA MOBDESCRIPTORS_SL,X STA MOBDESCRIPTORS_SH,X ; Initialize the chipset specific part JSR MOBINITCS RTS ; MOBSHOW(X:indeX) MOBSHOW: LDA MOBDESCRIPTORS_S,X ORA #$01 STA MOBDESCRIPTORS_S,X RTS ; MOBHIDE(X:indeX) MOBHIDE: LDA MOBDESCRIPTORS_S,X AND #$FE STA MOBDESCRIPTORS_S,X RTS ; MOBSAVE(X:indeX) -> chipset ; MOBRESTORE(X:indeX) -> chipset ; MOBDRAW(X:indeX) -> chipset MOBADJUST: LDA MOBDESCRIPTORS_S,X AND #$01 BEQ MOBADJUSTN LDA MOBDESCRIPTORS_S,X ORA #$03 STA MOBDESCRIPTORS_S,X RTS MOBADJUSTN: LDA MOBDESCRIPTORS_S,X AND #$FC STA MOBDESCRIPTORS_S,X RTS ; MOBAT(X:indeX, X, y) MOBAT: STX MOBI LDA MOBX STA MOBDESCRIPTORS_XL,X CMP MOBDESCRIPTORS_PXL,X BEQ MOBAT2 LDA MOBDESCRIPTORS_S,X ORA #$04 STA MOBDESCRIPTORS_S,X MOBAT2: LDA MOBX+1 STA MOBDESCRIPTORS_XH,X CMP MOBDESCRIPTORS_PXH,X BEQ MOBAT3 LDA MOBDESCRIPTORS_S,X ORA #$04 STA MOBDESCRIPTORS_S,X MOBAT3: LDA MOBY STA MOBDESCRIPTORS_YL,X CMP MOBDESCRIPTORS_PYL,X BEQ MOBAT4 LDA MOBDESCRIPTORS_S,X ORA #$08 STA MOBDESCRIPTORS_S,X MOBAT4: LDA MOBY+1 STA MOBDESCRIPTORS_YH,X STA MOBDESCRIPTORS_PYH,X BEQ MOBAT5 LDA MOBDESCRIPTORS_S,X ORA #$08 STA MOBDESCRIPTORS_S,X MOBAT5: JSR MOBATCS RTS MOBALLOC: CLC LDA MOBADDRESS ADC MOBALLOCATED STA MOBADDR LDA MOBADDRESS+1 ADC MOBALLOCATED+1 STA MOBADDR+1 CLC LDA MOBALLOCATED ADC MOBSIZE STA MOBALLOCATED LDA MOBALLOCATED+1 ADC #0 STA MOBALLOCATED+1 RTS MOBFREE: SEC LDA MOBALLOCATED SBC MOBSIZE STA MOBALLOCATED LDA MOBALLOCATED+1 SBC #0 STA MOBALLOCATED+1 RTS MOBDESCRIPTORS_S: .RES MOB_COUNT MOBDESCRIPTORS_XL: .RES MOB_COUNT MOBDESCRIPTORS_XH: .RES MOB_COUNT MOBDESCRIPTORS_YL: .RES MOB_COUNT MOBDESCRIPTORS_YH: .RES MOB_COUNT MOBDESCRIPTORS_PXL: .RES MOB_COUNT MOBDESCRIPTORS_PXH: .RES MOB_COUNT MOBDESCRIPTORS_PYL: .RES MOB_COUNT MOBDESCRIPTORS_PYH: .RES MOB_COUNT MOBDESCRIPTORS_W: .RES MOB_COUNT MOBDESCRIPTORS_H: .RES MOB_COUNT MOBDESCRIPTORS_DL: .RES MOB_COUNT MOBDESCRIPTORS_DH: .RES MOB_COUNT MOBDESCRIPTORS_SL: .RES MOB_COUNT MOBDESCRIPTORS_SH: .RES MOB_COUNT MOBDESCRIPTORS_SIZEL: .RES MOB_COUNT MOBDESCRIPTORS_SIZEH: .RES MOB_COUNT MOBALLOCATED: .WORD $0 MOBVBL: .BYTE $0 MOBRENDER: ; JSR MOBWAITVBL ; X = 0 LDX #0 MOBRENDERL1: ; take descriptor X LDA MOBDESCRIPTORS_S,X ; unvisibled -> visibled? = $01 ; visibled? -> unvisibled = $02 ; moved + visibled? = $0D ; moved + unvisibled? = $0E ; moved? = $08 or $04 AND #$03 CMP #$01 BEQ MOBRENDERV1 CMP #$02 BEQ MOBRENDERV1 ; retake descriptor X LDA MOBDESCRIPTORS_S,X AND #$0C BNE MOBRENDERV1 ; ++X INX ; X < N ? CPX #MOB_COUNT BNE MOBRENDERL1 RTS MOBRENDERV1: ; LASTX = X STX MOBLASTX ; X = N - 1 LDX #MOB_COUNT DEX MOBRENDERL2: ; previously visible? LDA MOBDESCRIPTORS_S, X AND #$02 BEQ MOBRENDERV2 STX MOBI ; restore background at pX,py (w,h) save area JSR MOBRESTORE LDX MOBI ; adjust visibility flag JSR MOBADJUST MOBRENDERV2: ; update positions LDA MOBDESCRIPTORS_XL, X STA MOBDESCRIPTORS_PXL, X LDA MOBDESCRIPTORS_XH, X STA MOBDESCRIPTORS_PXH, X LDA MOBDESCRIPTORS_YL, X STA MOBDESCRIPTORS_PYL, X LDA MOBDESCRIPTORS_YH, X STA MOBDESCRIPTORS_PYH, X ; --X DEX ; X >= LASTX CPX MOBLASTX BCS MOBRENDERL2 BEQ MOBRENDERL2 ; Reset the save area to LAST X MOBRENDERV3: MOBRENDERL3: ; visible ? LDA MOBDESCRIPTORS_S, X AND #$01 BEQ MOBRENDERV4 STX MOBI ; save background at X,y (w,h) to save area JSR MOBSAVE LDX MOBI ; draw sprite at X,y (w,h) from draw area JSR MOBDRAW LDX MOBI ; adjust visibility flag JSR MOBADJUST LDX MOBI MOBRENDERV4: ; ++X INX ; X < N ? CPX #MOB_COUNT BCC MOBRENDERL3 ; JSR MOBWAITVBL RTS
3-mid/physics/interface/source/motor/physics-motor.ads
charlie5/lace
20
18813
-- with i.physics.Object; -- with i.physics.Joint; with ada.strings.unbounded; package physics.Motor is type Item is abstract tagged record Name : ada.strings.unbounded.unbounded_String; is_Enabled : Boolean := False; end record; procedure update (Self : in out Item) is abstract; -- class Motor -- { -- public: -- -- /// Returns true if this Motor depends on the given Solid. -- virtual bool internal_dependsOnSolid(Solid* s); -- -- /// Returns true if this Motor depends on the given Joint. -- virtual bool internal_dependsOnJoint(Joint* j); -- } -- -- #endif procedure dummy; end physics.Motor;
parser-dialect/parser-mysql/src/main/antlr4/imports/mysql/DCLStatement.g4
zhaox1n/parser-engine
0
840
/* * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. * The ASF licenses this file to You under the Apache License, Version 2.0 * (the "License"); you may not use this file except in compliance with * the License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ grammar DCLStatement; import Symbol, Keyword, MySQLKeyword, Literals, BaseRule; dclStatement :(grant | revoke | createUser | alterUser | dropUser | renameUser | createRole | dropRole | setDefaultRole | setRole | setPassword) ; grant : GRANT (proxyClause_ | privilegeClause | roleClause_) ; revoke : REVOKE (proxyClause_ | privilegeClause | allClause_ | roleClause_) ; proxyClause_ : PROXY ON userOrRole TO userOrRoles_ withGrantOption_? ; privilegeClause : privileges_ ON onObjectClause (TO | FROM) userOrRoles_ withGrantOption_? grantOption_? ; roleClause_ : roles_ ( TO| FROM) userOrRoles_ withGrantOption_? ; allClause_ : ALL PRIVILEGES? COMMA_ GRANT OPTION FROM userOrRoles_ ; privileges_ : privilegeType_ columnNames? (COMMA_ privilegeType_ columnNames?)* ; privilegeType_ : ALL PRIVILEGES? | ALTER ROUTINE? | CREATE | CREATE ROUTINE | CREATE TABLESPACE | CREATE TEMPORARY TABLES | CREATE USER | CREATE VIEW | DELETE | DROP | EVENT | EXECUTE | FILE | GRANT OPTION | INDEX | INSERT | LOCK TABLES | PROCESS | PROXY | REFERENCES | RELOAD | REPLICATION CLIENT | REPLICATION SLAVE | SELECT | SHOW DATABASES | SHOW VIEW | SHUTDOWN | SUPER | TRIGGER | UPDATE | USAGE | AUDIT_ADMIN | BINLOG_ADMIN | CONNECTION_ADMIN | ENCRYPTION_KEY_ADMIN | FIREWALL_ADMIN | FIREWALL_USER | GROUP_REPLICATION_ADMIN | REPLICATION_SLAVE_ADMIN | ROLE_ADMIN | SET_USER_ID | SYSTEM_VARIABLES_ADMIN | VERSION_TOKEN_ADMIN ; onObjectClause : objectType_? privilegeLevel ; objectType_ : TABLE | FUNCTION | PROCEDURE ; privilegeLevel : ASTERISK_ | ASTERISK_ DOT_ASTERISK_ | identifier DOT_ASTERISK_ | tableName ; createUser : CREATE USER (IF NOT EXISTS)? userName userAuthOption_? (COMMA_ userName userAuthOption_?)* DEFAULT ROLE roleName (COMMA_ roleName)* (REQUIRE (NONE | tlsOption_ (AND? tlsOption_)*))? (WITH resourceOption_ resourceOption_*)? (passwordOption_ | lockOption_)* ; alterUser : ALTER USER (IF EXISTS)? userName userAuthOption_? (COMMA_ userName userAuthOption_?)* (REQUIRE (NONE | tlsOption_ (AND? tlsOption_)*))? (WITH resourceOption_ resourceOption_*)? (passwordOption_ | lockOption_)* | ALTER USER (IF EXISTS)? USER LP_ RP_ userFuncAuthOption_ | ALTER USER (IF EXISTS)? userName DEFAULT ROLE (NONE | ALL | roleName (COMMA_ roleName)*) ; dropUser : DROP USER (IF EXISTS)? userName (COMMA_ userName)* ; createRole : CREATE ROLE (IF NOT EXISTS)? roleName (COMMA_ roleName)* ; dropRole : DROP ROLE (IF EXISTS)? roleName (COMMA_ roleName)* ; renameUser : RENAME USER userName TO userName (COMMA_ userName TO userName)* ; setDefaultRole : SET DEFAULT ROLE (NONE | ALL | roleName (COMMA_ roleName)*) TO userName (COMMA_ userName)* ; setRole : SET ROLE (DEFAULT | NONE | ALL | ALL EXCEPT roleName (COMMA_ roleName)* | roleName (COMMA_ roleName)*) ; setPassword : SET PASSWORD (FOR userName)? authOption_ (REPLACE STRING_)? (RETAIN CURRENT PASSWORD)? ; authOption_ : EQ_ stringLiterals | TO RANDOM ; withGrantOption_ : WITH GRANT OPTION ; userOrRoles_ : userOrRole (COMMA_ userOrRole)* ; roles_ : roleName (COMMA_ roleName)* ; grantOption_ : AS userName (WITH ROLE DEFAULT | NONE | ALL | ALL EXCEPT roles_ | roles_ )? ; userAuthOption_ : identifiedBy_ | identifiedWith_ | DISCARD OLD PASSWORD ; identifiedBy_ : IDENTIFIED BY (STRING_ | RANDOM PASSWORD) (REPLACE STRING_)? (RETAIN CURRENT PASSWORD)? ; identifiedWith_ : IDENTIFIED WITH pluginName (BY |AS) (STRING_ | RANDOM PASSWORD) (REPLACE stringLiterals)? (RETAIN CURRENT PASSWORD)? ; lockOption_ : ACCOUNT LOCK | ACCOUNT UNLOCK ; passwordOption_ : PASSWORD EXPIRE (DEFAULT | NEVER | INTERVAL NUMBER_ DAY)? | PASSWORD HISTORY (DEFAULT | NUMBER_) | PASSWORD REUSE INTERVAL (DEFAULT | NUMBER_ DAY) | PASSWORD REQUIRE CURRENT (DEFAULT | OPTIONAL) ; resourceOption_ : MAX_QUERIES_PER_HOUR NUMBER_ | MAX_UPDATES_PER_HOUR NUMBER_ | MAX_CONNECTIONS_PER_HOUR NUMBER_ | MAX_USER_CONNECTIONS NUMBER_ ; tlsOption_ : SSL | X509 | CIPHER STRING_ | ISSUER STRING_ | SUBJECT STRING_ ; userFuncAuthOption_ : identifiedBy_ | DISCARD OLD PASSWORD ;
source/nodes/program-nodes-operator_symbols.ads
reznikmm/gela
0
16818
-- SPDX-FileCopyrightText: 2019 <NAME> <<EMAIL>> -- -- SPDX-License-Identifier: MIT ------------------------------------------------------------- with Program.Lexical_Elements; with Program.Elements.Defining_Operator_Symbols; with Program.Elements.Operator_Symbols; with Program.Element_Visitors; package Program.Nodes.Operator_Symbols is pragma Preelaborate; type Operator_Symbol is new Program.Nodes.Node and Program.Elements.Operator_Symbols.Operator_Symbol and Program.Elements.Operator_Symbols.Operator_Symbol_Text with private; function Create (Operator_Symbol_Token : not null Program.Lexical_Elements .Lexical_Element_Access) return Operator_Symbol; type Implicit_Operator_Symbol is new Program.Nodes.Node and Program.Elements.Operator_Symbols.Operator_Symbol with private; function Create (Is_Part_Of_Implicit : Boolean := False; Is_Part_Of_Inherited : Boolean := False; Is_Part_Of_Instance : Boolean := False) return Implicit_Operator_Symbol with Pre => Is_Part_Of_Implicit or Is_Part_Of_Inherited or Is_Part_Of_Instance; private type Base_Operator_Symbol is abstract new Program.Nodes.Node and Program.Elements.Operator_Symbols.Operator_Symbol with record Corresponding_Defining_Operator_Symbol : Program.Elements .Defining_Operator_Symbols.Defining_Operator_Symbol_Access; end record; procedure Initialize (Self : in out Base_Operator_Symbol'Class); overriding procedure Visit (Self : not null access Base_Operator_Symbol; Visitor : in out Program.Element_Visitors.Element_Visitor'Class); overriding function Corresponding_Defining_Operator_Symbol (Self : Base_Operator_Symbol) return Program.Elements.Defining_Operator_Symbols .Defining_Operator_Symbol_Access; overriding function Is_Operator_Symbol (Self : Base_Operator_Symbol) return Boolean; overriding function Is_Expression (Self : Base_Operator_Symbol) return Boolean; type Operator_Symbol is new Base_Operator_Symbol and Program.Elements.Operator_Symbols.Operator_Symbol_Text with record Operator_Symbol_Token : not null Program.Lexical_Elements .Lexical_Element_Access; end record; overriding function To_Operator_Symbol_Text (Self : in out Operator_Symbol) return Program.Elements.Operator_Symbols.Operator_Symbol_Text_Access; overriding function Operator_Symbol_Token (Self : Operator_Symbol) return not null Program.Lexical_Elements.Lexical_Element_Access; overriding function Image (Self : Operator_Symbol) return Text; type Implicit_Operator_Symbol is new Base_Operator_Symbol with record Is_Part_Of_Implicit : Boolean; Is_Part_Of_Inherited : Boolean; Is_Part_Of_Instance : Boolean; end record; overriding function To_Operator_Symbol_Text (Self : in out Implicit_Operator_Symbol) return Program.Elements.Operator_Symbols.Operator_Symbol_Text_Access; overriding function Is_Part_Of_Implicit (Self : Implicit_Operator_Symbol) return Boolean; overriding function Is_Part_Of_Inherited (Self : Implicit_Operator_Symbol) return Boolean; overriding function Is_Part_Of_Instance (Self : Implicit_Operator_Symbol) return Boolean; overriding function Image (Self : Implicit_Operator_Symbol) return Text; end Program.Nodes.Operator_Symbols;
Source.asm
usamashafiq/Stacks-Labels-Procedure-in-assembly
0
167989
<reponame>usamashafiq/Stacks-Labels-Procedure-in-assembly .MODEL SMALL .STACK 100H .DATA MS DB "ENTER YOUR NAME $" VAR1 DB 100 DUP('$') MS1 DB " WELCOME $" MS2 DB " * * * * * QUIZ GAME * * * * * $" MS3 DB " * * * ANSWER THE QUESTIONS * * * $" RHT1 DB "YOUR ANSWER IS RIGHT : $" WRN1 DB "YOUR ANSWER IS WRONG : $" MSG1 DB " WHAT IS THE CAPITAL OF PAKISTAN? $" QSN1 DB "A) KARACHI B)ISLAMABAD $" MSG2 DB "WHAT IS THE BRAIN OF COMPUTER? $" QSN2 DB "A)MONITOR B)CPU $" MSG3 DB "5 * 7 = ? $" QSN3 DB "A)35 B)19 $" MSG4 DB "WHAT IS THE DATE OF BIRTH OF QUAID-E-AZAM ? $" QSN4 DB "A) 25DEC B)19NOV $" MSG5 DB "WHO WAS THE INVENTOR OF RADIO ? $" QSN5 DB "A)THOMASON B)MARCONI $" CONGRATS DB " THANK YOU FOR BEING WITH US. YOUR SCORE IS : $" AGAIN DB "PRESS 'Y' IF YOU WANT TO PLAY AGAIN ! $" NAGAIN DB "PRESS 'N' IF YOU DONT WANT TO PLAY ! $" .CODE MAIN PROC MOV AX,@DATA MOV DS,AX AG: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET MS MOV AH,9 INT 21H MOV SI,OFFSET VAR1 L2: MOV AH,1 INT 21H CMP AL,13 JE PROGRAMMED MOV [SI],AL INC SI JMP L2 PROGRAMMED: MOV DX,OFFSET MS1 MOV AH,9 INT 21H MOV DX,OFFSET VAR1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET MS2 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET MS3 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV AL,0DH INT 21H MOV BL,48 LEV1: MOV DX,OFFSET MSG1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET QSN1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,1 INT 21H CMP AL,'B' JE RT1 JMP ER1 MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H RT1: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET RHT1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H INC BL JMP LEV2 ER1: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET WRN1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H LEV2: MOV DX,OFFSET MSG2 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET QSN2 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,1 INT 21H CMP AL,'B' JE RT2 JMP ER2 MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H RT2: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET RHT1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H INC BL JMP LEV3 ER2: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET WRN1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H LEV3: MOV DX,OFFSET MSG3 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET QSN3 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,1 INT 21H CMP AL,'A' JE RT3 JMP ER3 MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H RT3: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET RHT1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H INC BL JMP LEV4 ER3: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET WRN1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H LEV4: MOV DX,OFFSET MSG4 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET QSN4 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,1 INT 21H CMP AL,'A' JE RT4 JMP ER4 MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H RT4: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET RHT1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H INC BL JMP LEV5 ER4: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET WRN1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H LEV5: MOV DX,OFFSET MSG5 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET QSN5 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,1 INT 21H CMP AL,'B' JE RT5 JMP ER5 MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H RT5: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET RHT1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H INC BL JMP PASS ER5: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET WRN1 MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H PASS: MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET CONGRATS MOV AH,9 INT 21H MOV DL,BL MOV AH,2 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET AGAIN MOV AH,9 INT 21H MOV AH,2 MOV DL,0AH INT 21H MOV DL,0DH INT 21H MOV DX,OFFSET NAGAIN MOV AH,9 INT 21H MOV AH,1 INT 21H CMP AL,'Y' JE AG CMP AL,'N' JE EXIT EXIT: MOV AH,4CH INT 21H MAIN ENDP END MAIN
gfx/pokemon/sentret/anim.asm
Dev727/ancientplatinum
28
6245
setrepeat 2 frame 0, 15 frame 1, 15 dorepeat 1 endanim
programs/oeis/203/A203286.asm
karttu/loda
0
83783
<filename>programs/oeis/203/A203286.asm ; A203286: Number of arrays of 2n nondecreasing integers in -3..3 with sum zero and equal numbers greater than zero and less than zero. ; 4,12,28,57,104,176,280,425,620,876,1204,1617,2128,2752,3504,4401,5460,6700,8140,9801,11704,13872,16328,19097,22204,25676,29540,33825,38560,43776,49504,55777,62628,70092,78204,87001,96520,106800,117880,129801,142604,156332,171028,186737,203504,221376,240400,260625,282100,304876,329004,354537,381528,410032,440104,471801,505180,540300,577220,616001,656704,699392,744128,790977,840004,891276,944860,1000825,1059240,1120176,1183704,1249897,1318828,1390572,1465204,1542801,1623440,1707200,1794160,1884401,1978004,2075052,2175628,2279817,2387704,2499376,2614920,2734425,2857980,2985676,3117604,3253857,3394528,3539712,3689504,3844001,4003300,4167500,4336700,4511001,4690504,4875312,5065528,5261257,5462604,5669676,5882580,6101425,6326320,6557376,6794704,7038417,7288628,7545452,7809004,8079401,8356760,8641200,8932840,9231801,9538204,9852172,10173828,10503297,10840704,11186176,11539840,11901825,12272260,12651276,13039004,13435577,13841128,14255792,14679704,15113001,15555820,16008300,16470580,16942801,17425104,17917632,18420528,18933937,19458004,19992876,20538700,21095625,21663800,22243376,22834504,23437337,24052028,24678732,25317604,25968801,26632480,27308800,27997920,28700001,29415204,30143692,30885628,31641177,32410504,33193776,33991160,34802825,35628940,36469676,37325204,38195697,39081328,39982272,40898704,41830801,42778740,43742700,44722860,45719401,46732504,47762352,48809128,49873017,50954204,52052876,53169220,54303425,55455680,56626176,57815104,59022657,60249028,61494412,62759004,64043001,65346600,66670000,68013400,69377001,70761004,72165612,73591028,75037457,76505104,77994176,79504880,81037425,82592020,84168876 mov $1,$0 mov $0,1 mov $3,3 lpb $0,1 sub $0,1 add $1,3 lpe mov $0,6 pow $1,2 add $1,1 pow $1,2 add $2,1 mov $4,$3 add $4,$2 mul $0,$4 div $1,$0
ejercicios5/suma_impar_montana.adb
iyan22/AprendeAda
0
2906
<gh_stars>0 with Ada.Text_IO, Ada.Integer_Text_IO, es_impar_montana; use Ada.Text_IO, Ada.Integer_Text_IO; procedure Suma_Impar_Montana is n_entrante, acumulador : Integer; begin put("Tu programa dice:"); new_line; acumulador := 0; get(n_entrante); while n_entrante /= 0 loop -- 0 es el valor final de la entrada if es_impar_montana(n_entrante) = True then acumulador := acumulador + n_entrante; end if; get(n_entrante); end loop; put(acumulador, width=>0); put("------>"); if es_impar_montana(acumulador) = True then put("True"); else put("False"); end if; end Suma_impar_montana;
Sistemi e reti/Assembly/add.asm
Gabri3445/EquazioneSecondoGrado
0
17453
LDA #2 LDB #4 ADD STA 1337 LDB #6 ADD STA 1338 OUT HLT
8088/cga/cgakart/cgakart.asm
reenigne/reenigne
92
163595
<reponame>reenigne/reenigne org 0x100 cpu 8086 ; bp = scratch ; si = scratch ; es:di = VRAM pointer ; cx = xi ; dx = yi ; bl:al = xs ; bh:ah = ys ; ds = map (2 bytes per tile, tile number in bits 0..3 and 8..11 ; sp = 0xf0f0 ; ss = tile data (with gaps for stack) %macro rasterizeLine 0 %rep 80 add al,cl ; 2 0 2 adc bl,ch ; 2 0 2 add ah,dl ; 2 0 2 adc bh,dh ; 2 0 2 mov si,bx ; 2 0 2 mov si,[bx+si] ; 2 2 4 mov bp,ax ; 2 0 2 and bp,sp ; 2 0 2 add si,bp ; 2 0 2 ss movsb ; 2 2 4 24 IOs, 20 bytes %endrep %endmacro ; angle in BX (0..319) ; x position in DX ; y position in CX rasterize: ; TODO: initialize SS:SP ; TODO: intiialize dataSegment ; TODO: fix up jumps ; TODO: initialize mapSegment mov ax,0xb800 mov es,ax mov di,50*80 cmp bx,160 jge rasterize23 cmp bx,80 jge rasterize1 rasterize0: ; xs = r*sin(a) + xp ; ys = r*cos(a) = r*sin(80 - a) + yp ; xi = r*cos(a)/40 = r*sin(80 - a)/40 ; yi = r*sin(a)/40 ; xs -= 40*xi ; ys -= 40*yi mov [cs:.patchYPos+2],cx mov [cs:.patchXPos+2],dx add bx,bx mov bx,[bx+anglePointers] mov cx,50 .yLoop: push bx push cx mov si,[bx] ; si = sin(a) = xs .patchXPos: add si,9999 ; si = xs + xp mov dx,[bx+2] ; dx = sin(a)/40 = yi sub bx,100*80 + bigTable*2 neg bx ; bx = (100*79 - (bx - bigTable)) + bigTable mov bp,[bx] ; bp = cos(a) = ys .patchYPos: add bp,9999 ; bp = ys + yp mov cx,[bx+2] ; cx = cos(a)/40 = xi mov bx,cx add bx,bx mov ax,[bx+mul40table] ; ax = xi*40 neg ax add ax,si ; ax = -xi*40 + xs + xp mov bx,dx add bx,bx mov bx,[bx+mul40table] ; bx = yi*40 neg bx add bx,bp ; bx = -yi*40 + ys + yp xchg ah,bl mov ds,[mapSegment] rasterizeLine mov ds,[cs:dataSegment] pop bx add bx,4 pop cx loop .yLoop ret rasterize1: ; xs = r*sin(a) = r*sin(80 - (a - 80)) + xp ; ys = r*cos(a) = -r*sin(a - 80) + yp ; xi = r*cos(a)/40 = -r*sin(a - 80)/40 ; yi = r*sin(a)/40 = r*sin(80 - (a - 80)) ; xs -= 40*xi ; ys -= 40*yi mov [cs:.patchYPos+2],cx mov [cs:.patchXPos+2],dx add bx,bx mov bx,[bx+anglePointers - 80*2] mov cx,50 .yLoop: push bx push cx mov si,[bx] ; si = sin(a - 80) = -ys neg si ; si = ys .patchYPos: add si,9999 ; si = ys + yp mov dx,[bx+2] ; dx = sin(a - 80)/40 = -xi sub bx,100*80 + bigTable*2 neg bx mov bp,[bx] ; bp = sin(80 - (a - 80)) = xs .patchXPos: add bp,9999 ; bp = sin(80 - (a - 80)) + xp mov cx,[bx+2] ; cx = sin(80 - (a - 80))/40 = yi mov bx,dx neg dx ; dx = xi add bx,bx mov ax,[bx+mul40table] ; ax = (-xi)*40 add ax,bp ; ax = -xi*40 + xs + xp mov bx,cx add bx,bx mov bx,[bx+mul40table] ; bx = yi*40 neg bx add bx,si ; bx = -yi*40 + ys + yp xchg ah,bl mov ds,[mapSegment] rasterizeLine mov ds,[cs:dataSegment] pop bx add bx,4 pop cx loop .yLoop ret rasterize23: cmp bx,240 jge rasterize3 rasterize2: ; xs = r*sin(a) = -r*sin(a - 160) + xp ; ys = r*cos(a) = -r*sin(80 - (a - 160)) + yp ; xi = r*cos(a)/40 = -r*sin(80 - (a - 160)/40 ; yi = r*sin(a)/40 = -r*sin(a - 160) ; xs -= 40*xi ; ys -= 40*yi mov [cs:.patchYPos+2],cx mov [cs:.patchXPos+2],dx add bx,bx mov bx,[bx+anglePointers - 80*2*2] mov cx,50 .yLoop: push bx push cx mov si,[bx] neg si .patchXPos: add si,9999 mov dx,[bx+2] sub bx,100*80 + bigTable*2 neg bx mov bp,[bx] neg bp .patchYPos: add bp,9999 mov cx,[bx+2] mov bx,cx neg cx add bx,bx mov ax,[bx+mul40table] add ax,si mov bx,dx neg dx add bx,bx mov bx,[bx+mul40table] add bx,bp xchg ah,bl mov ds,[mapSegment] rasterizeLine mov ds,[cs:dataSegment] pop bx add bx,4 pop cx loop .yLoop ret rasterize3: ; xs = r*sin(a) = -r*sin(80 - (a - 240)) + xp ; ys = r*cos(a) = r*sin(a - 240) + yp ; xi = r*cos(a)/40 = r*sin(a - 240)/40 ; yi = r*sin(a)/40 = -r*sin(80 - (a - 240)) ; xs -= 40*xi ; ys -= 40*yi mov [cs:.patchYPos+2],cx mov [cs:.patchXPos+2],dx add bx,bx mov bx,[bx+anglePointers - 80*2*4] mov cx,50 .yLoop: push bx push cx mov si,[bx] .patchYPos: add si,9999 mov dx,[bx+2] sub bx,100*80 + bigTable*2 neg bx mov bp,[bx] neg bp .patchXPos: add bp,9999 mov cx,[bx+2] mov bx,dx add bx,bx mov ax,[bx+mul40table] neg ax add ax,bp mov bx,cx neg cx add bx,bx mov bx,[bx+mul40table] add bx,si xchg ah,bl mov ds,[mapSegment] rasterizeLine mov ds,[cs:dataSegment] pop bx add bx,4 pop cx loop .yLoop ret ; Tables needed: ; anglePointers - 1 word per angle, points to bigTable to avoid multiply (i*200+bigTable) ; bigTable ; For each a in 0..80 ; For each y position in 0..49 ; r*sin(a) - 2 bytes ; r*sin(a)/40 - 2 bytes ; mul40Table - 1 word per entry, enough to cover all the r*sin(a)/40 values dataSegment: dw 0 anglePointers: bigTable: mul40table: mapSegment:
iod/con2/ql/sprite/0.asm
olifink/smsqe
0
19888
; Default sprite 0 V0.0  1985 <NAME> ; section sprite ; xdef sp_arrow ; sp_arrow dc.w $0100,$0000 4 colour mode dc.w 14,7,0,0 14*7 pixel sprite origin at 0,0 dc.l s4p_arro-* dc.l s4m_arro-* dc.l s8_arrow-* ; s4p_arro dc.w %0000000000000000,%0000000000000000 dc.w %0011111100111111,%0000000000000000 dc.w %0011110000111100,%0000000000000000 dc.w %0011001100110011,%0000000000000000 dc.w %0000000000000000,%1100000011000000 dc.w %0000000000000000,%0010000000100000 dc.w %0000000000000000,%0000000000000000 s4m_arro dc.w %0011111100111111,%1100000011000000 dc.w %1111111111111111,%0000000000000000 dc.w %1111111111111111,%0000000000000000 dc.w %1111111111111111,%1100000011000000 dc.w %1100001111000011,%1111000011110000 dc.w %0000000000000000,%1111110011111100 dc.w %0000000000000000,%0011100000111000 s8_arrow dc.w $0101,$0000 8 colour mode dc.w 14,7,0,0 14*7 pixel sprite origin at 0,0 dc.l s8p_arro-* dc.l s8m_arro-* dc.l 0 ; s8p_arro dc.w %0000000000000000,%0000000000000000 dc.w %0010101000111111,%0000000000000000 dc.w %0010100000111100,%0000000000000000 dc.w %0010001000110011,%0000000000000000 dc.w %0000000000000000,%1000000011000000 dc.w %0000000000000000,%0010000000110000 dc.w %0000000000000000,%0000000000000000 s8m_arro dc.w %0011111100111111,%1100000011000000 dc.w %1111111111111111,%0000000000000000 dc.w %1111111111111111,%0000000000000000 dc.w %1111111111111111,%1100000011000000 dc.w %1100001111000011,%1111000011110000 dc.w %0000000000000000,%1111110011111100 dc.w %0000000000000000,%0011000000110000 ; ; Locked sprite V0.0  1985 <NAME> QJUMP ; xdef sp_lock sp_lock dc.w $0100,$0000 4 colour mode dc.w 13,11,6,6 13*12 pixel sprite origin at 6,6 dc.l s4p_lock-* dc.l s4m_lock-* dc.l s8_lock-* ; s4p_lock dc.w %0000000000000000,%0000000000000000 dc.w %0001111100011111,%1100000011000000 dc.w %0011000000110000,%0110000001100000 dc.w %0010000000100000,%0010000000100000 dc.w %0111111101111111,%1111000011110000 dc.w %0111110101111101,%1111000011110000 dc.w %0111100001111000,%1111000011110000 dc.w %0111110101111101,%1111000011110000 dc.w %0011110100111101,%1110000011100000 dc.w %0001111100011111,%1100000011000000 dc.w %0000000000000000,%0000000000000000 s4m_lock dc.w %0011111100111111,%1110000011100000 dc.w %0111111101111111,%1111000011110000 dc.w %0111111101111111,%1111000011110000 dc.w %1111111111111111,%1111100011111000 dc.w %1111111111111111,%1111100011111000 dc.w %1111111111111111,%1111100011111000 dc.w %1111111111111111,%1111100011111000 dc.w %1111111111111111,%1111100011111000 dc.w %1111111111111111,%1111100011111000 dc.w %0111111101111111,%1111000011110000 dc.w %0011111100111111,%1110000011100000 ; s8_lock dc.w $0101,$0000 8 colour mode dc.w 14,12,6,6 14*12 pixel sprite origin at 6,6 dc.l s8p_lock-* dc.l s8m_lock-* dc.l 0 ; s8p_lock dc.w %0000000000000000,%0000000000000000 bbb dc.w %0000001000000011,%0000000000000000 bbwbb dc.w %0000100000001100,%1000000011000000 bbw wbb dc.w %0010000000110000,%0010000000110000 bw wb dc.w %0010000000110000,%0010000000110000 bw wb dc.w %0010101000101010,%1010000010100000 byyyyyb dc.w %0010100000101000,%1010000010100000 byybyyb dc.w %0010100000101000,%1010000010100000 byybyyb dc.w %0010100000101000,%1010000010100000 byybyyb dc.w %0010101000101010,%1010000010100000 byyyyyb dc.w %0000101000001010,%1000000010000000 bbyyybb dc.w %0000000000000000,%0000000000000000 bbbbb ; s8m_lock dc.w %0000111100001111,%1100000011000000 dc.w %0011111100111111,%1111000011110000 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %0011111111001111,%1111000011110000 ; ; Null pointer v0.0 ; xdef sp_null sp_null dc.w $0100,$0000 4 colour mode dc.w 12,8,6,4 12x8 pixel sprite origin at 6,4 dc.l s4p_null-* dc.l s4m_null-* dc.l s8_null-* ; s4p_null dc.w %1111111111111111,%1111000011110000 dc.w %1100000011000000,%0011000000110000 dc.w %1100000011000000,%0011000000110000 dc.w %1100000011000000,%0011000000110000 dc.w %1100000011000000,%0011000000110000 dc.w %1100000011000000,%0011000000110000 dc.w %1100000011000000,%0011000000110000 dc.w %1111111111111111,%1111000011110000 ; s4m_null dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 ; s8_null dc.w $0101,$0000 8 colour mode dc.w 12,8,6,4 12x8 pixel sprite origin at 6,4 dc.l s8p_null-* dc.l s8m_null-* dc.l 0 ; s8p_null dc.w %1010101011111111,%1010000011110000 dc.w %1000000011000000,%0010000000110000 dc.w %1000000011000000,%0010000000110000 dc.w %1000000011000000,%0010000000110000 dc.w %1000000011000000,%0010000000110000 dc.w %1000000011000000,%0010000000110000 dc.w %1000000011000000,%0010000000110000 dc.w %1010101011111111,%1010000011110000 ; s8m_null dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 ; ; Wrong mode v0.0 ; xdef sp_mode,sp_mode4 ; sp_mode dc.w $0100,$0000 4 colour mode dc.w 12,9,6,4 12x9 pixel sprite origin at 6,4 dc.l s4p_mode-* dc.l s4m_mode-* dc.l s8_mode-* ; s4p_mode dc.w %1111111111111111,%1111000011110000 wwwwwwwwwwww dc.w %1100000011000000,%0011000000110000 ww........ww dc.w %1100011011000000,%0011000000110000 ww...gg...ww dc.w %1100100111000000,%0011000000110000 ww..g..g..ww dc.w %1100011011000000,%0011000000110000 ww...gg...ww dc.w %1100100111000000,%0011000000110000 ww..g..g..ww dc.w %1100011011000000,%0011000000110000 ww...gg...ww dc.w %1100000011000000,%0011000000110000 ww........ww dc.w %1111111111111111,%1111000011110000 wwwwwwwwwwww ; s4m_mode dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 sp_mode4 s8_mode dc.w $0101,$0000 8 colour mode dc.w 14,9,6,4 14x9 pixel sprite origin at 7,4 dc.l s8p_mode-* dc.l s8m_mode-* dc.l 0 ; s8p_mode dc.w %1010101011111111,%1010100011111100 wwwwwww dc.w %1000000011000000,%0000100000001100 w.....w dc.w %1000000011000000,%0000100011001100 w...m.w dc.w %1000000011000011,%0000100011001100 w..mm.w dc.w %1000000011001100,%0000100011001100 w.m.m.w dc.w %1000000011111111,%0000100011111100 wmmmmmw dc.w %1000000011000000,%0000100011001100 w...m.w dc.w %1000000011000000,%0000100000001100 w.....w dc.w %1010101011111111,%1010100011111100 wwwwwww ; s8m_mode dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 ; ; Keyboard input v0.0 ; xdef sp_key ; sp_key dc.w $0100,$0000 4 colour mode dc.w 14,9,6,4 14x9 pixel sprite origin at 7,4 dc.l s4p_key-* dc.l s4m_key-* dc.l s8_key-* ; s4p_key dc.w %1111111111111111,%1111110011111100 wwwwwwwwwwwwww dc.w %1100111111001111,%1100110011001100 ww..wwwwww..ww dc.w %1100111111001111,%0011110000111100 ww..wwww..wwww dc.w %1100110011001100,%1111110011111100 ww..ww..wwwwww dc.w %1100001111000011,%1111110011111100 ww....wwwwwwww dc.w %1100110011001100,%1111110011111100 ww..ww..wwwwww dc.w %1100111111001111,%0011110000111100 ww..wwww..wwww dc.w %1100111111001111,%1100110011001100 ww..wwwwww..ww dc.w %1111111111111111,%1111110011111100 wwwwwwwwwwwwww ; s4m_key dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 ; s8_key dc.w $0101,$0000 8 colour mode dc.w 14,9,6,4 14x9 pixel sprite origin at 7,4 dc.l s8p_key-* dc.l s8m_key-* dc.l 0 ; s8p_key dc.w %1010101011111111,%1010100011111100 wwwwwww dc.w %1000101011001111,%1000100011001100 w.www.w dc.w %1000101011001111,%0010100000111100 w.ww.ww dc.w %1000100011001100,%1010100011111100 w.w.www dc.w %1000001011000011,%1010100011111100 w..wwww dc.w %1000100011001100,%1010100011111100 w.w.www dc.w %1000101011001111,%0010100000111100 w.ww.ww dc.w %1000101011001111,%1000100011001100 w.www.w dc.w %1010101011111111,%1010100011111100 wwwwwww ; s8m_key dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 ; ; Busy sprite (no entry) ; xdef sp_busy ; sp_busy dc.w $0100,$0000 4 colour mode dc.w 14,12,6,5 14*12 pixel sprite origin at 6,5 dc.l s4p_busy-* dc.l s4m_busy-* dc.l s8_busy-* ; s4p_busy dc.w %0000000000000000,%0000000000000000 dc.w %0000000000000111,%0000000010000000 dc.w %0000000000011111,%0000000011100000 dc.w %0000000000111111,%0000000011110000 dc.w %0000000000111111,%0000000011110000 dc.w %0001111101111111,%1110000011111000 dc.w %0001111101111111,%1110000011111000 dc.w %0000000000111111,%0000000011110000 dc.w %0000000000111111,%0000000011110000 dc.w %0000000000011111,%0000000011100000 dc.w %0000000000000111,%0000000010000000 dc.w %0000000000000000,%0000000000000000 s4m_busy dc.w %0000111100001111,%1100000011000000 dc.w %0011111100111111,%1111000011110000 dc.w %0111111101111111,%1111100011111000 dc.w %0111111101111111,%1111100011111000 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %1111111111111111,%1111110011111100 dc.w %0111111101111111,%1111100011111000 dc.w %0111111101111111,%1111100011111000 dc.w %0011111100111111,%1111000011110000 dc.w %0000111100001111,%1100000011000000 ; s8_busy dc.w $0101,$0000 8 colour mode dc.w 16,12,7,5 16*12 pixel sprite origin at 7,5 dc.l s8p_busy-* dc.l s8m_busy-* dc.l 0 ; s8p_busy dc.w %0000000000000000,%0000000000000000 dc.w %0000000000000010,%0000000010000000 dc.w %0000000000001010,%0000000010100000 dc.w %0000000000101010,%0000000010101000 dc.w %0000000000101010,%0000000010101000 dc.w %0000101000101111,%1010000011111000 dc.w %0000101000101111,%1010000011111000 dc.w %0000000000101010,%0000000010101000 dc.w %0000000000101010,%0000000010101000 dc.w %0000000000001010,%0000000010100000 dc.w %0000000000000010,%0000000010000000 dc.w %0000000000000000,%0000000000000000 s8m_busy dc.w %0000111100001111,%1111000011110000 dc.w %0011111100111111,%1111110011111100 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %0011111100111111,%1111110011111100 dc.w %0000111100001111,%1111000011110000 ; ; Window Move sprite V0.0  1985 <NAME> QJUMP ; xdef sp_wmovep ; sp_wmovep dc.w $0100,$0000 4 colour mode dc.w 16,10,8,4 16*10 pixel sprite origin at 8,4 dc.l s4p_wmov-* dc.l s4m_wmov-* dc.l s8_wmove-* ; s4p_wmov dc.w %0000000000000000,%0000000000000000 ............ dc.w %0011111100111111,%1100000011000000 ..wwwwwwww.. dc.w %0011000000111111,%1100000011000000 ..wwrrrrww.. dc.w %0011000000111111,%1100000011000000 ..wwrrrrww...... dc.w %0011001100111111,%1111110011111100 ..wwrrwwwwwwww.. dc.w %0011111100111111,%1100110011111100 ..wwwwwwwwrrww.. dc.w %0000001100000011,%0000110011111100 ......wwrrrrww.. dc.w %0000001100000011,%0000110011111100 ..wwrrrrww.. dc.w %0000001100000011,%1111110011111100 ..wwwwwwww.. dc.w %0000000000000000,%0000000000000000 ............ s4m_wmov dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %0000111100001111,%1111111111111111 dc.w %0000111100001111,%1111111111111111 dc.w %0000111100001111,%1111111111111111 ; s8_wmove dc.w $0101,$0000 8 colour mode dc.w 16,10,8,4 16*10 pixel sprite origin at 8,4 dc.l s8p_wmov-* dc.l s8m_wmov-* dc.l 0 ; s8p_wmov dc.w %0000000000000000,%0000000000000000 ............ dc.w %0010101000111111,%1000000011000000 ..wwwwwwww.. dc.w %0010000000111010,%1000000011000000 ..wwrrrrww.. dc.w %0010000000111010,%1000000011000000 ..wwrrrrww...... dc.w %0010001000111011,%1010100011111100 ..wwrrwwwwwwww.. dc.w %0010101000111111,%1000100011101100 ..wwwwwwwwrrww.. dc.w %0000001000000011,%0000100010101100 ......wwrrrrww.. dc.w %0000001000000011,%0000100010101100 ..wwrrrrww.. dc.w %0000001000000011,%1010100011111100 ..wwwwwwww.. dc.w %0000000000000000,%0000000000000000 ............ s8m_wmov dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111000011110000 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %0000111100001111,%1111111111111111 dc.w %0000111100001111,%1111111111111111 dc.w %0000111100001111,%1111111111111111 ; ; Window Size sprite V0.0  1985 <NAME> QJUMP ; xdef sp_wsizep ; sp_wsizep dc.w $0100,$0000 4 colour mode dc.w 16,9,8,4 16*9 pixel sprite origin at 8,4 dc.l s4p_wsiz-* dc.l s4m_wsiz-* dc.l s8_wsize-* ; s4p_wsiz dc.w %0000000000000000,%0000000000000000 ................ dc.w %0011111100111111,%1111110011111100 ..wwwwwwwwwwww.. dc.w %0011000000111111,%0000110011111100 ..wwrrrrrrrrww.. dc.w %0011000000111111,%0000110011111100 ..wwrrrrrrrrww.. dc.w %0011001100111111,%1111110011111100 ..wwrrwwwwwwww.. dc.w %0011001100111111,%0000110011111100 ..wwrrwwrrrrww.. dc.w %0011001100111111,%0000110011111100 ..wwrrwwrrrrww.. dc.w %0011111100111111,%1111110011111100 ..wwwwwwwwwwww.. dc.w %0000000000000000,%0000000000000000 ................ s4m_wsiz dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 ; s8_wsize dc.w $0101,$0000 8 colour mode dc.w 16,9,8,4 16*9 pixel sprite origin at 8,4 dc.l s8p_wsiz-* dc.l s8m_wsiz-* dc.l 0 ; s8p_wsiz dc.w %0000000000000000,%0000000000000000 ................ dc.w %0010101000111111,%1010100011111100 ..wwwwwwwwwwww.. dc.w %0010000000111010,%0000100010101100 ..wwrrrrrrrrww.. dc.w %0010000000111010,%0000100010101100 ..wwrrrrrrrrww.. dc.w %0010001000111011,%1010100011111100 ..wwrrwwwwwwww.. dc.w %0010001000111011,%0000100010101100 ..wwrrwwrrrrww.. dc.w %0010001000111011,%0000100010101100 ..wwrrwwrrrrww.. dc.w %0010101000111111,%1010100011111100 ..wwwwwwwwwwww.. dc.w %0000000000000000,%0000000000000000 ................ s8m_wsiz dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 dc.w %1111111111111111,%1111111111111111 end
programs/oeis/286/A286717.asm
karttu/loda
1
21883
; A286717: a(n) is the number of zeros of the Chebyshev S(n, x) polynomial (A049310) in the open interval (-phi, +phi), with the golden section phi = (1 + sqrt(5))/2. ; 0,1,2,3,2,3,4,5,6,5,6,7,8,9,8,9,10,11,12,11,12,13,14,15,14,15,16,17,18,17,18,19,20,21,20,21,22,23,24,23,24,25,26,27,26,27,28,29,30,29,30,31,32,33,32,33,34,35,36,35,36,37,38,39,38,39,40,41,42,41,42,43,44,45,44,45,46,47,48,47,48,49,50,51,50,51,52,53,54,53,54,55,56,57,56,57,58,59,60,59,60,61,62,63,62,63,64,65,66,65,66,67,68,69,68,69,70,71,72,71,72,73,74,75,74,75,76,77,78,77,78,79,80,81,80,81,82,83,84,83,84,85,86,87,86,87,88,89,90,89,90,91,92,93,92,93,94,95,96,95,96,97,98,99,98,99,100,101,102,101,102,103,104,105,104,105,106,107,108,107,108,109,110,111,110,111,112,113,114,113,114,115,116,117,116,117,118,119,120,119,120,121,122,123,122,123,124,125,126,125,126,127,128,129,128,129,130,131,132,131,132,133,134,135,134,135,136,137,138,137,138,139,140,141,140,141,142,143,144,143,144,145,146,147,146,147,148,149,150,149 mov $1,1 add $1,$0 div $1,5 sub $0,$1 sub $0,$1 mov $1,$0