code stringlengths 1 2.01M | repo_name stringlengths 3 62 | path stringlengths 1 267 | language stringclasses 231
values | license stringclasses 13
values | size int64 1 2.01M |
|---|---|---|---|---|---|
package myservlet;
public class Credential {
private String username;
private String password;
public Credential(String username, String password){
this.username = username;
this.password = password;
}
public boolean IsCorrect()
{
if (username.equals("dummy") && password.equals("foobar"))
return true... | zyws-cloudcomputing | trunk/Auth/ServletHost/src/myservlet/Credential.java | Java | gpl2 | 412 |
package myservlet;
import javax.servlet.http.HttpServlet;
public class RegisterServlet extends HttpServlet{
}
| zyws-cloudcomputing | trunk/Auth/ServletHost/src/myservlet/RegisterServlet.java | Java | gpl2 | 113 |
package myservlet;
import java.io.*;
import javax.servlet.*;
import javax.servlet.http.*;
/* this is the Login Servlet */
public class LoginServlet extends HttpServlet{
/**
*
*/
private static final long serialVersionUID = 1L;
private String s = "/home/ec2-user/AwsCredentials.properties";
public void doPo... | zyws-cloudcomputing | trunk/Auth/ServletHost/src/myservlet/LoginServlet.java | Java | gpl2 | 1,070 |
package testclient;
import java.io.BufferedReader;
import java.io.IOException;
import java.io.InputStreamReader;
import java.io.OutputStreamWriter;
import java.io.UnsupportedEncodingException;
import java.net.MalformedURLException;
import java.net.URL;
import java.net.URLConnection;
import java.net.URLEncoder;
/* OK,... | zyws-cloudcomputing | trunk/Auth/ServletClient/src/testclient/TClient.java | Java | gpl2 | 1,469 |
package testclient;
public class CLogin {
String CredentialPath = "/home/AwsCredential.properties";
public CLogin(String username, String password)
{
}
}
| zyws-cloudcomputing | trunk/Auth/ServletClient/src/testclient/CLogin.java | Java | gpl2 | 162 |
# makefile pro preklad LaTeX verze Bc. prace
# (c) 2008 Michal Bidlo
# E-mail: bidlom AT fit vutbr cz
#===========================================
# asi budete chtit prejmenovat:
CO=projekt
all: $(CO).pdf
pdf: $(CO).pdf
$(CO).ps: $(CO).dvi
dvips $(CO)
$(CO).pdf: clean
pdflatex -quiet $(CO)
bibtex $(CO)
pdflatex... | zx-simi | trunk/DP/Makefile | Makefile | oos | 734 |
library IEEE;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity KEYBOARD is
port (
CLK : in std_logic;
RESET : in std_logic;
-- rozhrani pro komunikaci s procesorem
ADDR : in std_logic_vector(15 downto 0);
DATA_OUT : out std_logic_vect... | zx-simi | trunk/fpga/keyboard.vhd | VHDL | oos | 7,843 |
-- fpga_config.vhd: user constants
use work.clkgen_cfg.all;
package fpga_cfg is
constant DCM_FREQUENCY : dcm_freq := DCM_50MHz;
end fpga_cfg;
package body fpga_cfg is
end fpga_cfg;
| zx-simi | trunk/fpga/config.vhd | VHDL | oos | 186 |
library IEEE;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
use work.vga_controller_cfg.all;
entity GPU is
port (
CLK : in std_logic;
RESET : in std_logic;
-- okraj (BORDER)
BORDER_IN : in std_logic_vector... | zx-simi | trunk/fpga/gpu.vhd | VHDL | oos | 14,882 |
library IEEE;
Library UNISIM;
use UNISIM.vcomponents.all;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity cpu_wrapper is
port (
RESET : in std_logic;
CLK : in std_logic;
ADDR : out std_logic_vec... | zx-simi | trunk/fpga/cpu_wrapper.vhd | VHDL | oos | 2,822 |
library IEEE;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity SMDMA is
port(
RESET : in std_logic;
CLK : in std_logic;
--signaly pro komunikaci s procesorem
CPU_RD : in std_logic;
CPU_WR ... | zx-simi | trunk/fpga/smdma.vhd | VHDL | oos | 10,639 |
//
// Xilinx VHDL ROM generator
//
// Version : 0244
//
// Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
//
// All rights reserved
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// Redistributions ... | zx-simi | trunk/fpga/t80/trunk/sw/xrom.cpp | C++ | oos | 11,288 |
//
// Binary and intel/motorola hex to VHDL ROM converter
//
// Version : 0244
//
// Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
//
// All rights reserved
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are m... | zx-simi | trunk/fpga/t80/trunk/sw/hex2rom.cpp | C++ | oos | 22,100 |
set name=t80
rem set target=xc2v250-cs144-6
rem set target=xcv300e-pq240-8
set target=xc2s200-pq208-5
if "%2" == "" goto default
set target=%2
:default
cd ..\out
if "%1" == "" goto xst
set name=t80_leo
copy ..\bin\t80_leo.pin %name%.ucf
ngdbuild -p %target% %1 %name%.ngd
goto builddone
:xst
copy ..\bin\%name%.... | zx-simi | trunk/fpga/t80/trunk/syn/xilinx/run/t80.bat | Batchfile | oos | 719 |
cd ..\out
hex2rom ..\..\..\sw\monitor.hex MonZ80 11b8s > ..\src\MonZ80_leo.vhd
spectrum -file ..\bin\t80debug.tcl
move exemplar.log ..\log\t80debug_leo.srp
cd ..\run
t80debug t80debug_leo.edf xc2s200-pq208-5
| zx-simi | trunk/fpga/t80/trunk/syn/xilinx/run/t80debug_leo.bat | Batchfile | oos | 212 |
cd ..\out
hex2rom ..\..\..\sw\monitorxr.hex MonZ80 11b8s > ..\src\MonZ80_leo.vhd
spectrum -file ..\bin\t80debugxr.tcl
move exemplar.log ..\log\t80debugxr_leo.srp
cd ..\run
t80debugxr t80debugxr_leo.edf xc2s200-pq208-5
| zx-simi | trunk/fpga/t80/trunk/syn/xilinx/run/t80debugxr_leo.bat | Batchfile | oos | 222 |
set name=t80debug
rem set target=xc2v250-cs144-6
rem set target=xcv300e-pq240-8
set target=xc2s200-pq208-5
if "%2" == "" goto default
set target=%2
:default
cd ..\out
if "%1" == "" goto xst
set name=t80debug_leo
copy ..\bin\t80debug.pin %name%.ucf
ngdbuild -p %target% %1 %name%.ngd
goto builddone
:xst
xrom Mon... | zx-simi | trunk/fpga/t80/trunk/syn/xilinx/run/t80debug.bat | Batchfile | oos | 859 |
set name=t80debugxr
rem set target=xc2v250-cs144-6
rem set target=xcv300e-pq240-8
set target=xc2s200-pq208-5
if "%2" == "" goto default
set target=%2
:default
cd ..\out
if "%1" == "" goto xst
set name=t80debugxr_leo
copy ..\bin\t80debugxr_leo.pin %name%.ucf
ngdbuild -p %target% %1 %name%.ngd
goto builddone
:xst... | zx-simi | trunk/fpga/t80/trunk/syn/xilinx/run/t80debugxr.bat | Batchfile | oos | 871 |
cd ..\out
spectrum -file ..\bin\t80.tcl
move exemplar.log ..\log\t80_leo.srp
cd ..\run
t80 t80_leo.edf xc2s200-pq208-5
| zx-simi | trunk/fpga/t80/trunk/syn/xilinx/run/t80_leo.bat | Batchfile | oos | 122 |
--
-- File I/O test-bench utilities
--
-- Version : 0146
--
-- Copyright (c) 2001 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- ... | zx-simi | trunk/fpga/t80/trunk/bench/vhdl/StimLog.vhd | VHDL | oos | 4,034 |
--
-- Simple SRAM model without timing
--
-- Version : 0247
--
-- Copyright (c) 2001 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Redistrib... | zx-simi | trunk/fpga/t80/trunk/bench/vhdl/SRAM.vhd | VHDL | oos | 2,957 |
library IEEE;
use IEEE.std_logic_1164.all;
use work.StimLog.all;
entity TestBench is
end entity TestBench;
architecture behaviour of TestBench is
signal M1_n : std_logic;
signal MREQ_n : std_logic;
signal IORQ_n : std_logic;
signal RD_n : std_logic;
signal WR_n : std_logic;
signal RFSH_n : std_logic;
... | zx-simi | trunk/fpga/t80/trunk/bench/vhdl/TestBench.vhd | VHDL | oos | 2,772 |
library IEEE;
use IEEE.std_logic_1164.all;
use work.StimLog.all;
entity DebugSystem_TB is
end entity DebugSystem_TB;
architecture behaviour of DebugSystem_TB is
signal Reset_n : std_logic;
signal Clk : std_logic := '0';
signal NMI_n : std_logic := '1';
signal TXD0 : std_logic;
signal RTS0 : std_logic;
... | zx-simi | trunk/fpga/t80/trunk/bench/vhdl/DebugSystem_TB.vhd | VHDL | oos | 1,710 |
--
-- Asynchronous serial generator with input from binary file
--
-- Version : 0146
--
-- Copyright (c) 2001 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following ... | zx-simi | trunk/fpga/t80/trunk/bench/vhdl/AsyncStim.vhd | VHDL | oos | 3,757 |
--
-- Asynchronous serial input with binary file log
--
-- Version : 0146
--
-- Copyright (c) 2001 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions ... | zx-simi | trunk/fpga/t80/trunk/bench/vhdl/AsyncLog.vhd | VHDL | oos | 4,081 |
--
-- 16450 compatible UART with synchronous bus interface
-- RClk/BaudOut is XIn enable instead of actual clock
--
-- Version : 0249b
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, ar... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T16450.vhd | VHDL | oos | 13,027 |
--
-- Z80 compatible microprocessor core
--
-- Version : 0242
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Re... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80_MCode.vhd | VHDL | oos | 50,680 |
--
-- Z80 compatible microprocessor core
--
-- Version : 0242
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Re... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80_Pack.vhd | VHDL | oos | 6,709 |
--
-- Z80 compatible microprocessor core, asynchronous top level
--
-- Version : 0247
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following cond... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80a.vhd | VHDL | oos | 6,560 |
--
-- Inferrable Synchronous SRAM for Leonardo synthesis, no write through!
--
-- Version : 0236
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the followin... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/SSRAM2.vhd | VHDL | oos | 3,034 |
--
-- T80 Registers for Xilinx Select RAM
--
-- Version : 0244
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Redist... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80_RegX.vhd | VHDL | oos | 4,443 |
--
-- Inferrable Synchronous SRAM for XST synthesis
--
-- Version : 0220
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/SSRAM.vhd | VHDL | oos | 3,030 |
--
-- T80 Registers, technology independent
--
-- Version : 0244
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Redi... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80_Reg.vhd | VHDL | oos | 3,474 |
-- Z80, Monitor ROM, 4k RAM and two 16450 UARTs
-- that can be synthesized and used with
-- the NoICE debugger that can be found at
-- http://www.noicedebugger.com/
library IEEE;
use IEEE.std_logic_1164.all;
entity DebugSystem is
port(
Reset_n : in std_logic;
Clk : in std_logic;
NMI_n : in std_logic;
RXD... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/DebugSystem.vhd | VHDL | oos | 3,942 |
--
-- Z80 compatible microprocessor core
--
-- Version : 0247
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Re... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80_ALU.vhd | VHDL | oos | 10,637 |
--
-- Xilinx Block RAM, 8 bit wide and variable size (Min. 512 bytes)
--
-- Version : 0247
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following cond... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/SSRAMX.vhd | VHDL | oos | 3,858 |
-- Z80, Monitor ROM, external SRAM interface and two 16450 UARTs
-- that can be synthesized and used with
-- the NoICE debugger that can be found at
-- http://www.noicedebugger.com/
library IEEE;
use IEEE.std_logic_1164.all;
entity DebugSystemXR is
port(
Reset_n : in std_logic;
Clk : in std_logic;
NMI_n : ... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/DebugSystemXR.vhd | VHDL | oos | 4,171 |
--
-- Z80 compatible microprocessor core
--
-- Version : 0247
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- Re... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80.vhd | VHDL | oos | 28,911 |
--
-- Z80 compatible microprocessor core, synchronous top level
-- Different timing than the original z80
-- Inputs needs to be synchronous and outputs may glitch
--
-- Version : 0242
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use in source and ... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80s.vhd | VHDL | oos | 5,249 |
--
-- 8080 compatible microprocessor core, synchronous top level with clock enable
-- Different timing than the original 8080
-- Inputs needs to be synchronous and outputs may glitch
--
-- Version : 0242
--
-- Copyright (c) 2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and use... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T8080se.vhd | VHDL | oos | 5,549 |
--
-- Z80 compatible microprocessor core, synchronous top level with clock enable
-- Different timing than the original z80
-- Inputs needs to be synchronous and outputs may glitch
--
-- Version : 0242
--
-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
--
-- All rights reserved
--
-- Redistribution and ... | zx-simi | trunk/fpga/t80/trunk/rtl/vhdl/T80se.vhd | VHDL | oos | 5,202 |
library IEEE;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity SPEAKER is
port (
CLK : in std_logic;
-- vstup z procesoru
ADDR : in std_logic_vector(15 downto 0);
DATA_IN : in std_logic_vector(7 downto 0);
WR : in std_logic;
... | zx-simi | trunk/fpga/speaker.vhd | VHDL | oos | 631 |
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity spi is
port (
RESET : in std_logic;
CLK : in std_logic;
-- vstup/vystup
DATA_IN : in std_logic_vector(7 downto 0);
DATA_OUT : out std_logic_ve... | zx-simi | trunk/fpga/spi.vhd | VHDL | oos | 3,503 |
-- sdram.vhd: SDRAM base controller
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Ladislav Capka <xcapka01 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are ... | zx-simi | trunk/fpga/FITkit/sdram_raw_ctrl.vhd | VHDL | oos | 23,605 |
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ / Vendor: Xilinx
-- \ \ \/ Version : ... | zx-simi | trunk/fpga/FITkit/clkgen.vhd | VHDL | oos | 4,577 |
-- sdram_config.vhd: SDRAM constants & definitions
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Ladislav Capka <xcapka01 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- mod... | zx-simi | trunk/fpga/FITkit/sdram_config.vhd | VHDL | oos | 2,333 |
-- ps2full_ctrl.vhd: PS/2 Controller
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Zdenek Vasicek <xvasic11 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modification, a... | zx-simi | trunk/fpga/FITkit/ps2full_ctrl.vhd | VHDL | oos | 9,786 |
-- ps2half_ctrl.vhd: Simple PS/2 Controller (readonly version)
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Zdenek Vasicek <xvasic11 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or ... | zx-simi | trunk/fpga/FITkit/ps2half_ctrl.vhd | VHDL | oos | 6,149 |
-- arch_pc_ifc: PC interface architecture
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Zdenek Vasicek <vasicek AT fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modificati... | zx-simi | trunk/fpga/FITkit/fpga.vhd | VHDL | oos | 5,510 |
-- clkgen_config.vhd: DCM constants & definitions
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Ladislav Capka <xcapka01 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modi... | zx-simi | trunk/fpga/FITkit/clkgen_config.vhd | VHDL | oos | 3,472 |
-- vga_ctrl.vhd: VGA base controller
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Ladislav Capka <xcapka01 AT @stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modification, ar... | zx-simi | trunk/fpga/FITkit/vga_ctrl.vhd | VHDL | oos | 12,669 |
-- vga_config.vhd: VGA constants & definitions
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Ladislav Capka <xcapka01 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modific... | zx-simi | trunk/fpga/FITkit/vga_config.vhd | VHDL | oos | 6,214 |
-- ps2_entity.vhd: PS/2 Controller entity
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Zdenek Vasicek <xvasic11 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modificati... | zx-simi | trunk/fpga/FITkit/ps2_entity.vhd | VHDL | oos | 2,668 |
-- trilobot_entity.vhd: Trilobot driver entity
-- Copyright (C) 2009 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Michal Růžek <xruzek01 AT stud.fit.vutbr.cz>
--
-- LICENSE TERMS
--
-- Redistribution and use in source and binary forms, with or without
-- modific... | zx-simi | trunk/fpga/sdcard.vhd | VHDL | oos | 21,718 |
library IEEE;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity MOUSE is
port (
CLK : in std_logic;
RESET : in std_logic;
-- komunikace s procesorem
ADDR : in std_logic_vector(15... | zx-simi | trunk/fpga/mouse.vhd | VHDL | oos | 7,081 |
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 20:31:46 11/29/2013
-- Design Name:
-- Module Name: D:/fuck/fpga/cpu_wrapper_tb.vhd
-- Project Name: Xilinx
-- Target Device:
-- Tool versions:
-- Description:
--
-- ... | zx-simi | trunk/fpga/testbench/cpu_wrapper_tb.vhd | VHDL | oos | 6,326 |
library IEEE;
Library UNISIM;
use UNISIM.vcomponents.all;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity cpu_wrapper_clk is
port (
RESET : in std_logic;
CLK : in std_logic;
CLK_CPU : in std_logic;
ADD... | zx-simi | trunk/fpga/cpu_wrapper_clk.vhd | VHDL | oos | 5,026 |
library IEEE;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_ARITH.ALL;
use ieee.std_logic_UNSIGNED.ALL;
entity KEMPSTON_JOYSTICK is
port (
CLK : in std_logic;
RESET : in std_logic;
-- rozhrani pro komunikaci s procesorem
ADDR : in std_logic_vector(15 downto 0);
DATA_OUT : out st... | zx-simi | trunk/fpga/kempston_joystick.vhd | VHDL | oos | 828 |
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity sdcard_spi is
port (
RESET : in std_logic;
CLK : in std_logic;
-- Datova a adresova sbernice
DATA_IN : in std_logic_vector(7 downto 0);
... | zx-simi | trunk/fpga/old/sdcard_spi.vhd | VHDL | oos | 5,000 |
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 12:56:40 02/19/2012
-- Design Name:
-- Module Name: D:/ZX Simi/fpga/flash_tb.vhd
-- Project Name: Xilinx
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHD... | zx-simi | trunk/fpga/old/flash_tb.vhd | VHDL | oos | 2,693 |
#include <stdio.h>
#include <stdlib.h>
#include <graphics.h>
#include <spectrum.h>
#include "textgui.h"
unsigned char imgTitleTriangle[8] = {0xFF, 0xFE, 0xFC, 0xF8, 0xF0, 0xE0, 0xC0, 0x80};
/*
unsigned char imgError0[8] = {0x03, 0x0F, 0x1F, 0x37, 0x63, 0x71, 0xF8, 0xFC};
unsigned char imgError1[8] = {0xC0, 0xF0... | zx-simi | trunk/zx_simi_os/textgui.c | C | oos | 3,349 |
/* ========================================================================== */
/* */
/* fat32.h */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/fat32.h | C | oos | 1,968 |
#include "error.h"
#include "filesystem.h"
extern errc loadFileRom(tFileSystemDirEntry *dir);
extern errc loadFileRunRom(tFileSystemDirEntry *dir);
| zx-simi | trunk/zx_simi_os/file_rom.h | C | oos | 156 |
#include "error.h"
#include "filesystem.h"
extern errc loadFileSna(tFileSystemDirEntry *dir);
| zx-simi | trunk/zx_simi_os/file_sna.h | C | oos | 99 |
/* ========================================================================== */
/* */
/* filesystem.h */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/filesystem.h | C | oos | 1,785 |
#include <stdio.h>
#include <spectrum.h>
#include <string.h>
#include <stdlib.h>
#include <graphics.h>
#include "keyboard.h"
#include "error.h"
#include "filesystem.h"
#include "sdcard.h"
#include "textgui.h"
#include "dma.h"
#include "file_z80.h"
#include "file_sna.h"
#include "file_tap.h"
#include "file_tzx.h"
#inclu... | zx-simi | trunk/zx_simi_os/zxsimi.c | C | oos | 9,563 |
#include <stdlib.h>
#include "dma.h"
void dmaSetDestAddr(unsigned long addr) {
outp(DMA_DEST_ADDR0,(addr ) & 0xFF); //nejnizsi bajt adresy
outp(DMA_DEST_ADDR1,(addr >> 8) & 0xFF); //prostredni bajt adresy
outp(DMA_DEST_ADDR2,(addr >> 16) & 0xFF); //nejvyssi bajt adresy
}
void dmaSetSrcAd... | zx-simi | trunk/zx_simi_os/dma.c | C | oos | 1,173 |
#define TASK_RAM_BASE_ADDR 0x40000
#define TASK_ROM0 (0x20000)
#define TASK_RAM0 (TASK_RAM_BASE_ADDR)
#define TASK_RAM2 (TASK_RAM_BASE_ADDR + 0x8000)
#define TASK_RAM5 (TASK_RAM_BASE_ADDR + 0x14000)
extern unsigned char taskSetA(unsigned char *pole, unsigned char byte);
extern unsigned char taskSetB(unsig... | zx-simi | trunk/zx_simi_os/task.h | C | oos | 1,972 |
/* ========================================================================== */
/* */
/* keyboard.h */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/keyboard.h | C | oos | 953 |
#include "error.h"
#include "filesystem.h"
extern errc tzxLoadFile(tFileSystemDirEntry *dir);
| zx-simi | trunk/zx_simi_os/file_tzx.h | C | oos | 99 |
/* ========================================================================== */
/* */
/* sdcard.h */
/* (c) 2001 Petr Simon ... | zx-simi | trunk/zx_simi_os/sdcard.h | C | oos | 1,257 |
#include <stdlib.h>
#include "textgui.h"
#include "error.h"
#include "filesystem.h"
#include "dma.h"
#include "task.h"
#include "file_rom.h"
errc loadFileRom(tFileSystemDirEntry *dir)
{
unsigned long size, pocet,zdroj,targetAddr;
unsigned char data[512];
unsigned int memInd, sector;
errc... | zx-simi | trunk/zx_simi_os/file_rom.c | C | oos | 1,445 |
#include <stdlib.h>
//bazova adresa DMA radice
#define TASK_BASE_ADDR 0x1F
//registr pro ulozeni cilove adresy (kam se bude ukladat)
#define TASK_ADDR0 (0x0000 + TASK_BASE_ADDR)
#define TASK_ADDR1 (0x0100 + TASK_BASE_ADDR)
#define TASK_7FFD (0x0200 + TASK_BASE_ADDR)
#define TASK_CMD (0x0400 + TASK_BASE_AD... | zx-simi | trunk/zx_simi_os/task.c | C | oos | 4,462 |
#include "error.h"
#include "filesystem.h"
extern errc loadFileZ80(tFileSystemDirEntry *dir);
| zx-simi | trunk/zx_simi_os/file_z80.h | C | oos | 99 |
//bazova adresa DMA radice
#define DMA_BASE_ADDR 0xF3
//registr pro ulozeni cilove adresy (kam se bude ukladat)
#define DMA_DEST_ADDR0 (0x0000 + DMA_BASE_ADDR)
#define DMA_DEST_ADDR1 (0x0100 + DMA_BASE_ADDR)
#define DMA_DEST_ADDR2 (0x0200 + DMA_BASE_ADDR)
//registr pro odeslani jednoho bajtu
#define DMA_SEND... | zx-simi | trunk/zx_simi_os/dma.h | C | oos | 1,783 |
/* ========================================================================== */
/* */
/* error.h */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/error.h | C | oos | 1,447 |
/* ========================================================================== */
/* */
/* fat32.c */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/fat32.c | C | oos | 12,178 |
/* ========================================================================== */
/* */
/* sdcard.c */
/* (c) 2001 Petr Simon ... | zx-simi | trunk/zx_simi_os/sdcard.c | C | oos | 2,650 |
/* ========================================================================== */
/* */
/* filesystem.c */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/filesystem.c | C | oos | 3,028 |
del *.ROM *.o *.BIN *.TAP
zcc -vn -Wall -c textgui.c
zcc -vn -Wall -c dma.c
zcc -vn -Wall -c sdcard.c
zcc -vn -Wall -c fat32.c
zcc -vn -Wall -c filesystem.c
zcc -vn -Wall -c task.c
zcc -vn -Wall -c keyboard.c
zcc -vn -Wall -c file_z80.c
zcc -vn -Wall -c file_sna.c
zcc -vn -Wall -c file_rom.c
zcc -vn -Wall ... | zx-simi | trunk/zx_simi_os/make.bat | Batchfile | oos | 532 |
#ifndef _TEXTGUI_H_
#define _TEXTGUI_H_
/*
extern unsigned char imgError0[8];
extern unsigned char imgError1[8];
extern unsigned char imgError2[8];
extern unsigned char imgError3[8];
extern unsigned char imgWarning0[8];
extern unsigned char imgWarning1[8];
extern unsigned char imgWarning2[8];
extern unsigned ... | zx-simi | trunk/zx_simi_os/textgui.h | C | oos | 1,129 |
#include <stdlib.h>
#include <stdio.h>
#include "error.h"
#include "filesystem.h"
#include "dma.h"
#include "task.h"
#include "file_sna.h"
#define SNA_HW48K 0
#define SNA_HW128K 1
errc loadFileSna(tFileSystemDirEntry *dir)
{
unsigned long addr, sector, targetAddr;
unsigned char data[512];
u... | zx-simi | trunk/zx_simi_os/file_sna.c | C | oos | 5,816 |
#include "error.h"
#include "filesystem.h"
extern errc tapLoadFile(tFileSystemDirEntry *dir);
| zx-simi | trunk/zx_simi_os/file_tap.h | C | oos | 99 |
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include "textgui.h"
#include "error.h"
#include "filesystem.h"
#include "dma.h"
#include "task.h"
#include "file_tzx.h"
//stavy konecneho automatu, ktery pracovava TZX soubor
typedef enum {
TZX_HEADER = 0,
TZX_DATA_BLOCK,
TZX_ID_10,
... | zx-simi | trunk/zx_simi_os/file_tzx.c | C | oos | 9,460 |
#include <stdlib.h>
#include <stdio.h>
#include "filesystem.h"
#include "dma.h"
#include "task.h"
#include "file_z80.h"
#include "error.h"
#define Z80_HW48K 0
#define Z80_HW128K 1
void z80storeByte(unsigned long *targetAddr, unsigned int *dest, unsigned char data)
{
//vyberu spravnou banku
if (*... | zx-simi | trunk/zx_simi_os/file_z80.c | C | oos | 10,919 |
#include <stdlib.h>
#include <stdio.h>
#include "textgui.h"
#include "error.h"
#include "filesystem.h"
#include "dma.h"
#include "task.h"
#include "file_tap.h"
errc tapLoadFile(tFileSystemDirEntry *dir)
{
unsigned long addr, targetAddr;
unsigned char pole[3];
unsigned char *ind;
unsigne... | zx-simi | trunk/zx_simi_os/file_tap.c | C | oos | 2,234 |
/* ========================================================================== */
/* */
/* keyboard.c */
/* (c) 2011 Petr Simon ... | zx-simi | trunk/zx_simi_os/keyboard.c | C | oos | 1,390 |
del *.bin *.exe
rem -------------------------------------------------
rem preklad TAP exporteru
gcc tap_extractor.c -o tap_extractor.exe
rem -------------------------------------------------
rem Exrakce souboru TAP s operacnim systemem ZX Simi
tap_extractor.exe ..\zx_simi_os\a.tap tmp.bin
rem ---------... | zx-simi | trunk/flash/run.bat | Batchfile | oos | 583 |
#include <stdio.h>
int main(int argc, char * argv[])
{
FILE * pFile, *oFile;
int c,length,i;
if (argc != 3) return 1;
pFile = fopen (argv[1], "rb");
if (pFile == NULL) perror ("Error opening file");
oFile = fopen (argv[2], "wb");
if (oFile == NULL) perror ("Error opening output fi... | zx-simi | trunk/flash/tap_extractor.c | C | oos | 732 |
<?php
/**
* Loads the WordPress environment and template.
*
* @package WordPress
*/
if ( !isset($wp_did_header) ) {
$wp_did_header = true;
require_once( dirname(__FILE__) . '/wp-load.php' );
wp();
require_once( ABSPATH . WPINC . '/template-loader.php' );
}
| zyblog | trunk/zyblog/wp-blog-header.php | PHP | asf20 | 271 |
<?php
/**
* Handle Trackbacks and Pingbacks sent to WordPress
*
* @package WordPress
*/
if (empty($wp)) {
require_once('./wp-load.php');
wp( array( 'tb' => '1' ) );
}
/**
* trackback_response() - Respond with error or success XML message
*
* @param int|bool $error Whether there was an error
* @param string ... | zyblog | trunk/zyblog/wp-trackback.php | PHP | asf20 | 3,700 |
<?php
/**
* BackPress Scripts enqueue.
*
* These classes were refactored from the WordPress WP_Scripts and WordPress
* script enqueue API.
*
* @package BackPress
* @since r74
*/
/**
* BackPress enqueued dependiences class.
*
* @package BackPress
* @uses _WP_Dependency
* @since r74
*/
class WP_Dependencie... | zyblog | trunk/zyblog/wp-includes/class.wp-dependencies.php | PHP | asf20 | 6,779 |
<?php
/**
* Sets up the default filters and actions for Multisite.
*
* If you need to remove a default hook, this file will give you the priority
* for which to use to remove the hook.
*
* Not all of the Multisite default hooks are found in ms-default-filters.php
*
* @package WordPress
* @subpackage Multisite
... | zyblog | trunk/zyblog/wp-includes/ms-default-filters.php | PHP | asf20 | 2,694 |
<?php
/*~ class.phpmailer.php
.---------------------------------------------------------------------------.
| Software: PHPMailer - PHP email class |
| Version: 5.2.1 |
| Site: https://code.google.com/a/apache-extras.org... | zyblog | trunk/zyblog/wp-includes/class-phpmailer.php | PHP | asf20 | 81,728 |
<?php
/**
* The plugin API is located in this file, which allows for creating actions
* and filters and hooking functions, and methods. The functions or methods will
* then be run when the action or filter is called.
*
* The API callback examples reference functions, but can be methods of classes.
* To hook metho... | zyblog | trunk/zyblog/wp-includes/plugin.php | PHP | asf20 | 27,592 |
<?php
/**
* Category Template Tags and API.
*
* @package WordPress
* @subpackage Template
*/
/**
* Retrieve category link URL.
*
* @since 1.0.0
* @see get_term_link()
*
* @param int|object $category Category ID or object.
* @return string Link on success, empty string if category does not exist.
*/
functi... | zyblog | trunk/zyblog/wp-includes/category-template.php | PHP | asf20 | 37,741 |
<?php
/**
* Main WordPress Formatting API.
*
* Handles many functions for formatting output.
*
* @package WordPress
**/
/**
* Replaces common plain text characters into formatted entities
*
* As an example,
* <code>
* 'cause today's effort makes it worth tomorrow's "holiday"...
* </code>
* Becomes:
* <co... | zyblog | trunk/zyblog/wp-includes/formatting.php | PHP | asf20 | 109,954 |
<?php
/**
* Admin Bar
*
* This code handles the building and rendering of the press bar.
*/
/**
* Instantiate the admin bar object and set it up as a global for access elsewhere.
*
* To hide the admin bar, you're looking in the wrong place. Unhooking this function will not
* properly remove the admin bar. For ... | zyblog | trunk/zyblog/wp-includes/admin-bar.php | PHP | asf20 | 21,604 |
<?php
if ( !class_exists('SimplePie') )
require_once (ABSPATH . WPINC . '/class-simplepie.php');
class WP_Feed_Cache extends SimplePie_Cache {
/**
* Create a new SimplePie_Cache object
*
* @static
* @access public
*/
function create($location, $filename, $extension) {
return new WP_Feed_Cache_Transient... | zyblog | trunk/zyblog/wp-includes/class-feed.php | PHP | asf20 | 3,684 |
<?php
/**
* WP_HTTP_IXR_Client
*
* @package WordPress
* @since 3.1.0
*
*/
class WP_HTTP_IXR_Client extends IXR_Client {
function __construct($server, $path = false, $port = false, $timeout = 15) {
if ( ! $path ) {
// Assume we have been given a URL instead
$bits = parse_url($server);
$this->scheme = ... | zyblog | trunk/zyblog/wp-includes/class-wp-http-ixr-client.php | PHP | asf20 | 2,663 |