id stringlengths 22 129 | text stringlengths 60 19.5k | arch stringclasses 9
values | syntax stringclasses 5
values | kind stringclasses 4
values | repo stringclasses 32
values | path stringlengths 7 108 | license stringclasses 10
values | commit stringlengths 40 40 | source_host stringclasses 1
value | category stringclasses 15
values | source_url stringlengths 85 192 | line_start int64 1 5.48k | line_end int64 4 5.5k |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:2 | #ifdef MEMCPY_NEON
.fpu neon
.arch armv7-a
# define FRAME_SIZE 4
# define USE_VFP
# define USE_NEON
#elif defined (MEMCPY_VFP)
.arch armv6
.fpu vfpv2
# define FRAME_SIZE 32
# define USE_VFP
#else
.arch armv6
# define FRAME_SIZE 32
#endif
#define ALIGN(addr, align) addr:align
#define INSN_SIZE 4
/* Call ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 41 | 100 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:3 | process of doing a computed jump to the tail containing the
appropriate number of steps.
In dispatch_7_dword, dispatch_step is invoked seven times, with an
argument that is 7 for the first and 1 for the last. Units are
double-words (8 bytes). TMP1 is at most 56.
In dispatch_15_word, dispatch_step is ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 81 | 140 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:4 | dispatch_step 6
dispatch_step 5
dispatch_step 4
dispatch_step 3
dispatch_step 2
dispatch_step 1
.purgem dispatch_step
.endm
#else
# if ARM_BX_ALIGN_LOG2 < 3
# error case not handled
# endif
.macro dispatch_helper steps, log2_bytes_per_step
/* TMP1 gets (max_bytes - bytes_to_copy), where max_bytes is
(STEP... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 121 | 180 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:5 | dispatch_step 4
.p2align ARM_BX_ALIGN_LOG2
dispatch_step 3
.p2align ARM_BX_ALIGN_LOG2
dispatch_step 2
.p2align ARM_BX_ALIGN_LOG2
dispatch_step 1
.p2align ARM_BX_ALIGN_LOG2
.purgem dispatch_step
.endm
.macro dispatch_15_word
dispatch_helper 15, 2
dispatch_step 15
.p2align ARM_BX_ALIGN_LOG2
dispatch_step 1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 161 | 220 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:6 | .p2align ARM_BX_ALIGN_LOG2
dispatch_step 1
.p2align ARM_BX_ALIGN_LOG2
.purgem dispatch_step
.endm
#endif
#ifndef USE_NEON
/* For bulk copies using GP registers. */
#define A_l r2 /* Call-clobbered. */
#define A_h r3 /* Call-clobbered. */
#define B_l r4
#define B_h r5
#define C_l r6
#define C_h r7
/* Don't us... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 201 | 260 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:7 | vstr d1, [dst, #\base + 48]
vldr d1, [src, #\base + 48]
vstr d2, [dst, #\base + 56]
vldr d2, [src, #\base + 56]
.endm
.macro cpy_tail_vfp vreg, base
vstr \vreg, [dst, #\base]
vldr \vreg, [src, #\base]
vstr d0, [dst, #\base + 8]
vldr d0, [src, #\base + 8]
vstr d1, [dst, #\base + 16]
vldr d1, [src, #\base + 1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:8 | .macro neon_load_d0 reg
vld1.8 {d0}, [\reg]!
.endm
.macro neon_store_d0 reg
vst1.8 {d0}, [\reg]!
.endm
and tmp1, count, #0x38
.macro dispatch_step i
neon_load_d0 src
neon_store_d0 dst
.endm
dispatch_7_dword
tst count, #4
ldrne tmp1, [src], #4
strne tmp1, [dst], #4
#else
/* Copy up to 15 full words of d... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 281 | 340 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:9 | str tmp2, [sp, #-FRAME_SIZE]!
cfi_adjust_cfa_offset (FRAME_SIZE)
cfi_rel_offset (tmp2, 0)
cfi_remember_state
and tmp2, src, #7
and tmp1, dst, #7
cmp tmp1, tmp2
bne .Lcpy_notaligned
#ifdef USE_VFP
/* Magic dust alert! Force VFP on Cortex-A9. Experiments show
that the FP pipeline is much better at streamin... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 321 | 380 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:10 | 1:
vldr d0, [src, #0]
subs tmp2, tmp2, #64
vldr d1, [src, #8]
vstr d0, [dst, #0]
vldr d0, [src, #16]
vstr d1, [dst, #8]
vldr d1, [src, #24]
vstr d0, [dst, #16]
vldr d0, [src, #32]
vstr d1, [dst, #24]
vldr d1, [src, #40]
vstr d0, [dst, #32]
vldr d0, [src, #48]
vstr d1, [dst, #40]
vldr d1, [src, #56]
vstr... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 361 | 420 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:11 | strd A_l, A_h, [dst, #16]
ldrd A_l, A_h, [src, #24]
strd A_l, A_h, [dst, #24]
ldrd A_l, A_h, [src, #32]
strd A_l, A_h, [dst, #32]
ldrd A_l, A_h, [src, #40]
strd A_l, A_h, [dst, #40]
ldrd A_l, A_h, [src, #48]
strd A_l, A_h, [dst, #48]
ldrd A_l, A_h, [src, #56]
strd A_l, A_h, [dst, #56]
ldrd A_l, A_h, [src, #6... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 401 | 460 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:12 | strd A_l, A_h, [dst, #-(\i * 8)]
.endm
dispatch_7_dword
#endif
tst tmp2, #4
ldrne tmp1, [src], #4
strne tmp1, [dst], #4
lsls tmp2, tmp2, #31 /* Count (tmp2) now dead. */
ldrhcs tmp1, [src], #2
ldrbne tmp2, [src]
strhcs tmp1, [dst], #2
strbne tmp2, [dst]
.Ldone:
ldr tmp2, [sp], #FRAME_SIZE
cfi_adjust_cfa_... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 441 | 500 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:13 | vldr d2, [src, #24]
add src, src, #32
subs tmp2, tmp2, #prefetch_lines * 64 * 2
blo 2f
1:
cpy_line_vfp d3, 0
cpy_line_vfp d4, 64
cpy_line_vfp d5, 128
add dst, dst, #3 * 64
add src, src, #3 * 64
cpy_line_vfp d6, 0
cpy_line_vfp d7, 64
add dst, dst, #2 * 64
add src, src, #2 * 64
subs tmp2, tmp2, #prefetch_li... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 481 | 540 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:14 | b .Lcpy_body_medium
#else
/* Long copy. Use an SMS style loop to maximize the I/O
bandwidth of the core. We don't have enough spare registers
to synthesise prefetching, so use PLD operations. */
/* Pre-bias src and dst. */
sub src, src, #8
sub dst, dst, #8
pld [src, #8]
pld [src, #72]
subs tmp2, tmp2... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 521 | 580 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:15 | strd A_l, A_h, [dst, #8]
ldrd A_l, A_h, [src, #8]
strd B_l, B_h, [dst, #16]
ldrd B_l, B_h, [src, #16]
strd C_l, C_h, [dst, #24]
ldrd C_l, C_h, [src, #24]
strd D_l, D_h, [dst, #32]
ldrd D_l, D_h, [src, #32]
bcs 2b
/* Save the remaining bytes and restore the callee-saved regs. */
strd A_l, A_h, [dst, #40]
add... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 561 | 620 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:16 | alignment. */
/* Bring DST to 64-bit alignment. */
lsls tmp2, dst, #29
pld [src, #(2 * 64)]
beq 1f
rsbs tmp2, tmp2, #0
sub count, count, tmp2, lsr #29
ldrmi tmp1, [src], #4
strmi tmp1, [dst], #4
lsls tmp2, tmp2, #2
ldrbne tmp1, [src], #1
ldrhcs tmp2, [src], #2
strbne tmp1, [dst], #1
strhcs tmp2, [dst], #... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 601 | 660 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:17 | neon_store_multi d4-d7, dst
neon_load_multi d4-d7, src
subs count, count, #64
bhs 1b
2:
neon_store_multi d0-d3, dst
neon_store_multi d4-d7, dst
ands count, count, #0x3f
#else
/* Use an SMS style loop to maximize the I/O bandwidth. */
sub src, src, #4
sub dst, dst, #8
subs tmp2, count, #64 /* Use tmp2 for cou... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 641 | 700 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:18 | strd C_l, C_h, [dst, #56]
ldr C_l, [src, #52]
ldr C_h, [src, #56]
strd D_l, D_h, [dst, #64]!
ldr D_l, [src, #60]
ldr D_h, [src, #64]!
subs tmp2, tmp2, #64
1:
strd A_l, A_h, [dst, #8]
ldr A_l, [src, #4]
ldr A_h, [src, #8]
strd B_l, B_h, [dst, #16]
ldr B_l, [src, #12]
ldr B_h, [src, #16]
strd C_l, C_h, [dst,... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 681 | 728 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2025 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 2642002380aafb71a1d3b569b6d7ebeab3284816 | github | libc | https://github.com/bminor/glibc/blob/2642002380aafb71a1d3b569b6d7ebeab3284816/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | dff8da6b3e89b986bb7f6b1ec18cf65d5972e307 | github | libc | https://github.com/bminor/glibc/blob/dff8da6b3e89b986bb7f6b1ec18cf65d5972e307/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2023 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 6d7e8eda9b85b08f207a6dc6f187e94e4817270f | github | libc | https://github.com/bminor/glibc/blob/6d7e8eda9b85b08f207a6dc6f187e94e4817270f/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2022 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 581c785bf31bc74430320c7856bbfa3875d025fe | github | libc | https://github.com/bminor/glibc/blob/581c785bf31bc74430320c7856bbfa3875d025fe/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2021 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 2b778ceb4010c28d70de9b8eab20e8d88eed586b | github | libc | https://github.com/bminor/glibc/blob/2b778ceb4010c28d70de9b8eab20e8d88eed586b/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2020 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | beea361050728138b82c57dda0c4810402d342b9 | github | libc | https://github.com/bminor/glibc/blob/beea361050728138b82c57dda0c4810402d342b9/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:7 | vstr d1, [dst, #\base + 48]
vldr d1, [src, #\base + 48]
vstr d2, [dst, #\base + 56]
vldr d2, [src, #\base + 56]
.endm
.macro cpy_tail_vfp vreg, base
vstr \vreg, [dst, #\base]
vldr \vreg, [src, #\base]
vstr d0, [dst, #\base + 8]
vldr d0, [src, #\base + 8]
vstr d1, [dst, #\base + 16]
vldr d1, [src, #\base + 1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:9 | str tmp2, [sp, #-FRAME_SIZE]!
cfi_adjust_cfa_offset (FRAME_SIZE)
cfi_rel_offset (tmp2, 0)
cfi_remember_state
and tmp2, src, #7
and tmp1, dst, #7
cmp tmp1, tmp2
bne .Lcpy_notaligned
#ifdef USE_VFP
/* Magic dust alert! Force VFP on Cortex-A9. Experiments show
that the FP pipeline is much better at streamin... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 321 | 380 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:10 | 1:
vldr d0, [src, #0]
subs tmp2, tmp2, #64
vldr d1, [src, #8]
vstr d0, [dst, #0]
vldr d0, [src, #16]
vstr d1, [dst, #8]
vldr d1, [src, #24]
vstr d0, [dst, #16]
vldr d0, [src, #32]
vstr d1, [dst, #24]
vldr d1, [src, #40]
vstr d0, [dst, #32]
vldr d0, [src, #48]
vstr d1, [dst, #40]
vldr d1, [src, #56]
vstr... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 361 | 420 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:11 | strd A_l, A_h, [dst, #16]
ldrd A_l, A_h, [src, #24]
strd A_l, A_h, [dst, #24]
ldrd A_l, A_h, [src, #32]
strd A_l, A_h, [dst, #32]
ldrd A_l, A_h, [src, #40]
strd A_l, A_h, [dst, #40]
ldrd A_l, A_h, [src, #48]
strd A_l, A_h, [dst, #48]
ldrd A_l, A_h, [src, #56]
strd A_l, A_h, [dst, #56]
ldrd A_l, A_h, [src, #6... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 401 | 460 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:12 | strd A_l, A_h, [dst, #-(\i * 8)]
.endm
dispatch_7_dword
#endif
tst tmp2, #4
ldrne tmp1, [src], #4
strne tmp1, [dst], #4
lsls tmp2, tmp2, #31 /* Count (tmp2) now dead. */
ldrhcs tmp1, [src], #2
ldrbne tmp2, [src]
strhcs tmp1, [dst], #2
strbne tmp2, [dst]
.Ldone:
ldr tmp2, [sp], #FRAME_SIZE
cfi_adjust_cfa_... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 441 | 500 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:13 | vldr d2, [src, #24]
add src, src, #32
subs tmp2, tmp2, #prefetch_lines * 64 * 2
blt 2f
1:
cpy_line_vfp d3, 0
cpy_line_vfp d4, 64
cpy_line_vfp d5, 128
add dst, dst, #3 * 64
add src, src, #3 * 64
cpy_line_vfp d6, 0
cpy_line_vfp d7, 64
add dst, dst, #2 * 64
add src, src, #2 * 64
subs tmp2, tmp2, #prefetch_li... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 481 | 540 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:15 | strd A_l, A_h, [dst, #8]
ldrd A_l, A_h, [src, #8]
strd B_l, B_h, [dst, #16]
ldrd B_l, B_h, [src, #16]
strd C_l, C_h, [dst, #24]
ldrd C_l, C_h, [src, #24]
strd D_l, D_h, [dst, #32]
ldrd D_l, D_h, [src, #32]
bcs 2b
/* Save the remaining bytes and restore the callee-saved regs. */
strd A_l, A_h, [dst, #40]
add... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 561 | 620 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:16 | alignment. */
/* Bring DST to 64-bit alignment. */
lsls tmp2, dst, #29
pld [src, #(2 * 64)]
beq 1f
rsbs tmp2, tmp2, #0
sub count, count, tmp2, lsr #29
ldrmi tmp1, [src], #4
strmi tmp1, [dst], #4
lsls tmp2, tmp2, #2
ldrbne tmp1, [src], #1
ldrhcs tmp2, [src], #2
strbne tmp1, [dst], #1
strhcs tmp2, [dst], #... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 601 | 660 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:17 | neon_store_multi d4-d7, dst
neon_load_multi d4-d7, src
subs count, count, #64
bpl 1b
2:
neon_store_multi d0-d3, dst
neon_store_multi d4-d7, dst
ands count, count, #0x3f
#else
/* Use an SMS style loop to maximize the I/O bandwidth. */
sub src, src, #4
sub dst, dst, #8
subs tmp2, count, #64 /* Use tmp2 for cou... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 641 | 700 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2019 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 5a82c74822d3272df2f5929133680478c0cfb4bd | github | libc | https://github.com/bminor/glibc/blob/5a82c74822d3272df2f5929133680478c0cfb4bd/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2019 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 04277e02d7f54d3582bebcf8386b317018cd5e1d | github | libc | https://github.com/bminor/glibc/blob/04277e02d7f54d3582bebcf8386b317018cd5e1d/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2018 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | a306c790a835894c22d076a04a9924d3daeb9462 | github | libc | https://github.com/bminor/glibc/blob/a306c790a835894c22d076a04a9924d3daeb9462/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:7 | vstr d1, [dst, #\base + 48]
vldr d1, [src, #\base + 48]
vstr d2, [dst, #\base + 56]
vldr d2, [src, #\base + 56]
.endm
.macro cpy_tail_vfp vreg, base
vstr \vreg, [dst, #\base]
vldr \vreg, [src, #\base]
vstr d0, [dst, #\base + 8]
vldr d0, [src, #\base + 8]
vstr d1, [dst, #\base + 16]
vldr d1, [src, #\base + 1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 81cb7a0b2b6b905a504b8b56fe3c1634adf8fb71 | github | libc | https://github.com/bminor/glibc/blob/81cb7a0b2b6b905a504b8b56fe3c1634adf8fb71/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:6 | .p2align ARM_BX_ALIGN_LOG2
dispatch_step 1
.p2align ARM_BX_ALIGN_LOG2
.purgem dispatch_step
.endm
#endif
#ifndef USE_NEON
/* For bulk copies using GP registers. */
#define A_l r2 /* Call-clobbered. */
#define A_h r3 /* Call-clobbered. */
#define B_l r4
#define B_h r5
#define C_l r6
#define C_h r7
/* Don't us... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 201 | 260 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:7 | sfi_breg dst, \
vstr d2, [\B, #\base + 24]
sfi_breg src, \
vldr d2, [\B, #\base + 24]
sfi_breg dst, \
vstr \vreg, [\B, #\base + 32]
sfi_breg src, \
vldr \vreg, [\B, #\base + prefetch_lines * 64 - 32]
sfi_breg dst, \
vstr d0, [\B, #\base + 40]
sfi_breg src, \
vldr d0, [\B, #\base + 40]
sfi_breg dst, \
vstr ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:8 | vstr \vreg, [\B, #\base + 32]
sfi_breg dst, \
vstr d0, [\B, #\base + 40]
sfi_breg src, \
vldr d0, [\B, #\base + 40]
sfi_breg dst, \
vstr d1, [\B, #\base + 48]
sfi_breg src, \
vldr d1, [\B, #\base + 48]
sfi_breg dst, \
vstr d2, [\B, #\base + 56]
sfi_breg src, \
vldr d2, [\B, #\base + 56]
.endm
#endif
.p2a... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 281 | 340 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:9 | _sfi_dmask \reg
.endm
.macro _sfi_breg_dmask_neon_store_d0 reg
_sfi_dmask \reg
.endm
and tmp1, count, #0x38
.macro dispatch_step i
sfi_breg src, neon_load_d0 \B
sfi_breg dst, neon_store_d0 \B
.endm
dispatch_7_dword
tst count, #4
sfi_breg src, \
ldrne tmp1, [\B], #4
sfi_breg dst, \
strne tmp1, [\B], #4
... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 321 | 380 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:10 | strhcs tmp1, [\B], #2
sfi_breg dst, \
strbne src, [\B]
bx lr
.Lcpy_not_short:
/* At least 64 bytes to copy, but don't know the alignment yet. */
str tmp2, [sp, #-FRAME_SIZE]!
cfi_adjust_cfa_offset (FRAME_SIZE)
cfi_rel_offset (tmp2, 0)
cfi_remember_state
and tmp2, src, #7
and tmp1, dst, #7
cmp tmp1, tmp2
b... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 361 | 420 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:11 | strhcs tmp1, [\B], #2
sfi_breg dst, \
strbne tmp2, [\B], #1
1:
subs tmp2, count, #64 /* Use tmp2 for count. */
blt .Ltail63aligned
cmp tmp2, #512
bge .Lcpy_body_long
.Lcpy_body_medium: /* Count in tmp2. */
#ifdef USE_VFP
1:
sfi_breg src, \
vldr d0, [\B, #0]
subs tmp2, tmp2, #64
sfi_breg src, \
vldr d1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 401 | 460 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:12 | vstr d1, [\B, #40]
sfi_breg src, \
vldr d1, [\B, #56]
sfi_breg dst, \
vstr d0, [\B, #48]
add src, src, #64
sfi_breg dst, \
vstr d1, [\B, #56]
add dst, dst, #64
bge 1b
tst tmp2, #0x3f
beq .Ldone
.Ltail63aligned: /* Count in tmp2. */
and tmp1, tmp2, #0x38
add dst, dst, tmp1
add src, src, tmp1
.macro di... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 441 | 500 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:13 | sfi_breg src, \
ldrd A_l, A_h, [\B, #32]
sfi_breg dst, \
strd A_l, A_h, [\B, #32]
sfi_breg src, \
ldrd A_l, A_h, [\B, #40]
sfi_breg dst, \
strd A_l, A_h, [\B, #40]
sfi_breg src, \
ldrd A_l, A_h, [\B, #48]
sfi_breg dst, \
strd A_l, A_h, [\B, #48]
sfi_breg src, \
ldrd A_l, A_h, [\B, #56]
sfi_breg dst, \
st... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 481 | 540 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:14 | six bits still tell us how many bytes are left to copy. */
and tmp1, tmp2, #0x38
add dst, dst, tmp1
add src, src, tmp1
.macro dispatch_step i
sfi_breg src, \
ldrd A_l, A_h, [\B, #-(\i * 8)]
sfi_breg dst, \
strd A_l, A_h, [\B, #-(\i * 8)]
.endm
dispatch_7_dword
#endif
tst tmp2, #4
sfi_breg src, \
ldrne t... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 521 | 580 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:15 | /* Long copy. We know that there's at least (prefetch_lines * 64)
bytes to go. */
#ifdef USE_VFP
/* Don't use PLD. Instead, read some data in advance of the current
copy position into a register. This should act like a PLD
operation but we won't have to repeat the transfer. */
sfi_breg src, \
vldr ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 561 | 620 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:16 | 2:
cpy_tail_vfp d3, 0
cpy_tail_vfp d4, 64
cpy_tail_vfp d5, 128
add src, src, #3 * 64
add dst, dst, #3 * 64
cpy_tail_vfp d6, 0
sfi_breg dst, \
vstr d7, [\B, #64]
sfi_breg src, \
vldr d7, [\B, #64]
sfi_breg dst, \
vstr d0, [\B, #64 + 8]
sfi_breg src, \
vldr d0, [\B, #64 + 8]
sfi_breg dst, \
vstr d1, [\B, ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 601 | 660 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:17 | /* Pre-bias src and dst. */
sub src, src, #8
sub dst, dst, #8
sfi_pld src, #8
sfi_pld src, #72
subs tmp2, tmp2, #64
sfi_pld src, #136
sfi_breg src, \
ldrd A_l, A_h, [\B, #8]
strd B_l, B_h, [sp, #8]
cfi_rel_offset (B_l, 8)
cfi_rel_offset (B_h, 12)
sfi_breg src, \
ldrd B_l, B_h, [\B, #16]
strd C_l, C_h, [s... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 641 | 700 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:18 | ldrd C_l, C_h, [\B, #56]
sfi_breg dst, \
strd D_l, D_h, [\B, #64]!
sfi_breg src, \
ldrd D_l, D_h, [\B, #64]!
subs tmp2, tmp2, #64
1:
sfi_breg dst, \
strd A_l, A_h, [\B, #8]
sfi_breg src, \
ldrd A_l, A_h, [\B, #8]
sfi_breg dst, \
strd B_l, B_h, [\B, #16]
sfi_breg src, \
ldrd B_l, B_h, [\B, #16]
sfi_breg ds... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 681 | 740 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:19 | ldrd D_l, D_h, [sp, #24]
cfi_restore (D_l)
cfi_restore (D_h)
add dst, dst, #72
tst tmp2, #0x3f
bne .Ltail63aligned
ldr tmp2, [sp], #FRAME_SIZE
cfi_adjust_cfa_offset (-FRAME_SIZE)
cfi_restore (tmp2)
bx lr
#endif
cfi_restore_state
cfi_remember_state
.Lcpy_notaligned:
sfi_pld src
sfi_pld src, #64
/* There'... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 721 | 780 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:20 | sfi_pld src, #(3 * 64)
subs count, count, #64
ldrmi tmp2, [sp], #FRAME_SIZE
bmi .Ltail63unaligned
sfi_pld src, #(4 * 64)
#ifdef USE_NEON
/* These need an extra layer of macro just to work around a
bug in the assembler's parser when an operand starts with
a {...}. */
.macro neon_load_multi reglist, baser... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 761 | 820 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:21 | ands count, count, #0x3f
#else
/* Use an SMS style loop to maximize the I/O bandwidth. */
sub src, src, #4
sub dst, dst, #8
subs tmp2, count, #64 /* Use tmp2 for count. */
sfi_breg src, \
ldr A_l, [\B, #4]
sfi_breg src, \
ldr A_h, [\B, #8]
strd B_l, B_h, [sp, #8]
cfi_rel_offset (B_l, 8)
cfi_rel_offset (B_h... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 801 | 860 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:22 | ldr A_h, [\B, #40]
sfi_breg dst, \
strd B_l, B_h, [\B, #48]
sfi_breg src, \
ldr B_l, [\B, #44]
sfi_breg src, \
ldr B_h, [\B, #48]
sfi_breg dst, \
strd C_l, C_h, [\B, #56]
sfi_breg src, \
ldr C_l, [\B, #52]
sfi_breg src, \
ldr C_h, [\B, #56]
sfi_breg dst, \
strd D_l, D_h, [\B, #64]!
sfi_breg src, \
ldr D... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 841 | 900 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:23 | strd D_l, D_h, [\B, #32]
sfi_breg src, \
ldr D_l, [\B, #28]
sfi_breg src, \
ldr D_h, [\B, #32]
bcs 2b
/* Save the remaining bytes and restore the callee-saved regs. */
sfi_breg dst, \
strd A_l, A_h, [\B, #40]
add src, src, #36
sfi_breg dst, \
strd B_l, B_h, [\B, #48]
ldrd B_l, B_h, [sp, #8]
cfi_restore (... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 881 | 917 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | f7a9f785e547bd599dee496fd906a28bcb4ec7fe | github | libc | https://github.com/bminor/glibc/blob/f7a9f785e547bd599dee496fd906a28bcb4ec7fe/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/multiarch/memcpy_impl.S:1 | /* NEON/VFP/ARM version of memcpy optimized for Cortex-A15.
Copyright (C) 2013-2015 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/multiarch/memcpy_impl.S | LGPL-2.1 | 890b7a4b33d482b5c768ab47d70758b80227e9bc | github | libc | https://github.com/bminor/glibc/blob/890b7a4b33d482b5c768ab47d70758b80227e9bc/sysdeps/arm/armv7/multiarch/memcpy_impl.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2026 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:3 | #define data1 r2
#define data2 r3
#define syndrome tmp2
.thumb
/* In Thumb code we can't use MVN with a register shift, but we do have ORN. */
.macro prepare_mask mask_reg, nbits_reg
S2HI \mask_reg, const_m1, \nbits_reg
.endm
.macro apply_mask data_reg, mask_reg
orn \data_reg, \data_reg, \mask_reg
.endm
/* M... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 81 | 140 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:4 | #else
/* To use the big-endian trick we'd have to reverse all three words.
that's slower than this approach. */
rev \synd, \synd
clz tmp1, \synd
bic tmp1, tmp1, #7
lsr r1, \d2, tmp1
.if \restore_r6
ldrd r6, r7, [sp, #8]
.endif
lsr \d1, \d1, tmp1
and result, \d1, #255
and r1, r1, #255
ldrd r4, r5, [sp],... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 121 | 180 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:5 | it cs
cmpcs r2, r3
bne .Lfastpath_exit
#endif
strd r4, r5, [sp, #-16]!
cfi_def_cfa_offset (16)
cfi_offset (r4, -16)
cfi_offset (r5, -12)
orr tmp1, src1, src2
strd r6, r7, [sp, #8]
cfi_offset (r6, -8)
cfi_offset (r7, -4)
mvn const_m1, #0
lsl r2, tmp1, #29
cbz r2, .Lloop_aligned8
.Lnot_aligned:
eor tmp1, s... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 161 | 220 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:6 | /* Unwind the inner loop by a factor of 2, giving 16 bytes per
pass. */
.p2align 5,,12 /* Don't start in the tail bytes of a cache line. */
.p2align 2 /* Always word aligned. */
.Lloop_aligned8:
ldrd data1a, data1b, [src1], #16
ldrd data2a, data2b, [src2], #16
.Lstart_realigned8:
uadd8 syndrome_b, data1a, ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 201 | 260 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:7 | cfi_restore_state
.Lmisaligned8:
tst tmp1, #3
bne .Lmisaligned4
ands tmp1, src1, #3
bne .Lmutual_align4
/* Unrolled by a factor of 2, to reduce the number of post-increment
operations. */
.Lloop_aligned4:
ldr data1, [src1], #8
ldr data2, [src2], #8
.Lstart_realigned4:
uadd8 syndrome, data1, const_m1 /* On... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:8 | apply_mask data2, tmp1
b .Lstart_realigned4
.Lmisaligned4:
ands tmp1, src1, #3
beq .Lsrc1_aligned
sub src2, src2, tmp1
bic src1, src1, #3
lsls tmp1, tmp1, #31
ldr data1, [src1], #4
beq .Laligned_m2
bcs .Laligned_m1
#if STRCMP_PRECHECK == 0
ldrb data2, [src2, #1]
uxtb tmp1, data1, ror #BYTE1_OFFSET
subs tm... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 281 | 340 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:9 | bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m2:
ldrb data2, [src2, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbnz data2, .Laligned_m1
#endif
.Lmisaligned_exit:
mov result, tmp1
ldr r4, [sp], #16
cfi_remember_state
cfi_def_cfa_offset (0)
cfi_restor... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 321 | 380 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:10 | bic tmp1, data1, #MSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #8
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, 5f
ldr data2, [src2], #4
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #24
bne 6f
ldr data1, [src1], #4
b .Loverlap3
4:
S2LO data2, data2, #8
b .Lstrcmp_tail
5:
b... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 361 | 420 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:11 | .p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap2:
and tmp1, data1, const_m1, S2LO #16
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #16
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, 5f
ldr data2, [src2], #4
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 401 | 460 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:12 | cbnz syndrome, 5f
ldr data2, [src2], #4
eor tmp1, tmp1, data1
cmp tmp1, data2, S2HI #8
bne 6f
ldr data1, [src1], #4
b .Loverlap1
4:
S2LO data2, data2, #24
b .Lstrcmp_tail
5:
tst syndrome, #LSB
bne .Lstrcmp_done_equal
ldr data2, [src2]
6:
S2LO data1, data1, #8
bic data2, data2, #MSB
b .Lstrcmp_tail
.Lstrc... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 441 | 496 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:13 | sel syndrome, tmp1, const_m1
clz tmp1, syndrome
lsl data1, data1, tmp1
lsl data2, data2, tmp1
lsr result, data1, #24
ldrd r4, r5, [sp], #16
cfi_def_cfa_offset (0)
cfi_restore (r4)
cfi_restore (r5)
/* R6/7 not used in this sequence. */
cfi_restore (r6)
cfi_restore (r7)
sub result, result, data2, lsr #24
bx... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04e750e75b73957cf1c791535a3f4319534a52fc | github | libc | https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/sysdeps/arm/armv7/strcmp.S | 481 | 496 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2025 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 2642002380aafb71a1d3b569b6d7ebeab3284816 | github | libc | https://github.com/bminor/glibc/blob/2642002380aafb71a1d3b569b6d7ebeab3284816/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2024 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | dff8da6b3e89b986bb7f6b1ec18cf65d5972e307 | github | libc | https://github.com/bminor/glibc/blob/dff8da6b3e89b986bb7f6b1ec18cf65d5972e307/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2023 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 6d7e8eda9b85b08f207a6dc6f187e94e4817270f | github | libc | https://github.com/bminor/glibc/blob/6d7e8eda9b85b08f207a6dc6f187e94e4817270f/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2022 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 581c785bf31bc74430320c7856bbfa3875d025fe | github | libc | https://github.com/bminor/glibc/blob/581c785bf31bc74430320c7856bbfa3875d025fe/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2021 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 2b778ceb4010c28d70de9b8eab20e8d88eed586b | github | libc | https://github.com/bminor/glibc/blob/2b778ceb4010c28d70de9b8eab20e8d88eed586b/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2020 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | d614a7539657941a9201c236b2f15afac18e1213 | github | libc | https://github.com/bminor/glibc/blob/d614a7539657941a9201c236b2f15afac18e1213/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2019 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 5a82c74822d3272df2f5929133680478c0cfb4bd | github | libc | https://github.com/bminor/glibc/blob/5a82c74822d3272df2f5929133680478c0cfb4bd/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2019 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 04277e02d7f54d3582bebcf8386b317018cd5e1d | github | libc | https://github.com/bminor/glibc/blob/04277e02d7f54d3582bebcf8386b317018cd5e1d/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2018 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 743b9c2a98426fb40f8ffee3529c8870bc5300f5 | github | libc | https://github.com/bminor/glibc/blob/743b9c2a98426fb40f8ffee3529c8870bc5300f5/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:3 | #define data1 r2
#define data2 r3
#define syndrome tmp2
#ifndef NO_THUMB
/* This code is best on Thumb. */
.thumb
/* In Thumb code we can't use MVN with a register shift, but we do have ORN. */
.macro prepare_mask mask_reg, nbits_reg
S2HI \mask_reg, const_m1, \nbits_reg
.endm
.macro apply_mask data_reg, mask_r... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 81 | 140 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:4 | .macro strcmp_epilogue_aligned synd d1 d2 restore_r6
#ifdef __ARM_BIG_ENDIAN
/* If data1 contains a zero byte, then syndrome will contain a 1 in
bit 7 of that byte. Otherwise, the highest set bit in the
syndrome will highlight the first different bit. It is therefore
sufficient to extract the eight bits ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 121 | 180 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:5 | cfi_restore (r5)
cfi_restore (r6)
cfi_restore (r7)
sub result, result, r1
bx lr
#endif
.endm
.text
.p2align 5
.Lstrcmp_start_addr:
#if STRCMP_PRECHECK == 1
.Lfastpath_exit:
sub r0, r2, r3
bx lr
nop
#endif
ENTRY (strcmp)
#if STRCMP_PRECHECK == 1
ldrb r2, [src1]
ldrb r3, [src2]
cmp r2, #1
it cs
cmpcs r2,... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 161 | 220 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:6 | eor tmp1, src1, src2
tst tmp1, #7
bne .Lmisaligned8
/* Deal with mutual misalignment by aligning downwards and then
masking off the unwanted loaded data to prevent a difference. */
and tmp1, src1, #7
bic src1, src1, #7
and tmp2, tmp1, #3
bic src2, src2, #7
lsl tmp2, tmp2, #3 /* Bytes -> bits. */
ldrd da... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 201 | 260 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:7 | ldrd data1a, data1b, [src1, #-8]
ldrd data2a, data2b, [src2, #-8]
uadd8 syndrome_b, data1a, const_m1 /* Only want GE bits, */
eor syndrome_a, data1a, data2a
sel syndrome_a, syndrome_a, const_m1
uadd8 syndrome_b, data1b, const_m1 /* Only want GE bits. */
eor syndrome_b, data1b, data2b
sel syndrome_b, syndrome_b... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:8 | ldr data1, [src1, #-4]
ldr data2, [src2, #-4]
uadd8 syndrome, data1, const_m1
eor syndrome, data1, data2
sel syndrome, syndrome, const_m1
cmp syndrome, #0
beq .Lloop_aligned4
.Laligned4_done:
strcmp_epilogue_aligned syndrome, data1, data2, 0
.Lmutual_align4:
cfi_restore_state
/* Deal with mutual misalignment... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 281 | 340 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:9 | bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m2:
ldrb data2, [src2, #2]
uxtb tmp1, data1, ror #BYTE2_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m1:
ldrb data2, [src2, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
subs tmp1, tmp1, data2
bne .Lmisalign... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 321 | 380 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:10 | cfi_restore (r5)
cfi_restore (r6)
cfi_restore (r7)
bx lr
#if STRCMP_PRECHECK == 1
.Laligned_m1:
add src2, src2, #4
#endif
.Lsrc1_aligned:
cfi_restore_state
/* src1 is word aligned, but src2 has no common alignment
with it. */
ldr data1, [src1], #4
lsls tmp1, src2, #31 /* C=src2[1], Z=src2[0]. */
bic s... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 361 | 420 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:11 | bics syndrome, syndrome, #MSB
bne .Lstrcmp_done_equal
/* We can only get here if the MSB of data1 contains 0, so
fast-path the exit. */
ldrb result, [src2]
ldrd r4, r5, [sp], #16
cfi_remember_state
cfi_def_cfa_offset (0)
cfi_restore (r4)
cfi_restore (r5)
/* R6/7 Not used in this sequence. */
cfi_restor... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 401 | 460 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:12 | 5:
ands syndrome, syndrome, const_m1, S2LO #16
bne .Lstrcmp_done_equal
ldrh data2, [src2]
S2LO data1, data1, #16
#ifdef __ARM_BIG_ENDIAN
lsl data2, data2, #16
#endif
b .Lstrcmp_tail
6:
S2LO data1, data1, #16
and data2, data2, const_m1, S2LO #16
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructio... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 441 | 500 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:13 | b .Lstrcmp_tail
.Lstrcmp_done_equal:
mov result, #0
ldrd r4, r5, [sp], #16
cfi_remember_state
cfi_def_cfa_offset (0)
cfi_restore (r4)
cfi_restore (r5)
/* R6/7 not used in this sequence. */
cfi_restore (r6)
cfi_restore (r7)
bx lr
.Lstrcmp_tail:
cfi_restore_state
#ifndef __ARM_BIG_ENDIAN
rev data1, data1
... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 688903eb3ef01301d239ab753d309d45720610a7 | github | libc | https://github.com/bminor/glibc/blob/688903eb3ef01301d239ab753d309d45720610a7/sysdeps/arm/armv7/strcmp.S | 481 | 519 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:1 | /* strcmp implementation for ARMv7-A, optimized for Cortex-A15.
Copyright (C) 2012-2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as publishe... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | 81cb7a0b2b6b905a504b8b56fe3c1634adf8fb71 | github | libc | https://github.com/bminor/glibc/blob/81cb7a0b2b6b905a504b8b56fe3c1634adf8fb71/sysdeps/arm/armv7/strcmp.S | 1 | 60 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:5 | cfi_restore (r5)
cfi_restore (r6)
cfi_restore (r7)
sub result, result, r1
bx lr
#endif
.endm
.text
.p2align 5
.Lstrcmp_start_addr:
#if STRCMP_PRECHECK == 1
.Lfastpath_exit:
sub r0, r2, r3
bx lr
nop
#endif
ENTRY (strcmp)
#if STRCMP_PRECHECK == 1
sfi_breg src1, \
ldrb r2, [\B]
sfi_breg src2, \
ldrb r3, [\... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 161 | 220 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:6 | .Lnot_aligned:
eor tmp1, src1, src2
tst tmp1, #7
bne .Lmisaligned8
/* Deal with mutual misalignment by aligning downwards and then
masking off the unwanted loaded data to prevent a difference. */
and tmp1, src1, #7
bic src1, src1, #7
and tmp2, tmp1, #3
bic src2, src2, #7
lsl tmp2, tmp2, #3 /* Bytes -> bi... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 201 | 260 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:7 | sel syndrome_a, syndrome_a, const_m1
cbnz syndrome_a, .Ldiff_in_a
uadd8 syndrome_b, data1b, const_m1 /* Only want GE bits. */
eor syndrome_b, data1b, data2b
sel syndrome_b, syndrome_b, const_m1
cbnz syndrome_b, .Ldiff_in_b
sfi_breg src1, \
ldrd data1a, data1b, [\B, #-8]
sfi_breg src2, \
ldrd data2a, data2b, ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 241 | 300 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:8 | .Lloop_aligned4:
sfi_breg src1, \
ldr data1, [\B], #8
sfi_breg src2, \
ldr data2, [\B], #8
.Lstart_realigned4:
uadd8 syndrome, data1, const_m1 /* Only need GE bits. */
eor syndrome, data1, data2
sel syndrome, syndrome, const_m1
cbnz syndrome, .Laligned4_done
sfi_breg src1, \
ldr data1, [\B, #-4]
sfi_breg sr... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 281 | 340 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:9 | .Lmisaligned4:
ands tmp1, src1, #3
beq .Lsrc1_aligned
sub src2, src2, tmp1
bic src1, src1, #3
lsls tmp1, tmp1, #31
sfi_breg src1, \
ldr data1, [\B], #4
beq .Laligned_m2
bcs .Laligned_m1
#if STRCMP_PRECHECK == 0
sfi_breg src2, \
ldrb data2, [\B, #1]
uxtb tmp1, data1, ror #BYTE1_OFFSET
subs tmp1, tmp1, data... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 321 | 380 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:10 | uxtb tmp1, data1, ror #BYTE2_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbz data2, .Lmisaligned_exit
.Laligned_m2:
sfi_breg src2, \
ldrb data2, [\B, #3]
uxtb tmp1, data1, ror #BYTE3_OFFSET
subs tmp1, tmp1, data2
bne .Lmisaligned_exit
cbnz data2, .Laligned_m1
#endif
.Lmisaligned_exit:
mov result, tm... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 361 | 420 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:11 | bhi .Loverlap1 /* C=1, Z=0 => src2[1:0] = 0b11. */
bcs .Loverlap2 /* C=1, Z=1 => src2[1:0] = 0b10. */
/* (overlap3) C=0, Z=0 => src2[1:0] = 0b01. */
.Loverlap3:
bic tmp1, data1, #MSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #8
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, ... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 401 | 460 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:12 | bx lr
6:
cfi_restore_state
S2LO data1, data1, #24
and data2, data2, #LSB
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap2:
and tmp1, data1, const_m1, S2LO #16
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #16
sel syndrome, syndrome, const_m1
b... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 441 | 500 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:13 | S2LO data1, data1, #16
and data2, data2, const_m1, S2LO #16
b .Lstrcmp_tail
.p2align 5,,12 /* Ensure at least 3 instructions in cache line. */
.Loverlap1:
and tmp1, data1, #LSB
uadd8 syndrome, data1, const_m1
eors syndrome, tmp1, data2, S2LO #24
sel syndrome, syndrome, const_m1
bne 4f
cbnz syndrome, 5f
sfi_... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 481 | 540 |
bminor/glibc:sysdeps/arm/armv7/strcmp.S:14 | /* R6/7 not used in this sequence. */
cfi_restore (r6)
cfi_restore (r7)
bx lr
.Lstrcmp_tail:
cfi_restore_state
#ifndef __ARM_BIG_ENDIAN
rev data1, data1
rev data2, data2
/* Now everything looks big-endian... */
#endif
uadd8 tmp1, data1, const_m1
eor tmp1, data1, data2
sel syndrome, tmp1, const_m1
clz tmp1... | arm | gas-like | macro-heavy | bminor/glibc | sysdeps/arm/armv7/strcmp.S | LGPL-2.1 | bfff8b1becd7d01c074177df7196ab327cd8c844 | github | libc | https://github.com/bminor/glibc/blob/bfff8b1becd7d01c074177df7196ab327cd8c844/sysdeps/arm/armv7/strcmp.S | 521 | 550 |
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